1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2009-2016 Cavium, Inc.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/acpi.h>
7*4882a593Smuzhiyun #include <linux/gfp.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/of_address.h>
11*4882a593Smuzhiyun #include <linux/of_mdio.h>
12*4882a593Smuzhiyun #include <linux/pci.h>
13*4882a593Smuzhiyun #include <linux/phy.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "mdio-cavium.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun struct thunder_mdiobus_nexus {
18*4882a593Smuzhiyun void __iomem *bar0;
19*4882a593Smuzhiyun struct cavium_mdiobus *buses[4];
20*4882a593Smuzhiyun };
21*4882a593Smuzhiyun
thunder_mdiobus_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)22*4882a593Smuzhiyun static int thunder_mdiobus_pci_probe(struct pci_dev *pdev,
23*4882a593Smuzhiyun const struct pci_device_id *ent)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun struct device_node *node;
26*4882a593Smuzhiyun struct fwnode_handle *fwn;
27*4882a593Smuzhiyun struct thunder_mdiobus_nexus *nexus;
28*4882a593Smuzhiyun int err;
29*4882a593Smuzhiyun int i;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun nexus = devm_kzalloc(&pdev->dev, sizeof(*nexus), GFP_KERNEL);
32*4882a593Smuzhiyun if (!nexus)
33*4882a593Smuzhiyun return -ENOMEM;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun pci_set_drvdata(pdev, nexus);
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun err = pcim_enable_device(pdev);
38*4882a593Smuzhiyun if (err) {
39*4882a593Smuzhiyun dev_err(&pdev->dev, "Failed to enable PCI device\n");
40*4882a593Smuzhiyun pci_set_drvdata(pdev, NULL);
41*4882a593Smuzhiyun return err;
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun err = pci_request_regions(pdev, KBUILD_MODNAME);
45*4882a593Smuzhiyun if (err) {
46*4882a593Smuzhiyun dev_err(&pdev->dev, "pci_request_regions failed\n");
47*4882a593Smuzhiyun goto err_disable_device;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun nexus->bar0 = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
51*4882a593Smuzhiyun if (!nexus->bar0) {
52*4882a593Smuzhiyun err = -ENOMEM;
53*4882a593Smuzhiyun goto err_release_regions;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun i = 0;
57*4882a593Smuzhiyun device_for_each_child_node(&pdev->dev, fwn) {
58*4882a593Smuzhiyun struct resource r;
59*4882a593Smuzhiyun struct mii_bus *mii_bus;
60*4882a593Smuzhiyun struct cavium_mdiobus *bus;
61*4882a593Smuzhiyun union cvmx_smix_en smi_en;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* If it is not an OF node we cannot handle it yet, so
64*4882a593Smuzhiyun * exit the loop.
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun node = to_of_node(fwn);
67*4882a593Smuzhiyun if (!node)
68*4882a593Smuzhiyun break;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun err = of_address_to_resource(node, 0, &r);
71*4882a593Smuzhiyun if (err) {
72*4882a593Smuzhiyun dev_err(&pdev->dev,
73*4882a593Smuzhiyun "Couldn't translate address for \"%pOFn\"\n",
74*4882a593Smuzhiyun node);
75*4882a593Smuzhiyun break;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun mii_bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*bus));
79*4882a593Smuzhiyun if (!mii_bus)
80*4882a593Smuzhiyun break;
81*4882a593Smuzhiyun bus = mii_bus->priv;
82*4882a593Smuzhiyun bus->mii_bus = mii_bus;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun nexus->buses[i] = bus;
85*4882a593Smuzhiyun i++;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun bus->register_base = nexus->bar0 +
88*4882a593Smuzhiyun r.start - pci_resource_start(pdev, 0);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun smi_en.u64 = 0;
91*4882a593Smuzhiyun smi_en.s.en = 1;
92*4882a593Smuzhiyun oct_mdio_writeq(smi_en.u64, bus->register_base + SMI_EN);
93*4882a593Smuzhiyun bus->mii_bus->name = KBUILD_MODNAME;
94*4882a593Smuzhiyun snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%llx", r.start);
95*4882a593Smuzhiyun bus->mii_bus->parent = &pdev->dev;
96*4882a593Smuzhiyun bus->mii_bus->read = cavium_mdiobus_read;
97*4882a593Smuzhiyun bus->mii_bus->write = cavium_mdiobus_write;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun err = of_mdiobus_register(bus->mii_bus, node);
100*4882a593Smuzhiyun if (err)
101*4882a593Smuzhiyun dev_err(&pdev->dev, "of_mdiobus_register failed\n");
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun dev_info(&pdev->dev, "Added bus at %llx\n", r.start);
104*4882a593Smuzhiyun if (i >= ARRAY_SIZE(nexus->buses))
105*4882a593Smuzhiyun break;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun return 0;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun err_release_regions:
110*4882a593Smuzhiyun pci_release_regions(pdev);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun err_disable_device:
113*4882a593Smuzhiyun pci_set_drvdata(pdev, NULL);
114*4882a593Smuzhiyun return err;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
thunder_mdiobus_pci_remove(struct pci_dev * pdev)117*4882a593Smuzhiyun static void thunder_mdiobus_pci_remove(struct pci_dev *pdev)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun int i;
120*4882a593Smuzhiyun struct thunder_mdiobus_nexus *nexus = pci_get_drvdata(pdev);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(nexus->buses); i++) {
123*4882a593Smuzhiyun struct cavium_mdiobus *bus = nexus->buses[i];
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun if (!bus)
126*4882a593Smuzhiyun continue;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun mdiobus_unregister(bus->mii_bus);
129*4882a593Smuzhiyun oct_mdio_writeq(0, bus->register_base + SMI_EN);
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun pci_release_regions(pdev);
132*4882a593Smuzhiyun pci_set_drvdata(pdev, NULL);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun static const struct pci_device_id thunder_mdiobus_id_table[] = {
136*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa02b) },
137*4882a593Smuzhiyun { 0, } /* End of table. */
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, thunder_mdiobus_id_table);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun static struct pci_driver thunder_mdiobus_driver = {
142*4882a593Smuzhiyun .name = KBUILD_MODNAME,
143*4882a593Smuzhiyun .id_table = thunder_mdiobus_id_table,
144*4882a593Smuzhiyun .probe = thunder_mdiobus_pci_probe,
145*4882a593Smuzhiyun .remove = thunder_mdiobus_pci_remove,
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun module_pci_driver(thunder_mdiobus_driver);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun MODULE_DESCRIPTION("Cavium ThunderX MDIO bus driver");
151*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
152