1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Allwinner EMAC MDIO interface driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2012-2013 Stefan Roese <sr@denx.de>
6*4882a593Smuzhiyun * Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Based on the Linux driver provided by Allwinner:
9*4882a593Smuzhiyun * Copyright (C) 1997 Sten Wang
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/mutex.h>
16*4882a593Smuzhiyun #include <linux/of_address.h>
17*4882a593Smuzhiyun #include <linux/of_mdio.h>
18*4882a593Smuzhiyun #include <linux/phy.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define EMAC_MAC_MCMD_REG (0x00)
23*4882a593Smuzhiyun #define EMAC_MAC_MADR_REG (0x04)
24*4882a593Smuzhiyun #define EMAC_MAC_MWTD_REG (0x08)
25*4882a593Smuzhiyun #define EMAC_MAC_MRDD_REG (0x0c)
26*4882a593Smuzhiyun #define EMAC_MAC_MIND_REG (0x10)
27*4882a593Smuzhiyun #define EMAC_MAC_SSRR_REG (0x14)
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define MDIO_TIMEOUT (msecs_to_jiffies(100))
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun struct sun4i_mdio_data {
32*4882a593Smuzhiyun void __iomem *membase;
33*4882a593Smuzhiyun struct regulator *regulator;
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
sun4i_mdio_read(struct mii_bus * bus,int mii_id,int regnum)36*4882a593Smuzhiyun static int sun4i_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun struct sun4i_mdio_data *data = bus->priv;
39*4882a593Smuzhiyun unsigned long timeout_jiffies;
40*4882a593Smuzhiyun int value;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* issue the phy address and reg */
43*4882a593Smuzhiyun writel((mii_id << 8) | regnum, data->membase + EMAC_MAC_MADR_REG);
44*4882a593Smuzhiyun /* pull up the phy io line */
45*4882a593Smuzhiyun writel(0x1, data->membase + EMAC_MAC_MCMD_REG);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* Wait read complete */
48*4882a593Smuzhiyun timeout_jiffies = jiffies + MDIO_TIMEOUT;
49*4882a593Smuzhiyun while (readl(data->membase + EMAC_MAC_MIND_REG) & 0x1) {
50*4882a593Smuzhiyun if (time_is_before_jiffies(timeout_jiffies))
51*4882a593Smuzhiyun return -ETIMEDOUT;
52*4882a593Smuzhiyun msleep(1);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* push down the phy io line */
56*4882a593Smuzhiyun writel(0x0, data->membase + EMAC_MAC_MCMD_REG);
57*4882a593Smuzhiyun /* and read data */
58*4882a593Smuzhiyun value = readl(data->membase + EMAC_MAC_MRDD_REG);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun return value;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
sun4i_mdio_write(struct mii_bus * bus,int mii_id,int regnum,u16 value)63*4882a593Smuzhiyun static int sun4i_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
64*4882a593Smuzhiyun u16 value)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun struct sun4i_mdio_data *data = bus->priv;
67*4882a593Smuzhiyun unsigned long timeout_jiffies;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /* issue the phy address and reg */
70*4882a593Smuzhiyun writel((mii_id << 8) | regnum, data->membase + EMAC_MAC_MADR_REG);
71*4882a593Smuzhiyun /* pull up the phy io line */
72*4882a593Smuzhiyun writel(0x1, data->membase + EMAC_MAC_MCMD_REG);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* Wait read complete */
75*4882a593Smuzhiyun timeout_jiffies = jiffies + MDIO_TIMEOUT;
76*4882a593Smuzhiyun while (readl(data->membase + EMAC_MAC_MIND_REG) & 0x1) {
77*4882a593Smuzhiyun if (time_is_before_jiffies(timeout_jiffies))
78*4882a593Smuzhiyun return -ETIMEDOUT;
79*4882a593Smuzhiyun msleep(1);
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* push down the phy io line */
83*4882a593Smuzhiyun writel(0x0, data->membase + EMAC_MAC_MCMD_REG);
84*4882a593Smuzhiyun /* and write data */
85*4882a593Smuzhiyun writel(value, data->membase + EMAC_MAC_MWTD_REG);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun return 0;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
sun4i_mdio_probe(struct platform_device * pdev)90*4882a593Smuzhiyun static int sun4i_mdio_probe(struct platform_device *pdev)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun struct device_node *np = pdev->dev.of_node;
93*4882a593Smuzhiyun struct mii_bus *bus;
94*4882a593Smuzhiyun struct sun4i_mdio_data *data;
95*4882a593Smuzhiyun int ret;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun bus = mdiobus_alloc_size(sizeof(*data));
98*4882a593Smuzhiyun if (!bus)
99*4882a593Smuzhiyun return -ENOMEM;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun bus->name = "sun4i_mii_bus";
102*4882a593Smuzhiyun bus->read = &sun4i_mdio_read;
103*4882a593Smuzhiyun bus->write = &sun4i_mdio_write;
104*4882a593Smuzhiyun snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev));
105*4882a593Smuzhiyun bus->parent = &pdev->dev;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun data = bus->priv;
108*4882a593Smuzhiyun data->membase = devm_platform_ioremap_resource(pdev, 0);
109*4882a593Smuzhiyun if (IS_ERR(data->membase)) {
110*4882a593Smuzhiyun ret = PTR_ERR(data->membase);
111*4882a593Smuzhiyun goto err_out_free_mdiobus;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun data->regulator = devm_regulator_get(&pdev->dev, "phy");
115*4882a593Smuzhiyun if (IS_ERR(data->regulator)) {
116*4882a593Smuzhiyun if (PTR_ERR(data->regulator) == -EPROBE_DEFER) {
117*4882a593Smuzhiyun ret = -EPROBE_DEFER;
118*4882a593Smuzhiyun goto err_out_free_mdiobus;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun dev_info(&pdev->dev, "no regulator found\n");
122*4882a593Smuzhiyun data->regulator = NULL;
123*4882a593Smuzhiyun } else {
124*4882a593Smuzhiyun ret = regulator_enable(data->regulator);
125*4882a593Smuzhiyun if (ret)
126*4882a593Smuzhiyun goto err_out_free_mdiobus;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun ret = of_mdiobus_register(bus, np);
130*4882a593Smuzhiyun if (ret < 0)
131*4882a593Smuzhiyun goto err_out_disable_regulator;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun platform_set_drvdata(pdev, bus);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun return 0;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun err_out_disable_regulator:
138*4882a593Smuzhiyun if (data->regulator)
139*4882a593Smuzhiyun regulator_disable(data->regulator);
140*4882a593Smuzhiyun err_out_free_mdiobus:
141*4882a593Smuzhiyun mdiobus_free(bus);
142*4882a593Smuzhiyun return ret;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
sun4i_mdio_remove(struct platform_device * pdev)145*4882a593Smuzhiyun static int sun4i_mdio_remove(struct platform_device *pdev)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun struct mii_bus *bus = platform_get_drvdata(pdev);
148*4882a593Smuzhiyun struct sun4i_mdio_data *data = bus->priv;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun mdiobus_unregister(bus);
151*4882a593Smuzhiyun if (data->regulator)
152*4882a593Smuzhiyun regulator_disable(data->regulator);
153*4882a593Smuzhiyun mdiobus_free(bus);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun return 0;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun static const struct of_device_id sun4i_mdio_dt_ids[] = {
159*4882a593Smuzhiyun { .compatible = "allwinner,sun4i-a10-mdio" },
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun /* Deprecated */
162*4882a593Smuzhiyun { .compatible = "allwinner,sun4i-mdio" },
163*4882a593Smuzhiyun { }
164*4882a593Smuzhiyun };
165*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, sun4i_mdio_dt_ids);
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun static struct platform_driver sun4i_mdio_driver = {
168*4882a593Smuzhiyun .probe = sun4i_mdio_probe,
169*4882a593Smuzhiyun .remove = sun4i_mdio_remove,
170*4882a593Smuzhiyun .driver = {
171*4882a593Smuzhiyun .name = "sun4i-mdio",
172*4882a593Smuzhiyun .of_match_table = sun4i_mdio_dt_ids,
173*4882a593Smuzhiyun },
174*4882a593Smuzhiyun };
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun module_platform_driver(sun4i_mdio_driver);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun MODULE_DESCRIPTION("Allwinner EMAC MDIO interface driver");
179*4882a593Smuzhiyun MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
180*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
181