xref: /OK3568_Linux_fs/kernel/drivers/net/mdio/mdio-mux.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2011, 2012 Cavium, Inc.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/device.h>
7*4882a593Smuzhiyun #include <linux/mdio-mux.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/of_mdio.h>
10*4882a593Smuzhiyun #include <linux/phy.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define DRV_DESCRIPTION "MDIO bus multiplexer driver"
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun struct mdio_mux_child_bus;
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun struct mdio_mux_parent_bus {
18*4882a593Smuzhiyun 	struct mii_bus *mii_bus;
19*4882a593Smuzhiyun 	int current_child;
20*4882a593Smuzhiyun 	int parent_id;
21*4882a593Smuzhiyun 	void *switch_data;
22*4882a593Smuzhiyun 	int (*switch_fn)(int current_child, int desired_child, void *data);
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	/* List of our children linked through their next fields. */
25*4882a593Smuzhiyun 	struct mdio_mux_child_bus *children;
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun struct mdio_mux_child_bus {
29*4882a593Smuzhiyun 	struct mii_bus *mii_bus;
30*4882a593Smuzhiyun 	struct mdio_mux_parent_bus *parent;
31*4882a593Smuzhiyun 	struct mdio_mux_child_bus *next;
32*4882a593Smuzhiyun 	int bus_number;
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun /*
36*4882a593Smuzhiyun  * The parent bus' lock is used to order access to the switch_fn.
37*4882a593Smuzhiyun  */
mdio_mux_read(struct mii_bus * bus,int phy_id,int regnum)38*4882a593Smuzhiyun static int mdio_mux_read(struct mii_bus *bus, int phy_id, int regnum)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun 	struct mdio_mux_child_bus *cb = bus->priv;
41*4882a593Smuzhiyun 	struct mdio_mux_parent_bus *pb = cb->parent;
42*4882a593Smuzhiyun 	int r;
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	mutex_lock_nested(&pb->mii_bus->mdio_lock, MDIO_MUTEX_MUX);
45*4882a593Smuzhiyun 	r = pb->switch_fn(pb->current_child, cb->bus_number, pb->switch_data);
46*4882a593Smuzhiyun 	if (r)
47*4882a593Smuzhiyun 		goto out;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	pb->current_child = cb->bus_number;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	r = pb->mii_bus->read(pb->mii_bus, phy_id, regnum);
52*4882a593Smuzhiyun out:
53*4882a593Smuzhiyun 	mutex_unlock(&pb->mii_bus->mdio_lock);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	return r;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /*
59*4882a593Smuzhiyun  * The parent bus' lock is used to order access to the switch_fn.
60*4882a593Smuzhiyun  */
mdio_mux_write(struct mii_bus * bus,int phy_id,int regnum,u16 val)61*4882a593Smuzhiyun static int mdio_mux_write(struct mii_bus *bus, int phy_id,
62*4882a593Smuzhiyun 			  int regnum, u16 val)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun 	struct mdio_mux_child_bus *cb = bus->priv;
65*4882a593Smuzhiyun 	struct mdio_mux_parent_bus *pb = cb->parent;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	int r;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	mutex_lock_nested(&pb->mii_bus->mdio_lock, MDIO_MUTEX_MUX);
70*4882a593Smuzhiyun 	r = pb->switch_fn(pb->current_child, cb->bus_number, pb->switch_data);
71*4882a593Smuzhiyun 	if (r)
72*4882a593Smuzhiyun 		goto out;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	pb->current_child = cb->bus_number;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	r = pb->mii_bus->write(pb->mii_bus, phy_id, regnum, val);
77*4882a593Smuzhiyun out:
78*4882a593Smuzhiyun 	mutex_unlock(&pb->mii_bus->mdio_lock);
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	return r;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun static int parent_count;
84*4882a593Smuzhiyun 
mdio_mux_uninit_children(struct mdio_mux_parent_bus * pb)85*4882a593Smuzhiyun static void mdio_mux_uninit_children(struct mdio_mux_parent_bus *pb)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun 	struct mdio_mux_child_bus *cb = pb->children;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	while (cb) {
90*4882a593Smuzhiyun 		mdiobus_unregister(cb->mii_bus);
91*4882a593Smuzhiyun 		mdiobus_free(cb->mii_bus);
92*4882a593Smuzhiyun 		cb = cb->next;
93*4882a593Smuzhiyun 	}
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun 
mdio_mux_init(struct device * dev,struct device_node * mux_node,int (* switch_fn)(int cur,int desired,void * data),void ** mux_handle,void * data,struct mii_bus * mux_bus)96*4882a593Smuzhiyun int mdio_mux_init(struct device *dev,
97*4882a593Smuzhiyun 		  struct device_node *mux_node,
98*4882a593Smuzhiyun 		  int (*switch_fn)(int cur, int desired, void *data),
99*4882a593Smuzhiyun 		  void **mux_handle,
100*4882a593Smuzhiyun 		  void *data,
101*4882a593Smuzhiyun 		  struct mii_bus *mux_bus)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	struct device_node *parent_bus_node;
104*4882a593Smuzhiyun 	struct device_node *child_bus_node;
105*4882a593Smuzhiyun 	int r, ret_val;
106*4882a593Smuzhiyun 	struct mii_bus *parent_bus;
107*4882a593Smuzhiyun 	struct mdio_mux_parent_bus *pb;
108*4882a593Smuzhiyun 	struct mdio_mux_child_bus *cb;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (!mux_node)
111*4882a593Smuzhiyun 		return -ENODEV;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	if (!mux_bus) {
114*4882a593Smuzhiyun 		parent_bus_node = of_parse_phandle(mux_node,
115*4882a593Smuzhiyun 						   "mdio-parent-bus", 0);
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 		if (!parent_bus_node)
118*4882a593Smuzhiyun 			return -ENODEV;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 		parent_bus = of_mdio_find_bus(parent_bus_node);
121*4882a593Smuzhiyun 		if (!parent_bus) {
122*4882a593Smuzhiyun 			ret_val = -EPROBE_DEFER;
123*4882a593Smuzhiyun 			goto err_parent_bus;
124*4882a593Smuzhiyun 		}
125*4882a593Smuzhiyun 	} else {
126*4882a593Smuzhiyun 		parent_bus_node = NULL;
127*4882a593Smuzhiyun 		parent_bus = mux_bus;
128*4882a593Smuzhiyun 		get_device(&parent_bus->dev);
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	pb = devm_kzalloc(dev, sizeof(*pb), GFP_KERNEL);
132*4882a593Smuzhiyun 	if (!pb) {
133*4882a593Smuzhiyun 		ret_val = -ENOMEM;
134*4882a593Smuzhiyun 		goto err_pb_kz;
135*4882a593Smuzhiyun 	}
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	pb->switch_data = data;
138*4882a593Smuzhiyun 	pb->switch_fn = switch_fn;
139*4882a593Smuzhiyun 	pb->current_child = -1;
140*4882a593Smuzhiyun 	pb->parent_id = parent_count++;
141*4882a593Smuzhiyun 	pb->mii_bus = parent_bus;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	ret_val = -ENODEV;
144*4882a593Smuzhiyun 	for_each_available_child_of_node(mux_node, child_bus_node) {
145*4882a593Smuzhiyun 		int v;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 		r = of_property_read_u32(child_bus_node, "reg", &v);
148*4882a593Smuzhiyun 		if (r) {
149*4882a593Smuzhiyun 			dev_err(dev,
150*4882a593Smuzhiyun 				"Error: Failed to find reg for child %pOF\n",
151*4882a593Smuzhiyun 				child_bus_node);
152*4882a593Smuzhiyun 			continue;
153*4882a593Smuzhiyun 		}
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 		cb = devm_kzalloc(dev, sizeof(*cb), GFP_KERNEL);
156*4882a593Smuzhiyun 		if (!cb) {
157*4882a593Smuzhiyun 			ret_val = -ENOMEM;
158*4882a593Smuzhiyun 			goto err_loop;
159*4882a593Smuzhiyun 		}
160*4882a593Smuzhiyun 		cb->bus_number = v;
161*4882a593Smuzhiyun 		cb->parent = pb;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 		cb->mii_bus = mdiobus_alloc();
164*4882a593Smuzhiyun 		if (!cb->mii_bus) {
165*4882a593Smuzhiyun 			ret_val = -ENOMEM;
166*4882a593Smuzhiyun 			goto err_loop;
167*4882a593Smuzhiyun 		}
168*4882a593Smuzhiyun 		cb->mii_bus->priv = cb;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 		cb->mii_bus->name = "mdio_mux";
171*4882a593Smuzhiyun 		snprintf(cb->mii_bus->id, MII_BUS_ID_SIZE, "%x.%x",
172*4882a593Smuzhiyun 			 pb->parent_id, v);
173*4882a593Smuzhiyun 		cb->mii_bus->parent = dev;
174*4882a593Smuzhiyun 		cb->mii_bus->read = mdio_mux_read;
175*4882a593Smuzhiyun 		cb->mii_bus->write = mdio_mux_write;
176*4882a593Smuzhiyun 		r = of_mdiobus_register(cb->mii_bus, child_bus_node);
177*4882a593Smuzhiyun 		if (r) {
178*4882a593Smuzhiyun 			mdiobus_free(cb->mii_bus);
179*4882a593Smuzhiyun 			if (r == -EPROBE_DEFER) {
180*4882a593Smuzhiyun 				ret_val = r;
181*4882a593Smuzhiyun 				goto err_loop;
182*4882a593Smuzhiyun 			}
183*4882a593Smuzhiyun 			devm_kfree(dev, cb);
184*4882a593Smuzhiyun 			dev_err(dev,
185*4882a593Smuzhiyun 				"Error: Failed to register MDIO bus for child %pOF\n",
186*4882a593Smuzhiyun 				child_bus_node);
187*4882a593Smuzhiyun 		} else {
188*4882a593Smuzhiyun 			cb->next = pb->children;
189*4882a593Smuzhiyun 			pb->children = cb;
190*4882a593Smuzhiyun 		}
191*4882a593Smuzhiyun 	}
192*4882a593Smuzhiyun 	if (pb->children) {
193*4882a593Smuzhiyun 		*mux_handle = pb;
194*4882a593Smuzhiyun 		return 0;
195*4882a593Smuzhiyun 	}
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	dev_err(dev, "Error: No acceptable child buses found\n");
198*4882a593Smuzhiyun 	devm_kfree(dev, pb);
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun err_loop:
201*4882a593Smuzhiyun 	mdio_mux_uninit_children(pb);
202*4882a593Smuzhiyun 	of_node_put(child_bus_node);
203*4882a593Smuzhiyun err_pb_kz:
204*4882a593Smuzhiyun 	put_device(&parent_bus->dev);
205*4882a593Smuzhiyun err_parent_bus:
206*4882a593Smuzhiyun 	of_node_put(parent_bus_node);
207*4882a593Smuzhiyun 	return ret_val;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mdio_mux_init);
210*4882a593Smuzhiyun 
mdio_mux_uninit(void * mux_handle)211*4882a593Smuzhiyun void mdio_mux_uninit(void *mux_handle)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	struct mdio_mux_parent_bus *pb = mux_handle;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	mdio_mux_uninit_children(pb);
216*4882a593Smuzhiyun 	put_device(&pb->mii_bus->dev);
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mdio_mux_uninit);
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun MODULE_DESCRIPTION(DRV_DESCRIPTION);
221*4882a593Smuzhiyun MODULE_AUTHOR("David Daney");
222*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
223