1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4*4882a593Smuzhiyun * Copyright (C) 2018-2020 Linaro Ltd.
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/types.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "ipa.h"
12*4882a593Smuzhiyun #include "ipa_clock.h"
13*4882a593Smuzhiyun #include "ipa_uc.h"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun /**
16*4882a593Smuzhiyun * DOC: The IPA embedded microcontroller
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * The IPA incorporates a microcontroller that is able to do some additional
19*4882a593Smuzhiyun * handling/offloading of network activity. The current code makes
20*4882a593Smuzhiyun * essentially no use of the microcontroller, but it still requires some
21*4882a593Smuzhiyun * initialization. It needs to be notified in the event the AP crashes.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * The microcontroller can generate two interrupts to the AP. One interrupt
24*4882a593Smuzhiyun * is used to indicate that a response to a request from the AP is available.
25*4882a593Smuzhiyun * The other is used to notify the AP of the occurrence of an event. In
26*4882a593Smuzhiyun * addition, the AP can interrupt the microcontroller by writing a register.
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * A 128 byte block of structured memory within the IPA SRAM is used together
29*4882a593Smuzhiyun * with these interrupts to implement the communication interface between the
30*4882a593Smuzhiyun * AP and the IPA microcontroller. Each side writes data to the shared area
31*4882a593Smuzhiyun * before interrupting its peer, which will read the written data in response
32*4882a593Smuzhiyun * to the interrupt. Some information found in the shared area is currently
33*4882a593Smuzhiyun * unused. All remaining space in the shared area is reserved, and must not
34*4882a593Smuzhiyun * be read or written by the AP.
35*4882a593Smuzhiyun */
36*4882a593Smuzhiyun /* Supports hardware interface version 0x2000 */
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun /* Delay to allow a the microcontroller to save state when crashing */
39*4882a593Smuzhiyun #define IPA_SEND_DELAY 100 /* microseconds */
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /**
42*4882a593Smuzhiyun * struct ipa_uc_mem_area - AP/microcontroller shared memory area
43*4882a593Smuzhiyun * @command: command code (AP->microcontroller)
44*4882a593Smuzhiyun * @reserved0: reserved bytes; avoid reading or writing
45*4882a593Smuzhiyun * @command_param: low 32 bits of command parameter (AP->microcontroller)
46*4882a593Smuzhiyun * @command_param_hi: high 32 bits of command parameter (AP->microcontroller)
47*4882a593Smuzhiyun *
48*4882a593Smuzhiyun * @response: response code (microcontroller->AP)
49*4882a593Smuzhiyun * @reserved1: reserved bytes; avoid reading or writing
50*4882a593Smuzhiyun * @response_param: response parameter (microcontroller->AP)
51*4882a593Smuzhiyun *
52*4882a593Smuzhiyun * @event: event code (microcontroller->AP)
53*4882a593Smuzhiyun * @reserved2: reserved bytes; avoid reading or writing
54*4882a593Smuzhiyun * @event_param: event parameter (microcontroller->AP)
55*4882a593Smuzhiyun *
56*4882a593Smuzhiyun * @first_error_address: address of first error-source on SNOC
57*4882a593Smuzhiyun * @hw_state: state of hardware (including error type information)
58*4882a593Smuzhiyun * @warning_counter: counter of non-fatal hardware errors
59*4882a593Smuzhiyun * @reserved3: reserved bytes; avoid reading or writing
60*4882a593Smuzhiyun * @interface_version: hardware-reported interface version
61*4882a593Smuzhiyun * @reserved4: reserved bytes; avoid reading or writing
62*4882a593Smuzhiyun *
63*4882a593Smuzhiyun * A shared memory area at the base of IPA resident memory is used for
64*4882a593Smuzhiyun * communication with the microcontroller. The region is 128 bytes in
65*4882a593Smuzhiyun * size, but only the first 40 bytes (structured this way) are used.
66*4882a593Smuzhiyun */
67*4882a593Smuzhiyun struct ipa_uc_mem_area {
68*4882a593Smuzhiyun u8 command; /* enum ipa_uc_command */
69*4882a593Smuzhiyun u8 reserved0[3];
70*4882a593Smuzhiyun __le32 command_param;
71*4882a593Smuzhiyun __le32 command_param_hi;
72*4882a593Smuzhiyun u8 response; /* enum ipa_uc_response */
73*4882a593Smuzhiyun u8 reserved1[3];
74*4882a593Smuzhiyun __le32 response_param;
75*4882a593Smuzhiyun u8 event; /* enum ipa_uc_event */
76*4882a593Smuzhiyun u8 reserved2[3];
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun __le32 event_param;
79*4882a593Smuzhiyun __le32 first_error_address;
80*4882a593Smuzhiyun u8 hw_state;
81*4882a593Smuzhiyun u8 warning_counter;
82*4882a593Smuzhiyun __le16 reserved3;
83*4882a593Smuzhiyun __le16 interface_version;
84*4882a593Smuzhiyun __le16 reserved4;
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /** enum ipa_uc_command - commands from the AP to the microcontroller */
88*4882a593Smuzhiyun enum ipa_uc_command {
89*4882a593Smuzhiyun IPA_UC_COMMAND_NO_OP = 0,
90*4882a593Smuzhiyun IPA_UC_COMMAND_UPDATE_FLAGS = 1,
91*4882a593Smuzhiyun IPA_UC_COMMAND_DEBUG_RUN_TEST = 2,
92*4882a593Smuzhiyun IPA_UC_COMMAND_DEBUG_GET_INFO = 3,
93*4882a593Smuzhiyun IPA_UC_COMMAND_ERR_FATAL = 4,
94*4882a593Smuzhiyun IPA_UC_COMMAND_CLK_GATE = 5,
95*4882a593Smuzhiyun IPA_UC_COMMAND_CLK_UNGATE = 6,
96*4882a593Smuzhiyun IPA_UC_COMMAND_MEMCPY = 7,
97*4882a593Smuzhiyun IPA_UC_COMMAND_RESET_PIPE = 8,
98*4882a593Smuzhiyun IPA_UC_COMMAND_REG_WRITE = 9,
99*4882a593Smuzhiyun IPA_UC_COMMAND_GSI_CH_EMPTY = 10,
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun /** enum ipa_uc_response - microcontroller response codes */
103*4882a593Smuzhiyun enum ipa_uc_response {
104*4882a593Smuzhiyun IPA_UC_RESPONSE_NO_OP = 0,
105*4882a593Smuzhiyun IPA_UC_RESPONSE_INIT_COMPLETED = 1,
106*4882a593Smuzhiyun IPA_UC_RESPONSE_CMD_COMPLETED = 2,
107*4882a593Smuzhiyun IPA_UC_RESPONSE_DEBUG_GET_INFO = 3,
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /** enum ipa_uc_event - common cpu events reported by the microcontroller */
111*4882a593Smuzhiyun enum ipa_uc_event {
112*4882a593Smuzhiyun IPA_UC_EVENT_NO_OP = 0,
113*4882a593Smuzhiyun IPA_UC_EVENT_ERROR = 1,
114*4882a593Smuzhiyun IPA_UC_EVENT_LOG_INFO = 2,
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun
ipa_uc_shared(struct ipa * ipa)117*4882a593Smuzhiyun static struct ipa_uc_mem_area *ipa_uc_shared(struct ipa *ipa)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun u32 offset = ipa->mem_offset + ipa->mem[IPA_MEM_UC_SHARED].offset;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun return ipa->mem_virt + offset;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* Microcontroller event IPA interrupt handler */
ipa_uc_event_handler(struct ipa * ipa,enum ipa_irq_id irq_id)125*4882a593Smuzhiyun static void ipa_uc_event_handler(struct ipa *ipa, enum ipa_irq_id irq_id)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
128*4882a593Smuzhiyun struct device *dev = &ipa->pdev->dev;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun if (shared->event == IPA_UC_EVENT_ERROR)
131*4882a593Smuzhiyun dev_err(dev, "microcontroller error event\n");
132*4882a593Smuzhiyun else
133*4882a593Smuzhiyun dev_err(dev, "unsupported microcontroller event %hhu\n",
134*4882a593Smuzhiyun shared->event);
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /* Microcontroller response IPA interrupt handler */
ipa_uc_response_hdlr(struct ipa * ipa,enum ipa_irq_id irq_id)138*4882a593Smuzhiyun static void ipa_uc_response_hdlr(struct ipa *ipa, enum ipa_irq_id irq_id)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun /* An INIT_COMPLETED response message is sent to the AP by the
143*4882a593Smuzhiyun * microcontroller when it is operational. Other than this, the AP
144*4882a593Smuzhiyun * should only receive responses from the microcontroller when it has
145*4882a593Smuzhiyun * sent it a request message.
146*4882a593Smuzhiyun *
147*4882a593Smuzhiyun * We can drop the clock reference taken in ipa_uc_setup() once we
148*4882a593Smuzhiyun * know the microcontroller has finished its initialization.
149*4882a593Smuzhiyun */
150*4882a593Smuzhiyun switch (shared->response) {
151*4882a593Smuzhiyun case IPA_UC_RESPONSE_INIT_COMPLETED:
152*4882a593Smuzhiyun ipa->uc_loaded = true;
153*4882a593Smuzhiyun ipa_clock_put(ipa);
154*4882a593Smuzhiyun break;
155*4882a593Smuzhiyun default:
156*4882a593Smuzhiyun dev_warn(&ipa->pdev->dev,
157*4882a593Smuzhiyun "unsupported microcontroller response %hhu\n",
158*4882a593Smuzhiyun shared->response);
159*4882a593Smuzhiyun break;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /* ipa_uc_setup() - Set up the microcontroller */
ipa_uc_setup(struct ipa * ipa)164*4882a593Smuzhiyun void ipa_uc_setup(struct ipa *ipa)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun /* The microcontroller needs the IPA clock running until it has
167*4882a593Smuzhiyun * completed its initialization. It signals this by sending an
168*4882a593Smuzhiyun * INIT_COMPLETED response message to the AP. This could occur after
169*4882a593Smuzhiyun * we have finished doing the rest of the IPA initialization, so we
170*4882a593Smuzhiyun * need to take an extra "proxy" reference, and hold it until we've
171*4882a593Smuzhiyun * received that signal. (This reference is dropped in
172*4882a593Smuzhiyun * ipa_uc_response_hdlr(), above.)
173*4882a593Smuzhiyun */
174*4882a593Smuzhiyun ipa_clock_get(ipa);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun ipa->uc_loaded = false;
177*4882a593Smuzhiyun ipa_interrupt_add(ipa->interrupt, IPA_IRQ_UC_0, ipa_uc_event_handler);
178*4882a593Smuzhiyun ipa_interrupt_add(ipa->interrupt, IPA_IRQ_UC_1, ipa_uc_response_hdlr);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /* Inverse of ipa_uc_setup() */
ipa_uc_teardown(struct ipa * ipa)182*4882a593Smuzhiyun void ipa_uc_teardown(struct ipa *ipa)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_1);
185*4882a593Smuzhiyun ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_0);
186*4882a593Smuzhiyun if (!ipa->uc_loaded)
187*4882a593Smuzhiyun ipa_clock_put(ipa);
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /* Send a command to the microcontroller */
send_uc_command(struct ipa * ipa,u32 command,u32 command_param)191*4882a593Smuzhiyun static void send_uc_command(struct ipa *ipa, u32 command, u32 command_param)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun shared->command = command;
196*4882a593Smuzhiyun shared->command_param = cpu_to_le32(command_param);
197*4882a593Smuzhiyun shared->command_param_hi = 0;
198*4882a593Smuzhiyun shared->response = 0;
199*4882a593Smuzhiyun shared->response_param = 0;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun iowrite32(1, ipa->reg_virt + IPA_REG_IRQ_UC_OFFSET);
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /* Tell the microcontroller the AP is shutting down */
ipa_uc_panic_notifier(struct ipa * ipa)205*4882a593Smuzhiyun void ipa_uc_panic_notifier(struct ipa *ipa)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun if (!ipa->uc_loaded)
208*4882a593Smuzhiyun return;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun send_uc_command(ipa, IPA_UC_COMMAND_ERR_FATAL, 0);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun /* give uc enough time to save state */
213*4882a593Smuzhiyun udelay(IPA_SEND_DELAY);
214*4882a593Smuzhiyun }
215