xref: /OK3568_Linux_fs/kernel/drivers/net/ipa/ipa_data-sdm845.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun 
3*4882a593Smuzhiyun /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4*4882a593Smuzhiyun  * Copyright (C) 2019-2020 Linaro Ltd.
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/log2.h>
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include "gsi.h"
10*4882a593Smuzhiyun #include "ipa_data.h"
11*4882a593Smuzhiyun #include "ipa_endpoint.h"
12*4882a593Smuzhiyun #include "ipa_mem.h"
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /* Endpoint configuration for the SDM845 SoC. */
15*4882a593Smuzhiyun static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
16*4882a593Smuzhiyun 	[IPA_ENDPOINT_AP_COMMAND_TX] = {
17*4882a593Smuzhiyun 		.ee_id		= GSI_EE_AP,
18*4882a593Smuzhiyun 		.channel_id	= 4,
19*4882a593Smuzhiyun 		.endpoint_id	= 5,
20*4882a593Smuzhiyun 		.toward_ipa	= true,
21*4882a593Smuzhiyun 		.channel = {
22*4882a593Smuzhiyun 			.tre_count	= 512,
23*4882a593Smuzhiyun 			.event_count	= 256,
24*4882a593Smuzhiyun 			.tlv_count	= 20,
25*4882a593Smuzhiyun 		},
26*4882a593Smuzhiyun 		.endpoint = {
27*4882a593Smuzhiyun 			.seq_type	= IPA_SEQ_DMA_ONLY,
28*4882a593Smuzhiyun 			.config = {
29*4882a593Smuzhiyun 				.dma_mode	= true,
30*4882a593Smuzhiyun 				.dma_endpoint	= IPA_ENDPOINT_AP_LAN_RX,
31*4882a593Smuzhiyun 			},
32*4882a593Smuzhiyun 		},
33*4882a593Smuzhiyun 	},
34*4882a593Smuzhiyun 	[IPA_ENDPOINT_AP_LAN_RX] = {
35*4882a593Smuzhiyun 		.ee_id		= GSI_EE_AP,
36*4882a593Smuzhiyun 		.channel_id	= 5,
37*4882a593Smuzhiyun 		.endpoint_id	= 9,
38*4882a593Smuzhiyun 		.toward_ipa	= false,
39*4882a593Smuzhiyun 		.channel = {
40*4882a593Smuzhiyun 			.tre_count	= 256,
41*4882a593Smuzhiyun 			.event_count	= 256,
42*4882a593Smuzhiyun 			.tlv_count	= 8,
43*4882a593Smuzhiyun 		},
44*4882a593Smuzhiyun 		.endpoint = {
45*4882a593Smuzhiyun 			.seq_type	= IPA_SEQ_INVALID,
46*4882a593Smuzhiyun 			.config = {
47*4882a593Smuzhiyun 				.aggregation	= true,
48*4882a593Smuzhiyun 				.status_enable	= true,
49*4882a593Smuzhiyun 				.rx = {
50*4882a593Smuzhiyun 					.pad_align	= ilog2(sizeof(u32)),
51*4882a593Smuzhiyun 				},
52*4882a593Smuzhiyun 			},
53*4882a593Smuzhiyun 		},
54*4882a593Smuzhiyun 	},
55*4882a593Smuzhiyun 	[IPA_ENDPOINT_AP_MODEM_TX] = {
56*4882a593Smuzhiyun 		.ee_id		= GSI_EE_AP,
57*4882a593Smuzhiyun 		.channel_id	= 3,
58*4882a593Smuzhiyun 		.endpoint_id	= 2,
59*4882a593Smuzhiyun 		.toward_ipa	= true,
60*4882a593Smuzhiyun 		.channel = {
61*4882a593Smuzhiyun 			.tre_count	= 512,
62*4882a593Smuzhiyun 			.event_count	= 512,
63*4882a593Smuzhiyun 			.tlv_count	= 16,
64*4882a593Smuzhiyun 		},
65*4882a593Smuzhiyun 		.endpoint = {
66*4882a593Smuzhiyun 			.filter_support	= true,
67*4882a593Smuzhiyun 			.seq_type	=
68*4882a593Smuzhiyun 				IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
69*4882a593Smuzhiyun 			.config = {
70*4882a593Smuzhiyun 				.checksum	= true,
71*4882a593Smuzhiyun 				.qmap		= true,
72*4882a593Smuzhiyun 				.status_enable	= true,
73*4882a593Smuzhiyun 				.tx = {
74*4882a593Smuzhiyun 					.status_endpoint =
75*4882a593Smuzhiyun 						IPA_ENDPOINT_MODEM_AP_RX,
76*4882a593Smuzhiyun 				},
77*4882a593Smuzhiyun 			},
78*4882a593Smuzhiyun 		},
79*4882a593Smuzhiyun 	},
80*4882a593Smuzhiyun 	[IPA_ENDPOINT_AP_MODEM_RX] = {
81*4882a593Smuzhiyun 		.ee_id		= GSI_EE_AP,
82*4882a593Smuzhiyun 		.channel_id	= 6,
83*4882a593Smuzhiyun 		.endpoint_id	= 10,
84*4882a593Smuzhiyun 		.toward_ipa	= false,
85*4882a593Smuzhiyun 		.channel = {
86*4882a593Smuzhiyun 			.tre_count	= 256,
87*4882a593Smuzhiyun 			.event_count	= 256,
88*4882a593Smuzhiyun 			.tlv_count	= 8,
89*4882a593Smuzhiyun 		},
90*4882a593Smuzhiyun 		.endpoint = {
91*4882a593Smuzhiyun 			.seq_type	= IPA_SEQ_INVALID,
92*4882a593Smuzhiyun 			.config = {
93*4882a593Smuzhiyun 				.checksum	= true,
94*4882a593Smuzhiyun 				.qmap		= true,
95*4882a593Smuzhiyun 				.aggregation	= true,
96*4882a593Smuzhiyun 				.rx = {
97*4882a593Smuzhiyun 					.aggr_close_eof	= true,
98*4882a593Smuzhiyun 				},
99*4882a593Smuzhiyun 			},
100*4882a593Smuzhiyun 		},
101*4882a593Smuzhiyun 	},
102*4882a593Smuzhiyun 	[IPA_ENDPOINT_MODEM_COMMAND_TX] = {
103*4882a593Smuzhiyun 		.ee_id		= GSI_EE_MODEM,
104*4882a593Smuzhiyun 		.channel_id	= 1,
105*4882a593Smuzhiyun 		.endpoint_id	= 4,
106*4882a593Smuzhiyun 		.toward_ipa	= true,
107*4882a593Smuzhiyun 	},
108*4882a593Smuzhiyun 	[IPA_ENDPOINT_MODEM_LAN_TX] = {
109*4882a593Smuzhiyun 		.ee_id		= GSI_EE_MODEM,
110*4882a593Smuzhiyun 		.channel_id	= 0,
111*4882a593Smuzhiyun 		.endpoint_id	= 3,
112*4882a593Smuzhiyun 		.toward_ipa	= true,
113*4882a593Smuzhiyun 		.endpoint = {
114*4882a593Smuzhiyun 			.filter_support	= true,
115*4882a593Smuzhiyun 		},
116*4882a593Smuzhiyun 	},
117*4882a593Smuzhiyun 	[IPA_ENDPOINT_MODEM_LAN_RX] = {
118*4882a593Smuzhiyun 		.ee_id		= GSI_EE_MODEM,
119*4882a593Smuzhiyun 		.channel_id	= 3,
120*4882a593Smuzhiyun 		.endpoint_id	= 13,
121*4882a593Smuzhiyun 		.toward_ipa	= false,
122*4882a593Smuzhiyun 	},
123*4882a593Smuzhiyun 	[IPA_ENDPOINT_MODEM_AP_TX] = {
124*4882a593Smuzhiyun 		.ee_id		= GSI_EE_MODEM,
125*4882a593Smuzhiyun 		.channel_id	= 4,
126*4882a593Smuzhiyun 		.endpoint_id	= 6,
127*4882a593Smuzhiyun 		.toward_ipa	= true,
128*4882a593Smuzhiyun 		.endpoint = {
129*4882a593Smuzhiyun 			.filter_support	= true,
130*4882a593Smuzhiyun 		},
131*4882a593Smuzhiyun 	},
132*4882a593Smuzhiyun 	[IPA_ENDPOINT_MODEM_AP_RX] = {
133*4882a593Smuzhiyun 		.ee_id		= GSI_EE_MODEM,
134*4882a593Smuzhiyun 		.channel_id	= 2,
135*4882a593Smuzhiyun 		.endpoint_id	= 12,
136*4882a593Smuzhiyun 		.toward_ipa	= false,
137*4882a593Smuzhiyun 	},
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun /* For the SDM845, resource groups are allocated this way:
141*4882a593Smuzhiyun  *   group 0:	LWA_DL
142*4882a593Smuzhiyun  *   group 1:	UL_DL
143*4882a593Smuzhiyun  */
144*4882a593Smuzhiyun static const struct ipa_resource_src ipa_resource_src[] = {
145*4882a593Smuzhiyun 	{
146*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
147*4882a593Smuzhiyun 		.limits[0] = {
148*4882a593Smuzhiyun 			.min = 1,
149*4882a593Smuzhiyun 			.max = 63,
150*4882a593Smuzhiyun 		},
151*4882a593Smuzhiyun 		.limits[1] = {
152*4882a593Smuzhiyun 			.min = 1,
153*4882a593Smuzhiyun 			.max = 63,
154*4882a593Smuzhiyun 		},
155*4882a593Smuzhiyun 	},
156*4882a593Smuzhiyun 	{
157*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
158*4882a593Smuzhiyun 		.limits[0] = {
159*4882a593Smuzhiyun 			.min = 10,
160*4882a593Smuzhiyun 			.max = 10,
161*4882a593Smuzhiyun 		},
162*4882a593Smuzhiyun 		.limits[1] = {
163*4882a593Smuzhiyun 			.min = 10,
164*4882a593Smuzhiyun 			.max = 10,
165*4882a593Smuzhiyun 		},
166*4882a593Smuzhiyun 	},
167*4882a593Smuzhiyun 	{
168*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
169*4882a593Smuzhiyun 		.limits[0] = {
170*4882a593Smuzhiyun 			.min = 12,
171*4882a593Smuzhiyun 			.max = 12,
172*4882a593Smuzhiyun 		},
173*4882a593Smuzhiyun 		.limits[1] = {
174*4882a593Smuzhiyun 			.min = 14,
175*4882a593Smuzhiyun 			.max = 14,
176*4882a593Smuzhiyun 		},
177*4882a593Smuzhiyun 	},
178*4882a593Smuzhiyun 	{
179*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
180*4882a593Smuzhiyun 		.limits[0] = {
181*4882a593Smuzhiyun 			.min = 0,
182*4882a593Smuzhiyun 			.max = 63,
183*4882a593Smuzhiyun 		},
184*4882a593Smuzhiyun 		.limits[1] = {
185*4882a593Smuzhiyun 			.min = 0,
186*4882a593Smuzhiyun 			.max = 63,
187*4882a593Smuzhiyun 		},
188*4882a593Smuzhiyun 	},
189*4882a593Smuzhiyun 	{
190*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
191*4882a593Smuzhiyun 		.limits[0] = {
192*4882a593Smuzhiyun 			.min = 14,
193*4882a593Smuzhiyun 			.max = 14,
194*4882a593Smuzhiyun 		},
195*4882a593Smuzhiyun 		.limits[1] = {
196*4882a593Smuzhiyun 			.min = 20,
197*4882a593Smuzhiyun 			.max = 20,
198*4882a593Smuzhiyun 		},
199*4882a593Smuzhiyun 	},
200*4882a593Smuzhiyun };
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun static const struct ipa_resource_dst ipa_resource_dst[] = {
203*4882a593Smuzhiyun 	{
204*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
205*4882a593Smuzhiyun 		.limits[0] = {
206*4882a593Smuzhiyun 			.min = 4,
207*4882a593Smuzhiyun 			.max = 4,
208*4882a593Smuzhiyun 		},
209*4882a593Smuzhiyun 		.limits[1] = {
210*4882a593Smuzhiyun 			.min = 4,
211*4882a593Smuzhiyun 			.max = 4,
212*4882a593Smuzhiyun 		},
213*4882a593Smuzhiyun 	},
214*4882a593Smuzhiyun 	{
215*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_DST_DPS_DMARS,
216*4882a593Smuzhiyun 		.limits[0] = {
217*4882a593Smuzhiyun 			.min = 2,
218*4882a593Smuzhiyun 			.max = 63,
219*4882a593Smuzhiyun 		},
220*4882a593Smuzhiyun 		.limits[1] = {
221*4882a593Smuzhiyun 			.min = 1,
222*4882a593Smuzhiyun 			.max = 63,
223*4882a593Smuzhiyun 		},
224*4882a593Smuzhiyun 	},
225*4882a593Smuzhiyun };
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun /* Resource configuration for the SDM845 SoC. */
228*4882a593Smuzhiyun static const struct ipa_resource_data ipa_resource_data = {
229*4882a593Smuzhiyun 	.resource_src_count	= ARRAY_SIZE(ipa_resource_src),
230*4882a593Smuzhiyun 	.resource_src		= ipa_resource_src,
231*4882a593Smuzhiyun 	.resource_dst_count	= ARRAY_SIZE(ipa_resource_dst),
232*4882a593Smuzhiyun 	.resource_dst		= ipa_resource_dst,
233*4882a593Smuzhiyun };
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun /* IPA-resident memory region configuration for the SDM845 SoC. */
236*4882a593Smuzhiyun static const struct ipa_mem ipa_mem_local_data[] = {
237*4882a593Smuzhiyun 	[IPA_MEM_UC_SHARED] = {
238*4882a593Smuzhiyun 		.offset		= 0x0000,
239*4882a593Smuzhiyun 		.size		= 0x0080,
240*4882a593Smuzhiyun 		.canary_count	= 0,
241*4882a593Smuzhiyun 	},
242*4882a593Smuzhiyun 	[IPA_MEM_UC_INFO] = {
243*4882a593Smuzhiyun 		.offset		= 0x0080,
244*4882a593Smuzhiyun 		.size		= 0x0200,
245*4882a593Smuzhiyun 		.canary_count	= 0,
246*4882a593Smuzhiyun 	},
247*4882a593Smuzhiyun 	[IPA_MEM_V4_FILTER_HASHED] = {
248*4882a593Smuzhiyun 		.offset		= 0x0288,
249*4882a593Smuzhiyun 		.size		= 0x0078,
250*4882a593Smuzhiyun 		.canary_count	= 2,
251*4882a593Smuzhiyun 	},
252*4882a593Smuzhiyun 	[IPA_MEM_V4_FILTER] = {
253*4882a593Smuzhiyun 		.offset		= 0x0308,
254*4882a593Smuzhiyun 		.size		= 0x0078,
255*4882a593Smuzhiyun 		.canary_count	= 2,
256*4882a593Smuzhiyun 	},
257*4882a593Smuzhiyun 	[IPA_MEM_V6_FILTER_HASHED] = {
258*4882a593Smuzhiyun 		.offset		= 0x0388,
259*4882a593Smuzhiyun 		.size		= 0x0078,
260*4882a593Smuzhiyun 		.canary_count	= 2,
261*4882a593Smuzhiyun 	},
262*4882a593Smuzhiyun 	[IPA_MEM_V6_FILTER] = {
263*4882a593Smuzhiyun 		.offset		= 0x0408,
264*4882a593Smuzhiyun 		.size		= 0x0078,
265*4882a593Smuzhiyun 		.canary_count	= 2,
266*4882a593Smuzhiyun 	},
267*4882a593Smuzhiyun 	[IPA_MEM_V4_ROUTE_HASHED] = {
268*4882a593Smuzhiyun 		.offset		= 0x0488,
269*4882a593Smuzhiyun 		.size		= 0x0078,
270*4882a593Smuzhiyun 		.canary_count	= 2,
271*4882a593Smuzhiyun 	},
272*4882a593Smuzhiyun 	[IPA_MEM_V4_ROUTE] = {
273*4882a593Smuzhiyun 		.offset		= 0x0508,
274*4882a593Smuzhiyun 		.size		= 0x0078,
275*4882a593Smuzhiyun 		.canary_count	= 2,
276*4882a593Smuzhiyun 	},
277*4882a593Smuzhiyun 	[IPA_MEM_V6_ROUTE_HASHED] = {
278*4882a593Smuzhiyun 		.offset		= 0x0588,
279*4882a593Smuzhiyun 		.size		= 0x0078,
280*4882a593Smuzhiyun 		.canary_count	= 2,
281*4882a593Smuzhiyun 	},
282*4882a593Smuzhiyun 	[IPA_MEM_V6_ROUTE] = {
283*4882a593Smuzhiyun 		.offset		= 0x0608,
284*4882a593Smuzhiyun 		.size		= 0x0078,
285*4882a593Smuzhiyun 		.canary_count	= 2,
286*4882a593Smuzhiyun 	},
287*4882a593Smuzhiyun 	[IPA_MEM_MODEM_HEADER] = {
288*4882a593Smuzhiyun 		.offset		= 0x0688,
289*4882a593Smuzhiyun 		.size		= 0x0140,
290*4882a593Smuzhiyun 		.canary_count	= 2,
291*4882a593Smuzhiyun 	},
292*4882a593Smuzhiyun 	[IPA_MEM_AP_HEADER] = {
293*4882a593Smuzhiyun 		.offset		= 0x07c8,
294*4882a593Smuzhiyun 		.size		= 0x0000,
295*4882a593Smuzhiyun 		.canary_count	= 0,
296*4882a593Smuzhiyun 	},
297*4882a593Smuzhiyun 	[IPA_MEM_MODEM_PROC_CTX] = {
298*4882a593Smuzhiyun 		.offset		= 0x07d0,
299*4882a593Smuzhiyun 		.size		= 0x0200,
300*4882a593Smuzhiyun 		.canary_count	= 2,
301*4882a593Smuzhiyun 	},
302*4882a593Smuzhiyun 	[IPA_MEM_AP_PROC_CTX] = {
303*4882a593Smuzhiyun 		.offset		= 0x09d0,
304*4882a593Smuzhiyun 		.size		= 0x0200,
305*4882a593Smuzhiyun 		.canary_count	= 0,
306*4882a593Smuzhiyun 	},
307*4882a593Smuzhiyun 	[IPA_MEM_MODEM] = {
308*4882a593Smuzhiyun 		.offset		= 0x0bd8,
309*4882a593Smuzhiyun 		.size		= 0x1024,
310*4882a593Smuzhiyun 		.canary_count	= 0,
311*4882a593Smuzhiyun 	},
312*4882a593Smuzhiyun 	[IPA_MEM_UC_EVENT_RING] = {
313*4882a593Smuzhiyun 		.offset		= 0x1c00,
314*4882a593Smuzhiyun 		.size		= 0x0400,
315*4882a593Smuzhiyun 		.canary_count	= 1,
316*4882a593Smuzhiyun 	},
317*4882a593Smuzhiyun };
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun static struct ipa_mem_data ipa_mem_data = {
320*4882a593Smuzhiyun 	.local_count	= ARRAY_SIZE(ipa_mem_local_data),
321*4882a593Smuzhiyun 	.local		= ipa_mem_local_data,
322*4882a593Smuzhiyun 	.imem_addr	= 0x146bd000,
323*4882a593Smuzhiyun 	.imem_size	= 0x00002000,
324*4882a593Smuzhiyun 	.smem_id	= 497,
325*4882a593Smuzhiyun 	.smem_size	= 0x00002000,
326*4882a593Smuzhiyun };
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun /* Configuration data for the SDM845 SoC. */
329*4882a593Smuzhiyun const struct ipa_data ipa_data_sdm845 = {
330*4882a593Smuzhiyun 	.version	= IPA_VERSION_3_5_1,
331*4882a593Smuzhiyun 	.endpoint_count	= ARRAY_SIZE(ipa_gsi_endpoint_data),
332*4882a593Smuzhiyun 	.endpoint_data	= ipa_gsi_endpoint_data,
333*4882a593Smuzhiyun 	.resource_data	= &ipa_resource_data,
334*4882a593Smuzhiyun 	.mem_data	= &ipa_mem_data,
335*4882a593Smuzhiyun };
336