xref: /OK3568_Linux_fs/kernel/drivers/net/ipa/ipa_data-sc7180.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun 
3*4882a593Smuzhiyun /* Copyright (C) 2019-2020 Linaro Ltd. */
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun #include <linux/log2.h>
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include "gsi.h"
8*4882a593Smuzhiyun #include "ipa_data.h"
9*4882a593Smuzhiyun #include "ipa_endpoint.h"
10*4882a593Smuzhiyun #include "ipa_mem.h"
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun /* Endpoint configuration for the SC7180 SoC. */
13*4882a593Smuzhiyun static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
14*4882a593Smuzhiyun 	[IPA_ENDPOINT_AP_COMMAND_TX] = {
15*4882a593Smuzhiyun 		.ee_id		= GSI_EE_AP,
16*4882a593Smuzhiyun 		.channel_id	= 1,
17*4882a593Smuzhiyun 		.endpoint_id	= 6,
18*4882a593Smuzhiyun 		.toward_ipa	= true,
19*4882a593Smuzhiyun 		.channel = {
20*4882a593Smuzhiyun 			.tre_count	= 256,
21*4882a593Smuzhiyun 			.event_count	= 256,
22*4882a593Smuzhiyun 			.tlv_count	= 20,
23*4882a593Smuzhiyun 		},
24*4882a593Smuzhiyun 		.endpoint = {
25*4882a593Smuzhiyun 			.seq_type	= IPA_SEQ_DMA_ONLY,
26*4882a593Smuzhiyun 			.config = {
27*4882a593Smuzhiyun 				.dma_mode	= true,
28*4882a593Smuzhiyun 				.dma_endpoint	= IPA_ENDPOINT_AP_LAN_RX,
29*4882a593Smuzhiyun 			},
30*4882a593Smuzhiyun 		},
31*4882a593Smuzhiyun 	},
32*4882a593Smuzhiyun 	[IPA_ENDPOINT_AP_LAN_RX] = {
33*4882a593Smuzhiyun 		.ee_id		= GSI_EE_AP,
34*4882a593Smuzhiyun 		.channel_id	= 2,
35*4882a593Smuzhiyun 		.endpoint_id	= 8,
36*4882a593Smuzhiyun 		.toward_ipa	= false,
37*4882a593Smuzhiyun 		.channel = {
38*4882a593Smuzhiyun 			.tre_count	= 256,
39*4882a593Smuzhiyun 			.event_count	= 256,
40*4882a593Smuzhiyun 			.tlv_count	= 6,
41*4882a593Smuzhiyun 		},
42*4882a593Smuzhiyun 		.endpoint = {
43*4882a593Smuzhiyun 			.seq_type	= IPA_SEQ_INVALID,
44*4882a593Smuzhiyun 			.config = {
45*4882a593Smuzhiyun 				.aggregation	= true,
46*4882a593Smuzhiyun 				.status_enable	= true,
47*4882a593Smuzhiyun 				.rx = {
48*4882a593Smuzhiyun 					.pad_align	= ilog2(sizeof(u32)),
49*4882a593Smuzhiyun 				},
50*4882a593Smuzhiyun 			},
51*4882a593Smuzhiyun 		},
52*4882a593Smuzhiyun 	},
53*4882a593Smuzhiyun 	[IPA_ENDPOINT_AP_MODEM_TX] = {
54*4882a593Smuzhiyun 		.ee_id		= GSI_EE_AP,
55*4882a593Smuzhiyun 		.channel_id	= 0,
56*4882a593Smuzhiyun 		.endpoint_id	= 1,
57*4882a593Smuzhiyun 		.toward_ipa	= true,
58*4882a593Smuzhiyun 		.channel = {
59*4882a593Smuzhiyun 			.tre_count	= 512,
60*4882a593Smuzhiyun 			.event_count	= 512,
61*4882a593Smuzhiyun 			.tlv_count	= 8,
62*4882a593Smuzhiyun 		},
63*4882a593Smuzhiyun 		.endpoint = {
64*4882a593Smuzhiyun 			.filter_support	= true,
65*4882a593Smuzhiyun 			.seq_type	=
66*4882a593Smuzhiyun 				IPA_SEQ_PKT_PROCESS_NO_DEC_NO_UCP_DMAP,
67*4882a593Smuzhiyun 			.config = {
68*4882a593Smuzhiyun 				.checksum	= true,
69*4882a593Smuzhiyun 				.qmap		= true,
70*4882a593Smuzhiyun 				.status_enable	= true,
71*4882a593Smuzhiyun 				.tx = {
72*4882a593Smuzhiyun 					.status_endpoint =
73*4882a593Smuzhiyun 						IPA_ENDPOINT_MODEM_AP_RX,
74*4882a593Smuzhiyun 				},
75*4882a593Smuzhiyun 			},
76*4882a593Smuzhiyun 		},
77*4882a593Smuzhiyun 	},
78*4882a593Smuzhiyun 	[IPA_ENDPOINT_AP_MODEM_RX] = {
79*4882a593Smuzhiyun 		.ee_id		= GSI_EE_AP,
80*4882a593Smuzhiyun 		.channel_id	= 3,
81*4882a593Smuzhiyun 		.endpoint_id	= 9,
82*4882a593Smuzhiyun 		.toward_ipa	= false,
83*4882a593Smuzhiyun 		.channel = {
84*4882a593Smuzhiyun 			.tre_count	= 256,
85*4882a593Smuzhiyun 			.event_count	= 256,
86*4882a593Smuzhiyun 			.tlv_count	= 6,
87*4882a593Smuzhiyun 		},
88*4882a593Smuzhiyun 		.endpoint = {
89*4882a593Smuzhiyun 			.seq_type	= IPA_SEQ_INVALID,
90*4882a593Smuzhiyun 			.config = {
91*4882a593Smuzhiyun 				.checksum	= true,
92*4882a593Smuzhiyun 				.qmap		= true,
93*4882a593Smuzhiyun 				.aggregation	= true,
94*4882a593Smuzhiyun 				.rx = {
95*4882a593Smuzhiyun 					.aggr_close_eof	= true,
96*4882a593Smuzhiyun 				},
97*4882a593Smuzhiyun 			},
98*4882a593Smuzhiyun 		},
99*4882a593Smuzhiyun 	},
100*4882a593Smuzhiyun 	[IPA_ENDPOINT_MODEM_COMMAND_TX] = {
101*4882a593Smuzhiyun 		.ee_id		= GSI_EE_MODEM,
102*4882a593Smuzhiyun 		.channel_id	= 1,
103*4882a593Smuzhiyun 		.endpoint_id	= 5,
104*4882a593Smuzhiyun 		.toward_ipa	= true,
105*4882a593Smuzhiyun 	},
106*4882a593Smuzhiyun 	[IPA_ENDPOINT_MODEM_LAN_RX] = {
107*4882a593Smuzhiyun 		.ee_id		= GSI_EE_MODEM,
108*4882a593Smuzhiyun 		.channel_id	= 3,
109*4882a593Smuzhiyun 		.endpoint_id	= 11,
110*4882a593Smuzhiyun 		.toward_ipa	= false,
111*4882a593Smuzhiyun 	},
112*4882a593Smuzhiyun 	[IPA_ENDPOINT_MODEM_AP_TX] = {
113*4882a593Smuzhiyun 		.ee_id		= GSI_EE_MODEM,
114*4882a593Smuzhiyun 		.channel_id	= 0,
115*4882a593Smuzhiyun 		.endpoint_id	= 4,
116*4882a593Smuzhiyun 		.toward_ipa	= true,
117*4882a593Smuzhiyun 		.endpoint = {
118*4882a593Smuzhiyun 			.filter_support	= true,
119*4882a593Smuzhiyun 		},
120*4882a593Smuzhiyun 	},
121*4882a593Smuzhiyun 	[IPA_ENDPOINT_MODEM_AP_RX] = {
122*4882a593Smuzhiyun 		.ee_id		= GSI_EE_MODEM,
123*4882a593Smuzhiyun 		.channel_id	= 2,
124*4882a593Smuzhiyun 		.endpoint_id	= 10,
125*4882a593Smuzhiyun 		.toward_ipa	= false,
126*4882a593Smuzhiyun 	},
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun /* For the SC7180, resource groups are allocated this way:
130*4882a593Smuzhiyun  *   group 0:	UL_DL
131*4882a593Smuzhiyun  */
132*4882a593Smuzhiyun static const struct ipa_resource_src ipa_resource_src[] = {
133*4882a593Smuzhiyun 	{
134*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
135*4882a593Smuzhiyun 		.limits[0] = {
136*4882a593Smuzhiyun 			.min = 3,
137*4882a593Smuzhiyun 			.max = 63,
138*4882a593Smuzhiyun 		},
139*4882a593Smuzhiyun 	},
140*4882a593Smuzhiyun 	{
141*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
142*4882a593Smuzhiyun 		.limits[0] = {
143*4882a593Smuzhiyun 			.min = 3,
144*4882a593Smuzhiyun 			.max = 3,
145*4882a593Smuzhiyun 		},
146*4882a593Smuzhiyun 	},
147*4882a593Smuzhiyun 	{
148*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
149*4882a593Smuzhiyun 		.limits[0] = {
150*4882a593Smuzhiyun 			.min = 10,
151*4882a593Smuzhiyun 			.max = 10,
152*4882a593Smuzhiyun 		},
153*4882a593Smuzhiyun 	},
154*4882a593Smuzhiyun 	{
155*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
156*4882a593Smuzhiyun 		.limits[0] = {
157*4882a593Smuzhiyun 			.min = 1,
158*4882a593Smuzhiyun 			.max = 1,
159*4882a593Smuzhiyun 		},
160*4882a593Smuzhiyun 	},
161*4882a593Smuzhiyun 	{
162*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
163*4882a593Smuzhiyun 		.limits[0] = {
164*4882a593Smuzhiyun 			.min = 5,
165*4882a593Smuzhiyun 			.max = 5,
166*4882a593Smuzhiyun 		},
167*4882a593Smuzhiyun 	},
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun static const struct ipa_resource_dst ipa_resource_dst[] = {
171*4882a593Smuzhiyun 	{
172*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
173*4882a593Smuzhiyun 		.limits[0] = {
174*4882a593Smuzhiyun 			.min = 3,
175*4882a593Smuzhiyun 			.max = 3,
176*4882a593Smuzhiyun 		},
177*4882a593Smuzhiyun 	},
178*4882a593Smuzhiyun 	{
179*4882a593Smuzhiyun 		.type = IPA_RESOURCE_TYPE_DST_DPS_DMARS,
180*4882a593Smuzhiyun 		.limits[0] = {
181*4882a593Smuzhiyun 			.min = 1,
182*4882a593Smuzhiyun 			.max = 63,
183*4882a593Smuzhiyun 		},
184*4882a593Smuzhiyun 	},
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun /* Resource configuration for the SC7180 SoC. */
188*4882a593Smuzhiyun static const struct ipa_resource_data ipa_resource_data = {
189*4882a593Smuzhiyun 	.resource_src_count	= ARRAY_SIZE(ipa_resource_src),
190*4882a593Smuzhiyun 	.resource_src		= ipa_resource_src,
191*4882a593Smuzhiyun 	.resource_dst_count	= ARRAY_SIZE(ipa_resource_dst),
192*4882a593Smuzhiyun 	.resource_dst		= ipa_resource_dst,
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun /* IPA-resident memory region configuration for the SC7180 SoC. */
196*4882a593Smuzhiyun static const struct ipa_mem ipa_mem_local_data[] = {
197*4882a593Smuzhiyun 	[IPA_MEM_UC_SHARED] = {
198*4882a593Smuzhiyun 		.offset		= 0x0000,
199*4882a593Smuzhiyun 		.size		= 0x0080,
200*4882a593Smuzhiyun 		.canary_count	= 0,
201*4882a593Smuzhiyun 	},
202*4882a593Smuzhiyun 	[IPA_MEM_UC_INFO] = {
203*4882a593Smuzhiyun 		.offset		= 0x0080,
204*4882a593Smuzhiyun 		.size		= 0x0200,
205*4882a593Smuzhiyun 		.canary_count	= 2,
206*4882a593Smuzhiyun 	},
207*4882a593Smuzhiyun 	[IPA_MEM_V4_FILTER_HASHED] = {
208*4882a593Smuzhiyun 		.offset		= 0x0288,
209*4882a593Smuzhiyun 		.size		= 0,
210*4882a593Smuzhiyun 		.canary_count	= 2,
211*4882a593Smuzhiyun 	},
212*4882a593Smuzhiyun 	[IPA_MEM_V4_FILTER] = {
213*4882a593Smuzhiyun 		.offset		= 0x0290,
214*4882a593Smuzhiyun 		.size		= 0x0078,
215*4882a593Smuzhiyun 		.canary_count	= 2,
216*4882a593Smuzhiyun 	},
217*4882a593Smuzhiyun 	[IPA_MEM_V6_FILTER_HASHED] = {
218*4882a593Smuzhiyun 		.offset		= 0x0310,
219*4882a593Smuzhiyun 		.size		= 0,
220*4882a593Smuzhiyun 		.canary_count	= 2,
221*4882a593Smuzhiyun 	},
222*4882a593Smuzhiyun 	[IPA_MEM_V6_FILTER] = {
223*4882a593Smuzhiyun 		.offset		= 0x0318,
224*4882a593Smuzhiyun 		.size		= 0x0078,
225*4882a593Smuzhiyun 		.canary_count	= 2,
226*4882a593Smuzhiyun 	},
227*4882a593Smuzhiyun 	[IPA_MEM_V4_ROUTE_HASHED] = {
228*4882a593Smuzhiyun 		.offset		= 0x0398,
229*4882a593Smuzhiyun 		.size		= 0,
230*4882a593Smuzhiyun 		.canary_count	= 2,
231*4882a593Smuzhiyun 	},
232*4882a593Smuzhiyun 	[IPA_MEM_V4_ROUTE] = {
233*4882a593Smuzhiyun 		.offset		= 0x03a0,
234*4882a593Smuzhiyun 		.size		= 0x0078,
235*4882a593Smuzhiyun 		.canary_count	= 2,
236*4882a593Smuzhiyun 	},
237*4882a593Smuzhiyun 	[IPA_MEM_V6_ROUTE_HASHED] = {
238*4882a593Smuzhiyun 		.offset		= 0x0420,
239*4882a593Smuzhiyun 		.size		= 0,
240*4882a593Smuzhiyun 		.canary_count	= 2,
241*4882a593Smuzhiyun 	},
242*4882a593Smuzhiyun 	[IPA_MEM_V6_ROUTE] = {
243*4882a593Smuzhiyun 		.offset		= 0x0428,
244*4882a593Smuzhiyun 		.size		= 0x0078,
245*4882a593Smuzhiyun 		.canary_count	= 2,
246*4882a593Smuzhiyun 	},
247*4882a593Smuzhiyun 	[IPA_MEM_MODEM_HEADER] = {
248*4882a593Smuzhiyun 		.offset		= 0x04a8,
249*4882a593Smuzhiyun 		.size		= 0x0140,
250*4882a593Smuzhiyun 		.canary_count	= 2,
251*4882a593Smuzhiyun 	},
252*4882a593Smuzhiyun 	[IPA_MEM_AP_HEADER] = {
253*4882a593Smuzhiyun 		.offset		= 0x05e8,
254*4882a593Smuzhiyun 		.size		= 0x0000,
255*4882a593Smuzhiyun 		.canary_count	= 0,
256*4882a593Smuzhiyun 	},
257*4882a593Smuzhiyun 	[IPA_MEM_MODEM_PROC_CTX] = {
258*4882a593Smuzhiyun 		.offset		= 0x05f0,
259*4882a593Smuzhiyun 		.size		= 0x0200,
260*4882a593Smuzhiyun 		.canary_count	= 2,
261*4882a593Smuzhiyun 	},
262*4882a593Smuzhiyun 	[IPA_MEM_AP_PROC_CTX] = {
263*4882a593Smuzhiyun 		.offset		= 0x07f0,
264*4882a593Smuzhiyun 		.size		= 0x0200,
265*4882a593Smuzhiyun 		.canary_count	= 0,
266*4882a593Smuzhiyun 	},
267*4882a593Smuzhiyun 	[IPA_MEM_PDN_CONFIG] = {
268*4882a593Smuzhiyun 		.offset		= 0x09f8,
269*4882a593Smuzhiyun 		.size		= 0x0050,
270*4882a593Smuzhiyun 		.canary_count	= 2,
271*4882a593Smuzhiyun 	},
272*4882a593Smuzhiyun 	[IPA_MEM_STATS_QUOTA] = {
273*4882a593Smuzhiyun 		.offset		= 0x0a50,
274*4882a593Smuzhiyun 		.size		= 0x0060,
275*4882a593Smuzhiyun 		.canary_count	= 2,
276*4882a593Smuzhiyun 	},
277*4882a593Smuzhiyun 	[IPA_MEM_STATS_TETHERING] = {
278*4882a593Smuzhiyun 		.offset		= 0x0ab0,
279*4882a593Smuzhiyun 		.size		= 0x0140,
280*4882a593Smuzhiyun 		.canary_count	= 0,
281*4882a593Smuzhiyun 	},
282*4882a593Smuzhiyun 	[IPA_MEM_STATS_DROP] = {
283*4882a593Smuzhiyun 		.offset		= 0x0bf0,
284*4882a593Smuzhiyun 		.size		= 0,
285*4882a593Smuzhiyun 		.canary_count	= 0,
286*4882a593Smuzhiyun 	},
287*4882a593Smuzhiyun 	[IPA_MEM_MODEM] = {
288*4882a593Smuzhiyun 		.offset		= 0x0bf0,
289*4882a593Smuzhiyun 		.size		= 0x140c,
290*4882a593Smuzhiyun 		.canary_count	= 0,
291*4882a593Smuzhiyun 	},
292*4882a593Smuzhiyun 	[IPA_MEM_UC_EVENT_RING] = {
293*4882a593Smuzhiyun 		.offset		= 0x2000,
294*4882a593Smuzhiyun 		.size		= 0,
295*4882a593Smuzhiyun 		.canary_count	= 1,
296*4882a593Smuzhiyun 	},
297*4882a593Smuzhiyun };
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun static struct ipa_mem_data ipa_mem_data = {
300*4882a593Smuzhiyun 	.local_count	= ARRAY_SIZE(ipa_mem_local_data),
301*4882a593Smuzhiyun 	.local		= ipa_mem_local_data,
302*4882a593Smuzhiyun 	.imem_addr	= 0x146a8000,
303*4882a593Smuzhiyun 	.imem_size	= 0x00002000,
304*4882a593Smuzhiyun 	.smem_id	= 497,
305*4882a593Smuzhiyun 	.smem_size	= 0x00002000,
306*4882a593Smuzhiyun };
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun /* Configuration data for the SC7180 SoC. */
309*4882a593Smuzhiyun const struct ipa_data ipa_data_sc7180 = {
310*4882a593Smuzhiyun 	.version	= IPA_VERSION_4_2,
311*4882a593Smuzhiyun 	.endpoint_count	= ARRAY_SIZE(ipa_gsi_endpoint_data),
312*4882a593Smuzhiyun 	.endpoint_data	= ipa_gsi_endpoint_data,
313*4882a593Smuzhiyun 	.resource_data	= &ipa_resource_data,
314*4882a593Smuzhiyun 	.mem_data	= &ipa_mem_data,
315*4882a593Smuzhiyun };
316