1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * FUJITSU Extended Socket Network Device driver
4*4882a593Smuzhiyun * Copyright (c) 2015 FUJITSU LIMITED
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include "fjes_hw.h"
8*4882a593Smuzhiyun #include "fjes.h"
9*4882a593Smuzhiyun #include "fjes_trace.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun static void fjes_hw_update_zone_task(struct work_struct *);
12*4882a593Smuzhiyun static void fjes_hw_epstop_task(struct work_struct *);
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun /* supported MTU list */
15*4882a593Smuzhiyun const u32 fjes_support_mtu[] = {
16*4882a593Smuzhiyun FJES_MTU_DEFINE(8 * 1024),
17*4882a593Smuzhiyun FJES_MTU_DEFINE(16 * 1024),
18*4882a593Smuzhiyun FJES_MTU_DEFINE(32 * 1024),
19*4882a593Smuzhiyun FJES_MTU_DEFINE(64 * 1024),
20*4882a593Smuzhiyun 0
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun
fjes_hw_rd32(struct fjes_hw * hw,u32 reg)23*4882a593Smuzhiyun u32 fjes_hw_rd32(struct fjes_hw *hw, u32 reg)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun u8 *base = hw->base;
26*4882a593Smuzhiyun u32 value = 0;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun value = readl(&base[reg]);
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun return value;
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
fjes_hw_iomap(struct fjes_hw * hw)33*4882a593Smuzhiyun static u8 *fjes_hw_iomap(struct fjes_hw *hw)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun u8 *base;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun if (!request_mem_region(hw->hw_res.start, hw->hw_res.size,
38*4882a593Smuzhiyun fjes_driver_name)) {
39*4882a593Smuzhiyun pr_err("request_mem_region failed\n");
40*4882a593Smuzhiyun return NULL;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun base = (u8 *)ioremap(hw->hw_res.start, hw->hw_res.size);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun return base;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
fjes_hw_iounmap(struct fjes_hw * hw)48*4882a593Smuzhiyun static void fjes_hw_iounmap(struct fjes_hw *hw)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun iounmap(hw->base);
51*4882a593Smuzhiyun release_mem_region(hw->hw_res.start, hw->hw_res.size);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
fjes_hw_reset(struct fjes_hw * hw)54*4882a593Smuzhiyun int fjes_hw_reset(struct fjes_hw *hw)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun union REG_DCTL dctl;
57*4882a593Smuzhiyun int timeout;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun dctl.reg = 0;
60*4882a593Smuzhiyun dctl.bits.reset = 1;
61*4882a593Smuzhiyun wr32(XSCT_DCTL, dctl.reg);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun timeout = FJES_DEVICE_RESET_TIMEOUT * 1000;
64*4882a593Smuzhiyun dctl.reg = rd32(XSCT_DCTL);
65*4882a593Smuzhiyun while ((dctl.bits.reset == 1) && (timeout > 0)) {
66*4882a593Smuzhiyun msleep(1000);
67*4882a593Smuzhiyun dctl.reg = rd32(XSCT_DCTL);
68*4882a593Smuzhiyun timeout -= 1000;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun return timeout > 0 ? 0 : -EIO;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
fjes_hw_get_max_epid(struct fjes_hw * hw)74*4882a593Smuzhiyun static int fjes_hw_get_max_epid(struct fjes_hw *hw)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun union REG_MAX_EP info;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun info.reg = rd32(XSCT_MAX_EP);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun return info.bits.maxep;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
fjes_hw_get_my_epid(struct fjes_hw * hw)83*4882a593Smuzhiyun static int fjes_hw_get_my_epid(struct fjes_hw *hw)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun union REG_OWNER_EPID info;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun info.reg = rd32(XSCT_OWNER_EPID);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun return info.bits.epid;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
fjes_hw_alloc_shared_status_region(struct fjes_hw * hw)92*4882a593Smuzhiyun static int fjes_hw_alloc_shared_status_region(struct fjes_hw *hw)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun size_t size;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun size = sizeof(struct fjes_device_shared_info) +
97*4882a593Smuzhiyun (sizeof(u8) * hw->max_epid);
98*4882a593Smuzhiyun hw->hw_info.share = kzalloc(size, GFP_KERNEL);
99*4882a593Smuzhiyun if (!hw->hw_info.share)
100*4882a593Smuzhiyun return -ENOMEM;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun hw->hw_info.share->epnum = hw->max_epid;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun return 0;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
fjes_hw_free_shared_status_region(struct fjes_hw * hw)107*4882a593Smuzhiyun static void fjes_hw_free_shared_status_region(struct fjes_hw *hw)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun kfree(hw->hw_info.share);
110*4882a593Smuzhiyun hw->hw_info.share = NULL;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
fjes_hw_alloc_epbuf(struct epbuf_handler * epbh)113*4882a593Smuzhiyun static int fjes_hw_alloc_epbuf(struct epbuf_handler *epbh)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun void *mem;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun mem = vzalloc(EP_BUFFER_SIZE);
118*4882a593Smuzhiyun if (!mem)
119*4882a593Smuzhiyun return -ENOMEM;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun epbh->buffer = mem;
122*4882a593Smuzhiyun epbh->size = EP_BUFFER_SIZE;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun epbh->info = (union ep_buffer_info *)mem;
125*4882a593Smuzhiyun epbh->ring = (u8 *)(mem + sizeof(union ep_buffer_info));
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun return 0;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
fjes_hw_free_epbuf(struct epbuf_handler * epbh)130*4882a593Smuzhiyun static void fjes_hw_free_epbuf(struct epbuf_handler *epbh)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun vfree(epbh->buffer);
133*4882a593Smuzhiyun epbh->buffer = NULL;
134*4882a593Smuzhiyun epbh->size = 0;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun epbh->info = NULL;
137*4882a593Smuzhiyun epbh->ring = NULL;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
fjes_hw_setup_epbuf(struct epbuf_handler * epbh,u8 * mac_addr,u32 mtu)140*4882a593Smuzhiyun void fjes_hw_setup_epbuf(struct epbuf_handler *epbh, u8 *mac_addr, u32 mtu)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun union ep_buffer_info *info = epbh->info;
143*4882a593Smuzhiyun u16 vlan_id[EP_BUFFER_SUPPORT_VLAN_MAX];
144*4882a593Smuzhiyun int i;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++)
147*4882a593Smuzhiyun vlan_id[i] = info->v1i.vlan_id[i];
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun memset(info, 0, sizeof(union ep_buffer_info));
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun info->v1i.version = 0; /* version 0 */
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun for (i = 0; i < ETH_ALEN; i++)
154*4882a593Smuzhiyun info->v1i.mac_addr[i] = mac_addr[i];
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun info->v1i.head = 0;
157*4882a593Smuzhiyun info->v1i.tail = 1;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun info->v1i.info_size = sizeof(union ep_buffer_info);
160*4882a593Smuzhiyun info->v1i.buffer_size = epbh->size - info->v1i.info_size;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun info->v1i.frame_max = FJES_MTU_TO_FRAME_SIZE(mtu);
163*4882a593Smuzhiyun info->v1i.count_max =
164*4882a593Smuzhiyun EP_RING_NUM(info->v1i.buffer_size, info->v1i.frame_max);
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++)
167*4882a593Smuzhiyun info->v1i.vlan_id[i] = vlan_id[i];
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun info->v1i.rx_status |= FJES_RX_MTU_CHANGING_DONE;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun void
fjes_hw_init_command_registers(struct fjes_hw * hw,struct fjes_device_command_param * param)173*4882a593Smuzhiyun fjes_hw_init_command_registers(struct fjes_hw *hw,
174*4882a593Smuzhiyun struct fjes_device_command_param *param)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun /* Request Buffer length */
177*4882a593Smuzhiyun wr32(XSCT_REQBL, (__le32)(param->req_len));
178*4882a593Smuzhiyun /* Response Buffer Length */
179*4882a593Smuzhiyun wr32(XSCT_RESPBL, (__le32)(param->res_len));
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /* Request Buffer Address */
182*4882a593Smuzhiyun wr32(XSCT_REQBAL,
183*4882a593Smuzhiyun (__le32)(param->req_start & GENMASK_ULL(31, 0)));
184*4882a593Smuzhiyun wr32(XSCT_REQBAH,
185*4882a593Smuzhiyun (__le32)((param->req_start & GENMASK_ULL(63, 32)) >> 32));
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /* Response Buffer Address */
188*4882a593Smuzhiyun wr32(XSCT_RESPBAL,
189*4882a593Smuzhiyun (__le32)(param->res_start & GENMASK_ULL(31, 0)));
190*4882a593Smuzhiyun wr32(XSCT_RESPBAH,
191*4882a593Smuzhiyun (__le32)((param->res_start & GENMASK_ULL(63, 32)) >> 32));
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun /* Share status address */
194*4882a593Smuzhiyun wr32(XSCT_SHSTSAL,
195*4882a593Smuzhiyun (__le32)(param->share_start & GENMASK_ULL(31, 0)));
196*4882a593Smuzhiyun wr32(XSCT_SHSTSAH,
197*4882a593Smuzhiyun (__le32)((param->share_start & GENMASK_ULL(63, 32)) >> 32));
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
fjes_hw_setup(struct fjes_hw * hw)200*4882a593Smuzhiyun static int fjes_hw_setup(struct fjes_hw *hw)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun u8 mac[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
203*4882a593Smuzhiyun struct fjes_device_command_param param;
204*4882a593Smuzhiyun struct ep_share_mem_info *buf_pair;
205*4882a593Smuzhiyun unsigned long flags;
206*4882a593Smuzhiyun size_t mem_size;
207*4882a593Smuzhiyun int result;
208*4882a593Smuzhiyun int epidx;
209*4882a593Smuzhiyun void *buf;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun hw->hw_info.max_epid = &hw->max_epid;
212*4882a593Smuzhiyun hw->hw_info.my_epid = &hw->my_epid;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun buf = kcalloc(hw->max_epid, sizeof(struct ep_share_mem_info),
215*4882a593Smuzhiyun GFP_KERNEL);
216*4882a593Smuzhiyun if (!buf)
217*4882a593Smuzhiyun return -ENOMEM;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun hw->ep_shm_info = (struct ep_share_mem_info *)buf;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun mem_size = FJES_DEV_REQ_BUF_SIZE(hw->max_epid);
222*4882a593Smuzhiyun hw->hw_info.req_buf = kzalloc(mem_size, GFP_KERNEL);
223*4882a593Smuzhiyun if (!(hw->hw_info.req_buf))
224*4882a593Smuzhiyun return -ENOMEM;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun hw->hw_info.req_buf_size = mem_size;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun mem_size = FJES_DEV_RES_BUF_SIZE(hw->max_epid);
229*4882a593Smuzhiyun hw->hw_info.res_buf = kzalloc(mem_size, GFP_KERNEL);
230*4882a593Smuzhiyun if (!(hw->hw_info.res_buf))
231*4882a593Smuzhiyun return -ENOMEM;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun hw->hw_info.res_buf_size = mem_size;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun result = fjes_hw_alloc_shared_status_region(hw);
236*4882a593Smuzhiyun if (result)
237*4882a593Smuzhiyun return result;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun hw->hw_info.buffer_share_bit = 0;
240*4882a593Smuzhiyun hw->hw_info.buffer_unshare_reserve_bit = 0;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun for (epidx = 0; epidx < hw->max_epid; epidx++) {
243*4882a593Smuzhiyun if (epidx != hw->my_epid) {
244*4882a593Smuzhiyun buf_pair = &hw->ep_shm_info[epidx];
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun result = fjes_hw_alloc_epbuf(&buf_pair->tx);
247*4882a593Smuzhiyun if (result)
248*4882a593Smuzhiyun return result;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun result = fjes_hw_alloc_epbuf(&buf_pair->rx);
251*4882a593Smuzhiyun if (result)
252*4882a593Smuzhiyun return result;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun spin_lock_irqsave(&hw->rx_status_lock, flags);
255*4882a593Smuzhiyun fjes_hw_setup_epbuf(&buf_pair->tx, mac,
256*4882a593Smuzhiyun fjes_support_mtu[0]);
257*4882a593Smuzhiyun fjes_hw_setup_epbuf(&buf_pair->rx, mac,
258*4882a593Smuzhiyun fjes_support_mtu[0]);
259*4882a593Smuzhiyun spin_unlock_irqrestore(&hw->rx_status_lock, flags);
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun memset(¶m, 0, sizeof(param));
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun param.req_len = hw->hw_info.req_buf_size;
266*4882a593Smuzhiyun param.req_start = __pa(hw->hw_info.req_buf);
267*4882a593Smuzhiyun param.res_len = hw->hw_info.res_buf_size;
268*4882a593Smuzhiyun param.res_start = __pa(hw->hw_info.res_buf);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun param.share_start = __pa(hw->hw_info.share->ep_status);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun fjes_hw_init_command_registers(hw, ¶m);
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun return 0;
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun
fjes_hw_cleanup(struct fjes_hw * hw)277*4882a593Smuzhiyun static void fjes_hw_cleanup(struct fjes_hw *hw)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun int epidx;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun if (!hw->ep_shm_info)
282*4882a593Smuzhiyun return;
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun fjes_hw_free_shared_status_region(hw);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun kfree(hw->hw_info.req_buf);
287*4882a593Smuzhiyun hw->hw_info.req_buf = NULL;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun kfree(hw->hw_info.res_buf);
290*4882a593Smuzhiyun hw->hw_info.res_buf = NULL;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun for (epidx = 0; epidx < hw->max_epid ; epidx++) {
293*4882a593Smuzhiyun if (epidx == hw->my_epid)
294*4882a593Smuzhiyun continue;
295*4882a593Smuzhiyun fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].tx);
296*4882a593Smuzhiyun fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].rx);
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun kfree(hw->ep_shm_info);
300*4882a593Smuzhiyun hw->ep_shm_info = NULL;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
fjes_hw_init(struct fjes_hw * hw)303*4882a593Smuzhiyun int fjes_hw_init(struct fjes_hw *hw)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun int ret;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun hw->base = fjes_hw_iomap(hw);
308*4882a593Smuzhiyun if (!hw->base)
309*4882a593Smuzhiyun return -EIO;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun ret = fjes_hw_reset(hw);
312*4882a593Smuzhiyun if (ret)
313*4882a593Smuzhiyun return ret;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun fjes_hw_set_irqmask(hw, REG_ICTL_MASK_ALL, true);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun INIT_WORK(&hw->update_zone_task, fjes_hw_update_zone_task);
318*4882a593Smuzhiyun INIT_WORK(&hw->epstop_task, fjes_hw_epstop_task);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun mutex_init(&hw->hw_info.lock);
321*4882a593Smuzhiyun spin_lock_init(&hw->rx_status_lock);
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun hw->max_epid = fjes_hw_get_max_epid(hw);
324*4882a593Smuzhiyun hw->my_epid = fjes_hw_get_my_epid(hw);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun if ((hw->max_epid == 0) || (hw->my_epid >= hw->max_epid))
327*4882a593Smuzhiyun return -ENXIO;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun ret = fjes_hw_setup(hw);
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun hw->hw_info.trace = vzalloc(FJES_DEBUG_BUFFER_SIZE);
332*4882a593Smuzhiyun hw->hw_info.trace_size = FJES_DEBUG_BUFFER_SIZE;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun return ret;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
fjes_hw_exit(struct fjes_hw * hw)337*4882a593Smuzhiyun void fjes_hw_exit(struct fjes_hw *hw)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun int ret;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun if (hw->base) {
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun if (hw->debug_mode) {
344*4882a593Smuzhiyun /* disable debug mode */
345*4882a593Smuzhiyun mutex_lock(&hw->hw_info.lock);
346*4882a593Smuzhiyun fjes_hw_stop_debug(hw);
347*4882a593Smuzhiyun mutex_unlock(&hw->hw_info.lock);
348*4882a593Smuzhiyun }
349*4882a593Smuzhiyun vfree(hw->hw_info.trace);
350*4882a593Smuzhiyun hw->hw_info.trace = NULL;
351*4882a593Smuzhiyun hw->hw_info.trace_size = 0;
352*4882a593Smuzhiyun hw->debug_mode = 0;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun ret = fjes_hw_reset(hw);
355*4882a593Smuzhiyun if (ret)
356*4882a593Smuzhiyun pr_err("%s: reset error", __func__);
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun fjes_hw_iounmap(hw);
359*4882a593Smuzhiyun hw->base = NULL;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun fjes_hw_cleanup(hw);
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun cancel_work_sync(&hw->update_zone_task);
365*4882a593Smuzhiyun cancel_work_sync(&hw->epstop_task);
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun static enum fjes_dev_command_response_e
fjes_hw_issue_request_command(struct fjes_hw * hw,enum fjes_dev_command_request_type type)369*4882a593Smuzhiyun fjes_hw_issue_request_command(struct fjes_hw *hw,
370*4882a593Smuzhiyun enum fjes_dev_command_request_type type)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun enum fjes_dev_command_response_e ret = FJES_CMD_STATUS_UNKNOWN;
373*4882a593Smuzhiyun union REG_CR cr;
374*4882a593Smuzhiyun union REG_CS cs;
375*4882a593Smuzhiyun int timeout = FJES_COMMAND_REQ_TIMEOUT * 1000;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun cr.reg = 0;
378*4882a593Smuzhiyun cr.bits.req_start = 1;
379*4882a593Smuzhiyun cr.bits.req_code = type;
380*4882a593Smuzhiyun wr32(XSCT_CR, cr.reg);
381*4882a593Smuzhiyun cr.reg = rd32(XSCT_CR);
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun if (cr.bits.error == 0) {
384*4882a593Smuzhiyun timeout = FJES_COMMAND_REQ_TIMEOUT * 1000;
385*4882a593Smuzhiyun cs.reg = rd32(XSCT_CS);
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun while ((cs.bits.complete != 1) && timeout > 0) {
388*4882a593Smuzhiyun msleep(1000);
389*4882a593Smuzhiyun cs.reg = rd32(XSCT_CS);
390*4882a593Smuzhiyun timeout -= 1000;
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun if (cs.bits.complete == 1)
394*4882a593Smuzhiyun ret = FJES_CMD_STATUS_NORMAL;
395*4882a593Smuzhiyun else if (timeout <= 0)
396*4882a593Smuzhiyun ret = FJES_CMD_STATUS_TIMEOUT;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun } else {
399*4882a593Smuzhiyun switch (cr.bits.err_info) {
400*4882a593Smuzhiyun case FJES_CMD_REQ_ERR_INFO_PARAM:
401*4882a593Smuzhiyun ret = FJES_CMD_STATUS_ERROR_PARAM;
402*4882a593Smuzhiyun break;
403*4882a593Smuzhiyun case FJES_CMD_REQ_ERR_INFO_STATUS:
404*4882a593Smuzhiyun ret = FJES_CMD_STATUS_ERROR_STATUS;
405*4882a593Smuzhiyun break;
406*4882a593Smuzhiyun default:
407*4882a593Smuzhiyun ret = FJES_CMD_STATUS_UNKNOWN;
408*4882a593Smuzhiyun break;
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun trace_fjes_hw_issue_request_command(&cr, &cs, timeout, ret);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun return ret;
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun
fjes_hw_request_info(struct fjes_hw * hw)417*4882a593Smuzhiyun int fjes_hw_request_info(struct fjes_hw *hw)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
420*4882a593Smuzhiyun union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
421*4882a593Smuzhiyun enum fjes_dev_command_response_e ret;
422*4882a593Smuzhiyun int result;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun memset(req_buf, 0, hw->hw_info.req_buf_size);
425*4882a593Smuzhiyun memset(res_buf, 0, hw->hw_info.res_buf_size);
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun req_buf->info.length = FJES_DEV_COMMAND_INFO_REQ_LEN;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun res_buf->info.length = 0;
430*4882a593Smuzhiyun res_buf->info.code = 0;
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_INFO);
433*4882a593Smuzhiyun trace_fjes_hw_request_info(hw, res_buf);
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun result = 0;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun if (FJES_DEV_COMMAND_INFO_RES_LEN((*hw->hw_info.max_epid)) !=
438*4882a593Smuzhiyun res_buf->info.length) {
439*4882a593Smuzhiyun trace_fjes_hw_request_info_err("Invalid res_buf");
440*4882a593Smuzhiyun result = -ENOMSG;
441*4882a593Smuzhiyun } else if (ret == FJES_CMD_STATUS_NORMAL) {
442*4882a593Smuzhiyun switch (res_buf->info.code) {
443*4882a593Smuzhiyun case FJES_CMD_REQ_RES_CODE_NORMAL:
444*4882a593Smuzhiyun result = 0;
445*4882a593Smuzhiyun break;
446*4882a593Smuzhiyun default:
447*4882a593Smuzhiyun result = -EPERM;
448*4882a593Smuzhiyun break;
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun } else {
451*4882a593Smuzhiyun switch (ret) {
452*4882a593Smuzhiyun case FJES_CMD_STATUS_UNKNOWN:
453*4882a593Smuzhiyun result = -EPERM;
454*4882a593Smuzhiyun break;
455*4882a593Smuzhiyun case FJES_CMD_STATUS_TIMEOUT:
456*4882a593Smuzhiyun trace_fjes_hw_request_info_err("Timeout");
457*4882a593Smuzhiyun result = -EBUSY;
458*4882a593Smuzhiyun break;
459*4882a593Smuzhiyun case FJES_CMD_STATUS_ERROR_PARAM:
460*4882a593Smuzhiyun result = -EPERM;
461*4882a593Smuzhiyun break;
462*4882a593Smuzhiyun case FJES_CMD_STATUS_ERROR_STATUS:
463*4882a593Smuzhiyun result = -EPERM;
464*4882a593Smuzhiyun break;
465*4882a593Smuzhiyun default:
466*4882a593Smuzhiyun result = -EPERM;
467*4882a593Smuzhiyun break;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun return result;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
fjes_hw_register_buff_addr(struct fjes_hw * hw,int dest_epid,struct ep_share_mem_info * buf_pair)474*4882a593Smuzhiyun int fjes_hw_register_buff_addr(struct fjes_hw *hw, int dest_epid,
475*4882a593Smuzhiyun struct ep_share_mem_info *buf_pair)
476*4882a593Smuzhiyun {
477*4882a593Smuzhiyun union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
478*4882a593Smuzhiyun union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
479*4882a593Smuzhiyun enum fjes_dev_command_response_e ret;
480*4882a593Smuzhiyun int page_count;
481*4882a593Smuzhiyun int timeout;
482*4882a593Smuzhiyun int i, idx;
483*4882a593Smuzhiyun void *addr;
484*4882a593Smuzhiyun int result;
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun if (test_bit(dest_epid, &hw->hw_info.buffer_share_bit))
487*4882a593Smuzhiyun return 0;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun memset(req_buf, 0, hw->hw_info.req_buf_size);
490*4882a593Smuzhiyun memset(res_buf, 0, hw->hw_info.res_buf_size);
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun req_buf->share_buffer.length = FJES_DEV_COMMAND_SHARE_BUFFER_REQ_LEN(
493*4882a593Smuzhiyun buf_pair->tx.size,
494*4882a593Smuzhiyun buf_pair->rx.size);
495*4882a593Smuzhiyun req_buf->share_buffer.epid = dest_epid;
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun idx = 0;
498*4882a593Smuzhiyun req_buf->share_buffer.buffer[idx++] = buf_pair->tx.size;
499*4882a593Smuzhiyun page_count = buf_pair->tx.size / EP_BUFFER_INFO_SIZE;
500*4882a593Smuzhiyun for (i = 0; i < page_count; i++) {
501*4882a593Smuzhiyun addr = ((u8 *)(buf_pair->tx.buffer)) +
502*4882a593Smuzhiyun (i * EP_BUFFER_INFO_SIZE);
503*4882a593Smuzhiyun req_buf->share_buffer.buffer[idx++] =
504*4882a593Smuzhiyun (__le64)(page_to_phys(vmalloc_to_page(addr)) +
505*4882a593Smuzhiyun offset_in_page(addr));
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun req_buf->share_buffer.buffer[idx++] = buf_pair->rx.size;
509*4882a593Smuzhiyun page_count = buf_pair->rx.size / EP_BUFFER_INFO_SIZE;
510*4882a593Smuzhiyun for (i = 0; i < page_count; i++) {
511*4882a593Smuzhiyun addr = ((u8 *)(buf_pair->rx.buffer)) +
512*4882a593Smuzhiyun (i * EP_BUFFER_INFO_SIZE);
513*4882a593Smuzhiyun req_buf->share_buffer.buffer[idx++] =
514*4882a593Smuzhiyun (__le64)(page_to_phys(vmalloc_to_page(addr)) +
515*4882a593Smuzhiyun offset_in_page(addr));
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun res_buf->share_buffer.length = 0;
519*4882a593Smuzhiyun res_buf->share_buffer.code = 0;
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun trace_fjes_hw_register_buff_addr_req(req_buf, buf_pair);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_SHARE_BUFFER);
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun timeout = FJES_COMMAND_REQ_BUFF_TIMEOUT * 1000;
526*4882a593Smuzhiyun while ((ret == FJES_CMD_STATUS_NORMAL) &&
527*4882a593Smuzhiyun (res_buf->share_buffer.length ==
528*4882a593Smuzhiyun FJES_DEV_COMMAND_SHARE_BUFFER_RES_LEN) &&
529*4882a593Smuzhiyun (res_buf->share_buffer.code == FJES_CMD_REQ_RES_CODE_BUSY) &&
530*4882a593Smuzhiyun (timeout > 0)) {
531*4882a593Smuzhiyun msleep(200 + hw->my_epid * 20);
532*4882a593Smuzhiyun timeout -= (200 + hw->my_epid * 20);
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun res_buf->share_buffer.length = 0;
535*4882a593Smuzhiyun res_buf->share_buffer.code = 0;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun ret = fjes_hw_issue_request_command(
538*4882a593Smuzhiyun hw, FJES_CMD_REQ_SHARE_BUFFER);
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun result = 0;
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun trace_fjes_hw_register_buff_addr(res_buf, timeout);
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun if (res_buf->share_buffer.length !=
546*4882a593Smuzhiyun FJES_DEV_COMMAND_SHARE_BUFFER_RES_LEN) {
547*4882a593Smuzhiyun trace_fjes_hw_register_buff_addr_err("Invalid res_buf");
548*4882a593Smuzhiyun result = -ENOMSG;
549*4882a593Smuzhiyun } else if (ret == FJES_CMD_STATUS_NORMAL) {
550*4882a593Smuzhiyun switch (res_buf->share_buffer.code) {
551*4882a593Smuzhiyun case FJES_CMD_REQ_RES_CODE_NORMAL:
552*4882a593Smuzhiyun result = 0;
553*4882a593Smuzhiyun set_bit(dest_epid, &hw->hw_info.buffer_share_bit);
554*4882a593Smuzhiyun break;
555*4882a593Smuzhiyun case FJES_CMD_REQ_RES_CODE_BUSY:
556*4882a593Smuzhiyun trace_fjes_hw_register_buff_addr_err("Busy Timeout");
557*4882a593Smuzhiyun result = -EBUSY;
558*4882a593Smuzhiyun break;
559*4882a593Smuzhiyun default:
560*4882a593Smuzhiyun result = -EPERM;
561*4882a593Smuzhiyun break;
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun } else {
564*4882a593Smuzhiyun switch (ret) {
565*4882a593Smuzhiyun case FJES_CMD_STATUS_UNKNOWN:
566*4882a593Smuzhiyun result = -EPERM;
567*4882a593Smuzhiyun break;
568*4882a593Smuzhiyun case FJES_CMD_STATUS_TIMEOUT:
569*4882a593Smuzhiyun trace_fjes_hw_register_buff_addr_err("Timeout");
570*4882a593Smuzhiyun result = -EBUSY;
571*4882a593Smuzhiyun break;
572*4882a593Smuzhiyun case FJES_CMD_STATUS_ERROR_PARAM:
573*4882a593Smuzhiyun case FJES_CMD_STATUS_ERROR_STATUS:
574*4882a593Smuzhiyun default:
575*4882a593Smuzhiyun result = -EPERM;
576*4882a593Smuzhiyun break;
577*4882a593Smuzhiyun }
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun return result;
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun
fjes_hw_unregister_buff_addr(struct fjes_hw * hw,int dest_epid)583*4882a593Smuzhiyun int fjes_hw_unregister_buff_addr(struct fjes_hw *hw, int dest_epid)
584*4882a593Smuzhiyun {
585*4882a593Smuzhiyun union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
586*4882a593Smuzhiyun union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
587*4882a593Smuzhiyun struct fjes_device_shared_info *share = hw->hw_info.share;
588*4882a593Smuzhiyun enum fjes_dev_command_response_e ret;
589*4882a593Smuzhiyun int timeout;
590*4882a593Smuzhiyun int result;
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun if (!hw->base)
593*4882a593Smuzhiyun return -EPERM;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun if (!req_buf || !res_buf || !share)
596*4882a593Smuzhiyun return -EPERM;
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun if (!test_bit(dest_epid, &hw->hw_info.buffer_share_bit))
599*4882a593Smuzhiyun return 0;
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun memset(req_buf, 0, hw->hw_info.req_buf_size);
602*4882a593Smuzhiyun memset(res_buf, 0, hw->hw_info.res_buf_size);
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun req_buf->unshare_buffer.length =
605*4882a593Smuzhiyun FJES_DEV_COMMAND_UNSHARE_BUFFER_REQ_LEN;
606*4882a593Smuzhiyun req_buf->unshare_buffer.epid = dest_epid;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun res_buf->unshare_buffer.length = 0;
609*4882a593Smuzhiyun res_buf->unshare_buffer.code = 0;
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun trace_fjes_hw_unregister_buff_addr_req(req_buf);
612*4882a593Smuzhiyun ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_UNSHARE_BUFFER);
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun timeout = FJES_COMMAND_REQ_BUFF_TIMEOUT * 1000;
615*4882a593Smuzhiyun while ((ret == FJES_CMD_STATUS_NORMAL) &&
616*4882a593Smuzhiyun (res_buf->unshare_buffer.length ==
617*4882a593Smuzhiyun FJES_DEV_COMMAND_UNSHARE_BUFFER_RES_LEN) &&
618*4882a593Smuzhiyun (res_buf->unshare_buffer.code ==
619*4882a593Smuzhiyun FJES_CMD_REQ_RES_CODE_BUSY) &&
620*4882a593Smuzhiyun (timeout > 0)) {
621*4882a593Smuzhiyun msleep(200 + hw->my_epid * 20);
622*4882a593Smuzhiyun timeout -= (200 + hw->my_epid * 20);
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun res_buf->unshare_buffer.length = 0;
625*4882a593Smuzhiyun res_buf->unshare_buffer.code = 0;
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun ret =
628*4882a593Smuzhiyun fjes_hw_issue_request_command(hw, FJES_CMD_REQ_UNSHARE_BUFFER);
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun result = 0;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun trace_fjes_hw_unregister_buff_addr(res_buf, timeout);
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun if (res_buf->unshare_buffer.length !=
636*4882a593Smuzhiyun FJES_DEV_COMMAND_UNSHARE_BUFFER_RES_LEN) {
637*4882a593Smuzhiyun trace_fjes_hw_unregister_buff_addr_err("Invalid res_buf");
638*4882a593Smuzhiyun result = -ENOMSG;
639*4882a593Smuzhiyun } else if (ret == FJES_CMD_STATUS_NORMAL) {
640*4882a593Smuzhiyun switch (res_buf->unshare_buffer.code) {
641*4882a593Smuzhiyun case FJES_CMD_REQ_RES_CODE_NORMAL:
642*4882a593Smuzhiyun result = 0;
643*4882a593Smuzhiyun clear_bit(dest_epid, &hw->hw_info.buffer_share_bit);
644*4882a593Smuzhiyun break;
645*4882a593Smuzhiyun case FJES_CMD_REQ_RES_CODE_BUSY:
646*4882a593Smuzhiyun trace_fjes_hw_unregister_buff_addr_err("Busy Timeout");
647*4882a593Smuzhiyun result = -EBUSY;
648*4882a593Smuzhiyun break;
649*4882a593Smuzhiyun default:
650*4882a593Smuzhiyun result = -EPERM;
651*4882a593Smuzhiyun break;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun } else {
654*4882a593Smuzhiyun switch (ret) {
655*4882a593Smuzhiyun case FJES_CMD_STATUS_UNKNOWN:
656*4882a593Smuzhiyun result = -EPERM;
657*4882a593Smuzhiyun break;
658*4882a593Smuzhiyun case FJES_CMD_STATUS_TIMEOUT:
659*4882a593Smuzhiyun trace_fjes_hw_unregister_buff_addr_err("Timeout");
660*4882a593Smuzhiyun result = -EBUSY;
661*4882a593Smuzhiyun break;
662*4882a593Smuzhiyun case FJES_CMD_STATUS_ERROR_PARAM:
663*4882a593Smuzhiyun case FJES_CMD_STATUS_ERROR_STATUS:
664*4882a593Smuzhiyun default:
665*4882a593Smuzhiyun result = -EPERM;
666*4882a593Smuzhiyun break;
667*4882a593Smuzhiyun }
668*4882a593Smuzhiyun }
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun return result;
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun
fjes_hw_raise_interrupt(struct fjes_hw * hw,int dest_epid,enum REG_ICTL_MASK mask)673*4882a593Smuzhiyun int fjes_hw_raise_interrupt(struct fjes_hw *hw, int dest_epid,
674*4882a593Smuzhiyun enum REG_ICTL_MASK mask)
675*4882a593Smuzhiyun {
676*4882a593Smuzhiyun u32 ig = mask | dest_epid;
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun wr32(XSCT_IG, cpu_to_le32(ig));
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun return 0;
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun
fjes_hw_capture_interrupt_status(struct fjes_hw * hw)683*4882a593Smuzhiyun u32 fjes_hw_capture_interrupt_status(struct fjes_hw *hw)
684*4882a593Smuzhiyun {
685*4882a593Smuzhiyun u32 cur_is;
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun cur_is = rd32(XSCT_IS);
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun return cur_is;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun
fjes_hw_set_irqmask(struct fjes_hw * hw,enum REG_ICTL_MASK intr_mask,bool mask)692*4882a593Smuzhiyun void fjes_hw_set_irqmask(struct fjes_hw *hw,
693*4882a593Smuzhiyun enum REG_ICTL_MASK intr_mask, bool mask)
694*4882a593Smuzhiyun {
695*4882a593Smuzhiyun if (mask)
696*4882a593Smuzhiyun wr32(XSCT_IMS, intr_mask);
697*4882a593Smuzhiyun else
698*4882a593Smuzhiyun wr32(XSCT_IMC, intr_mask);
699*4882a593Smuzhiyun }
700*4882a593Smuzhiyun
fjes_hw_epid_is_same_zone(struct fjes_hw * hw,int epid)701*4882a593Smuzhiyun bool fjes_hw_epid_is_same_zone(struct fjes_hw *hw, int epid)
702*4882a593Smuzhiyun {
703*4882a593Smuzhiyun if (epid >= hw->max_epid)
704*4882a593Smuzhiyun return false;
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun if ((hw->ep_shm_info[epid].es_status !=
707*4882a593Smuzhiyun FJES_ZONING_STATUS_ENABLE) ||
708*4882a593Smuzhiyun (hw->ep_shm_info[hw->my_epid].zone ==
709*4882a593Smuzhiyun FJES_ZONING_ZONE_TYPE_NONE))
710*4882a593Smuzhiyun return false;
711*4882a593Smuzhiyun else
712*4882a593Smuzhiyun return (hw->ep_shm_info[epid].zone ==
713*4882a593Smuzhiyun hw->ep_shm_info[hw->my_epid].zone);
714*4882a593Smuzhiyun }
715*4882a593Smuzhiyun
fjes_hw_epid_is_shared(struct fjes_device_shared_info * share,int dest_epid)716*4882a593Smuzhiyun int fjes_hw_epid_is_shared(struct fjes_device_shared_info *share,
717*4882a593Smuzhiyun int dest_epid)
718*4882a593Smuzhiyun {
719*4882a593Smuzhiyun int value = false;
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun if (dest_epid < share->epnum)
722*4882a593Smuzhiyun value = share->ep_status[dest_epid];
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun return value;
725*4882a593Smuzhiyun }
726*4882a593Smuzhiyun
fjes_hw_epid_is_stop_requested(struct fjes_hw * hw,int src_epid)727*4882a593Smuzhiyun static bool fjes_hw_epid_is_stop_requested(struct fjes_hw *hw, int src_epid)
728*4882a593Smuzhiyun {
729*4882a593Smuzhiyun return test_bit(src_epid, &hw->txrx_stop_req_bit);
730*4882a593Smuzhiyun }
731*4882a593Smuzhiyun
fjes_hw_epid_is_stop_process_done(struct fjes_hw * hw,int src_epid)732*4882a593Smuzhiyun static bool fjes_hw_epid_is_stop_process_done(struct fjes_hw *hw, int src_epid)
733*4882a593Smuzhiyun {
734*4882a593Smuzhiyun return (hw->ep_shm_info[src_epid].tx.info->v1i.rx_status &
735*4882a593Smuzhiyun FJES_RX_STOP_REQ_DONE);
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun enum ep_partner_status
fjes_hw_get_partner_ep_status(struct fjes_hw * hw,int epid)739*4882a593Smuzhiyun fjes_hw_get_partner_ep_status(struct fjes_hw *hw, int epid)
740*4882a593Smuzhiyun {
741*4882a593Smuzhiyun enum ep_partner_status status;
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun if (fjes_hw_epid_is_shared(hw->hw_info.share, epid)) {
744*4882a593Smuzhiyun if (fjes_hw_epid_is_stop_requested(hw, epid)) {
745*4882a593Smuzhiyun status = EP_PARTNER_WAITING;
746*4882a593Smuzhiyun } else {
747*4882a593Smuzhiyun if (fjes_hw_epid_is_stop_process_done(hw, epid))
748*4882a593Smuzhiyun status = EP_PARTNER_COMPLETE;
749*4882a593Smuzhiyun else
750*4882a593Smuzhiyun status = EP_PARTNER_SHARED;
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun } else {
753*4882a593Smuzhiyun status = EP_PARTNER_UNSHARE;
754*4882a593Smuzhiyun }
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun return status;
757*4882a593Smuzhiyun }
758*4882a593Smuzhiyun
fjes_hw_raise_epstop(struct fjes_hw * hw)759*4882a593Smuzhiyun void fjes_hw_raise_epstop(struct fjes_hw *hw)
760*4882a593Smuzhiyun {
761*4882a593Smuzhiyun enum ep_partner_status status;
762*4882a593Smuzhiyun unsigned long flags;
763*4882a593Smuzhiyun int epidx;
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun for (epidx = 0; epidx < hw->max_epid; epidx++) {
766*4882a593Smuzhiyun if (epidx == hw->my_epid)
767*4882a593Smuzhiyun continue;
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun status = fjes_hw_get_partner_ep_status(hw, epidx);
770*4882a593Smuzhiyun switch (status) {
771*4882a593Smuzhiyun case EP_PARTNER_SHARED:
772*4882a593Smuzhiyun fjes_hw_raise_interrupt(hw, epidx,
773*4882a593Smuzhiyun REG_ICTL_MASK_TXRX_STOP_REQ);
774*4882a593Smuzhiyun hw->ep_shm_info[epidx].ep_stats.send_intr_unshare += 1;
775*4882a593Smuzhiyun break;
776*4882a593Smuzhiyun default:
777*4882a593Smuzhiyun break;
778*4882a593Smuzhiyun }
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun set_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit);
781*4882a593Smuzhiyun set_bit(epidx, &hw->txrx_stop_req_bit);
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun spin_lock_irqsave(&hw->rx_status_lock, flags);
784*4882a593Smuzhiyun hw->ep_shm_info[epidx].tx.info->v1i.rx_status |=
785*4882a593Smuzhiyun FJES_RX_STOP_REQ_REQUEST;
786*4882a593Smuzhiyun spin_unlock_irqrestore(&hw->rx_status_lock, flags);
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun }
789*4882a593Smuzhiyun
fjes_hw_wait_epstop(struct fjes_hw * hw)790*4882a593Smuzhiyun int fjes_hw_wait_epstop(struct fjes_hw *hw)
791*4882a593Smuzhiyun {
792*4882a593Smuzhiyun enum ep_partner_status status;
793*4882a593Smuzhiyun union ep_buffer_info *info;
794*4882a593Smuzhiyun int wait_time = 0;
795*4882a593Smuzhiyun int epidx;
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun while (hw->hw_info.buffer_unshare_reserve_bit &&
798*4882a593Smuzhiyun (wait_time < FJES_COMMAND_EPSTOP_WAIT_TIMEOUT * 1000)) {
799*4882a593Smuzhiyun for (epidx = 0; epidx < hw->max_epid; epidx++) {
800*4882a593Smuzhiyun if (epidx == hw->my_epid)
801*4882a593Smuzhiyun continue;
802*4882a593Smuzhiyun status = fjes_hw_epid_is_shared(hw->hw_info.share,
803*4882a593Smuzhiyun epidx);
804*4882a593Smuzhiyun info = hw->ep_shm_info[epidx].rx.info;
805*4882a593Smuzhiyun if ((!status ||
806*4882a593Smuzhiyun (info->v1i.rx_status &
807*4882a593Smuzhiyun FJES_RX_STOP_REQ_DONE)) &&
808*4882a593Smuzhiyun test_bit(epidx,
809*4882a593Smuzhiyun &hw->hw_info.buffer_unshare_reserve_bit)) {
810*4882a593Smuzhiyun clear_bit(epidx,
811*4882a593Smuzhiyun &hw->hw_info.buffer_unshare_reserve_bit);
812*4882a593Smuzhiyun }
813*4882a593Smuzhiyun }
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun msleep(100);
816*4882a593Smuzhiyun wait_time += 100;
817*4882a593Smuzhiyun }
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun for (epidx = 0; epidx < hw->max_epid; epidx++) {
820*4882a593Smuzhiyun if (epidx == hw->my_epid)
821*4882a593Smuzhiyun continue;
822*4882a593Smuzhiyun if (test_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit))
823*4882a593Smuzhiyun clear_bit(epidx,
824*4882a593Smuzhiyun &hw->hw_info.buffer_unshare_reserve_bit);
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun return (wait_time < FJES_COMMAND_EPSTOP_WAIT_TIMEOUT * 1000)
828*4882a593Smuzhiyun ? 0 : -EBUSY;
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun
fjes_hw_check_epbuf_version(struct epbuf_handler * epbh,u32 version)831*4882a593Smuzhiyun bool fjes_hw_check_epbuf_version(struct epbuf_handler *epbh, u32 version)
832*4882a593Smuzhiyun {
833*4882a593Smuzhiyun union ep_buffer_info *info = epbh->info;
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun return (info->common.version == version);
836*4882a593Smuzhiyun }
837*4882a593Smuzhiyun
fjes_hw_check_mtu(struct epbuf_handler * epbh,u32 mtu)838*4882a593Smuzhiyun bool fjes_hw_check_mtu(struct epbuf_handler *epbh, u32 mtu)
839*4882a593Smuzhiyun {
840*4882a593Smuzhiyun union ep_buffer_info *info = epbh->info;
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun return ((info->v1i.frame_max == FJES_MTU_TO_FRAME_SIZE(mtu)) &&
843*4882a593Smuzhiyun info->v1i.rx_status & FJES_RX_MTU_CHANGING_DONE);
844*4882a593Smuzhiyun }
845*4882a593Smuzhiyun
fjes_hw_check_vlan_id(struct epbuf_handler * epbh,u16 vlan_id)846*4882a593Smuzhiyun bool fjes_hw_check_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
847*4882a593Smuzhiyun {
848*4882a593Smuzhiyun union ep_buffer_info *info = epbh->info;
849*4882a593Smuzhiyun bool ret = false;
850*4882a593Smuzhiyun int i;
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun if (vlan_id == 0) {
853*4882a593Smuzhiyun ret = true;
854*4882a593Smuzhiyun } else {
855*4882a593Smuzhiyun for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
856*4882a593Smuzhiyun if (vlan_id == info->v1i.vlan_id[i]) {
857*4882a593Smuzhiyun ret = true;
858*4882a593Smuzhiyun break;
859*4882a593Smuzhiyun }
860*4882a593Smuzhiyun }
861*4882a593Smuzhiyun }
862*4882a593Smuzhiyun return ret;
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun
fjes_hw_set_vlan_id(struct epbuf_handler * epbh,u16 vlan_id)865*4882a593Smuzhiyun bool fjes_hw_set_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
866*4882a593Smuzhiyun {
867*4882a593Smuzhiyun union ep_buffer_info *info = epbh->info;
868*4882a593Smuzhiyun int i;
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
871*4882a593Smuzhiyun if (info->v1i.vlan_id[i] == 0) {
872*4882a593Smuzhiyun info->v1i.vlan_id[i] = vlan_id;
873*4882a593Smuzhiyun return true;
874*4882a593Smuzhiyun }
875*4882a593Smuzhiyun }
876*4882a593Smuzhiyun return false;
877*4882a593Smuzhiyun }
878*4882a593Smuzhiyun
fjes_hw_del_vlan_id(struct epbuf_handler * epbh,u16 vlan_id)879*4882a593Smuzhiyun void fjes_hw_del_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
880*4882a593Smuzhiyun {
881*4882a593Smuzhiyun union ep_buffer_info *info = epbh->info;
882*4882a593Smuzhiyun int i;
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun if (0 != vlan_id) {
885*4882a593Smuzhiyun for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
886*4882a593Smuzhiyun if (vlan_id == info->v1i.vlan_id[i])
887*4882a593Smuzhiyun info->v1i.vlan_id[i] = 0;
888*4882a593Smuzhiyun }
889*4882a593Smuzhiyun }
890*4882a593Smuzhiyun }
891*4882a593Smuzhiyun
fjes_hw_epbuf_rx_is_empty(struct epbuf_handler * epbh)892*4882a593Smuzhiyun bool fjes_hw_epbuf_rx_is_empty(struct epbuf_handler *epbh)
893*4882a593Smuzhiyun {
894*4882a593Smuzhiyun union ep_buffer_info *info = epbh->info;
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun if (!(info->v1i.rx_status & FJES_RX_MTU_CHANGING_DONE))
897*4882a593Smuzhiyun return true;
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun if (info->v1i.count_max == 0)
900*4882a593Smuzhiyun return true;
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun return EP_RING_EMPTY(info->v1i.head, info->v1i.tail,
903*4882a593Smuzhiyun info->v1i.count_max);
904*4882a593Smuzhiyun }
905*4882a593Smuzhiyun
fjes_hw_epbuf_rx_curpkt_get_addr(struct epbuf_handler * epbh,size_t * psize)906*4882a593Smuzhiyun void *fjes_hw_epbuf_rx_curpkt_get_addr(struct epbuf_handler *epbh,
907*4882a593Smuzhiyun size_t *psize)
908*4882a593Smuzhiyun {
909*4882a593Smuzhiyun union ep_buffer_info *info = epbh->info;
910*4882a593Smuzhiyun struct esmem_frame *ring_frame;
911*4882a593Smuzhiyun void *frame;
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun ring_frame = (struct esmem_frame *)&(epbh->ring[EP_RING_INDEX
914*4882a593Smuzhiyun (info->v1i.head,
915*4882a593Smuzhiyun info->v1i.count_max) *
916*4882a593Smuzhiyun info->v1i.frame_max]);
917*4882a593Smuzhiyun
918*4882a593Smuzhiyun *psize = (size_t)ring_frame->frame_size;
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun frame = ring_frame->frame_data;
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun return frame;
923*4882a593Smuzhiyun }
924*4882a593Smuzhiyun
fjes_hw_epbuf_rx_curpkt_drop(struct epbuf_handler * epbh)925*4882a593Smuzhiyun void fjes_hw_epbuf_rx_curpkt_drop(struct epbuf_handler *epbh)
926*4882a593Smuzhiyun {
927*4882a593Smuzhiyun union ep_buffer_info *info = epbh->info;
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun if (fjes_hw_epbuf_rx_is_empty(epbh))
930*4882a593Smuzhiyun return;
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun EP_RING_INDEX_INC(epbh->info->v1i.head, info->v1i.count_max);
933*4882a593Smuzhiyun }
934*4882a593Smuzhiyun
fjes_hw_epbuf_tx_pkt_send(struct epbuf_handler * epbh,void * frame,size_t size)935*4882a593Smuzhiyun int fjes_hw_epbuf_tx_pkt_send(struct epbuf_handler *epbh,
936*4882a593Smuzhiyun void *frame, size_t size)
937*4882a593Smuzhiyun {
938*4882a593Smuzhiyun union ep_buffer_info *info = epbh->info;
939*4882a593Smuzhiyun struct esmem_frame *ring_frame;
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun if (EP_RING_FULL(info->v1i.head, info->v1i.tail, info->v1i.count_max))
942*4882a593Smuzhiyun return -ENOBUFS;
943*4882a593Smuzhiyun
944*4882a593Smuzhiyun ring_frame = (struct esmem_frame *)&(epbh->ring[EP_RING_INDEX
945*4882a593Smuzhiyun (info->v1i.tail - 1,
946*4882a593Smuzhiyun info->v1i.count_max) *
947*4882a593Smuzhiyun info->v1i.frame_max]);
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun ring_frame->frame_size = size;
950*4882a593Smuzhiyun memcpy((void *)(ring_frame->frame_data), (void *)frame, size);
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun EP_RING_INDEX_INC(epbh->info->v1i.tail, info->v1i.count_max);
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun return 0;
955*4882a593Smuzhiyun }
956*4882a593Smuzhiyun
fjes_hw_update_zone_task(struct work_struct * work)957*4882a593Smuzhiyun static void fjes_hw_update_zone_task(struct work_struct *work)
958*4882a593Smuzhiyun {
959*4882a593Smuzhiyun struct fjes_hw *hw = container_of(work,
960*4882a593Smuzhiyun struct fjes_hw, update_zone_task);
961*4882a593Smuzhiyun
962*4882a593Smuzhiyun struct my_s {u8 es_status; u8 zone; } *info;
963*4882a593Smuzhiyun union fjes_device_command_res *res_buf;
964*4882a593Smuzhiyun enum ep_partner_status pstatus;
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun struct fjes_adapter *adapter;
967*4882a593Smuzhiyun struct net_device *netdev;
968*4882a593Smuzhiyun unsigned long flags;
969*4882a593Smuzhiyun
970*4882a593Smuzhiyun ulong unshare_bit = 0;
971*4882a593Smuzhiyun ulong share_bit = 0;
972*4882a593Smuzhiyun ulong irq_bit = 0;
973*4882a593Smuzhiyun
974*4882a593Smuzhiyun int epidx;
975*4882a593Smuzhiyun int ret;
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun adapter = (struct fjes_adapter *)hw->back;
978*4882a593Smuzhiyun netdev = adapter->netdev;
979*4882a593Smuzhiyun res_buf = hw->hw_info.res_buf;
980*4882a593Smuzhiyun info = (struct my_s *)&res_buf->info.info;
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun mutex_lock(&hw->hw_info.lock);
983*4882a593Smuzhiyun
984*4882a593Smuzhiyun ret = fjes_hw_request_info(hw);
985*4882a593Smuzhiyun switch (ret) {
986*4882a593Smuzhiyun case -ENOMSG:
987*4882a593Smuzhiyun case -EBUSY:
988*4882a593Smuzhiyun default:
989*4882a593Smuzhiyun if (!work_pending(&adapter->force_close_task)) {
990*4882a593Smuzhiyun adapter->force_reset = true;
991*4882a593Smuzhiyun schedule_work(&adapter->force_close_task);
992*4882a593Smuzhiyun }
993*4882a593Smuzhiyun break;
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun case 0:
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun for (epidx = 0; epidx < hw->max_epid; epidx++) {
998*4882a593Smuzhiyun if (epidx == hw->my_epid) {
999*4882a593Smuzhiyun hw->ep_shm_info[epidx].es_status =
1000*4882a593Smuzhiyun info[epidx].es_status;
1001*4882a593Smuzhiyun hw->ep_shm_info[epidx].zone =
1002*4882a593Smuzhiyun info[epidx].zone;
1003*4882a593Smuzhiyun continue;
1004*4882a593Smuzhiyun }
1005*4882a593Smuzhiyun
1006*4882a593Smuzhiyun pstatus = fjes_hw_get_partner_ep_status(hw, epidx);
1007*4882a593Smuzhiyun switch (pstatus) {
1008*4882a593Smuzhiyun case EP_PARTNER_UNSHARE:
1009*4882a593Smuzhiyun default:
1010*4882a593Smuzhiyun if ((info[epidx].zone !=
1011*4882a593Smuzhiyun FJES_ZONING_ZONE_TYPE_NONE) &&
1012*4882a593Smuzhiyun (info[epidx].es_status ==
1013*4882a593Smuzhiyun FJES_ZONING_STATUS_ENABLE) &&
1014*4882a593Smuzhiyun (info[epidx].zone ==
1015*4882a593Smuzhiyun info[hw->my_epid].zone))
1016*4882a593Smuzhiyun set_bit(epidx, &share_bit);
1017*4882a593Smuzhiyun else
1018*4882a593Smuzhiyun set_bit(epidx, &unshare_bit);
1019*4882a593Smuzhiyun break;
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun case EP_PARTNER_COMPLETE:
1022*4882a593Smuzhiyun case EP_PARTNER_WAITING:
1023*4882a593Smuzhiyun if ((info[epidx].zone ==
1024*4882a593Smuzhiyun FJES_ZONING_ZONE_TYPE_NONE) ||
1025*4882a593Smuzhiyun (info[epidx].es_status !=
1026*4882a593Smuzhiyun FJES_ZONING_STATUS_ENABLE) ||
1027*4882a593Smuzhiyun (info[epidx].zone !=
1028*4882a593Smuzhiyun info[hw->my_epid].zone)) {
1029*4882a593Smuzhiyun set_bit(epidx,
1030*4882a593Smuzhiyun &adapter->unshare_watch_bitmask);
1031*4882a593Smuzhiyun set_bit(epidx,
1032*4882a593Smuzhiyun &hw->hw_info.buffer_unshare_reserve_bit);
1033*4882a593Smuzhiyun }
1034*4882a593Smuzhiyun break;
1035*4882a593Smuzhiyun
1036*4882a593Smuzhiyun case EP_PARTNER_SHARED:
1037*4882a593Smuzhiyun if ((info[epidx].zone ==
1038*4882a593Smuzhiyun FJES_ZONING_ZONE_TYPE_NONE) ||
1039*4882a593Smuzhiyun (info[epidx].es_status !=
1040*4882a593Smuzhiyun FJES_ZONING_STATUS_ENABLE) ||
1041*4882a593Smuzhiyun (info[epidx].zone !=
1042*4882a593Smuzhiyun info[hw->my_epid].zone))
1043*4882a593Smuzhiyun set_bit(epidx, &irq_bit);
1044*4882a593Smuzhiyun break;
1045*4882a593Smuzhiyun }
1046*4882a593Smuzhiyun
1047*4882a593Smuzhiyun hw->ep_shm_info[epidx].es_status =
1048*4882a593Smuzhiyun info[epidx].es_status;
1049*4882a593Smuzhiyun hw->ep_shm_info[epidx].zone = info[epidx].zone;
1050*4882a593Smuzhiyun }
1051*4882a593Smuzhiyun break;
1052*4882a593Smuzhiyun }
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun mutex_unlock(&hw->hw_info.lock);
1055*4882a593Smuzhiyun
1056*4882a593Smuzhiyun for (epidx = 0; epidx < hw->max_epid; epidx++) {
1057*4882a593Smuzhiyun if (epidx == hw->my_epid)
1058*4882a593Smuzhiyun continue;
1059*4882a593Smuzhiyun
1060*4882a593Smuzhiyun if (test_bit(epidx, &share_bit)) {
1061*4882a593Smuzhiyun spin_lock_irqsave(&hw->rx_status_lock, flags);
1062*4882a593Smuzhiyun fjes_hw_setup_epbuf(&hw->ep_shm_info[epidx].tx,
1063*4882a593Smuzhiyun netdev->dev_addr, netdev->mtu);
1064*4882a593Smuzhiyun spin_unlock_irqrestore(&hw->rx_status_lock, flags);
1065*4882a593Smuzhiyun
1066*4882a593Smuzhiyun mutex_lock(&hw->hw_info.lock);
1067*4882a593Smuzhiyun
1068*4882a593Smuzhiyun ret = fjes_hw_register_buff_addr(
1069*4882a593Smuzhiyun hw, epidx, &hw->ep_shm_info[epidx]);
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun switch (ret) {
1072*4882a593Smuzhiyun case 0:
1073*4882a593Smuzhiyun break;
1074*4882a593Smuzhiyun case -ENOMSG:
1075*4882a593Smuzhiyun case -EBUSY:
1076*4882a593Smuzhiyun default:
1077*4882a593Smuzhiyun if (!work_pending(&adapter->force_close_task)) {
1078*4882a593Smuzhiyun adapter->force_reset = true;
1079*4882a593Smuzhiyun schedule_work(
1080*4882a593Smuzhiyun &adapter->force_close_task);
1081*4882a593Smuzhiyun }
1082*4882a593Smuzhiyun break;
1083*4882a593Smuzhiyun }
1084*4882a593Smuzhiyun mutex_unlock(&hw->hw_info.lock);
1085*4882a593Smuzhiyun
1086*4882a593Smuzhiyun hw->ep_shm_info[epidx].ep_stats
1087*4882a593Smuzhiyun .com_regist_buf_exec += 1;
1088*4882a593Smuzhiyun }
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun if (test_bit(epidx, &unshare_bit)) {
1091*4882a593Smuzhiyun mutex_lock(&hw->hw_info.lock);
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun ret = fjes_hw_unregister_buff_addr(hw, epidx);
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun switch (ret) {
1096*4882a593Smuzhiyun case 0:
1097*4882a593Smuzhiyun break;
1098*4882a593Smuzhiyun case -ENOMSG:
1099*4882a593Smuzhiyun case -EBUSY:
1100*4882a593Smuzhiyun default:
1101*4882a593Smuzhiyun if (!work_pending(&adapter->force_close_task)) {
1102*4882a593Smuzhiyun adapter->force_reset = true;
1103*4882a593Smuzhiyun schedule_work(
1104*4882a593Smuzhiyun &adapter->force_close_task);
1105*4882a593Smuzhiyun }
1106*4882a593Smuzhiyun break;
1107*4882a593Smuzhiyun }
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun mutex_unlock(&hw->hw_info.lock);
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun hw->ep_shm_info[epidx].ep_stats
1112*4882a593Smuzhiyun .com_unregist_buf_exec += 1;
1113*4882a593Smuzhiyun
1114*4882a593Smuzhiyun if (ret == 0) {
1115*4882a593Smuzhiyun spin_lock_irqsave(&hw->rx_status_lock, flags);
1116*4882a593Smuzhiyun fjes_hw_setup_epbuf(
1117*4882a593Smuzhiyun &hw->ep_shm_info[epidx].tx,
1118*4882a593Smuzhiyun netdev->dev_addr, netdev->mtu);
1119*4882a593Smuzhiyun spin_unlock_irqrestore(&hw->rx_status_lock,
1120*4882a593Smuzhiyun flags);
1121*4882a593Smuzhiyun }
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun if (test_bit(epidx, &irq_bit)) {
1125*4882a593Smuzhiyun fjes_hw_raise_interrupt(hw, epidx,
1126*4882a593Smuzhiyun REG_ICTL_MASK_TXRX_STOP_REQ);
1127*4882a593Smuzhiyun
1128*4882a593Smuzhiyun hw->ep_shm_info[epidx].ep_stats.send_intr_unshare += 1;
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun set_bit(epidx, &hw->txrx_stop_req_bit);
1131*4882a593Smuzhiyun spin_lock_irqsave(&hw->rx_status_lock, flags);
1132*4882a593Smuzhiyun hw->ep_shm_info[epidx].tx.
1133*4882a593Smuzhiyun info->v1i.rx_status |=
1134*4882a593Smuzhiyun FJES_RX_STOP_REQ_REQUEST;
1135*4882a593Smuzhiyun spin_unlock_irqrestore(&hw->rx_status_lock, flags);
1136*4882a593Smuzhiyun set_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit);
1137*4882a593Smuzhiyun }
1138*4882a593Smuzhiyun }
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun if (irq_bit || adapter->unshare_watch_bitmask) {
1141*4882a593Smuzhiyun if (!work_pending(&adapter->unshare_watch_task))
1142*4882a593Smuzhiyun queue_work(adapter->control_wq,
1143*4882a593Smuzhiyun &adapter->unshare_watch_task);
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun }
1146*4882a593Smuzhiyun
fjes_hw_epstop_task(struct work_struct * work)1147*4882a593Smuzhiyun static void fjes_hw_epstop_task(struct work_struct *work)
1148*4882a593Smuzhiyun {
1149*4882a593Smuzhiyun struct fjes_hw *hw = container_of(work, struct fjes_hw, epstop_task);
1150*4882a593Smuzhiyun struct fjes_adapter *adapter = (struct fjes_adapter *)hw->back;
1151*4882a593Smuzhiyun unsigned long flags;
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun ulong remain_bit;
1154*4882a593Smuzhiyun int epid_bit;
1155*4882a593Smuzhiyun
1156*4882a593Smuzhiyun while ((remain_bit = hw->epstop_req_bit)) {
1157*4882a593Smuzhiyun for (epid_bit = 0; remain_bit; remain_bit >>= 1, epid_bit++) {
1158*4882a593Smuzhiyun if (remain_bit & 1) {
1159*4882a593Smuzhiyun spin_lock_irqsave(&hw->rx_status_lock, flags);
1160*4882a593Smuzhiyun hw->ep_shm_info[epid_bit].
1161*4882a593Smuzhiyun tx.info->v1i.rx_status |=
1162*4882a593Smuzhiyun FJES_RX_STOP_REQ_DONE;
1163*4882a593Smuzhiyun spin_unlock_irqrestore(&hw->rx_status_lock,
1164*4882a593Smuzhiyun flags);
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun clear_bit(epid_bit, &hw->epstop_req_bit);
1167*4882a593Smuzhiyun set_bit(epid_bit,
1168*4882a593Smuzhiyun &adapter->unshare_watch_bitmask);
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun if (!work_pending(&adapter->unshare_watch_task))
1171*4882a593Smuzhiyun queue_work(
1172*4882a593Smuzhiyun adapter->control_wq,
1173*4882a593Smuzhiyun &adapter->unshare_watch_task);
1174*4882a593Smuzhiyun }
1175*4882a593Smuzhiyun }
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun }
1178*4882a593Smuzhiyun
fjes_hw_start_debug(struct fjes_hw * hw)1179*4882a593Smuzhiyun int fjes_hw_start_debug(struct fjes_hw *hw)
1180*4882a593Smuzhiyun {
1181*4882a593Smuzhiyun union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
1182*4882a593Smuzhiyun union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
1183*4882a593Smuzhiyun enum fjes_dev_command_response_e ret;
1184*4882a593Smuzhiyun int page_count;
1185*4882a593Smuzhiyun int result = 0;
1186*4882a593Smuzhiyun void *addr;
1187*4882a593Smuzhiyun int i;
1188*4882a593Smuzhiyun
1189*4882a593Smuzhiyun if (!hw->hw_info.trace)
1190*4882a593Smuzhiyun return -EPERM;
1191*4882a593Smuzhiyun memset(hw->hw_info.trace, 0, FJES_DEBUG_BUFFER_SIZE);
1192*4882a593Smuzhiyun
1193*4882a593Smuzhiyun memset(req_buf, 0, hw->hw_info.req_buf_size);
1194*4882a593Smuzhiyun memset(res_buf, 0, hw->hw_info.res_buf_size);
1195*4882a593Smuzhiyun
1196*4882a593Smuzhiyun req_buf->start_trace.length =
1197*4882a593Smuzhiyun FJES_DEV_COMMAND_START_DBG_REQ_LEN(hw->hw_info.trace_size);
1198*4882a593Smuzhiyun req_buf->start_trace.mode = hw->debug_mode;
1199*4882a593Smuzhiyun req_buf->start_trace.buffer_len = hw->hw_info.trace_size;
1200*4882a593Smuzhiyun page_count = hw->hw_info.trace_size / FJES_DEBUG_PAGE_SIZE;
1201*4882a593Smuzhiyun for (i = 0; i < page_count; i++) {
1202*4882a593Smuzhiyun addr = ((u8 *)hw->hw_info.trace) + i * FJES_DEBUG_PAGE_SIZE;
1203*4882a593Smuzhiyun req_buf->start_trace.buffer[i] =
1204*4882a593Smuzhiyun (__le64)(page_to_phys(vmalloc_to_page(addr)) +
1205*4882a593Smuzhiyun offset_in_page(addr));
1206*4882a593Smuzhiyun }
1207*4882a593Smuzhiyun
1208*4882a593Smuzhiyun res_buf->start_trace.length = 0;
1209*4882a593Smuzhiyun res_buf->start_trace.code = 0;
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun trace_fjes_hw_start_debug_req(req_buf);
1212*4882a593Smuzhiyun ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_START_DEBUG);
1213*4882a593Smuzhiyun trace_fjes_hw_start_debug(res_buf);
1214*4882a593Smuzhiyun
1215*4882a593Smuzhiyun if (res_buf->start_trace.length !=
1216*4882a593Smuzhiyun FJES_DEV_COMMAND_START_DBG_RES_LEN) {
1217*4882a593Smuzhiyun result = -ENOMSG;
1218*4882a593Smuzhiyun trace_fjes_hw_start_debug_err("Invalid res_buf");
1219*4882a593Smuzhiyun } else if (ret == FJES_CMD_STATUS_NORMAL) {
1220*4882a593Smuzhiyun switch (res_buf->start_trace.code) {
1221*4882a593Smuzhiyun case FJES_CMD_REQ_RES_CODE_NORMAL:
1222*4882a593Smuzhiyun result = 0;
1223*4882a593Smuzhiyun break;
1224*4882a593Smuzhiyun default:
1225*4882a593Smuzhiyun result = -EPERM;
1226*4882a593Smuzhiyun break;
1227*4882a593Smuzhiyun }
1228*4882a593Smuzhiyun } else {
1229*4882a593Smuzhiyun switch (ret) {
1230*4882a593Smuzhiyun case FJES_CMD_STATUS_UNKNOWN:
1231*4882a593Smuzhiyun result = -EPERM;
1232*4882a593Smuzhiyun break;
1233*4882a593Smuzhiyun case FJES_CMD_STATUS_TIMEOUT:
1234*4882a593Smuzhiyun trace_fjes_hw_start_debug_err("Busy Timeout");
1235*4882a593Smuzhiyun result = -EBUSY;
1236*4882a593Smuzhiyun break;
1237*4882a593Smuzhiyun case FJES_CMD_STATUS_ERROR_PARAM:
1238*4882a593Smuzhiyun case FJES_CMD_STATUS_ERROR_STATUS:
1239*4882a593Smuzhiyun default:
1240*4882a593Smuzhiyun result = -EPERM;
1241*4882a593Smuzhiyun break;
1242*4882a593Smuzhiyun }
1243*4882a593Smuzhiyun }
1244*4882a593Smuzhiyun
1245*4882a593Smuzhiyun return result;
1246*4882a593Smuzhiyun }
1247*4882a593Smuzhiyun
fjes_hw_stop_debug(struct fjes_hw * hw)1248*4882a593Smuzhiyun int fjes_hw_stop_debug(struct fjes_hw *hw)
1249*4882a593Smuzhiyun {
1250*4882a593Smuzhiyun union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
1251*4882a593Smuzhiyun union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
1252*4882a593Smuzhiyun enum fjes_dev_command_response_e ret;
1253*4882a593Smuzhiyun int result = 0;
1254*4882a593Smuzhiyun
1255*4882a593Smuzhiyun if (!hw->hw_info.trace)
1256*4882a593Smuzhiyun return -EPERM;
1257*4882a593Smuzhiyun
1258*4882a593Smuzhiyun memset(req_buf, 0, hw->hw_info.req_buf_size);
1259*4882a593Smuzhiyun memset(res_buf, 0, hw->hw_info.res_buf_size);
1260*4882a593Smuzhiyun req_buf->stop_trace.length = FJES_DEV_COMMAND_STOP_DBG_REQ_LEN;
1261*4882a593Smuzhiyun
1262*4882a593Smuzhiyun res_buf->stop_trace.length = 0;
1263*4882a593Smuzhiyun res_buf->stop_trace.code = 0;
1264*4882a593Smuzhiyun
1265*4882a593Smuzhiyun ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_STOP_DEBUG);
1266*4882a593Smuzhiyun trace_fjes_hw_stop_debug(res_buf);
1267*4882a593Smuzhiyun
1268*4882a593Smuzhiyun if (res_buf->stop_trace.length != FJES_DEV_COMMAND_STOP_DBG_RES_LEN) {
1269*4882a593Smuzhiyun trace_fjes_hw_stop_debug_err("Invalid res_buf");
1270*4882a593Smuzhiyun result = -ENOMSG;
1271*4882a593Smuzhiyun } else if (ret == FJES_CMD_STATUS_NORMAL) {
1272*4882a593Smuzhiyun switch (res_buf->stop_trace.code) {
1273*4882a593Smuzhiyun case FJES_CMD_REQ_RES_CODE_NORMAL:
1274*4882a593Smuzhiyun result = 0;
1275*4882a593Smuzhiyun hw->debug_mode = 0;
1276*4882a593Smuzhiyun break;
1277*4882a593Smuzhiyun default:
1278*4882a593Smuzhiyun result = -EPERM;
1279*4882a593Smuzhiyun break;
1280*4882a593Smuzhiyun }
1281*4882a593Smuzhiyun } else {
1282*4882a593Smuzhiyun switch (ret) {
1283*4882a593Smuzhiyun case FJES_CMD_STATUS_UNKNOWN:
1284*4882a593Smuzhiyun result = -EPERM;
1285*4882a593Smuzhiyun break;
1286*4882a593Smuzhiyun case FJES_CMD_STATUS_TIMEOUT:
1287*4882a593Smuzhiyun result = -EBUSY;
1288*4882a593Smuzhiyun trace_fjes_hw_stop_debug_err("Busy Timeout");
1289*4882a593Smuzhiyun break;
1290*4882a593Smuzhiyun case FJES_CMD_STATUS_ERROR_PARAM:
1291*4882a593Smuzhiyun case FJES_CMD_STATUS_ERROR_STATUS:
1292*4882a593Smuzhiyun default:
1293*4882a593Smuzhiyun result = -EPERM;
1294*4882a593Smuzhiyun break;
1295*4882a593Smuzhiyun }
1296*4882a593Smuzhiyun }
1297*4882a593Smuzhiyun
1298*4882a593Smuzhiyun return result;
1299*4882a593Smuzhiyun }
1300