1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /****************************************************************************** 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * (C)Copyright 1998,1999 SysKonnect, 5*4882a593Smuzhiyun * a business unit of Schneider & Koch & Co. Datensysteme GmbH. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * The information in this file is provided "AS IS" without warranty. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun ******************************************************************************/ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * Operating system-dependent definitions that have to be defined 13*4882a593Smuzhiyun * before any other header files are included. 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun // HWM (HardWare Module) Definitions 17*4882a593Smuzhiyun // ----------------------- 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #include <asm/byteorder.h> 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #ifdef __LITTLE_ENDIAN 22*4882a593Smuzhiyun #define LITTLE_ENDIAN 23*4882a593Smuzhiyun #else 24*4882a593Smuzhiyun #define BIG_ENDIAN 25*4882a593Smuzhiyun #endif 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun // this is set in the makefile 28*4882a593Smuzhiyun // #define PCI /* only PCI adapters supported by this driver */ 29*4882a593Smuzhiyun // #define MEM_MAPPED_IO /* use memory mapped I/O */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define USE_CAN_ADDR /* DA and SA in MAC header are canonical. */ 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define MB_OUTSIDE_SMC /* SMT Mbufs outside of smc struct. */ 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun // ----------------------- 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun // SMT Definitions 40*4882a593Smuzhiyun // ----------------------- 41*4882a593Smuzhiyun #define SYNC /* allow synchronous frames */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun // #define SBA /* Synchronous Bandwidth Allocator support */ 44*4882a593Smuzhiyun /* not available as free source */ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #define ESS /* SBA End Station Support */ 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define SMT_PANIC(smc, nr, msg) printk(KERN_INFO "SMT PANIC: code: %d, msg: %s\n",nr,msg) 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #ifdef DEBUG 52*4882a593Smuzhiyun #define printf(s,args...) printk(KERN_INFO s, ## args) 53*4882a593Smuzhiyun #endif 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun // #define HW_PTR u_long 56*4882a593Smuzhiyun // ----------------------- 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun // HWM and OS-specific buffer definitions 61*4882a593Smuzhiyun // ----------------------- 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun // default number of receive buffers. 64*4882a593Smuzhiyun #define NUM_RECEIVE_BUFFERS 10 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun // default number of transmit buffers. 67*4882a593Smuzhiyun #define NUM_TRANSMIT_BUFFERS 10 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun // Number of SMT buffers (Mbufs). 70*4882a593Smuzhiyun #define NUM_SMT_BUF 4 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun // Number of TXDs for asynchronous transmit queue. 73*4882a593Smuzhiyun #define HWM_ASYNC_TXD_COUNT (NUM_TRANSMIT_BUFFERS + NUM_SMT_BUF) 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun // Number of TXDs for synchronous transmit queue. 76*4882a593Smuzhiyun #define HWM_SYNC_TXD_COUNT HWM_ASYNC_TXD_COUNT 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun // Number of RXDs for receive queue #1. 80*4882a593Smuzhiyun // Note: Workaround for ASIC Errata #7: One extra RXD is required. 81*4882a593Smuzhiyun #if (NUM_RECEIVE_BUFFERS > 100) 82*4882a593Smuzhiyun #define SMT_R1_RXD_COUNT (1 + 100) 83*4882a593Smuzhiyun #else 84*4882a593Smuzhiyun #define SMT_R1_RXD_COUNT (1 + NUM_RECEIVE_BUFFERS) 85*4882a593Smuzhiyun #endif 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun // Number of RXDs for receive queue #2. 88*4882a593Smuzhiyun #define SMT_R2_RXD_COUNT 0 // Not used. 89*4882a593Smuzhiyun // ----------------------- 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* 94*4882a593Smuzhiyun * OS-specific part of the transmit/receive descriptor structure (TXD/RXD). 95*4882a593Smuzhiyun * 96*4882a593Smuzhiyun * Note: The size of these structures must follow this rule: 97*4882a593Smuzhiyun * 98*4882a593Smuzhiyun * sizeof(struct) + 2*sizeof(void*) == n * 16, n >= 1 99*4882a593Smuzhiyun * 100*4882a593Smuzhiyun * We use the dma_addr fields under Linux to keep track of the 101*4882a593Smuzhiyun * DMA address of the packet data, for later pci_unmap_single. -DaveM 102*4882a593Smuzhiyun */ 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun struct s_txd_os { // os-specific part of transmit descriptor 105*4882a593Smuzhiyun struct sk_buff *skb; 106*4882a593Smuzhiyun dma_addr_t dma_addr; 107*4882a593Smuzhiyun } ; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun struct s_rxd_os { // os-specific part of receive descriptor 110*4882a593Smuzhiyun struct sk_buff *skb; 111*4882a593Smuzhiyun dma_addr_t dma_addr; 112*4882a593Smuzhiyun } ; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun /* 116*4882a593Smuzhiyun * So we do not need to make too many modifications to the generic driver 117*4882a593Smuzhiyun * parts, we take advantage of the AIX byte swapping macro interface. 118*4882a593Smuzhiyun */ 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #define AIX_REVERSE(x) ((u32)le32_to_cpu((u32)(x))) 121*4882a593Smuzhiyun #define MDR_REVERSE(x) ((u32)le32_to_cpu((u32)(x))) 122