xref: /OK3568_Linux_fs/kernel/drivers/net/fddi/skfp/h/hwmtm.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /******************************************************************************
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  *	(C)Copyright 1998,1999 SysKonnect,
5*4882a593Smuzhiyun  *	a business unit of Schneider & Koch & Co. Datensysteme GmbH.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *	The information in this file is provided "AS IS" without warranty.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  ******************************************************************************/
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef	_HWM_
12*4882a593Smuzhiyun #define	_HWM_
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include "mbuf.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun  * MACRO for DMA synchronization:
18*4882a593Smuzhiyun  *	The descriptor 'desc' is flushed for the device 'flag'.
19*4882a593Smuzhiyun  *	Devices are the CPU (DDI_DMA_SYNC_FORCPU) and the
20*4882a593Smuzhiyun  *	adapter (DDI_DMA_SYNC_FORDEV).
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  *	'desc'	Pointer to a Rx or Tx descriptor.
23*4882a593Smuzhiyun  *	'flag'	Flag for direction (view for CPU or DEVICE) that
24*4882a593Smuzhiyun  *		should be synchronized.
25*4882a593Smuzhiyun  *
26*4882a593Smuzhiyun  *	Empty macros and defines are specified here. The real macro
27*4882a593Smuzhiyun  *	is os-specific and should be defined in osdef1st.h.
28*4882a593Smuzhiyun  */
29*4882a593Smuzhiyun #ifndef DRV_BUF_FLUSH
30*4882a593Smuzhiyun #define DRV_BUF_FLUSH(desc,flag)
31*4882a593Smuzhiyun #define DDI_DMA_SYNC_FORCPU
32*4882a593Smuzhiyun #define DDI_DMA_SYNC_FORDEV
33*4882a593Smuzhiyun #endif
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	/*
36*4882a593Smuzhiyun 	 * hardware modul dependent receive modes
37*4882a593Smuzhiyun 	 */
38*4882a593Smuzhiyun #define	RX_ENABLE_PASS_SMT	21
39*4882a593Smuzhiyun #define	RX_DISABLE_PASS_SMT	22
40*4882a593Smuzhiyun #define	RX_ENABLE_PASS_NSA	23
41*4882a593Smuzhiyun #define	RX_DISABLE_PASS_NSA	24
42*4882a593Smuzhiyun #define	RX_ENABLE_PASS_DB	25
43*4882a593Smuzhiyun #define	RX_DISABLE_PASS_DB	26
44*4882a593Smuzhiyun #define	RX_DISABLE_PASS_ALL	27
45*4882a593Smuzhiyun #define	RX_DISABLE_LLC_PROMISC	28
46*4882a593Smuzhiyun #define	RX_ENABLE_LLC_PROMISC	29
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #ifndef	DMA_RD
50*4882a593Smuzhiyun #define DMA_RD		1	/* memory -> hw */
51*4882a593Smuzhiyun #endif
52*4882a593Smuzhiyun #ifndef DMA_WR
53*4882a593Smuzhiyun #define DMA_WR		2	/* hw -> memory */
54*4882a593Smuzhiyun #endif
55*4882a593Smuzhiyun #define SMT_BUF		0x80
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	/*
58*4882a593Smuzhiyun 	 * bits of the frame status byte
59*4882a593Smuzhiyun 	 */
60*4882a593Smuzhiyun #define EN_IRQ_EOF	0x02	/* get IRQ after end of frame transmission */
61*4882a593Smuzhiyun #define	LOC_TX		0x04	/* send frame to the local SMT */
62*4882a593Smuzhiyun #define LAST_FRAG	0x08	/* last TxD of the frame */
63*4882a593Smuzhiyun #define	FIRST_FRAG	0x10	/* first TxD of the frame */
64*4882a593Smuzhiyun #define	LAN_TX		0x20	/* send frame to network if set */
65*4882a593Smuzhiyun #define RING_DOWN	0x40	/* error: unable to send, ring down */
66*4882a593Smuzhiyun #define OUT_OF_TXD	0x80	/* error: not enough TxDs available */
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #ifndef NULL
70*4882a593Smuzhiyun #define NULL 		0
71*4882a593Smuzhiyun #endif
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun #define C_INDIC		(1L<<25)
74*4882a593Smuzhiyun #define A_INDIC		(1L<<26)
75*4882a593Smuzhiyun #define	RD_FS_LOCAL	0x80
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	/*
78*4882a593Smuzhiyun 	 * DEBUG FLAGS
79*4882a593Smuzhiyun 	 */
80*4882a593Smuzhiyun #define	DEBUG_SMTF	1
81*4882a593Smuzhiyun #define	DEBUG_SMT	2
82*4882a593Smuzhiyun #define	DEBUG_ECM	3
83*4882a593Smuzhiyun #define	DEBUG_RMT	4
84*4882a593Smuzhiyun #define	DEBUG_CFM	5
85*4882a593Smuzhiyun #define	DEBUG_PCM	6
86*4882a593Smuzhiyun #define	DEBUG_SBA	7
87*4882a593Smuzhiyun #define	DEBUG_ESS	8
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun #define	DB_HWM_RX	10
90*4882a593Smuzhiyun #define	DB_HWM_TX	11
91*4882a593Smuzhiyun #define DB_HWM_GEN	12
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun struct s_mbuf_pool {
94*4882a593Smuzhiyun #ifndef	MB_OUTSIDE_SMC
95*4882a593Smuzhiyun 	SMbuf		mb[MAX_MBUF] ;		/* mbuf pool */
96*4882a593Smuzhiyun #endif
97*4882a593Smuzhiyun 	SMbuf		*mb_start ;		/* points to the first mb */
98*4882a593Smuzhiyun 	SMbuf		*mb_free ;		/* free queue */
99*4882a593Smuzhiyun } ;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun struct hwm_r {
102*4882a593Smuzhiyun 	/*
103*4882a593Smuzhiyun 	 * hardware modul specific receive variables
104*4882a593Smuzhiyun 	 */
105*4882a593Smuzhiyun 	u_int			len ;		/* length of the whole frame */
106*4882a593Smuzhiyun 	char			*mb_pos ;	/* SMbuf receive position */
107*4882a593Smuzhiyun } ;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun struct hw_modul {
110*4882a593Smuzhiyun 	/*
111*4882a593Smuzhiyun 	 * All hardware modul specific variables
112*4882a593Smuzhiyun 	 */
113*4882a593Smuzhiyun 	struct	s_mbuf_pool	mbuf_pool ;
114*4882a593Smuzhiyun 	struct	hwm_r	r ;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	union s_fp_descr volatile *descr_p ; /* points to the desriptor area */
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	u_short pass_SMT ;		/* pass SMT frames */
119*4882a593Smuzhiyun 	u_short pass_NSA ;		/* pass all NSA frames */
120*4882a593Smuzhiyun 	u_short pass_DB ;		/* pass Direct Beacon Frames */
121*4882a593Smuzhiyun 	u_short pass_llc_promisc ;	/* pass all llc frames (default ON) */
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	SMbuf	*llc_rx_pipe ;		/* points to the first queued llc fr */
124*4882a593Smuzhiyun 	SMbuf	*llc_rx_tail ;		/* points to the last queued llc fr */
125*4882a593Smuzhiyun 	int	queued_rx_frames ;	/* number of queued frames */
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	SMbuf	*txd_tx_pipe ;		/* points to first mb in the txd ring */
128*4882a593Smuzhiyun 	SMbuf	*txd_tx_tail ;		/* points to last mb in the txd ring */
129*4882a593Smuzhiyun 	int	queued_txd_mb ;		/* number of SMT MBufs in txd ring */
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	int	rx_break ;		/* rev. was breaked because ind. off */
132*4882a593Smuzhiyun 	int	leave_isr ;		/* leave fddi_isr immedeately if set */
133*4882a593Smuzhiyun 	int	isr_flag ;		/* set, when HWM is entered from isr */
134*4882a593Smuzhiyun 	/*
135*4882a593Smuzhiyun 	 * variables for the current transmit frame
136*4882a593Smuzhiyun 	 */
137*4882a593Smuzhiyun 	struct s_smt_tx_queue *tx_p ;	/* pointer to the transmit queue */
138*4882a593Smuzhiyun 	u_long	tx_descr ;		/* tx descriptor for FORMAC+ */
139*4882a593Smuzhiyun 	int	tx_len ;		/* tx frame length */
140*4882a593Smuzhiyun 	SMbuf	*tx_mb ;		/* SMT tx MBuf pointer */
141*4882a593Smuzhiyun 	char	*tx_data ;		/* data pointer to the SMT tx Mbuf */
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	int	detec_count ;		/* counter for out of RxD condition */
144*4882a593Smuzhiyun 	u_long	rx_len_error ;		/* rx len FORMAC != sum of fragments */
145*4882a593Smuzhiyun } ;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun /*
149*4882a593Smuzhiyun  * DEBUG structs and macros
150*4882a593Smuzhiyun  */
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun #ifdef	DEBUG
153*4882a593Smuzhiyun struct os_debug {
154*4882a593Smuzhiyun 	int	hwm_rx ;
155*4882a593Smuzhiyun 	int	hwm_tx ;
156*4882a593Smuzhiyun 	int	hwm_gen ;
157*4882a593Smuzhiyun } ;
158*4882a593Smuzhiyun #endif
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun #ifdef	DEBUG
161*4882a593Smuzhiyun #ifdef	DEBUG_BRD
162*4882a593Smuzhiyun #define	DB_P	smc->debug
163*4882a593Smuzhiyun #else
164*4882a593Smuzhiyun #define DB_P	debug
165*4882a593Smuzhiyun #endif
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun #define DB_RX(lev, fmt, ...)						\
168*4882a593Smuzhiyun do {									\
169*4882a593Smuzhiyun 	if (DB_P.d_os.hwm_rx >= (lev))					\
170*4882a593Smuzhiyun 		printf(fmt "\n", ##__VA_ARGS__);			\
171*4882a593Smuzhiyun } while (0)
172*4882a593Smuzhiyun #define DB_TX(lev, fmt, ...)						\
173*4882a593Smuzhiyun do {									\
174*4882a593Smuzhiyun 	if (DB_P.d_os.hwm_tx >= (lev))					\
175*4882a593Smuzhiyun 		printf(fmt "\n", ##__VA_ARGS__);			\
176*4882a593Smuzhiyun } while (0)
177*4882a593Smuzhiyun #define DB_GEN(lev, fmt, ...)						\
178*4882a593Smuzhiyun do {									\
179*4882a593Smuzhiyun 	if (DB_P.d_os.hwm_gen >= (lev))					\
180*4882a593Smuzhiyun 		printf(fmt "\n", ##__VA_ARGS__);			\
181*4882a593Smuzhiyun } while (0)
182*4882a593Smuzhiyun #else	/* DEBUG */
183*4882a593Smuzhiyun #define DB_RX(lev, fmt, ...)	no_printk(fmt "\n", ##__VA_ARGS__)
184*4882a593Smuzhiyun #define DB_TX(lev, fmt, ...)	no_printk(fmt "\n", ##__VA_ARGS__)
185*4882a593Smuzhiyun #define DB_GEN(lev, fmt, ...)	no_printk(fmt "\n", ##__VA_ARGS__)
186*4882a593Smuzhiyun #endif	/* DEBUG */
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun #ifndef	SK_BREAK
189*4882a593Smuzhiyun #define	SK_BREAK()
190*4882a593Smuzhiyun #endif
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun /*
194*4882a593Smuzhiyun  * HWM Macros
195*4882a593Smuzhiyun  */
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun /*
198*4882a593Smuzhiyun  *	BEGIN_MANUAL_ENTRY(HWM_GET_TX_PHYS)
199*4882a593Smuzhiyun  *	u_long HWM_GET_TX_PHYS(txd)
200*4882a593Smuzhiyun  *
201*4882a593Smuzhiyun  * function	MACRO		(hardware module, hwmtm.h)
202*4882a593Smuzhiyun  *		This macro may be invoked by the OS-specific module to read
203*4882a593Smuzhiyun  *		the physical address of the specified TxD.
204*4882a593Smuzhiyun  *
205*4882a593Smuzhiyun  * para	txd	pointer to the TxD
206*4882a593Smuzhiyun  *
207*4882a593Smuzhiyun  *	END_MANUAL_ENTRY
208*4882a593Smuzhiyun  */
209*4882a593Smuzhiyun #define	HWM_GET_TX_PHYS(txd)		(u_long)AIX_REVERSE((txd)->txd_tbadr)
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun /*
212*4882a593Smuzhiyun  *	BEGIN_MANUAL_ENTRY(HWM_GET_TX_LEN)
213*4882a593Smuzhiyun  *	int HWM_GET_TX_LEN(txd)
214*4882a593Smuzhiyun  *
215*4882a593Smuzhiyun  * function	MACRO		(hardware module, hwmtm.h)
216*4882a593Smuzhiyun  *		This macro may be invoked by the OS-specific module to read
217*4882a593Smuzhiyun  *		the fragment length of the specified TxD
218*4882a593Smuzhiyun  *
219*4882a593Smuzhiyun  * para	rxd	pointer to the TxD
220*4882a593Smuzhiyun  *
221*4882a593Smuzhiyun  * return	the length of the fragment in bytes
222*4882a593Smuzhiyun  *
223*4882a593Smuzhiyun  *	END_MANUAL_ENTRY
224*4882a593Smuzhiyun  */
225*4882a593Smuzhiyun #define	HWM_GET_TX_LEN(txd)	((int)AIX_REVERSE((txd)->txd_tbctrl)& RD_LENGTH)
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun /*
228*4882a593Smuzhiyun  *	BEGIN_MANUAL_ENTRY(HWM_GET_TX_USED)
229*4882a593Smuzhiyun  *	txd *HWM_GET_TX_USED(smc,queue)
230*4882a593Smuzhiyun  *
231*4882a593Smuzhiyun  * function	MACRO		(hardware module, hwmtm.h)
232*4882a593Smuzhiyun  *		This macro may be invoked by the OS-specific module to get the
233*4882a593Smuzhiyun  *		number of used TxDs for the queue, specified by the index.
234*4882a593Smuzhiyun  *
235*4882a593Smuzhiyun  * para	queue	the number of the send queue: Can be specified by
236*4882a593Smuzhiyun  *		QUEUE_A0, QUEUE_S or (frame_status & QUEUE_A0)
237*4882a593Smuzhiyun  *
238*4882a593Smuzhiyun  * return	number of used TxDs for this send queue
239*4882a593Smuzhiyun  *
240*4882a593Smuzhiyun  *	END_MANUAL_ENTRY
241*4882a593Smuzhiyun  */
242*4882a593Smuzhiyun #define	HWM_GET_TX_USED(smc,queue)	(int) (smc)->hw.fp.tx_q[queue].tx_used
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun /*
245*4882a593Smuzhiyun  *	BEGIN_MANUAL_ENTRY(HWM_GET_CURR_TXD)
246*4882a593Smuzhiyun  *	txd *HWM_GET_CURR_TXD(smc,queue)
247*4882a593Smuzhiyun  *
248*4882a593Smuzhiyun  * function	MACRO		(hardware module, hwmtm.h)
249*4882a593Smuzhiyun  *		This macro may be invoked by the OS-specific module to get the
250*4882a593Smuzhiyun  *		pointer to the TxD which points to the current queue put
251*4882a593Smuzhiyun  *		position.
252*4882a593Smuzhiyun  *
253*4882a593Smuzhiyun  * para	queue	the number of the send queue: Can be specified by
254*4882a593Smuzhiyun  *		QUEUE_A0, QUEUE_S or (frame_status & QUEUE_A0)
255*4882a593Smuzhiyun  *
256*4882a593Smuzhiyun  * return	pointer to the current TxD
257*4882a593Smuzhiyun  *
258*4882a593Smuzhiyun  *	END_MANUAL_ENTRY
259*4882a593Smuzhiyun  */
260*4882a593Smuzhiyun #define	HWM_GET_CURR_TXD(smc,queue)	(struct s_smt_fp_txd volatile *)\
261*4882a593Smuzhiyun 					(smc)->hw.fp.tx_q[queue].tx_curr_put
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun /*
264*4882a593Smuzhiyun  *	BEGIN_MANUAL_ENTRY(HWM_GET_RX_FRAG_LEN)
265*4882a593Smuzhiyun  *	int HWM_GET_RX_FRAG_LEN(rxd)
266*4882a593Smuzhiyun  *
267*4882a593Smuzhiyun  * function	MACRO		(hardware module, hwmtm.h)
268*4882a593Smuzhiyun  *		This macro may be invoked by the OS-specific module to read
269*4882a593Smuzhiyun  *		the fragment length of the specified RxD
270*4882a593Smuzhiyun  *
271*4882a593Smuzhiyun  * para	rxd	pointer to the RxD
272*4882a593Smuzhiyun  *
273*4882a593Smuzhiyun  * return	the length of the fragment in bytes
274*4882a593Smuzhiyun  *
275*4882a593Smuzhiyun  *	END_MANUAL_ENTRY
276*4882a593Smuzhiyun  */
277*4882a593Smuzhiyun #define	HWM_GET_RX_FRAG_LEN(rxd)	((int)AIX_REVERSE((rxd)->rxd_rbctrl)& \
278*4882a593Smuzhiyun 				RD_LENGTH)
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun /*
281*4882a593Smuzhiyun  *	BEGIN_MANUAL_ENTRY(HWM_GET_RX_PHYS)
282*4882a593Smuzhiyun  *	u_long HWM_GET_RX_PHYS(rxd)
283*4882a593Smuzhiyun  *
284*4882a593Smuzhiyun  * function	MACRO		(hardware module, hwmtm.h)
285*4882a593Smuzhiyun  *		This macro may be invoked by the OS-specific module to read
286*4882a593Smuzhiyun  *		the physical address of the specified RxD.
287*4882a593Smuzhiyun  *
288*4882a593Smuzhiyun  * para	rxd	pointer to the RxD
289*4882a593Smuzhiyun  *
290*4882a593Smuzhiyun  * return	the RxD's physical pointer to the data fragment
291*4882a593Smuzhiyun  *
292*4882a593Smuzhiyun  *	END_MANUAL_ENTRY
293*4882a593Smuzhiyun  */
294*4882a593Smuzhiyun #define	HWM_GET_RX_PHYS(rxd)	(u_long)AIX_REVERSE((rxd)->rxd_rbadr)
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun /*
297*4882a593Smuzhiyun  *	BEGIN_MANUAL_ENTRY(HWM_GET_RX_USED)
298*4882a593Smuzhiyun  *	int HWM_GET_RX_USED(smc)
299*4882a593Smuzhiyun  *
300*4882a593Smuzhiyun  * function	MACRO		(hardware module, hwmtm.h)
301*4882a593Smuzhiyun  *		This macro may be invoked by the OS-specific module to get
302*4882a593Smuzhiyun  *		the count of used RXDs in receive queue 1.
303*4882a593Smuzhiyun  *
304*4882a593Smuzhiyun  * return	the used RXD count of receive queue 1
305*4882a593Smuzhiyun  *
306*4882a593Smuzhiyun  * NOTE: Remember, because of an ASIC bug at least one RXD should be unused
307*4882a593Smuzhiyun  *	 in the descriptor ring !
308*4882a593Smuzhiyun  *
309*4882a593Smuzhiyun  *	END_MANUAL_ENTRY
310*4882a593Smuzhiyun  */
311*4882a593Smuzhiyun #define	HWM_GET_RX_USED(smc)	((int)(smc)->hw.fp.rx_q[QUEUE_R1].rx_used)
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun /*
314*4882a593Smuzhiyun  *	BEGIN_MANUAL_ENTRY(HWM_GET_RX_FREE)
315*4882a593Smuzhiyun  *	int HWM_GET_RX_FREE(smc)
316*4882a593Smuzhiyun  *
317*4882a593Smuzhiyun  * function	MACRO		(hardware module, hwmtm.h)
318*4882a593Smuzhiyun  *		This macro may be invoked by the OS-specific module to get
319*4882a593Smuzhiyun  *		the rxd_free count of receive queue 1.
320*4882a593Smuzhiyun  *
321*4882a593Smuzhiyun  * return	the rxd_free count of receive queue 1
322*4882a593Smuzhiyun  *
323*4882a593Smuzhiyun  *	END_MANUAL_ENTRY
324*4882a593Smuzhiyun  */
325*4882a593Smuzhiyun #define	HWM_GET_RX_FREE(smc)	((int)(smc)->hw.fp.rx_q[QUEUE_R1].rx_free-1)
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun /*
328*4882a593Smuzhiyun  *	BEGIN_MANUAL_ENTRY(HWM_GET_CURR_RXD)
329*4882a593Smuzhiyun  *	rxd *HWM_GET_CURR_RXD(smc)
330*4882a593Smuzhiyun  *
331*4882a593Smuzhiyun  * function	MACRO		(hardware module, hwmtm.h)
332*4882a593Smuzhiyun  *		This macro may be invoked by the OS-specific module to get the
333*4882a593Smuzhiyun  *		pointer to the RxD which points to the current queue put
334*4882a593Smuzhiyun  *		position.
335*4882a593Smuzhiyun  *
336*4882a593Smuzhiyun  * return	pointer to the current RxD
337*4882a593Smuzhiyun  *
338*4882a593Smuzhiyun  *	END_MANUAL_ENTRY
339*4882a593Smuzhiyun  */
340*4882a593Smuzhiyun #define	HWM_GET_CURR_RXD(smc)	(struct s_smt_fp_rxd volatile *)\
341*4882a593Smuzhiyun 				(smc)->hw.fp.rx_q[QUEUE_R1].rx_curr_put
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun /*
344*4882a593Smuzhiyun  *	BEGIN_MANUAL_ENTRY(HWM_RX_CHECK)
345*4882a593Smuzhiyun  *	void HWM_RX_CHECK(smc,low_water)
346*4882a593Smuzhiyun  *
347*4882a593Smuzhiyun  * function	MACRO		(hardware module, hwmtm.h)
348*4882a593Smuzhiyun  *		This macro is invoked by the OS-specific before it left the
349*4882a593Smuzhiyun  *		function mac_drv_rx_complete. This macro calls mac_drv_fill_rxd
350*4882a593Smuzhiyun  *		if the number of used RxDs is equal or lower than the
351*4882a593Smuzhiyun  *		the given low water mark.
352*4882a593Smuzhiyun  *
353*4882a593Smuzhiyun  * para	low_water	low water mark of used RxD's
354*4882a593Smuzhiyun  *
355*4882a593Smuzhiyun  *	END_MANUAL_ENTRY
356*4882a593Smuzhiyun  */
357*4882a593Smuzhiyun #ifndef HWM_NO_FLOW_CTL
358*4882a593Smuzhiyun #define	HWM_RX_CHECK(smc,low_water) {\
359*4882a593Smuzhiyun 	if ((low_water) >= (smc)->hw.fp.rx_q[QUEUE_R1].rx_used) {\
360*4882a593Smuzhiyun 		mac_drv_fill_rxd(smc) ;\
361*4882a593Smuzhiyun 	}\
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun #else
364*4882a593Smuzhiyun #define	HWM_RX_CHECK(smc,low_water)		mac_drv_fill_rxd(smc)
365*4882a593Smuzhiyun #endif
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun #ifndef	HWM_EBASE
368*4882a593Smuzhiyun #define	HWM_EBASE	500
369*4882a593Smuzhiyun #endif
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun #define	HWM_E0001	HWM_EBASE + 1
372*4882a593Smuzhiyun #define	HWM_E0001_MSG	"HWM: Wrong size of s_rxd_os struct"
373*4882a593Smuzhiyun #define	HWM_E0002	HWM_EBASE + 2
374*4882a593Smuzhiyun #define	HWM_E0002_MSG	"HWM: Wrong size of s_txd_os struct"
375*4882a593Smuzhiyun #define	HWM_E0003	HWM_EBASE + 3
376*4882a593Smuzhiyun #define	HWM_E0003_MSG	"HWM: smt_free_mbuf() called with NULL pointer"
377*4882a593Smuzhiyun #define	HWM_E0004	HWM_EBASE + 4
378*4882a593Smuzhiyun #define	HWM_E0004_MSG	"HWM: Parity error rx queue 1"
379*4882a593Smuzhiyun #define	HWM_E0005	HWM_EBASE + 5
380*4882a593Smuzhiyun #define	HWM_E0005_MSG	"HWM: Encoding error rx queue 1"
381*4882a593Smuzhiyun #define	HWM_E0006	HWM_EBASE + 6
382*4882a593Smuzhiyun #define	HWM_E0006_MSG	"HWM: Encoding error async tx queue"
383*4882a593Smuzhiyun #define	HWM_E0007	HWM_EBASE + 7
384*4882a593Smuzhiyun #define	HWM_E0007_MSG	"HWM: Encoding error sync tx queue"
385*4882a593Smuzhiyun #define	HWM_E0008	HWM_EBASE + 8
386*4882a593Smuzhiyun #define	HWM_E0008_MSG	""
387*4882a593Smuzhiyun #define	HWM_E0009	HWM_EBASE + 9
388*4882a593Smuzhiyun #define	HWM_E0009_MSG	"HWM: Out of RxD condition detected"
389*4882a593Smuzhiyun #define	HWM_E0010	HWM_EBASE + 10
390*4882a593Smuzhiyun #define	HWM_E0010_MSG	"HWM: A protocol layer has tried to send a frame with an invalid frame control"
391*4882a593Smuzhiyun #define HWM_E0011	HWM_EBASE + 11
392*4882a593Smuzhiyun #define HWM_E0011_MSG	"HWM: mac_drv_clear_tx_queue was called although the hardware wasn't stopped"
393*4882a593Smuzhiyun #define HWM_E0012	HWM_EBASE + 12
394*4882a593Smuzhiyun #define HWM_E0012_MSG	"HWM: mac_drv_clear_rx_queue was called although the hardware wasn't stopped"
395*4882a593Smuzhiyun #define HWM_E0013	HWM_EBASE + 13
396*4882a593Smuzhiyun #define HWM_E0013_MSG	"HWM: mac_drv_repair_descr was called although the hardware wasn't stopped"
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun #endif
399