xref: /OK3568_Linux_fs/kernel/drivers/net/fddi/skfp/h/cmtdef.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /******************************************************************************
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  *	(C)Copyright 1998,1999 SysKonnect,
5*4882a593Smuzhiyun  *	a business unit of Schneider & Koch & Co. Datensysteme GmbH.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *	The information in this file is provided "AS IS" without warranty.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  ******************************************************************************/
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef	_CMTDEF_
12*4882a593Smuzhiyun #define _CMTDEF_
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /* **************************************************************** */
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun  * implementation specific constants
18*4882a593Smuzhiyun  * MODIIFY THE FOLLOWING THREE DEFINES
19*4882a593Smuzhiyun  */
20*4882a593Smuzhiyun #define AMDPLC			/* if Amd PLC chip used */
21*4882a593Smuzhiyun #ifdef	CONC
22*4882a593Smuzhiyun #define NUMPHYS		12	/* 2 for SAS or DAS, more for Concentrator */
23*4882a593Smuzhiyun #else
24*4882a593Smuzhiyun #ifdef	CONC_II
25*4882a593Smuzhiyun #define NUMPHYS		24	/* 2 for SAS or DAS, more for Concentrator */
26*4882a593Smuzhiyun #else
27*4882a593Smuzhiyun #define NUMPHYS		2	/* 2 for SAS or DAS, more for Concentrator */
28*4882a593Smuzhiyun #endif
29*4882a593Smuzhiyun #endif
30*4882a593Smuzhiyun #define NUMMACS		1	/* only 1 supported at the moment */
31*4882a593Smuzhiyun #define NUMPATHS	2	/* primary and secondary path supported */
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun /*
34*4882a593Smuzhiyun  * DO NOT MODIFY BEYOND THIS POINT
35*4882a593Smuzhiyun  */
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /* **************************************************************** */
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #if	NUMPHYS > 2
40*4882a593Smuzhiyun #define CONCENTRATOR
41*4882a593Smuzhiyun #endif
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /*
44*4882a593Smuzhiyun  * Definitions for comfortable LINT usage
45*4882a593Smuzhiyun  */
46*4882a593Smuzhiyun #ifdef	lint
47*4882a593Smuzhiyun #define LINT_USE(x)	(x)=(x)
48*4882a593Smuzhiyun #else
49*4882a593Smuzhiyun #define LINT_USE(x)
50*4882a593Smuzhiyun #endif
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #ifdef	DEBUG
53*4882a593Smuzhiyun #define	DB_PR(flag, fmt, ...)						\
54*4882a593Smuzhiyun 	do { if (flag) printf(fmt "\n", ##__VA_ARGS__); } while (0)
55*4882a593Smuzhiyun #else
56*4882a593Smuzhiyun #define	DB_PR(flag, fmt, ...)	no_printk(fmt "\n", ##__VA_ARGS__)
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #endif
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #ifdef DEBUG_BRD
61*4882a593Smuzhiyun #define DB_TEST (smc->debug)
62*4882a593Smuzhiyun #else
63*4882a593Smuzhiyun #define DB_TEST (debug)
64*4882a593Smuzhiyun #endif
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun #define DB_ECM(fmt, ...)						\
67*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_smt & 1, fmt, ##__VA_ARGS__)
68*4882a593Smuzhiyun #define DB_ECMN(n, fmt, ...)						\
69*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_ecm >= (n), fmt, ##__VA_ARGS__)
70*4882a593Smuzhiyun #define DB_RMT(fmt, ...)						\
71*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_smt & 2, fmt, ##__VA_ARGS__)
72*4882a593Smuzhiyun #define DB_RMTN(n, fmt, ...)						\
73*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_rmt >= (n), fmt, ##__VA_ARGS__)
74*4882a593Smuzhiyun #define DB_CFM(fmt, ...)						\
75*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_smt & 4, fmt, ##__VA_ARGS__)
76*4882a593Smuzhiyun #define DB_CFMN(n, fmt, ...)						\
77*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_cfm >= (n), fmt, ##__VA_ARGS__)
78*4882a593Smuzhiyun #define DB_PCM(fmt, ...)						\
79*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_smt & 8, fmt, ##__VA_ARGS__)
80*4882a593Smuzhiyun #define DB_PCMN(n, fmt, ...)						\
81*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_pcm >= (n), fmt, ##__VA_ARGS__)
82*4882a593Smuzhiyun #define DB_SMT(fmt, ...)						\
83*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_smtf, fmt, ##__VA_ARGS__)
84*4882a593Smuzhiyun #define DB_SMTN(n, fmt, ...)						\
85*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_smtf >= (n), fmt, ##__VA_ARGS__)
86*4882a593Smuzhiyun #define DB_SBA(fmt, ...)						\
87*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_sba, fmt, ##__VA_ARGS__)
88*4882a593Smuzhiyun #define DB_SBAN(n, fmt, ...)						\
89*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_sba >= (n), fmt, ##__VA_ARGS__)
90*4882a593Smuzhiyun #define DB_ESS(fmt, ...)						\
91*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_ess, fmt, ##__VA_ARGS__)
92*4882a593Smuzhiyun #define DB_ESSN(n, fmt, ...)						\
93*4882a593Smuzhiyun 	DB_PR((DB_TEST).d_ess >= (n), fmt, ##__VA_ARGS__)
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun #ifndef	SS_NOT_DS
96*4882a593Smuzhiyun #define	SK_LOC_DECL(type,var)	type var
97*4882a593Smuzhiyun #else
98*4882a593Smuzhiyun #define	SK_LOC_DECL(type,var)	static type var
99*4882a593Smuzhiyun #endif
100*4882a593Smuzhiyun /*
101*4882a593Smuzhiyun  * PHYs and PORTS
102*4882a593Smuzhiyun  * Note: Don't touch the definition of PA and PB. Those might be used
103*4882a593Smuzhiyun  *	by some "for" loops.
104*4882a593Smuzhiyun  */
105*4882a593Smuzhiyun #define PA		0
106*4882a593Smuzhiyun #define PB		1
107*4882a593Smuzhiyun #if	defined(SUPERNET_3) || defined(CONC_II)
108*4882a593Smuzhiyun /*
109*4882a593Smuzhiyun  * The port indices have to be different,
110*4882a593Smuzhiyun  * because the MAC output goes through the 2. PLC
111*4882a593Smuzhiyun  * Conc II: It has to be the first port in the row.
112*4882a593Smuzhiyun  */
113*4882a593Smuzhiyun #define PS		0	/* Internal PLC which is the same as PA */
114*4882a593Smuzhiyun #else
115*4882a593Smuzhiyun #define PS		1
116*4882a593Smuzhiyun #endif
117*4882a593Smuzhiyun #define PM		2		/* PM .. PA+NUM_PHYS-1 */
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun /*
120*4882a593Smuzhiyun  * PHY types - as in path descriptor 'fddiPHYType'
121*4882a593Smuzhiyun  */
122*4882a593Smuzhiyun #define TA			0	/* A port */
123*4882a593Smuzhiyun #define TB			1	/* B port */
124*4882a593Smuzhiyun #define TS			2	/* S port */
125*4882a593Smuzhiyun #define TM			3	/* M port */
126*4882a593Smuzhiyun #define TNONE			4
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun /*
130*4882a593Smuzhiyun  * indexes in MIB
131*4882a593Smuzhiyun  */
132*4882a593Smuzhiyun #define INDEX_MAC	1
133*4882a593Smuzhiyun #define INDEX_PATH	1
134*4882a593Smuzhiyun #define INDEX_PORT	1
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun /*
138*4882a593Smuzhiyun  * policies
139*4882a593Smuzhiyun  */
140*4882a593Smuzhiyun #define POLICY_AA	(1<<0)		/* reject AA */
141*4882a593Smuzhiyun #define POLICY_AB	(1<<1)		/* reject AB */
142*4882a593Smuzhiyun #define POLICY_AS	(1<<2)		/* reject AS */
143*4882a593Smuzhiyun #define POLICY_AM	(1<<3)		/* reject AM */
144*4882a593Smuzhiyun #define POLICY_BA	(1<<4)		/* reject BA */
145*4882a593Smuzhiyun #define POLICY_BB	(1<<5)		/* reject BB */
146*4882a593Smuzhiyun #define POLICY_BS	(1<<6)		/* reject BS */
147*4882a593Smuzhiyun #define POLICY_BM	(1<<7)		/* reject BM */
148*4882a593Smuzhiyun #define POLICY_SA	(1<<8)		/* reject SA */
149*4882a593Smuzhiyun #define POLICY_SB	(1<<9)		/* reject SB */
150*4882a593Smuzhiyun #define POLICY_SS	(1<<10)		/* reject SS */
151*4882a593Smuzhiyun #define POLICY_SM	(1<<11)		/* reject SM */
152*4882a593Smuzhiyun #define POLICY_MA	(1<<12)		/* reject MA */
153*4882a593Smuzhiyun #define POLICY_MB	(1<<13)		/* reject MB */
154*4882a593Smuzhiyun #define POLICY_MS	(1<<14)		/* reject MS */
155*4882a593Smuzhiyun #define POLICY_MM	(1<<15)		/* reject MM */
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun /*
158*4882a593Smuzhiyun  * commands
159*4882a593Smuzhiyun  */
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun /*
162*4882a593Smuzhiyun  * EVENTS
163*4882a593Smuzhiyun  * event classes
164*4882a593Smuzhiyun  */
165*4882a593Smuzhiyun #define EVENT_ECM	1		/* event class ECM */
166*4882a593Smuzhiyun #define EVENT_CFM	2		/* event class CFM */
167*4882a593Smuzhiyun #define EVENT_RMT	3		/* event class RMT */
168*4882a593Smuzhiyun #define EVENT_SMT	4		/* event class SMT */
169*4882a593Smuzhiyun #define EVENT_PCM	5		/* event class PCM */
170*4882a593Smuzhiyun #define EVENT_PCMA	5		/* event class PCMA */
171*4882a593Smuzhiyun #define EVENT_PCMB	6		/* event class PCMB */
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun /* WARNING :
174*4882a593Smuzhiyun  * EVENT_PCM* must be last in the above list
175*4882a593Smuzhiyun  * if more than two ports are used, EVENT_PCM .. EVENT_PCMA+NUM_PHYS-1
176*4882a593Smuzhiyun  * are used !
177*4882a593Smuzhiyun  */
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun #define EV_TOKEN(class,event)	(((u_long)(class)<<16L)|((u_long)(event)))
180*4882a593Smuzhiyun #define EV_T_CLASS(token)	((int)((token)>>16)&0xffff)
181*4882a593Smuzhiyun #define EV_T_EVENT(token)	((int)(token)&0xffff)
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun /*
184*4882a593Smuzhiyun  * ECM events
185*4882a593Smuzhiyun  */
186*4882a593Smuzhiyun #define EC_CONNECT	1		/* connect request */
187*4882a593Smuzhiyun #define EC_DISCONNECT	2		/* disconnect request */
188*4882a593Smuzhiyun #define EC_TRACE_PROP	3		/* trace propagation */
189*4882a593Smuzhiyun #define EC_PATH_TEST	4		/* path test */
190*4882a593Smuzhiyun #define EC_TIMEOUT_TD	5		/* timer TD_min */
191*4882a593Smuzhiyun #define EC_TIMEOUT_TMAX	6		/* timer trace_max */
192*4882a593Smuzhiyun #define EC_TIMEOUT_IMAX	7		/* timer I_max */
193*4882a593Smuzhiyun #define EC_TIMEOUT_INMAX 8		/* timer IN_max */
194*4882a593Smuzhiyun #define EC_TEST_DONE	9		/* path test done */
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun /*
197*4882a593Smuzhiyun  * CFM events
198*4882a593Smuzhiyun  */
199*4882a593Smuzhiyun #define CF_LOOP		1		/* cf_loop flag from PCM */
200*4882a593Smuzhiyun #define CF_LOOP_A	1		/* cf_loop flag from PCM */
201*4882a593Smuzhiyun #define CF_LOOP_B	2		/* cf_loop flag from PCM */
202*4882a593Smuzhiyun #define CF_JOIN		3		/* cf_join flag from PCM */
203*4882a593Smuzhiyun #define CF_JOIN_A	3		/* cf_join flag from PCM */
204*4882a593Smuzhiyun #define CF_JOIN_B	4		/* cf_join flag from PCM */
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun /*
207*4882a593Smuzhiyun  * PCM events
208*4882a593Smuzhiyun  */
209*4882a593Smuzhiyun #define PC_START		1
210*4882a593Smuzhiyun #define PC_STOP			2
211*4882a593Smuzhiyun #define PC_LOOP			3
212*4882a593Smuzhiyun #define PC_JOIN			4
213*4882a593Smuzhiyun #define PC_SIGNAL		5
214*4882a593Smuzhiyun #define PC_REJECT		6
215*4882a593Smuzhiyun #define PC_MAINT    		7
216*4882a593Smuzhiyun #define PC_TRACE		8
217*4882a593Smuzhiyun #define PC_PDR			9
218*4882a593Smuzhiyun #define PC_ENABLE		10
219*4882a593Smuzhiyun #define PC_DISABLE		11
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun /*
222*4882a593Smuzhiyun  * must be ordered as in LineStateType
223*4882a593Smuzhiyun  */
224*4882a593Smuzhiyun #define PC_QLS			12
225*4882a593Smuzhiyun #define PC_ILS			13
226*4882a593Smuzhiyun #define PC_MLS			14
227*4882a593Smuzhiyun #define PC_HLS			15
228*4882a593Smuzhiyun #define PC_LS_PDR		16
229*4882a593Smuzhiyun #define PC_LS_NONE		17
230*4882a593Smuzhiyun #define LS2MIB(x)	((x)-PC_QLS)
231*4882a593Smuzhiyun #define MIB2LS(x)	((x)+PC_QLS)
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun #define PC_TIMEOUT_TB_MAX	18	/* timer TB_max */
234*4882a593Smuzhiyun #define PC_TIMEOUT_TB_MIN	19	/* timer TB_min */
235*4882a593Smuzhiyun #define PC_TIMEOUT_C_MIN	20	/* timer C_Min */
236*4882a593Smuzhiyun #define PC_TIMEOUT_T_OUT	21	/* timer T_Out */
237*4882a593Smuzhiyun #define PC_TIMEOUT_TL_MIN	22	/* timer TL_Min */
238*4882a593Smuzhiyun #define PC_TIMEOUT_T_NEXT	23	/* timer t_next[] */
239*4882a593Smuzhiyun #define PC_TIMEOUT_LCT		24
240*4882a593Smuzhiyun #define PC_NSE			25	/* NOISE hardware timer */
241*4882a593Smuzhiyun #define PC_LEM			26	/* LEM done */
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun /*
244*4882a593Smuzhiyun  * RMT events				  meaning		from
245*4882a593Smuzhiyun  */
246*4882a593Smuzhiyun #define RM_RING_OP	1		/* ring operational	MAC	*/
247*4882a593Smuzhiyun #define RM_RING_NON_OP	2		/* ring not operational	MAC	*/
248*4882a593Smuzhiyun #define RM_MY_BEACON	3		/* recvd my beacon	MAC	*/
249*4882a593Smuzhiyun #define RM_OTHER_BEACON	4		/* recvd other beacon	MAC	*/
250*4882a593Smuzhiyun #define RM_MY_CLAIM	5		/* recvd my claim	MAC	*/
251*4882a593Smuzhiyun #define RM_TRT_EXP	6		/* TRT exp		MAC	*/
252*4882a593Smuzhiyun #define RM_VALID_CLAIM	7		/* claim from dup addr	MAC	*/
253*4882a593Smuzhiyun #define RM_JOIN		8		/* signal rm_join	CFM	*/
254*4882a593Smuzhiyun #define RM_LOOP		9		/* signal rm_loop	CFM	*/
255*4882a593Smuzhiyun #define RM_DUP_ADDR	10		/* dup_addr_test hange	SMT-NIF	*/
256*4882a593Smuzhiyun #define RM_ENABLE_FLAG	11		/* enable flag */
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun #define RM_TIMEOUT_NON_OP	12	/* timeout T_Non_OP	*/
259*4882a593Smuzhiyun #define RM_TIMEOUT_T_STUCK	13	/* timeout T_Stuck	*/
260*4882a593Smuzhiyun #define RM_TIMEOUT_ANNOUNCE	14	/* timeout T_Announce	*/
261*4882a593Smuzhiyun #define RM_TIMEOUT_T_DIRECT	15	/* timeout T_Direct	*/
262*4882a593Smuzhiyun #define RM_TIMEOUT_D_MAX	16	/* timeout D_Max	*/
263*4882a593Smuzhiyun #define RM_TIMEOUT_POLL		17	/* claim/beacon poller	*/
264*4882a593Smuzhiyun #define RM_TX_STATE_CHANGE	18	/* To restart timer for D_Max */
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun /*
267*4882a593Smuzhiyun  * SMT events
268*4882a593Smuzhiyun  */
269*4882a593Smuzhiyun #define SM_TIMER	1		/* timer */
270*4882a593Smuzhiyun #define SM_FAST		2		/* smt_force_irq */
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun /* PC modes */
273*4882a593Smuzhiyun #define PM_NONE		0
274*4882a593Smuzhiyun #define PM_PEER		1
275*4882a593Smuzhiyun #define PM_TREE		2
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun /*
278*4882a593Smuzhiyun  * PCM withhold codes
279*4882a593Smuzhiyun  * MIB PC-WithholdType ENUM
280*4882a593Smuzhiyun  */
281*4882a593Smuzhiyun #define PC_WH_NONE	0		/* ok */
282*4882a593Smuzhiyun #define PC_WH_M_M	1		/* M to M */
283*4882a593Smuzhiyun #define PC_WH_OTHER	2		/* other incompatible phys */
284*4882a593Smuzhiyun #define PC_WH_PATH	3		/* path not available */
285*4882a593Smuzhiyun /*
286*4882a593Smuzhiyun  * LCT duration
287*4882a593Smuzhiyun  */
288*4882a593Smuzhiyun #define LC_SHORT	1		/* short LCT */
289*4882a593Smuzhiyun #define LC_MEDIUM	2		/* medium LCT */
290*4882a593Smuzhiyun #define LC_LONG		3		/* long LCT */
291*4882a593Smuzhiyun #define LC_EXTENDED	4		/* extended LCT */
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun /*
294*4882a593Smuzhiyun  * path_test values
295*4882a593Smuzhiyun  */
296*4882a593Smuzhiyun #define PT_NONE		0
297*4882a593Smuzhiyun #define PT_TESTING	1		/* test is running */
298*4882a593Smuzhiyun #define PT_PASSED	2		/* test passed */
299*4882a593Smuzhiyun #define PT_FAILED	3		/* test failed */
300*4882a593Smuzhiyun #define PT_PENDING	4		/* path test follows */
301*4882a593Smuzhiyun #define PT_EXITING	5		/* disconnected while in trace/leave */
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun /*
304*4882a593Smuzhiyun  * duplicate address test
305*4882a593Smuzhiyun  * MIB DupAddressTest ENUM
306*4882a593Smuzhiyun  */
307*4882a593Smuzhiyun #define DA_NONE		0		/* 		*/
308*4882a593Smuzhiyun #define DA_PASSED	1		/* test passed */
309*4882a593Smuzhiyun #define DA_FAILED	2		/* test failed */
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun /*
313*4882a593Smuzhiyun  * optical bypass
314*4882a593Smuzhiyun  */
315*4882a593Smuzhiyun #define BP_DEINSERT	0		/* disable bypass */
316*4882a593Smuzhiyun #define BP_INSERT	1		/* enable bypass */
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun /*
319*4882a593Smuzhiyun  * ODL enable/disable
320*4882a593Smuzhiyun  */
321*4882a593Smuzhiyun #define PM_TRANSMIT_DISABLE	0	/* disable xmit */
322*4882a593Smuzhiyun #define PM_TRANSMIT_ENABLE	1	/* enable xmit */
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun /*
325*4882a593Smuzhiyun  * parameter for config_mux
326*4882a593Smuzhiyun  * note : number is index in config_endec table !
327*4882a593Smuzhiyun  */
328*4882a593Smuzhiyun #define MUX_THRUA	0		/* through A */
329*4882a593Smuzhiyun #define MUX_THRUB	1		/* through B */
330*4882a593Smuzhiyun #define MUX_WRAPA	2		/* wrap A */
331*4882a593Smuzhiyun #define MUX_WRAPB	3		/* wrap B */
332*4882a593Smuzhiyun #define MUX_ISOLATE	4		/* isolated */
333*4882a593Smuzhiyun #define MUX_WRAPS	5		/* SAS */
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun /*
336*4882a593Smuzhiyun  * MAC control
337*4882a593Smuzhiyun  */
338*4882a593Smuzhiyun #define MA_RESET	0
339*4882a593Smuzhiyun #define MA_BEACON	1
340*4882a593Smuzhiyun #define MA_CLAIM	2
341*4882a593Smuzhiyun #define MA_DIRECTED	3		/* directed beacon */
342*4882a593Smuzhiyun #define MA_TREQ		4		/* change T_Req */
343*4882a593Smuzhiyun #define MA_OFFLINE	5		/* switch MAC to offline */
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun /*
347*4882a593Smuzhiyun  * trace prop
348*4882a593Smuzhiyun  * bit map for trace propagation
349*4882a593Smuzhiyun  */
350*4882a593Smuzhiyun #define ENTITY_MAC	(NUMPHYS)
351*4882a593Smuzhiyun #define ENTITY_PHY(p)	(p)
352*4882a593Smuzhiyun #define ENTITY_BIT(m)	(1<<(m))
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun /*
355*4882a593Smuzhiyun  * Resource Tag Types
356*4882a593Smuzhiyun  */
357*4882a593Smuzhiyun #define PATH_ISO	0	/* isolated */
358*4882a593Smuzhiyun #define PATH_PRIM	3	/* primary path */
359*4882a593Smuzhiyun #define PATH_THRU	5	/* through path */
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun #define RES_MAC		2	/* resource type MAC */
362*4882a593Smuzhiyun #define RES_PORT	4	/* resource type PORT */
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun /*
366*4882a593Smuzhiyun  * CFM state
367*4882a593Smuzhiyun  * oops: MUST MATCH CF-StateType in SMT7.2 !
368*4882a593Smuzhiyun  */
369*4882a593Smuzhiyun #define SC0_ISOLATED	0		/* isolated */
370*4882a593Smuzhiyun #define SC1_WRAP_A	5		/* wrap A (not used) */
371*4882a593Smuzhiyun #define SC2_WRAP_B	6		/* wrap B (not used) */
372*4882a593Smuzhiyun #define SC4_THRU_A	12		/* through A */
373*4882a593Smuzhiyun #define SC5_THRU_B	7		/* through B (used in SMT 6.2) */
374*4882a593Smuzhiyun #define SC7_WRAP_S	8		/* SAS (not used) */
375*4882a593Smuzhiyun #define SC9_C_WRAP_A	9		/* c wrap A */
376*4882a593Smuzhiyun #define SC10_C_WRAP_B	10		/* c wrap B */
377*4882a593Smuzhiyun #define SC11_C_WRAP_S	11		/* c wrap S */
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun /*
380*4882a593Smuzhiyun  * convert MIB time in units of 80nS to uS
381*4882a593Smuzhiyun  */
382*4882a593Smuzhiyun #define MIB2US(t)		((t)/12)
383*4882a593Smuzhiyun #define SEC2MIB(s)	((s)*12500000L)
384*4882a593Smuzhiyun /*
385*4882a593Smuzhiyun  * SMT timer
386*4882a593Smuzhiyun  */
387*4882a593Smuzhiyun struct smt_timer {
388*4882a593Smuzhiyun 	struct smt_timer	*tm_next ;	/* linked list */
389*4882a593Smuzhiyun 	struct s_smc		*tm_smc ;	/* pointer to context */
390*4882a593Smuzhiyun 	u_long			tm_delta ;	/* delta time */
391*4882a593Smuzhiyun 	u_long			tm_token ;	/* token value */
392*4882a593Smuzhiyun 	u_short			tm_active ;	/* flag : active/inactive */
393*4882a593Smuzhiyun 	u_short			tm_pad ;	/* pad field */
394*4882a593Smuzhiyun } ;
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun /*
397*4882a593Smuzhiyun  * communication structures
398*4882a593Smuzhiyun  */
399*4882a593Smuzhiyun struct mac_parameter {
400*4882a593Smuzhiyun 	u_long	t_neg ;		/* T_Neg parameter */
401*4882a593Smuzhiyun 	u_long	t_pri ;		/* T_Pri register in MAC */
402*4882a593Smuzhiyun } ;
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun /*
405*4882a593Smuzhiyun  * MAC counters
406*4882a593Smuzhiyun  */
407*4882a593Smuzhiyun struct mac_counter {
408*4882a593Smuzhiyun 	u_long	mac_nobuf_counter ;	/* MAC SW counter: no buffer */
409*4882a593Smuzhiyun 	u_long	mac_r_restart_counter ;	/* MAC SW counter: rx restarted */
410*4882a593Smuzhiyun } ;
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun /*
413*4882a593Smuzhiyun  * para struct context for SMT parameters
414*4882a593Smuzhiyun  */
415*4882a593Smuzhiyun struct s_pcon {
416*4882a593Smuzhiyun 	int	pc_len ;
417*4882a593Smuzhiyun 	int	pc_err ;
418*4882a593Smuzhiyun 	int	pc_badset ;
419*4882a593Smuzhiyun 	void	*pc_p ;
420*4882a593Smuzhiyun } ;
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun /*
423*4882a593Smuzhiyun  * link error monitor
424*4882a593Smuzhiyun  */
425*4882a593Smuzhiyun #define LEM_AVG	5
426*4882a593Smuzhiyun struct lem_counter {
427*4882a593Smuzhiyun #ifdef	AM29K
428*4882a593Smuzhiyun 	int	lem_on	;
429*4882a593Smuzhiyun 	u_long	lem_errors ;
430*4882a593Smuzhiyun 	u_long	lem_symbols ;
431*4882a593Smuzhiyun 	u_long	lem_tsymbols ;
432*4882a593Smuzhiyun 	int	lem_s_count ;
433*4882a593Smuzhiyun 	int	lem_n_s ;
434*4882a593Smuzhiyun 	int	lem_values ;
435*4882a593Smuzhiyun 	int	lem_index ;
436*4882a593Smuzhiyun 	int	lem_avg_ber[LEM_AVG] ;
437*4882a593Smuzhiyun 	int	lem_sum ;
438*4882a593Smuzhiyun #else
439*4882a593Smuzhiyun 	u_short	lem_float_ber ;		/* 10E-nn bit error rate */
440*4882a593Smuzhiyun 	u_long	lem_errors ;		/* accumulated error count */
441*4882a593Smuzhiyun 	u_short	lem_on	;
442*4882a593Smuzhiyun #endif
443*4882a593Smuzhiyun } ;
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun #define NUMBITS	10
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun #ifdef	AMDPLC
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun /*
450*4882a593Smuzhiyun  * PLC state table
451*4882a593Smuzhiyun  */
452*4882a593Smuzhiyun struct s_plc {
453*4882a593Smuzhiyun 	u_short	p_state ;		/* current state */
454*4882a593Smuzhiyun 	u_short	p_bits ;		/* number of bits to send */
455*4882a593Smuzhiyun 	u_short	p_start ;		/* first bit pos */
456*4882a593Smuzhiyun 	u_short	p_pad ;			/* padding for alignment */
457*4882a593Smuzhiyun 	u_long soft_err ;		/* error counter */
458*4882a593Smuzhiyun 	u_long parity_err ;		/* error counter */
459*4882a593Smuzhiyun 	u_long ebuf_err ;		/* error counter */
460*4882a593Smuzhiyun 	u_long ebuf_cont ;		/* continuous error counter */
461*4882a593Smuzhiyun 	u_long phyinv ;			/* error counter */
462*4882a593Smuzhiyun 	u_long vsym_ctr ;		/* error counter */
463*4882a593Smuzhiyun 	u_long mini_ctr ;		/* error counter */
464*4882a593Smuzhiyun 	u_long tpc_exp ;		/* error counter */
465*4882a593Smuzhiyun 	u_long np_err ;			/* error counter */
466*4882a593Smuzhiyun 	u_long b_pcs ;			/* error counter */
467*4882a593Smuzhiyun 	u_long b_tpc ;			/* error counter */
468*4882a593Smuzhiyun 	u_long b_tne ;			/* error counter */
469*4882a593Smuzhiyun 	u_long b_qls ;			/* error counter */
470*4882a593Smuzhiyun 	u_long b_ils ;			/* error counter */
471*4882a593Smuzhiyun 	u_long b_hls ;			/* error counter */
472*4882a593Smuzhiyun } ;
473*4882a593Smuzhiyun #endif
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun #ifdef	PROTOTYP_INC
476*4882a593Smuzhiyun #include "fddi/driver.pro"
477*4882a593Smuzhiyun #else	/* PROTOTYP_INC */
478*4882a593Smuzhiyun /*
479*4882a593Smuzhiyun  * function prototypes
480*4882a593Smuzhiyun  */
481*4882a593Smuzhiyun #include "mbuf.h"	/* Type definitions for MBUFs */
482*4882a593Smuzhiyun #include "smtstate.h"	/* struct smt_state */
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun void hwt_restart(struct s_smc *smc);	/* hwt.c */
485*4882a593Smuzhiyun SMbuf *smt_build_frame(struct s_smc *smc, int class, int type,
486*4882a593Smuzhiyun 		       int length);	/* smt.c */
487*4882a593Smuzhiyun SMbuf *smt_get_mbuf(struct s_smc *smc);	/* drvsr.c */
488*4882a593Smuzhiyun void *sm_to_para(struct s_smc *smc, struct smt_header *sm,
489*4882a593Smuzhiyun 		 int para);		/* smt.c */
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun #ifndef SK_UNUSED
492*4882a593Smuzhiyun #define SK_UNUSED(var)		(void)(var)
493*4882a593Smuzhiyun #endif
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun void queue_event(struct s_smc *smc, int class, int event);
496*4882a593Smuzhiyun void ecm(struct s_smc *smc, int event);
497*4882a593Smuzhiyun void ecm_init(struct s_smc *smc);
498*4882a593Smuzhiyun void rmt(struct s_smc *smc, int event);
499*4882a593Smuzhiyun void rmt_init(struct s_smc *smc);
500*4882a593Smuzhiyun void pcm(struct s_smc *smc, const int np, int event);
501*4882a593Smuzhiyun void pcm_init(struct s_smc *smc);
502*4882a593Smuzhiyun void cfm(struct s_smc *smc, int event);
503*4882a593Smuzhiyun void cfm_init(struct s_smc *smc);
504*4882a593Smuzhiyun void smt_timer_start(struct s_smc *smc, struct smt_timer *timer, u_long time,
505*4882a593Smuzhiyun 		     u_long token);
506*4882a593Smuzhiyun void smt_timer_stop(struct s_smc *smc, struct smt_timer *timer);
507*4882a593Smuzhiyun void pcm_status_state(struct s_smc *smc, int np, int *type, int *state,
508*4882a593Smuzhiyun 		      int *remote, int *mac);
509*4882a593Smuzhiyun void plc_config_mux(struct s_smc *smc, int mux);
510*4882a593Smuzhiyun void sm_lem_evaluate(struct s_smc *smc);
511*4882a593Smuzhiyun void mac_update_counter(struct s_smc *smc);
512*4882a593Smuzhiyun void sm_ma_control(struct s_smc *smc, int mode);
513*4882a593Smuzhiyun void sm_mac_check_beacon_claim(struct s_smc *smc);
514*4882a593Smuzhiyun void config_mux(struct s_smc *smc, int mux);
515*4882a593Smuzhiyun void smt_agent_init(struct s_smc *smc);
516*4882a593Smuzhiyun void smt_timer_init(struct s_smc *smc);
517*4882a593Smuzhiyun void smt_received_pack(struct s_smc *smc, SMbuf *mb, int fs);
518*4882a593Smuzhiyun void smt_add_para(struct s_smc *smc, struct s_pcon *pcon, u_short para,
519*4882a593Smuzhiyun 		  int index, int local);
520*4882a593Smuzhiyun void smt_swap_para(struct smt_header *sm, int len, int direction);
521*4882a593Smuzhiyun void ev_init(struct s_smc *smc);
522*4882a593Smuzhiyun void hwt_init(struct s_smc *smc);
523*4882a593Smuzhiyun u_long hwt_read(struct s_smc *smc);
524*4882a593Smuzhiyun void hwt_stop(struct s_smc *smc);
525*4882a593Smuzhiyun void hwt_start(struct s_smc *smc, u_long time);
526*4882a593Smuzhiyun void smt_send_mbuf(struct s_smc *smc, SMbuf *mb, int fc);
527*4882a593Smuzhiyun void smt_free_mbuf(struct s_smc *smc, SMbuf *mb);
528*4882a593Smuzhiyun void sm_pm_bypass_req(struct s_smc *smc, int mode);
529*4882a593Smuzhiyun void rmt_indication(struct s_smc *smc, int i);
530*4882a593Smuzhiyun void cfm_state_change(struct s_smc *smc, int c_state);
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun #if defined(DEBUG) || !defined(NO_SMT_PANIC)
533*4882a593Smuzhiyun void smt_panic(struct s_smc *smc, char *text);
534*4882a593Smuzhiyun #else
535*4882a593Smuzhiyun #define	smt_panic(smc,text)
536*4882a593Smuzhiyun #endif /* DEBUG || !NO_SMT_PANIC */
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun void smt_stat_counter(struct s_smc *smc, int stat);
539*4882a593Smuzhiyun void smt_timer_poll(struct s_smc *smc);
540*4882a593Smuzhiyun u_long smt_get_time(void);
541*4882a593Smuzhiyun u_long smt_get_tid(struct s_smc *smc);
542*4882a593Smuzhiyun void smt_timer_done(struct s_smc *smc);
543*4882a593Smuzhiyun void smt_fixup_mib(struct s_smc *smc);
544*4882a593Smuzhiyun void smt_reset_defaults(struct s_smc *smc, int level);
545*4882a593Smuzhiyun void smt_agent_task(struct s_smc *smc);
546*4882a593Smuzhiyun int smt_check_para(struct s_smc *smc, struct smt_header *sm,
547*4882a593Smuzhiyun 		   const u_short list[]);
548*4882a593Smuzhiyun void driver_get_bia(struct s_smc *smc, struct fddi_addr *bia_addr);
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun #ifdef SUPERNET_3
551*4882a593Smuzhiyun void drv_reset_indication(struct s_smc *smc);
552*4882a593Smuzhiyun #endif	/* SUPERNET_3 */
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun void smt_start_watchdog(struct s_smc *smc);
555*4882a593Smuzhiyun void smt_event(struct s_smc *smc, int event);
556*4882a593Smuzhiyun void timer_event(struct s_smc *smc, u_long token);
557*4882a593Smuzhiyun void ev_dispatcher(struct s_smc *smc);
558*4882a593Smuzhiyun void pcm_get_state(struct s_smc *smc, struct smt_state *state);
559*4882a593Smuzhiyun void ecm_state_change(struct s_smc *smc, int e_state);
560*4882a593Smuzhiyun int sm_pm_bypass_present(struct s_smc *smc);
561*4882a593Smuzhiyun void pcm_state_change(struct s_smc *smc, int plc, int p_state);
562*4882a593Smuzhiyun void rmt_state_change(struct s_smc *smc, int r_state);
563*4882a593Smuzhiyun int sm_pm_get_ls(struct s_smc *smc, int phy);
564*4882a593Smuzhiyun int pcm_get_s_port(struct s_smc *smc);
565*4882a593Smuzhiyun int pcm_rooted_station(struct s_smc *smc);
566*4882a593Smuzhiyun int cfm_get_mac_input(struct s_smc *smc);
567*4882a593Smuzhiyun int cfm_get_mac_output(struct s_smc *smc);
568*4882a593Smuzhiyun int cem_build_path(struct s_smc *smc, char *to, int path_index);
569*4882a593Smuzhiyun int sm_mac_get_tx_state(struct s_smc *smc);
570*4882a593Smuzhiyun char *get_pcmstate(struct s_smc *smc, int np);
571*4882a593Smuzhiyun int smt_action(struct s_smc *smc, int class, int code, int index);
572*4882a593Smuzhiyun u_short smt_online(struct s_smc *smc, int on);
573*4882a593Smuzhiyun void smt_force_irq(struct s_smc *smc);
574*4882a593Smuzhiyun void smt_pmf_received_pack(struct s_smc *smc, SMbuf *mb, int local);
575*4882a593Smuzhiyun void smt_send_frame(struct s_smc *smc, SMbuf *mb, int fc, int local);
576*4882a593Smuzhiyun void smt_set_timestamp(struct s_smc *smc, u_char *p);
577*4882a593Smuzhiyun void mac_set_rx_mode(struct s_smc *smc,	int mode);
578*4882a593Smuzhiyun int mac_add_multicast(struct s_smc *smc, struct fddi_addr *addr, int can);
579*4882a593Smuzhiyun void mac_update_multicast(struct s_smc *smc);
580*4882a593Smuzhiyun void mac_clear_multicast(struct s_smc *smc);
581*4882a593Smuzhiyun void set_formac_tsync(struct s_smc *smc, long sync_bw);
582*4882a593Smuzhiyun void formac_reinit_tx(struct s_smc *smc);
583*4882a593Smuzhiyun void formac_tx_restart(struct s_smc *smc);
584*4882a593Smuzhiyun void process_receive(struct s_smc *smc);
585*4882a593Smuzhiyun void init_driver_fplus(struct s_smc *smc);
586*4882a593Smuzhiyun void rtm_irq(struct s_smc *smc);
587*4882a593Smuzhiyun void rtm_set_timer(struct s_smc *smc);
588*4882a593Smuzhiyun void ring_status_indication(struct s_smc *smc, u_long status);
589*4882a593Smuzhiyun void llc_recover_tx(struct s_smc *smc);
590*4882a593Smuzhiyun void llc_restart_tx(struct s_smc *smc);
591*4882a593Smuzhiyun void plc_clear_irq(struct s_smc *smc, int p);
592*4882a593Smuzhiyun void plc_irq(struct s_smc *smc,	int np,	unsigned int cmd);
593*4882a593Smuzhiyun int smt_set_mac_opvalues(struct s_smc *smc);
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun #ifdef TAG_MODE
596*4882a593Smuzhiyun void mac_do_pci_fix(struct s_smc *smc);
597*4882a593Smuzhiyun void mac_drv_clear_tx_queue(struct s_smc *smc);
598*4882a593Smuzhiyun void mac_drv_repair_descr(struct s_smc *smc);
599*4882a593Smuzhiyun u_long hwt_quick_read(struct s_smc *smc);
600*4882a593Smuzhiyun void hwt_wait_time(struct s_smc *smc, u_long start, long duration);
601*4882a593Smuzhiyun #endif
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun #ifdef SMT_PNMI
604*4882a593Smuzhiyun int pnmi_init(struct s_smc* smc);
605*4882a593Smuzhiyun int pnmi_process_ndis_id(struct s_smc *smc, u_long ndis_oid, void *buf, int len,
606*4882a593Smuzhiyun 			 int *BytesAccessed, int *BytesNeeded, u_char action);
607*4882a593Smuzhiyun #endif
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun #ifdef	SBA
610*4882a593Smuzhiyun #ifndef _H2INC
611*4882a593Smuzhiyun void sba();
612*4882a593Smuzhiyun #endif
613*4882a593Smuzhiyun void sba_raf_received_pack();
614*4882a593Smuzhiyun void sba_timer_poll();
615*4882a593Smuzhiyun void smt_init_sba();
616*4882a593Smuzhiyun #endif
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun #ifdef	ESS
619*4882a593Smuzhiyun int ess_raf_received_pack(struct s_smc *smc, SMbuf *mb, struct smt_header *sm,
620*4882a593Smuzhiyun 			  int fs);
621*4882a593Smuzhiyun void ess_timer_poll(struct s_smc *smc);
622*4882a593Smuzhiyun void ess_para_change(struct s_smc *smc);
623*4882a593Smuzhiyun #endif
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun #ifndef	BOOT
626*4882a593Smuzhiyun void smt_init_evc(struct s_smc *smc);
627*4882a593Smuzhiyun void smt_srf_event(struct s_smc *smc, int code, int index, int cond);
628*4882a593Smuzhiyun #else
629*4882a593Smuzhiyun #define smt_init_evc(smc)
630*4882a593Smuzhiyun #define smt_srf_event(smc,code,index,cond)
631*4882a593Smuzhiyun #endif
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun #ifndef SMT_REAL_TOKEN_CT
634*4882a593Smuzhiyun void smt_emulate_token_ct(struct s_smc *smc, int mac_index);
635*4882a593Smuzhiyun #endif
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun #if defined(DEBUG) && !defined(BOOT)
638*4882a593Smuzhiyun void dump_smt(struct s_smc *smc, struct smt_header *sm, char *text);
639*4882a593Smuzhiyun #else
640*4882a593Smuzhiyun #define	dump_smt(smc,sm,text)
641*4882a593Smuzhiyun #endif
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun #ifdef	DEBUG
644*4882a593Smuzhiyun void dump_hex(char *p, int len);
645*4882a593Smuzhiyun #endif
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun #endif	/* PROTOTYP_INC */
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun /* PNMI default defines */
650*4882a593Smuzhiyun #ifndef PNMI_INIT
651*4882a593Smuzhiyun #define	PNMI_INIT(smc)	/* Nothing */
652*4882a593Smuzhiyun #endif
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun /*
655*4882a593Smuzhiyun  * SMT_PANIC defines
656*4882a593Smuzhiyun  */
657*4882a593Smuzhiyun #ifndef	SMT_PANIC
658*4882a593Smuzhiyun #define	SMT_PANIC(smc,nr,msg)	smt_panic (smc, msg)
659*4882a593Smuzhiyun #endif
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun #ifndef	SMT_ERR_LOG
662*4882a593Smuzhiyun #define	SMT_ERR_LOG(smc,nr,msg)	SMT_PANIC (smc, nr, msg)
663*4882a593Smuzhiyun #endif
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun #ifndef	SMT_EBASE
666*4882a593Smuzhiyun #define	SMT_EBASE	100
667*4882a593Smuzhiyun #endif
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun #define	SMT_E0100	SMT_EBASE + 0
670*4882a593Smuzhiyun #define	SMT_E0100_MSG	"cfm FSM: invalid ce_type"
671*4882a593Smuzhiyun #define	SMT_E0101	SMT_EBASE + 1
672*4882a593Smuzhiyun #define	SMT_E0101_MSG	"CEM: case ???"
673*4882a593Smuzhiyun #define	SMT_E0102	SMT_EBASE + 2
674*4882a593Smuzhiyun #define	SMT_E0102_MSG	"CEM A: invalid state"
675*4882a593Smuzhiyun #define	SMT_E0103	SMT_EBASE + 3
676*4882a593Smuzhiyun #define	SMT_E0103_MSG	"CEM B: invalid state"
677*4882a593Smuzhiyun #define	SMT_E0104	SMT_EBASE + 4
678*4882a593Smuzhiyun #define	SMT_E0104_MSG	"CEM M: invalid state"
679*4882a593Smuzhiyun #define	SMT_E0105	SMT_EBASE + 5
680*4882a593Smuzhiyun #define	SMT_E0105_MSG	"CEM S: invalid state"
681*4882a593Smuzhiyun #define	SMT_E0106	SMT_EBASE + 6
682*4882a593Smuzhiyun #define	SMT_E0106_MSG	"CFM : invalid state"
683*4882a593Smuzhiyun #define	SMT_E0107	SMT_EBASE + 7
684*4882a593Smuzhiyun #define	SMT_E0107_MSG	"ECM : invalid state"
685*4882a593Smuzhiyun #define	SMT_E0108	SMT_EBASE + 8
686*4882a593Smuzhiyun #define	SMT_E0108_MSG	"prop_actions : NAC in DAS CFM"
687*4882a593Smuzhiyun #define	SMT_E0109	SMT_EBASE + 9
688*4882a593Smuzhiyun #define	SMT_E0109_MSG	"ST2U.FM_SERRSF error in special frame"
689*4882a593Smuzhiyun #define	SMT_E0110	SMT_EBASE + 10
690*4882a593Smuzhiyun #define	SMT_E0110_MSG	"ST2U.FM_SRFRCTOV recv. count. overflow"
691*4882a593Smuzhiyun #define	SMT_E0111	SMT_EBASE + 11
692*4882a593Smuzhiyun #define	SMT_E0111_MSG	"ST2U.FM_SNFSLD NP & FORMAC simult. load"
693*4882a593Smuzhiyun #define	SMT_E0112	SMT_EBASE + 12
694*4882a593Smuzhiyun #define	SMT_E0112_MSG	"ST2U.FM_SRCVFRM single-frame recv.-mode"
695*4882a593Smuzhiyun #define	SMT_E0113	SMT_EBASE + 13
696*4882a593Smuzhiyun #define	SMT_E0113_MSG	"FPLUS: Buffer Memory Error"
697*4882a593Smuzhiyun #define	SMT_E0114	SMT_EBASE + 14
698*4882a593Smuzhiyun #define	SMT_E0114_MSG	"ST2U.FM_SERRSF error in special frame"
699*4882a593Smuzhiyun #define	SMT_E0115	SMT_EBASE + 15
700*4882a593Smuzhiyun #define	SMT_E0115_MSG	"ST3L: parity error in receive queue 2"
701*4882a593Smuzhiyun #define	SMT_E0116	SMT_EBASE + 16
702*4882a593Smuzhiyun #define	SMT_E0116_MSG	"ST3L: parity error in receive queue 1"
703*4882a593Smuzhiyun #define	SMT_E0117	SMT_EBASE + 17
704*4882a593Smuzhiyun #define	SMT_E0117_MSG	"E_SMT_001: RxD count for receive queue 1 = 0"
705*4882a593Smuzhiyun #define	SMT_E0118	SMT_EBASE + 18
706*4882a593Smuzhiyun #define	SMT_E0118_MSG	"PCM : invalid state"
707*4882a593Smuzhiyun #define	SMT_E0119	SMT_EBASE + 19
708*4882a593Smuzhiyun #define	SMT_E0119_MSG	"smt_add_para"
709*4882a593Smuzhiyun #define	SMT_E0120	SMT_EBASE + 20
710*4882a593Smuzhiyun #define	SMT_E0120_MSG	"smt_set_para"
711*4882a593Smuzhiyun #define	SMT_E0121	SMT_EBASE + 21
712*4882a593Smuzhiyun #define	SMT_E0121_MSG	"invalid event in dispatcher"
713*4882a593Smuzhiyun #define	SMT_E0122	SMT_EBASE + 22
714*4882a593Smuzhiyun #define	SMT_E0122_MSG	"RMT : invalid state"
715*4882a593Smuzhiyun #define	SMT_E0123	SMT_EBASE + 23
716*4882a593Smuzhiyun #define	SMT_E0123_MSG	"SBA: state machine has invalid state"
717*4882a593Smuzhiyun #define	SMT_E0124	SMT_EBASE + 24
718*4882a593Smuzhiyun #define	SMT_E0124_MSG	"sba_free_session() called with NULL pointer"
719*4882a593Smuzhiyun #define	SMT_E0125	SMT_EBASE + 25
720*4882a593Smuzhiyun #define	SMT_E0125_MSG	"SBA : invalid session pointer"
721*4882a593Smuzhiyun #define	SMT_E0126	SMT_EBASE + 26
722*4882a593Smuzhiyun #define	SMT_E0126_MSG	"smt_free_mbuf() called with NULL pointer\n"
723*4882a593Smuzhiyun #define	SMT_E0127	SMT_EBASE + 27
724*4882a593Smuzhiyun #define	SMT_E0127_MSG	"sizeof evcs"
725*4882a593Smuzhiyun #define	SMT_E0128	SMT_EBASE + 28
726*4882a593Smuzhiyun #define	SMT_E0128_MSG	"evc->evc_cond_state = 0"
727*4882a593Smuzhiyun #define	SMT_E0129	SMT_EBASE + 29
728*4882a593Smuzhiyun #define	SMT_E0129_MSG	"evc->evc_multiple = 0"
729*4882a593Smuzhiyun #define	SMT_E0130	SMT_EBASE + 30
730*4882a593Smuzhiyun #define	SMT_E0130_MSG	write_mdr_warning
731*4882a593Smuzhiyun #define	SMT_E0131	SMT_EBASE + 31
732*4882a593Smuzhiyun #define	SMT_E0131_MSG	cam_warning
733*4882a593Smuzhiyun #define SMT_E0132	SMT_EBASE + 32
734*4882a593Smuzhiyun #define SMT_E0132_MSG	"ST1L.FM_SPCEPDx parity/coding error"
735*4882a593Smuzhiyun #define SMT_E0133	SMT_EBASE + 33
736*4882a593Smuzhiyun #define SMT_E0133_MSG	"ST1L.FM_STBURx tx buffer underrun"
737*4882a593Smuzhiyun #define SMT_E0134	SMT_EBASE + 34
738*4882a593Smuzhiyun #define SMT_E0134_MSG	"ST1L.FM_SPCEPDx parity error"
739*4882a593Smuzhiyun #define SMT_E0135	SMT_EBASE + 35
740*4882a593Smuzhiyun #define SMT_E0135_MSG	"RMT: duplicate MAC address detected. Ring left!"
741*4882a593Smuzhiyun #define SMT_E0136	SMT_EBASE + 36
742*4882a593Smuzhiyun #define SMT_E0136_MSG	"Elasticity Buffer hang-up"
743*4882a593Smuzhiyun #define SMT_E0137	SMT_EBASE + 37
744*4882a593Smuzhiyun #define SMT_E0137_MSG	"SMT: queue overrun"
745*4882a593Smuzhiyun #define SMT_E0138	SMT_EBASE + 38
746*4882a593Smuzhiyun #define SMT_E0138_MSG	"RMT: duplicate MAC address detected. Ring NOT left!"
747*4882a593Smuzhiyun #endif	/* _CMTDEF_ */
748