1*4882a593Smuzhiyun /* [xirc2ps_cs.c wk 03.11.99] (1.40 1999/11/18 00:06:03)
2*4882a593Smuzhiyun * Xircom CreditCard Ethernet Adapter IIps driver
3*4882a593Smuzhiyun * Xircom Realport 10/100 (RE-100) driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This driver supports various Xircom CreditCard Ethernet adapters
6*4882a593Smuzhiyun * including the CE2, CE IIps, RE-10, CEM28, CEM33, CE33, CEM56,
7*4882a593Smuzhiyun * CE3-100, CE3B, RE-100, REM10BT, and REM56G-100.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * 2000-09-24 <psheer@icon.co.za> The Xircom CE3B-100 may not
10*4882a593Smuzhiyun * autodetect the media properly. In this case use the
11*4882a593Smuzhiyun * if_port=1 (for 10BaseT) or if_port=4 (for 100BaseT) options
12*4882a593Smuzhiyun * to force the media type.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * Written originally by Werner Koch based on David Hinds' skeleton of the
15*4882a593Smuzhiyun * PCMCIA driver.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * Copyright (c) 1997,1998 Werner Koch (dd9jn)
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * This driver is free software; you can redistribute it and/or modify
20*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by
21*4882a593Smuzhiyun * the Free Software Foundation; either version 2 of the License, or
22*4882a593Smuzhiyun * (at your option) any later version.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * It is distributed in the hope that it will be useful,
25*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of
26*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27*4882a593Smuzhiyun * GNU General Public License for more details.
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
30*4882a593Smuzhiyun * along with this program; if not, see <http://www.gnu.org/licenses/>.
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun * ALTERNATIVELY, this driver may be distributed under the terms of
34*4882a593Smuzhiyun * the following license, in which case the provisions of this license
35*4882a593Smuzhiyun * are required INSTEAD OF the GNU General Public License. (This clause
36*4882a593Smuzhiyun * is necessary due to a potential bad interaction between the GPL and
37*4882a593Smuzhiyun * the restrictions contained in a BSD-style copyright.)
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without
40*4882a593Smuzhiyun * modification, are permitted provided that the following conditions
41*4882a593Smuzhiyun * are met:
42*4882a593Smuzhiyun * 1. Redistributions of source code must retain the above copyright
43*4882a593Smuzhiyun * notice, and the entire permission notice in its entirety,
44*4882a593Smuzhiyun * including the disclaimer of warranties.
45*4882a593Smuzhiyun * 2. Redistributions in binary form must reproduce the above copyright
46*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in the
47*4882a593Smuzhiyun * documentation and/or other materials provided with the distribution.
48*4882a593Smuzhiyun * 3. The name of the author may not be used to endorse or promote
49*4882a593Smuzhiyun * products derived from this software without specific prior
50*4882a593Smuzhiyun * written permission.
51*4882a593Smuzhiyun *
52*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
53*4882a593Smuzhiyun * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54*4882a593Smuzhiyun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
55*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
56*4882a593Smuzhiyun * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
57*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
58*4882a593Smuzhiyun * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59*4882a593Smuzhiyun * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
60*4882a593Smuzhiyun * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61*4882a593Smuzhiyun * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
62*4882a593Smuzhiyun * OF THE POSSIBILITY OF SUCH DAMAGE.
63*4882a593Smuzhiyun */
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #include <linux/module.h>
68*4882a593Smuzhiyun #include <linux/kernel.h>
69*4882a593Smuzhiyun #include <linux/init.h>
70*4882a593Smuzhiyun #include <linux/ptrace.h>
71*4882a593Smuzhiyun #include <linux/slab.h>
72*4882a593Smuzhiyun #include <linux/string.h>
73*4882a593Smuzhiyun #include <linux/timer.h>
74*4882a593Smuzhiyun #include <linux/interrupt.h>
75*4882a593Smuzhiyun #include <linux/in.h>
76*4882a593Smuzhiyun #include <linux/delay.h>
77*4882a593Smuzhiyun #include <linux/ethtool.h>
78*4882a593Smuzhiyun #include <linux/netdevice.h>
79*4882a593Smuzhiyun #include <linux/etherdevice.h>
80*4882a593Smuzhiyun #include <linux/skbuff.h>
81*4882a593Smuzhiyun #include <linux/if_arp.h>
82*4882a593Smuzhiyun #include <linux/ioport.h>
83*4882a593Smuzhiyun #include <linux/bitops.h>
84*4882a593Smuzhiyun #include <linux/mii.h>
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun #include <pcmcia/cistpl.h>
87*4882a593Smuzhiyun #include <pcmcia/cisreg.h>
88*4882a593Smuzhiyun #include <pcmcia/ciscode.h>
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #include <asm/io.h>
91*4882a593Smuzhiyun #include <linux/uaccess.h>
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun #ifndef MANFID_COMPAQ
94*4882a593Smuzhiyun #define MANFID_COMPAQ 0x0138
95*4882a593Smuzhiyun #define MANFID_COMPAQ2 0x0183 /* is this correct? */
96*4882a593Smuzhiyun #endif
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun #include <pcmcia/ds.h>
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /* Time in jiffies before concluding Tx hung */
101*4882a593Smuzhiyun #define TX_TIMEOUT ((400*HZ)/1000)
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /****************
104*4882a593Smuzhiyun * Some constants used to access the hardware
105*4882a593Smuzhiyun */
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* Register offsets and value constans */
108*4882a593Smuzhiyun #define XIRCREG_CR 0 /* Command register (wr) */
109*4882a593Smuzhiyun enum xirc_cr {
110*4882a593Smuzhiyun TransmitPacket = 0x01,
111*4882a593Smuzhiyun SoftReset = 0x02,
112*4882a593Smuzhiyun EnableIntr = 0x04,
113*4882a593Smuzhiyun ForceIntr = 0x08,
114*4882a593Smuzhiyun ClearTxFIFO = 0x10,
115*4882a593Smuzhiyun ClearRxOvrun = 0x20,
116*4882a593Smuzhiyun RestartTx = 0x40
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun #define XIRCREG_ESR 0 /* Ethernet status register (rd) */
119*4882a593Smuzhiyun enum xirc_esr {
120*4882a593Smuzhiyun FullPktRcvd = 0x01, /* full packet in receive buffer */
121*4882a593Smuzhiyun PktRejected = 0x04, /* a packet has been rejected */
122*4882a593Smuzhiyun TxPktPend = 0x08, /* TX Packet Pending */
123*4882a593Smuzhiyun IncorPolarity = 0x10,
124*4882a593Smuzhiyun MediaSelect = 0x20 /* set if TP, clear if AUI */
125*4882a593Smuzhiyun };
126*4882a593Smuzhiyun #define XIRCREG_PR 1 /* Page Register select */
127*4882a593Smuzhiyun #define XIRCREG_EDP 4 /* Ethernet Data Port Register */
128*4882a593Smuzhiyun #define XIRCREG_ISR 6 /* Ethernet Interrupt Status Register */
129*4882a593Smuzhiyun enum xirc_isr {
130*4882a593Smuzhiyun TxBufOvr = 0x01, /* TX Buffer Overflow */
131*4882a593Smuzhiyun PktTxed = 0x02, /* Packet Transmitted */
132*4882a593Smuzhiyun MACIntr = 0x04, /* MAC Interrupt occurred */
133*4882a593Smuzhiyun TxResGrant = 0x08, /* Tx Reservation Granted */
134*4882a593Smuzhiyun RxFullPkt = 0x20, /* Rx Full Packet */
135*4882a593Smuzhiyun RxPktRej = 0x40, /* Rx Packet Rejected */
136*4882a593Smuzhiyun ForcedIntr= 0x80 /* Forced Interrupt */
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun #define XIRCREG1_IMR0 12 /* Ethernet Interrupt Mask Register (on page 1)*/
139*4882a593Smuzhiyun #define XIRCREG1_IMR1 13
140*4882a593Smuzhiyun #define XIRCREG0_TSO 8 /* Transmit Space Open Register (on page 0)*/
141*4882a593Smuzhiyun #define XIRCREG0_TRS 10 /* Transmit reservation Size Register (page 0)*/
142*4882a593Smuzhiyun #define XIRCREG0_DO 12 /* Data Offset Register (page 0) (wr) */
143*4882a593Smuzhiyun #define XIRCREG0_RSR 12 /* Receive Status Register (page 0) (rd) */
144*4882a593Smuzhiyun enum xirc_rsr {
145*4882a593Smuzhiyun PhyPkt = 0x01, /* set:physical packet, clear: multicast packet */
146*4882a593Smuzhiyun BrdcstPkt = 0x02, /* set if it is a broadcast packet */
147*4882a593Smuzhiyun PktTooLong = 0x04, /* set if packet length > 1518 */
148*4882a593Smuzhiyun AlignErr = 0x10, /* incorrect CRC and last octet not complete */
149*4882a593Smuzhiyun CRCErr = 0x20, /* incorrect CRC and last octet is complete */
150*4882a593Smuzhiyun PktRxOk = 0x80 /* received ok */
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun #define XIRCREG0_PTR 13 /* packets transmitted register (rd) */
153*4882a593Smuzhiyun #define XIRCREG0_RBC 14 /* receive byte count regsister (rd) */
154*4882a593Smuzhiyun #define XIRCREG1_ECR 14 /* ethernet configurationn register */
155*4882a593Smuzhiyun enum xirc_ecr {
156*4882a593Smuzhiyun FullDuplex = 0x04, /* enable full duplex mode */
157*4882a593Smuzhiyun LongTPMode = 0x08, /* adjust for longer lengths of TP cable */
158*4882a593Smuzhiyun DisablePolCor = 0x10,/* disable auto polarity correction */
159*4882a593Smuzhiyun DisableLinkPulse = 0x20, /* disable link pulse generation */
160*4882a593Smuzhiyun DisableAutoTx = 0x40, /* disable auto-transmit */
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun #define XIRCREG2_RBS 8 /* receive buffer start register */
163*4882a593Smuzhiyun #define XIRCREG2_LED 10 /* LED Configuration register */
164*4882a593Smuzhiyun /* values for the leds: Bits 2-0 for led 1
165*4882a593Smuzhiyun * 0 disabled Bits 5-3 for led 2
166*4882a593Smuzhiyun * 1 collision
167*4882a593Smuzhiyun * 2 noncollision
168*4882a593Smuzhiyun * 3 link_detected
169*4882a593Smuzhiyun * 4 incor_polarity
170*4882a593Smuzhiyun * 5 jabber
171*4882a593Smuzhiyun * 6 auto_assertion
172*4882a593Smuzhiyun * 7 rx_tx_activity
173*4882a593Smuzhiyun */
174*4882a593Smuzhiyun #define XIRCREG2_MSR 12 /* Mohawk specific register */
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun #define XIRCREG4_GPR0 8 /* General Purpose Register 0 */
177*4882a593Smuzhiyun #define XIRCREG4_GPR1 9 /* General Purpose Register 1 */
178*4882a593Smuzhiyun #define XIRCREG2_GPR2 13 /* General Purpose Register 2 (page2!)*/
179*4882a593Smuzhiyun #define XIRCREG4_BOV 10 /* Bonding Version Register */
180*4882a593Smuzhiyun #define XIRCREG4_LMA 12 /* Local Memory Address Register */
181*4882a593Smuzhiyun #define XIRCREG4_LMD 14 /* Local Memory Data Port */
182*4882a593Smuzhiyun /* MAC register can only by accessed with 8 bit operations */
183*4882a593Smuzhiyun #define XIRCREG40_CMD0 8 /* Command Register (wr) */
184*4882a593Smuzhiyun enum xirc_cmd { /* Commands */
185*4882a593Smuzhiyun Transmit = 0x01,
186*4882a593Smuzhiyun EnableRecv = 0x04,
187*4882a593Smuzhiyun DisableRecv = 0x08,
188*4882a593Smuzhiyun Abort = 0x10,
189*4882a593Smuzhiyun Online = 0x20,
190*4882a593Smuzhiyun IntrAck = 0x40,
191*4882a593Smuzhiyun Offline = 0x80
192*4882a593Smuzhiyun };
193*4882a593Smuzhiyun #define XIRCREG5_RHSA0 10 /* Rx Host Start Address */
194*4882a593Smuzhiyun #define XIRCREG40_RXST0 9 /* Receive Status Register */
195*4882a593Smuzhiyun #define XIRCREG40_TXST0 11 /* Transmit Status Register 0 */
196*4882a593Smuzhiyun #define XIRCREG40_TXST1 12 /* Transmit Status Register 10 */
197*4882a593Smuzhiyun #define XIRCREG40_RMASK0 13 /* Receive Mask Register */
198*4882a593Smuzhiyun #define XIRCREG40_TMASK0 14 /* Transmit Mask Register 0 */
199*4882a593Smuzhiyun #define XIRCREG40_TMASK1 15 /* Transmit Mask Register 0 */
200*4882a593Smuzhiyun #define XIRCREG42_SWC0 8 /* Software Configuration 0 */
201*4882a593Smuzhiyun #define XIRCREG42_SWC1 9 /* Software Configuration 1 */
202*4882a593Smuzhiyun #define XIRCREG42_BOC 10 /* Back-Off Configuration */
203*4882a593Smuzhiyun #define XIRCREG44_TDR0 8 /* Time Domain Reflectometry 0 */
204*4882a593Smuzhiyun #define XIRCREG44_TDR1 9 /* Time Domain Reflectometry 1 */
205*4882a593Smuzhiyun #define XIRCREG44_RXBC_LO 10 /* Rx Byte Count 0 (rd) */
206*4882a593Smuzhiyun #define XIRCREG44_RXBC_HI 11 /* Rx Byte Count 1 (rd) */
207*4882a593Smuzhiyun #define XIRCREG45_REV 15 /* Revision Register (rd) */
208*4882a593Smuzhiyun #define XIRCREG50_IA 8 /* Individual Address (8-13) */
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun static const char *if_names[] = { "Auto", "10BaseT", "10Base2", "AUI", "100BaseT" };
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun /* card types */
213*4882a593Smuzhiyun #define XIR_UNKNOWN 0 /* unknown: not supported */
214*4882a593Smuzhiyun #define XIR_CE 1 /* (prodid 1) different hardware: not supported */
215*4882a593Smuzhiyun #define XIR_CE2 2 /* (prodid 2) */
216*4882a593Smuzhiyun #define XIR_CE3 3 /* (prodid 3) */
217*4882a593Smuzhiyun #define XIR_CEM 4 /* (prodid 1) different hardware: not supported */
218*4882a593Smuzhiyun #define XIR_CEM2 5 /* (prodid 2) */
219*4882a593Smuzhiyun #define XIR_CEM3 6 /* (prodid 3) */
220*4882a593Smuzhiyun #define XIR_CEM33 7 /* (prodid 4) */
221*4882a593Smuzhiyun #define XIR_CEM56M 8 /* (prodid 5) */
222*4882a593Smuzhiyun #define XIR_CEM56 9 /* (prodid 6) */
223*4882a593Smuzhiyun #define XIR_CM28 10 /* (prodid 3) modem only: not supported here */
224*4882a593Smuzhiyun #define XIR_CM33 11 /* (prodid 4) modem only: not supported here */
225*4882a593Smuzhiyun #define XIR_CM56 12 /* (prodid 5) modem only: not supported here */
226*4882a593Smuzhiyun #define XIR_CG 13 /* (prodid 1) GSM modem only: not supported */
227*4882a593Smuzhiyun #define XIR_CBE 14 /* (prodid 1) cardbus ethernet: not supported */
228*4882a593Smuzhiyun /*====================================================================*/
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun /* Module parameters */
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun MODULE_DESCRIPTION("Xircom PCMCIA ethernet driver");
233*4882a593Smuzhiyun MODULE_LICENSE("Dual MPL/GPL");
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun INT_MODULE_PARM(if_port, 0);
238*4882a593Smuzhiyun INT_MODULE_PARM(full_duplex, 0);
239*4882a593Smuzhiyun INT_MODULE_PARM(do_sound, 1);
240*4882a593Smuzhiyun INT_MODULE_PARM(lockup_hack, 0); /* anti lockup hack */
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun /*====================================================================*/
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun /* We do not process more than these number of bytes during one
245*4882a593Smuzhiyun * interrupt. (Of course we receive complete packets, so this is not
246*4882a593Smuzhiyun * an exact value).
247*4882a593Smuzhiyun * Something between 2000..22000; first value gives best interrupt latency,
248*4882a593Smuzhiyun * the second enables the usage of the complete on-chip buffer. We use the
249*4882a593Smuzhiyun * high value as the initial value.
250*4882a593Smuzhiyun */
251*4882a593Smuzhiyun static unsigned maxrx_bytes = 22000;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun /* MII management prototypes */
254*4882a593Smuzhiyun static void mii_idle(unsigned int ioaddr);
255*4882a593Smuzhiyun static void mii_putbit(unsigned int ioaddr, unsigned data);
256*4882a593Smuzhiyun static int mii_getbit(unsigned int ioaddr);
257*4882a593Smuzhiyun static void mii_wbits(unsigned int ioaddr, unsigned data, int len);
258*4882a593Smuzhiyun static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg);
259*4882a593Smuzhiyun static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg,
260*4882a593Smuzhiyun unsigned data, int len);
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun static int has_ce2_string(struct pcmcia_device * link);
263*4882a593Smuzhiyun static int xirc2ps_config(struct pcmcia_device * link);
264*4882a593Smuzhiyun static void xirc2ps_release(struct pcmcia_device * link);
265*4882a593Smuzhiyun static void xirc2ps_detach(struct pcmcia_device *p_dev);
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun static irqreturn_t xirc2ps_interrupt(int irq, void *dev_id);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun struct local_info {
270*4882a593Smuzhiyun struct net_device *dev;
271*4882a593Smuzhiyun struct pcmcia_device *p_dev;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun int card_type;
274*4882a593Smuzhiyun int probe_port;
275*4882a593Smuzhiyun int silicon; /* silicon revision. 0=old CE2, 1=Scipper, 4=Mohawk */
276*4882a593Smuzhiyun int mohawk; /* a CE3 type card */
277*4882a593Smuzhiyun int dingo; /* a CEM56 type card */
278*4882a593Smuzhiyun int new_mii; /* has full 10baseT/100baseT MII */
279*4882a593Smuzhiyun int modem; /* is a multi function card (i.e with a modem) */
280*4882a593Smuzhiyun void __iomem *dingo_ccr; /* only used for CEM56 cards */
281*4882a593Smuzhiyun unsigned last_ptr_value; /* last packets transmitted value */
282*4882a593Smuzhiyun const char *manf_str;
283*4882a593Smuzhiyun struct work_struct tx_timeout_task;
284*4882a593Smuzhiyun };
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun /****************
287*4882a593Smuzhiyun * Some more prototypes
288*4882a593Smuzhiyun */
289*4882a593Smuzhiyun static netdev_tx_t do_start_xmit(struct sk_buff *skb,
290*4882a593Smuzhiyun struct net_device *dev);
291*4882a593Smuzhiyun static void xirc_tx_timeout(struct net_device *dev, unsigned int txqueue);
292*4882a593Smuzhiyun static void xirc2ps_tx_timeout_task(struct work_struct *work);
293*4882a593Smuzhiyun static void set_addresses(struct net_device *dev);
294*4882a593Smuzhiyun static void set_multicast_list(struct net_device *dev);
295*4882a593Smuzhiyun static int set_card_type(struct pcmcia_device *link);
296*4882a593Smuzhiyun static int do_config(struct net_device *dev, struct ifmap *map);
297*4882a593Smuzhiyun static int do_open(struct net_device *dev);
298*4882a593Smuzhiyun static int do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
299*4882a593Smuzhiyun static const struct ethtool_ops netdev_ethtool_ops;
300*4882a593Smuzhiyun static void hardreset(struct net_device *dev);
301*4882a593Smuzhiyun static void do_reset(struct net_device *dev, int full);
302*4882a593Smuzhiyun static int init_mii(struct net_device *dev);
303*4882a593Smuzhiyun static void do_powerdown(struct net_device *dev);
304*4882a593Smuzhiyun static int do_stop(struct net_device *dev);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun /*=============== Helper functions =========================*/
307*4882a593Smuzhiyun #define SelectPage(pgnr) outb((pgnr), ioaddr + XIRCREG_PR)
308*4882a593Smuzhiyun #define GetByte(reg) ((unsigned)inb(ioaddr + (reg)))
309*4882a593Smuzhiyun #define GetWord(reg) ((unsigned)inw(ioaddr + (reg)))
310*4882a593Smuzhiyun #define PutByte(reg,value) outb((value), ioaddr+(reg))
311*4882a593Smuzhiyun #define PutWord(reg,value) outw((value), ioaddr+(reg))
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun /*====== Functions used for debugging =================================*/
314*4882a593Smuzhiyun #if 0 /* reading regs may change system status */
315*4882a593Smuzhiyun static void
316*4882a593Smuzhiyun PrintRegisters(struct net_device *dev)
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun if (pc_debug > 1) {
321*4882a593Smuzhiyun int i, page;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun printk(KERN_DEBUG pr_fmt("Register common: "));
324*4882a593Smuzhiyun for (i = 0; i < 8; i++)
325*4882a593Smuzhiyun pr_cont(" %2.2x", GetByte(i));
326*4882a593Smuzhiyun pr_cont("\n");
327*4882a593Smuzhiyun for (page = 0; page <= 8; page++) {
328*4882a593Smuzhiyun printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
329*4882a593Smuzhiyun SelectPage(page);
330*4882a593Smuzhiyun for (i = 8; i < 16; i++)
331*4882a593Smuzhiyun pr_cont(" %2.2x", GetByte(i));
332*4882a593Smuzhiyun pr_cont("\n");
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun for (page=0x40 ; page <= 0x5f; page++) {
335*4882a593Smuzhiyun if (page == 0x43 || (page >= 0x46 && page <= 0x4f) ||
336*4882a593Smuzhiyun (page >= 0x51 && page <=0x5e))
337*4882a593Smuzhiyun continue;
338*4882a593Smuzhiyun printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
339*4882a593Smuzhiyun SelectPage(page);
340*4882a593Smuzhiyun for (i = 8; i < 16; i++)
341*4882a593Smuzhiyun pr_cont(" %2.2x", GetByte(i));
342*4882a593Smuzhiyun pr_cont("\n");
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun #endif /* 0 */
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun /*============== MII Management functions ===============*/
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun /****************
351*4882a593Smuzhiyun * Turn around for read
352*4882a593Smuzhiyun */
353*4882a593Smuzhiyun static void
mii_idle(unsigned int ioaddr)354*4882a593Smuzhiyun mii_idle(unsigned int ioaddr)
355*4882a593Smuzhiyun {
356*4882a593Smuzhiyun PutByte(XIRCREG2_GPR2, 0x04|0); /* drive MDCK low */
357*4882a593Smuzhiyun udelay(1);
358*4882a593Smuzhiyun PutByte(XIRCREG2_GPR2, 0x04|1); /* and drive MDCK high */
359*4882a593Smuzhiyun udelay(1);
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun /****************
363*4882a593Smuzhiyun * Write a bit to MDI/O
364*4882a593Smuzhiyun */
365*4882a593Smuzhiyun static void
mii_putbit(unsigned int ioaddr,unsigned data)366*4882a593Smuzhiyun mii_putbit(unsigned int ioaddr, unsigned data)
367*4882a593Smuzhiyun {
368*4882a593Smuzhiyun #if 1
369*4882a593Smuzhiyun if (data) {
370*4882a593Smuzhiyun PutByte(XIRCREG2_GPR2, 0x0c|2|0); /* set MDIO */
371*4882a593Smuzhiyun udelay(1);
372*4882a593Smuzhiyun PutByte(XIRCREG2_GPR2, 0x0c|2|1); /* and drive MDCK high */
373*4882a593Smuzhiyun udelay(1);
374*4882a593Smuzhiyun } else {
375*4882a593Smuzhiyun PutByte(XIRCREG2_GPR2, 0x0c|0|0); /* clear MDIO */
376*4882a593Smuzhiyun udelay(1);
377*4882a593Smuzhiyun PutByte(XIRCREG2_GPR2, 0x0c|0|1); /* and drive MDCK high */
378*4882a593Smuzhiyun udelay(1);
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun #else
381*4882a593Smuzhiyun if (data) {
382*4882a593Smuzhiyun PutWord(XIRCREG2_GPR2-1, 0x0e0e);
383*4882a593Smuzhiyun udelay(1);
384*4882a593Smuzhiyun PutWord(XIRCREG2_GPR2-1, 0x0f0f);
385*4882a593Smuzhiyun udelay(1);
386*4882a593Smuzhiyun } else {
387*4882a593Smuzhiyun PutWord(XIRCREG2_GPR2-1, 0x0c0c);
388*4882a593Smuzhiyun udelay(1);
389*4882a593Smuzhiyun PutWord(XIRCREG2_GPR2-1, 0x0d0d);
390*4882a593Smuzhiyun udelay(1);
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun #endif
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun /****************
396*4882a593Smuzhiyun * Get a bit from MDI/O
397*4882a593Smuzhiyun */
398*4882a593Smuzhiyun static int
mii_getbit(unsigned int ioaddr)399*4882a593Smuzhiyun mii_getbit(unsigned int ioaddr)
400*4882a593Smuzhiyun {
401*4882a593Smuzhiyun unsigned d;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun PutByte(XIRCREG2_GPR2, 4|0); /* drive MDCK low */
404*4882a593Smuzhiyun udelay(1);
405*4882a593Smuzhiyun d = GetByte(XIRCREG2_GPR2); /* read MDIO */
406*4882a593Smuzhiyun PutByte(XIRCREG2_GPR2, 4|1); /* drive MDCK high again */
407*4882a593Smuzhiyun udelay(1);
408*4882a593Smuzhiyun return d & 0x20; /* read MDIO */
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun static void
mii_wbits(unsigned int ioaddr,unsigned data,int len)412*4882a593Smuzhiyun mii_wbits(unsigned int ioaddr, unsigned data, int len)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun unsigned m = 1 << (len-1);
415*4882a593Smuzhiyun for (; m; m >>= 1)
416*4882a593Smuzhiyun mii_putbit(ioaddr, data & m);
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun static unsigned
mii_rd(unsigned int ioaddr,u_char phyaddr,u_char phyreg)420*4882a593Smuzhiyun mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg)
421*4882a593Smuzhiyun {
422*4882a593Smuzhiyun int i;
423*4882a593Smuzhiyun unsigned data=0, m;
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun SelectPage(2);
426*4882a593Smuzhiyun for (i=0; i < 32; i++) /* 32 bit preamble */
427*4882a593Smuzhiyun mii_putbit(ioaddr, 1);
428*4882a593Smuzhiyun mii_wbits(ioaddr, 0x06, 4); /* Start and opcode for read */
429*4882a593Smuzhiyun mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
430*4882a593Smuzhiyun mii_wbits(ioaddr, phyreg, 5); /* PHY register to read */
431*4882a593Smuzhiyun mii_idle(ioaddr); /* turn around */
432*4882a593Smuzhiyun mii_getbit(ioaddr);
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun for (m = 1<<15; m; m >>= 1)
435*4882a593Smuzhiyun if (mii_getbit(ioaddr))
436*4882a593Smuzhiyun data |= m;
437*4882a593Smuzhiyun mii_idle(ioaddr);
438*4882a593Smuzhiyun return data;
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun static void
mii_wr(unsigned int ioaddr,u_char phyaddr,u_char phyreg,unsigned data,int len)442*4882a593Smuzhiyun mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data,
443*4882a593Smuzhiyun int len)
444*4882a593Smuzhiyun {
445*4882a593Smuzhiyun int i;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun SelectPage(2);
448*4882a593Smuzhiyun for (i=0; i < 32; i++) /* 32 bit preamble */
449*4882a593Smuzhiyun mii_putbit(ioaddr, 1);
450*4882a593Smuzhiyun mii_wbits(ioaddr, 0x05, 4); /* Start and opcode for write */
451*4882a593Smuzhiyun mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
452*4882a593Smuzhiyun mii_wbits(ioaddr, phyreg, 5); /* PHY Register to write */
453*4882a593Smuzhiyun mii_putbit(ioaddr, 1); /* turn around */
454*4882a593Smuzhiyun mii_putbit(ioaddr, 0);
455*4882a593Smuzhiyun mii_wbits(ioaddr, data, len); /* And write the data */
456*4882a593Smuzhiyun mii_idle(ioaddr);
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun /*============= Main bulk of functions =========================*/
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun static const struct net_device_ops netdev_ops = {
462*4882a593Smuzhiyun .ndo_open = do_open,
463*4882a593Smuzhiyun .ndo_stop = do_stop,
464*4882a593Smuzhiyun .ndo_start_xmit = do_start_xmit,
465*4882a593Smuzhiyun .ndo_tx_timeout = xirc_tx_timeout,
466*4882a593Smuzhiyun .ndo_set_config = do_config,
467*4882a593Smuzhiyun .ndo_do_ioctl = do_ioctl,
468*4882a593Smuzhiyun .ndo_set_rx_mode = set_multicast_list,
469*4882a593Smuzhiyun .ndo_set_mac_address = eth_mac_addr,
470*4882a593Smuzhiyun .ndo_validate_addr = eth_validate_addr,
471*4882a593Smuzhiyun };
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun static int
xirc2ps_probe(struct pcmcia_device * link)474*4882a593Smuzhiyun xirc2ps_probe(struct pcmcia_device *link)
475*4882a593Smuzhiyun {
476*4882a593Smuzhiyun struct net_device *dev;
477*4882a593Smuzhiyun struct local_info *local;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun dev_dbg(&link->dev, "attach()\n");
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun /* Allocate the device structure */
482*4882a593Smuzhiyun dev = alloc_etherdev(sizeof(struct local_info));
483*4882a593Smuzhiyun if (!dev)
484*4882a593Smuzhiyun return -ENOMEM;
485*4882a593Smuzhiyun local = netdev_priv(dev);
486*4882a593Smuzhiyun local->dev = dev;
487*4882a593Smuzhiyun local->p_dev = link;
488*4882a593Smuzhiyun link->priv = dev;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun /* General socket configuration */
491*4882a593Smuzhiyun link->config_index = 1;
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun /* Fill in card specific entries */
494*4882a593Smuzhiyun dev->netdev_ops = &netdev_ops;
495*4882a593Smuzhiyun dev->ethtool_ops = &netdev_ethtool_ops;
496*4882a593Smuzhiyun dev->watchdog_timeo = TX_TIMEOUT;
497*4882a593Smuzhiyun INIT_WORK(&local->tx_timeout_task, xirc2ps_tx_timeout_task);
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun return xirc2ps_config(link);
500*4882a593Smuzhiyun } /* xirc2ps_attach */
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun static void
xirc2ps_detach(struct pcmcia_device * link)503*4882a593Smuzhiyun xirc2ps_detach(struct pcmcia_device *link)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun struct net_device *dev = link->priv;
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun dev_dbg(&link->dev, "detach\n");
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun unregister_netdev(dev);
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun xirc2ps_release(link);
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun free_netdev(dev);
514*4882a593Smuzhiyun } /* xirc2ps_detach */
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun /****************
517*4882a593Smuzhiyun * Detect the type of the card. s is the buffer with the data of tuple 0x20
518*4882a593Smuzhiyun * Returns: 0 := not supported
519*4882a593Smuzhiyun * mediaid=11 and prodid=47
520*4882a593Smuzhiyun * Media-Id bits:
521*4882a593Smuzhiyun * Ethernet 0x01
522*4882a593Smuzhiyun * Tokenring 0x02
523*4882a593Smuzhiyun * Arcnet 0x04
524*4882a593Smuzhiyun * Wireless 0x08
525*4882a593Smuzhiyun * Modem 0x10
526*4882a593Smuzhiyun * GSM only 0x20
527*4882a593Smuzhiyun * Prod-Id bits:
528*4882a593Smuzhiyun * Pocket 0x10
529*4882a593Smuzhiyun * External 0x20
530*4882a593Smuzhiyun * Creditcard 0x40
531*4882a593Smuzhiyun * Cardbus 0x80
532*4882a593Smuzhiyun *
533*4882a593Smuzhiyun */
534*4882a593Smuzhiyun static int
set_card_type(struct pcmcia_device * link)535*4882a593Smuzhiyun set_card_type(struct pcmcia_device *link)
536*4882a593Smuzhiyun {
537*4882a593Smuzhiyun struct net_device *dev = link->priv;
538*4882a593Smuzhiyun struct local_info *local = netdev_priv(dev);
539*4882a593Smuzhiyun u8 *buf;
540*4882a593Smuzhiyun unsigned int cisrev, mediaid, prodid;
541*4882a593Smuzhiyun size_t len;
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun len = pcmcia_get_tuple(link, CISTPL_MANFID, &buf);
544*4882a593Smuzhiyun if (len < 5) {
545*4882a593Smuzhiyun dev_err(&link->dev, "invalid CIS -- sorry\n");
546*4882a593Smuzhiyun return 0;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun cisrev = buf[2];
550*4882a593Smuzhiyun mediaid = buf[3];
551*4882a593Smuzhiyun prodid = buf[4];
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun dev_dbg(&link->dev, "cisrev=%02x mediaid=%02x prodid=%02x\n",
554*4882a593Smuzhiyun cisrev, mediaid, prodid);
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun local->mohawk = 0;
557*4882a593Smuzhiyun local->dingo = 0;
558*4882a593Smuzhiyun local->modem = 0;
559*4882a593Smuzhiyun local->card_type = XIR_UNKNOWN;
560*4882a593Smuzhiyun if (!(prodid & 0x40)) {
561*4882a593Smuzhiyun pr_notice("Oops: Not a creditcard\n");
562*4882a593Smuzhiyun return 0;
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun if (!(mediaid & 0x01)) {
565*4882a593Smuzhiyun pr_notice("Not an Ethernet card\n");
566*4882a593Smuzhiyun return 0;
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun if (mediaid & 0x10) {
569*4882a593Smuzhiyun local->modem = 1;
570*4882a593Smuzhiyun switch(prodid & 15) {
571*4882a593Smuzhiyun case 1: local->card_type = XIR_CEM ; break;
572*4882a593Smuzhiyun case 2: local->card_type = XIR_CEM2 ; break;
573*4882a593Smuzhiyun case 3: local->card_type = XIR_CEM3 ; break;
574*4882a593Smuzhiyun case 4: local->card_type = XIR_CEM33 ; break;
575*4882a593Smuzhiyun case 5: local->card_type = XIR_CEM56M;
576*4882a593Smuzhiyun local->mohawk = 1;
577*4882a593Smuzhiyun break;
578*4882a593Smuzhiyun case 6:
579*4882a593Smuzhiyun case 7: /* 7 is the RealPort 10/56 */
580*4882a593Smuzhiyun local->card_type = XIR_CEM56 ;
581*4882a593Smuzhiyun local->mohawk = 1;
582*4882a593Smuzhiyun local->dingo = 1;
583*4882a593Smuzhiyun break;
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun } else {
586*4882a593Smuzhiyun switch(prodid & 15) {
587*4882a593Smuzhiyun case 1: local->card_type = has_ce2_string(link)? XIR_CE2 : XIR_CE ;
588*4882a593Smuzhiyun break;
589*4882a593Smuzhiyun case 2: local->card_type = XIR_CE2; break;
590*4882a593Smuzhiyun case 3: local->card_type = XIR_CE3;
591*4882a593Smuzhiyun local->mohawk = 1;
592*4882a593Smuzhiyun break;
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun if (local->card_type == XIR_CE || local->card_type == XIR_CEM) {
596*4882a593Smuzhiyun pr_notice("Sorry, this is an old CE card\n");
597*4882a593Smuzhiyun return 0;
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun if (local->card_type == XIR_UNKNOWN)
600*4882a593Smuzhiyun pr_notice("unknown card (mediaid=%02x prodid=%02x)\n", mediaid, prodid);
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun return 1;
603*4882a593Smuzhiyun }
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun /****************
606*4882a593Smuzhiyun * There are some CE2 cards out which claim to be a CE card.
607*4882a593Smuzhiyun * This function looks for a "CE2" in the 3rd version field.
608*4882a593Smuzhiyun * Returns: true if this is a CE2
609*4882a593Smuzhiyun */
610*4882a593Smuzhiyun static int
has_ce2_string(struct pcmcia_device * p_dev)611*4882a593Smuzhiyun has_ce2_string(struct pcmcia_device * p_dev)
612*4882a593Smuzhiyun {
613*4882a593Smuzhiyun if (p_dev->prod_id[2] && strstr(p_dev->prod_id[2], "CE2"))
614*4882a593Smuzhiyun return 1;
615*4882a593Smuzhiyun return 0;
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun static int
xirc2ps_config_modem(struct pcmcia_device * p_dev,void * priv_data)619*4882a593Smuzhiyun xirc2ps_config_modem(struct pcmcia_device *p_dev, void *priv_data)
620*4882a593Smuzhiyun {
621*4882a593Smuzhiyun unsigned int ioaddr;
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun if ((p_dev->resource[0]->start & 0xf) == 8)
624*4882a593Smuzhiyun return -ENODEV;
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun p_dev->resource[0]->end = 16;
627*4882a593Smuzhiyun p_dev->resource[1]->end = 8;
628*4882a593Smuzhiyun p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
629*4882a593Smuzhiyun p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
630*4882a593Smuzhiyun p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
631*4882a593Smuzhiyun p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
632*4882a593Smuzhiyun p_dev->io_lines = 10;
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun p_dev->resource[1]->start = p_dev->resource[0]->start;
635*4882a593Smuzhiyun for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
636*4882a593Smuzhiyun p_dev->resource[0]->start = ioaddr;
637*4882a593Smuzhiyun if (!pcmcia_request_io(p_dev))
638*4882a593Smuzhiyun return 0;
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun return -ENODEV;
641*4882a593Smuzhiyun }
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun static int
xirc2ps_config_check(struct pcmcia_device * p_dev,void * priv_data)644*4882a593Smuzhiyun xirc2ps_config_check(struct pcmcia_device *p_dev, void *priv_data)
645*4882a593Smuzhiyun {
646*4882a593Smuzhiyun int *pass = priv_data;
647*4882a593Smuzhiyun resource_size_t tmp = p_dev->resource[1]->start;
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun tmp += (*pass ? (p_dev->config_index & 0x20 ? -24 : 8)
650*4882a593Smuzhiyun : (p_dev->config_index & 0x20 ? 8 : -24));
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun if ((p_dev->resource[0]->start & 0xf) == 8)
653*4882a593Smuzhiyun return -ENODEV;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun p_dev->resource[0]->end = 18;
656*4882a593Smuzhiyun p_dev->resource[1]->end = 8;
657*4882a593Smuzhiyun p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
658*4882a593Smuzhiyun p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
659*4882a593Smuzhiyun p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
660*4882a593Smuzhiyun p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
661*4882a593Smuzhiyun p_dev->io_lines = 10;
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun p_dev->resource[1]->start = p_dev->resource[0]->start;
664*4882a593Smuzhiyun p_dev->resource[0]->start = tmp;
665*4882a593Smuzhiyun return pcmcia_request_io(p_dev);
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun
pcmcia_get_mac_ce(struct pcmcia_device * p_dev,tuple_t * tuple,void * priv)669*4882a593Smuzhiyun static int pcmcia_get_mac_ce(struct pcmcia_device *p_dev,
670*4882a593Smuzhiyun tuple_t *tuple,
671*4882a593Smuzhiyun void *priv)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun struct net_device *dev = priv;
674*4882a593Smuzhiyun int i;
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun if (tuple->TupleDataLen != 13)
677*4882a593Smuzhiyun return -EINVAL;
678*4882a593Smuzhiyun if ((tuple->TupleData[0] != 2) || (tuple->TupleData[1] != 1) ||
679*4882a593Smuzhiyun (tuple->TupleData[2] != 6))
680*4882a593Smuzhiyun return -EINVAL;
681*4882a593Smuzhiyun /* another try (James Lehmer's CE2 version 4.1)*/
682*4882a593Smuzhiyun for (i = 2; i < 6; i++)
683*4882a593Smuzhiyun dev->dev_addr[i] = tuple->TupleData[i+2];
684*4882a593Smuzhiyun return 0;
685*4882a593Smuzhiyun };
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun static int
xirc2ps_config(struct pcmcia_device * link)689*4882a593Smuzhiyun xirc2ps_config(struct pcmcia_device * link)
690*4882a593Smuzhiyun {
691*4882a593Smuzhiyun struct net_device *dev = link->priv;
692*4882a593Smuzhiyun struct local_info *local = netdev_priv(dev);
693*4882a593Smuzhiyun unsigned int ioaddr;
694*4882a593Smuzhiyun int err;
695*4882a593Smuzhiyun u8 *buf;
696*4882a593Smuzhiyun size_t len;
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun local->dingo_ccr = NULL;
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun dev_dbg(&link->dev, "config\n");
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun /* Is this a valid card */
703*4882a593Smuzhiyun if (link->has_manf_id == 0) {
704*4882a593Smuzhiyun pr_notice("manfid not found in CIS\n");
705*4882a593Smuzhiyun goto failure;
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun switch (link->manf_id) {
709*4882a593Smuzhiyun case MANFID_XIRCOM:
710*4882a593Smuzhiyun local->manf_str = "Xircom";
711*4882a593Smuzhiyun break;
712*4882a593Smuzhiyun case MANFID_ACCTON:
713*4882a593Smuzhiyun local->manf_str = "Accton";
714*4882a593Smuzhiyun break;
715*4882a593Smuzhiyun case MANFID_COMPAQ:
716*4882a593Smuzhiyun case MANFID_COMPAQ2:
717*4882a593Smuzhiyun local->manf_str = "Compaq";
718*4882a593Smuzhiyun break;
719*4882a593Smuzhiyun case MANFID_INTEL:
720*4882a593Smuzhiyun local->manf_str = "Intel";
721*4882a593Smuzhiyun break;
722*4882a593Smuzhiyun case MANFID_TOSHIBA:
723*4882a593Smuzhiyun local->manf_str = "Toshiba";
724*4882a593Smuzhiyun break;
725*4882a593Smuzhiyun default:
726*4882a593Smuzhiyun pr_notice("Unknown Card Manufacturer ID: 0x%04x\n",
727*4882a593Smuzhiyun (unsigned)link->manf_id);
728*4882a593Smuzhiyun goto failure;
729*4882a593Smuzhiyun }
730*4882a593Smuzhiyun dev_dbg(&link->dev, "found %s card\n", local->manf_str);
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun if (!set_card_type(link)) {
733*4882a593Smuzhiyun pr_notice("this card is not supported\n");
734*4882a593Smuzhiyun goto failure;
735*4882a593Smuzhiyun }
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun /* get the ethernet address from the CIS */
738*4882a593Smuzhiyun err = pcmcia_get_mac_from_cis(link, dev);
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun /* not found: try to get the node-id from tuple 0x89 */
741*4882a593Smuzhiyun if (err) {
742*4882a593Smuzhiyun len = pcmcia_get_tuple(link, 0x89, &buf);
743*4882a593Smuzhiyun /* data layout looks like tuple 0x22 */
744*4882a593Smuzhiyun if (buf && len == 8) {
745*4882a593Smuzhiyun if (*buf == CISTPL_FUNCE_LAN_NODE_ID) {
746*4882a593Smuzhiyun int i;
747*4882a593Smuzhiyun for (i = 2; i < 6; i++)
748*4882a593Smuzhiyun dev->dev_addr[i] = buf[i+2];
749*4882a593Smuzhiyun } else
750*4882a593Smuzhiyun err = -1;
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun kfree(buf);
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun if (err)
756*4882a593Smuzhiyun err = pcmcia_loop_tuple(link, CISTPL_FUNCE, pcmcia_get_mac_ce, dev);
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun if (err) {
759*4882a593Smuzhiyun pr_notice("node-id not found in CIS\n");
760*4882a593Smuzhiyun goto failure;
761*4882a593Smuzhiyun }
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun if (local->modem) {
764*4882a593Smuzhiyun int pass;
765*4882a593Smuzhiyun link->config_flags |= CONF_AUTO_SET_IO;
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun if (local->dingo) {
768*4882a593Smuzhiyun /* Take the Modem IO port from the CIS and scan for a free
769*4882a593Smuzhiyun * Ethernet port */
770*4882a593Smuzhiyun if (!pcmcia_loop_config(link, xirc2ps_config_modem, NULL))
771*4882a593Smuzhiyun goto port_found;
772*4882a593Smuzhiyun } else {
773*4882a593Smuzhiyun /* We do 2 passes here: The first one uses the regular mapping and
774*4882a593Smuzhiyun * the second tries again, thereby considering that the 32 ports are
775*4882a593Smuzhiyun * mirrored every 32 bytes. Actually we use a mirrored port for
776*4882a593Smuzhiyun * the Mako if (on the first pass) the COR bit 5 is set.
777*4882a593Smuzhiyun */
778*4882a593Smuzhiyun for (pass=0; pass < 2; pass++)
779*4882a593Smuzhiyun if (!pcmcia_loop_config(link, xirc2ps_config_check,
780*4882a593Smuzhiyun &pass))
781*4882a593Smuzhiyun goto port_found;
782*4882a593Smuzhiyun /* if special option:
783*4882a593Smuzhiyun * try to configure as Ethernet only.
784*4882a593Smuzhiyun * .... */
785*4882a593Smuzhiyun }
786*4882a593Smuzhiyun pr_notice("no ports available\n");
787*4882a593Smuzhiyun } else {
788*4882a593Smuzhiyun link->io_lines = 10;
789*4882a593Smuzhiyun link->resource[0]->end = 16;
790*4882a593Smuzhiyun link->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
791*4882a593Smuzhiyun for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
792*4882a593Smuzhiyun link->resource[0]->start = ioaddr;
793*4882a593Smuzhiyun if (!(err = pcmcia_request_io(link)))
794*4882a593Smuzhiyun goto port_found;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun link->resource[0]->start = 0; /* let CS decide */
797*4882a593Smuzhiyun if ((err = pcmcia_request_io(link)))
798*4882a593Smuzhiyun goto config_error;
799*4882a593Smuzhiyun }
800*4882a593Smuzhiyun port_found:
801*4882a593Smuzhiyun if (err)
802*4882a593Smuzhiyun goto config_error;
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun /****************
805*4882a593Smuzhiyun * Now allocate an interrupt line. Note that this does not
806*4882a593Smuzhiyun * actually assign a handler to the interrupt.
807*4882a593Smuzhiyun */
808*4882a593Smuzhiyun if ((err=pcmcia_request_irq(link, xirc2ps_interrupt)))
809*4882a593Smuzhiyun goto config_error;
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun link->config_flags |= CONF_ENABLE_IRQ;
812*4882a593Smuzhiyun if (do_sound)
813*4882a593Smuzhiyun link->config_flags |= CONF_ENABLE_SPKR;
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun if ((err = pcmcia_enable_device(link)))
816*4882a593Smuzhiyun goto config_error;
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun if (local->dingo) {
819*4882a593Smuzhiyun /* Reset the modem's BAR to the correct value
820*4882a593Smuzhiyun * This is necessary because in the RequestConfiguration call,
821*4882a593Smuzhiyun * the base address of the ethernet port (BasePort1) is written
822*4882a593Smuzhiyun * to the BAR registers of the modem.
823*4882a593Smuzhiyun */
824*4882a593Smuzhiyun err = pcmcia_write_config_byte(link, CISREG_IOBASE_0, (u8)
825*4882a593Smuzhiyun link->resource[1]->start & 0xff);
826*4882a593Smuzhiyun if (err)
827*4882a593Smuzhiyun goto config_error;
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun err = pcmcia_write_config_byte(link, CISREG_IOBASE_1,
830*4882a593Smuzhiyun (link->resource[1]->start >> 8) & 0xff);
831*4882a593Smuzhiyun if (err)
832*4882a593Smuzhiyun goto config_error;
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun /* There is no config entry for the Ethernet part which
835*4882a593Smuzhiyun * is at 0x0800. So we allocate a window into the attribute
836*4882a593Smuzhiyun * memory and write direct to the CIS registers
837*4882a593Smuzhiyun */
838*4882a593Smuzhiyun link->resource[2]->flags = WIN_DATA_WIDTH_8 | WIN_MEMORY_TYPE_AM |
839*4882a593Smuzhiyun WIN_ENABLE;
840*4882a593Smuzhiyun link->resource[2]->start = link->resource[2]->end = 0;
841*4882a593Smuzhiyun if ((err = pcmcia_request_window(link, link->resource[2], 0)))
842*4882a593Smuzhiyun goto config_error;
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun local->dingo_ccr = ioremap(link->resource[2]->start, 0x1000) + 0x0800;
845*4882a593Smuzhiyun if ((err = pcmcia_map_mem_page(link, link->resource[2], 0)))
846*4882a593Smuzhiyun goto config_error;
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun /* Setup the CCRs; there are no infos in the CIS about the Ethernet
849*4882a593Smuzhiyun * part.
850*4882a593Smuzhiyun */
851*4882a593Smuzhiyun writeb(0x47, local->dingo_ccr + CISREG_COR);
852*4882a593Smuzhiyun ioaddr = link->resource[0]->start;
853*4882a593Smuzhiyun writeb(ioaddr & 0xff , local->dingo_ccr + CISREG_IOBASE_0);
854*4882a593Smuzhiyun writeb((ioaddr >> 8)&0xff , local->dingo_ccr + CISREG_IOBASE_1);
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun #if 0
857*4882a593Smuzhiyun {
858*4882a593Smuzhiyun u_char tmp;
859*4882a593Smuzhiyun pr_info("ECOR:");
860*4882a593Smuzhiyun for (i=0; i < 7; i++) {
861*4882a593Smuzhiyun tmp = readb(local->dingo_ccr + i*2);
862*4882a593Smuzhiyun pr_cont(" %02x", tmp);
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun pr_cont("\n");
865*4882a593Smuzhiyun pr_info("DCOR:");
866*4882a593Smuzhiyun for (i=0; i < 4; i++) {
867*4882a593Smuzhiyun tmp = readb(local->dingo_ccr + 0x20 + i*2);
868*4882a593Smuzhiyun pr_cont(" %02x", tmp);
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun pr_cont("\n");
871*4882a593Smuzhiyun pr_info("SCOR:");
872*4882a593Smuzhiyun for (i=0; i < 10; i++) {
873*4882a593Smuzhiyun tmp = readb(local->dingo_ccr + 0x40 + i*2);
874*4882a593Smuzhiyun pr_cont(" %02x", tmp);
875*4882a593Smuzhiyun }
876*4882a593Smuzhiyun pr_cont("\n");
877*4882a593Smuzhiyun }
878*4882a593Smuzhiyun #endif
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun writeb(0x01, local->dingo_ccr + 0x20);
881*4882a593Smuzhiyun writeb(0x0c, local->dingo_ccr + 0x22);
882*4882a593Smuzhiyun writeb(0x00, local->dingo_ccr + 0x24);
883*4882a593Smuzhiyun writeb(0x00, local->dingo_ccr + 0x26);
884*4882a593Smuzhiyun writeb(0x00, local->dingo_ccr + 0x28);
885*4882a593Smuzhiyun }
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun /* The if_port symbol can be set when the module is loaded */
888*4882a593Smuzhiyun local->probe_port=0;
889*4882a593Smuzhiyun if (!if_port) {
890*4882a593Smuzhiyun local->probe_port = dev->if_port = 1;
891*4882a593Smuzhiyun } else if ((if_port >= 1 && if_port <= 2) ||
892*4882a593Smuzhiyun (local->mohawk && if_port==4))
893*4882a593Smuzhiyun dev->if_port = if_port;
894*4882a593Smuzhiyun else
895*4882a593Smuzhiyun pr_notice("invalid if_port requested\n");
896*4882a593Smuzhiyun
897*4882a593Smuzhiyun /* we can now register the device with the net subsystem */
898*4882a593Smuzhiyun dev->irq = link->irq;
899*4882a593Smuzhiyun dev->base_addr = link->resource[0]->start;
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun if (local->dingo)
902*4882a593Smuzhiyun do_reset(dev, 1); /* a kludge to make the cem56 work */
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun SET_NETDEV_DEV(dev, &link->dev);
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun if ((err=register_netdev(dev))) {
907*4882a593Smuzhiyun pr_notice("register_netdev() failed\n");
908*4882a593Smuzhiyun goto config_error;
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun /* give some infos about the hardware */
912*4882a593Smuzhiyun netdev_info(dev, "%s: port %#3lx, irq %d, hwaddr %pM\n",
913*4882a593Smuzhiyun local->manf_str, (u_long)dev->base_addr, (int)dev->irq,
914*4882a593Smuzhiyun dev->dev_addr);
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun return 0;
917*4882a593Smuzhiyun
918*4882a593Smuzhiyun config_error:
919*4882a593Smuzhiyun xirc2ps_release(link);
920*4882a593Smuzhiyun return -ENODEV;
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun failure:
923*4882a593Smuzhiyun return -ENODEV;
924*4882a593Smuzhiyun } /* xirc2ps_config */
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun static void
xirc2ps_release(struct pcmcia_device * link)927*4882a593Smuzhiyun xirc2ps_release(struct pcmcia_device *link)
928*4882a593Smuzhiyun {
929*4882a593Smuzhiyun dev_dbg(&link->dev, "release\n");
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun if (link->resource[2]->end) {
932*4882a593Smuzhiyun struct net_device *dev = link->priv;
933*4882a593Smuzhiyun struct local_info *local = netdev_priv(dev);
934*4882a593Smuzhiyun if (local->dingo)
935*4882a593Smuzhiyun iounmap(local->dingo_ccr - 0x0800);
936*4882a593Smuzhiyun }
937*4882a593Smuzhiyun pcmcia_disable_device(link);
938*4882a593Smuzhiyun } /* xirc2ps_release */
939*4882a593Smuzhiyun
940*4882a593Smuzhiyun /*====================================================================*/
941*4882a593Smuzhiyun
942*4882a593Smuzhiyun
xirc2ps_suspend(struct pcmcia_device * link)943*4882a593Smuzhiyun static int xirc2ps_suspend(struct pcmcia_device *link)
944*4882a593Smuzhiyun {
945*4882a593Smuzhiyun struct net_device *dev = link->priv;
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun if (link->open) {
948*4882a593Smuzhiyun netif_device_detach(dev);
949*4882a593Smuzhiyun do_powerdown(dev);
950*4882a593Smuzhiyun }
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun return 0;
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun
xirc2ps_resume(struct pcmcia_device * link)955*4882a593Smuzhiyun static int xirc2ps_resume(struct pcmcia_device *link)
956*4882a593Smuzhiyun {
957*4882a593Smuzhiyun struct net_device *dev = link->priv;
958*4882a593Smuzhiyun
959*4882a593Smuzhiyun if (link->open) {
960*4882a593Smuzhiyun do_reset(dev,1);
961*4882a593Smuzhiyun netif_device_attach(dev);
962*4882a593Smuzhiyun }
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun return 0;
965*4882a593Smuzhiyun }
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun /*====================================================================*/
969*4882a593Smuzhiyun
970*4882a593Smuzhiyun /****************
971*4882a593Smuzhiyun * This is the Interrupt service route.
972*4882a593Smuzhiyun */
973*4882a593Smuzhiyun static irqreturn_t
xirc2ps_interrupt(int irq,void * dev_id)974*4882a593Smuzhiyun xirc2ps_interrupt(int irq, void *dev_id)
975*4882a593Smuzhiyun {
976*4882a593Smuzhiyun struct net_device *dev = (struct net_device *)dev_id;
977*4882a593Smuzhiyun struct local_info *lp = netdev_priv(dev);
978*4882a593Smuzhiyun unsigned int ioaddr;
979*4882a593Smuzhiyun u_char saved_page;
980*4882a593Smuzhiyun unsigned bytes_rcvd;
981*4882a593Smuzhiyun unsigned int_status, eth_status, rx_status, tx_status;
982*4882a593Smuzhiyun unsigned rsr, pktlen;
983*4882a593Smuzhiyun ulong start_ticks = jiffies; /* fixme: jiffies rollover every 497 days
984*4882a593Smuzhiyun * is this something to worry about?
985*4882a593Smuzhiyun * -- on a laptop?
986*4882a593Smuzhiyun */
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun if (!netif_device_present(dev))
989*4882a593Smuzhiyun return IRQ_HANDLED;
990*4882a593Smuzhiyun
991*4882a593Smuzhiyun ioaddr = dev->base_addr;
992*4882a593Smuzhiyun if (lp->mohawk) { /* must disable the interrupt */
993*4882a593Smuzhiyun PutByte(XIRCREG_CR, 0);
994*4882a593Smuzhiyun }
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun pr_debug("%s: interrupt %d at %#x.\n", dev->name, irq, ioaddr);
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun saved_page = GetByte(XIRCREG_PR);
999*4882a593Smuzhiyun /* Read the ISR to see whats the cause for the interrupt.
1000*4882a593Smuzhiyun * This also clears the interrupt flags on CE2 cards
1001*4882a593Smuzhiyun */
1002*4882a593Smuzhiyun int_status = GetByte(XIRCREG_ISR);
1003*4882a593Smuzhiyun bytes_rcvd = 0;
1004*4882a593Smuzhiyun loop_entry:
1005*4882a593Smuzhiyun if (int_status == 0xff) { /* card may be ejected */
1006*4882a593Smuzhiyun pr_debug("%s: interrupt %d for dead card\n", dev->name, irq);
1007*4882a593Smuzhiyun goto leave;
1008*4882a593Smuzhiyun }
1009*4882a593Smuzhiyun eth_status = GetByte(XIRCREG_ESR);
1010*4882a593Smuzhiyun
1011*4882a593Smuzhiyun SelectPage(0x40);
1012*4882a593Smuzhiyun rx_status = GetByte(XIRCREG40_RXST0);
1013*4882a593Smuzhiyun PutByte(XIRCREG40_RXST0, (~rx_status & 0xff));
1014*4882a593Smuzhiyun tx_status = GetByte(XIRCREG40_TXST0);
1015*4882a593Smuzhiyun tx_status |= GetByte(XIRCREG40_TXST1) << 8;
1016*4882a593Smuzhiyun PutByte(XIRCREG40_TXST0, 0);
1017*4882a593Smuzhiyun PutByte(XIRCREG40_TXST1, 0);
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun pr_debug("%s: ISR=%#2.2x ESR=%#2.2x RSR=%#2.2x TSR=%#4.4x\n",
1020*4882a593Smuzhiyun dev->name, int_status, eth_status, rx_status, tx_status);
1021*4882a593Smuzhiyun
1022*4882a593Smuzhiyun /***** receive section ******/
1023*4882a593Smuzhiyun SelectPage(0);
1024*4882a593Smuzhiyun while (eth_status & FullPktRcvd) {
1025*4882a593Smuzhiyun rsr = GetByte(XIRCREG0_RSR);
1026*4882a593Smuzhiyun if (bytes_rcvd > maxrx_bytes && (rsr & PktRxOk)) {
1027*4882a593Smuzhiyun /* too many bytes received during this int, drop the rest of the
1028*4882a593Smuzhiyun * packets */
1029*4882a593Smuzhiyun dev->stats.rx_dropped++;
1030*4882a593Smuzhiyun pr_debug("%s: RX drop, too much done\n", dev->name);
1031*4882a593Smuzhiyun } else if (rsr & PktRxOk) {
1032*4882a593Smuzhiyun struct sk_buff *skb;
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun pktlen = GetWord(XIRCREG0_RBC);
1035*4882a593Smuzhiyun bytes_rcvd += pktlen;
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun pr_debug("rsr=%#02x packet_length=%u\n", rsr, pktlen);
1038*4882a593Smuzhiyun
1039*4882a593Smuzhiyun /* 1 extra so we can use insw */
1040*4882a593Smuzhiyun skb = netdev_alloc_skb(dev, pktlen + 3);
1041*4882a593Smuzhiyun if (!skb) {
1042*4882a593Smuzhiyun dev->stats.rx_dropped++;
1043*4882a593Smuzhiyun } else { /* okay get the packet */
1044*4882a593Smuzhiyun skb_reserve(skb, 2);
1045*4882a593Smuzhiyun if (lp->silicon == 0 ) { /* work around a hardware bug */
1046*4882a593Smuzhiyun unsigned rhsa; /* receive start address */
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun SelectPage(5);
1049*4882a593Smuzhiyun rhsa = GetWord(XIRCREG5_RHSA0);
1050*4882a593Smuzhiyun SelectPage(0);
1051*4882a593Smuzhiyun rhsa += 3; /* skip control infos */
1052*4882a593Smuzhiyun if (rhsa >= 0x8000)
1053*4882a593Smuzhiyun rhsa = 0;
1054*4882a593Smuzhiyun if (rhsa + pktlen > 0x8000) {
1055*4882a593Smuzhiyun unsigned i;
1056*4882a593Smuzhiyun u_char *buf = skb_put(skb, pktlen);
1057*4882a593Smuzhiyun for (i=0; i < pktlen ; i++, rhsa++) {
1058*4882a593Smuzhiyun buf[i] = GetByte(XIRCREG_EDP);
1059*4882a593Smuzhiyun if (rhsa == 0x8000) {
1060*4882a593Smuzhiyun rhsa = 0;
1061*4882a593Smuzhiyun i--;
1062*4882a593Smuzhiyun }
1063*4882a593Smuzhiyun }
1064*4882a593Smuzhiyun } else {
1065*4882a593Smuzhiyun insw(ioaddr+XIRCREG_EDP,
1066*4882a593Smuzhiyun skb_put(skb, pktlen), (pktlen+1)>>1);
1067*4882a593Smuzhiyun }
1068*4882a593Smuzhiyun }
1069*4882a593Smuzhiyun #if 0
1070*4882a593Smuzhiyun else if (lp->mohawk) {
1071*4882a593Smuzhiyun /* To use this 32 bit access we should use
1072*4882a593Smuzhiyun * a manual optimized loop
1073*4882a593Smuzhiyun * Also the words are swapped, we can get more
1074*4882a593Smuzhiyun * performance by using 32 bit access and swapping
1075*4882a593Smuzhiyun * the words in a register. Will need this for cardbus
1076*4882a593Smuzhiyun *
1077*4882a593Smuzhiyun * Note: don't forget to change the ALLOC_SKB to .. +3
1078*4882a593Smuzhiyun */
1079*4882a593Smuzhiyun unsigned i;
1080*4882a593Smuzhiyun u_long *p = skb_put(skb, pktlen);
1081*4882a593Smuzhiyun register u_long a;
1082*4882a593Smuzhiyun unsigned int edpreg = ioaddr+XIRCREG_EDP-2;
1083*4882a593Smuzhiyun for (i=0; i < len ; i += 4, p++) {
1084*4882a593Smuzhiyun a = inl(edpreg);
1085*4882a593Smuzhiyun __asm__("rorl $16,%0\n\t"
1086*4882a593Smuzhiyun :"=q" (a)
1087*4882a593Smuzhiyun : "0" (a));
1088*4882a593Smuzhiyun *p = a;
1089*4882a593Smuzhiyun }
1090*4882a593Smuzhiyun }
1091*4882a593Smuzhiyun #endif
1092*4882a593Smuzhiyun else {
1093*4882a593Smuzhiyun insw(ioaddr+XIRCREG_EDP, skb_put(skb, pktlen),
1094*4882a593Smuzhiyun (pktlen+1)>>1);
1095*4882a593Smuzhiyun }
1096*4882a593Smuzhiyun skb->protocol = eth_type_trans(skb, dev);
1097*4882a593Smuzhiyun netif_rx(skb);
1098*4882a593Smuzhiyun dev->stats.rx_packets++;
1099*4882a593Smuzhiyun dev->stats.rx_bytes += pktlen;
1100*4882a593Smuzhiyun if (!(rsr & PhyPkt))
1101*4882a593Smuzhiyun dev->stats.multicast++;
1102*4882a593Smuzhiyun }
1103*4882a593Smuzhiyun } else { /* bad packet */
1104*4882a593Smuzhiyun pr_debug("rsr=%#02x\n", rsr);
1105*4882a593Smuzhiyun }
1106*4882a593Smuzhiyun if (rsr & PktTooLong) {
1107*4882a593Smuzhiyun dev->stats.rx_frame_errors++;
1108*4882a593Smuzhiyun pr_debug("%s: Packet too long\n", dev->name);
1109*4882a593Smuzhiyun }
1110*4882a593Smuzhiyun if (rsr & CRCErr) {
1111*4882a593Smuzhiyun dev->stats.rx_crc_errors++;
1112*4882a593Smuzhiyun pr_debug("%s: CRC error\n", dev->name);
1113*4882a593Smuzhiyun }
1114*4882a593Smuzhiyun if (rsr & AlignErr) {
1115*4882a593Smuzhiyun dev->stats.rx_fifo_errors++; /* okay ? */
1116*4882a593Smuzhiyun pr_debug("%s: Alignment error\n", dev->name);
1117*4882a593Smuzhiyun }
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun /* clear the received/dropped/error packet */
1120*4882a593Smuzhiyun PutWord(XIRCREG0_DO, 0x8000); /* issue cmd: skip_rx_packet */
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun /* get the new ethernet status */
1123*4882a593Smuzhiyun eth_status = GetByte(XIRCREG_ESR);
1124*4882a593Smuzhiyun }
1125*4882a593Smuzhiyun if (rx_status & 0x10) { /* Receive overrun */
1126*4882a593Smuzhiyun dev->stats.rx_over_errors++;
1127*4882a593Smuzhiyun PutByte(XIRCREG_CR, ClearRxOvrun);
1128*4882a593Smuzhiyun pr_debug("receive overrun cleared\n");
1129*4882a593Smuzhiyun }
1130*4882a593Smuzhiyun
1131*4882a593Smuzhiyun /***** transmit section ******/
1132*4882a593Smuzhiyun if (int_status & PktTxed) {
1133*4882a593Smuzhiyun unsigned n, nn;
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun n = lp->last_ptr_value;
1136*4882a593Smuzhiyun nn = GetByte(XIRCREG0_PTR);
1137*4882a593Smuzhiyun lp->last_ptr_value = nn;
1138*4882a593Smuzhiyun if (nn < n) /* rollover */
1139*4882a593Smuzhiyun dev->stats.tx_packets += 256 - n;
1140*4882a593Smuzhiyun else if (n == nn) { /* happens sometimes - don't know why */
1141*4882a593Smuzhiyun pr_debug("PTR not changed?\n");
1142*4882a593Smuzhiyun } else
1143*4882a593Smuzhiyun dev->stats.tx_packets += lp->last_ptr_value - n;
1144*4882a593Smuzhiyun netif_wake_queue(dev);
1145*4882a593Smuzhiyun }
1146*4882a593Smuzhiyun if (tx_status & 0x0002) { /* Excessive collisions */
1147*4882a593Smuzhiyun pr_debug("tx restarted due to excessive collisions\n");
1148*4882a593Smuzhiyun PutByte(XIRCREG_CR, RestartTx); /* restart transmitter process */
1149*4882a593Smuzhiyun }
1150*4882a593Smuzhiyun if (tx_status & 0x0040)
1151*4882a593Smuzhiyun dev->stats.tx_aborted_errors++;
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun /* recalculate our work chunk so that we limit the duration of this
1154*4882a593Smuzhiyun * ISR to about 1/10 of a second.
1155*4882a593Smuzhiyun * Calculate only if we received a reasonable amount of bytes.
1156*4882a593Smuzhiyun */
1157*4882a593Smuzhiyun if (bytes_rcvd > 1000) {
1158*4882a593Smuzhiyun u_long duration = jiffies - start_ticks;
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun if (duration >= HZ/10) { /* if more than about 1/10 second */
1161*4882a593Smuzhiyun maxrx_bytes = (bytes_rcvd * (HZ/10)) / duration;
1162*4882a593Smuzhiyun if (maxrx_bytes < 2000)
1163*4882a593Smuzhiyun maxrx_bytes = 2000;
1164*4882a593Smuzhiyun else if (maxrx_bytes > 22000)
1165*4882a593Smuzhiyun maxrx_bytes = 22000;
1166*4882a593Smuzhiyun pr_debug("set maxrx=%u (rcvd=%u ticks=%lu)\n",
1167*4882a593Smuzhiyun maxrx_bytes, bytes_rcvd, duration);
1168*4882a593Smuzhiyun } else if (!duration && maxrx_bytes < 22000) {
1169*4882a593Smuzhiyun /* now much faster */
1170*4882a593Smuzhiyun maxrx_bytes += 2000;
1171*4882a593Smuzhiyun if (maxrx_bytes > 22000)
1172*4882a593Smuzhiyun maxrx_bytes = 22000;
1173*4882a593Smuzhiyun pr_debug("set maxrx=%u\n", maxrx_bytes);
1174*4882a593Smuzhiyun }
1175*4882a593Smuzhiyun }
1176*4882a593Smuzhiyun
1177*4882a593Smuzhiyun leave:
1178*4882a593Smuzhiyun if (lockup_hack) {
1179*4882a593Smuzhiyun if (int_status != 0xff && (int_status = GetByte(XIRCREG_ISR)) != 0)
1180*4882a593Smuzhiyun goto loop_entry;
1181*4882a593Smuzhiyun }
1182*4882a593Smuzhiyun SelectPage(saved_page);
1183*4882a593Smuzhiyun PutByte(XIRCREG_CR, EnableIntr); /* re-enable interrupts */
1184*4882a593Smuzhiyun /* Instead of dropping packets during a receive, we could
1185*4882a593Smuzhiyun * force an interrupt with this command:
1186*4882a593Smuzhiyun * PutByte(XIRCREG_CR, EnableIntr|ForceIntr);
1187*4882a593Smuzhiyun */
1188*4882a593Smuzhiyun return IRQ_HANDLED;
1189*4882a593Smuzhiyun } /* xirc2ps_interrupt */
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun /*====================================================================*/
1192*4882a593Smuzhiyun
1193*4882a593Smuzhiyun static void
xirc2ps_tx_timeout_task(struct work_struct * work)1194*4882a593Smuzhiyun xirc2ps_tx_timeout_task(struct work_struct *work)
1195*4882a593Smuzhiyun {
1196*4882a593Smuzhiyun struct local_info *local =
1197*4882a593Smuzhiyun container_of(work, struct local_info, tx_timeout_task);
1198*4882a593Smuzhiyun struct net_device *dev = local->dev;
1199*4882a593Smuzhiyun /* reset the card */
1200*4882a593Smuzhiyun do_reset(dev,1);
1201*4882a593Smuzhiyun netif_trans_update(dev); /* prevent tx timeout */
1202*4882a593Smuzhiyun netif_wake_queue(dev);
1203*4882a593Smuzhiyun }
1204*4882a593Smuzhiyun
1205*4882a593Smuzhiyun static void
xirc_tx_timeout(struct net_device * dev,unsigned int txqueue)1206*4882a593Smuzhiyun xirc_tx_timeout(struct net_device *dev, unsigned int txqueue)
1207*4882a593Smuzhiyun {
1208*4882a593Smuzhiyun struct local_info *lp = netdev_priv(dev);
1209*4882a593Smuzhiyun dev->stats.tx_errors++;
1210*4882a593Smuzhiyun netdev_notice(dev, "transmit timed out\n");
1211*4882a593Smuzhiyun schedule_work(&lp->tx_timeout_task);
1212*4882a593Smuzhiyun }
1213*4882a593Smuzhiyun
1214*4882a593Smuzhiyun static netdev_tx_t
do_start_xmit(struct sk_buff * skb,struct net_device * dev)1215*4882a593Smuzhiyun do_start_xmit(struct sk_buff *skb, struct net_device *dev)
1216*4882a593Smuzhiyun {
1217*4882a593Smuzhiyun struct local_info *lp = netdev_priv(dev);
1218*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1219*4882a593Smuzhiyun int okay;
1220*4882a593Smuzhiyun unsigned freespace;
1221*4882a593Smuzhiyun unsigned pktlen = skb->len;
1222*4882a593Smuzhiyun
1223*4882a593Smuzhiyun pr_debug("do_start_xmit(skb=%p, dev=%p) len=%u\n",
1224*4882a593Smuzhiyun skb, dev, pktlen);
1225*4882a593Smuzhiyun
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun /* adjust the packet length to min. required
1228*4882a593Smuzhiyun * and hope that the buffer is large enough
1229*4882a593Smuzhiyun * to provide some random data.
1230*4882a593Smuzhiyun * fixme: For Mohawk we can change this by sending
1231*4882a593Smuzhiyun * a larger packetlen than we actually have; the chip will
1232*4882a593Smuzhiyun * pad this in his buffer with random bytes
1233*4882a593Smuzhiyun */
1234*4882a593Smuzhiyun if (pktlen < ETH_ZLEN)
1235*4882a593Smuzhiyun {
1236*4882a593Smuzhiyun if (skb_padto(skb, ETH_ZLEN))
1237*4882a593Smuzhiyun return NETDEV_TX_OK;
1238*4882a593Smuzhiyun pktlen = ETH_ZLEN;
1239*4882a593Smuzhiyun }
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun netif_stop_queue(dev);
1242*4882a593Smuzhiyun SelectPage(0);
1243*4882a593Smuzhiyun PutWord(XIRCREG0_TRS, (u_short)pktlen+2);
1244*4882a593Smuzhiyun freespace = GetWord(XIRCREG0_TSO);
1245*4882a593Smuzhiyun okay = freespace & 0x8000;
1246*4882a593Smuzhiyun freespace &= 0x7fff;
1247*4882a593Smuzhiyun /* TRS doesn't work - (indeed it is eliminated with sil-rev 1) */
1248*4882a593Smuzhiyun okay = pktlen +2 < freespace;
1249*4882a593Smuzhiyun pr_debug("%s: avail. tx space=%u%s\n",
1250*4882a593Smuzhiyun dev->name, freespace, okay ? " (okay)":" (not enough)");
1251*4882a593Smuzhiyun if (!okay) { /* not enough space */
1252*4882a593Smuzhiyun return NETDEV_TX_BUSY; /* upper layer may decide to requeue this packet */
1253*4882a593Smuzhiyun }
1254*4882a593Smuzhiyun /* send the packet */
1255*4882a593Smuzhiyun PutWord(XIRCREG_EDP, (u_short)pktlen);
1256*4882a593Smuzhiyun outsw(ioaddr+XIRCREG_EDP, skb->data, pktlen>>1);
1257*4882a593Smuzhiyun if (pktlen & 1)
1258*4882a593Smuzhiyun PutByte(XIRCREG_EDP, skb->data[pktlen-1]);
1259*4882a593Smuzhiyun
1260*4882a593Smuzhiyun if (lp->mohawk)
1261*4882a593Smuzhiyun PutByte(XIRCREG_CR, TransmitPacket|EnableIntr);
1262*4882a593Smuzhiyun
1263*4882a593Smuzhiyun dev_kfree_skb (skb);
1264*4882a593Smuzhiyun dev->stats.tx_bytes += pktlen;
1265*4882a593Smuzhiyun netif_start_queue(dev);
1266*4882a593Smuzhiyun return NETDEV_TX_OK;
1267*4882a593Smuzhiyun }
1268*4882a593Smuzhiyun
1269*4882a593Smuzhiyun struct set_address_info {
1270*4882a593Smuzhiyun int reg_nr;
1271*4882a593Smuzhiyun int page_nr;
1272*4882a593Smuzhiyun int mohawk;
1273*4882a593Smuzhiyun unsigned int ioaddr;
1274*4882a593Smuzhiyun };
1275*4882a593Smuzhiyun
set_address(struct set_address_info * sa_info,char * addr)1276*4882a593Smuzhiyun static void set_address(struct set_address_info *sa_info, char *addr)
1277*4882a593Smuzhiyun {
1278*4882a593Smuzhiyun unsigned int ioaddr = sa_info->ioaddr;
1279*4882a593Smuzhiyun int i;
1280*4882a593Smuzhiyun
1281*4882a593Smuzhiyun for (i = 0; i < 6; i++) {
1282*4882a593Smuzhiyun if (sa_info->reg_nr > 15) {
1283*4882a593Smuzhiyun sa_info->reg_nr = 8;
1284*4882a593Smuzhiyun sa_info->page_nr++;
1285*4882a593Smuzhiyun SelectPage(sa_info->page_nr);
1286*4882a593Smuzhiyun }
1287*4882a593Smuzhiyun if (sa_info->mohawk)
1288*4882a593Smuzhiyun PutByte(sa_info->reg_nr++, addr[5 - i]);
1289*4882a593Smuzhiyun else
1290*4882a593Smuzhiyun PutByte(sa_info->reg_nr++, addr[i]);
1291*4882a593Smuzhiyun }
1292*4882a593Smuzhiyun }
1293*4882a593Smuzhiyun
1294*4882a593Smuzhiyun /****************
1295*4882a593Smuzhiyun * Set all addresses: This first one is the individual address,
1296*4882a593Smuzhiyun * the next 9 addresses are taken from the multicast list and
1297*4882a593Smuzhiyun * the rest is filled with the individual address.
1298*4882a593Smuzhiyun */
set_addresses(struct net_device * dev)1299*4882a593Smuzhiyun static void set_addresses(struct net_device *dev)
1300*4882a593Smuzhiyun {
1301*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1302*4882a593Smuzhiyun struct local_info *lp = netdev_priv(dev);
1303*4882a593Smuzhiyun struct netdev_hw_addr *ha;
1304*4882a593Smuzhiyun struct set_address_info sa_info;
1305*4882a593Smuzhiyun int i;
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun /*
1308*4882a593Smuzhiyun * Setup the info structure so that by first set_address call it will do
1309*4882a593Smuzhiyun * SelectPage with the right page number. Hence these ones here.
1310*4882a593Smuzhiyun */
1311*4882a593Smuzhiyun sa_info.reg_nr = 15 + 1;
1312*4882a593Smuzhiyun sa_info.page_nr = 0x50 - 1;
1313*4882a593Smuzhiyun sa_info.mohawk = lp->mohawk;
1314*4882a593Smuzhiyun sa_info.ioaddr = ioaddr;
1315*4882a593Smuzhiyun
1316*4882a593Smuzhiyun set_address(&sa_info, dev->dev_addr);
1317*4882a593Smuzhiyun i = 0;
1318*4882a593Smuzhiyun netdev_for_each_mc_addr(ha, dev) {
1319*4882a593Smuzhiyun if (i++ == 9)
1320*4882a593Smuzhiyun break;
1321*4882a593Smuzhiyun set_address(&sa_info, ha->addr);
1322*4882a593Smuzhiyun }
1323*4882a593Smuzhiyun while (i++ < 9)
1324*4882a593Smuzhiyun set_address(&sa_info, dev->dev_addr);
1325*4882a593Smuzhiyun SelectPage(0);
1326*4882a593Smuzhiyun }
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun /****************
1329*4882a593Smuzhiyun * Set or clear the multicast filter for this adaptor.
1330*4882a593Smuzhiyun * We can filter up to 9 addresses, if more are requested we set
1331*4882a593Smuzhiyun * multicast promiscuous mode.
1332*4882a593Smuzhiyun */
1333*4882a593Smuzhiyun
1334*4882a593Smuzhiyun static void
set_multicast_list(struct net_device * dev)1335*4882a593Smuzhiyun set_multicast_list(struct net_device *dev)
1336*4882a593Smuzhiyun {
1337*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1338*4882a593Smuzhiyun unsigned value;
1339*4882a593Smuzhiyun
1340*4882a593Smuzhiyun SelectPage(0x42);
1341*4882a593Smuzhiyun value = GetByte(XIRCREG42_SWC1) & 0xC0;
1342*4882a593Smuzhiyun
1343*4882a593Smuzhiyun if (dev->flags & IFF_PROMISC) { /* snoop */
1344*4882a593Smuzhiyun PutByte(XIRCREG42_SWC1, value | 0x06); /* set MPE and PME */
1345*4882a593Smuzhiyun } else if (netdev_mc_count(dev) > 9 || (dev->flags & IFF_ALLMULTI)) {
1346*4882a593Smuzhiyun PutByte(XIRCREG42_SWC1, value | 0x02); /* set MPE */
1347*4882a593Smuzhiyun } else if (!netdev_mc_empty(dev)) {
1348*4882a593Smuzhiyun /* the chip can filter 9 addresses perfectly */
1349*4882a593Smuzhiyun PutByte(XIRCREG42_SWC1, value | 0x01);
1350*4882a593Smuzhiyun SelectPage(0x40);
1351*4882a593Smuzhiyun PutByte(XIRCREG40_CMD0, Offline);
1352*4882a593Smuzhiyun set_addresses(dev);
1353*4882a593Smuzhiyun SelectPage(0x40);
1354*4882a593Smuzhiyun PutByte(XIRCREG40_CMD0, EnableRecv | Online);
1355*4882a593Smuzhiyun } else { /* standard usage */
1356*4882a593Smuzhiyun PutByte(XIRCREG42_SWC1, value | 0x00);
1357*4882a593Smuzhiyun }
1358*4882a593Smuzhiyun SelectPage(0);
1359*4882a593Smuzhiyun }
1360*4882a593Smuzhiyun
1361*4882a593Smuzhiyun static int
do_config(struct net_device * dev,struct ifmap * map)1362*4882a593Smuzhiyun do_config(struct net_device *dev, struct ifmap *map)
1363*4882a593Smuzhiyun {
1364*4882a593Smuzhiyun struct local_info *local = netdev_priv(dev);
1365*4882a593Smuzhiyun
1366*4882a593Smuzhiyun pr_debug("do_config(%p)\n", dev);
1367*4882a593Smuzhiyun if (map->port != 255 && map->port != dev->if_port) {
1368*4882a593Smuzhiyun if (map->port > 4)
1369*4882a593Smuzhiyun return -EINVAL;
1370*4882a593Smuzhiyun if (!map->port) {
1371*4882a593Smuzhiyun local->probe_port = 1;
1372*4882a593Smuzhiyun dev->if_port = 1;
1373*4882a593Smuzhiyun } else {
1374*4882a593Smuzhiyun local->probe_port = 0;
1375*4882a593Smuzhiyun dev->if_port = map->port;
1376*4882a593Smuzhiyun }
1377*4882a593Smuzhiyun netdev_info(dev, "switching to %s port\n", if_names[dev->if_port]);
1378*4882a593Smuzhiyun do_reset(dev,1); /* not the fine way :-) */
1379*4882a593Smuzhiyun }
1380*4882a593Smuzhiyun return 0;
1381*4882a593Smuzhiyun }
1382*4882a593Smuzhiyun
1383*4882a593Smuzhiyun /****************
1384*4882a593Smuzhiyun * Open the driver
1385*4882a593Smuzhiyun */
1386*4882a593Smuzhiyun static int
do_open(struct net_device * dev)1387*4882a593Smuzhiyun do_open(struct net_device *dev)
1388*4882a593Smuzhiyun {
1389*4882a593Smuzhiyun struct local_info *lp = netdev_priv(dev);
1390*4882a593Smuzhiyun struct pcmcia_device *link = lp->p_dev;
1391*4882a593Smuzhiyun
1392*4882a593Smuzhiyun dev_dbg(&link->dev, "do_open(%p)\n", dev);
1393*4882a593Smuzhiyun
1394*4882a593Smuzhiyun /* Check that the PCMCIA card is still here. */
1395*4882a593Smuzhiyun /* Physical device present signature. */
1396*4882a593Smuzhiyun if (!pcmcia_dev_present(link))
1397*4882a593Smuzhiyun return -ENODEV;
1398*4882a593Smuzhiyun
1399*4882a593Smuzhiyun /* okay */
1400*4882a593Smuzhiyun link->open++;
1401*4882a593Smuzhiyun
1402*4882a593Smuzhiyun netif_start_queue(dev);
1403*4882a593Smuzhiyun do_reset(dev,1);
1404*4882a593Smuzhiyun
1405*4882a593Smuzhiyun return 0;
1406*4882a593Smuzhiyun }
1407*4882a593Smuzhiyun
netdev_get_drvinfo(struct net_device * dev,struct ethtool_drvinfo * info)1408*4882a593Smuzhiyun static void netdev_get_drvinfo(struct net_device *dev,
1409*4882a593Smuzhiyun struct ethtool_drvinfo *info)
1410*4882a593Smuzhiyun {
1411*4882a593Smuzhiyun strlcpy(info->driver, "xirc2ps_cs", sizeof(info->driver));
1412*4882a593Smuzhiyun snprintf(info->bus_info, sizeof(info->bus_info), "PCMCIA 0x%lx",
1413*4882a593Smuzhiyun dev->base_addr);
1414*4882a593Smuzhiyun }
1415*4882a593Smuzhiyun
1416*4882a593Smuzhiyun static const struct ethtool_ops netdev_ethtool_ops = {
1417*4882a593Smuzhiyun .get_drvinfo = netdev_get_drvinfo,
1418*4882a593Smuzhiyun };
1419*4882a593Smuzhiyun
1420*4882a593Smuzhiyun static int
do_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)1421*4882a593Smuzhiyun do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1422*4882a593Smuzhiyun {
1423*4882a593Smuzhiyun struct local_info *local = netdev_priv(dev);
1424*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1425*4882a593Smuzhiyun struct mii_ioctl_data *data = if_mii(rq);
1426*4882a593Smuzhiyun
1427*4882a593Smuzhiyun pr_debug("%s: ioctl(%-.6s, %#04x) %04x %04x %04x %04x\n",
1428*4882a593Smuzhiyun dev->name, rq->ifr_ifrn.ifrn_name, cmd,
1429*4882a593Smuzhiyun data->phy_id, data->reg_num, data->val_in, data->val_out);
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun if (!local->mohawk)
1432*4882a593Smuzhiyun return -EOPNOTSUPP;
1433*4882a593Smuzhiyun
1434*4882a593Smuzhiyun switch(cmd) {
1435*4882a593Smuzhiyun case SIOCGMIIPHY: /* Get the address of the PHY in use. */
1436*4882a593Smuzhiyun data->phy_id = 0; /* we have only this address */
1437*4882a593Smuzhiyun fallthrough;
1438*4882a593Smuzhiyun case SIOCGMIIREG: /* Read the specified MII register. */
1439*4882a593Smuzhiyun data->val_out = mii_rd(ioaddr, data->phy_id & 0x1f,
1440*4882a593Smuzhiyun data->reg_num & 0x1f);
1441*4882a593Smuzhiyun break;
1442*4882a593Smuzhiyun case SIOCSMIIREG: /* Write the specified MII register */
1443*4882a593Smuzhiyun mii_wr(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in,
1444*4882a593Smuzhiyun 16);
1445*4882a593Smuzhiyun break;
1446*4882a593Smuzhiyun default:
1447*4882a593Smuzhiyun return -EOPNOTSUPP;
1448*4882a593Smuzhiyun }
1449*4882a593Smuzhiyun return 0;
1450*4882a593Smuzhiyun }
1451*4882a593Smuzhiyun
1452*4882a593Smuzhiyun static void
hardreset(struct net_device * dev)1453*4882a593Smuzhiyun hardreset(struct net_device *dev)
1454*4882a593Smuzhiyun {
1455*4882a593Smuzhiyun struct local_info *local = netdev_priv(dev);
1456*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1457*4882a593Smuzhiyun
1458*4882a593Smuzhiyun SelectPage(4);
1459*4882a593Smuzhiyun udelay(1);
1460*4882a593Smuzhiyun PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1461*4882a593Smuzhiyun msleep(40); /* wait 40 msec */
1462*4882a593Smuzhiyun if (local->mohawk)
1463*4882a593Smuzhiyun PutByte(XIRCREG4_GPR1, 1); /* set bit 0: power up */
1464*4882a593Smuzhiyun else
1465*4882a593Smuzhiyun PutByte(XIRCREG4_GPR1, 1 | 4); /* set bit 0: power up, bit 2: AIC */
1466*4882a593Smuzhiyun msleep(20); /* wait 20 msec */
1467*4882a593Smuzhiyun }
1468*4882a593Smuzhiyun
1469*4882a593Smuzhiyun static void
do_reset(struct net_device * dev,int full)1470*4882a593Smuzhiyun do_reset(struct net_device *dev, int full)
1471*4882a593Smuzhiyun {
1472*4882a593Smuzhiyun struct local_info *local = netdev_priv(dev);
1473*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1474*4882a593Smuzhiyun unsigned value;
1475*4882a593Smuzhiyun
1476*4882a593Smuzhiyun pr_debug("%s: do_reset(%p,%d)\n", dev->name, dev, full);
1477*4882a593Smuzhiyun
1478*4882a593Smuzhiyun hardreset(dev);
1479*4882a593Smuzhiyun PutByte(XIRCREG_CR, SoftReset); /* set */
1480*4882a593Smuzhiyun msleep(20); /* wait 20 msec */
1481*4882a593Smuzhiyun PutByte(XIRCREG_CR, 0); /* clear */
1482*4882a593Smuzhiyun msleep(40); /* wait 40 msec */
1483*4882a593Smuzhiyun if (local->mohawk) {
1484*4882a593Smuzhiyun SelectPage(4);
1485*4882a593Smuzhiyun /* set pin GP1 and GP2 to output (0x0c)
1486*4882a593Smuzhiyun * set GP1 to low to power up the ML6692 (0x00)
1487*4882a593Smuzhiyun * set GP2 to high to power up the 10Mhz chip (0x02)
1488*4882a593Smuzhiyun */
1489*4882a593Smuzhiyun PutByte(XIRCREG4_GPR0, 0x0e);
1490*4882a593Smuzhiyun }
1491*4882a593Smuzhiyun
1492*4882a593Smuzhiyun /* give the circuits some time to power up */
1493*4882a593Smuzhiyun msleep(500); /* about 500ms */
1494*4882a593Smuzhiyun
1495*4882a593Smuzhiyun local->last_ptr_value = 0;
1496*4882a593Smuzhiyun local->silicon = local->mohawk ? (GetByte(XIRCREG4_BOV) & 0x70) >> 4
1497*4882a593Smuzhiyun : (GetByte(XIRCREG4_BOV) & 0x30) >> 4;
1498*4882a593Smuzhiyun
1499*4882a593Smuzhiyun if (local->probe_port) {
1500*4882a593Smuzhiyun if (!local->mohawk) {
1501*4882a593Smuzhiyun SelectPage(4);
1502*4882a593Smuzhiyun PutByte(XIRCREG4_GPR0, 4);
1503*4882a593Smuzhiyun local->probe_port = 0;
1504*4882a593Smuzhiyun }
1505*4882a593Smuzhiyun } else if (dev->if_port == 2) { /* enable 10Base2 */
1506*4882a593Smuzhiyun SelectPage(0x42);
1507*4882a593Smuzhiyun PutByte(XIRCREG42_SWC1, 0xC0);
1508*4882a593Smuzhiyun } else { /* enable 10BaseT */
1509*4882a593Smuzhiyun SelectPage(0x42);
1510*4882a593Smuzhiyun PutByte(XIRCREG42_SWC1, 0x80);
1511*4882a593Smuzhiyun }
1512*4882a593Smuzhiyun msleep(40); /* wait 40 msec to let it complete */
1513*4882a593Smuzhiyun
1514*4882a593Smuzhiyun #if 0
1515*4882a593Smuzhiyun {
1516*4882a593Smuzhiyun SelectPage(0);
1517*4882a593Smuzhiyun value = GetByte(XIRCREG_ESR); /* read the ESR */
1518*4882a593Smuzhiyun pr_debug("%s: ESR is: %#02x\n", dev->name, value);
1519*4882a593Smuzhiyun }
1520*4882a593Smuzhiyun #endif
1521*4882a593Smuzhiyun
1522*4882a593Smuzhiyun /* setup the ECR */
1523*4882a593Smuzhiyun SelectPage(1);
1524*4882a593Smuzhiyun PutByte(XIRCREG1_IMR0, 0xff); /* allow all ints */
1525*4882a593Smuzhiyun PutByte(XIRCREG1_IMR1, 1 ); /* and Set TxUnderrunDetect */
1526*4882a593Smuzhiyun value = GetByte(XIRCREG1_ECR);
1527*4882a593Smuzhiyun #if 0
1528*4882a593Smuzhiyun if (local->mohawk)
1529*4882a593Smuzhiyun value |= DisableLinkPulse;
1530*4882a593Smuzhiyun PutByte(XIRCREG1_ECR, value);
1531*4882a593Smuzhiyun #endif
1532*4882a593Smuzhiyun pr_debug("%s: ECR is: %#02x\n", dev->name, value);
1533*4882a593Smuzhiyun
1534*4882a593Smuzhiyun SelectPage(0x42);
1535*4882a593Smuzhiyun PutByte(XIRCREG42_SWC0, 0x20); /* disable source insertion */
1536*4882a593Smuzhiyun
1537*4882a593Smuzhiyun if (local->silicon != 1) {
1538*4882a593Smuzhiyun /* set the local memory dividing line.
1539*4882a593Smuzhiyun * The comments in the sample code say that this is only
1540*4882a593Smuzhiyun * settable with the scipper version 2 which is revision 0.
1541*4882a593Smuzhiyun * Always for CE3 cards
1542*4882a593Smuzhiyun */
1543*4882a593Smuzhiyun SelectPage(2);
1544*4882a593Smuzhiyun PutWord(XIRCREG2_RBS, 0x2000);
1545*4882a593Smuzhiyun }
1546*4882a593Smuzhiyun
1547*4882a593Smuzhiyun if (full)
1548*4882a593Smuzhiyun set_addresses(dev);
1549*4882a593Smuzhiyun
1550*4882a593Smuzhiyun /* Hardware workaround:
1551*4882a593Smuzhiyun * The receive byte pointer after reset is off by 1 so we need
1552*4882a593Smuzhiyun * to move the offset pointer back to 0.
1553*4882a593Smuzhiyun */
1554*4882a593Smuzhiyun SelectPage(0);
1555*4882a593Smuzhiyun PutWord(XIRCREG0_DO, 0x2000); /* change offset command, off=0 */
1556*4882a593Smuzhiyun
1557*4882a593Smuzhiyun /* setup MAC IMRs and clear status registers */
1558*4882a593Smuzhiyun SelectPage(0x40); /* Bit 7 ... bit 0 */
1559*4882a593Smuzhiyun PutByte(XIRCREG40_RMASK0, 0xff); /* ROK, RAB, rsv, RO, CRC, AE, PTL, MP */
1560*4882a593Smuzhiyun PutByte(XIRCREG40_TMASK0, 0xff); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
1561*4882a593Smuzhiyun PutByte(XIRCREG40_TMASK1, 0xb0); /* rsv, rsv, PTD, EXT, rsv,rsv,rsv, rsv*/
1562*4882a593Smuzhiyun PutByte(XIRCREG40_RXST0, 0x00); /* ROK, RAB, REN, RO, CRC, AE, PTL, MP */
1563*4882a593Smuzhiyun PutByte(XIRCREG40_TXST0, 0x00); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
1564*4882a593Smuzhiyun PutByte(XIRCREG40_TXST1, 0x00); /* TEN, rsv, PTD, EXT, retry_counter:4 */
1565*4882a593Smuzhiyun
1566*4882a593Smuzhiyun if (full && local->mohawk && init_mii(dev)) {
1567*4882a593Smuzhiyun if (dev->if_port == 4 || local->dingo || local->new_mii) {
1568*4882a593Smuzhiyun netdev_info(dev, "MII selected\n");
1569*4882a593Smuzhiyun SelectPage(2);
1570*4882a593Smuzhiyun PutByte(XIRCREG2_MSR, GetByte(XIRCREG2_MSR) | 0x08);
1571*4882a593Smuzhiyun msleep(20);
1572*4882a593Smuzhiyun } else {
1573*4882a593Smuzhiyun netdev_info(dev, "MII detected; using 10mbs\n");
1574*4882a593Smuzhiyun SelectPage(0x42);
1575*4882a593Smuzhiyun if (dev->if_port == 2) /* enable 10Base2 */
1576*4882a593Smuzhiyun PutByte(XIRCREG42_SWC1, 0xC0);
1577*4882a593Smuzhiyun else /* enable 10BaseT */
1578*4882a593Smuzhiyun PutByte(XIRCREG42_SWC1, 0x80);
1579*4882a593Smuzhiyun msleep(40); /* wait 40 msec to let it complete */
1580*4882a593Smuzhiyun }
1581*4882a593Smuzhiyun if (full_duplex)
1582*4882a593Smuzhiyun PutByte(XIRCREG1_ECR, GetByte(XIRCREG1_ECR | FullDuplex));
1583*4882a593Smuzhiyun } else { /* No MII */
1584*4882a593Smuzhiyun SelectPage(0);
1585*4882a593Smuzhiyun value = GetByte(XIRCREG_ESR); /* read the ESR */
1586*4882a593Smuzhiyun dev->if_port = (value & MediaSelect) ? 1 : 2;
1587*4882a593Smuzhiyun }
1588*4882a593Smuzhiyun
1589*4882a593Smuzhiyun /* configure the LEDs */
1590*4882a593Smuzhiyun SelectPage(2);
1591*4882a593Smuzhiyun if (dev->if_port == 1 || dev->if_port == 4) /* TP: Link and Activity */
1592*4882a593Smuzhiyun PutByte(XIRCREG2_LED, 0x3b);
1593*4882a593Smuzhiyun else /* Coax: Not-Collision and Activity */
1594*4882a593Smuzhiyun PutByte(XIRCREG2_LED, 0x3a);
1595*4882a593Smuzhiyun
1596*4882a593Smuzhiyun if (local->dingo)
1597*4882a593Smuzhiyun PutByte(0x0b, 0x04); /* 100 Mbit LED */
1598*4882a593Smuzhiyun
1599*4882a593Smuzhiyun /* enable receiver and put the mac online */
1600*4882a593Smuzhiyun if (full) {
1601*4882a593Smuzhiyun set_multicast_list(dev);
1602*4882a593Smuzhiyun SelectPage(0x40);
1603*4882a593Smuzhiyun PutByte(XIRCREG40_CMD0, EnableRecv | Online);
1604*4882a593Smuzhiyun }
1605*4882a593Smuzhiyun
1606*4882a593Smuzhiyun /* setup Ethernet IMR and enable interrupts */
1607*4882a593Smuzhiyun SelectPage(1);
1608*4882a593Smuzhiyun PutByte(XIRCREG1_IMR0, 0xff);
1609*4882a593Smuzhiyun udelay(1);
1610*4882a593Smuzhiyun SelectPage(0);
1611*4882a593Smuzhiyun PutByte(XIRCREG_CR, EnableIntr);
1612*4882a593Smuzhiyun if (local->modem && !local->dingo) { /* do some magic */
1613*4882a593Smuzhiyun if (!(GetByte(0x10) & 0x01))
1614*4882a593Smuzhiyun PutByte(0x10, 0x11); /* unmask master-int bit */
1615*4882a593Smuzhiyun }
1616*4882a593Smuzhiyun
1617*4882a593Smuzhiyun if (full)
1618*4882a593Smuzhiyun netdev_info(dev, "media %s, silicon revision %d\n",
1619*4882a593Smuzhiyun if_names[dev->if_port], local->silicon);
1620*4882a593Smuzhiyun /* We should switch back to page 0 to avoid a bug in revision 0
1621*4882a593Smuzhiyun * where regs with offset below 8 can't be read after an access
1622*4882a593Smuzhiyun * to the MAC registers */
1623*4882a593Smuzhiyun SelectPage(0);
1624*4882a593Smuzhiyun }
1625*4882a593Smuzhiyun
1626*4882a593Smuzhiyun /****************
1627*4882a593Smuzhiyun * Initialize the Media-Independent-Interface
1628*4882a593Smuzhiyun * Returns: True if we have a good MII
1629*4882a593Smuzhiyun */
1630*4882a593Smuzhiyun static int
init_mii(struct net_device * dev)1631*4882a593Smuzhiyun init_mii(struct net_device *dev)
1632*4882a593Smuzhiyun {
1633*4882a593Smuzhiyun struct local_info *local = netdev_priv(dev);
1634*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1635*4882a593Smuzhiyun unsigned control, status, linkpartner;
1636*4882a593Smuzhiyun int i;
1637*4882a593Smuzhiyun
1638*4882a593Smuzhiyun if (if_port == 4 || if_port == 1) { /* force 100BaseT or 10BaseT */
1639*4882a593Smuzhiyun dev->if_port = if_port;
1640*4882a593Smuzhiyun local->probe_port = 0;
1641*4882a593Smuzhiyun return 1;
1642*4882a593Smuzhiyun }
1643*4882a593Smuzhiyun
1644*4882a593Smuzhiyun status = mii_rd(ioaddr, 0, 1);
1645*4882a593Smuzhiyun if ((status & 0xff00) != 0x7800)
1646*4882a593Smuzhiyun return 0; /* No MII */
1647*4882a593Smuzhiyun
1648*4882a593Smuzhiyun local->new_mii = (mii_rd(ioaddr, 0, 2) != 0xffff);
1649*4882a593Smuzhiyun
1650*4882a593Smuzhiyun if (local->probe_port)
1651*4882a593Smuzhiyun control = 0x1000; /* auto neg */
1652*4882a593Smuzhiyun else if (dev->if_port == 4)
1653*4882a593Smuzhiyun control = 0x2000; /* no auto neg, 100mbs mode */
1654*4882a593Smuzhiyun else
1655*4882a593Smuzhiyun control = 0x0000; /* no auto neg, 10mbs mode */
1656*4882a593Smuzhiyun mii_wr(ioaddr, 0, 0, control, 16);
1657*4882a593Smuzhiyun udelay(100);
1658*4882a593Smuzhiyun control = mii_rd(ioaddr, 0, 0);
1659*4882a593Smuzhiyun
1660*4882a593Smuzhiyun if (control & 0x0400) {
1661*4882a593Smuzhiyun netdev_notice(dev, "can't take PHY out of isolation mode\n");
1662*4882a593Smuzhiyun local->probe_port = 0;
1663*4882a593Smuzhiyun return 0;
1664*4882a593Smuzhiyun }
1665*4882a593Smuzhiyun
1666*4882a593Smuzhiyun if (local->probe_port) {
1667*4882a593Smuzhiyun /* according to the DP83840A specs the auto negotiation process
1668*4882a593Smuzhiyun * may take up to 3.5 sec, so we use this also for our ML6692
1669*4882a593Smuzhiyun * Fixme: Better to use a timer here!
1670*4882a593Smuzhiyun */
1671*4882a593Smuzhiyun for (i=0; i < 35; i++) {
1672*4882a593Smuzhiyun msleep(100); /* wait 100 msec */
1673*4882a593Smuzhiyun status = mii_rd(ioaddr, 0, 1);
1674*4882a593Smuzhiyun if ((status & 0x0020) && (status & 0x0004))
1675*4882a593Smuzhiyun break;
1676*4882a593Smuzhiyun }
1677*4882a593Smuzhiyun
1678*4882a593Smuzhiyun if (!(status & 0x0020)) {
1679*4882a593Smuzhiyun netdev_info(dev, "autonegotiation failed; using 10mbs\n");
1680*4882a593Smuzhiyun if (!local->new_mii) {
1681*4882a593Smuzhiyun control = 0x0000;
1682*4882a593Smuzhiyun mii_wr(ioaddr, 0, 0, control, 16);
1683*4882a593Smuzhiyun udelay(100);
1684*4882a593Smuzhiyun SelectPage(0);
1685*4882a593Smuzhiyun dev->if_port = (GetByte(XIRCREG_ESR) & MediaSelect) ? 1 : 2;
1686*4882a593Smuzhiyun }
1687*4882a593Smuzhiyun } else {
1688*4882a593Smuzhiyun linkpartner = mii_rd(ioaddr, 0, 5);
1689*4882a593Smuzhiyun netdev_info(dev, "MII link partner: %04x\n", linkpartner);
1690*4882a593Smuzhiyun if (linkpartner & 0x0080) {
1691*4882a593Smuzhiyun dev->if_port = 4;
1692*4882a593Smuzhiyun } else
1693*4882a593Smuzhiyun dev->if_port = 1;
1694*4882a593Smuzhiyun }
1695*4882a593Smuzhiyun }
1696*4882a593Smuzhiyun
1697*4882a593Smuzhiyun return 1;
1698*4882a593Smuzhiyun }
1699*4882a593Smuzhiyun
1700*4882a593Smuzhiyun static void
do_powerdown(struct net_device * dev)1701*4882a593Smuzhiyun do_powerdown(struct net_device *dev)
1702*4882a593Smuzhiyun {
1703*4882a593Smuzhiyun
1704*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1705*4882a593Smuzhiyun
1706*4882a593Smuzhiyun pr_debug("do_powerdown(%p)\n", dev);
1707*4882a593Smuzhiyun
1708*4882a593Smuzhiyun SelectPage(4);
1709*4882a593Smuzhiyun PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1710*4882a593Smuzhiyun SelectPage(0);
1711*4882a593Smuzhiyun }
1712*4882a593Smuzhiyun
1713*4882a593Smuzhiyun static int
do_stop(struct net_device * dev)1714*4882a593Smuzhiyun do_stop(struct net_device *dev)
1715*4882a593Smuzhiyun {
1716*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1717*4882a593Smuzhiyun struct local_info *lp = netdev_priv(dev);
1718*4882a593Smuzhiyun struct pcmcia_device *link = lp->p_dev;
1719*4882a593Smuzhiyun
1720*4882a593Smuzhiyun dev_dbg(&link->dev, "do_stop(%p)\n", dev);
1721*4882a593Smuzhiyun
1722*4882a593Smuzhiyun if (!link)
1723*4882a593Smuzhiyun return -ENODEV;
1724*4882a593Smuzhiyun
1725*4882a593Smuzhiyun netif_stop_queue(dev);
1726*4882a593Smuzhiyun
1727*4882a593Smuzhiyun SelectPage(0);
1728*4882a593Smuzhiyun PutByte(XIRCREG_CR, 0); /* disable interrupts */
1729*4882a593Smuzhiyun SelectPage(0x01);
1730*4882a593Smuzhiyun PutByte(XIRCREG1_IMR0, 0x00); /* forbid all ints */
1731*4882a593Smuzhiyun SelectPage(4);
1732*4882a593Smuzhiyun PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1733*4882a593Smuzhiyun SelectPage(0);
1734*4882a593Smuzhiyun
1735*4882a593Smuzhiyun link->open--;
1736*4882a593Smuzhiyun return 0;
1737*4882a593Smuzhiyun }
1738*4882a593Smuzhiyun
1739*4882a593Smuzhiyun static const struct pcmcia_device_id xirc2ps_ids[] = {
1740*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0089, 0x110a),
1741*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0138, 0x110a),
1742*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM28", 0x2e3ee845, 0x0ea978ea),
1743*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM33", 0x2e3ee845, 0x80609023),
1744*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM56", 0x2e3ee845, 0xa650c32a),
1745*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "REM10", 0x2e3ee845, 0x76df1d29),
1746*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "XEM5600", 0x2e3ee845, 0xf1403719),
1747*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID12(0, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf),
1748*4882a593Smuzhiyun PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x010a),
1749*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID13("Toshiba Information Systems", "TPCENET", 0x1b3b94fe, 0xf381c1a2),
1750*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID13("Xircom", "CE3-10/100", 0x2e3ee845, 0x0ec0ac37),
1751*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID13("Xircom", "PS-CE2-10", 0x2e3ee845, 0x947d9073),
1752*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID13("Xircom", "R2E-100BTX", 0x2e3ee845, 0x2464a6e3),
1753*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID13("Xircom", "RE-10", 0x2e3ee845, 0x3e08d609),
1754*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID13("Xircom", "XE2000", 0x2e3ee845, 0xf7188e46),
1755*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("Compaq", "Ethernet LAN Card", 0x54f7c49c, 0x9fd2f0a2),
1756*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("Compaq", "Netelligent 10/100 PC Card", 0x54f7c49c, 0xefe96769),
1757*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("Intel", "EtherExpress(TM) PRO/100 PC Card Mobile Adapter16", 0x816cc815, 0x174397db),
1758*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("Toshiba", "10/100 Ethernet PC Card", 0x44a09d9c, 0xb44deecf),
1759*4882a593Smuzhiyun /* also matches CFE-10 cards! */
1760*4882a593Smuzhiyun /* PCMCIA_DEVICE_MANF_CARD(0x0105, 0x010a), */
1761*4882a593Smuzhiyun PCMCIA_DEVICE_NULL,
1762*4882a593Smuzhiyun };
1763*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pcmcia, xirc2ps_ids);
1764*4882a593Smuzhiyun
1765*4882a593Smuzhiyun
1766*4882a593Smuzhiyun static struct pcmcia_driver xirc2ps_cs_driver = {
1767*4882a593Smuzhiyun .owner = THIS_MODULE,
1768*4882a593Smuzhiyun .name = "xirc2ps_cs",
1769*4882a593Smuzhiyun .probe = xirc2ps_probe,
1770*4882a593Smuzhiyun .remove = xirc2ps_detach,
1771*4882a593Smuzhiyun .id_table = xirc2ps_ids,
1772*4882a593Smuzhiyun .suspend = xirc2ps_suspend,
1773*4882a593Smuzhiyun .resume = xirc2ps_resume,
1774*4882a593Smuzhiyun };
1775*4882a593Smuzhiyun module_pcmcia_driver(xirc2ps_cs_driver);
1776*4882a593Smuzhiyun
1777*4882a593Smuzhiyun #ifndef MODULE
setup_xirc2ps_cs(char * str)1778*4882a593Smuzhiyun static int __init setup_xirc2ps_cs(char *str)
1779*4882a593Smuzhiyun {
1780*4882a593Smuzhiyun /* if_port, full_duplex, do_sound, lockup_hack
1781*4882a593Smuzhiyun */
1782*4882a593Smuzhiyun int ints[10] = { -1 };
1783*4882a593Smuzhiyun
1784*4882a593Smuzhiyun str = get_options(str, ARRAY_SIZE(ints), ints);
1785*4882a593Smuzhiyun
1786*4882a593Smuzhiyun #define MAYBE_SET(X,Y) if (ints[0] >= Y && ints[Y] != -1) { X = ints[Y]; }
1787*4882a593Smuzhiyun MAYBE_SET(if_port, 3);
1788*4882a593Smuzhiyun MAYBE_SET(full_duplex, 4);
1789*4882a593Smuzhiyun MAYBE_SET(do_sound, 5);
1790*4882a593Smuzhiyun MAYBE_SET(lockup_hack, 6);
1791*4882a593Smuzhiyun #undef MAYBE_SET
1792*4882a593Smuzhiyun
1793*4882a593Smuzhiyun return 1;
1794*4882a593Smuzhiyun }
1795*4882a593Smuzhiyun
1796*4882a593Smuzhiyun __setup("xirc2ps_cs=", setup_xirc2ps_cs);
1797*4882a593Smuzhiyun #endif
1798