1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * PS3 gelic network driver.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2007 Sony Computer Entertainment Inc.
6*4882a593Smuzhiyun * Copyright 2006, 2007 Sony Corporation
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This file is based on: spider_net.c
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * (C) Copyright IBM Corp. 2005
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Authors : Utz Bacher <utz.bacher@de.ibm.com>
13*4882a593Smuzhiyun * Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #undef DEBUG
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <linux/interrupt.h>
19*4882a593Smuzhiyun #include <linux/kernel.h>
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/slab.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <linux/etherdevice.h>
24*4882a593Smuzhiyun #include <linux/ethtool.h>
25*4882a593Smuzhiyun #include <linux/if_vlan.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #include <linux/in.h>
28*4882a593Smuzhiyun #include <linux/ip.h>
29*4882a593Smuzhiyun #include <linux/tcp.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include <linux/dma-mapping.h>
32*4882a593Smuzhiyun #include <net/checksum.h>
33*4882a593Smuzhiyun #include <asm/firmware.h>
34*4882a593Smuzhiyun #include <asm/ps3.h>
35*4882a593Smuzhiyun #include <asm/lv1call.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #include "ps3_gelic_net.h"
38*4882a593Smuzhiyun #include "ps3_gelic_wireless.h"
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define DRV_NAME "Gelic Network Driver"
41*4882a593Smuzhiyun #define DRV_VERSION "2.0"
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun MODULE_AUTHOR("SCE Inc.");
44*4882a593Smuzhiyun MODULE_DESCRIPTION("Gelic Network driver");
45*4882a593Smuzhiyun MODULE_LICENSE("GPL");
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun /* set irq_mask */
gelic_card_set_irq_mask(struct gelic_card * card,u64 mask)49*4882a593Smuzhiyun int gelic_card_set_irq_mask(struct gelic_card *card, u64 mask)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun int status;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun status = lv1_net_set_interrupt_mask(bus_id(card), dev_id(card),
54*4882a593Smuzhiyun mask, 0);
55*4882a593Smuzhiyun if (status)
56*4882a593Smuzhiyun dev_info(ctodev(card),
57*4882a593Smuzhiyun "%s failed %d\n", __func__, status);
58*4882a593Smuzhiyun return status;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
gelic_card_rx_irq_on(struct gelic_card * card)61*4882a593Smuzhiyun static void gelic_card_rx_irq_on(struct gelic_card *card)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun card->irq_mask |= GELIC_CARD_RXINT;
64*4882a593Smuzhiyun gelic_card_set_irq_mask(card, card->irq_mask);
65*4882a593Smuzhiyun }
gelic_card_rx_irq_off(struct gelic_card * card)66*4882a593Smuzhiyun static void gelic_card_rx_irq_off(struct gelic_card *card)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun card->irq_mask &= ~GELIC_CARD_RXINT;
69*4882a593Smuzhiyun gelic_card_set_irq_mask(card, card->irq_mask);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
gelic_card_get_ether_port_status(struct gelic_card * card,int inform)72*4882a593Smuzhiyun static void gelic_card_get_ether_port_status(struct gelic_card *card,
73*4882a593Smuzhiyun int inform)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun u64 v2;
76*4882a593Smuzhiyun struct net_device *ether_netdev;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun lv1_net_control(bus_id(card), dev_id(card),
79*4882a593Smuzhiyun GELIC_LV1_GET_ETH_PORT_STATUS,
80*4882a593Smuzhiyun GELIC_LV1_VLAN_TX_ETHERNET_0, 0, 0,
81*4882a593Smuzhiyun &card->ether_port_status, &v2);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun if (inform) {
84*4882a593Smuzhiyun ether_netdev = card->netdev[GELIC_PORT_ETHERNET_0];
85*4882a593Smuzhiyun if (card->ether_port_status & GELIC_LV1_ETHER_LINK_UP)
86*4882a593Smuzhiyun netif_carrier_on(ether_netdev);
87*4882a593Smuzhiyun else
88*4882a593Smuzhiyun netif_carrier_off(ether_netdev);
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /**
93*4882a593Smuzhiyun * gelic_descr_get_status -- returns the status of a descriptor
94*4882a593Smuzhiyun * @descr: descriptor to look at
95*4882a593Smuzhiyun *
96*4882a593Smuzhiyun * returns the status as in the dmac_cmd_status field of the descriptor
97*4882a593Smuzhiyun */
98*4882a593Smuzhiyun static enum gelic_descr_dma_status
gelic_descr_get_status(struct gelic_descr * descr)99*4882a593Smuzhiyun gelic_descr_get_status(struct gelic_descr *descr)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun return be32_to_cpu(descr->dmac_cmd_status) & GELIC_DESCR_DMA_STAT_MASK;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
gelic_card_set_link_mode(struct gelic_card * card,int mode)104*4882a593Smuzhiyun static int gelic_card_set_link_mode(struct gelic_card *card, int mode)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun int status;
107*4882a593Smuzhiyun u64 v1, v2;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun status = lv1_net_control(bus_id(card), dev_id(card),
110*4882a593Smuzhiyun GELIC_LV1_SET_NEGOTIATION_MODE,
111*4882a593Smuzhiyun GELIC_LV1_PHY_ETHERNET_0, mode, 0, &v1, &v2);
112*4882a593Smuzhiyun if (status) {
113*4882a593Smuzhiyun pr_info("%s: failed setting negotiation mode %d\n", __func__,
114*4882a593Smuzhiyun status);
115*4882a593Smuzhiyun return -EBUSY;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun card->link_mode = mode;
119*4882a593Smuzhiyun return 0;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /**
123*4882a593Smuzhiyun * gelic_card_disable_txdmac - disables the transmit DMA controller
124*4882a593Smuzhiyun * @card: card structure
125*4882a593Smuzhiyun *
126*4882a593Smuzhiyun * gelic_card_disable_txdmac terminates processing on the DMA controller by
127*4882a593Smuzhiyun * turing off DMA and issuing a force end
128*4882a593Smuzhiyun */
gelic_card_disable_txdmac(struct gelic_card * card)129*4882a593Smuzhiyun static void gelic_card_disable_txdmac(struct gelic_card *card)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun int status;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* this hvc blocks until the DMA in progress really stopped */
134*4882a593Smuzhiyun status = lv1_net_stop_tx_dma(bus_id(card), dev_id(card));
135*4882a593Smuzhiyun if (status)
136*4882a593Smuzhiyun dev_err(ctodev(card),
137*4882a593Smuzhiyun "lv1_net_stop_tx_dma failed, status=%d\n", status);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /**
141*4882a593Smuzhiyun * gelic_card_enable_rxdmac - enables the receive DMA controller
142*4882a593Smuzhiyun * @card: card structure
143*4882a593Smuzhiyun *
144*4882a593Smuzhiyun * gelic_card_enable_rxdmac enables the DMA controller by setting RX_DMA_EN
145*4882a593Smuzhiyun * in the GDADMACCNTR register
146*4882a593Smuzhiyun */
gelic_card_enable_rxdmac(struct gelic_card * card)147*4882a593Smuzhiyun static void gelic_card_enable_rxdmac(struct gelic_card *card)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun int status;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun #ifdef DEBUG
152*4882a593Smuzhiyun if (gelic_descr_get_status(card->rx_chain.head) !=
153*4882a593Smuzhiyun GELIC_DESCR_DMA_CARDOWNED) {
154*4882a593Smuzhiyun printk(KERN_ERR "%s: status=%x\n", __func__,
155*4882a593Smuzhiyun be32_to_cpu(card->rx_chain.head->dmac_cmd_status));
156*4882a593Smuzhiyun printk(KERN_ERR "%s: nextphy=%x\n", __func__,
157*4882a593Smuzhiyun be32_to_cpu(card->rx_chain.head->next_descr_addr));
158*4882a593Smuzhiyun printk(KERN_ERR "%s: head=%p\n", __func__,
159*4882a593Smuzhiyun card->rx_chain.head);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun #endif
162*4882a593Smuzhiyun status = lv1_net_start_rx_dma(bus_id(card), dev_id(card),
163*4882a593Smuzhiyun card->rx_chain.head->bus_addr, 0);
164*4882a593Smuzhiyun if (status)
165*4882a593Smuzhiyun dev_info(ctodev(card),
166*4882a593Smuzhiyun "lv1_net_start_rx_dma failed, status=%d\n", status);
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /**
170*4882a593Smuzhiyun * gelic_card_disable_rxdmac - disables the receive DMA controller
171*4882a593Smuzhiyun * @card: card structure
172*4882a593Smuzhiyun *
173*4882a593Smuzhiyun * gelic_card_disable_rxdmac terminates processing on the DMA controller by
174*4882a593Smuzhiyun * turing off DMA and issuing a force end
175*4882a593Smuzhiyun */
gelic_card_disable_rxdmac(struct gelic_card * card)176*4882a593Smuzhiyun static void gelic_card_disable_rxdmac(struct gelic_card *card)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun int status;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun /* this hvc blocks until the DMA in progress really stopped */
181*4882a593Smuzhiyun status = lv1_net_stop_rx_dma(bus_id(card), dev_id(card));
182*4882a593Smuzhiyun if (status)
183*4882a593Smuzhiyun dev_err(ctodev(card),
184*4882a593Smuzhiyun "lv1_net_stop_rx_dma failed, %d\n", status);
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /**
188*4882a593Smuzhiyun * gelic_descr_set_status -- sets the status of a descriptor
189*4882a593Smuzhiyun * @descr: descriptor to change
190*4882a593Smuzhiyun * @status: status to set in the descriptor
191*4882a593Smuzhiyun *
192*4882a593Smuzhiyun * changes the status to the specified value. Doesn't change other bits
193*4882a593Smuzhiyun * in the status
194*4882a593Smuzhiyun */
gelic_descr_set_status(struct gelic_descr * descr,enum gelic_descr_dma_status status)195*4882a593Smuzhiyun static void gelic_descr_set_status(struct gelic_descr *descr,
196*4882a593Smuzhiyun enum gelic_descr_dma_status status)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun descr->dmac_cmd_status = cpu_to_be32(status |
199*4882a593Smuzhiyun (be32_to_cpu(descr->dmac_cmd_status) &
200*4882a593Smuzhiyun ~GELIC_DESCR_DMA_STAT_MASK));
201*4882a593Smuzhiyun /*
202*4882a593Smuzhiyun * dma_cmd_status field is used to indicate whether the descriptor
203*4882a593Smuzhiyun * is valid or not.
204*4882a593Smuzhiyun * Usually caller of this function wants to inform that to the
205*4882a593Smuzhiyun * hardware, so we assure here the hardware sees the change.
206*4882a593Smuzhiyun */
207*4882a593Smuzhiyun wmb();
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun /**
211*4882a593Smuzhiyun * gelic_card_reset_chain - reset status of a descriptor chain
212*4882a593Smuzhiyun * @card: card structure
213*4882a593Smuzhiyun * @chain: address of chain
214*4882a593Smuzhiyun * @start_descr: address of descriptor array
215*4882a593Smuzhiyun *
216*4882a593Smuzhiyun * Reset the status of dma descriptors to ready state
217*4882a593Smuzhiyun * and re-initialize the hardware chain for later use
218*4882a593Smuzhiyun */
gelic_card_reset_chain(struct gelic_card * card,struct gelic_descr_chain * chain,struct gelic_descr * start_descr)219*4882a593Smuzhiyun static void gelic_card_reset_chain(struct gelic_card *card,
220*4882a593Smuzhiyun struct gelic_descr_chain *chain,
221*4882a593Smuzhiyun struct gelic_descr *start_descr)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun struct gelic_descr *descr;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun for (descr = start_descr; start_descr != descr->next; descr++) {
226*4882a593Smuzhiyun gelic_descr_set_status(descr, GELIC_DESCR_DMA_CARDOWNED);
227*4882a593Smuzhiyun descr->next_descr_addr = cpu_to_be32(descr->next->bus_addr);
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun chain->head = start_descr;
231*4882a593Smuzhiyun chain->tail = (descr - 1);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun (descr - 1)->next_descr_addr = 0;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
gelic_card_up(struct gelic_card * card)236*4882a593Smuzhiyun void gelic_card_up(struct gelic_card *card)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun pr_debug("%s: called\n", __func__);
239*4882a593Smuzhiyun mutex_lock(&card->updown_lock);
240*4882a593Smuzhiyun if (atomic_inc_return(&card->users) == 1) {
241*4882a593Smuzhiyun pr_debug("%s: real do\n", __func__);
242*4882a593Smuzhiyun /* enable irq */
243*4882a593Smuzhiyun gelic_card_set_irq_mask(card, card->irq_mask);
244*4882a593Smuzhiyun /* start rx */
245*4882a593Smuzhiyun gelic_card_enable_rxdmac(card);
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun napi_enable(&card->napi);
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun mutex_unlock(&card->updown_lock);
250*4882a593Smuzhiyun pr_debug("%s: done\n", __func__);
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
gelic_card_down(struct gelic_card * card)253*4882a593Smuzhiyun void gelic_card_down(struct gelic_card *card)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun u64 mask;
256*4882a593Smuzhiyun pr_debug("%s: called\n", __func__);
257*4882a593Smuzhiyun mutex_lock(&card->updown_lock);
258*4882a593Smuzhiyun if (atomic_dec_if_positive(&card->users) == 0) {
259*4882a593Smuzhiyun pr_debug("%s: real do\n", __func__);
260*4882a593Smuzhiyun napi_disable(&card->napi);
261*4882a593Smuzhiyun /*
262*4882a593Smuzhiyun * Disable irq. Wireless interrupts will
263*4882a593Smuzhiyun * be disabled later if any
264*4882a593Smuzhiyun */
265*4882a593Smuzhiyun mask = card->irq_mask & (GELIC_CARD_WLAN_EVENT_RECEIVED |
266*4882a593Smuzhiyun GELIC_CARD_WLAN_COMMAND_COMPLETED);
267*4882a593Smuzhiyun gelic_card_set_irq_mask(card, mask);
268*4882a593Smuzhiyun /* stop rx */
269*4882a593Smuzhiyun gelic_card_disable_rxdmac(card);
270*4882a593Smuzhiyun gelic_card_reset_chain(card, &card->rx_chain,
271*4882a593Smuzhiyun card->descr + GELIC_NET_TX_DESCRIPTORS);
272*4882a593Smuzhiyun /* stop tx */
273*4882a593Smuzhiyun gelic_card_disable_txdmac(card);
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun mutex_unlock(&card->updown_lock);
276*4882a593Smuzhiyun pr_debug("%s: done\n", __func__);
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun /**
280*4882a593Smuzhiyun * gelic_card_free_chain - free descriptor chain
281*4882a593Smuzhiyun * @card: card structure
282*4882a593Smuzhiyun * @descr_in: address of desc
283*4882a593Smuzhiyun */
gelic_card_free_chain(struct gelic_card * card,struct gelic_descr * descr_in)284*4882a593Smuzhiyun static void gelic_card_free_chain(struct gelic_card *card,
285*4882a593Smuzhiyun struct gelic_descr *descr_in)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun struct gelic_descr *descr;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun for (descr = descr_in; descr && descr->bus_addr; descr = descr->next) {
290*4882a593Smuzhiyun dma_unmap_single(ctodev(card), descr->bus_addr,
291*4882a593Smuzhiyun GELIC_DESCR_SIZE, DMA_BIDIRECTIONAL);
292*4882a593Smuzhiyun descr->bus_addr = 0;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun /**
297*4882a593Smuzhiyun * gelic_card_init_chain - links descriptor chain
298*4882a593Smuzhiyun * @card: card structure
299*4882a593Smuzhiyun * @chain: address of chain
300*4882a593Smuzhiyun * @start_descr: address of descriptor array
301*4882a593Smuzhiyun * @no: number of descriptors
302*4882a593Smuzhiyun *
303*4882a593Smuzhiyun * we manage a circular list that mirrors the hardware structure,
304*4882a593Smuzhiyun * except that the hardware uses bus addresses.
305*4882a593Smuzhiyun *
306*4882a593Smuzhiyun * returns 0 on success, <0 on failure
307*4882a593Smuzhiyun */
gelic_card_init_chain(struct gelic_card * card,struct gelic_descr_chain * chain,struct gelic_descr * start_descr,int no)308*4882a593Smuzhiyun static int gelic_card_init_chain(struct gelic_card *card,
309*4882a593Smuzhiyun struct gelic_descr_chain *chain,
310*4882a593Smuzhiyun struct gelic_descr *start_descr, int no)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun int i;
313*4882a593Smuzhiyun struct gelic_descr *descr;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun descr = start_descr;
316*4882a593Smuzhiyun memset(descr, 0, sizeof(*descr) * no);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun /* set up the hardware pointers in each descriptor */
319*4882a593Smuzhiyun for (i = 0; i < no; i++, descr++) {
320*4882a593Smuzhiyun gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
321*4882a593Smuzhiyun descr->bus_addr =
322*4882a593Smuzhiyun dma_map_single(ctodev(card), descr,
323*4882a593Smuzhiyun GELIC_DESCR_SIZE,
324*4882a593Smuzhiyun DMA_BIDIRECTIONAL);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun if (!descr->bus_addr)
327*4882a593Smuzhiyun goto iommu_error;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun descr->next = descr + 1;
330*4882a593Smuzhiyun descr->prev = descr - 1;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun /* make them as ring */
333*4882a593Smuzhiyun (descr - 1)->next = start_descr;
334*4882a593Smuzhiyun start_descr->prev = (descr - 1);
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun /* chain bus addr of hw descriptor */
337*4882a593Smuzhiyun descr = start_descr;
338*4882a593Smuzhiyun for (i = 0; i < no; i++, descr++) {
339*4882a593Smuzhiyun descr->next_descr_addr = cpu_to_be32(descr->next->bus_addr);
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun chain->head = start_descr;
343*4882a593Smuzhiyun chain->tail = start_descr;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun /* do not chain last hw descriptor */
346*4882a593Smuzhiyun (descr - 1)->next_descr_addr = 0;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun return 0;
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun iommu_error:
351*4882a593Smuzhiyun for (i--, descr--; 0 <= i; i--, descr--)
352*4882a593Smuzhiyun if (descr->bus_addr)
353*4882a593Smuzhiyun dma_unmap_single(ctodev(card), descr->bus_addr,
354*4882a593Smuzhiyun GELIC_DESCR_SIZE,
355*4882a593Smuzhiyun DMA_BIDIRECTIONAL);
356*4882a593Smuzhiyun return -ENOMEM;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun /**
360*4882a593Smuzhiyun * gelic_descr_prepare_rx - reinitializes a rx descriptor
361*4882a593Smuzhiyun * @card: card structure
362*4882a593Smuzhiyun * @descr: descriptor to re-init
363*4882a593Smuzhiyun *
364*4882a593Smuzhiyun * return 0 on success, <0 on failure
365*4882a593Smuzhiyun *
366*4882a593Smuzhiyun * allocates a new rx skb, iommu-maps it and attaches it to the descriptor.
367*4882a593Smuzhiyun * Activate the descriptor state-wise
368*4882a593Smuzhiyun */
gelic_descr_prepare_rx(struct gelic_card * card,struct gelic_descr * descr)369*4882a593Smuzhiyun static int gelic_descr_prepare_rx(struct gelic_card *card,
370*4882a593Smuzhiyun struct gelic_descr *descr)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun int offset;
373*4882a593Smuzhiyun unsigned int bufsize;
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun if (gelic_descr_get_status(descr) != GELIC_DESCR_DMA_NOT_IN_USE)
376*4882a593Smuzhiyun dev_info(ctodev(card), "%s: ERROR status\n", __func__);
377*4882a593Smuzhiyun /* we need to round up the buffer size to a multiple of 128 */
378*4882a593Smuzhiyun bufsize = ALIGN(GELIC_NET_MAX_MTU, GELIC_NET_RXBUF_ALIGN);
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun /* and we need to have it 128 byte aligned, therefore we allocate a
381*4882a593Smuzhiyun * bit more */
382*4882a593Smuzhiyun descr->skb = dev_alloc_skb(bufsize + GELIC_NET_RXBUF_ALIGN - 1);
383*4882a593Smuzhiyun if (!descr->skb) {
384*4882a593Smuzhiyun descr->buf_addr = 0; /* tell DMAC don't touch memory */
385*4882a593Smuzhiyun return -ENOMEM;
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun descr->buf_size = cpu_to_be32(bufsize);
388*4882a593Smuzhiyun descr->dmac_cmd_status = 0;
389*4882a593Smuzhiyun descr->result_size = 0;
390*4882a593Smuzhiyun descr->valid_size = 0;
391*4882a593Smuzhiyun descr->data_error = 0;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun offset = ((unsigned long)descr->skb->data) &
394*4882a593Smuzhiyun (GELIC_NET_RXBUF_ALIGN - 1);
395*4882a593Smuzhiyun if (offset)
396*4882a593Smuzhiyun skb_reserve(descr->skb, GELIC_NET_RXBUF_ALIGN - offset);
397*4882a593Smuzhiyun /* io-mmu-map the skb */
398*4882a593Smuzhiyun descr->buf_addr = cpu_to_be32(dma_map_single(ctodev(card),
399*4882a593Smuzhiyun descr->skb->data,
400*4882a593Smuzhiyun GELIC_NET_MAX_MTU,
401*4882a593Smuzhiyun DMA_FROM_DEVICE));
402*4882a593Smuzhiyun if (!descr->buf_addr) {
403*4882a593Smuzhiyun dev_kfree_skb_any(descr->skb);
404*4882a593Smuzhiyun descr->skb = NULL;
405*4882a593Smuzhiyun dev_info(ctodev(card),
406*4882a593Smuzhiyun "%s:Could not iommu-map rx buffer\n", __func__);
407*4882a593Smuzhiyun gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
408*4882a593Smuzhiyun return -ENOMEM;
409*4882a593Smuzhiyun } else {
410*4882a593Smuzhiyun gelic_descr_set_status(descr, GELIC_DESCR_DMA_CARDOWNED);
411*4882a593Smuzhiyun return 0;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun /**
416*4882a593Smuzhiyun * gelic_card_release_rx_chain - free all skb of rx descr
417*4882a593Smuzhiyun * @card: card structure
418*4882a593Smuzhiyun *
419*4882a593Smuzhiyun */
gelic_card_release_rx_chain(struct gelic_card * card)420*4882a593Smuzhiyun static void gelic_card_release_rx_chain(struct gelic_card *card)
421*4882a593Smuzhiyun {
422*4882a593Smuzhiyun struct gelic_descr *descr = card->rx_chain.head;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun do {
425*4882a593Smuzhiyun if (descr->skb) {
426*4882a593Smuzhiyun dma_unmap_single(ctodev(card),
427*4882a593Smuzhiyun be32_to_cpu(descr->buf_addr),
428*4882a593Smuzhiyun descr->skb->len,
429*4882a593Smuzhiyun DMA_FROM_DEVICE);
430*4882a593Smuzhiyun descr->buf_addr = 0;
431*4882a593Smuzhiyun dev_kfree_skb_any(descr->skb);
432*4882a593Smuzhiyun descr->skb = NULL;
433*4882a593Smuzhiyun gelic_descr_set_status(descr,
434*4882a593Smuzhiyun GELIC_DESCR_DMA_NOT_IN_USE);
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun descr = descr->next;
437*4882a593Smuzhiyun } while (descr != card->rx_chain.head);
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun /**
441*4882a593Smuzhiyun * gelic_card_fill_rx_chain - fills descriptors/skbs in the rx chains
442*4882a593Smuzhiyun * @card: card structure
443*4882a593Smuzhiyun *
444*4882a593Smuzhiyun * fills all descriptors in the rx chain: allocates skbs
445*4882a593Smuzhiyun * and iommu-maps them.
446*4882a593Smuzhiyun * returns 0 on success, < 0 on failure
447*4882a593Smuzhiyun */
gelic_card_fill_rx_chain(struct gelic_card * card)448*4882a593Smuzhiyun static int gelic_card_fill_rx_chain(struct gelic_card *card)
449*4882a593Smuzhiyun {
450*4882a593Smuzhiyun struct gelic_descr *descr = card->rx_chain.head;
451*4882a593Smuzhiyun int ret;
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun do {
454*4882a593Smuzhiyun if (!descr->skb) {
455*4882a593Smuzhiyun ret = gelic_descr_prepare_rx(card, descr);
456*4882a593Smuzhiyun if (ret)
457*4882a593Smuzhiyun goto rewind;
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun descr = descr->next;
460*4882a593Smuzhiyun } while (descr != card->rx_chain.head);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun return 0;
463*4882a593Smuzhiyun rewind:
464*4882a593Smuzhiyun gelic_card_release_rx_chain(card);
465*4882a593Smuzhiyun return ret;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun /**
469*4882a593Smuzhiyun * gelic_card_alloc_rx_skbs - allocates rx skbs in rx descriptor chains
470*4882a593Smuzhiyun * @card: card structure
471*4882a593Smuzhiyun *
472*4882a593Smuzhiyun * returns 0 on success, < 0 on failure
473*4882a593Smuzhiyun */
gelic_card_alloc_rx_skbs(struct gelic_card * card)474*4882a593Smuzhiyun static int gelic_card_alloc_rx_skbs(struct gelic_card *card)
475*4882a593Smuzhiyun {
476*4882a593Smuzhiyun struct gelic_descr_chain *chain;
477*4882a593Smuzhiyun int ret;
478*4882a593Smuzhiyun chain = &card->rx_chain;
479*4882a593Smuzhiyun ret = gelic_card_fill_rx_chain(card);
480*4882a593Smuzhiyun chain->tail = card->rx_top->prev; /* point to the last */
481*4882a593Smuzhiyun return ret;
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun /**
485*4882a593Smuzhiyun * gelic_descr_release_tx - processes a used tx descriptor
486*4882a593Smuzhiyun * @card: card structure
487*4882a593Smuzhiyun * @descr: descriptor to release
488*4882a593Smuzhiyun *
489*4882a593Smuzhiyun * releases a used tx descriptor (unmapping, freeing of skb)
490*4882a593Smuzhiyun */
gelic_descr_release_tx(struct gelic_card * card,struct gelic_descr * descr)491*4882a593Smuzhiyun static void gelic_descr_release_tx(struct gelic_card *card,
492*4882a593Smuzhiyun struct gelic_descr *descr)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun struct sk_buff *skb = descr->skb;
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun BUG_ON(!(be32_to_cpu(descr->data_status) & GELIC_DESCR_TX_TAIL));
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun dma_unmap_single(ctodev(card), be32_to_cpu(descr->buf_addr), skb->len,
499*4882a593Smuzhiyun DMA_TO_DEVICE);
500*4882a593Smuzhiyun dev_kfree_skb_any(skb);
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun descr->buf_addr = 0;
503*4882a593Smuzhiyun descr->buf_size = 0;
504*4882a593Smuzhiyun descr->next_descr_addr = 0;
505*4882a593Smuzhiyun descr->result_size = 0;
506*4882a593Smuzhiyun descr->valid_size = 0;
507*4882a593Smuzhiyun descr->data_status = 0;
508*4882a593Smuzhiyun descr->data_error = 0;
509*4882a593Smuzhiyun descr->skb = NULL;
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun /* set descr status */
512*4882a593Smuzhiyun gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
513*4882a593Smuzhiyun }
514*4882a593Smuzhiyun
gelic_card_stop_queues(struct gelic_card * card)515*4882a593Smuzhiyun static void gelic_card_stop_queues(struct gelic_card *card)
516*4882a593Smuzhiyun {
517*4882a593Smuzhiyun netif_stop_queue(card->netdev[GELIC_PORT_ETHERNET_0]);
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun if (card->netdev[GELIC_PORT_WIRELESS])
520*4882a593Smuzhiyun netif_stop_queue(card->netdev[GELIC_PORT_WIRELESS]);
521*4882a593Smuzhiyun }
gelic_card_wake_queues(struct gelic_card * card)522*4882a593Smuzhiyun static void gelic_card_wake_queues(struct gelic_card *card)
523*4882a593Smuzhiyun {
524*4882a593Smuzhiyun netif_wake_queue(card->netdev[GELIC_PORT_ETHERNET_0]);
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun if (card->netdev[GELIC_PORT_WIRELESS])
527*4882a593Smuzhiyun netif_wake_queue(card->netdev[GELIC_PORT_WIRELESS]);
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun /**
530*4882a593Smuzhiyun * gelic_card_release_tx_chain - processes sent tx descriptors
531*4882a593Smuzhiyun * @card: adapter structure
532*4882a593Smuzhiyun * @stop: net_stop sequence
533*4882a593Smuzhiyun *
534*4882a593Smuzhiyun * releases the tx descriptors that gelic has finished with
535*4882a593Smuzhiyun */
gelic_card_release_tx_chain(struct gelic_card * card,int stop)536*4882a593Smuzhiyun static void gelic_card_release_tx_chain(struct gelic_card *card, int stop)
537*4882a593Smuzhiyun {
538*4882a593Smuzhiyun struct gelic_descr_chain *tx_chain;
539*4882a593Smuzhiyun enum gelic_descr_dma_status status;
540*4882a593Smuzhiyun struct net_device *netdev;
541*4882a593Smuzhiyun int release = 0;
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun for (tx_chain = &card->tx_chain;
544*4882a593Smuzhiyun tx_chain->head != tx_chain->tail && tx_chain->tail;
545*4882a593Smuzhiyun tx_chain->tail = tx_chain->tail->next) {
546*4882a593Smuzhiyun status = gelic_descr_get_status(tx_chain->tail);
547*4882a593Smuzhiyun netdev = tx_chain->tail->skb->dev;
548*4882a593Smuzhiyun switch (status) {
549*4882a593Smuzhiyun case GELIC_DESCR_DMA_RESPONSE_ERROR:
550*4882a593Smuzhiyun case GELIC_DESCR_DMA_PROTECTION_ERROR:
551*4882a593Smuzhiyun case GELIC_DESCR_DMA_FORCE_END:
552*4882a593Smuzhiyun if (printk_ratelimit())
553*4882a593Smuzhiyun dev_info(ctodev(card),
554*4882a593Smuzhiyun "%s: forcing end of tx descriptor " \
555*4882a593Smuzhiyun "with status %x\n",
556*4882a593Smuzhiyun __func__, status);
557*4882a593Smuzhiyun netdev->stats.tx_dropped++;
558*4882a593Smuzhiyun break;
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun case GELIC_DESCR_DMA_COMPLETE:
561*4882a593Smuzhiyun if (tx_chain->tail->skb) {
562*4882a593Smuzhiyun netdev->stats.tx_packets++;
563*4882a593Smuzhiyun netdev->stats.tx_bytes +=
564*4882a593Smuzhiyun tx_chain->tail->skb->len;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun break;
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun case GELIC_DESCR_DMA_CARDOWNED:
569*4882a593Smuzhiyun /* pending tx request */
570*4882a593Smuzhiyun default:
571*4882a593Smuzhiyun /* any other value (== GELIC_DESCR_DMA_NOT_IN_USE) */
572*4882a593Smuzhiyun if (!stop)
573*4882a593Smuzhiyun goto out;
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun gelic_descr_release_tx(card, tx_chain->tail);
576*4882a593Smuzhiyun release ++;
577*4882a593Smuzhiyun }
578*4882a593Smuzhiyun out:
579*4882a593Smuzhiyun if (!stop && release)
580*4882a593Smuzhiyun gelic_card_wake_queues(card);
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun /**
584*4882a593Smuzhiyun * gelic_net_set_multi - sets multicast addresses and promisc flags
585*4882a593Smuzhiyun * @netdev: interface device structure
586*4882a593Smuzhiyun *
587*4882a593Smuzhiyun * gelic_net_set_multi configures multicast addresses as needed for the
588*4882a593Smuzhiyun * netdev interface. It also sets up multicast, allmulti and promisc
589*4882a593Smuzhiyun * flags appropriately
590*4882a593Smuzhiyun */
gelic_net_set_multi(struct net_device * netdev)591*4882a593Smuzhiyun void gelic_net_set_multi(struct net_device *netdev)
592*4882a593Smuzhiyun {
593*4882a593Smuzhiyun struct gelic_card *card = netdev_card(netdev);
594*4882a593Smuzhiyun struct netdev_hw_addr *ha;
595*4882a593Smuzhiyun unsigned int i;
596*4882a593Smuzhiyun uint8_t *p;
597*4882a593Smuzhiyun u64 addr;
598*4882a593Smuzhiyun int status;
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun /* clear all multicast address */
601*4882a593Smuzhiyun status = lv1_net_remove_multicast_address(bus_id(card), dev_id(card),
602*4882a593Smuzhiyun 0, 1);
603*4882a593Smuzhiyun if (status)
604*4882a593Smuzhiyun dev_err(ctodev(card),
605*4882a593Smuzhiyun "lv1_net_remove_multicast_address failed %d\n",
606*4882a593Smuzhiyun status);
607*4882a593Smuzhiyun /* set broadcast address */
608*4882a593Smuzhiyun status = lv1_net_add_multicast_address(bus_id(card), dev_id(card),
609*4882a593Smuzhiyun GELIC_NET_BROADCAST_ADDR, 0);
610*4882a593Smuzhiyun if (status)
611*4882a593Smuzhiyun dev_err(ctodev(card),
612*4882a593Smuzhiyun "lv1_net_add_multicast_address failed, %d\n",
613*4882a593Smuzhiyun status);
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun if ((netdev->flags & IFF_ALLMULTI) ||
616*4882a593Smuzhiyun (netdev_mc_count(netdev) > GELIC_NET_MC_COUNT_MAX)) {
617*4882a593Smuzhiyun status = lv1_net_add_multicast_address(bus_id(card),
618*4882a593Smuzhiyun dev_id(card),
619*4882a593Smuzhiyun 0, 1);
620*4882a593Smuzhiyun if (status)
621*4882a593Smuzhiyun dev_err(ctodev(card),
622*4882a593Smuzhiyun "lv1_net_add_multicast_address failed, %d\n",
623*4882a593Smuzhiyun status);
624*4882a593Smuzhiyun return;
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun /* set multicast addresses */
628*4882a593Smuzhiyun netdev_for_each_mc_addr(ha, netdev) {
629*4882a593Smuzhiyun addr = 0;
630*4882a593Smuzhiyun p = ha->addr;
631*4882a593Smuzhiyun for (i = 0; i < ETH_ALEN; i++) {
632*4882a593Smuzhiyun addr <<= 8;
633*4882a593Smuzhiyun addr |= *p++;
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun status = lv1_net_add_multicast_address(bus_id(card),
636*4882a593Smuzhiyun dev_id(card),
637*4882a593Smuzhiyun addr, 0);
638*4882a593Smuzhiyun if (status)
639*4882a593Smuzhiyun dev_err(ctodev(card),
640*4882a593Smuzhiyun "lv1_net_add_multicast_address failed, %d\n",
641*4882a593Smuzhiyun status);
642*4882a593Smuzhiyun }
643*4882a593Smuzhiyun }
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun /**
646*4882a593Smuzhiyun * gelic_net_stop - called upon ifconfig down
647*4882a593Smuzhiyun * @netdev: interface device structure
648*4882a593Smuzhiyun *
649*4882a593Smuzhiyun * always returns 0
650*4882a593Smuzhiyun */
gelic_net_stop(struct net_device * netdev)651*4882a593Smuzhiyun int gelic_net_stop(struct net_device *netdev)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun struct gelic_card *card;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun pr_debug("%s: start\n", __func__);
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun netif_stop_queue(netdev);
658*4882a593Smuzhiyun netif_carrier_off(netdev);
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun card = netdev_card(netdev);
661*4882a593Smuzhiyun gelic_card_down(card);
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun pr_debug("%s: done\n", __func__);
664*4882a593Smuzhiyun return 0;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun /**
668*4882a593Smuzhiyun * gelic_card_get_next_tx_descr - returns the next available tx descriptor
669*4882a593Smuzhiyun * @card: device structure to get descriptor from
670*4882a593Smuzhiyun *
671*4882a593Smuzhiyun * returns the address of the next descriptor, or NULL if not available.
672*4882a593Smuzhiyun */
673*4882a593Smuzhiyun static struct gelic_descr *
gelic_card_get_next_tx_descr(struct gelic_card * card)674*4882a593Smuzhiyun gelic_card_get_next_tx_descr(struct gelic_card *card)
675*4882a593Smuzhiyun {
676*4882a593Smuzhiyun if (!card->tx_chain.head)
677*4882a593Smuzhiyun return NULL;
678*4882a593Smuzhiyun /* see if the next descriptor is free */
679*4882a593Smuzhiyun if (card->tx_chain.tail != card->tx_chain.head->next &&
680*4882a593Smuzhiyun gelic_descr_get_status(card->tx_chain.head) ==
681*4882a593Smuzhiyun GELIC_DESCR_DMA_NOT_IN_USE)
682*4882a593Smuzhiyun return card->tx_chain.head;
683*4882a593Smuzhiyun else
684*4882a593Smuzhiyun return NULL;
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun }
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun /**
689*4882a593Smuzhiyun * gelic_net_set_txdescr_cmdstat - sets the tx descriptor command field
690*4882a593Smuzhiyun * @descr: descriptor structure to fill out
691*4882a593Smuzhiyun * @skb: packet to consider
692*4882a593Smuzhiyun *
693*4882a593Smuzhiyun * fills out the command and status field of the descriptor structure,
694*4882a593Smuzhiyun * depending on hardware checksum settings. This function assumes a wmb()
695*4882a593Smuzhiyun * has executed before.
696*4882a593Smuzhiyun */
gelic_descr_set_tx_cmdstat(struct gelic_descr * descr,struct sk_buff * skb)697*4882a593Smuzhiyun static void gelic_descr_set_tx_cmdstat(struct gelic_descr *descr,
698*4882a593Smuzhiyun struct sk_buff *skb)
699*4882a593Smuzhiyun {
700*4882a593Smuzhiyun if (skb->ip_summed != CHECKSUM_PARTIAL)
701*4882a593Smuzhiyun descr->dmac_cmd_status =
702*4882a593Smuzhiyun cpu_to_be32(GELIC_DESCR_DMA_CMD_NO_CHKSUM |
703*4882a593Smuzhiyun GELIC_DESCR_TX_DMA_FRAME_TAIL);
704*4882a593Smuzhiyun else {
705*4882a593Smuzhiyun /* is packet ip?
706*4882a593Smuzhiyun * if yes: tcp? udp? */
707*4882a593Smuzhiyun if (skb->protocol == htons(ETH_P_IP)) {
708*4882a593Smuzhiyun if (ip_hdr(skb)->protocol == IPPROTO_TCP)
709*4882a593Smuzhiyun descr->dmac_cmd_status =
710*4882a593Smuzhiyun cpu_to_be32(GELIC_DESCR_DMA_CMD_TCP_CHKSUM |
711*4882a593Smuzhiyun GELIC_DESCR_TX_DMA_FRAME_TAIL);
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun else if (ip_hdr(skb)->protocol == IPPROTO_UDP)
714*4882a593Smuzhiyun descr->dmac_cmd_status =
715*4882a593Smuzhiyun cpu_to_be32(GELIC_DESCR_DMA_CMD_UDP_CHKSUM |
716*4882a593Smuzhiyun GELIC_DESCR_TX_DMA_FRAME_TAIL);
717*4882a593Smuzhiyun else /*
718*4882a593Smuzhiyun * the stack should checksum non-tcp and non-udp
719*4882a593Smuzhiyun * packets on his own: NETIF_F_IP_CSUM
720*4882a593Smuzhiyun */
721*4882a593Smuzhiyun descr->dmac_cmd_status =
722*4882a593Smuzhiyun cpu_to_be32(GELIC_DESCR_DMA_CMD_NO_CHKSUM |
723*4882a593Smuzhiyun GELIC_DESCR_TX_DMA_FRAME_TAIL);
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun }
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun
gelic_put_vlan_tag(struct sk_buff * skb,unsigned short tag)728*4882a593Smuzhiyun static struct sk_buff *gelic_put_vlan_tag(struct sk_buff *skb,
729*4882a593Smuzhiyun unsigned short tag)
730*4882a593Smuzhiyun {
731*4882a593Smuzhiyun struct vlan_ethhdr *veth;
732*4882a593Smuzhiyun static unsigned int c;
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun if (skb_headroom(skb) < VLAN_HLEN) {
735*4882a593Smuzhiyun struct sk_buff *sk_tmp = skb;
736*4882a593Smuzhiyun pr_debug("%s: hd=%d c=%ud\n", __func__, skb_headroom(skb), c);
737*4882a593Smuzhiyun skb = skb_realloc_headroom(sk_tmp, VLAN_HLEN);
738*4882a593Smuzhiyun if (!skb)
739*4882a593Smuzhiyun return NULL;
740*4882a593Smuzhiyun dev_kfree_skb_any(sk_tmp);
741*4882a593Smuzhiyun }
742*4882a593Smuzhiyun veth = skb_push(skb, VLAN_HLEN);
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun /* Move the mac addresses to the top of buffer */
745*4882a593Smuzhiyun memmove(skb->data, skb->data + VLAN_HLEN, 2 * ETH_ALEN);
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun veth->h_vlan_proto = cpu_to_be16(ETH_P_8021Q);
748*4882a593Smuzhiyun veth->h_vlan_TCI = htons(tag);
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun return skb;
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun /**
754*4882a593Smuzhiyun * gelic_descr_prepare_tx - setup a descriptor for sending packets
755*4882a593Smuzhiyun * @card: card structure
756*4882a593Smuzhiyun * @descr: descriptor structure
757*4882a593Smuzhiyun * @skb: packet to use
758*4882a593Smuzhiyun *
759*4882a593Smuzhiyun * returns 0 on success, <0 on failure.
760*4882a593Smuzhiyun *
761*4882a593Smuzhiyun */
gelic_descr_prepare_tx(struct gelic_card * card,struct gelic_descr * descr,struct sk_buff * skb)762*4882a593Smuzhiyun static int gelic_descr_prepare_tx(struct gelic_card *card,
763*4882a593Smuzhiyun struct gelic_descr *descr,
764*4882a593Smuzhiyun struct sk_buff *skb)
765*4882a593Smuzhiyun {
766*4882a593Smuzhiyun dma_addr_t buf;
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun if (card->vlan_required) {
769*4882a593Smuzhiyun struct sk_buff *skb_tmp;
770*4882a593Smuzhiyun enum gelic_port_type type;
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun type = netdev_port(skb->dev)->type;
773*4882a593Smuzhiyun skb_tmp = gelic_put_vlan_tag(skb,
774*4882a593Smuzhiyun card->vlan[type].tx);
775*4882a593Smuzhiyun if (!skb_tmp)
776*4882a593Smuzhiyun return -ENOMEM;
777*4882a593Smuzhiyun skb = skb_tmp;
778*4882a593Smuzhiyun }
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun buf = dma_map_single(ctodev(card), skb->data, skb->len, DMA_TO_DEVICE);
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun if (!buf) {
783*4882a593Smuzhiyun dev_err(ctodev(card),
784*4882a593Smuzhiyun "dma map 2 failed (%p, %i). Dropping packet\n",
785*4882a593Smuzhiyun skb->data, skb->len);
786*4882a593Smuzhiyun return -ENOMEM;
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun descr->buf_addr = cpu_to_be32(buf);
790*4882a593Smuzhiyun descr->buf_size = cpu_to_be32(skb->len);
791*4882a593Smuzhiyun descr->skb = skb;
792*4882a593Smuzhiyun descr->data_status = 0;
793*4882a593Smuzhiyun descr->next_descr_addr = 0; /* terminate hw descr */
794*4882a593Smuzhiyun gelic_descr_set_tx_cmdstat(descr, skb);
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun /* bump free descriptor pointer */
797*4882a593Smuzhiyun card->tx_chain.head = descr->next;
798*4882a593Smuzhiyun return 0;
799*4882a593Smuzhiyun }
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun /**
802*4882a593Smuzhiyun * gelic_card_kick_txdma - enables TX DMA processing
803*4882a593Smuzhiyun * @card: card structure
804*4882a593Smuzhiyun * @descr: descriptor address to enable TX processing at
805*4882a593Smuzhiyun *
806*4882a593Smuzhiyun */
gelic_card_kick_txdma(struct gelic_card * card,struct gelic_descr * descr)807*4882a593Smuzhiyun static int gelic_card_kick_txdma(struct gelic_card *card,
808*4882a593Smuzhiyun struct gelic_descr *descr)
809*4882a593Smuzhiyun {
810*4882a593Smuzhiyun int status = 0;
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun if (card->tx_dma_progress)
813*4882a593Smuzhiyun return 0;
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun if (gelic_descr_get_status(descr) == GELIC_DESCR_DMA_CARDOWNED) {
816*4882a593Smuzhiyun card->tx_dma_progress = 1;
817*4882a593Smuzhiyun status = lv1_net_start_tx_dma(bus_id(card), dev_id(card),
818*4882a593Smuzhiyun descr->bus_addr, 0);
819*4882a593Smuzhiyun if (status) {
820*4882a593Smuzhiyun card->tx_dma_progress = 0;
821*4882a593Smuzhiyun dev_info(ctodev(card), "lv1_net_start_txdma failed," \
822*4882a593Smuzhiyun "status=%d\n", status);
823*4882a593Smuzhiyun }
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun return status;
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun /**
829*4882a593Smuzhiyun * gelic_net_xmit - transmits a frame over the device
830*4882a593Smuzhiyun * @skb: packet to send out
831*4882a593Smuzhiyun * @netdev: interface device structure
832*4882a593Smuzhiyun *
833*4882a593Smuzhiyun * returns NETDEV_TX_OK on success, NETDEV_TX_BUSY on failure
834*4882a593Smuzhiyun */
gelic_net_xmit(struct sk_buff * skb,struct net_device * netdev)835*4882a593Smuzhiyun netdev_tx_t gelic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
836*4882a593Smuzhiyun {
837*4882a593Smuzhiyun struct gelic_card *card = netdev_card(netdev);
838*4882a593Smuzhiyun struct gelic_descr *descr;
839*4882a593Smuzhiyun int result;
840*4882a593Smuzhiyun unsigned long flags;
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun spin_lock_irqsave(&card->tx_lock, flags);
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun gelic_card_release_tx_chain(card, 0);
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun descr = gelic_card_get_next_tx_descr(card);
847*4882a593Smuzhiyun if (!descr) {
848*4882a593Smuzhiyun /*
849*4882a593Smuzhiyun * no more descriptors free
850*4882a593Smuzhiyun */
851*4882a593Smuzhiyun gelic_card_stop_queues(card);
852*4882a593Smuzhiyun spin_unlock_irqrestore(&card->tx_lock, flags);
853*4882a593Smuzhiyun return NETDEV_TX_BUSY;
854*4882a593Smuzhiyun }
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun result = gelic_descr_prepare_tx(card, descr, skb);
857*4882a593Smuzhiyun if (result) {
858*4882a593Smuzhiyun /*
859*4882a593Smuzhiyun * DMA map failed. As chances are that failure
860*4882a593Smuzhiyun * would continue, just release skb and return
861*4882a593Smuzhiyun */
862*4882a593Smuzhiyun netdev->stats.tx_dropped++;
863*4882a593Smuzhiyun dev_kfree_skb_any(skb);
864*4882a593Smuzhiyun spin_unlock_irqrestore(&card->tx_lock, flags);
865*4882a593Smuzhiyun return NETDEV_TX_OK;
866*4882a593Smuzhiyun }
867*4882a593Smuzhiyun /*
868*4882a593Smuzhiyun * link this prepared descriptor to previous one
869*4882a593Smuzhiyun * to achieve high performance
870*4882a593Smuzhiyun */
871*4882a593Smuzhiyun descr->prev->next_descr_addr = cpu_to_be32(descr->bus_addr);
872*4882a593Smuzhiyun /*
873*4882a593Smuzhiyun * as hardware descriptor is modified in the above lines,
874*4882a593Smuzhiyun * ensure that the hardware sees it
875*4882a593Smuzhiyun */
876*4882a593Smuzhiyun wmb();
877*4882a593Smuzhiyun if (gelic_card_kick_txdma(card, descr)) {
878*4882a593Smuzhiyun /*
879*4882a593Smuzhiyun * kick failed.
880*4882a593Smuzhiyun * release descriptor which was just prepared
881*4882a593Smuzhiyun */
882*4882a593Smuzhiyun netdev->stats.tx_dropped++;
883*4882a593Smuzhiyun /* don't trigger BUG_ON() in gelic_descr_release_tx */
884*4882a593Smuzhiyun descr->data_status = cpu_to_be32(GELIC_DESCR_TX_TAIL);
885*4882a593Smuzhiyun gelic_descr_release_tx(card, descr);
886*4882a593Smuzhiyun /* reset head */
887*4882a593Smuzhiyun card->tx_chain.head = descr;
888*4882a593Smuzhiyun /* reset hw termination */
889*4882a593Smuzhiyun descr->prev->next_descr_addr = 0;
890*4882a593Smuzhiyun dev_info(ctodev(card), "%s: kick failure\n", __func__);
891*4882a593Smuzhiyun }
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun spin_unlock_irqrestore(&card->tx_lock, flags);
894*4882a593Smuzhiyun return NETDEV_TX_OK;
895*4882a593Smuzhiyun }
896*4882a593Smuzhiyun
897*4882a593Smuzhiyun /**
898*4882a593Smuzhiyun * gelic_net_pass_skb_up - takes an skb from a descriptor and passes it on
899*4882a593Smuzhiyun * @descr: descriptor to process
900*4882a593Smuzhiyun * @card: card structure
901*4882a593Smuzhiyun * @netdev: net_device structure to be passed packet
902*4882a593Smuzhiyun *
903*4882a593Smuzhiyun * iommu-unmaps the skb, fills out skb structure and passes the data to the
904*4882a593Smuzhiyun * stack. The descriptor state is not changed.
905*4882a593Smuzhiyun */
gelic_net_pass_skb_up(struct gelic_descr * descr,struct gelic_card * card,struct net_device * netdev)906*4882a593Smuzhiyun static void gelic_net_pass_skb_up(struct gelic_descr *descr,
907*4882a593Smuzhiyun struct gelic_card *card,
908*4882a593Smuzhiyun struct net_device *netdev)
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun {
911*4882a593Smuzhiyun struct sk_buff *skb = descr->skb;
912*4882a593Smuzhiyun u32 data_status, data_error;
913*4882a593Smuzhiyun
914*4882a593Smuzhiyun data_status = be32_to_cpu(descr->data_status);
915*4882a593Smuzhiyun data_error = be32_to_cpu(descr->data_error);
916*4882a593Smuzhiyun /* unmap skb buffer */
917*4882a593Smuzhiyun dma_unmap_single(ctodev(card), be32_to_cpu(descr->buf_addr),
918*4882a593Smuzhiyun GELIC_NET_MAX_MTU,
919*4882a593Smuzhiyun DMA_FROM_DEVICE);
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun skb_put(skb, be32_to_cpu(descr->valid_size)?
922*4882a593Smuzhiyun be32_to_cpu(descr->valid_size) :
923*4882a593Smuzhiyun be32_to_cpu(descr->result_size));
924*4882a593Smuzhiyun if (!descr->valid_size)
925*4882a593Smuzhiyun dev_info(ctodev(card), "buffer full %x %x %x\n",
926*4882a593Smuzhiyun be32_to_cpu(descr->result_size),
927*4882a593Smuzhiyun be32_to_cpu(descr->buf_size),
928*4882a593Smuzhiyun be32_to_cpu(descr->dmac_cmd_status));
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun descr->skb = NULL;
931*4882a593Smuzhiyun /*
932*4882a593Smuzhiyun * the card put 2 bytes vlan tag in front
933*4882a593Smuzhiyun * of the ethernet frame
934*4882a593Smuzhiyun */
935*4882a593Smuzhiyun skb_pull(skb, 2);
936*4882a593Smuzhiyun skb->protocol = eth_type_trans(skb, netdev);
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun /* checksum offload */
939*4882a593Smuzhiyun if (netdev->features & NETIF_F_RXCSUM) {
940*4882a593Smuzhiyun if ((data_status & GELIC_DESCR_DATA_STATUS_CHK_MASK) &&
941*4882a593Smuzhiyun (!(data_error & GELIC_DESCR_DATA_ERROR_CHK_MASK)))
942*4882a593Smuzhiyun skb->ip_summed = CHECKSUM_UNNECESSARY;
943*4882a593Smuzhiyun else
944*4882a593Smuzhiyun skb_checksum_none_assert(skb);
945*4882a593Smuzhiyun } else
946*4882a593Smuzhiyun skb_checksum_none_assert(skb);
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun /* update netdevice statistics */
949*4882a593Smuzhiyun netdev->stats.rx_packets++;
950*4882a593Smuzhiyun netdev->stats.rx_bytes += skb->len;
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun /* pass skb up to stack */
953*4882a593Smuzhiyun netif_receive_skb(skb);
954*4882a593Smuzhiyun }
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun /**
957*4882a593Smuzhiyun * gelic_card_decode_one_descr - processes an rx descriptor
958*4882a593Smuzhiyun * @card: card structure
959*4882a593Smuzhiyun *
960*4882a593Smuzhiyun * returns 1 if a packet has been sent to the stack, otherwise 0
961*4882a593Smuzhiyun *
962*4882a593Smuzhiyun * processes an rx descriptor by iommu-unmapping the data buffer and passing
963*4882a593Smuzhiyun * the packet up to the stack
964*4882a593Smuzhiyun */
gelic_card_decode_one_descr(struct gelic_card * card)965*4882a593Smuzhiyun static int gelic_card_decode_one_descr(struct gelic_card *card)
966*4882a593Smuzhiyun {
967*4882a593Smuzhiyun enum gelic_descr_dma_status status;
968*4882a593Smuzhiyun struct gelic_descr_chain *chain = &card->rx_chain;
969*4882a593Smuzhiyun struct gelic_descr *descr = chain->head;
970*4882a593Smuzhiyun struct net_device *netdev = NULL;
971*4882a593Smuzhiyun int dmac_chain_ended;
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun status = gelic_descr_get_status(descr);
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun if (status == GELIC_DESCR_DMA_CARDOWNED)
976*4882a593Smuzhiyun return 0;
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun if (status == GELIC_DESCR_DMA_NOT_IN_USE) {
979*4882a593Smuzhiyun dev_dbg(ctodev(card), "dormant descr? %p\n", descr);
980*4882a593Smuzhiyun return 0;
981*4882a593Smuzhiyun }
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun /* netdevice select */
984*4882a593Smuzhiyun if (card->vlan_required) {
985*4882a593Smuzhiyun unsigned int i;
986*4882a593Smuzhiyun u16 vid;
987*4882a593Smuzhiyun vid = *(u16 *)(descr->skb->data) & VLAN_VID_MASK;
988*4882a593Smuzhiyun for (i = 0; i < GELIC_PORT_MAX; i++) {
989*4882a593Smuzhiyun if (card->vlan[i].rx == vid) {
990*4882a593Smuzhiyun netdev = card->netdev[i];
991*4882a593Smuzhiyun break;
992*4882a593Smuzhiyun }
993*4882a593Smuzhiyun }
994*4882a593Smuzhiyun if (GELIC_PORT_MAX <= i) {
995*4882a593Smuzhiyun pr_info("%s: unknown packet vid=%x\n", __func__, vid);
996*4882a593Smuzhiyun goto refill;
997*4882a593Smuzhiyun }
998*4882a593Smuzhiyun } else
999*4882a593Smuzhiyun netdev = card->netdev[GELIC_PORT_ETHERNET_0];
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun if ((status == GELIC_DESCR_DMA_RESPONSE_ERROR) ||
1002*4882a593Smuzhiyun (status == GELIC_DESCR_DMA_PROTECTION_ERROR) ||
1003*4882a593Smuzhiyun (status == GELIC_DESCR_DMA_FORCE_END)) {
1004*4882a593Smuzhiyun dev_info(ctodev(card), "dropping RX descriptor with state %x\n",
1005*4882a593Smuzhiyun status);
1006*4882a593Smuzhiyun netdev->stats.rx_dropped++;
1007*4882a593Smuzhiyun goto refill;
1008*4882a593Smuzhiyun }
1009*4882a593Smuzhiyun
1010*4882a593Smuzhiyun if (status == GELIC_DESCR_DMA_BUFFER_FULL) {
1011*4882a593Smuzhiyun /*
1012*4882a593Smuzhiyun * Buffer full would occur if and only if
1013*4882a593Smuzhiyun * the frame length was longer than the size of this
1014*4882a593Smuzhiyun * descriptor's buffer. If the frame length was equal
1015*4882a593Smuzhiyun * to or shorter than buffer'size, FRAME_END condition
1016*4882a593Smuzhiyun * would occur.
1017*4882a593Smuzhiyun * Anyway this frame was longer than the MTU,
1018*4882a593Smuzhiyun * just drop it.
1019*4882a593Smuzhiyun */
1020*4882a593Smuzhiyun dev_info(ctodev(card), "overlength frame\n");
1021*4882a593Smuzhiyun goto refill;
1022*4882a593Smuzhiyun }
1023*4882a593Smuzhiyun /*
1024*4882a593Smuzhiyun * descriptors any other than FRAME_END here should
1025*4882a593Smuzhiyun * be treated as error.
1026*4882a593Smuzhiyun */
1027*4882a593Smuzhiyun if (status != GELIC_DESCR_DMA_FRAME_END) {
1028*4882a593Smuzhiyun dev_dbg(ctodev(card), "RX descriptor with state %x\n",
1029*4882a593Smuzhiyun status);
1030*4882a593Smuzhiyun goto refill;
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun /* ok, we've got a packet in descr */
1034*4882a593Smuzhiyun gelic_net_pass_skb_up(descr, card, netdev);
1035*4882a593Smuzhiyun refill:
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun /* is the current descriptor terminated with next_descr == NULL? */
1038*4882a593Smuzhiyun dmac_chain_ended =
1039*4882a593Smuzhiyun be32_to_cpu(descr->dmac_cmd_status) &
1040*4882a593Smuzhiyun GELIC_DESCR_RX_DMA_CHAIN_END;
1041*4882a593Smuzhiyun /*
1042*4882a593Smuzhiyun * So that always DMAC can see the end
1043*4882a593Smuzhiyun * of the descriptor chain to avoid
1044*4882a593Smuzhiyun * from unwanted DMAC overrun.
1045*4882a593Smuzhiyun */
1046*4882a593Smuzhiyun descr->next_descr_addr = 0;
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun /* change the descriptor state: */
1049*4882a593Smuzhiyun gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun /*
1052*4882a593Smuzhiyun * this call can fail, but for now, just leave this
1053*4882a593Smuzhiyun * descriptor without skb
1054*4882a593Smuzhiyun */
1055*4882a593Smuzhiyun gelic_descr_prepare_rx(card, descr);
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun chain->tail = descr;
1058*4882a593Smuzhiyun chain->head = descr->next;
1059*4882a593Smuzhiyun
1060*4882a593Smuzhiyun /*
1061*4882a593Smuzhiyun * Set this descriptor the end of the chain.
1062*4882a593Smuzhiyun */
1063*4882a593Smuzhiyun descr->prev->next_descr_addr = cpu_to_be32(descr->bus_addr);
1064*4882a593Smuzhiyun
1065*4882a593Smuzhiyun /*
1066*4882a593Smuzhiyun * If dmac chain was met, DMAC stopped.
1067*4882a593Smuzhiyun * thus re-enable it
1068*4882a593Smuzhiyun */
1069*4882a593Smuzhiyun
1070*4882a593Smuzhiyun if (dmac_chain_ended)
1071*4882a593Smuzhiyun gelic_card_enable_rxdmac(card);
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun return 1;
1074*4882a593Smuzhiyun }
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun /**
1077*4882a593Smuzhiyun * gelic_net_poll - NAPI poll function called by the stack to return packets
1078*4882a593Smuzhiyun * @napi: napi structure
1079*4882a593Smuzhiyun * @budget: number of packets we can pass to the stack at most
1080*4882a593Smuzhiyun *
1081*4882a593Smuzhiyun * returns the number of the processed packets
1082*4882a593Smuzhiyun *
1083*4882a593Smuzhiyun */
gelic_net_poll(struct napi_struct * napi,int budget)1084*4882a593Smuzhiyun static int gelic_net_poll(struct napi_struct *napi, int budget)
1085*4882a593Smuzhiyun {
1086*4882a593Smuzhiyun struct gelic_card *card = container_of(napi, struct gelic_card, napi);
1087*4882a593Smuzhiyun int packets_done = 0;
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun while (packets_done < budget) {
1090*4882a593Smuzhiyun if (!gelic_card_decode_one_descr(card))
1091*4882a593Smuzhiyun break;
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun packets_done++;
1094*4882a593Smuzhiyun }
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun if (packets_done < budget) {
1097*4882a593Smuzhiyun napi_complete_done(napi, packets_done);
1098*4882a593Smuzhiyun gelic_card_rx_irq_on(card);
1099*4882a593Smuzhiyun }
1100*4882a593Smuzhiyun return packets_done;
1101*4882a593Smuzhiyun }
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun /**
1104*4882a593Smuzhiyun * gelic_card_interrupt - event handler for gelic_net
1105*4882a593Smuzhiyun */
gelic_card_interrupt(int irq,void * ptr)1106*4882a593Smuzhiyun static irqreturn_t gelic_card_interrupt(int irq, void *ptr)
1107*4882a593Smuzhiyun {
1108*4882a593Smuzhiyun unsigned long flags;
1109*4882a593Smuzhiyun struct gelic_card *card = ptr;
1110*4882a593Smuzhiyun u64 status;
1111*4882a593Smuzhiyun
1112*4882a593Smuzhiyun status = card->irq_status;
1113*4882a593Smuzhiyun
1114*4882a593Smuzhiyun if (!status)
1115*4882a593Smuzhiyun return IRQ_NONE;
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun status &= card->irq_mask;
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun if (status & GELIC_CARD_RXINT) {
1120*4882a593Smuzhiyun gelic_card_rx_irq_off(card);
1121*4882a593Smuzhiyun napi_schedule(&card->napi);
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun if (status & GELIC_CARD_TXINT) {
1125*4882a593Smuzhiyun spin_lock_irqsave(&card->tx_lock, flags);
1126*4882a593Smuzhiyun card->tx_dma_progress = 0;
1127*4882a593Smuzhiyun gelic_card_release_tx_chain(card, 0);
1128*4882a593Smuzhiyun /* kick outstanding tx descriptor if any */
1129*4882a593Smuzhiyun gelic_card_kick_txdma(card, card->tx_chain.tail);
1130*4882a593Smuzhiyun spin_unlock_irqrestore(&card->tx_lock, flags);
1131*4882a593Smuzhiyun }
1132*4882a593Smuzhiyun
1133*4882a593Smuzhiyun /* ether port status changed */
1134*4882a593Smuzhiyun if (status & GELIC_CARD_PORT_STATUS_CHANGED)
1135*4882a593Smuzhiyun gelic_card_get_ether_port_status(card, 1);
1136*4882a593Smuzhiyun
1137*4882a593Smuzhiyun #ifdef CONFIG_GELIC_WIRELESS
1138*4882a593Smuzhiyun if (status & (GELIC_CARD_WLAN_EVENT_RECEIVED |
1139*4882a593Smuzhiyun GELIC_CARD_WLAN_COMMAND_COMPLETED))
1140*4882a593Smuzhiyun gelic_wl_interrupt(card->netdev[GELIC_PORT_WIRELESS], status);
1141*4882a593Smuzhiyun #endif
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun return IRQ_HANDLED;
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun
1146*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
1147*4882a593Smuzhiyun /**
1148*4882a593Smuzhiyun * gelic_net_poll_controller - artificial interrupt for netconsole etc.
1149*4882a593Smuzhiyun * @netdev: interface device structure
1150*4882a593Smuzhiyun *
1151*4882a593Smuzhiyun * see Documentation/networking/netconsole.rst
1152*4882a593Smuzhiyun */
gelic_net_poll_controller(struct net_device * netdev)1153*4882a593Smuzhiyun void gelic_net_poll_controller(struct net_device *netdev)
1154*4882a593Smuzhiyun {
1155*4882a593Smuzhiyun struct gelic_card *card = netdev_card(netdev);
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun gelic_card_set_irq_mask(card, 0);
1158*4882a593Smuzhiyun gelic_card_interrupt(netdev->irq, netdev);
1159*4882a593Smuzhiyun gelic_card_set_irq_mask(card, card->irq_mask);
1160*4882a593Smuzhiyun }
1161*4882a593Smuzhiyun #endif /* CONFIG_NET_POLL_CONTROLLER */
1162*4882a593Smuzhiyun
1163*4882a593Smuzhiyun /**
1164*4882a593Smuzhiyun * gelic_net_open - called upon ifconfig up
1165*4882a593Smuzhiyun * @netdev: interface device structure
1166*4882a593Smuzhiyun *
1167*4882a593Smuzhiyun * returns 0 on success, <0 on failure
1168*4882a593Smuzhiyun *
1169*4882a593Smuzhiyun * gelic_net_open allocates all the descriptors and memory needed for
1170*4882a593Smuzhiyun * operation, sets up multicast list and enables interrupts
1171*4882a593Smuzhiyun */
gelic_net_open(struct net_device * netdev)1172*4882a593Smuzhiyun int gelic_net_open(struct net_device *netdev)
1173*4882a593Smuzhiyun {
1174*4882a593Smuzhiyun struct gelic_card *card = netdev_card(netdev);
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun dev_dbg(ctodev(card), " -> %s %p\n", __func__, netdev);
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun gelic_card_up(card);
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun netif_start_queue(netdev);
1181*4882a593Smuzhiyun gelic_card_get_ether_port_status(card, 1);
1182*4882a593Smuzhiyun
1183*4882a593Smuzhiyun dev_dbg(ctodev(card), " <- %s\n", __func__);
1184*4882a593Smuzhiyun return 0;
1185*4882a593Smuzhiyun }
1186*4882a593Smuzhiyun
gelic_net_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)1187*4882a593Smuzhiyun void gelic_net_get_drvinfo(struct net_device *netdev,
1188*4882a593Smuzhiyun struct ethtool_drvinfo *info)
1189*4882a593Smuzhiyun {
1190*4882a593Smuzhiyun strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1191*4882a593Smuzhiyun strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1192*4882a593Smuzhiyun }
1193*4882a593Smuzhiyun
gelic_ether_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)1194*4882a593Smuzhiyun static int gelic_ether_get_link_ksettings(struct net_device *netdev,
1195*4882a593Smuzhiyun struct ethtool_link_ksettings *cmd)
1196*4882a593Smuzhiyun {
1197*4882a593Smuzhiyun struct gelic_card *card = netdev_card(netdev);
1198*4882a593Smuzhiyun u32 supported, advertising;
1199*4882a593Smuzhiyun
1200*4882a593Smuzhiyun gelic_card_get_ether_port_status(card, 0);
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun if (card->ether_port_status & GELIC_LV1_ETHER_FULL_DUPLEX)
1203*4882a593Smuzhiyun cmd->base.duplex = DUPLEX_FULL;
1204*4882a593Smuzhiyun else
1205*4882a593Smuzhiyun cmd->base.duplex = DUPLEX_HALF;
1206*4882a593Smuzhiyun
1207*4882a593Smuzhiyun switch (card->ether_port_status & GELIC_LV1_ETHER_SPEED_MASK) {
1208*4882a593Smuzhiyun case GELIC_LV1_ETHER_SPEED_10:
1209*4882a593Smuzhiyun cmd->base.speed = SPEED_10;
1210*4882a593Smuzhiyun break;
1211*4882a593Smuzhiyun case GELIC_LV1_ETHER_SPEED_100:
1212*4882a593Smuzhiyun cmd->base.speed = SPEED_100;
1213*4882a593Smuzhiyun break;
1214*4882a593Smuzhiyun case GELIC_LV1_ETHER_SPEED_1000:
1215*4882a593Smuzhiyun cmd->base.speed = SPEED_1000;
1216*4882a593Smuzhiyun break;
1217*4882a593Smuzhiyun default:
1218*4882a593Smuzhiyun pr_info("%s: speed unknown\n", __func__);
1219*4882a593Smuzhiyun cmd->base.speed = SPEED_10;
1220*4882a593Smuzhiyun break;
1221*4882a593Smuzhiyun }
1222*4882a593Smuzhiyun
1223*4882a593Smuzhiyun supported = SUPPORTED_TP | SUPPORTED_Autoneg |
1224*4882a593Smuzhiyun SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
1225*4882a593Smuzhiyun SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
1226*4882a593Smuzhiyun SUPPORTED_1000baseT_Full;
1227*4882a593Smuzhiyun advertising = supported;
1228*4882a593Smuzhiyun if (card->link_mode & GELIC_LV1_ETHER_AUTO_NEG) {
1229*4882a593Smuzhiyun cmd->base.autoneg = AUTONEG_ENABLE;
1230*4882a593Smuzhiyun } else {
1231*4882a593Smuzhiyun cmd->base.autoneg = AUTONEG_DISABLE;
1232*4882a593Smuzhiyun advertising &= ~ADVERTISED_Autoneg;
1233*4882a593Smuzhiyun }
1234*4882a593Smuzhiyun cmd->base.port = PORT_TP;
1235*4882a593Smuzhiyun
1236*4882a593Smuzhiyun ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
1237*4882a593Smuzhiyun supported);
1238*4882a593Smuzhiyun ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
1239*4882a593Smuzhiyun advertising);
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun return 0;
1242*4882a593Smuzhiyun }
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun static int
gelic_ether_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)1245*4882a593Smuzhiyun gelic_ether_set_link_ksettings(struct net_device *netdev,
1246*4882a593Smuzhiyun const struct ethtool_link_ksettings *cmd)
1247*4882a593Smuzhiyun {
1248*4882a593Smuzhiyun struct gelic_card *card = netdev_card(netdev);
1249*4882a593Smuzhiyun u64 mode;
1250*4882a593Smuzhiyun int ret;
1251*4882a593Smuzhiyun
1252*4882a593Smuzhiyun if (cmd->base.autoneg == AUTONEG_ENABLE) {
1253*4882a593Smuzhiyun mode = GELIC_LV1_ETHER_AUTO_NEG;
1254*4882a593Smuzhiyun } else {
1255*4882a593Smuzhiyun switch (cmd->base.speed) {
1256*4882a593Smuzhiyun case SPEED_10:
1257*4882a593Smuzhiyun mode = GELIC_LV1_ETHER_SPEED_10;
1258*4882a593Smuzhiyun break;
1259*4882a593Smuzhiyun case SPEED_100:
1260*4882a593Smuzhiyun mode = GELIC_LV1_ETHER_SPEED_100;
1261*4882a593Smuzhiyun break;
1262*4882a593Smuzhiyun case SPEED_1000:
1263*4882a593Smuzhiyun mode = GELIC_LV1_ETHER_SPEED_1000;
1264*4882a593Smuzhiyun break;
1265*4882a593Smuzhiyun default:
1266*4882a593Smuzhiyun return -EINVAL;
1267*4882a593Smuzhiyun }
1268*4882a593Smuzhiyun if (cmd->base.duplex == DUPLEX_FULL) {
1269*4882a593Smuzhiyun mode |= GELIC_LV1_ETHER_FULL_DUPLEX;
1270*4882a593Smuzhiyun } else if (cmd->base.speed == SPEED_1000) {
1271*4882a593Smuzhiyun pr_info("1000 half duplex is not supported.\n");
1272*4882a593Smuzhiyun return -EINVAL;
1273*4882a593Smuzhiyun }
1274*4882a593Smuzhiyun }
1275*4882a593Smuzhiyun
1276*4882a593Smuzhiyun ret = gelic_card_set_link_mode(card, mode);
1277*4882a593Smuzhiyun
1278*4882a593Smuzhiyun if (ret)
1279*4882a593Smuzhiyun return ret;
1280*4882a593Smuzhiyun
1281*4882a593Smuzhiyun return 0;
1282*4882a593Smuzhiyun }
1283*4882a593Smuzhiyun
gelic_net_get_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)1284*4882a593Smuzhiyun static void gelic_net_get_wol(struct net_device *netdev,
1285*4882a593Smuzhiyun struct ethtool_wolinfo *wol)
1286*4882a593Smuzhiyun {
1287*4882a593Smuzhiyun if (0 <= ps3_compare_firmware_version(2, 2, 0))
1288*4882a593Smuzhiyun wol->supported = WAKE_MAGIC;
1289*4882a593Smuzhiyun else
1290*4882a593Smuzhiyun wol->supported = 0;
1291*4882a593Smuzhiyun
1292*4882a593Smuzhiyun wol->wolopts = ps3_sys_manager_get_wol() ? wol->supported : 0;
1293*4882a593Smuzhiyun memset(&wol->sopass, 0, sizeof(wol->sopass));
1294*4882a593Smuzhiyun }
gelic_net_set_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)1295*4882a593Smuzhiyun static int gelic_net_set_wol(struct net_device *netdev,
1296*4882a593Smuzhiyun struct ethtool_wolinfo *wol)
1297*4882a593Smuzhiyun {
1298*4882a593Smuzhiyun int status;
1299*4882a593Smuzhiyun struct gelic_card *card;
1300*4882a593Smuzhiyun u64 v1, v2;
1301*4882a593Smuzhiyun
1302*4882a593Smuzhiyun if (ps3_compare_firmware_version(2, 2, 0) < 0 ||
1303*4882a593Smuzhiyun !capable(CAP_NET_ADMIN))
1304*4882a593Smuzhiyun return -EPERM;
1305*4882a593Smuzhiyun
1306*4882a593Smuzhiyun if (wol->wolopts & ~WAKE_MAGIC)
1307*4882a593Smuzhiyun return -EINVAL;
1308*4882a593Smuzhiyun
1309*4882a593Smuzhiyun card = netdev_card(netdev);
1310*4882a593Smuzhiyun if (wol->wolopts & WAKE_MAGIC) {
1311*4882a593Smuzhiyun status = lv1_net_control(bus_id(card), dev_id(card),
1312*4882a593Smuzhiyun GELIC_LV1_SET_WOL,
1313*4882a593Smuzhiyun GELIC_LV1_WOL_MAGIC_PACKET,
1314*4882a593Smuzhiyun 0, GELIC_LV1_WOL_MP_ENABLE,
1315*4882a593Smuzhiyun &v1, &v2);
1316*4882a593Smuzhiyun if (status) {
1317*4882a593Smuzhiyun pr_info("%s: enabling WOL failed %d\n", __func__,
1318*4882a593Smuzhiyun status);
1319*4882a593Smuzhiyun status = -EIO;
1320*4882a593Smuzhiyun goto done;
1321*4882a593Smuzhiyun }
1322*4882a593Smuzhiyun status = lv1_net_control(bus_id(card), dev_id(card),
1323*4882a593Smuzhiyun GELIC_LV1_SET_WOL,
1324*4882a593Smuzhiyun GELIC_LV1_WOL_ADD_MATCH_ADDR,
1325*4882a593Smuzhiyun 0, GELIC_LV1_WOL_MATCH_ALL,
1326*4882a593Smuzhiyun &v1, &v2);
1327*4882a593Smuzhiyun if (!status)
1328*4882a593Smuzhiyun ps3_sys_manager_set_wol(1);
1329*4882a593Smuzhiyun else {
1330*4882a593Smuzhiyun pr_info("%s: enabling WOL filter failed %d\n",
1331*4882a593Smuzhiyun __func__, status);
1332*4882a593Smuzhiyun status = -EIO;
1333*4882a593Smuzhiyun }
1334*4882a593Smuzhiyun } else {
1335*4882a593Smuzhiyun status = lv1_net_control(bus_id(card), dev_id(card),
1336*4882a593Smuzhiyun GELIC_LV1_SET_WOL,
1337*4882a593Smuzhiyun GELIC_LV1_WOL_MAGIC_PACKET,
1338*4882a593Smuzhiyun 0, GELIC_LV1_WOL_MP_DISABLE,
1339*4882a593Smuzhiyun &v1, &v2);
1340*4882a593Smuzhiyun if (status) {
1341*4882a593Smuzhiyun pr_info("%s: disabling WOL failed %d\n", __func__,
1342*4882a593Smuzhiyun status);
1343*4882a593Smuzhiyun status = -EIO;
1344*4882a593Smuzhiyun goto done;
1345*4882a593Smuzhiyun }
1346*4882a593Smuzhiyun status = lv1_net_control(bus_id(card), dev_id(card),
1347*4882a593Smuzhiyun GELIC_LV1_SET_WOL,
1348*4882a593Smuzhiyun GELIC_LV1_WOL_DELETE_MATCH_ADDR,
1349*4882a593Smuzhiyun 0, GELIC_LV1_WOL_MATCH_ALL,
1350*4882a593Smuzhiyun &v1, &v2);
1351*4882a593Smuzhiyun if (!status)
1352*4882a593Smuzhiyun ps3_sys_manager_set_wol(0);
1353*4882a593Smuzhiyun else {
1354*4882a593Smuzhiyun pr_info("%s: removing WOL filter failed %d\n",
1355*4882a593Smuzhiyun __func__, status);
1356*4882a593Smuzhiyun status = -EIO;
1357*4882a593Smuzhiyun }
1358*4882a593Smuzhiyun }
1359*4882a593Smuzhiyun done:
1360*4882a593Smuzhiyun return status;
1361*4882a593Smuzhiyun }
1362*4882a593Smuzhiyun
1363*4882a593Smuzhiyun static const struct ethtool_ops gelic_ether_ethtool_ops = {
1364*4882a593Smuzhiyun .get_drvinfo = gelic_net_get_drvinfo,
1365*4882a593Smuzhiyun .get_link = ethtool_op_get_link,
1366*4882a593Smuzhiyun .get_wol = gelic_net_get_wol,
1367*4882a593Smuzhiyun .set_wol = gelic_net_set_wol,
1368*4882a593Smuzhiyun .get_link_ksettings = gelic_ether_get_link_ksettings,
1369*4882a593Smuzhiyun .set_link_ksettings = gelic_ether_set_link_ksettings,
1370*4882a593Smuzhiyun };
1371*4882a593Smuzhiyun
1372*4882a593Smuzhiyun /**
1373*4882a593Smuzhiyun * gelic_net_tx_timeout_task - task scheduled by the watchdog timeout
1374*4882a593Smuzhiyun * function (to be called not under interrupt status)
1375*4882a593Smuzhiyun * @work: work is context of tx timout task
1376*4882a593Smuzhiyun *
1377*4882a593Smuzhiyun * called as task when tx hangs, resets interface (if interface is up)
1378*4882a593Smuzhiyun */
gelic_net_tx_timeout_task(struct work_struct * work)1379*4882a593Smuzhiyun static void gelic_net_tx_timeout_task(struct work_struct *work)
1380*4882a593Smuzhiyun {
1381*4882a593Smuzhiyun struct gelic_card *card =
1382*4882a593Smuzhiyun container_of(work, struct gelic_card, tx_timeout_task);
1383*4882a593Smuzhiyun struct net_device *netdev = card->netdev[GELIC_PORT_ETHERNET_0];
1384*4882a593Smuzhiyun
1385*4882a593Smuzhiyun dev_info(ctodev(card), "%s:Timed out. Restarting...\n", __func__);
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun if (!(netdev->flags & IFF_UP))
1388*4882a593Smuzhiyun goto out;
1389*4882a593Smuzhiyun
1390*4882a593Smuzhiyun netif_device_detach(netdev);
1391*4882a593Smuzhiyun gelic_net_stop(netdev);
1392*4882a593Smuzhiyun
1393*4882a593Smuzhiyun gelic_net_open(netdev);
1394*4882a593Smuzhiyun netif_device_attach(netdev);
1395*4882a593Smuzhiyun
1396*4882a593Smuzhiyun out:
1397*4882a593Smuzhiyun atomic_dec(&card->tx_timeout_task_counter);
1398*4882a593Smuzhiyun }
1399*4882a593Smuzhiyun
1400*4882a593Smuzhiyun /**
1401*4882a593Smuzhiyun * gelic_net_tx_timeout - called when the tx timeout watchdog kicks in.
1402*4882a593Smuzhiyun * @netdev: interface device structure
1403*4882a593Smuzhiyun *
1404*4882a593Smuzhiyun * called, if tx hangs. Schedules a task that resets the interface
1405*4882a593Smuzhiyun */
gelic_net_tx_timeout(struct net_device * netdev,unsigned int txqueue)1406*4882a593Smuzhiyun void gelic_net_tx_timeout(struct net_device *netdev, unsigned int txqueue)
1407*4882a593Smuzhiyun {
1408*4882a593Smuzhiyun struct gelic_card *card;
1409*4882a593Smuzhiyun
1410*4882a593Smuzhiyun card = netdev_card(netdev);
1411*4882a593Smuzhiyun atomic_inc(&card->tx_timeout_task_counter);
1412*4882a593Smuzhiyun if (netdev->flags & IFF_UP)
1413*4882a593Smuzhiyun schedule_work(&card->tx_timeout_task);
1414*4882a593Smuzhiyun else
1415*4882a593Smuzhiyun atomic_dec(&card->tx_timeout_task_counter);
1416*4882a593Smuzhiyun }
1417*4882a593Smuzhiyun
1418*4882a593Smuzhiyun static const struct net_device_ops gelic_netdevice_ops = {
1419*4882a593Smuzhiyun .ndo_open = gelic_net_open,
1420*4882a593Smuzhiyun .ndo_stop = gelic_net_stop,
1421*4882a593Smuzhiyun .ndo_start_xmit = gelic_net_xmit,
1422*4882a593Smuzhiyun .ndo_set_rx_mode = gelic_net_set_multi,
1423*4882a593Smuzhiyun .ndo_tx_timeout = gelic_net_tx_timeout,
1424*4882a593Smuzhiyun .ndo_set_mac_address = eth_mac_addr,
1425*4882a593Smuzhiyun .ndo_validate_addr = eth_validate_addr,
1426*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
1427*4882a593Smuzhiyun .ndo_poll_controller = gelic_net_poll_controller,
1428*4882a593Smuzhiyun #endif
1429*4882a593Smuzhiyun };
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun /**
1432*4882a593Smuzhiyun * gelic_ether_setup_netdev_ops - initialization of net_device operations
1433*4882a593Smuzhiyun * @netdev: net_device structure
1434*4882a593Smuzhiyun *
1435*4882a593Smuzhiyun * fills out function pointers in the net_device structure
1436*4882a593Smuzhiyun */
gelic_ether_setup_netdev_ops(struct net_device * netdev,struct napi_struct * napi)1437*4882a593Smuzhiyun static void gelic_ether_setup_netdev_ops(struct net_device *netdev,
1438*4882a593Smuzhiyun struct napi_struct *napi)
1439*4882a593Smuzhiyun {
1440*4882a593Smuzhiyun netdev->watchdog_timeo = GELIC_NET_WATCHDOG_TIMEOUT;
1441*4882a593Smuzhiyun /* NAPI */
1442*4882a593Smuzhiyun netif_napi_add(netdev, napi, gelic_net_poll, NAPI_POLL_WEIGHT);
1443*4882a593Smuzhiyun netdev->ethtool_ops = &gelic_ether_ethtool_ops;
1444*4882a593Smuzhiyun netdev->netdev_ops = &gelic_netdevice_ops;
1445*4882a593Smuzhiyun }
1446*4882a593Smuzhiyun
1447*4882a593Smuzhiyun /**
1448*4882a593Smuzhiyun * gelic_ether_setup_netdev - initialization of net_device
1449*4882a593Smuzhiyun * @netdev: net_device structure
1450*4882a593Smuzhiyun * @card: card structure
1451*4882a593Smuzhiyun *
1452*4882a593Smuzhiyun * Returns 0 on success or <0 on failure
1453*4882a593Smuzhiyun *
1454*4882a593Smuzhiyun * gelic_ether_setup_netdev initializes the net_device structure
1455*4882a593Smuzhiyun * and register it.
1456*4882a593Smuzhiyun **/
gelic_net_setup_netdev(struct net_device * netdev,struct gelic_card * card)1457*4882a593Smuzhiyun int gelic_net_setup_netdev(struct net_device *netdev, struct gelic_card *card)
1458*4882a593Smuzhiyun {
1459*4882a593Smuzhiyun int status;
1460*4882a593Smuzhiyun u64 v1, v2;
1461*4882a593Smuzhiyun
1462*4882a593Smuzhiyun netdev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM;
1463*4882a593Smuzhiyun
1464*4882a593Smuzhiyun netdev->features = NETIF_F_IP_CSUM;
1465*4882a593Smuzhiyun if (GELIC_CARD_RX_CSUM_DEFAULT)
1466*4882a593Smuzhiyun netdev->features |= NETIF_F_RXCSUM;
1467*4882a593Smuzhiyun
1468*4882a593Smuzhiyun status = lv1_net_control(bus_id(card), dev_id(card),
1469*4882a593Smuzhiyun GELIC_LV1_GET_MAC_ADDRESS,
1470*4882a593Smuzhiyun 0, 0, 0, &v1, &v2);
1471*4882a593Smuzhiyun v1 <<= 16;
1472*4882a593Smuzhiyun if (status || !is_valid_ether_addr((u8 *)&v1)) {
1473*4882a593Smuzhiyun dev_info(ctodev(card),
1474*4882a593Smuzhiyun "%s:lv1_net_control GET_MAC_ADDR failed %d\n",
1475*4882a593Smuzhiyun __func__, status);
1476*4882a593Smuzhiyun return -EINVAL;
1477*4882a593Smuzhiyun }
1478*4882a593Smuzhiyun memcpy(netdev->dev_addr, &v1, ETH_ALEN);
1479*4882a593Smuzhiyun
1480*4882a593Smuzhiyun if (card->vlan_required) {
1481*4882a593Smuzhiyun netdev->hard_header_len += VLAN_HLEN;
1482*4882a593Smuzhiyun /*
1483*4882a593Smuzhiyun * As vlan is internally used,
1484*4882a593Smuzhiyun * we can not receive vlan packets
1485*4882a593Smuzhiyun */
1486*4882a593Smuzhiyun netdev->features |= NETIF_F_VLAN_CHALLENGED;
1487*4882a593Smuzhiyun }
1488*4882a593Smuzhiyun
1489*4882a593Smuzhiyun /* MTU range: 64 - 1518 */
1490*4882a593Smuzhiyun netdev->min_mtu = GELIC_NET_MIN_MTU;
1491*4882a593Smuzhiyun netdev->max_mtu = GELIC_NET_MAX_MTU;
1492*4882a593Smuzhiyun
1493*4882a593Smuzhiyun status = register_netdev(netdev);
1494*4882a593Smuzhiyun if (status) {
1495*4882a593Smuzhiyun dev_err(ctodev(card), "%s:Couldn't register %s %d\n",
1496*4882a593Smuzhiyun __func__, netdev->name, status);
1497*4882a593Smuzhiyun return status;
1498*4882a593Smuzhiyun }
1499*4882a593Smuzhiyun dev_info(ctodev(card), "%s: MAC addr %pM\n",
1500*4882a593Smuzhiyun netdev->name, netdev->dev_addr);
1501*4882a593Smuzhiyun
1502*4882a593Smuzhiyun return 0;
1503*4882a593Smuzhiyun }
1504*4882a593Smuzhiyun
1505*4882a593Smuzhiyun /**
1506*4882a593Smuzhiyun * gelic_alloc_card_net - allocates net_device and card structure
1507*4882a593Smuzhiyun *
1508*4882a593Smuzhiyun * returns the card structure or NULL in case of errors
1509*4882a593Smuzhiyun *
1510*4882a593Smuzhiyun * the card and net_device structures are linked to each other
1511*4882a593Smuzhiyun */
1512*4882a593Smuzhiyun #define GELIC_ALIGN (32)
gelic_alloc_card_net(struct net_device ** netdev)1513*4882a593Smuzhiyun static struct gelic_card *gelic_alloc_card_net(struct net_device **netdev)
1514*4882a593Smuzhiyun {
1515*4882a593Smuzhiyun struct gelic_card *card;
1516*4882a593Smuzhiyun struct gelic_port *port;
1517*4882a593Smuzhiyun void *p;
1518*4882a593Smuzhiyun size_t alloc_size;
1519*4882a593Smuzhiyun /*
1520*4882a593Smuzhiyun * gelic requires dma descriptor is 32 bytes aligned and
1521*4882a593Smuzhiyun * the hypervisor requires irq_status is 8 bytes aligned.
1522*4882a593Smuzhiyun */
1523*4882a593Smuzhiyun BUILD_BUG_ON(offsetof(struct gelic_card, irq_status) % 8);
1524*4882a593Smuzhiyun BUILD_BUG_ON(offsetof(struct gelic_card, descr) % 32);
1525*4882a593Smuzhiyun alloc_size =
1526*4882a593Smuzhiyun sizeof(struct gelic_card) +
1527*4882a593Smuzhiyun sizeof(struct gelic_descr) * GELIC_NET_RX_DESCRIPTORS +
1528*4882a593Smuzhiyun sizeof(struct gelic_descr) * GELIC_NET_TX_DESCRIPTORS +
1529*4882a593Smuzhiyun GELIC_ALIGN - 1;
1530*4882a593Smuzhiyun
1531*4882a593Smuzhiyun p = kzalloc(alloc_size, GFP_KERNEL);
1532*4882a593Smuzhiyun if (!p)
1533*4882a593Smuzhiyun return NULL;
1534*4882a593Smuzhiyun card = PTR_ALIGN(p, GELIC_ALIGN);
1535*4882a593Smuzhiyun card->unalign = p;
1536*4882a593Smuzhiyun
1537*4882a593Smuzhiyun /*
1538*4882a593Smuzhiyun * alloc netdev
1539*4882a593Smuzhiyun */
1540*4882a593Smuzhiyun *netdev = alloc_etherdev(sizeof(struct gelic_port));
1541*4882a593Smuzhiyun if (!*netdev) {
1542*4882a593Smuzhiyun kfree(card->unalign);
1543*4882a593Smuzhiyun return NULL;
1544*4882a593Smuzhiyun }
1545*4882a593Smuzhiyun port = netdev_priv(*netdev);
1546*4882a593Smuzhiyun
1547*4882a593Smuzhiyun /* gelic_port */
1548*4882a593Smuzhiyun port->netdev = *netdev;
1549*4882a593Smuzhiyun port->card = card;
1550*4882a593Smuzhiyun port->type = GELIC_PORT_ETHERNET_0;
1551*4882a593Smuzhiyun
1552*4882a593Smuzhiyun /* gelic_card */
1553*4882a593Smuzhiyun card->netdev[GELIC_PORT_ETHERNET_0] = *netdev;
1554*4882a593Smuzhiyun
1555*4882a593Smuzhiyun INIT_WORK(&card->tx_timeout_task, gelic_net_tx_timeout_task);
1556*4882a593Smuzhiyun init_waitqueue_head(&card->waitq);
1557*4882a593Smuzhiyun atomic_set(&card->tx_timeout_task_counter, 0);
1558*4882a593Smuzhiyun mutex_init(&card->updown_lock);
1559*4882a593Smuzhiyun atomic_set(&card->users, 0);
1560*4882a593Smuzhiyun
1561*4882a593Smuzhiyun return card;
1562*4882a593Smuzhiyun }
1563*4882a593Smuzhiyun
gelic_card_get_vlan_info(struct gelic_card * card)1564*4882a593Smuzhiyun static void gelic_card_get_vlan_info(struct gelic_card *card)
1565*4882a593Smuzhiyun {
1566*4882a593Smuzhiyun u64 v1, v2;
1567*4882a593Smuzhiyun int status;
1568*4882a593Smuzhiyun unsigned int i;
1569*4882a593Smuzhiyun struct {
1570*4882a593Smuzhiyun int tx;
1571*4882a593Smuzhiyun int rx;
1572*4882a593Smuzhiyun } vlan_id_ix[2] = {
1573*4882a593Smuzhiyun [GELIC_PORT_ETHERNET_0] = {
1574*4882a593Smuzhiyun .tx = GELIC_LV1_VLAN_TX_ETHERNET_0,
1575*4882a593Smuzhiyun .rx = GELIC_LV1_VLAN_RX_ETHERNET_0
1576*4882a593Smuzhiyun },
1577*4882a593Smuzhiyun [GELIC_PORT_WIRELESS] = {
1578*4882a593Smuzhiyun .tx = GELIC_LV1_VLAN_TX_WIRELESS,
1579*4882a593Smuzhiyun .rx = GELIC_LV1_VLAN_RX_WIRELESS
1580*4882a593Smuzhiyun }
1581*4882a593Smuzhiyun };
1582*4882a593Smuzhiyun
1583*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vlan_id_ix); i++) {
1584*4882a593Smuzhiyun /* tx tag */
1585*4882a593Smuzhiyun status = lv1_net_control(bus_id(card), dev_id(card),
1586*4882a593Smuzhiyun GELIC_LV1_GET_VLAN_ID,
1587*4882a593Smuzhiyun vlan_id_ix[i].tx,
1588*4882a593Smuzhiyun 0, 0, &v1, &v2);
1589*4882a593Smuzhiyun if (status || !v1) {
1590*4882a593Smuzhiyun if (status != LV1_NO_ENTRY)
1591*4882a593Smuzhiyun dev_dbg(ctodev(card),
1592*4882a593Smuzhiyun "get vlan id for tx(%d) failed(%d)\n",
1593*4882a593Smuzhiyun vlan_id_ix[i].tx, status);
1594*4882a593Smuzhiyun card->vlan[i].tx = 0;
1595*4882a593Smuzhiyun card->vlan[i].rx = 0;
1596*4882a593Smuzhiyun continue;
1597*4882a593Smuzhiyun }
1598*4882a593Smuzhiyun card->vlan[i].tx = (u16)v1;
1599*4882a593Smuzhiyun
1600*4882a593Smuzhiyun /* rx tag */
1601*4882a593Smuzhiyun status = lv1_net_control(bus_id(card), dev_id(card),
1602*4882a593Smuzhiyun GELIC_LV1_GET_VLAN_ID,
1603*4882a593Smuzhiyun vlan_id_ix[i].rx,
1604*4882a593Smuzhiyun 0, 0, &v1, &v2);
1605*4882a593Smuzhiyun if (status || !v1) {
1606*4882a593Smuzhiyun if (status != LV1_NO_ENTRY)
1607*4882a593Smuzhiyun dev_info(ctodev(card),
1608*4882a593Smuzhiyun "get vlan id for rx(%d) failed(%d)\n",
1609*4882a593Smuzhiyun vlan_id_ix[i].rx, status);
1610*4882a593Smuzhiyun card->vlan[i].tx = 0;
1611*4882a593Smuzhiyun card->vlan[i].rx = 0;
1612*4882a593Smuzhiyun continue;
1613*4882a593Smuzhiyun }
1614*4882a593Smuzhiyun card->vlan[i].rx = (u16)v1;
1615*4882a593Smuzhiyun
1616*4882a593Smuzhiyun dev_dbg(ctodev(card), "vlan_id[%d] tx=%02x rx=%02x\n",
1617*4882a593Smuzhiyun i, card->vlan[i].tx, card->vlan[i].rx);
1618*4882a593Smuzhiyun }
1619*4882a593Smuzhiyun
1620*4882a593Smuzhiyun if (card->vlan[GELIC_PORT_ETHERNET_0].tx) {
1621*4882a593Smuzhiyun BUG_ON(!card->vlan[GELIC_PORT_WIRELESS].tx);
1622*4882a593Smuzhiyun card->vlan_required = 1;
1623*4882a593Smuzhiyun } else
1624*4882a593Smuzhiyun card->vlan_required = 0;
1625*4882a593Smuzhiyun
1626*4882a593Smuzhiyun /* check wirelss capable firmware */
1627*4882a593Smuzhiyun if (ps3_compare_firmware_version(1, 6, 0) < 0) {
1628*4882a593Smuzhiyun card->vlan[GELIC_PORT_WIRELESS].tx = 0;
1629*4882a593Smuzhiyun card->vlan[GELIC_PORT_WIRELESS].rx = 0;
1630*4882a593Smuzhiyun }
1631*4882a593Smuzhiyun
1632*4882a593Smuzhiyun dev_info(ctodev(card), "internal vlan %s\n",
1633*4882a593Smuzhiyun card->vlan_required? "enabled" : "disabled");
1634*4882a593Smuzhiyun }
1635*4882a593Smuzhiyun /**
1636*4882a593Smuzhiyun * ps3_gelic_driver_probe - add a device to the control of this driver
1637*4882a593Smuzhiyun */
ps3_gelic_driver_probe(struct ps3_system_bus_device * dev)1638*4882a593Smuzhiyun static int ps3_gelic_driver_probe(struct ps3_system_bus_device *dev)
1639*4882a593Smuzhiyun {
1640*4882a593Smuzhiyun struct gelic_card *card;
1641*4882a593Smuzhiyun struct net_device *netdev;
1642*4882a593Smuzhiyun int result;
1643*4882a593Smuzhiyun
1644*4882a593Smuzhiyun pr_debug("%s: called\n", __func__);
1645*4882a593Smuzhiyun
1646*4882a593Smuzhiyun udbg_shutdown_ps3gelic();
1647*4882a593Smuzhiyun
1648*4882a593Smuzhiyun result = ps3_open_hv_device(dev);
1649*4882a593Smuzhiyun
1650*4882a593Smuzhiyun if (result) {
1651*4882a593Smuzhiyun dev_dbg(&dev->core, "%s:ps3_open_hv_device failed\n",
1652*4882a593Smuzhiyun __func__);
1653*4882a593Smuzhiyun goto fail_open;
1654*4882a593Smuzhiyun }
1655*4882a593Smuzhiyun
1656*4882a593Smuzhiyun result = ps3_dma_region_create(dev->d_region);
1657*4882a593Smuzhiyun
1658*4882a593Smuzhiyun if (result) {
1659*4882a593Smuzhiyun dev_dbg(&dev->core, "%s:ps3_dma_region_create failed(%d)\n",
1660*4882a593Smuzhiyun __func__, result);
1661*4882a593Smuzhiyun BUG_ON("check region type");
1662*4882a593Smuzhiyun goto fail_dma_region;
1663*4882a593Smuzhiyun }
1664*4882a593Smuzhiyun
1665*4882a593Smuzhiyun /* alloc card/netdevice */
1666*4882a593Smuzhiyun card = gelic_alloc_card_net(&netdev);
1667*4882a593Smuzhiyun if (!card) {
1668*4882a593Smuzhiyun dev_info(&dev->core, "%s:gelic_net_alloc_card failed\n",
1669*4882a593Smuzhiyun __func__);
1670*4882a593Smuzhiyun result = -ENOMEM;
1671*4882a593Smuzhiyun goto fail_alloc_card;
1672*4882a593Smuzhiyun }
1673*4882a593Smuzhiyun ps3_system_bus_set_drvdata(dev, card);
1674*4882a593Smuzhiyun card->dev = dev;
1675*4882a593Smuzhiyun
1676*4882a593Smuzhiyun /* get internal vlan info */
1677*4882a593Smuzhiyun gelic_card_get_vlan_info(card);
1678*4882a593Smuzhiyun
1679*4882a593Smuzhiyun card->link_mode = GELIC_LV1_ETHER_AUTO_NEG;
1680*4882a593Smuzhiyun
1681*4882a593Smuzhiyun /* setup interrupt */
1682*4882a593Smuzhiyun result = lv1_net_set_interrupt_status_indicator(bus_id(card),
1683*4882a593Smuzhiyun dev_id(card),
1684*4882a593Smuzhiyun ps3_mm_phys_to_lpar(__pa(&card->irq_status)),
1685*4882a593Smuzhiyun 0);
1686*4882a593Smuzhiyun
1687*4882a593Smuzhiyun if (result) {
1688*4882a593Smuzhiyun dev_dbg(&dev->core,
1689*4882a593Smuzhiyun "%s:set_interrupt_status_indicator failed: %s\n",
1690*4882a593Smuzhiyun __func__, ps3_result(result));
1691*4882a593Smuzhiyun result = -EIO;
1692*4882a593Smuzhiyun goto fail_status_indicator;
1693*4882a593Smuzhiyun }
1694*4882a593Smuzhiyun
1695*4882a593Smuzhiyun result = ps3_sb_event_receive_port_setup(dev, PS3_BINDING_CPU_ANY,
1696*4882a593Smuzhiyun &card->irq);
1697*4882a593Smuzhiyun
1698*4882a593Smuzhiyun if (result) {
1699*4882a593Smuzhiyun dev_info(ctodev(card),
1700*4882a593Smuzhiyun "%s:gelic_net_open_device failed (%d)\n",
1701*4882a593Smuzhiyun __func__, result);
1702*4882a593Smuzhiyun result = -EPERM;
1703*4882a593Smuzhiyun goto fail_alloc_irq;
1704*4882a593Smuzhiyun }
1705*4882a593Smuzhiyun result = request_irq(card->irq, gelic_card_interrupt,
1706*4882a593Smuzhiyun 0, netdev->name, card);
1707*4882a593Smuzhiyun
1708*4882a593Smuzhiyun if (result) {
1709*4882a593Smuzhiyun dev_info(ctodev(card), "%s:request_irq failed (%d)\n",
1710*4882a593Smuzhiyun __func__, result);
1711*4882a593Smuzhiyun goto fail_request_irq;
1712*4882a593Smuzhiyun }
1713*4882a593Smuzhiyun
1714*4882a593Smuzhiyun /* setup card structure */
1715*4882a593Smuzhiyun card->irq_mask = GELIC_CARD_RXINT | GELIC_CARD_TXINT |
1716*4882a593Smuzhiyun GELIC_CARD_PORT_STATUS_CHANGED;
1717*4882a593Smuzhiyun
1718*4882a593Smuzhiyun
1719*4882a593Smuzhiyun result = gelic_card_init_chain(card, &card->tx_chain,
1720*4882a593Smuzhiyun card->descr, GELIC_NET_TX_DESCRIPTORS);
1721*4882a593Smuzhiyun if (result)
1722*4882a593Smuzhiyun goto fail_alloc_tx;
1723*4882a593Smuzhiyun result = gelic_card_init_chain(card, &card->rx_chain,
1724*4882a593Smuzhiyun card->descr + GELIC_NET_TX_DESCRIPTORS,
1725*4882a593Smuzhiyun GELIC_NET_RX_DESCRIPTORS);
1726*4882a593Smuzhiyun if (result)
1727*4882a593Smuzhiyun goto fail_alloc_rx;
1728*4882a593Smuzhiyun
1729*4882a593Smuzhiyun /* head of chain */
1730*4882a593Smuzhiyun card->tx_top = card->tx_chain.head;
1731*4882a593Smuzhiyun card->rx_top = card->rx_chain.head;
1732*4882a593Smuzhiyun dev_dbg(ctodev(card), "descr rx %p, tx %p, size %#lx, num %#x\n",
1733*4882a593Smuzhiyun card->rx_top, card->tx_top, sizeof(struct gelic_descr),
1734*4882a593Smuzhiyun GELIC_NET_RX_DESCRIPTORS);
1735*4882a593Smuzhiyun /* allocate rx skbs */
1736*4882a593Smuzhiyun result = gelic_card_alloc_rx_skbs(card);
1737*4882a593Smuzhiyun if (result)
1738*4882a593Smuzhiyun goto fail_alloc_skbs;
1739*4882a593Smuzhiyun
1740*4882a593Smuzhiyun spin_lock_init(&card->tx_lock);
1741*4882a593Smuzhiyun card->tx_dma_progress = 0;
1742*4882a593Smuzhiyun
1743*4882a593Smuzhiyun /* setup net_device structure */
1744*4882a593Smuzhiyun netdev->irq = card->irq;
1745*4882a593Smuzhiyun SET_NETDEV_DEV(netdev, &card->dev->core);
1746*4882a593Smuzhiyun gelic_ether_setup_netdev_ops(netdev, &card->napi);
1747*4882a593Smuzhiyun result = gelic_net_setup_netdev(netdev, card);
1748*4882a593Smuzhiyun if (result) {
1749*4882a593Smuzhiyun dev_dbg(&dev->core, "%s: setup_netdev failed %d\n",
1750*4882a593Smuzhiyun __func__, result);
1751*4882a593Smuzhiyun goto fail_setup_netdev;
1752*4882a593Smuzhiyun }
1753*4882a593Smuzhiyun
1754*4882a593Smuzhiyun #ifdef CONFIG_GELIC_WIRELESS
1755*4882a593Smuzhiyun result = gelic_wl_driver_probe(card);
1756*4882a593Smuzhiyun if (result) {
1757*4882a593Smuzhiyun dev_dbg(&dev->core, "%s: WL init failed\n", __func__);
1758*4882a593Smuzhiyun goto fail_setup_netdev;
1759*4882a593Smuzhiyun }
1760*4882a593Smuzhiyun #endif
1761*4882a593Smuzhiyun pr_debug("%s: done\n", __func__);
1762*4882a593Smuzhiyun return 0;
1763*4882a593Smuzhiyun
1764*4882a593Smuzhiyun fail_setup_netdev:
1765*4882a593Smuzhiyun fail_alloc_skbs:
1766*4882a593Smuzhiyun gelic_card_free_chain(card, card->rx_chain.head);
1767*4882a593Smuzhiyun fail_alloc_rx:
1768*4882a593Smuzhiyun gelic_card_free_chain(card, card->tx_chain.head);
1769*4882a593Smuzhiyun fail_alloc_tx:
1770*4882a593Smuzhiyun free_irq(card->irq, card);
1771*4882a593Smuzhiyun netdev->irq = 0;
1772*4882a593Smuzhiyun fail_request_irq:
1773*4882a593Smuzhiyun ps3_sb_event_receive_port_destroy(dev, card->irq);
1774*4882a593Smuzhiyun fail_alloc_irq:
1775*4882a593Smuzhiyun lv1_net_set_interrupt_status_indicator(bus_id(card),
1776*4882a593Smuzhiyun bus_id(card),
1777*4882a593Smuzhiyun 0, 0);
1778*4882a593Smuzhiyun fail_status_indicator:
1779*4882a593Smuzhiyun ps3_system_bus_set_drvdata(dev, NULL);
1780*4882a593Smuzhiyun kfree(netdev_card(netdev)->unalign);
1781*4882a593Smuzhiyun free_netdev(netdev);
1782*4882a593Smuzhiyun fail_alloc_card:
1783*4882a593Smuzhiyun ps3_dma_region_free(dev->d_region);
1784*4882a593Smuzhiyun fail_dma_region:
1785*4882a593Smuzhiyun ps3_close_hv_device(dev);
1786*4882a593Smuzhiyun fail_open:
1787*4882a593Smuzhiyun return result;
1788*4882a593Smuzhiyun }
1789*4882a593Smuzhiyun
1790*4882a593Smuzhiyun /**
1791*4882a593Smuzhiyun * ps3_gelic_driver_remove - remove a device from the control of this driver
1792*4882a593Smuzhiyun */
1793*4882a593Smuzhiyun
ps3_gelic_driver_remove(struct ps3_system_bus_device * dev)1794*4882a593Smuzhiyun static int ps3_gelic_driver_remove(struct ps3_system_bus_device *dev)
1795*4882a593Smuzhiyun {
1796*4882a593Smuzhiyun struct gelic_card *card = ps3_system_bus_get_drvdata(dev);
1797*4882a593Smuzhiyun struct net_device *netdev0;
1798*4882a593Smuzhiyun pr_debug("%s: called\n", __func__);
1799*4882a593Smuzhiyun
1800*4882a593Smuzhiyun /* set auto-negotiation */
1801*4882a593Smuzhiyun gelic_card_set_link_mode(card, GELIC_LV1_ETHER_AUTO_NEG);
1802*4882a593Smuzhiyun
1803*4882a593Smuzhiyun #ifdef CONFIG_GELIC_WIRELESS
1804*4882a593Smuzhiyun gelic_wl_driver_remove(card);
1805*4882a593Smuzhiyun #endif
1806*4882a593Smuzhiyun /* stop interrupt */
1807*4882a593Smuzhiyun gelic_card_set_irq_mask(card, 0);
1808*4882a593Smuzhiyun
1809*4882a593Smuzhiyun /* turn off DMA, force end */
1810*4882a593Smuzhiyun gelic_card_disable_rxdmac(card);
1811*4882a593Smuzhiyun gelic_card_disable_txdmac(card);
1812*4882a593Smuzhiyun
1813*4882a593Smuzhiyun /* release chains */
1814*4882a593Smuzhiyun gelic_card_release_tx_chain(card, 1);
1815*4882a593Smuzhiyun gelic_card_release_rx_chain(card);
1816*4882a593Smuzhiyun
1817*4882a593Smuzhiyun gelic_card_free_chain(card, card->tx_top);
1818*4882a593Smuzhiyun gelic_card_free_chain(card, card->rx_top);
1819*4882a593Smuzhiyun
1820*4882a593Smuzhiyun netdev0 = card->netdev[GELIC_PORT_ETHERNET_0];
1821*4882a593Smuzhiyun /* disconnect event port */
1822*4882a593Smuzhiyun free_irq(card->irq, card);
1823*4882a593Smuzhiyun netdev0->irq = 0;
1824*4882a593Smuzhiyun ps3_sb_event_receive_port_destroy(card->dev, card->irq);
1825*4882a593Smuzhiyun
1826*4882a593Smuzhiyun wait_event(card->waitq,
1827*4882a593Smuzhiyun atomic_read(&card->tx_timeout_task_counter) == 0);
1828*4882a593Smuzhiyun
1829*4882a593Smuzhiyun lv1_net_set_interrupt_status_indicator(bus_id(card), dev_id(card),
1830*4882a593Smuzhiyun 0 , 0);
1831*4882a593Smuzhiyun
1832*4882a593Smuzhiyun unregister_netdev(netdev0);
1833*4882a593Smuzhiyun kfree(netdev_card(netdev0)->unalign);
1834*4882a593Smuzhiyun free_netdev(netdev0);
1835*4882a593Smuzhiyun
1836*4882a593Smuzhiyun ps3_system_bus_set_drvdata(dev, NULL);
1837*4882a593Smuzhiyun
1838*4882a593Smuzhiyun ps3_dma_region_free(dev->d_region);
1839*4882a593Smuzhiyun
1840*4882a593Smuzhiyun ps3_close_hv_device(dev);
1841*4882a593Smuzhiyun
1842*4882a593Smuzhiyun pr_debug("%s: done\n", __func__);
1843*4882a593Smuzhiyun return 0;
1844*4882a593Smuzhiyun }
1845*4882a593Smuzhiyun
1846*4882a593Smuzhiyun static struct ps3_system_bus_driver ps3_gelic_driver = {
1847*4882a593Smuzhiyun .match_id = PS3_MATCH_ID_GELIC,
1848*4882a593Smuzhiyun .probe = ps3_gelic_driver_probe,
1849*4882a593Smuzhiyun .remove = ps3_gelic_driver_remove,
1850*4882a593Smuzhiyun .shutdown = ps3_gelic_driver_remove,
1851*4882a593Smuzhiyun .core.name = "ps3_gelic_driver",
1852*4882a593Smuzhiyun .core.owner = THIS_MODULE,
1853*4882a593Smuzhiyun };
1854*4882a593Smuzhiyun
ps3_gelic_driver_init(void)1855*4882a593Smuzhiyun static int __init ps3_gelic_driver_init (void)
1856*4882a593Smuzhiyun {
1857*4882a593Smuzhiyun return firmware_has_feature(FW_FEATURE_PS3_LV1)
1858*4882a593Smuzhiyun ? ps3_system_bus_driver_register(&ps3_gelic_driver)
1859*4882a593Smuzhiyun : -ENODEV;
1860*4882a593Smuzhiyun }
1861*4882a593Smuzhiyun
ps3_gelic_driver_exit(void)1862*4882a593Smuzhiyun static void __exit ps3_gelic_driver_exit (void)
1863*4882a593Smuzhiyun {
1864*4882a593Smuzhiyun ps3_system_bus_driver_unregister(&ps3_gelic_driver);
1865*4882a593Smuzhiyun }
1866*4882a593Smuzhiyun
1867*4882a593Smuzhiyun module_init(ps3_gelic_driver_init);
1868*4882a593Smuzhiyun module_exit(ps3_gelic_driver_exit);
1869*4882a593Smuzhiyun
1870*4882a593Smuzhiyun MODULE_ALIAS(PS3_MODULE_ALIAS_GELIC);
1871*4882a593Smuzhiyun
1872