xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/ti/k3-cppi-desc-pool.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* TI K3 CPPI5 descriptors pool API
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/device.h>
10*4882a593Smuzhiyun #include <linux/dma-mapping.h>
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/genalloc.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include "k3-cppi-desc-pool.h"
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun struct k3_cppi_desc_pool {
18*4882a593Smuzhiyun 	struct device		*dev;
19*4882a593Smuzhiyun 	dma_addr_t		dma_addr;
20*4882a593Smuzhiyun 	void			*cpumem;	/* dma_alloc map */
21*4882a593Smuzhiyun 	size_t			desc_size;
22*4882a593Smuzhiyun 	size_t			mem_size;
23*4882a593Smuzhiyun 	size_t			num_desc;
24*4882a593Smuzhiyun 	struct gen_pool		*gen_pool;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun 
k3_cppi_desc_pool_destroy(struct k3_cppi_desc_pool * pool)27*4882a593Smuzhiyun void k3_cppi_desc_pool_destroy(struct k3_cppi_desc_pool *pool)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun 	if (!pool)
30*4882a593Smuzhiyun 		return;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	WARN(gen_pool_size(pool->gen_pool) != gen_pool_avail(pool->gen_pool),
33*4882a593Smuzhiyun 	     "k3_knav_desc_pool size %zu != avail %zu",
34*4882a593Smuzhiyun 	     gen_pool_size(pool->gen_pool),
35*4882a593Smuzhiyun 	     gen_pool_avail(pool->gen_pool));
36*4882a593Smuzhiyun 	if (pool->cpumem)
37*4882a593Smuzhiyun 		dma_free_coherent(pool->dev, pool->mem_size, pool->cpumem,
38*4882a593Smuzhiyun 				  pool->dma_addr);
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	gen_pool_destroy(pool->gen_pool);	/* frees pool->name */
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun struct k3_cppi_desc_pool *
k3_cppi_desc_pool_create_name(struct device * dev,size_t size,size_t desc_size,const char * name)44*4882a593Smuzhiyun k3_cppi_desc_pool_create_name(struct device *dev, size_t size,
45*4882a593Smuzhiyun 			      size_t desc_size,
46*4882a593Smuzhiyun 			      const char *name)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	struct k3_cppi_desc_pool *pool;
49*4882a593Smuzhiyun 	const char *pool_name = NULL;
50*4882a593Smuzhiyun 	int ret = -ENOMEM;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	pool = devm_kzalloc(dev, sizeof(*pool), GFP_KERNEL);
53*4882a593Smuzhiyun 	if (!pool)
54*4882a593Smuzhiyun 		return ERR_PTR(ret);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	pool->dev = dev;
57*4882a593Smuzhiyun 	pool->desc_size	= roundup_pow_of_two(desc_size);
58*4882a593Smuzhiyun 	pool->num_desc	= size;
59*4882a593Smuzhiyun 	pool->mem_size	= pool->num_desc * pool->desc_size;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	pool_name = kstrdup_const(name ? name : dev_name(pool->dev),
62*4882a593Smuzhiyun 				  GFP_KERNEL);
63*4882a593Smuzhiyun 	if (!pool_name)
64*4882a593Smuzhiyun 		return ERR_PTR(-ENOMEM);
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	pool->gen_pool = gen_pool_create(ilog2(pool->desc_size), -1);
67*4882a593Smuzhiyun 	if (!pool->gen_pool) {
68*4882a593Smuzhiyun 		ret = -ENOMEM;
69*4882a593Smuzhiyun 		dev_err(pool->dev, "pool create failed %d\n", ret);
70*4882a593Smuzhiyun 		kfree_const(pool_name);
71*4882a593Smuzhiyun 		goto gen_pool_create_fail;
72*4882a593Smuzhiyun 	}
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	pool->gen_pool->name = pool_name;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	pool->cpumem = dma_alloc_coherent(pool->dev, pool->mem_size,
77*4882a593Smuzhiyun 					  &pool->dma_addr, GFP_KERNEL);
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	if (!pool->cpumem)
80*4882a593Smuzhiyun 		goto dma_alloc_fail;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	ret = gen_pool_add_virt(pool->gen_pool, (unsigned long)pool->cpumem,
83*4882a593Smuzhiyun 				(phys_addr_t)pool->dma_addr, pool->mem_size,
84*4882a593Smuzhiyun 				-1);
85*4882a593Smuzhiyun 	if (ret < 0) {
86*4882a593Smuzhiyun 		dev_err(pool->dev, "pool add failed %d\n", ret);
87*4882a593Smuzhiyun 		goto gen_pool_add_virt_fail;
88*4882a593Smuzhiyun 	}
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	return pool;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun gen_pool_add_virt_fail:
93*4882a593Smuzhiyun 	dma_free_coherent(pool->dev, pool->mem_size, pool->cpumem,
94*4882a593Smuzhiyun 			  pool->dma_addr);
95*4882a593Smuzhiyun dma_alloc_fail:
96*4882a593Smuzhiyun 	gen_pool_destroy(pool->gen_pool);	/* frees pool->name */
97*4882a593Smuzhiyun gen_pool_create_fail:
98*4882a593Smuzhiyun 	devm_kfree(pool->dev, pool);
99*4882a593Smuzhiyun 	return ERR_PTR(ret);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
k3_cppi_desc_pool_virt2dma(struct k3_cppi_desc_pool * pool,void * addr)102*4882a593Smuzhiyun dma_addr_t k3_cppi_desc_pool_virt2dma(struct k3_cppi_desc_pool *pool,
103*4882a593Smuzhiyun 				      void *addr)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun 	return addr ? pool->dma_addr + (addr - pool->cpumem) : 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
k3_cppi_desc_pool_dma2virt(struct k3_cppi_desc_pool * pool,dma_addr_t dma)108*4882a593Smuzhiyun void *k3_cppi_desc_pool_dma2virt(struct k3_cppi_desc_pool *pool, dma_addr_t dma)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	return dma ? pool->cpumem + (dma - pool->dma_addr) : NULL;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun 
k3_cppi_desc_pool_alloc(struct k3_cppi_desc_pool * pool)113*4882a593Smuzhiyun void *k3_cppi_desc_pool_alloc(struct k3_cppi_desc_pool *pool)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun 	return (void *)gen_pool_alloc(pool->gen_pool, pool->desc_size);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
k3_cppi_desc_pool_free(struct k3_cppi_desc_pool * pool,void * addr)118*4882a593Smuzhiyun void k3_cppi_desc_pool_free(struct k3_cppi_desc_pool *pool, void *addr)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	gen_pool_free(pool->gen_pool, (unsigned long)addr, pool->desc_size);
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
k3_cppi_desc_pool_avail(struct k3_cppi_desc_pool * pool)123*4882a593Smuzhiyun size_t k3_cppi_desc_pool_avail(struct k3_cppi_desc_pool *pool)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun 	return gen_pool_avail(pool->gen_pool) / pool->desc_size;
126*4882a593Smuzhiyun }
127