xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/hwif.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2*4882a593Smuzhiyun // Copyright (c) 2018 Synopsys, Inc. and/or its affiliates.
3*4882a593Smuzhiyun // stmmac HW Interface Callbacks
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun #ifndef __STMMAC_HWIF_H__
6*4882a593Smuzhiyun #define __STMMAC_HWIF_H__
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/netdevice.h>
9*4882a593Smuzhiyun #include <linux/stmmac.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #define stmmac_do_void_callback(__priv, __module, __cname,  __arg0, __args...) \
12*4882a593Smuzhiyun ({ \
13*4882a593Smuzhiyun 	int __result = -EINVAL; \
14*4882a593Smuzhiyun 	if ((__priv)->hw->__module && (__priv)->hw->__module->__cname) { \
15*4882a593Smuzhiyun 		(__priv)->hw->__module->__cname((__arg0), ##__args); \
16*4882a593Smuzhiyun 		__result = 0; \
17*4882a593Smuzhiyun 	} \
18*4882a593Smuzhiyun 	__result; \
19*4882a593Smuzhiyun })
20*4882a593Smuzhiyun #define stmmac_do_callback(__priv, __module, __cname,  __arg0, __args...) \
21*4882a593Smuzhiyun ({ \
22*4882a593Smuzhiyun 	int __result = -EINVAL; \
23*4882a593Smuzhiyun 	if ((__priv)->hw->__module && (__priv)->hw->__module->__cname) \
24*4882a593Smuzhiyun 		__result = (__priv)->hw->__module->__cname((__arg0), ##__args); \
25*4882a593Smuzhiyun 	__result; \
26*4882a593Smuzhiyun })
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun struct stmmac_extra_stats;
29*4882a593Smuzhiyun struct stmmac_safety_stats;
30*4882a593Smuzhiyun struct dma_desc;
31*4882a593Smuzhiyun struct dma_extended_desc;
32*4882a593Smuzhiyun struct dma_edesc;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* Descriptors helpers */
35*4882a593Smuzhiyun struct stmmac_desc_ops {
36*4882a593Smuzhiyun 	/* DMA RX descriptor ring initialization */
37*4882a593Smuzhiyun 	void (*init_rx_desc)(struct dma_desc *p, int disable_rx_ic, int mode,
38*4882a593Smuzhiyun 			int end, int bfsize);
39*4882a593Smuzhiyun 	/* DMA TX descriptor ring initialization */
40*4882a593Smuzhiyun 	void (*init_tx_desc)(struct dma_desc *p, int mode, int end);
41*4882a593Smuzhiyun 	/* Invoked by the xmit function to prepare the tx descriptor */
42*4882a593Smuzhiyun 	void (*prepare_tx_desc)(struct dma_desc *p, int is_fs, int len,
43*4882a593Smuzhiyun 			bool csum_flag, int mode, bool tx_own, bool ls,
44*4882a593Smuzhiyun 			unsigned int tot_pkt_len);
45*4882a593Smuzhiyun 	void (*prepare_tso_tx_desc)(struct dma_desc *p, int is_fs, int len1,
46*4882a593Smuzhiyun 			int len2, bool tx_own, bool ls, unsigned int tcphdrlen,
47*4882a593Smuzhiyun 			unsigned int tcppayloadlen);
48*4882a593Smuzhiyun 	/* Set/get the owner of the descriptor */
49*4882a593Smuzhiyun 	void (*set_tx_owner)(struct dma_desc *p);
50*4882a593Smuzhiyun 	int (*get_tx_owner)(struct dma_desc *p);
51*4882a593Smuzhiyun 	/* Clean the tx descriptor as soon as the tx irq is received */
52*4882a593Smuzhiyun 	void (*release_tx_desc)(struct dma_desc *p, int mode);
53*4882a593Smuzhiyun 	/* Clear interrupt on tx frame completion. When this bit is
54*4882a593Smuzhiyun 	 * set an interrupt happens as soon as the frame is transmitted */
55*4882a593Smuzhiyun 	void (*set_tx_ic)(struct dma_desc *p);
56*4882a593Smuzhiyun 	/* Last tx segment reports the transmit status */
57*4882a593Smuzhiyun 	int (*get_tx_ls)(struct dma_desc *p);
58*4882a593Smuzhiyun 	/* Return the transmit status looking at the TDES1 */
59*4882a593Smuzhiyun 	int (*tx_status)(void *data, struct stmmac_extra_stats *x,
60*4882a593Smuzhiyun 			struct dma_desc *p, void __iomem *ioaddr);
61*4882a593Smuzhiyun 	/* Get the buffer size from the descriptor */
62*4882a593Smuzhiyun 	int (*get_tx_len)(struct dma_desc *p);
63*4882a593Smuzhiyun 	/* Handle extra events on specific interrupts hw dependent */
64*4882a593Smuzhiyun 	void (*set_rx_owner)(struct dma_desc *p, int disable_rx_ic);
65*4882a593Smuzhiyun 	/* Get the receive frame size */
66*4882a593Smuzhiyun 	int (*get_rx_frame_len)(struct dma_desc *p, int rx_coe_type);
67*4882a593Smuzhiyun 	/* Return the reception status looking at the RDES1 */
68*4882a593Smuzhiyun 	int (*rx_status)(void *data, struct stmmac_extra_stats *x,
69*4882a593Smuzhiyun 			struct dma_desc *p);
70*4882a593Smuzhiyun 	void (*rx_extended_status)(void *data, struct stmmac_extra_stats *x,
71*4882a593Smuzhiyun 			struct dma_extended_desc *p);
72*4882a593Smuzhiyun 	/* Set tx timestamp enable bit */
73*4882a593Smuzhiyun 	void (*enable_tx_timestamp) (struct dma_desc *p);
74*4882a593Smuzhiyun 	/* get tx timestamp status */
75*4882a593Smuzhiyun 	int (*get_tx_timestamp_status) (struct dma_desc *p);
76*4882a593Smuzhiyun 	/* get timestamp value */
77*4882a593Smuzhiyun 	void (*get_timestamp)(void *desc, u32 ats, u64 *ts);
78*4882a593Smuzhiyun 	/* get rx timestamp status */
79*4882a593Smuzhiyun 	int (*get_rx_timestamp_status)(void *desc, void *next_desc, u32 ats);
80*4882a593Smuzhiyun 	/* Display ring */
81*4882a593Smuzhiyun 	void (*display_ring)(void *head, unsigned int size, bool rx,
82*4882a593Smuzhiyun 			     dma_addr_t dma_rx_phy, unsigned int desc_size);
83*4882a593Smuzhiyun 	/* set MSS via context descriptor */
84*4882a593Smuzhiyun 	void (*set_mss)(struct dma_desc *p, unsigned int mss);
85*4882a593Smuzhiyun 	/* get descriptor skbuff address */
86*4882a593Smuzhiyun 	void (*get_addr)(struct dma_desc *p, unsigned int *addr);
87*4882a593Smuzhiyun 	/* set descriptor skbuff address */
88*4882a593Smuzhiyun 	void (*set_addr)(struct dma_desc *p, dma_addr_t addr);
89*4882a593Smuzhiyun 	/* clear descriptor */
90*4882a593Smuzhiyun 	void (*clear)(struct dma_desc *p);
91*4882a593Smuzhiyun 	/* RSS */
92*4882a593Smuzhiyun 	int (*get_rx_hash)(struct dma_desc *p, u32 *hash,
93*4882a593Smuzhiyun 			   enum pkt_hash_types *type);
94*4882a593Smuzhiyun 	void (*get_rx_header_len)(struct dma_desc *p, unsigned int *len);
95*4882a593Smuzhiyun 	void (*set_sec_addr)(struct dma_desc *p, dma_addr_t addr, bool buf2_valid);
96*4882a593Smuzhiyun 	void (*set_sarc)(struct dma_desc *p, u32 sarc_type);
97*4882a593Smuzhiyun 	void (*set_vlan_tag)(struct dma_desc *p, u16 tag, u16 inner_tag,
98*4882a593Smuzhiyun 			     u32 inner_type);
99*4882a593Smuzhiyun 	void (*set_vlan)(struct dma_desc *p, u32 type);
100*4882a593Smuzhiyun 	void (*set_tbs)(struct dma_edesc *p, u32 sec, u32 nsec);
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun #define stmmac_init_rx_desc(__priv, __args...) \
104*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, init_rx_desc, __args)
105*4882a593Smuzhiyun #define stmmac_init_tx_desc(__priv, __args...) \
106*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, init_tx_desc, __args)
107*4882a593Smuzhiyun #define stmmac_prepare_tx_desc(__priv, __args...) \
108*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, prepare_tx_desc, __args)
109*4882a593Smuzhiyun #define stmmac_prepare_tso_tx_desc(__priv, __args...) \
110*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, prepare_tso_tx_desc, __args)
111*4882a593Smuzhiyun #define stmmac_set_tx_owner(__priv, __args...) \
112*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, set_tx_owner, __args)
113*4882a593Smuzhiyun #define stmmac_get_tx_owner(__priv, __args...) \
114*4882a593Smuzhiyun 	stmmac_do_callback(__priv, desc, get_tx_owner, __args)
115*4882a593Smuzhiyun #define stmmac_release_tx_desc(__priv, __args...) \
116*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, release_tx_desc, __args)
117*4882a593Smuzhiyun #define stmmac_set_tx_ic(__priv, __args...) \
118*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, set_tx_ic, __args)
119*4882a593Smuzhiyun #define stmmac_get_tx_ls(__priv, __args...) \
120*4882a593Smuzhiyun 	stmmac_do_callback(__priv, desc, get_tx_ls, __args)
121*4882a593Smuzhiyun #define stmmac_tx_status(__priv, __args...) \
122*4882a593Smuzhiyun 	stmmac_do_callback(__priv, desc, tx_status, __args)
123*4882a593Smuzhiyun #define stmmac_get_tx_len(__priv, __args...) \
124*4882a593Smuzhiyun 	stmmac_do_callback(__priv, desc, get_tx_len, __args)
125*4882a593Smuzhiyun #define stmmac_set_rx_owner(__priv, __args...) \
126*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, set_rx_owner, __args)
127*4882a593Smuzhiyun #define stmmac_get_rx_frame_len(__priv, __args...) \
128*4882a593Smuzhiyun 	stmmac_do_callback(__priv, desc, get_rx_frame_len, __args)
129*4882a593Smuzhiyun #define stmmac_rx_status(__priv, __args...) \
130*4882a593Smuzhiyun 	stmmac_do_callback(__priv, desc, rx_status, __args)
131*4882a593Smuzhiyun #define stmmac_rx_extended_status(__priv, __args...) \
132*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, rx_extended_status, __args)
133*4882a593Smuzhiyun #define stmmac_enable_tx_timestamp(__priv, __args...) \
134*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, enable_tx_timestamp, __args)
135*4882a593Smuzhiyun #define stmmac_get_tx_timestamp_status(__priv, __args...) \
136*4882a593Smuzhiyun 	stmmac_do_callback(__priv, desc, get_tx_timestamp_status, __args)
137*4882a593Smuzhiyun #define stmmac_get_timestamp(__priv, __args...) \
138*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, get_timestamp, __args)
139*4882a593Smuzhiyun #define stmmac_get_rx_timestamp_status(__priv, __args...) \
140*4882a593Smuzhiyun 	stmmac_do_callback(__priv, desc, get_rx_timestamp_status, __args)
141*4882a593Smuzhiyun #define stmmac_display_ring(__priv, __args...) \
142*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, display_ring, __args)
143*4882a593Smuzhiyun #define stmmac_set_mss(__priv, __args...) \
144*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, set_mss, __args)
145*4882a593Smuzhiyun #define stmmac_get_desc_addr(__priv, __args...) \
146*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, get_addr, __args)
147*4882a593Smuzhiyun #define stmmac_set_desc_addr(__priv, __args...) \
148*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, set_addr, __args)
149*4882a593Smuzhiyun #define stmmac_clear_desc(__priv, __args...) \
150*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, clear, __args)
151*4882a593Smuzhiyun #define stmmac_get_rx_hash(__priv, __args...) \
152*4882a593Smuzhiyun 	stmmac_do_callback(__priv, desc, get_rx_hash, __args)
153*4882a593Smuzhiyun #define stmmac_get_rx_header_len(__priv, __args...) \
154*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, get_rx_header_len, __args)
155*4882a593Smuzhiyun #define stmmac_set_desc_sec_addr(__priv, __args...) \
156*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, set_sec_addr, __args)
157*4882a593Smuzhiyun #define stmmac_set_desc_sarc(__priv, __args...) \
158*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, set_sarc, __args)
159*4882a593Smuzhiyun #define stmmac_set_desc_vlan_tag(__priv, __args...) \
160*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, set_vlan_tag, __args)
161*4882a593Smuzhiyun #define stmmac_set_desc_vlan(__priv, __args...) \
162*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, set_vlan, __args)
163*4882a593Smuzhiyun #define stmmac_set_desc_tbs(__priv, __args...) \
164*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, desc, set_tbs, __args)
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun struct stmmac_dma_cfg;
167*4882a593Smuzhiyun struct dma_features;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun /* Specific DMA helpers */
170*4882a593Smuzhiyun struct stmmac_dma_ops {
171*4882a593Smuzhiyun 	/* DMA core initialization */
172*4882a593Smuzhiyun 	int (*reset)(void __iomem *ioaddr);
173*4882a593Smuzhiyun 	void (*init)(void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg,
174*4882a593Smuzhiyun 		     int atds);
175*4882a593Smuzhiyun 	void (*init_chan)(void __iomem *ioaddr,
176*4882a593Smuzhiyun 			  struct stmmac_dma_cfg *dma_cfg, u32 chan);
177*4882a593Smuzhiyun 	void (*init_rx_chan)(void __iomem *ioaddr,
178*4882a593Smuzhiyun 			     struct stmmac_dma_cfg *dma_cfg,
179*4882a593Smuzhiyun 			     dma_addr_t phy, u32 chan);
180*4882a593Smuzhiyun 	void (*init_tx_chan)(void __iomem *ioaddr,
181*4882a593Smuzhiyun 			     struct stmmac_dma_cfg *dma_cfg,
182*4882a593Smuzhiyun 			     dma_addr_t phy, u32 chan);
183*4882a593Smuzhiyun 	/* Configure the AXI Bus Mode Register */
184*4882a593Smuzhiyun 	void (*axi)(void __iomem *ioaddr, struct stmmac_axi *axi);
185*4882a593Smuzhiyun 	/* Dump DMA registers */
186*4882a593Smuzhiyun 	void (*dump_regs)(void __iomem *ioaddr, u32 *reg_space);
187*4882a593Smuzhiyun 	void (*dma_rx_mode)(void __iomem *ioaddr, int mode, u32 channel,
188*4882a593Smuzhiyun 			    int fifosz, u8 qmode);
189*4882a593Smuzhiyun 	void (*dma_tx_mode)(void __iomem *ioaddr, int mode, u32 channel,
190*4882a593Smuzhiyun 			    int fifosz, u8 qmode);
191*4882a593Smuzhiyun 	/* To track extra statistic (if supported) */
192*4882a593Smuzhiyun 	void (*dma_diagnostic_fr) (void *data, struct stmmac_extra_stats *x,
193*4882a593Smuzhiyun 				   void __iomem *ioaddr);
194*4882a593Smuzhiyun 	void (*enable_dma_transmission) (void __iomem *ioaddr);
195*4882a593Smuzhiyun 	void (*enable_dma_irq)(void __iomem *ioaddr, u32 chan,
196*4882a593Smuzhiyun 			       bool rx, bool tx);
197*4882a593Smuzhiyun 	void (*disable_dma_irq)(void __iomem *ioaddr, u32 chan,
198*4882a593Smuzhiyun 				bool rx, bool tx);
199*4882a593Smuzhiyun 	void (*start_tx)(void __iomem *ioaddr, u32 chan);
200*4882a593Smuzhiyun 	void (*stop_tx)(void __iomem *ioaddr, u32 chan);
201*4882a593Smuzhiyun 	void (*start_rx)(void __iomem *ioaddr, u32 chan);
202*4882a593Smuzhiyun 	void (*stop_rx)(void __iomem *ioaddr, u32 chan);
203*4882a593Smuzhiyun 	int (*dma_interrupt) (void __iomem *ioaddr,
204*4882a593Smuzhiyun 			      struct stmmac_extra_stats *x, u32 chan);
205*4882a593Smuzhiyun 	/* If supported then get the optional core features */
206*4882a593Smuzhiyun 	int (*get_hw_feature)(void __iomem *ioaddr,
207*4882a593Smuzhiyun 			      struct dma_features *dma_cap);
208*4882a593Smuzhiyun 	/* Program the HW RX Watchdog */
209*4882a593Smuzhiyun 	void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt, u32 number_chan);
210*4882a593Smuzhiyun 	void (*set_tx_ring_len)(void __iomem *ioaddr, u32 len, u32 chan);
211*4882a593Smuzhiyun 	void (*set_rx_ring_len)(void __iomem *ioaddr, u32 len, u32 chan);
212*4882a593Smuzhiyun 	void (*set_rx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
213*4882a593Smuzhiyun 	void (*set_tx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
214*4882a593Smuzhiyun 	void (*enable_tso)(void __iomem *ioaddr, bool en, u32 chan);
215*4882a593Smuzhiyun 	void (*qmode)(void __iomem *ioaddr, u32 channel, u8 qmode);
216*4882a593Smuzhiyun 	void (*set_bfsize)(void __iomem *ioaddr, int bfsize, u32 chan);
217*4882a593Smuzhiyun 	void (*enable_sph)(void __iomem *ioaddr, bool en, u32 chan);
218*4882a593Smuzhiyun 	int (*enable_tbs)(void __iomem *ioaddr, bool en, u32 chan);
219*4882a593Smuzhiyun };
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun #define stmmac_reset(__priv, __args...) \
222*4882a593Smuzhiyun 	stmmac_do_callback(__priv, dma, reset, __args)
223*4882a593Smuzhiyun #define stmmac_dma_init(__priv, __args...) \
224*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, init, __args)
225*4882a593Smuzhiyun #define stmmac_init_chan(__priv, __args...) \
226*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, init_chan, __args)
227*4882a593Smuzhiyun #define stmmac_init_rx_chan(__priv, __args...) \
228*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, init_rx_chan, __args)
229*4882a593Smuzhiyun #define stmmac_init_tx_chan(__priv, __args...) \
230*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, init_tx_chan, __args)
231*4882a593Smuzhiyun #define stmmac_axi(__priv, __args...) \
232*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, axi, __args)
233*4882a593Smuzhiyun #define stmmac_dump_dma_regs(__priv, __args...) \
234*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, dump_regs, __args)
235*4882a593Smuzhiyun #define stmmac_dma_rx_mode(__priv, __args...) \
236*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, dma_rx_mode, __args)
237*4882a593Smuzhiyun #define stmmac_dma_tx_mode(__priv, __args...) \
238*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, dma_tx_mode, __args)
239*4882a593Smuzhiyun #define stmmac_dma_diagnostic_fr(__priv, __args...) \
240*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, dma_diagnostic_fr, __args)
241*4882a593Smuzhiyun #define stmmac_enable_dma_transmission(__priv, __args...) \
242*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, enable_dma_transmission, __args)
243*4882a593Smuzhiyun #define stmmac_enable_dma_irq(__priv, __args...) \
244*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, enable_dma_irq, __args)
245*4882a593Smuzhiyun #define stmmac_disable_dma_irq(__priv, __args...) \
246*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, disable_dma_irq, __args)
247*4882a593Smuzhiyun #define stmmac_start_tx(__priv, __args...) \
248*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, start_tx, __args)
249*4882a593Smuzhiyun #define stmmac_stop_tx(__priv, __args...) \
250*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, stop_tx, __args)
251*4882a593Smuzhiyun #define stmmac_start_rx(__priv, __args...) \
252*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, start_rx, __args)
253*4882a593Smuzhiyun #define stmmac_stop_rx(__priv, __args...) \
254*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, stop_rx, __args)
255*4882a593Smuzhiyun #define stmmac_dma_interrupt_status(__priv, __args...) \
256*4882a593Smuzhiyun 	stmmac_do_callback(__priv, dma, dma_interrupt, __args)
257*4882a593Smuzhiyun #define stmmac_get_hw_feature(__priv, __args...) \
258*4882a593Smuzhiyun 	stmmac_do_callback(__priv, dma, get_hw_feature, __args)
259*4882a593Smuzhiyun #define stmmac_rx_watchdog(__priv, __args...) \
260*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, rx_watchdog, __args)
261*4882a593Smuzhiyun #define stmmac_set_tx_ring_len(__priv, __args...) \
262*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, set_tx_ring_len, __args)
263*4882a593Smuzhiyun #define stmmac_set_rx_ring_len(__priv, __args...) \
264*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, set_rx_ring_len, __args)
265*4882a593Smuzhiyun #define stmmac_set_rx_tail_ptr(__priv, __args...) \
266*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, set_rx_tail_ptr, __args)
267*4882a593Smuzhiyun #define stmmac_set_tx_tail_ptr(__priv, __args...) \
268*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, set_tx_tail_ptr, __args)
269*4882a593Smuzhiyun #define stmmac_enable_tso(__priv, __args...) \
270*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, enable_tso, __args)
271*4882a593Smuzhiyun #define stmmac_dma_qmode(__priv, __args...) \
272*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, qmode, __args)
273*4882a593Smuzhiyun #define stmmac_set_dma_bfsize(__priv, __args...) \
274*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, set_bfsize, __args)
275*4882a593Smuzhiyun #define stmmac_enable_sph(__priv, __args...) \
276*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, dma, enable_sph, __args)
277*4882a593Smuzhiyun #define stmmac_enable_tbs(__priv, __args...) \
278*4882a593Smuzhiyun 	stmmac_do_callback(__priv, dma, enable_tbs, __args)
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun struct mac_device_info;
281*4882a593Smuzhiyun struct net_device;
282*4882a593Smuzhiyun struct rgmii_adv;
283*4882a593Smuzhiyun struct stmmac_safety_stats;
284*4882a593Smuzhiyun struct stmmac_tc_entry;
285*4882a593Smuzhiyun struct stmmac_pps_cfg;
286*4882a593Smuzhiyun struct stmmac_rss;
287*4882a593Smuzhiyun struct stmmac_est;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun /* Helpers to program the MAC core */
290*4882a593Smuzhiyun struct stmmac_ops {
291*4882a593Smuzhiyun 	/* MAC core initialization */
292*4882a593Smuzhiyun 	void (*core_init)(struct mac_device_info *hw, struct net_device *dev);
293*4882a593Smuzhiyun 	/* Enable the MAC RX/TX */
294*4882a593Smuzhiyun 	void (*set_mac)(void __iomem *ioaddr, bool enable);
295*4882a593Smuzhiyun 	/* Enable and verify that the IPC module is supported */
296*4882a593Smuzhiyun 	int (*rx_ipc)(struct mac_device_info *hw);
297*4882a593Smuzhiyun 	/* Enable RX Queues */
298*4882a593Smuzhiyun 	void (*rx_queue_enable)(struct mac_device_info *hw, u8 mode, u32 queue);
299*4882a593Smuzhiyun 	/* RX Queues Priority */
300*4882a593Smuzhiyun 	void (*rx_queue_prio)(struct mac_device_info *hw, u32 prio, u32 queue);
301*4882a593Smuzhiyun 	/* TX Queues Priority */
302*4882a593Smuzhiyun 	void (*tx_queue_prio)(struct mac_device_info *hw, u32 prio, u32 queue);
303*4882a593Smuzhiyun 	/* RX Queues Routing */
304*4882a593Smuzhiyun 	void (*rx_queue_routing)(struct mac_device_info *hw, u8 packet,
305*4882a593Smuzhiyun 				 u32 queue);
306*4882a593Smuzhiyun 	/* Program RX Algorithms */
307*4882a593Smuzhiyun 	void (*prog_mtl_rx_algorithms)(struct mac_device_info *hw, u32 rx_alg);
308*4882a593Smuzhiyun 	/* Program TX Algorithms */
309*4882a593Smuzhiyun 	void (*prog_mtl_tx_algorithms)(struct mac_device_info *hw, u32 tx_alg);
310*4882a593Smuzhiyun 	/* Set MTL TX queues weight */
311*4882a593Smuzhiyun 	void (*set_mtl_tx_queue_weight)(struct mac_device_info *hw,
312*4882a593Smuzhiyun 					u32 weight, u32 queue);
313*4882a593Smuzhiyun 	/* RX MTL queue to RX dma mapping */
314*4882a593Smuzhiyun 	void (*map_mtl_to_dma)(struct mac_device_info *hw, u32 queue, u32 chan);
315*4882a593Smuzhiyun 	/* Configure AV Algorithm */
316*4882a593Smuzhiyun 	void (*config_cbs)(struct mac_device_info *hw, u32 send_slope,
317*4882a593Smuzhiyun 			   u32 idle_slope, u32 high_credit, u32 low_credit,
318*4882a593Smuzhiyun 			   u32 queue);
319*4882a593Smuzhiyun 	/* Dump MAC registers */
320*4882a593Smuzhiyun 	void (*dump_regs)(struct mac_device_info *hw, u32 *reg_space);
321*4882a593Smuzhiyun 	/* Handle extra events on specific interrupts hw dependent */
322*4882a593Smuzhiyun 	int (*host_irq_status)(struct mac_device_info *hw,
323*4882a593Smuzhiyun 			       struct stmmac_extra_stats *x);
324*4882a593Smuzhiyun 	/* Handle MTL interrupts */
325*4882a593Smuzhiyun 	int (*host_mtl_irq_status)(struct mac_device_info *hw, u32 chan);
326*4882a593Smuzhiyun 	/* Multicast filter setting */
327*4882a593Smuzhiyun 	void (*set_filter)(struct mac_device_info *hw, struct net_device *dev);
328*4882a593Smuzhiyun 	/* Flow control setting */
329*4882a593Smuzhiyun 	void (*flow_ctrl)(struct mac_device_info *hw, unsigned int duplex,
330*4882a593Smuzhiyun 			  unsigned int fc, unsigned int pause_time, u32 tx_cnt);
331*4882a593Smuzhiyun 	/* Set power management mode (e.g. magic frame) */
332*4882a593Smuzhiyun 	void (*pmt)(struct mac_device_info *hw, unsigned long mode);
333*4882a593Smuzhiyun 	/* Set/Get Unicast MAC addresses */
334*4882a593Smuzhiyun 	void (*set_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
335*4882a593Smuzhiyun 			      unsigned int reg_n);
336*4882a593Smuzhiyun 	void (*get_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
337*4882a593Smuzhiyun 			      unsigned int reg_n);
338*4882a593Smuzhiyun 	void (*set_eee_mode)(struct mac_device_info *hw,
339*4882a593Smuzhiyun 			     bool en_tx_lpi_clockgating);
340*4882a593Smuzhiyun 	void (*reset_eee_mode)(struct mac_device_info *hw);
341*4882a593Smuzhiyun 	void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw);
342*4882a593Smuzhiyun 	void (*set_eee_pls)(struct mac_device_info *hw, int link);
343*4882a593Smuzhiyun 	void (*debug)(void __iomem *ioaddr, struct stmmac_extra_stats *x,
344*4882a593Smuzhiyun 		      u32 rx_queues, u32 tx_queues);
345*4882a593Smuzhiyun 	/* PCS calls */
346*4882a593Smuzhiyun 	void (*pcs_ctrl_ane)(void __iomem *ioaddr, bool ane, bool srgmi_ral,
347*4882a593Smuzhiyun 			     bool loopback);
348*4882a593Smuzhiyun 	void (*pcs_rane)(void __iomem *ioaddr, bool restart);
349*4882a593Smuzhiyun 	void (*pcs_get_adv_lp)(void __iomem *ioaddr, struct rgmii_adv *adv);
350*4882a593Smuzhiyun 	/* Safety Features */
351*4882a593Smuzhiyun 	int (*safety_feat_config)(void __iomem *ioaddr, unsigned int asp);
352*4882a593Smuzhiyun 	int (*safety_feat_irq_status)(struct net_device *ndev,
353*4882a593Smuzhiyun 			void __iomem *ioaddr, unsigned int asp,
354*4882a593Smuzhiyun 			struct stmmac_safety_stats *stats);
355*4882a593Smuzhiyun 	int (*safety_feat_dump)(struct stmmac_safety_stats *stats,
356*4882a593Smuzhiyun 			int index, unsigned long *count, const char **desc);
357*4882a593Smuzhiyun 	/* Flexible RX Parser */
358*4882a593Smuzhiyun 	int (*rxp_config)(void __iomem *ioaddr, struct stmmac_tc_entry *entries,
359*4882a593Smuzhiyun 			  unsigned int count);
360*4882a593Smuzhiyun 	/* Flexible PPS */
361*4882a593Smuzhiyun 	int (*flex_pps_config)(void __iomem *ioaddr, int index,
362*4882a593Smuzhiyun 			       struct stmmac_pps_cfg *cfg, bool enable,
363*4882a593Smuzhiyun 			       u32 sub_second_inc, u32 systime_flags);
364*4882a593Smuzhiyun 	/* Loopback for selftests */
365*4882a593Smuzhiyun 	void (*set_mac_loopback)(void __iomem *ioaddr, bool enable);
366*4882a593Smuzhiyun 	/* RSS */
367*4882a593Smuzhiyun 	int (*rss_configure)(struct mac_device_info *hw,
368*4882a593Smuzhiyun 			     struct stmmac_rss *cfg, u32 num_rxq);
369*4882a593Smuzhiyun 	/* VLAN */
370*4882a593Smuzhiyun 	void (*update_vlan_hash)(struct mac_device_info *hw, u32 hash,
371*4882a593Smuzhiyun 				 __le16 perfect_match, bool is_double);
372*4882a593Smuzhiyun 	void (*enable_vlan)(struct mac_device_info *hw, u32 type);
373*4882a593Smuzhiyun 	int (*add_hw_vlan_rx_fltr)(struct net_device *dev,
374*4882a593Smuzhiyun 				   struct mac_device_info *hw,
375*4882a593Smuzhiyun 				   __be16 proto, u16 vid);
376*4882a593Smuzhiyun 	int (*del_hw_vlan_rx_fltr)(struct net_device *dev,
377*4882a593Smuzhiyun 				   struct mac_device_info *hw,
378*4882a593Smuzhiyun 				   __be16 proto, u16 vid);
379*4882a593Smuzhiyun 	void (*restore_hw_vlan_rx_fltr)(struct net_device *dev,
380*4882a593Smuzhiyun 					struct mac_device_info *hw);
381*4882a593Smuzhiyun 	/* TX Timestamp */
382*4882a593Smuzhiyun 	int (*get_mac_tx_timestamp)(struct mac_device_info *hw, u64 *ts);
383*4882a593Smuzhiyun 	/* Source Address Insertion / Replacement */
384*4882a593Smuzhiyun 	void (*sarc_configure)(void __iomem *ioaddr, int val);
385*4882a593Smuzhiyun 	/* Filtering */
386*4882a593Smuzhiyun 	int (*config_l3_filter)(struct mac_device_info *hw, u32 filter_no,
387*4882a593Smuzhiyun 				bool en, bool ipv6, bool sa, bool inv,
388*4882a593Smuzhiyun 				u32 match);
389*4882a593Smuzhiyun 	int (*config_l4_filter)(struct mac_device_info *hw, u32 filter_no,
390*4882a593Smuzhiyun 				bool en, bool udp, bool sa, bool inv,
391*4882a593Smuzhiyun 				u32 match);
392*4882a593Smuzhiyun 	void (*set_arp_offload)(struct mac_device_info *hw, bool en, u32 addr);
393*4882a593Smuzhiyun 	int (*est_configure)(void __iomem *ioaddr, struct stmmac_est *cfg,
394*4882a593Smuzhiyun 			     unsigned int ptp_rate);
395*4882a593Smuzhiyun 	void (*fpe_configure)(void __iomem *ioaddr, u32 num_txq, u32 num_rxq,
396*4882a593Smuzhiyun 			      bool enable);
397*4882a593Smuzhiyun };
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun #define stmmac_core_init(__priv, __args...) \
400*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, core_init, __args)
401*4882a593Smuzhiyun #define stmmac_mac_set(__priv, __args...) \
402*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, set_mac, __args)
403*4882a593Smuzhiyun #define stmmac_rx_ipc(__priv, __args...) \
404*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, rx_ipc, __args)
405*4882a593Smuzhiyun #define stmmac_rx_queue_enable(__priv, __args...) \
406*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, rx_queue_enable, __args)
407*4882a593Smuzhiyun #define stmmac_rx_queue_prio(__priv, __args...) \
408*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, rx_queue_prio, __args)
409*4882a593Smuzhiyun #define stmmac_tx_queue_prio(__priv, __args...) \
410*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, tx_queue_prio, __args)
411*4882a593Smuzhiyun #define stmmac_rx_queue_routing(__priv, __args...) \
412*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, rx_queue_routing, __args)
413*4882a593Smuzhiyun #define stmmac_prog_mtl_rx_algorithms(__priv, __args...) \
414*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, prog_mtl_rx_algorithms, __args)
415*4882a593Smuzhiyun #define stmmac_prog_mtl_tx_algorithms(__priv, __args...) \
416*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, prog_mtl_tx_algorithms, __args)
417*4882a593Smuzhiyun #define stmmac_set_mtl_tx_queue_weight(__priv, __args...) \
418*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, set_mtl_tx_queue_weight, __args)
419*4882a593Smuzhiyun #define stmmac_map_mtl_to_dma(__priv, __args...) \
420*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, map_mtl_to_dma, __args)
421*4882a593Smuzhiyun #define stmmac_config_cbs(__priv, __args...) \
422*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, config_cbs, __args)
423*4882a593Smuzhiyun #define stmmac_dump_mac_regs(__priv, __args...) \
424*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, dump_regs, __args)
425*4882a593Smuzhiyun #define stmmac_host_irq_status(__priv, __args...) \
426*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, host_irq_status, __args)
427*4882a593Smuzhiyun #define stmmac_host_mtl_irq_status(__priv, __args...) \
428*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, host_mtl_irq_status, __args)
429*4882a593Smuzhiyun #define stmmac_set_filter(__priv, __args...) \
430*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, set_filter, __args)
431*4882a593Smuzhiyun #define stmmac_flow_ctrl(__priv, __args...) \
432*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, flow_ctrl, __args)
433*4882a593Smuzhiyun #define stmmac_pmt(__priv, __args...) \
434*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, pmt, __args)
435*4882a593Smuzhiyun #define stmmac_set_umac_addr(__priv, __args...) \
436*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, set_umac_addr, __args)
437*4882a593Smuzhiyun #define stmmac_get_umac_addr(__priv, __args...) \
438*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, get_umac_addr, __args)
439*4882a593Smuzhiyun #define stmmac_set_eee_mode(__priv, __args...) \
440*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, set_eee_mode, __args)
441*4882a593Smuzhiyun #define stmmac_reset_eee_mode(__priv, __args...) \
442*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, reset_eee_mode, __args)
443*4882a593Smuzhiyun #define stmmac_set_eee_timer(__priv, __args...) \
444*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, set_eee_timer, __args)
445*4882a593Smuzhiyun #define stmmac_set_eee_pls(__priv, __args...) \
446*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, set_eee_pls, __args)
447*4882a593Smuzhiyun #define stmmac_mac_debug(__priv, __args...) \
448*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, debug, __args)
449*4882a593Smuzhiyun #define stmmac_pcs_ctrl_ane(__priv, __args...) \
450*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, pcs_ctrl_ane, __args)
451*4882a593Smuzhiyun #define stmmac_pcs_rane(__priv, __args...) \
452*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, pcs_rane, __args)
453*4882a593Smuzhiyun #define stmmac_pcs_get_adv_lp(__priv, __args...) \
454*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, pcs_get_adv_lp, __args)
455*4882a593Smuzhiyun #define stmmac_safety_feat_config(__priv, __args...) \
456*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, safety_feat_config, __args)
457*4882a593Smuzhiyun #define stmmac_safety_feat_irq_status(__priv, __args...) \
458*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, safety_feat_irq_status, __args)
459*4882a593Smuzhiyun #define stmmac_safety_feat_dump(__priv, __args...) \
460*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, safety_feat_dump, __args)
461*4882a593Smuzhiyun #define stmmac_rxp_config(__priv, __args...) \
462*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, rxp_config, __args)
463*4882a593Smuzhiyun #define stmmac_flex_pps_config(__priv, __args...) \
464*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, flex_pps_config, __args)
465*4882a593Smuzhiyun #define stmmac_set_mac_loopback(__priv, __args...) \
466*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, set_mac_loopback, __args)
467*4882a593Smuzhiyun #define stmmac_rss_configure(__priv, __args...) \
468*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, rss_configure, __args)
469*4882a593Smuzhiyun #define stmmac_update_vlan_hash(__priv, __args...) \
470*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, update_vlan_hash, __args)
471*4882a593Smuzhiyun #define stmmac_enable_vlan(__priv, __args...) \
472*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, enable_vlan, __args)
473*4882a593Smuzhiyun #define stmmac_add_hw_vlan_rx_fltr(__priv, __args...) \
474*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, add_hw_vlan_rx_fltr, __args)
475*4882a593Smuzhiyun #define stmmac_del_hw_vlan_rx_fltr(__priv, __args...) \
476*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, del_hw_vlan_rx_fltr, __args)
477*4882a593Smuzhiyun #define stmmac_restore_hw_vlan_rx_fltr(__priv, __args...) \
478*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, restore_hw_vlan_rx_fltr, __args)
479*4882a593Smuzhiyun #define stmmac_get_mac_tx_timestamp(__priv, __args...) \
480*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, get_mac_tx_timestamp, __args)
481*4882a593Smuzhiyun #define stmmac_sarc_configure(__priv, __args...) \
482*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, sarc_configure, __args)
483*4882a593Smuzhiyun #define stmmac_config_l3_filter(__priv, __args...) \
484*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, config_l3_filter, __args)
485*4882a593Smuzhiyun #define stmmac_config_l4_filter(__priv, __args...) \
486*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, config_l4_filter, __args)
487*4882a593Smuzhiyun #define stmmac_set_arp_offload(__priv, __args...) \
488*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, set_arp_offload, __args)
489*4882a593Smuzhiyun #define stmmac_est_configure(__priv, __args...) \
490*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mac, est_configure, __args)
491*4882a593Smuzhiyun #define stmmac_fpe_configure(__priv, __args...) \
492*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mac, fpe_configure, __args)
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun /* PTP and HW Timer helpers */
495*4882a593Smuzhiyun struct stmmac_hwtimestamp {
496*4882a593Smuzhiyun 	void (*config_hw_tstamping) (void __iomem *ioaddr, u32 data);
497*4882a593Smuzhiyun 	void (*config_sub_second_increment)(void __iomem *ioaddr, u32 ptp_clock,
498*4882a593Smuzhiyun 					   int gmac4, u32 *ssinc);
499*4882a593Smuzhiyun 	int (*init_systime) (void __iomem *ioaddr, u32 sec, u32 nsec);
500*4882a593Smuzhiyun 	int (*config_addend) (void __iomem *ioaddr, u32 addend);
501*4882a593Smuzhiyun 	int (*adjust_systime) (void __iomem *ioaddr, u32 sec, u32 nsec,
502*4882a593Smuzhiyun 			       int add_sub, int gmac4);
503*4882a593Smuzhiyun 	void (*get_systime) (void __iomem *ioaddr, u64 *systime);
504*4882a593Smuzhiyun };
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun #define stmmac_config_hw_tstamping(__priv, __args...) \
507*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, ptp, config_hw_tstamping, __args)
508*4882a593Smuzhiyun #define stmmac_config_sub_second_increment(__priv, __args...) \
509*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, ptp, config_sub_second_increment, __args)
510*4882a593Smuzhiyun #define stmmac_init_systime(__priv, __args...) \
511*4882a593Smuzhiyun 	stmmac_do_callback(__priv, ptp, init_systime, __args)
512*4882a593Smuzhiyun #define stmmac_config_addend(__priv, __args...) \
513*4882a593Smuzhiyun 	stmmac_do_callback(__priv, ptp, config_addend, __args)
514*4882a593Smuzhiyun #define stmmac_adjust_systime(__priv, __args...) \
515*4882a593Smuzhiyun 	stmmac_do_callback(__priv, ptp, adjust_systime, __args)
516*4882a593Smuzhiyun #define stmmac_get_systime(__priv, __args...) \
517*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, ptp, get_systime, __args)
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun /* Helpers to manage the descriptors for chain and ring modes */
520*4882a593Smuzhiyun struct stmmac_mode_ops {
521*4882a593Smuzhiyun 	void (*init) (void *des, dma_addr_t phy_addr, unsigned int size,
522*4882a593Smuzhiyun 		      unsigned int extend_desc);
523*4882a593Smuzhiyun 	unsigned int (*is_jumbo_frm) (int len, int ehn_desc);
524*4882a593Smuzhiyun 	int (*jumbo_frm)(void *priv, struct sk_buff *skb, int csum);
525*4882a593Smuzhiyun 	int (*set_16kib_bfsize)(int mtu);
526*4882a593Smuzhiyun 	void (*init_desc3)(struct dma_desc *p);
527*4882a593Smuzhiyun 	void (*refill_desc3) (void *priv, struct dma_desc *p);
528*4882a593Smuzhiyun 	void (*clean_desc3) (void *priv, struct dma_desc *p);
529*4882a593Smuzhiyun };
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun #define stmmac_mode_init(__priv, __args...) \
532*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mode, init, __args)
533*4882a593Smuzhiyun #define stmmac_is_jumbo_frm(__priv, __args...) \
534*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mode, is_jumbo_frm, __args)
535*4882a593Smuzhiyun #define stmmac_jumbo_frm(__priv, __args...) \
536*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mode, jumbo_frm, __args)
537*4882a593Smuzhiyun #define stmmac_set_16kib_bfsize(__priv, __args...) \
538*4882a593Smuzhiyun 	stmmac_do_callback(__priv, mode, set_16kib_bfsize, __args)
539*4882a593Smuzhiyun #define stmmac_init_desc3(__priv, __args...) \
540*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mode, init_desc3, __args)
541*4882a593Smuzhiyun #define stmmac_refill_desc3(__priv, __args...) \
542*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mode, refill_desc3, __args)
543*4882a593Smuzhiyun #define stmmac_clean_desc3(__priv, __args...) \
544*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mode, clean_desc3, __args)
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun struct stmmac_priv;
547*4882a593Smuzhiyun struct tc_cls_u32_offload;
548*4882a593Smuzhiyun struct tc_cbs_qopt_offload;
549*4882a593Smuzhiyun struct flow_cls_offload;
550*4882a593Smuzhiyun struct tc_taprio_qopt_offload;
551*4882a593Smuzhiyun struct tc_etf_qopt_offload;
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun struct stmmac_tc_ops {
554*4882a593Smuzhiyun 	int (*init)(struct stmmac_priv *priv);
555*4882a593Smuzhiyun 	int (*setup_cls_u32)(struct stmmac_priv *priv,
556*4882a593Smuzhiyun 			     struct tc_cls_u32_offload *cls);
557*4882a593Smuzhiyun 	int (*setup_cbs)(struct stmmac_priv *priv,
558*4882a593Smuzhiyun 			 struct tc_cbs_qopt_offload *qopt);
559*4882a593Smuzhiyun 	int (*setup_cls)(struct stmmac_priv *priv,
560*4882a593Smuzhiyun 			 struct flow_cls_offload *cls);
561*4882a593Smuzhiyun 	int (*setup_taprio)(struct stmmac_priv *priv,
562*4882a593Smuzhiyun 			    struct tc_taprio_qopt_offload *qopt);
563*4882a593Smuzhiyun 	int (*setup_etf)(struct stmmac_priv *priv,
564*4882a593Smuzhiyun 			 struct tc_etf_qopt_offload *qopt);
565*4882a593Smuzhiyun };
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun #define stmmac_tc_init(__priv, __args...) \
568*4882a593Smuzhiyun 	stmmac_do_callback(__priv, tc, init, __args)
569*4882a593Smuzhiyun #define stmmac_tc_setup_cls_u32(__priv, __args...) \
570*4882a593Smuzhiyun 	stmmac_do_callback(__priv, tc, setup_cls_u32, __args)
571*4882a593Smuzhiyun #define stmmac_tc_setup_cbs(__priv, __args...) \
572*4882a593Smuzhiyun 	stmmac_do_callback(__priv, tc, setup_cbs, __args)
573*4882a593Smuzhiyun #define stmmac_tc_setup_cls(__priv, __args...) \
574*4882a593Smuzhiyun 	stmmac_do_callback(__priv, tc, setup_cls, __args)
575*4882a593Smuzhiyun #define stmmac_tc_setup_taprio(__priv, __args...) \
576*4882a593Smuzhiyun 	stmmac_do_callback(__priv, tc, setup_taprio, __args)
577*4882a593Smuzhiyun #define stmmac_tc_setup_etf(__priv, __args...) \
578*4882a593Smuzhiyun 	stmmac_do_callback(__priv, tc, setup_etf, __args)
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun struct stmmac_counters;
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun struct stmmac_mmc_ops {
583*4882a593Smuzhiyun 	void (*ctrl)(void __iomem *ioaddr, unsigned int mode);
584*4882a593Smuzhiyun 	void (*intr_all_mask)(void __iomem *ioaddr);
585*4882a593Smuzhiyun 	void (*read)(void __iomem *ioaddr, struct stmmac_counters *mmc);
586*4882a593Smuzhiyun };
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun #define stmmac_mmc_ctrl(__priv, __args...) \
589*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mmc, ctrl, __args)
590*4882a593Smuzhiyun #define stmmac_mmc_intr_all_mask(__priv, __args...) \
591*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mmc, intr_all_mask, __args)
592*4882a593Smuzhiyun #define stmmac_mmc_read(__priv, __args...) \
593*4882a593Smuzhiyun 	stmmac_do_void_callback(__priv, mmc, read, __args)
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun /* XPCS callbacks */
596*4882a593Smuzhiyun #define stmmac_xpcs_validate(__priv, __args...) \
597*4882a593Smuzhiyun 	stmmac_do_callback(__priv, xpcs, validate, __args)
598*4882a593Smuzhiyun #define stmmac_xpcs_config(__priv, __args...) \
599*4882a593Smuzhiyun 	stmmac_do_callback(__priv, xpcs, config, __args)
600*4882a593Smuzhiyun #define stmmac_xpcs_get_state(__priv, __args...) \
601*4882a593Smuzhiyun 	stmmac_do_callback(__priv, xpcs, get_state, __args)
602*4882a593Smuzhiyun #define stmmac_xpcs_link_up(__priv, __args...) \
603*4882a593Smuzhiyun 	stmmac_do_callback(__priv, xpcs, link_up, __args)
604*4882a593Smuzhiyun #define stmmac_xpcs_probe(__priv, __args...) \
605*4882a593Smuzhiyun 	stmmac_do_callback(__priv, xpcs, probe, __args)
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun struct stmmac_regs_off {
608*4882a593Smuzhiyun 	u32 ptp_off;
609*4882a593Smuzhiyun 	u32 mmc_off;
610*4882a593Smuzhiyun };
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun extern const struct stmmac_ops dwmac100_ops;
613*4882a593Smuzhiyun extern const struct stmmac_dma_ops dwmac100_dma_ops;
614*4882a593Smuzhiyun extern const struct stmmac_ops dwmac1000_ops;
615*4882a593Smuzhiyun extern const struct stmmac_dma_ops dwmac1000_dma_ops;
616*4882a593Smuzhiyun extern const struct stmmac_ops dwmac4_ops;
617*4882a593Smuzhiyun extern const struct stmmac_dma_ops dwmac4_dma_ops;
618*4882a593Smuzhiyun extern const struct stmmac_ops dwmac410_ops;
619*4882a593Smuzhiyun extern const struct stmmac_dma_ops dwmac410_dma_ops;
620*4882a593Smuzhiyun extern const struct stmmac_ops dwmac510_ops;
621*4882a593Smuzhiyun extern const struct stmmac_tc_ops dwmac510_tc_ops;
622*4882a593Smuzhiyun extern const struct stmmac_ops dwxgmac210_ops;
623*4882a593Smuzhiyun extern const struct stmmac_ops dwxlgmac2_ops;
624*4882a593Smuzhiyun extern const struct stmmac_dma_ops dwxgmac210_dma_ops;
625*4882a593Smuzhiyun extern const struct stmmac_desc_ops dwxgmac210_desc_ops;
626*4882a593Smuzhiyun extern const struct stmmac_mmc_ops dwmac_mmc_ops;
627*4882a593Smuzhiyun extern const struct stmmac_mmc_ops dwxgmac_mmc_ops;
628*4882a593Smuzhiyun 
629*4882a593Smuzhiyun #define GMAC_VERSION		0x00000020	/* GMAC CORE Version */
630*4882a593Smuzhiyun #define GMAC4_VERSION		0x00000110	/* GMAC4+ CORE Version */
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun int stmmac_hwif_init(struct stmmac_priv *priv);
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun #endif /* __STMMAC_HWIF_H__ */
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