1*4882a593Smuzhiyun /*======================================================================
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun A PCMCIA ethernet driver for SMC91c92-based cards.
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun This driver supports Megahertz PCMCIA ethernet cards; and
6*4882a593Smuzhiyun Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7*4882a593Smuzhiyun multifunction cards.
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun smc91c92_cs.c 1.122 2002/10/25 06:26:39
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun This driver contains code written by Donald Becker
14*4882a593Smuzhiyun (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15*4882a593Smuzhiyun David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16*4882a593Smuzhiyun (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17*4882a593Smuzhiyun Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18*4882a593Smuzhiyun incorporated some parts of his driver here. I (Dave) wrote most
19*4882a593Smuzhiyun of the PCMCIA glue code, and the Ositech support code. Kelly
20*4882a593Smuzhiyun Stephens (kstephen@holli.com) added support for the Motorola
21*4882a593Smuzhiyun Mariner, with help from Allen Brost.
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun This software may be used and distributed according to the terms of
24*4882a593Smuzhiyun the GNU General Public License, incorporated herein by reference.
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun ======================================================================*/
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include <linux/module.h>
31*4882a593Smuzhiyun #include <linux/kernel.h>
32*4882a593Smuzhiyun #include <linux/slab.h>
33*4882a593Smuzhiyun #include <linux/string.h>
34*4882a593Smuzhiyun #include <linux/timer.h>
35*4882a593Smuzhiyun #include <linux/interrupt.h>
36*4882a593Smuzhiyun #include <linux/delay.h>
37*4882a593Smuzhiyun #include <linux/crc32.h>
38*4882a593Smuzhiyun #include <linux/netdevice.h>
39*4882a593Smuzhiyun #include <linux/etherdevice.h>
40*4882a593Smuzhiyun #include <linux/skbuff.h>
41*4882a593Smuzhiyun #include <linux/if_arp.h>
42*4882a593Smuzhiyun #include <linux/ioport.h>
43*4882a593Smuzhiyun #include <linux/ethtool.h>
44*4882a593Smuzhiyun #include <linux/mii.h>
45*4882a593Smuzhiyun #include <linux/jiffies.h>
46*4882a593Smuzhiyun #include <linux/firmware.h>
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #include <pcmcia/cistpl.h>
49*4882a593Smuzhiyun #include <pcmcia/cisreg.h>
50*4882a593Smuzhiyun #include <pcmcia/ciscode.h>
51*4882a593Smuzhiyun #include <pcmcia/ds.h>
52*4882a593Smuzhiyun #include <pcmcia/ss.h>
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #include <asm/io.h>
55*4882a593Smuzhiyun #include <linux/uaccess.h>
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /*====================================================================*/
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static const char *if_names[] = { "auto", "10baseT", "10base2"};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* Firmware name */
62*4882a593Smuzhiyun #define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* Module parameters */
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
67*4882a593Smuzhiyun MODULE_LICENSE("GPL");
68*4882a593Smuzhiyun MODULE_FIRMWARE(FIRMWARE_NAME);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /*
73*4882a593Smuzhiyun Transceiver/media type.
74*4882a593Smuzhiyun 0 = auto
75*4882a593Smuzhiyun 1 = 10baseT (and autoselect if #define AUTOSELECT),
76*4882a593Smuzhiyun 2 = AUI/10base2,
77*4882a593Smuzhiyun */
78*4882a593Smuzhiyun INT_MODULE_PARM(if_port, 0);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun #define DRV_NAME "smc91c92_cs"
82*4882a593Smuzhiyun #define DRV_VERSION "1.123"
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /*====================================================================*/
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun /* Operational parameter that usually are not changed. */
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /* Time in jiffies before concluding Tx hung */
89*4882a593Smuzhiyun #define TX_TIMEOUT ((400*HZ)/1000)
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
92*4882a593Smuzhiyun #define INTR_WORK 4
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /* Times to check the check the chip before concluding that it doesn't
95*4882a593Smuzhiyun currently have room for another Tx packet. */
96*4882a593Smuzhiyun #define MEMORY_WAIT_TIME 8
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun struct smc_private {
99*4882a593Smuzhiyun struct pcmcia_device *p_dev;
100*4882a593Smuzhiyun spinlock_t lock;
101*4882a593Smuzhiyun u_short manfid;
102*4882a593Smuzhiyun u_short cardid;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun struct sk_buff *saved_skb;
105*4882a593Smuzhiyun int packets_waiting;
106*4882a593Smuzhiyun void __iomem *base;
107*4882a593Smuzhiyun u_short cfg;
108*4882a593Smuzhiyun struct timer_list media;
109*4882a593Smuzhiyun int watchdog, tx_err;
110*4882a593Smuzhiyun u_short media_status;
111*4882a593Smuzhiyun u_short fast_poll;
112*4882a593Smuzhiyun u_short link_status;
113*4882a593Smuzhiyun struct mii_if_info mii_if;
114*4882a593Smuzhiyun int duplex;
115*4882a593Smuzhiyun int rx_ovrn;
116*4882a593Smuzhiyun unsigned long last_rx;
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /* Special definitions for Megahertz multifunction cards */
120*4882a593Smuzhiyun #define MEGAHERTZ_ISR 0x0380
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /* Special function registers for Motorola Mariner */
123*4882a593Smuzhiyun #define MOT_LAN 0x0000
124*4882a593Smuzhiyun #define MOT_UART 0x0020
125*4882a593Smuzhiyun #define MOT_EEPROM 0x20
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun #define MOT_NORMAL \
128*4882a593Smuzhiyun (COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun /* Special function registers for Ositech cards */
131*4882a593Smuzhiyun #define OSITECH_AUI_CTL 0x0c
132*4882a593Smuzhiyun #define OSITECH_PWRDOWN 0x0d
133*4882a593Smuzhiyun #define OSITECH_RESET 0x0e
134*4882a593Smuzhiyun #define OSITECH_ISR 0x0f
135*4882a593Smuzhiyun #define OSITECH_AUI_PWR 0x0c
136*4882a593Smuzhiyun #define OSITECH_RESET_ISR 0x0e
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun #define OSI_AUI_PWR 0x40
139*4882a593Smuzhiyun #define OSI_LAN_PWRDOWN 0x02
140*4882a593Smuzhiyun #define OSI_MODEM_PWRDOWN 0x01
141*4882a593Smuzhiyun #define OSI_LAN_RESET 0x02
142*4882a593Smuzhiyun #define OSI_MODEM_RESET 0x01
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
145*4882a593Smuzhiyun #define BANK_SELECT 14 /* Window select register. */
146*4882a593Smuzhiyun #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun /* Bank 0 registers. */
149*4882a593Smuzhiyun #define TCR 0 /* transmit control register */
150*4882a593Smuzhiyun #define TCR_CLEAR 0 /* do NOTHING */
151*4882a593Smuzhiyun #define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
152*4882a593Smuzhiyun #define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
153*4882a593Smuzhiyun #define TCR_MONCSN 0x0400 /* Monitor Carrier. */
154*4882a593Smuzhiyun #define TCR_FDUPLX 0x0800 /* Full duplex mode. */
155*4882a593Smuzhiyun #define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun #define EPH 2 /* Ethernet Protocol Handler report. */
158*4882a593Smuzhiyun #define EPH_TX_SUC 0x0001
159*4882a593Smuzhiyun #define EPH_SNGLCOL 0x0002
160*4882a593Smuzhiyun #define EPH_MULCOL 0x0004
161*4882a593Smuzhiyun #define EPH_LTX_MULT 0x0008
162*4882a593Smuzhiyun #define EPH_16COL 0x0010
163*4882a593Smuzhiyun #define EPH_SQET 0x0020
164*4882a593Smuzhiyun #define EPH_LTX_BRD 0x0040
165*4882a593Smuzhiyun #define EPH_TX_DEFR 0x0080
166*4882a593Smuzhiyun #define EPH_LAT_COL 0x0200
167*4882a593Smuzhiyun #define EPH_LOST_CAR 0x0400
168*4882a593Smuzhiyun #define EPH_EXC_DEF 0x0800
169*4882a593Smuzhiyun #define EPH_CTR_ROL 0x1000
170*4882a593Smuzhiyun #define EPH_RX_OVRN 0x2000
171*4882a593Smuzhiyun #define EPH_LINK_OK 0x4000
172*4882a593Smuzhiyun #define EPH_TX_UNRN 0x8000
173*4882a593Smuzhiyun #define MEMINFO 8 /* Memory Information Register */
174*4882a593Smuzhiyun #define MEMCFG 10 /* Memory Configuration Register */
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun /* Bank 1 registers. */
177*4882a593Smuzhiyun #define CONFIG 0
178*4882a593Smuzhiyun #define CFG_MII_SELECT 0x8000 /* 91C100 only */
179*4882a593Smuzhiyun #define CFG_NO_WAIT 0x1000
180*4882a593Smuzhiyun #define CFG_FULL_STEP 0x0400
181*4882a593Smuzhiyun #define CFG_SET_SQLCH 0x0200
182*4882a593Smuzhiyun #define CFG_AUI_SELECT 0x0100
183*4882a593Smuzhiyun #define CFG_16BIT 0x0080
184*4882a593Smuzhiyun #define CFG_DIS_LINK 0x0040
185*4882a593Smuzhiyun #define CFG_STATIC 0x0030
186*4882a593Smuzhiyun #define CFG_IRQ_SEL_1 0x0004
187*4882a593Smuzhiyun #define CFG_IRQ_SEL_0 0x0002
188*4882a593Smuzhiyun #define BASE_ADDR 2
189*4882a593Smuzhiyun #define ADDR0 4
190*4882a593Smuzhiyun #define GENERAL 10
191*4882a593Smuzhiyun #define CONTROL 12
192*4882a593Smuzhiyun #define CTL_STORE 0x0001
193*4882a593Smuzhiyun #define CTL_RELOAD 0x0002
194*4882a593Smuzhiyun #define CTL_EE_SELECT 0x0004
195*4882a593Smuzhiyun #define CTL_TE_ENABLE 0x0020
196*4882a593Smuzhiyun #define CTL_CR_ENABLE 0x0040
197*4882a593Smuzhiyun #define CTL_LE_ENABLE 0x0080
198*4882a593Smuzhiyun #define CTL_AUTO_RELEASE 0x0800
199*4882a593Smuzhiyun #define CTL_POWERDOWN 0x2000
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun /* Bank 2 registers. */
202*4882a593Smuzhiyun #define MMU_CMD 0
203*4882a593Smuzhiyun #define MC_ALLOC 0x20 /* or with number of 256 byte packets */
204*4882a593Smuzhiyun #define MC_RESET 0x40
205*4882a593Smuzhiyun #define MC_RELEASE 0x80 /* remove and release the current rx packet */
206*4882a593Smuzhiyun #define MC_FREEPKT 0xA0 /* Release packet in PNR register */
207*4882a593Smuzhiyun #define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
208*4882a593Smuzhiyun #define PNR_ARR 2
209*4882a593Smuzhiyun #define FIFO_PORTS 4
210*4882a593Smuzhiyun #define FP_RXEMPTY 0x8000
211*4882a593Smuzhiyun #define POINTER 6
212*4882a593Smuzhiyun #define PTR_AUTO_INC 0x0040
213*4882a593Smuzhiyun #define PTR_READ 0x2000
214*4882a593Smuzhiyun #define PTR_AUTOINC 0x4000
215*4882a593Smuzhiyun #define PTR_RCV 0x8000
216*4882a593Smuzhiyun #define DATA_1 8
217*4882a593Smuzhiyun #define INTERRUPT 12
218*4882a593Smuzhiyun #define IM_RCV_INT 0x1
219*4882a593Smuzhiyun #define IM_TX_INT 0x2
220*4882a593Smuzhiyun #define IM_TX_EMPTY_INT 0x4
221*4882a593Smuzhiyun #define IM_ALLOC_INT 0x8
222*4882a593Smuzhiyun #define IM_RX_OVRN_INT 0x10
223*4882a593Smuzhiyun #define IM_EPH_INT 0x20
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun #define RCR 4
226*4882a593Smuzhiyun enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
227*4882a593Smuzhiyun RxEnable = 0x0100, RxStripCRC = 0x0200};
228*4882a593Smuzhiyun #define RCR_SOFTRESET 0x8000 /* resets the chip */
229*4882a593Smuzhiyun #define RCR_STRIP_CRC 0x200 /* strips CRC */
230*4882a593Smuzhiyun #define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
231*4882a593Smuzhiyun #define RCR_ALMUL 0x4 /* receive all multicast packets */
232*4882a593Smuzhiyun #define RCR_PROMISC 0x2 /* enable promiscuous mode */
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun /* the normal settings for the RCR register : */
235*4882a593Smuzhiyun #define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
236*4882a593Smuzhiyun #define RCR_CLEAR 0x0 /* set it to a base state */
237*4882a593Smuzhiyun #define COUNTER 6
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /* BANK 3 -- not the same values as in smc9194! */
240*4882a593Smuzhiyun #define MULTICAST0 0
241*4882a593Smuzhiyun #define MULTICAST2 2
242*4882a593Smuzhiyun #define MULTICAST4 4
243*4882a593Smuzhiyun #define MULTICAST6 6
244*4882a593Smuzhiyun #define MGMT 8
245*4882a593Smuzhiyun #define REVISION 0x0a
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun /* Transmit status bits. */
248*4882a593Smuzhiyun #define TS_SUCCESS 0x0001
249*4882a593Smuzhiyun #define TS_16COL 0x0010
250*4882a593Smuzhiyun #define TS_LATCOL 0x0200
251*4882a593Smuzhiyun #define TS_LOSTCAR 0x0400
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun /* Receive status bits. */
254*4882a593Smuzhiyun #define RS_ALGNERR 0x8000
255*4882a593Smuzhiyun #define RS_BADCRC 0x2000
256*4882a593Smuzhiyun #define RS_ODDFRAME 0x1000
257*4882a593Smuzhiyun #define RS_TOOLONG 0x0800
258*4882a593Smuzhiyun #define RS_TOOSHORT 0x0400
259*4882a593Smuzhiyun #define RS_MULTICAST 0x0001
260*4882a593Smuzhiyun #define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun #define set_bits(v, p) outw(inw(p)|(v), (p))
263*4882a593Smuzhiyun #define mask_bits(v, p) outw(inw(p)&(v), (p))
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun /*====================================================================*/
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun static void smc91c92_detach(struct pcmcia_device *p_dev);
268*4882a593Smuzhiyun static int smc91c92_config(struct pcmcia_device *link);
269*4882a593Smuzhiyun static void smc91c92_release(struct pcmcia_device *link);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun static int smc_open(struct net_device *dev);
272*4882a593Smuzhiyun static int smc_close(struct net_device *dev);
273*4882a593Smuzhiyun static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
274*4882a593Smuzhiyun static void smc_tx_timeout(struct net_device *dev, unsigned int txqueue);
275*4882a593Smuzhiyun static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
276*4882a593Smuzhiyun struct net_device *dev);
277*4882a593Smuzhiyun static irqreturn_t smc_interrupt(int irq, void *dev_id);
278*4882a593Smuzhiyun static void smc_rx(struct net_device *dev);
279*4882a593Smuzhiyun static void set_rx_mode(struct net_device *dev);
280*4882a593Smuzhiyun static int s9k_config(struct net_device *dev, struct ifmap *map);
281*4882a593Smuzhiyun static void smc_set_xcvr(struct net_device *dev, int if_port);
282*4882a593Smuzhiyun static void smc_reset(struct net_device *dev);
283*4882a593Smuzhiyun static void media_check(struct timer_list *t);
284*4882a593Smuzhiyun static void mdio_sync(unsigned int addr);
285*4882a593Smuzhiyun static int mdio_read(struct net_device *dev, int phy_id, int loc);
286*4882a593Smuzhiyun static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
287*4882a593Smuzhiyun static int smc_link_ok(struct net_device *dev);
288*4882a593Smuzhiyun static const struct ethtool_ops ethtool_ops;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun static const struct net_device_ops smc_netdev_ops = {
291*4882a593Smuzhiyun .ndo_open = smc_open,
292*4882a593Smuzhiyun .ndo_stop = smc_close,
293*4882a593Smuzhiyun .ndo_start_xmit = smc_start_xmit,
294*4882a593Smuzhiyun .ndo_tx_timeout = smc_tx_timeout,
295*4882a593Smuzhiyun .ndo_set_config = s9k_config,
296*4882a593Smuzhiyun .ndo_set_rx_mode = set_rx_mode,
297*4882a593Smuzhiyun .ndo_do_ioctl = smc_ioctl,
298*4882a593Smuzhiyun .ndo_set_mac_address = eth_mac_addr,
299*4882a593Smuzhiyun .ndo_validate_addr = eth_validate_addr,
300*4882a593Smuzhiyun };
301*4882a593Smuzhiyun
smc91c92_probe(struct pcmcia_device * link)302*4882a593Smuzhiyun static int smc91c92_probe(struct pcmcia_device *link)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun struct smc_private *smc;
305*4882a593Smuzhiyun struct net_device *dev;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun dev_dbg(&link->dev, "smc91c92_attach()\n");
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun /* Create new ethernet device */
310*4882a593Smuzhiyun dev = alloc_etherdev(sizeof(struct smc_private));
311*4882a593Smuzhiyun if (!dev)
312*4882a593Smuzhiyun return -ENOMEM;
313*4882a593Smuzhiyun smc = netdev_priv(dev);
314*4882a593Smuzhiyun smc->p_dev = link;
315*4882a593Smuzhiyun link->priv = dev;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun spin_lock_init(&smc->lock);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun /* The SMC91c92-specific entries in the device structure. */
320*4882a593Smuzhiyun dev->netdev_ops = &smc_netdev_ops;
321*4882a593Smuzhiyun dev->ethtool_ops = ðtool_ops;
322*4882a593Smuzhiyun dev->watchdog_timeo = TX_TIMEOUT;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun smc->mii_if.dev = dev;
325*4882a593Smuzhiyun smc->mii_if.mdio_read = mdio_read;
326*4882a593Smuzhiyun smc->mii_if.mdio_write = mdio_write;
327*4882a593Smuzhiyun smc->mii_if.phy_id_mask = 0x1f;
328*4882a593Smuzhiyun smc->mii_if.reg_num_mask = 0x1f;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun return smc91c92_config(link);
331*4882a593Smuzhiyun } /* smc91c92_attach */
332*4882a593Smuzhiyun
smc91c92_detach(struct pcmcia_device * link)333*4882a593Smuzhiyun static void smc91c92_detach(struct pcmcia_device *link)
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun struct net_device *dev = link->priv;
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun dev_dbg(&link->dev, "smc91c92_detach\n");
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun unregister_netdev(dev);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun smc91c92_release(link);
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun free_netdev(dev);
344*4882a593Smuzhiyun } /* smc91c92_detach */
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /*====================================================================*/
347*4882a593Smuzhiyun
cvt_ascii_address(struct net_device * dev,char * s)348*4882a593Smuzhiyun static int cvt_ascii_address(struct net_device *dev, char *s)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun int i, j, da, c;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun if (strlen(s) != 12)
353*4882a593Smuzhiyun return -1;
354*4882a593Smuzhiyun for (i = 0; i < 6; i++) {
355*4882a593Smuzhiyun da = 0;
356*4882a593Smuzhiyun for (j = 0; j < 2; j++) {
357*4882a593Smuzhiyun c = *s++;
358*4882a593Smuzhiyun da <<= 4;
359*4882a593Smuzhiyun da += ((c >= '0') && (c <= '9')) ?
360*4882a593Smuzhiyun (c - '0') : ((c & 0x0f) + 9);
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun dev->dev_addr[i] = da;
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun return 0;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun /*====================================================================
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun Configuration stuff for Megahertz cards
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun mhz_3288_power() is used to power up a 3288's ethernet chip.
372*4882a593Smuzhiyun mhz_mfc_config() handles socket setup for multifunction (1144
373*4882a593Smuzhiyun and 3288) cards. mhz_setup() gets a card's hardware ethernet
374*4882a593Smuzhiyun address.
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun ======================================================================*/
377*4882a593Smuzhiyun
mhz_3288_power(struct pcmcia_device * link)378*4882a593Smuzhiyun static int mhz_3288_power(struct pcmcia_device *link)
379*4882a593Smuzhiyun {
380*4882a593Smuzhiyun struct net_device *dev = link->priv;
381*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
382*4882a593Smuzhiyun u_char tmp;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun /* Read the ISR twice... */
385*4882a593Smuzhiyun readb(smc->base+MEGAHERTZ_ISR);
386*4882a593Smuzhiyun udelay(5);
387*4882a593Smuzhiyun readb(smc->base+MEGAHERTZ_ISR);
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /* Pause 200ms... */
390*4882a593Smuzhiyun mdelay(200);
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun /* Now read and write the COR... */
393*4882a593Smuzhiyun tmp = readb(smc->base + link->config_base + CISREG_COR);
394*4882a593Smuzhiyun udelay(5);
395*4882a593Smuzhiyun writeb(tmp, smc->base + link->config_base + CISREG_COR);
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun return 0;
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun
mhz_mfc_config_check(struct pcmcia_device * p_dev,void * priv_data)400*4882a593Smuzhiyun static int mhz_mfc_config_check(struct pcmcia_device *p_dev, void *priv_data)
401*4882a593Smuzhiyun {
402*4882a593Smuzhiyun int k;
403*4882a593Smuzhiyun p_dev->io_lines = 16;
404*4882a593Smuzhiyun p_dev->resource[1]->start = p_dev->resource[0]->start;
405*4882a593Smuzhiyun p_dev->resource[1]->end = 8;
406*4882a593Smuzhiyun p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
407*4882a593Smuzhiyun p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
408*4882a593Smuzhiyun p_dev->resource[0]->end = 16;
409*4882a593Smuzhiyun p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
410*4882a593Smuzhiyun p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
411*4882a593Smuzhiyun for (k = 0; k < 0x400; k += 0x10) {
412*4882a593Smuzhiyun if (k & 0x80)
413*4882a593Smuzhiyun continue;
414*4882a593Smuzhiyun p_dev->resource[0]->start = k ^ 0x300;
415*4882a593Smuzhiyun if (!pcmcia_request_io(p_dev))
416*4882a593Smuzhiyun return 0;
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun return -ENODEV;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
mhz_mfc_config(struct pcmcia_device * link)421*4882a593Smuzhiyun static int mhz_mfc_config(struct pcmcia_device *link)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun struct net_device *dev = link->priv;
424*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
425*4882a593Smuzhiyun unsigned int offset;
426*4882a593Smuzhiyun int i;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ |
429*4882a593Smuzhiyun CONF_AUTO_SET_IO;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun /* The Megahertz combo cards have modem-like CIS entries, so
432*4882a593Smuzhiyun we have to explicitly try a bunch of port combinations. */
433*4882a593Smuzhiyun if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
434*4882a593Smuzhiyun return -ENODEV;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun dev->base_addr = link->resource[0]->start;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun /* Allocate a memory window, for accessing the ISR */
439*4882a593Smuzhiyun link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
440*4882a593Smuzhiyun link->resource[2]->start = link->resource[2]->end = 0;
441*4882a593Smuzhiyun i = pcmcia_request_window(link, link->resource[2], 0);
442*4882a593Smuzhiyun if (i != 0)
443*4882a593Smuzhiyun return -ENODEV;
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun smc->base = ioremap(link->resource[2]->start,
446*4882a593Smuzhiyun resource_size(link->resource[2]));
447*4882a593Smuzhiyun offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0;
448*4882a593Smuzhiyun i = pcmcia_map_mem_page(link, link->resource[2], offset);
449*4882a593Smuzhiyun if ((i == 0) &&
450*4882a593Smuzhiyun (smc->manfid == MANFID_MEGAHERTZ) &&
451*4882a593Smuzhiyun (smc->cardid == PRODID_MEGAHERTZ_EM3288))
452*4882a593Smuzhiyun mhz_3288_power(link);
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun return 0;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
pcmcia_get_versmac(struct pcmcia_device * p_dev,tuple_t * tuple,void * priv)457*4882a593Smuzhiyun static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
458*4882a593Smuzhiyun tuple_t *tuple,
459*4882a593Smuzhiyun void *priv)
460*4882a593Smuzhiyun {
461*4882a593Smuzhiyun struct net_device *dev = priv;
462*4882a593Smuzhiyun cisparse_t parse;
463*4882a593Smuzhiyun u8 *buf;
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun if (pcmcia_parse_tuple(tuple, &parse))
466*4882a593Smuzhiyun return -EINVAL;
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun buf = parse.version_1.str + parse.version_1.ofs[3];
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
471*4882a593Smuzhiyun return 0;
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun return -EINVAL;
474*4882a593Smuzhiyun };
475*4882a593Smuzhiyun
mhz_setup(struct pcmcia_device * link)476*4882a593Smuzhiyun static int mhz_setup(struct pcmcia_device *link)
477*4882a593Smuzhiyun {
478*4882a593Smuzhiyun struct net_device *dev = link->priv;
479*4882a593Smuzhiyun size_t len;
480*4882a593Smuzhiyun u8 *buf;
481*4882a593Smuzhiyun int rc;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun /* Read the station address from the CIS. It is stored as the last
484*4882a593Smuzhiyun (fourth) string in the Version 1 Version/ID tuple. */
485*4882a593Smuzhiyun if ((link->prod_id[3]) &&
486*4882a593Smuzhiyun (cvt_ascii_address(dev, link->prod_id[3]) == 0))
487*4882a593Smuzhiyun return 0;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun /* Workarounds for broken cards start here. */
490*4882a593Smuzhiyun /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
491*4882a593Smuzhiyun if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
492*4882a593Smuzhiyun return 0;
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun /* Another possibility: for the EM3288, in a special tuple */
495*4882a593Smuzhiyun rc = -1;
496*4882a593Smuzhiyun len = pcmcia_get_tuple(link, 0x81, &buf);
497*4882a593Smuzhiyun if (buf && len >= 13) {
498*4882a593Smuzhiyun buf[12] = '\0';
499*4882a593Smuzhiyun if (cvt_ascii_address(dev, buf) == 0)
500*4882a593Smuzhiyun rc = 0;
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun kfree(buf);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun return rc;
505*4882a593Smuzhiyun };
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun /*======================================================================
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun Configuration stuff for the Motorola Mariner
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun mot_config() writes directly to the Mariner configuration
512*4882a593Smuzhiyun registers because the CIS is just bogus.
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun ======================================================================*/
515*4882a593Smuzhiyun
mot_config(struct pcmcia_device * link)516*4882a593Smuzhiyun static void mot_config(struct pcmcia_device *link)
517*4882a593Smuzhiyun {
518*4882a593Smuzhiyun struct net_device *dev = link->priv;
519*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
520*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
521*4882a593Smuzhiyun unsigned int iouart = link->resource[1]->start;
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun /* Set UART base address and force map with COR bit 1 */
524*4882a593Smuzhiyun writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
525*4882a593Smuzhiyun writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
526*4882a593Smuzhiyun writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun /* Set SMC base address and force map with COR bit 1 */
529*4882a593Smuzhiyun writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
530*4882a593Smuzhiyun writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
531*4882a593Smuzhiyun writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun /* Wait for things to settle down */
534*4882a593Smuzhiyun mdelay(100);
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun
mot_setup(struct pcmcia_device * link)537*4882a593Smuzhiyun static int mot_setup(struct pcmcia_device *link)
538*4882a593Smuzhiyun {
539*4882a593Smuzhiyun struct net_device *dev = link->priv;
540*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
541*4882a593Smuzhiyun int i, wait, loop;
542*4882a593Smuzhiyun u_int addr;
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun /* Read Ethernet address from Serial EEPROM */
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun for (i = 0; i < 3; i++) {
547*4882a593Smuzhiyun SMC_SELECT_BANK(2);
548*4882a593Smuzhiyun outw(MOT_EEPROM + i, ioaddr + POINTER);
549*4882a593Smuzhiyun SMC_SELECT_BANK(1);
550*4882a593Smuzhiyun outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun for (loop = wait = 0; loop < 200; loop++) {
553*4882a593Smuzhiyun udelay(10);
554*4882a593Smuzhiyun wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
555*4882a593Smuzhiyun if (wait == 0) break;
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun if (wait)
559*4882a593Smuzhiyun return -1;
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun addr = inw(ioaddr + GENERAL);
562*4882a593Smuzhiyun dev->dev_addr[2*i] = addr & 0xff;
563*4882a593Smuzhiyun dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun return 0;
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun /*====================================================================*/
570*4882a593Smuzhiyun
smc_configcheck(struct pcmcia_device * p_dev,void * priv_data)571*4882a593Smuzhiyun static int smc_configcheck(struct pcmcia_device *p_dev, void *priv_data)
572*4882a593Smuzhiyun {
573*4882a593Smuzhiyun p_dev->resource[0]->end = 16;
574*4882a593Smuzhiyun p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
575*4882a593Smuzhiyun p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun return pcmcia_request_io(p_dev);
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun
smc_config(struct pcmcia_device * link)580*4882a593Smuzhiyun static int smc_config(struct pcmcia_device *link)
581*4882a593Smuzhiyun {
582*4882a593Smuzhiyun struct net_device *dev = link->priv;
583*4882a593Smuzhiyun int i;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun i = pcmcia_loop_config(link, smc_configcheck, NULL);
588*4882a593Smuzhiyun if (!i)
589*4882a593Smuzhiyun dev->base_addr = link->resource[0]->start;
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun return i;
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun
smc_setup(struct pcmcia_device * link)595*4882a593Smuzhiyun static int smc_setup(struct pcmcia_device *link)
596*4882a593Smuzhiyun {
597*4882a593Smuzhiyun struct net_device *dev = link->priv;
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun /* Check for a LAN function extension tuple */
600*4882a593Smuzhiyun if (!pcmcia_get_mac_from_cis(link, dev))
601*4882a593Smuzhiyun return 0;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun /* Try the third string in the Version 1 Version/ID tuple. */
604*4882a593Smuzhiyun if (link->prod_id[2]) {
605*4882a593Smuzhiyun if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
606*4882a593Smuzhiyun return 0;
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun return -1;
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun /*====================================================================*/
612*4882a593Smuzhiyun
osi_config(struct pcmcia_device * link)613*4882a593Smuzhiyun static int osi_config(struct pcmcia_device *link)
614*4882a593Smuzhiyun {
615*4882a593Smuzhiyun struct net_device *dev = link->priv;
616*4882a593Smuzhiyun static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
617*4882a593Smuzhiyun int i, j;
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ;
620*4882a593Smuzhiyun link->resource[0]->end = 64;
621*4882a593Smuzhiyun link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
622*4882a593Smuzhiyun link->resource[1]->end = 8;
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun /* Enable Hard Decode, LAN, Modem */
625*4882a593Smuzhiyun link->io_lines = 16;
626*4882a593Smuzhiyun link->config_index = 0x23;
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun for (i = j = 0; j < 4; j++) {
629*4882a593Smuzhiyun link->resource[1]->start = com[j];
630*4882a593Smuzhiyun i = pcmcia_request_io(link);
631*4882a593Smuzhiyun if (i == 0)
632*4882a593Smuzhiyun break;
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun if (i != 0) {
635*4882a593Smuzhiyun /* Fallback: turn off hard decode */
636*4882a593Smuzhiyun link->config_index = 0x03;
637*4882a593Smuzhiyun link->resource[1]->end = 0;
638*4882a593Smuzhiyun i = pcmcia_request_io(link);
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun dev->base_addr = link->resource[0]->start + 0x10;
641*4882a593Smuzhiyun return i;
642*4882a593Smuzhiyun }
643*4882a593Smuzhiyun
osi_load_firmware(struct pcmcia_device * link)644*4882a593Smuzhiyun static int osi_load_firmware(struct pcmcia_device *link)
645*4882a593Smuzhiyun {
646*4882a593Smuzhiyun const struct firmware *fw;
647*4882a593Smuzhiyun int i, err;
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
650*4882a593Smuzhiyun if (err) {
651*4882a593Smuzhiyun pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
652*4882a593Smuzhiyun return err;
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun /* Download the Seven of Diamonds firmware */
656*4882a593Smuzhiyun for (i = 0; i < fw->size; i++) {
657*4882a593Smuzhiyun outb(fw->data[i], link->resource[0]->start + 2);
658*4882a593Smuzhiyun udelay(50);
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun release_firmware(fw);
661*4882a593Smuzhiyun return err;
662*4882a593Smuzhiyun }
663*4882a593Smuzhiyun
pcmcia_osi_mac(struct pcmcia_device * p_dev,tuple_t * tuple,void * priv)664*4882a593Smuzhiyun static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
665*4882a593Smuzhiyun tuple_t *tuple,
666*4882a593Smuzhiyun void *priv)
667*4882a593Smuzhiyun {
668*4882a593Smuzhiyun struct net_device *dev = priv;
669*4882a593Smuzhiyun int i;
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun if (tuple->TupleDataLen < 8)
672*4882a593Smuzhiyun return -EINVAL;
673*4882a593Smuzhiyun if (tuple->TupleData[0] != 0x04)
674*4882a593Smuzhiyun return -EINVAL;
675*4882a593Smuzhiyun for (i = 0; i < 6; i++)
676*4882a593Smuzhiyun dev->dev_addr[i] = tuple->TupleData[i+2];
677*4882a593Smuzhiyun return 0;
678*4882a593Smuzhiyun };
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun
osi_setup(struct pcmcia_device * link,u_short manfid,u_short cardid)681*4882a593Smuzhiyun static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
682*4882a593Smuzhiyun {
683*4882a593Smuzhiyun struct net_device *dev = link->priv;
684*4882a593Smuzhiyun int rc;
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun /* Read the station address from tuple 0x90, subtuple 0x04 */
687*4882a593Smuzhiyun if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
688*4882a593Smuzhiyun return -1;
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun if (((manfid == MANFID_OSITECH) &&
691*4882a593Smuzhiyun (cardid == PRODID_OSITECH_SEVEN)) ||
692*4882a593Smuzhiyun ((manfid == MANFID_PSION) &&
693*4882a593Smuzhiyun (cardid == PRODID_PSION_NET100))) {
694*4882a593Smuzhiyun rc = osi_load_firmware(link);
695*4882a593Smuzhiyun if (rc)
696*4882a593Smuzhiyun return rc;
697*4882a593Smuzhiyun } else if (manfid == MANFID_OSITECH) {
698*4882a593Smuzhiyun /* Make sure both functions are powered up */
699*4882a593Smuzhiyun set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
700*4882a593Smuzhiyun /* Now, turn on the interrupt for both card functions */
701*4882a593Smuzhiyun set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
702*4882a593Smuzhiyun dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
703*4882a593Smuzhiyun inw(link->resource[0]->start + OSITECH_AUI_PWR),
704*4882a593Smuzhiyun inw(link->resource[0]->start + OSITECH_RESET_ISR));
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun return 0;
707*4882a593Smuzhiyun }
708*4882a593Smuzhiyun
smc91c92_suspend(struct pcmcia_device * link)709*4882a593Smuzhiyun static int smc91c92_suspend(struct pcmcia_device *link)
710*4882a593Smuzhiyun {
711*4882a593Smuzhiyun struct net_device *dev = link->priv;
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun if (link->open)
714*4882a593Smuzhiyun netif_device_detach(dev);
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun return 0;
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun
smc91c92_resume(struct pcmcia_device * link)719*4882a593Smuzhiyun static int smc91c92_resume(struct pcmcia_device *link)
720*4882a593Smuzhiyun {
721*4882a593Smuzhiyun struct net_device *dev = link->priv;
722*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
723*4882a593Smuzhiyun int i;
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun if ((smc->manfid == MANFID_MEGAHERTZ) &&
726*4882a593Smuzhiyun (smc->cardid == PRODID_MEGAHERTZ_EM3288))
727*4882a593Smuzhiyun mhz_3288_power(link);
728*4882a593Smuzhiyun if (smc->manfid == MANFID_MOTOROLA)
729*4882a593Smuzhiyun mot_config(link);
730*4882a593Smuzhiyun if ((smc->manfid == MANFID_OSITECH) &&
731*4882a593Smuzhiyun (smc->cardid != PRODID_OSITECH_SEVEN)) {
732*4882a593Smuzhiyun /* Power up the card and enable interrupts */
733*4882a593Smuzhiyun set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
734*4882a593Smuzhiyun set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
735*4882a593Smuzhiyun }
736*4882a593Smuzhiyun if (((smc->manfid == MANFID_OSITECH) &&
737*4882a593Smuzhiyun (smc->cardid == PRODID_OSITECH_SEVEN)) ||
738*4882a593Smuzhiyun ((smc->manfid == MANFID_PSION) &&
739*4882a593Smuzhiyun (smc->cardid == PRODID_PSION_NET100))) {
740*4882a593Smuzhiyun i = osi_load_firmware(link);
741*4882a593Smuzhiyun if (i) {
742*4882a593Smuzhiyun netdev_err(dev, "Failed to load firmware\n");
743*4882a593Smuzhiyun return i;
744*4882a593Smuzhiyun }
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun if (link->open) {
747*4882a593Smuzhiyun smc_reset(dev);
748*4882a593Smuzhiyun netif_device_attach(dev);
749*4882a593Smuzhiyun }
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun return 0;
752*4882a593Smuzhiyun }
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun /*======================================================================
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun This verifies that the chip is some SMC91cXX variant, and returns
758*4882a593Smuzhiyun the revision code if successful. Otherwise, it returns -ENODEV.
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun ======================================================================*/
761*4882a593Smuzhiyun
check_sig(struct pcmcia_device * link)762*4882a593Smuzhiyun static int check_sig(struct pcmcia_device *link)
763*4882a593Smuzhiyun {
764*4882a593Smuzhiyun struct net_device *dev = link->priv;
765*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
766*4882a593Smuzhiyun int width;
767*4882a593Smuzhiyun u_short s;
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun SMC_SELECT_BANK(1);
770*4882a593Smuzhiyun if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
771*4882a593Smuzhiyun /* Try powering up the chip */
772*4882a593Smuzhiyun outw(0, ioaddr + CONTROL);
773*4882a593Smuzhiyun mdelay(55);
774*4882a593Smuzhiyun }
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun /* Try setting bus width */
777*4882a593Smuzhiyun width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
778*4882a593Smuzhiyun s = inb(ioaddr + CONFIG);
779*4882a593Smuzhiyun if (width)
780*4882a593Smuzhiyun s |= CFG_16BIT;
781*4882a593Smuzhiyun else
782*4882a593Smuzhiyun s &= ~CFG_16BIT;
783*4882a593Smuzhiyun outb(s, ioaddr + CONFIG);
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun /* Check Base Address Register to make sure bus width is OK */
786*4882a593Smuzhiyun s = inw(ioaddr + BASE_ADDR);
787*4882a593Smuzhiyun if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
788*4882a593Smuzhiyun ((s >> 8) != (s & 0xff))) {
789*4882a593Smuzhiyun SMC_SELECT_BANK(3);
790*4882a593Smuzhiyun s = inw(ioaddr + REVISION);
791*4882a593Smuzhiyun return s & 0xff;
792*4882a593Smuzhiyun }
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun if (width) {
795*4882a593Smuzhiyun netdev_info(dev, "using 8-bit IO window\n");
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun smc91c92_suspend(link);
798*4882a593Smuzhiyun pcmcia_fixup_iowidth(link);
799*4882a593Smuzhiyun smc91c92_resume(link);
800*4882a593Smuzhiyun return check_sig(link);
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun return -ENODEV;
803*4882a593Smuzhiyun }
804*4882a593Smuzhiyun
smc91c92_config(struct pcmcia_device * link)805*4882a593Smuzhiyun static int smc91c92_config(struct pcmcia_device *link)
806*4882a593Smuzhiyun {
807*4882a593Smuzhiyun struct net_device *dev = link->priv;
808*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
809*4882a593Smuzhiyun char *name;
810*4882a593Smuzhiyun int i, rev, j = 0;
811*4882a593Smuzhiyun unsigned int ioaddr;
812*4882a593Smuzhiyun u_long mir;
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun dev_dbg(&link->dev, "smc91c92_config\n");
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun smc->manfid = link->manf_id;
817*4882a593Smuzhiyun smc->cardid = link->card_id;
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun if ((smc->manfid == MANFID_OSITECH) &&
820*4882a593Smuzhiyun (smc->cardid != PRODID_OSITECH_SEVEN)) {
821*4882a593Smuzhiyun i = osi_config(link);
822*4882a593Smuzhiyun } else if ((smc->manfid == MANFID_MOTOROLA) ||
823*4882a593Smuzhiyun ((smc->manfid == MANFID_MEGAHERTZ) &&
824*4882a593Smuzhiyun ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
825*4882a593Smuzhiyun (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
826*4882a593Smuzhiyun i = mhz_mfc_config(link);
827*4882a593Smuzhiyun } else {
828*4882a593Smuzhiyun i = smc_config(link);
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun if (i)
831*4882a593Smuzhiyun goto config_failed;
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun i = pcmcia_request_irq(link, smc_interrupt);
834*4882a593Smuzhiyun if (i)
835*4882a593Smuzhiyun goto config_failed;
836*4882a593Smuzhiyun i = pcmcia_enable_device(link);
837*4882a593Smuzhiyun if (i)
838*4882a593Smuzhiyun goto config_failed;
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun if (smc->manfid == MANFID_MOTOROLA)
841*4882a593Smuzhiyun mot_config(link);
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun dev->irq = link->irq;
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun if ((if_port >= 0) && (if_port <= 2))
846*4882a593Smuzhiyun dev->if_port = if_port;
847*4882a593Smuzhiyun else
848*4882a593Smuzhiyun dev_notice(&link->dev, "invalid if_port requested\n");
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun switch (smc->manfid) {
851*4882a593Smuzhiyun case MANFID_OSITECH:
852*4882a593Smuzhiyun case MANFID_PSION:
853*4882a593Smuzhiyun i = osi_setup(link, smc->manfid, smc->cardid); break;
854*4882a593Smuzhiyun case MANFID_SMC:
855*4882a593Smuzhiyun case MANFID_NEW_MEDIA:
856*4882a593Smuzhiyun i = smc_setup(link); break;
857*4882a593Smuzhiyun case 0x128: /* For broken Megahertz cards */
858*4882a593Smuzhiyun case MANFID_MEGAHERTZ:
859*4882a593Smuzhiyun i = mhz_setup(link); break;
860*4882a593Smuzhiyun case MANFID_MOTOROLA:
861*4882a593Smuzhiyun default: /* get the hw address from EEPROM */
862*4882a593Smuzhiyun i = mot_setup(link); break;
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun if (i != 0) {
866*4882a593Smuzhiyun dev_notice(&link->dev, "Unable to find hardware address.\n");
867*4882a593Smuzhiyun goto config_failed;
868*4882a593Smuzhiyun }
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun smc->duplex = 0;
871*4882a593Smuzhiyun smc->rx_ovrn = 0;
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun rev = check_sig(link);
874*4882a593Smuzhiyun name = "???";
875*4882a593Smuzhiyun if (rev > 0)
876*4882a593Smuzhiyun switch (rev >> 4) {
877*4882a593Smuzhiyun case 3: name = "92"; break;
878*4882a593Smuzhiyun case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
879*4882a593Smuzhiyun case 5: name = "95"; break;
880*4882a593Smuzhiyun case 7: name = "100"; break;
881*4882a593Smuzhiyun case 8: name = "100-FD"; break;
882*4882a593Smuzhiyun case 9: name = "110"; break;
883*4882a593Smuzhiyun }
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun ioaddr = dev->base_addr;
886*4882a593Smuzhiyun if (rev > 0) {
887*4882a593Smuzhiyun u_long mcr;
888*4882a593Smuzhiyun SMC_SELECT_BANK(0);
889*4882a593Smuzhiyun mir = inw(ioaddr + MEMINFO) & 0xff;
890*4882a593Smuzhiyun if (mir == 0xff) mir++;
891*4882a593Smuzhiyun /* Get scale factor for memory size */
892*4882a593Smuzhiyun mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
893*4882a593Smuzhiyun mir *= 128 * (1<<((mcr >> 9) & 7));
894*4882a593Smuzhiyun SMC_SELECT_BANK(1);
895*4882a593Smuzhiyun smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
896*4882a593Smuzhiyun smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
897*4882a593Smuzhiyun if (smc->manfid == MANFID_OSITECH)
898*4882a593Smuzhiyun smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
899*4882a593Smuzhiyun if ((rev >> 4) >= 7)
900*4882a593Smuzhiyun smc->cfg |= CFG_MII_SELECT;
901*4882a593Smuzhiyun } else
902*4882a593Smuzhiyun mir = 0;
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun if (smc->cfg & CFG_MII_SELECT) {
905*4882a593Smuzhiyun SMC_SELECT_BANK(3);
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun for (i = 0; i < 32; i++) {
908*4882a593Smuzhiyun j = mdio_read(dev, i, 1);
909*4882a593Smuzhiyun if ((j != 0) && (j != 0xffff)) break;
910*4882a593Smuzhiyun }
911*4882a593Smuzhiyun smc->mii_if.phy_id = (i < 32) ? i : -1;
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun SMC_SELECT_BANK(0);
914*4882a593Smuzhiyun }
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun SET_NETDEV_DEV(dev, &link->dev);
917*4882a593Smuzhiyun
918*4882a593Smuzhiyun if (register_netdev(dev) != 0) {
919*4882a593Smuzhiyun dev_err(&link->dev, "register_netdev() failed\n");
920*4882a593Smuzhiyun goto config_undo;
921*4882a593Smuzhiyun }
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun netdev_info(dev, "smc91c%s rev %d: io %#3lx, irq %d, hw_addr %pM\n",
924*4882a593Smuzhiyun name, (rev & 0x0f), dev->base_addr, dev->irq, dev->dev_addr);
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun if (rev > 0) {
927*4882a593Smuzhiyun if (mir & 0x3ff)
928*4882a593Smuzhiyun netdev_info(dev, " %lu byte", mir);
929*4882a593Smuzhiyun else
930*4882a593Smuzhiyun netdev_info(dev, " %lu kb", mir>>10);
931*4882a593Smuzhiyun pr_cont(" buffer, %s xcvr\n",
932*4882a593Smuzhiyun (smc->cfg & CFG_MII_SELECT) ? "MII" : if_names[dev->if_port]);
933*4882a593Smuzhiyun }
934*4882a593Smuzhiyun
935*4882a593Smuzhiyun if (smc->cfg & CFG_MII_SELECT) {
936*4882a593Smuzhiyun if (smc->mii_if.phy_id != -1) {
937*4882a593Smuzhiyun netdev_dbg(dev, " MII transceiver at index %d, status %x\n",
938*4882a593Smuzhiyun smc->mii_if.phy_id, j);
939*4882a593Smuzhiyun } else {
940*4882a593Smuzhiyun netdev_notice(dev, " No MII transceivers found!\n");
941*4882a593Smuzhiyun }
942*4882a593Smuzhiyun }
943*4882a593Smuzhiyun return 0;
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun config_undo:
946*4882a593Smuzhiyun unregister_netdev(dev);
947*4882a593Smuzhiyun config_failed:
948*4882a593Smuzhiyun smc91c92_release(link);
949*4882a593Smuzhiyun free_netdev(dev);
950*4882a593Smuzhiyun return -ENODEV;
951*4882a593Smuzhiyun } /* smc91c92_config */
952*4882a593Smuzhiyun
smc91c92_release(struct pcmcia_device * link)953*4882a593Smuzhiyun static void smc91c92_release(struct pcmcia_device *link)
954*4882a593Smuzhiyun {
955*4882a593Smuzhiyun dev_dbg(&link->dev, "smc91c92_release\n");
956*4882a593Smuzhiyun if (link->resource[2]->end) {
957*4882a593Smuzhiyun struct net_device *dev = link->priv;
958*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
959*4882a593Smuzhiyun iounmap(smc->base);
960*4882a593Smuzhiyun }
961*4882a593Smuzhiyun pcmcia_disable_device(link);
962*4882a593Smuzhiyun }
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun /*======================================================================
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun MII interface support for SMC91cXX based cards
967*4882a593Smuzhiyun ======================================================================*/
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun #define MDIO_SHIFT_CLK 0x04
970*4882a593Smuzhiyun #define MDIO_DATA_OUT 0x01
971*4882a593Smuzhiyun #define MDIO_DIR_WRITE 0x08
972*4882a593Smuzhiyun #define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
973*4882a593Smuzhiyun #define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
974*4882a593Smuzhiyun #define MDIO_DATA_READ 0x02
975*4882a593Smuzhiyun
mdio_sync(unsigned int addr)976*4882a593Smuzhiyun static void mdio_sync(unsigned int addr)
977*4882a593Smuzhiyun {
978*4882a593Smuzhiyun int bits;
979*4882a593Smuzhiyun for (bits = 0; bits < 32; bits++) {
980*4882a593Smuzhiyun outb(MDIO_DATA_WRITE1, addr);
981*4882a593Smuzhiyun outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
982*4882a593Smuzhiyun }
983*4882a593Smuzhiyun }
984*4882a593Smuzhiyun
mdio_read(struct net_device * dev,int phy_id,int loc)985*4882a593Smuzhiyun static int mdio_read(struct net_device *dev, int phy_id, int loc)
986*4882a593Smuzhiyun {
987*4882a593Smuzhiyun unsigned int addr = dev->base_addr + MGMT;
988*4882a593Smuzhiyun u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
989*4882a593Smuzhiyun int i, retval = 0;
990*4882a593Smuzhiyun
991*4882a593Smuzhiyun mdio_sync(addr);
992*4882a593Smuzhiyun for (i = 13; i >= 0; i--) {
993*4882a593Smuzhiyun int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
994*4882a593Smuzhiyun outb(dat, addr);
995*4882a593Smuzhiyun outb(dat | MDIO_SHIFT_CLK, addr);
996*4882a593Smuzhiyun }
997*4882a593Smuzhiyun for (i = 19; i > 0; i--) {
998*4882a593Smuzhiyun outb(0, addr);
999*4882a593Smuzhiyun retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1000*4882a593Smuzhiyun outb(MDIO_SHIFT_CLK, addr);
1001*4882a593Smuzhiyun }
1002*4882a593Smuzhiyun return (retval>>1) & 0xffff;
1003*4882a593Smuzhiyun }
1004*4882a593Smuzhiyun
mdio_write(struct net_device * dev,int phy_id,int loc,int value)1005*4882a593Smuzhiyun static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1006*4882a593Smuzhiyun {
1007*4882a593Smuzhiyun unsigned int addr = dev->base_addr + MGMT;
1008*4882a593Smuzhiyun u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1009*4882a593Smuzhiyun int i;
1010*4882a593Smuzhiyun
1011*4882a593Smuzhiyun mdio_sync(addr);
1012*4882a593Smuzhiyun for (i = 31; i >= 0; i--) {
1013*4882a593Smuzhiyun int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1014*4882a593Smuzhiyun outb(dat, addr);
1015*4882a593Smuzhiyun outb(dat | MDIO_SHIFT_CLK, addr);
1016*4882a593Smuzhiyun }
1017*4882a593Smuzhiyun for (i = 1; i >= 0; i--) {
1018*4882a593Smuzhiyun outb(0, addr);
1019*4882a593Smuzhiyun outb(MDIO_SHIFT_CLK, addr);
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun /*======================================================================
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun The driver core code, most of which should be common with a
1026*4882a593Smuzhiyun non-PCMCIA implementation.
1027*4882a593Smuzhiyun
1028*4882a593Smuzhiyun ======================================================================*/
1029*4882a593Smuzhiyun
1030*4882a593Smuzhiyun #ifdef PCMCIA_DEBUG
smc_dump(struct net_device * dev)1031*4882a593Smuzhiyun static void smc_dump(struct net_device *dev)
1032*4882a593Smuzhiyun {
1033*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1034*4882a593Smuzhiyun u_short i, w, save;
1035*4882a593Smuzhiyun save = inw(ioaddr + BANK_SELECT);
1036*4882a593Smuzhiyun for (w = 0; w < 4; w++) {
1037*4882a593Smuzhiyun SMC_SELECT_BANK(w);
1038*4882a593Smuzhiyun netdev_dbg(dev, "bank %d: ", w);
1039*4882a593Smuzhiyun for (i = 0; i < 14; i += 2)
1040*4882a593Smuzhiyun pr_cont(" %04x", inw(ioaddr + i));
1041*4882a593Smuzhiyun pr_cont("\n");
1042*4882a593Smuzhiyun }
1043*4882a593Smuzhiyun outw(save, ioaddr + BANK_SELECT);
1044*4882a593Smuzhiyun }
1045*4882a593Smuzhiyun #endif
1046*4882a593Smuzhiyun
smc_open(struct net_device * dev)1047*4882a593Smuzhiyun static int smc_open(struct net_device *dev)
1048*4882a593Smuzhiyun {
1049*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1050*4882a593Smuzhiyun struct pcmcia_device *link = smc->p_dev;
1051*4882a593Smuzhiyun
1052*4882a593Smuzhiyun dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1053*4882a593Smuzhiyun dev->name, dev, inw(dev->base_addr + BANK_SELECT));
1054*4882a593Smuzhiyun #ifdef PCMCIA_DEBUG
1055*4882a593Smuzhiyun smc_dump(dev);
1056*4882a593Smuzhiyun #endif
1057*4882a593Smuzhiyun
1058*4882a593Smuzhiyun /* Check that the PCMCIA card is still here. */
1059*4882a593Smuzhiyun if (!pcmcia_dev_present(link))
1060*4882a593Smuzhiyun return -ENODEV;
1061*4882a593Smuzhiyun /* Physical device present signature. */
1062*4882a593Smuzhiyun if (check_sig(link) < 0) {
1063*4882a593Smuzhiyun netdev_info(dev, "Yikes! Bad chip signature!\n");
1064*4882a593Smuzhiyun return -ENODEV;
1065*4882a593Smuzhiyun }
1066*4882a593Smuzhiyun link->open++;
1067*4882a593Smuzhiyun
1068*4882a593Smuzhiyun netif_start_queue(dev);
1069*4882a593Smuzhiyun smc->saved_skb = NULL;
1070*4882a593Smuzhiyun smc->packets_waiting = 0;
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun smc_reset(dev);
1073*4882a593Smuzhiyun timer_setup(&smc->media, media_check, 0);
1074*4882a593Smuzhiyun mod_timer(&smc->media, jiffies + HZ);
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun return 0;
1077*4882a593Smuzhiyun } /* smc_open */
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun /*====================================================================*/
1080*4882a593Smuzhiyun
smc_close(struct net_device * dev)1081*4882a593Smuzhiyun static int smc_close(struct net_device *dev)
1082*4882a593Smuzhiyun {
1083*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1084*4882a593Smuzhiyun struct pcmcia_device *link = smc->p_dev;
1085*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1088*4882a593Smuzhiyun dev->name, inw(ioaddr + BANK_SELECT));
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun netif_stop_queue(dev);
1091*4882a593Smuzhiyun
1092*4882a593Smuzhiyun /* Shut off all interrupts, and turn off the Tx and Rx sections.
1093*4882a593Smuzhiyun Don't bother to check for chip present. */
1094*4882a593Smuzhiyun SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1095*4882a593Smuzhiyun outw(0, ioaddr + INTERRUPT);
1096*4882a593Smuzhiyun SMC_SELECT_BANK(0);
1097*4882a593Smuzhiyun mask_bits(0xff00, ioaddr + RCR);
1098*4882a593Smuzhiyun mask_bits(0xff00, ioaddr + TCR);
1099*4882a593Smuzhiyun
1100*4882a593Smuzhiyun /* Put the chip into power-down mode. */
1101*4882a593Smuzhiyun SMC_SELECT_BANK(1);
1102*4882a593Smuzhiyun outw(CTL_POWERDOWN, ioaddr + CONTROL );
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun link->open--;
1105*4882a593Smuzhiyun del_timer_sync(&smc->media);
1106*4882a593Smuzhiyun
1107*4882a593Smuzhiyun return 0;
1108*4882a593Smuzhiyun } /* smc_close */
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun /*======================================================================
1111*4882a593Smuzhiyun
1112*4882a593Smuzhiyun Transfer a packet to the hardware and trigger the packet send.
1113*4882a593Smuzhiyun This may be called at either from either the Tx queue code
1114*4882a593Smuzhiyun or the interrupt handler.
1115*4882a593Smuzhiyun
1116*4882a593Smuzhiyun ======================================================================*/
1117*4882a593Smuzhiyun
smc_hardware_send_packet(struct net_device * dev)1118*4882a593Smuzhiyun static void smc_hardware_send_packet(struct net_device * dev)
1119*4882a593Smuzhiyun {
1120*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1121*4882a593Smuzhiyun struct sk_buff *skb = smc->saved_skb;
1122*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1123*4882a593Smuzhiyun u_char packet_no;
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun if (!skb) {
1126*4882a593Smuzhiyun netdev_err(dev, "In XMIT with no packet to send\n");
1127*4882a593Smuzhiyun return;
1128*4882a593Smuzhiyun }
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun /* There should be a packet slot waiting. */
1131*4882a593Smuzhiyun packet_no = inw(ioaddr + PNR_ARR) >> 8;
1132*4882a593Smuzhiyun if (packet_no & 0x80) {
1133*4882a593Smuzhiyun /* If not, there is a hardware problem! Likely an ejected card. */
1134*4882a593Smuzhiyun netdev_warn(dev, "hardware Tx buffer allocation failed, status %#2.2x\n",
1135*4882a593Smuzhiyun packet_no);
1136*4882a593Smuzhiyun dev_kfree_skb_irq(skb);
1137*4882a593Smuzhiyun smc->saved_skb = NULL;
1138*4882a593Smuzhiyun netif_start_queue(dev);
1139*4882a593Smuzhiyun return;
1140*4882a593Smuzhiyun }
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun dev->stats.tx_bytes += skb->len;
1143*4882a593Smuzhiyun /* The card should use the just-allocated buffer. */
1144*4882a593Smuzhiyun outw(packet_no, ioaddr + PNR_ARR);
1145*4882a593Smuzhiyun /* point to the beginning of the packet */
1146*4882a593Smuzhiyun outw(PTR_AUTOINC , ioaddr + POINTER);
1147*4882a593Smuzhiyun
1148*4882a593Smuzhiyun /* Send the packet length (+6 for status, length and ctl byte)
1149*4882a593Smuzhiyun and the status word (set to zeros). */
1150*4882a593Smuzhiyun {
1151*4882a593Smuzhiyun u_char *buf = skb->data;
1152*4882a593Smuzhiyun u_int length = skb->len; /* The chip will pad to ethernet min. */
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun netdev_dbg(dev, "Trying to xmit packet of length %d\n", length);
1155*4882a593Smuzhiyun
1156*4882a593Smuzhiyun /* send the packet length: +6 for status word, length, and ctl */
1157*4882a593Smuzhiyun outw(0, ioaddr + DATA_1);
1158*4882a593Smuzhiyun outw(length + 6, ioaddr + DATA_1);
1159*4882a593Smuzhiyun outsw(ioaddr + DATA_1, buf, length >> 1);
1160*4882a593Smuzhiyun
1161*4882a593Smuzhiyun /* The odd last byte, if there is one, goes in the control word. */
1162*4882a593Smuzhiyun outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1163*4882a593Smuzhiyun }
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1166*4882a593Smuzhiyun outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1167*4882a593Smuzhiyun (inw(ioaddr + INTERRUPT) & 0xff00),
1168*4882a593Smuzhiyun ioaddr + INTERRUPT);
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun /* The chip does the rest of the work. */
1171*4882a593Smuzhiyun outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun smc->saved_skb = NULL;
1174*4882a593Smuzhiyun dev_kfree_skb_irq(skb);
1175*4882a593Smuzhiyun netif_trans_update(dev);
1176*4882a593Smuzhiyun netif_start_queue(dev);
1177*4882a593Smuzhiyun }
1178*4882a593Smuzhiyun
1179*4882a593Smuzhiyun /*====================================================================*/
1180*4882a593Smuzhiyun
smc_tx_timeout(struct net_device * dev,unsigned int txqueue)1181*4882a593Smuzhiyun static void smc_tx_timeout(struct net_device *dev, unsigned int txqueue)
1182*4882a593Smuzhiyun {
1183*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1184*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1185*4882a593Smuzhiyun
1186*4882a593Smuzhiyun netdev_notice(dev, "transmit timed out, Tx_status %2.2x status %4.4x.\n",
1187*4882a593Smuzhiyun inw(ioaddr)&0xff, inw(ioaddr + 2));
1188*4882a593Smuzhiyun dev->stats.tx_errors++;
1189*4882a593Smuzhiyun smc_reset(dev);
1190*4882a593Smuzhiyun netif_trans_update(dev); /* prevent tx timeout */
1191*4882a593Smuzhiyun smc->saved_skb = NULL;
1192*4882a593Smuzhiyun netif_wake_queue(dev);
1193*4882a593Smuzhiyun }
1194*4882a593Smuzhiyun
smc_start_xmit(struct sk_buff * skb,struct net_device * dev)1195*4882a593Smuzhiyun static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1196*4882a593Smuzhiyun struct net_device *dev)
1197*4882a593Smuzhiyun {
1198*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1199*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1200*4882a593Smuzhiyun u_short num_pages;
1201*4882a593Smuzhiyun short time_out, ir;
1202*4882a593Smuzhiyun unsigned long flags;
1203*4882a593Smuzhiyun
1204*4882a593Smuzhiyun netif_stop_queue(dev);
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun netdev_dbg(dev, "smc_start_xmit(length = %d) called, status %04x\n",
1207*4882a593Smuzhiyun skb->len, inw(ioaddr + 2));
1208*4882a593Smuzhiyun
1209*4882a593Smuzhiyun if (smc->saved_skb) {
1210*4882a593Smuzhiyun /* THIS SHOULD NEVER HAPPEN. */
1211*4882a593Smuzhiyun dev->stats.tx_aborted_errors++;
1212*4882a593Smuzhiyun netdev_dbg(dev, "Internal error -- sent packet while busy\n");
1213*4882a593Smuzhiyun return NETDEV_TX_BUSY;
1214*4882a593Smuzhiyun }
1215*4882a593Smuzhiyun smc->saved_skb = skb;
1216*4882a593Smuzhiyun
1217*4882a593Smuzhiyun num_pages = skb->len >> 8;
1218*4882a593Smuzhiyun
1219*4882a593Smuzhiyun if (num_pages > 7) {
1220*4882a593Smuzhiyun netdev_err(dev, "Far too big packet error: %d pages\n", num_pages);
1221*4882a593Smuzhiyun dev_kfree_skb (skb);
1222*4882a593Smuzhiyun smc->saved_skb = NULL;
1223*4882a593Smuzhiyun dev->stats.tx_dropped++;
1224*4882a593Smuzhiyun return NETDEV_TX_OK; /* Do not re-queue this packet. */
1225*4882a593Smuzhiyun }
1226*4882a593Smuzhiyun /* A packet is now waiting. */
1227*4882a593Smuzhiyun smc->packets_waiting++;
1228*4882a593Smuzhiyun
1229*4882a593Smuzhiyun spin_lock_irqsave(&smc->lock, flags);
1230*4882a593Smuzhiyun SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1231*4882a593Smuzhiyun
1232*4882a593Smuzhiyun /* need MC_RESET to keep the memory consistent. errata? */
1233*4882a593Smuzhiyun if (smc->rx_ovrn) {
1234*4882a593Smuzhiyun outw(MC_RESET, ioaddr + MMU_CMD);
1235*4882a593Smuzhiyun smc->rx_ovrn = 0;
1236*4882a593Smuzhiyun }
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun /* Allocate the memory; send the packet now if we win. */
1239*4882a593Smuzhiyun outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1240*4882a593Smuzhiyun for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1241*4882a593Smuzhiyun ir = inw(ioaddr+INTERRUPT);
1242*4882a593Smuzhiyun if (ir & IM_ALLOC_INT) {
1243*4882a593Smuzhiyun /* Acknowledge the interrupt, send the packet. */
1244*4882a593Smuzhiyun outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1245*4882a593Smuzhiyun smc_hardware_send_packet(dev); /* Send the packet now.. */
1246*4882a593Smuzhiyun spin_unlock_irqrestore(&smc->lock, flags);
1247*4882a593Smuzhiyun return NETDEV_TX_OK;
1248*4882a593Smuzhiyun }
1249*4882a593Smuzhiyun }
1250*4882a593Smuzhiyun
1251*4882a593Smuzhiyun /* Otherwise defer until the Tx-space-allocated interrupt. */
1252*4882a593Smuzhiyun netdev_dbg(dev, "memory allocation deferred.\n");
1253*4882a593Smuzhiyun outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
1254*4882a593Smuzhiyun spin_unlock_irqrestore(&smc->lock, flags);
1255*4882a593Smuzhiyun
1256*4882a593Smuzhiyun return NETDEV_TX_OK;
1257*4882a593Smuzhiyun }
1258*4882a593Smuzhiyun
1259*4882a593Smuzhiyun /*======================================================================
1260*4882a593Smuzhiyun
1261*4882a593Smuzhiyun Handle a Tx anomalous event. Entered while in Window 2.
1262*4882a593Smuzhiyun
1263*4882a593Smuzhiyun ======================================================================*/
1264*4882a593Smuzhiyun
smc_tx_err(struct net_device * dev)1265*4882a593Smuzhiyun static void smc_tx_err(struct net_device * dev)
1266*4882a593Smuzhiyun {
1267*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1268*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1269*4882a593Smuzhiyun int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1270*4882a593Smuzhiyun int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1271*4882a593Smuzhiyun int tx_status;
1272*4882a593Smuzhiyun
1273*4882a593Smuzhiyun /* select this as the packet to read from */
1274*4882a593Smuzhiyun outw(packet_no, ioaddr + PNR_ARR);
1275*4882a593Smuzhiyun
1276*4882a593Smuzhiyun /* read the first word from this packet */
1277*4882a593Smuzhiyun outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1278*4882a593Smuzhiyun
1279*4882a593Smuzhiyun tx_status = inw(ioaddr + DATA_1);
1280*4882a593Smuzhiyun
1281*4882a593Smuzhiyun dev->stats.tx_errors++;
1282*4882a593Smuzhiyun if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1283*4882a593Smuzhiyun if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1284*4882a593Smuzhiyun if (tx_status & TS_16COL) {
1285*4882a593Smuzhiyun dev->stats.tx_aborted_errors++;
1286*4882a593Smuzhiyun smc->tx_err++;
1287*4882a593Smuzhiyun }
1288*4882a593Smuzhiyun
1289*4882a593Smuzhiyun if (tx_status & TS_SUCCESS) {
1290*4882a593Smuzhiyun netdev_notice(dev, "Successful packet caused error interrupt?\n");
1291*4882a593Smuzhiyun }
1292*4882a593Smuzhiyun /* re-enable transmit */
1293*4882a593Smuzhiyun SMC_SELECT_BANK(0);
1294*4882a593Smuzhiyun outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1295*4882a593Smuzhiyun SMC_SELECT_BANK(2);
1296*4882a593Smuzhiyun
1297*4882a593Smuzhiyun outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1298*4882a593Smuzhiyun
1299*4882a593Smuzhiyun /* one less packet waiting for me */
1300*4882a593Smuzhiyun smc->packets_waiting--;
1301*4882a593Smuzhiyun
1302*4882a593Smuzhiyun outw(saved_packet, ioaddr + PNR_ARR);
1303*4882a593Smuzhiyun }
1304*4882a593Smuzhiyun
1305*4882a593Smuzhiyun /*====================================================================*/
1306*4882a593Smuzhiyun
smc_eph_irq(struct net_device * dev)1307*4882a593Smuzhiyun static void smc_eph_irq(struct net_device *dev)
1308*4882a593Smuzhiyun {
1309*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1310*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1311*4882a593Smuzhiyun u_short card_stats, ephs;
1312*4882a593Smuzhiyun
1313*4882a593Smuzhiyun SMC_SELECT_BANK(0);
1314*4882a593Smuzhiyun ephs = inw(ioaddr + EPH);
1315*4882a593Smuzhiyun netdev_dbg(dev, "Ethernet protocol handler interrupt, status %4.4x.\n",
1316*4882a593Smuzhiyun ephs);
1317*4882a593Smuzhiyun /* Could be a counter roll-over warning: update stats. */
1318*4882a593Smuzhiyun card_stats = inw(ioaddr + COUNTER);
1319*4882a593Smuzhiyun /* single collisions */
1320*4882a593Smuzhiyun dev->stats.collisions += card_stats & 0xF;
1321*4882a593Smuzhiyun card_stats >>= 4;
1322*4882a593Smuzhiyun /* multiple collisions */
1323*4882a593Smuzhiyun dev->stats.collisions += card_stats & 0xF;
1324*4882a593Smuzhiyun #if 0 /* These are for when linux supports these statistics */
1325*4882a593Smuzhiyun card_stats >>= 4; /* deferred */
1326*4882a593Smuzhiyun card_stats >>= 4; /* excess deferred */
1327*4882a593Smuzhiyun #endif
1328*4882a593Smuzhiyun /* If we had a transmit error we must re-enable the transmitter. */
1329*4882a593Smuzhiyun outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1330*4882a593Smuzhiyun
1331*4882a593Smuzhiyun /* Clear a link error interrupt. */
1332*4882a593Smuzhiyun SMC_SELECT_BANK(1);
1333*4882a593Smuzhiyun outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1334*4882a593Smuzhiyun outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1335*4882a593Smuzhiyun ioaddr + CONTROL);
1336*4882a593Smuzhiyun SMC_SELECT_BANK(2);
1337*4882a593Smuzhiyun }
1338*4882a593Smuzhiyun
1339*4882a593Smuzhiyun /*====================================================================*/
1340*4882a593Smuzhiyun
smc_interrupt(int irq,void * dev_id)1341*4882a593Smuzhiyun static irqreturn_t smc_interrupt(int irq, void *dev_id)
1342*4882a593Smuzhiyun {
1343*4882a593Smuzhiyun struct net_device *dev = dev_id;
1344*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1345*4882a593Smuzhiyun unsigned int ioaddr;
1346*4882a593Smuzhiyun u_short saved_bank, saved_pointer, mask, status;
1347*4882a593Smuzhiyun unsigned int handled = 1;
1348*4882a593Smuzhiyun char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1349*4882a593Smuzhiyun
1350*4882a593Smuzhiyun if (!netif_device_present(dev))
1351*4882a593Smuzhiyun return IRQ_NONE;
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun ioaddr = dev->base_addr;
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun netdev_dbg(dev, "SMC91c92 interrupt %d at %#x.\n",
1356*4882a593Smuzhiyun irq, ioaddr);
1357*4882a593Smuzhiyun
1358*4882a593Smuzhiyun spin_lock(&smc->lock);
1359*4882a593Smuzhiyun smc->watchdog = 0;
1360*4882a593Smuzhiyun saved_bank = inw(ioaddr + BANK_SELECT);
1361*4882a593Smuzhiyun if ((saved_bank & 0xff00) != 0x3300) {
1362*4882a593Smuzhiyun /* The device does not exist -- the card could be off-line, or
1363*4882a593Smuzhiyun maybe it has been ejected. */
1364*4882a593Smuzhiyun netdev_dbg(dev, "SMC91c92 interrupt %d for non-existent/ejected device.\n",
1365*4882a593Smuzhiyun irq);
1366*4882a593Smuzhiyun handled = 0;
1367*4882a593Smuzhiyun goto irq_done;
1368*4882a593Smuzhiyun }
1369*4882a593Smuzhiyun
1370*4882a593Smuzhiyun SMC_SELECT_BANK(2);
1371*4882a593Smuzhiyun saved_pointer = inw(ioaddr + POINTER);
1372*4882a593Smuzhiyun mask = inw(ioaddr + INTERRUPT) >> 8;
1373*4882a593Smuzhiyun /* clear all interrupts */
1374*4882a593Smuzhiyun outw(0, ioaddr + INTERRUPT);
1375*4882a593Smuzhiyun
1376*4882a593Smuzhiyun do { /* read the status flag, and mask it */
1377*4882a593Smuzhiyun status = inw(ioaddr + INTERRUPT) & 0xff;
1378*4882a593Smuzhiyun netdev_dbg(dev, "Status is %#2.2x (mask %#2.2x).\n",
1379*4882a593Smuzhiyun status, mask);
1380*4882a593Smuzhiyun if ((status & mask) == 0) {
1381*4882a593Smuzhiyun if (bogus_cnt == INTR_WORK)
1382*4882a593Smuzhiyun handled = 0;
1383*4882a593Smuzhiyun break;
1384*4882a593Smuzhiyun }
1385*4882a593Smuzhiyun if (status & IM_RCV_INT) {
1386*4882a593Smuzhiyun /* Got a packet(s). */
1387*4882a593Smuzhiyun smc_rx(dev);
1388*4882a593Smuzhiyun }
1389*4882a593Smuzhiyun if (status & IM_TX_INT) {
1390*4882a593Smuzhiyun smc_tx_err(dev);
1391*4882a593Smuzhiyun outw(IM_TX_INT, ioaddr + INTERRUPT);
1392*4882a593Smuzhiyun }
1393*4882a593Smuzhiyun status &= mask;
1394*4882a593Smuzhiyun if (status & IM_TX_EMPTY_INT) {
1395*4882a593Smuzhiyun outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1396*4882a593Smuzhiyun mask &= ~IM_TX_EMPTY_INT;
1397*4882a593Smuzhiyun dev->stats.tx_packets += smc->packets_waiting;
1398*4882a593Smuzhiyun smc->packets_waiting = 0;
1399*4882a593Smuzhiyun }
1400*4882a593Smuzhiyun if (status & IM_ALLOC_INT) {
1401*4882a593Smuzhiyun /* Clear this interrupt so it doesn't happen again */
1402*4882a593Smuzhiyun mask &= ~IM_ALLOC_INT;
1403*4882a593Smuzhiyun
1404*4882a593Smuzhiyun smc_hardware_send_packet(dev);
1405*4882a593Smuzhiyun
1406*4882a593Smuzhiyun /* enable xmit interrupts based on this */
1407*4882a593Smuzhiyun mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1408*4882a593Smuzhiyun
1409*4882a593Smuzhiyun /* and let the card send more packets to me */
1410*4882a593Smuzhiyun netif_wake_queue(dev);
1411*4882a593Smuzhiyun }
1412*4882a593Smuzhiyun if (status & IM_RX_OVRN_INT) {
1413*4882a593Smuzhiyun dev->stats.rx_errors++;
1414*4882a593Smuzhiyun dev->stats.rx_fifo_errors++;
1415*4882a593Smuzhiyun if (smc->duplex)
1416*4882a593Smuzhiyun smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1417*4882a593Smuzhiyun outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1418*4882a593Smuzhiyun }
1419*4882a593Smuzhiyun if (status & IM_EPH_INT)
1420*4882a593Smuzhiyun smc_eph_irq(dev);
1421*4882a593Smuzhiyun } while (--bogus_cnt);
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun netdev_dbg(dev, " Restoring saved registers mask %2.2x bank %4.4x pointer %4.4x.\n",
1424*4882a593Smuzhiyun mask, saved_bank, saved_pointer);
1425*4882a593Smuzhiyun
1426*4882a593Smuzhiyun /* restore state register */
1427*4882a593Smuzhiyun outw((mask<<8), ioaddr + INTERRUPT);
1428*4882a593Smuzhiyun outw(saved_pointer, ioaddr + POINTER);
1429*4882a593Smuzhiyun SMC_SELECT_BANK(saved_bank);
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun netdev_dbg(dev, "Exiting interrupt IRQ%d.\n", irq);
1432*4882a593Smuzhiyun
1433*4882a593Smuzhiyun irq_done:
1434*4882a593Smuzhiyun
1435*4882a593Smuzhiyun if ((smc->manfid == MANFID_OSITECH) &&
1436*4882a593Smuzhiyun (smc->cardid != PRODID_OSITECH_SEVEN)) {
1437*4882a593Smuzhiyun /* Retrigger interrupt if needed */
1438*4882a593Smuzhiyun mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1439*4882a593Smuzhiyun set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1440*4882a593Smuzhiyun }
1441*4882a593Smuzhiyun if (smc->manfid == MANFID_MOTOROLA) {
1442*4882a593Smuzhiyun u_char cor;
1443*4882a593Smuzhiyun cor = readb(smc->base + MOT_UART + CISREG_COR);
1444*4882a593Smuzhiyun writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1445*4882a593Smuzhiyun writeb(cor, smc->base + MOT_UART + CISREG_COR);
1446*4882a593Smuzhiyun cor = readb(smc->base + MOT_LAN + CISREG_COR);
1447*4882a593Smuzhiyun writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1448*4882a593Smuzhiyun writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1449*4882a593Smuzhiyun }
1450*4882a593Smuzhiyun
1451*4882a593Smuzhiyun if ((smc->base != NULL) && /* Megahertz MFC's */
1452*4882a593Smuzhiyun (smc->manfid == MANFID_MEGAHERTZ) &&
1453*4882a593Smuzhiyun (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1454*4882a593Smuzhiyun
1455*4882a593Smuzhiyun u_char tmp;
1456*4882a593Smuzhiyun tmp = readb(smc->base+MEGAHERTZ_ISR);
1457*4882a593Smuzhiyun tmp = readb(smc->base+MEGAHERTZ_ISR);
1458*4882a593Smuzhiyun
1459*4882a593Smuzhiyun /* Retrigger interrupt if needed */
1460*4882a593Smuzhiyun writeb(tmp, smc->base + MEGAHERTZ_ISR);
1461*4882a593Smuzhiyun writeb(tmp, smc->base + MEGAHERTZ_ISR);
1462*4882a593Smuzhiyun }
1463*4882a593Smuzhiyun
1464*4882a593Smuzhiyun spin_unlock(&smc->lock);
1465*4882a593Smuzhiyun return IRQ_RETVAL(handled);
1466*4882a593Smuzhiyun }
1467*4882a593Smuzhiyun
1468*4882a593Smuzhiyun /*====================================================================*/
1469*4882a593Smuzhiyun
smc_rx(struct net_device * dev)1470*4882a593Smuzhiyun static void smc_rx(struct net_device *dev)
1471*4882a593Smuzhiyun {
1472*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1473*4882a593Smuzhiyun int rx_status;
1474*4882a593Smuzhiyun int packet_length; /* Caution: not frame length, rather words
1475*4882a593Smuzhiyun to transfer from the chip. */
1476*4882a593Smuzhiyun
1477*4882a593Smuzhiyun /* Assertion: we are in Window 2. */
1478*4882a593Smuzhiyun
1479*4882a593Smuzhiyun if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1480*4882a593Smuzhiyun netdev_err(dev, "smc_rx() with nothing on Rx FIFO\n");
1481*4882a593Smuzhiyun return;
1482*4882a593Smuzhiyun }
1483*4882a593Smuzhiyun
1484*4882a593Smuzhiyun /* Reset the read pointer, and read the status and packet length. */
1485*4882a593Smuzhiyun outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1486*4882a593Smuzhiyun rx_status = inw(ioaddr + DATA_1);
1487*4882a593Smuzhiyun packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1488*4882a593Smuzhiyun
1489*4882a593Smuzhiyun netdev_dbg(dev, "Receive status %4.4x length %d.\n",
1490*4882a593Smuzhiyun rx_status, packet_length);
1491*4882a593Smuzhiyun
1492*4882a593Smuzhiyun if (!(rx_status & RS_ERRORS)) {
1493*4882a593Smuzhiyun /* do stuff to make a new packet */
1494*4882a593Smuzhiyun struct sk_buff *skb;
1495*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1496*4882a593Smuzhiyun
1497*4882a593Smuzhiyun /* Note: packet_length adds 5 or 6 extra bytes here! */
1498*4882a593Smuzhiyun skb = netdev_alloc_skb(dev, packet_length+2);
1499*4882a593Smuzhiyun
1500*4882a593Smuzhiyun if (skb == NULL) {
1501*4882a593Smuzhiyun netdev_dbg(dev, "Low memory, packet dropped.\n");
1502*4882a593Smuzhiyun dev->stats.rx_dropped++;
1503*4882a593Smuzhiyun outw(MC_RELEASE, ioaddr + MMU_CMD);
1504*4882a593Smuzhiyun return;
1505*4882a593Smuzhiyun }
1506*4882a593Smuzhiyun
1507*4882a593Smuzhiyun packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1508*4882a593Smuzhiyun skb_reserve(skb, 2);
1509*4882a593Smuzhiyun insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1510*4882a593Smuzhiyun (packet_length+1)>>1);
1511*4882a593Smuzhiyun skb->protocol = eth_type_trans(skb, dev);
1512*4882a593Smuzhiyun
1513*4882a593Smuzhiyun netif_rx(skb);
1514*4882a593Smuzhiyun smc->last_rx = jiffies;
1515*4882a593Smuzhiyun dev->stats.rx_packets++;
1516*4882a593Smuzhiyun dev->stats.rx_bytes += packet_length;
1517*4882a593Smuzhiyun if (rx_status & RS_MULTICAST)
1518*4882a593Smuzhiyun dev->stats.multicast++;
1519*4882a593Smuzhiyun } else {
1520*4882a593Smuzhiyun /* error ... */
1521*4882a593Smuzhiyun dev->stats.rx_errors++;
1522*4882a593Smuzhiyun
1523*4882a593Smuzhiyun if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1524*4882a593Smuzhiyun if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
1525*4882a593Smuzhiyun dev->stats.rx_length_errors++;
1526*4882a593Smuzhiyun if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1527*4882a593Smuzhiyun }
1528*4882a593Smuzhiyun /* Let the MMU free the memory of this packet. */
1529*4882a593Smuzhiyun outw(MC_RELEASE, ioaddr + MMU_CMD);
1530*4882a593Smuzhiyun }
1531*4882a593Smuzhiyun
1532*4882a593Smuzhiyun /*======================================================================
1533*4882a593Smuzhiyun
1534*4882a593Smuzhiyun Set the receive mode.
1535*4882a593Smuzhiyun
1536*4882a593Smuzhiyun This routine is used by both the protocol level to notify us of
1537*4882a593Smuzhiyun promiscuous/multicast mode changes, and by the open/reset code to
1538*4882a593Smuzhiyun initialize the Rx registers. We always set the multicast list and
1539*4882a593Smuzhiyun leave the receiver running.
1540*4882a593Smuzhiyun
1541*4882a593Smuzhiyun ======================================================================*/
1542*4882a593Smuzhiyun
set_rx_mode(struct net_device * dev)1543*4882a593Smuzhiyun static void set_rx_mode(struct net_device *dev)
1544*4882a593Smuzhiyun {
1545*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1546*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1547*4882a593Smuzhiyun unsigned char multicast_table[8];
1548*4882a593Smuzhiyun unsigned long flags;
1549*4882a593Smuzhiyun u_short rx_cfg_setting;
1550*4882a593Smuzhiyun int i;
1551*4882a593Smuzhiyun
1552*4882a593Smuzhiyun memset(multicast_table, 0, sizeof(multicast_table));
1553*4882a593Smuzhiyun
1554*4882a593Smuzhiyun if (dev->flags & IFF_PROMISC) {
1555*4882a593Smuzhiyun rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1556*4882a593Smuzhiyun } else if (dev->flags & IFF_ALLMULTI)
1557*4882a593Smuzhiyun rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1558*4882a593Smuzhiyun else {
1559*4882a593Smuzhiyun if (!netdev_mc_empty(dev)) {
1560*4882a593Smuzhiyun struct netdev_hw_addr *ha;
1561*4882a593Smuzhiyun
1562*4882a593Smuzhiyun netdev_for_each_mc_addr(ha, dev) {
1563*4882a593Smuzhiyun u_int position = ether_crc(6, ha->addr);
1564*4882a593Smuzhiyun multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1565*4882a593Smuzhiyun }
1566*4882a593Smuzhiyun }
1567*4882a593Smuzhiyun rx_cfg_setting = RxStripCRC | RxEnable;
1568*4882a593Smuzhiyun }
1569*4882a593Smuzhiyun
1570*4882a593Smuzhiyun /* Load MC table and Rx setting into the chip without interrupts. */
1571*4882a593Smuzhiyun spin_lock_irqsave(&smc->lock, flags);
1572*4882a593Smuzhiyun SMC_SELECT_BANK(3);
1573*4882a593Smuzhiyun for (i = 0; i < 8; i++)
1574*4882a593Smuzhiyun outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1575*4882a593Smuzhiyun SMC_SELECT_BANK(0);
1576*4882a593Smuzhiyun outw(rx_cfg_setting, ioaddr + RCR);
1577*4882a593Smuzhiyun SMC_SELECT_BANK(2);
1578*4882a593Smuzhiyun spin_unlock_irqrestore(&smc->lock, flags);
1579*4882a593Smuzhiyun }
1580*4882a593Smuzhiyun
1581*4882a593Smuzhiyun /*======================================================================
1582*4882a593Smuzhiyun
1583*4882a593Smuzhiyun Senses when a card's config changes. Here, it's coax or TP.
1584*4882a593Smuzhiyun
1585*4882a593Smuzhiyun ======================================================================*/
1586*4882a593Smuzhiyun
s9k_config(struct net_device * dev,struct ifmap * map)1587*4882a593Smuzhiyun static int s9k_config(struct net_device *dev, struct ifmap *map)
1588*4882a593Smuzhiyun {
1589*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1590*4882a593Smuzhiyun if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1591*4882a593Smuzhiyun if (smc->cfg & CFG_MII_SELECT)
1592*4882a593Smuzhiyun return -EOPNOTSUPP;
1593*4882a593Smuzhiyun else if (map->port > 2)
1594*4882a593Smuzhiyun return -EINVAL;
1595*4882a593Smuzhiyun dev->if_port = map->port;
1596*4882a593Smuzhiyun netdev_info(dev, "switched to %s port\n", if_names[dev->if_port]);
1597*4882a593Smuzhiyun smc_reset(dev);
1598*4882a593Smuzhiyun }
1599*4882a593Smuzhiyun return 0;
1600*4882a593Smuzhiyun }
1601*4882a593Smuzhiyun
1602*4882a593Smuzhiyun /*======================================================================
1603*4882a593Smuzhiyun
1604*4882a593Smuzhiyun Reset the chip, reloading every register that might be corrupted.
1605*4882a593Smuzhiyun
1606*4882a593Smuzhiyun ======================================================================*/
1607*4882a593Smuzhiyun
1608*4882a593Smuzhiyun /*
1609*4882a593Smuzhiyun Set transceiver type, perhaps to something other than what the user
1610*4882a593Smuzhiyun specified in dev->if_port.
1611*4882a593Smuzhiyun */
smc_set_xcvr(struct net_device * dev,int if_port)1612*4882a593Smuzhiyun static void smc_set_xcvr(struct net_device *dev, int if_port)
1613*4882a593Smuzhiyun {
1614*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1615*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1616*4882a593Smuzhiyun u_short saved_bank;
1617*4882a593Smuzhiyun
1618*4882a593Smuzhiyun saved_bank = inw(ioaddr + BANK_SELECT);
1619*4882a593Smuzhiyun SMC_SELECT_BANK(1);
1620*4882a593Smuzhiyun if (if_port == 2) {
1621*4882a593Smuzhiyun outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1622*4882a593Smuzhiyun if ((smc->manfid == MANFID_OSITECH) &&
1623*4882a593Smuzhiyun (smc->cardid != PRODID_OSITECH_SEVEN))
1624*4882a593Smuzhiyun set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1625*4882a593Smuzhiyun smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1626*4882a593Smuzhiyun } else {
1627*4882a593Smuzhiyun outw(smc->cfg, ioaddr + CONFIG);
1628*4882a593Smuzhiyun if ((smc->manfid == MANFID_OSITECH) &&
1629*4882a593Smuzhiyun (smc->cardid != PRODID_OSITECH_SEVEN))
1630*4882a593Smuzhiyun mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1631*4882a593Smuzhiyun smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1632*4882a593Smuzhiyun }
1633*4882a593Smuzhiyun SMC_SELECT_BANK(saved_bank);
1634*4882a593Smuzhiyun }
1635*4882a593Smuzhiyun
smc_reset(struct net_device * dev)1636*4882a593Smuzhiyun static void smc_reset(struct net_device *dev)
1637*4882a593Smuzhiyun {
1638*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1639*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1640*4882a593Smuzhiyun int i;
1641*4882a593Smuzhiyun
1642*4882a593Smuzhiyun netdev_dbg(dev, "smc91c92 reset called.\n");
1643*4882a593Smuzhiyun
1644*4882a593Smuzhiyun /* The first interaction must be a write to bring the chip out
1645*4882a593Smuzhiyun of sleep mode. */
1646*4882a593Smuzhiyun SMC_SELECT_BANK(0);
1647*4882a593Smuzhiyun /* Reset the chip. */
1648*4882a593Smuzhiyun outw(RCR_SOFTRESET, ioaddr + RCR);
1649*4882a593Smuzhiyun udelay(10);
1650*4882a593Smuzhiyun
1651*4882a593Smuzhiyun /* Clear the transmit and receive configuration registers. */
1652*4882a593Smuzhiyun outw(RCR_CLEAR, ioaddr + RCR);
1653*4882a593Smuzhiyun outw(TCR_CLEAR, ioaddr + TCR);
1654*4882a593Smuzhiyun
1655*4882a593Smuzhiyun /* Set the Window 1 control, configuration and station addr registers.
1656*4882a593Smuzhiyun No point in writing the I/O base register ;-> */
1657*4882a593Smuzhiyun SMC_SELECT_BANK(1);
1658*4882a593Smuzhiyun /* Automatically release successfully transmitted packets,
1659*4882a593Smuzhiyun Accept link errors, counter and Tx error interrupts. */
1660*4882a593Smuzhiyun outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1661*4882a593Smuzhiyun ioaddr + CONTROL);
1662*4882a593Smuzhiyun smc_set_xcvr(dev, dev->if_port);
1663*4882a593Smuzhiyun if ((smc->manfid == MANFID_OSITECH) &&
1664*4882a593Smuzhiyun (smc->cardid != PRODID_OSITECH_SEVEN))
1665*4882a593Smuzhiyun outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1666*4882a593Smuzhiyun (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1667*4882a593Smuzhiyun ioaddr - 0x10 + OSITECH_AUI_PWR);
1668*4882a593Smuzhiyun
1669*4882a593Smuzhiyun /* Fill in the physical address. The databook is wrong about the order! */
1670*4882a593Smuzhiyun for (i = 0; i < 6; i += 2)
1671*4882a593Smuzhiyun outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1672*4882a593Smuzhiyun ioaddr + ADDR0 + i);
1673*4882a593Smuzhiyun
1674*4882a593Smuzhiyun /* Reset the MMU */
1675*4882a593Smuzhiyun SMC_SELECT_BANK(2);
1676*4882a593Smuzhiyun outw(MC_RESET, ioaddr + MMU_CMD);
1677*4882a593Smuzhiyun outw(0, ioaddr + INTERRUPT);
1678*4882a593Smuzhiyun
1679*4882a593Smuzhiyun /* Re-enable the chip. */
1680*4882a593Smuzhiyun SMC_SELECT_BANK(0);
1681*4882a593Smuzhiyun outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1682*4882a593Smuzhiyun TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1683*4882a593Smuzhiyun set_rx_mode(dev);
1684*4882a593Smuzhiyun
1685*4882a593Smuzhiyun if (smc->cfg & CFG_MII_SELECT) {
1686*4882a593Smuzhiyun SMC_SELECT_BANK(3);
1687*4882a593Smuzhiyun
1688*4882a593Smuzhiyun /* Reset MII */
1689*4882a593Smuzhiyun mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1690*4882a593Smuzhiyun
1691*4882a593Smuzhiyun /* Advertise 100F, 100H, 10F, 10H */
1692*4882a593Smuzhiyun mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1693*4882a593Smuzhiyun
1694*4882a593Smuzhiyun /* Restart MII autonegotiation */
1695*4882a593Smuzhiyun mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1696*4882a593Smuzhiyun mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1697*4882a593Smuzhiyun }
1698*4882a593Smuzhiyun
1699*4882a593Smuzhiyun /* Enable interrupts. */
1700*4882a593Smuzhiyun SMC_SELECT_BANK(2);
1701*4882a593Smuzhiyun outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1702*4882a593Smuzhiyun ioaddr + INTERRUPT);
1703*4882a593Smuzhiyun }
1704*4882a593Smuzhiyun
1705*4882a593Smuzhiyun /*======================================================================
1706*4882a593Smuzhiyun
1707*4882a593Smuzhiyun Media selection timer routine
1708*4882a593Smuzhiyun
1709*4882a593Smuzhiyun ======================================================================*/
1710*4882a593Smuzhiyun
media_check(struct timer_list * t)1711*4882a593Smuzhiyun static void media_check(struct timer_list *t)
1712*4882a593Smuzhiyun {
1713*4882a593Smuzhiyun struct smc_private *smc = from_timer(smc, t, media);
1714*4882a593Smuzhiyun struct net_device *dev = smc->mii_if.dev;
1715*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1716*4882a593Smuzhiyun u_short i, media, saved_bank;
1717*4882a593Smuzhiyun u_short link;
1718*4882a593Smuzhiyun unsigned long flags;
1719*4882a593Smuzhiyun
1720*4882a593Smuzhiyun spin_lock_irqsave(&smc->lock, flags);
1721*4882a593Smuzhiyun
1722*4882a593Smuzhiyun saved_bank = inw(ioaddr + BANK_SELECT);
1723*4882a593Smuzhiyun
1724*4882a593Smuzhiyun if (!netif_device_present(dev))
1725*4882a593Smuzhiyun goto reschedule;
1726*4882a593Smuzhiyun
1727*4882a593Smuzhiyun SMC_SELECT_BANK(2);
1728*4882a593Smuzhiyun
1729*4882a593Smuzhiyun /* need MC_RESET to keep the memory consistent. errata? */
1730*4882a593Smuzhiyun if (smc->rx_ovrn) {
1731*4882a593Smuzhiyun outw(MC_RESET, ioaddr + MMU_CMD);
1732*4882a593Smuzhiyun smc->rx_ovrn = 0;
1733*4882a593Smuzhiyun }
1734*4882a593Smuzhiyun i = inw(ioaddr + INTERRUPT);
1735*4882a593Smuzhiyun SMC_SELECT_BANK(0);
1736*4882a593Smuzhiyun media = inw(ioaddr + EPH) & EPH_LINK_OK;
1737*4882a593Smuzhiyun SMC_SELECT_BANK(1);
1738*4882a593Smuzhiyun media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1739*4882a593Smuzhiyun
1740*4882a593Smuzhiyun SMC_SELECT_BANK(saved_bank);
1741*4882a593Smuzhiyun spin_unlock_irqrestore(&smc->lock, flags);
1742*4882a593Smuzhiyun
1743*4882a593Smuzhiyun /* Check for pending interrupt with watchdog flag set: with
1744*4882a593Smuzhiyun this, we can limp along even if the interrupt is blocked */
1745*4882a593Smuzhiyun if (smc->watchdog++ && ((i>>8) & i)) {
1746*4882a593Smuzhiyun if (!smc->fast_poll)
1747*4882a593Smuzhiyun netdev_info(dev, "interrupt(s) dropped!\n");
1748*4882a593Smuzhiyun local_irq_save(flags);
1749*4882a593Smuzhiyun smc_interrupt(dev->irq, dev);
1750*4882a593Smuzhiyun local_irq_restore(flags);
1751*4882a593Smuzhiyun smc->fast_poll = HZ;
1752*4882a593Smuzhiyun }
1753*4882a593Smuzhiyun if (smc->fast_poll) {
1754*4882a593Smuzhiyun smc->fast_poll--;
1755*4882a593Smuzhiyun smc->media.expires = jiffies + HZ/100;
1756*4882a593Smuzhiyun add_timer(&smc->media);
1757*4882a593Smuzhiyun return;
1758*4882a593Smuzhiyun }
1759*4882a593Smuzhiyun
1760*4882a593Smuzhiyun spin_lock_irqsave(&smc->lock, flags);
1761*4882a593Smuzhiyun
1762*4882a593Smuzhiyun saved_bank = inw(ioaddr + BANK_SELECT);
1763*4882a593Smuzhiyun
1764*4882a593Smuzhiyun if (smc->cfg & CFG_MII_SELECT) {
1765*4882a593Smuzhiyun if (smc->mii_if.phy_id < 0)
1766*4882a593Smuzhiyun goto reschedule;
1767*4882a593Smuzhiyun
1768*4882a593Smuzhiyun SMC_SELECT_BANK(3);
1769*4882a593Smuzhiyun link = mdio_read(dev, smc->mii_if.phy_id, 1);
1770*4882a593Smuzhiyun if (!link || (link == 0xffff)) {
1771*4882a593Smuzhiyun netdev_info(dev, "MII is missing!\n");
1772*4882a593Smuzhiyun smc->mii_if.phy_id = -1;
1773*4882a593Smuzhiyun goto reschedule;
1774*4882a593Smuzhiyun }
1775*4882a593Smuzhiyun
1776*4882a593Smuzhiyun link &= 0x0004;
1777*4882a593Smuzhiyun if (link != smc->link_status) {
1778*4882a593Smuzhiyun u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1779*4882a593Smuzhiyun netdev_info(dev, "%s link beat\n", link ? "found" : "lost");
1780*4882a593Smuzhiyun smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1781*4882a593Smuzhiyun ? TCR_FDUPLX : 0);
1782*4882a593Smuzhiyun if (link) {
1783*4882a593Smuzhiyun netdev_info(dev, "autonegotiation complete: "
1784*4882a593Smuzhiyun "%dbaseT-%cD selected\n",
1785*4882a593Smuzhiyun (p & 0x0180) ? 100 : 10, smc->duplex ? 'F' : 'H');
1786*4882a593Smuzhiyun }
1787*4882a593Smuzhiyun SMC_SELECT_BANK(0);
1788*4882a593Smuzhiyun outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1789*4882a593Smuzhiyun smc->link_status = link;
1790*4882a593Smuzhiyun }
1791*4882a593Smuzhiyun goto reschedule;
1792*4882a593Smuzhiyun }
1793*4882a593Smuzhiyun
1794*4882a593Smuzhiyun /* Ignore collisions unless we've had no rx's recently */
1795*4882a593Smuzhiyun if (time_after(jiffies, smc->last_rx + HZ)) {
1796*4882a593Smuzhiyun if (smc->tx_err || (smc->media_status & EPH_16COL))
1797*4882a593Smuzhiyun media |= EPH_16COL;
1798*4882a593Smuzhiyun }
1799*4882a593Smuzhiyun smc->tx_err = 0;
1800*4882a593Smuzhiyun
1801*4882a593Smuzhiyun if (media != smc->media_status) {
1802*4882a593Smuzhiyun if ((media & smc->media_status & 1) &&
1803*4882a593Smuzhiyun ((smc->media_status ^ media) & EPH_LINK_OK))
1804*4882a593Smuzhiyun netdev_info(dev, "%s link beat\n",
1805*4882a593Smuzhiyun smc->media_status & EPH_LINK_OK ? "lost" : "found");
1806*4882a593Smuzhiyun else if ((media & smc->media_status & 2) &&
1807*4882a593Smuzhiyun ((smc->media_status ^ media) & EPH_16COL))
1808*4882a593Smuzhiyun netdev_info(dev, "coax cable %s\n",
1809*4882a593Smuzhiyun media & EPH_16COL ? "problem" : "ok");
1810*4882a593Smuzhiyun if (dev->if_port == 0) {
1811*4882a593Smuzhiyun if (media & 1) {
1812*4882a593Smuzhiyun if (media & EPH_LINK_OK)
1813*4882a593Smuzhiyun netdev_info(dev, "flipped to 10baseT\n");
1814*4882a593Smuzhiyun else
1815*4882a593Smuzhiyun smc_set_xcvr(dev, 2);
1816*4882a593Smuzhiyun } else {
1817*4882a593Smuzhiyun if (media & EPH_16COL)
1818*4882a593Smuzhiyun smc_set_xcvr(dev, 1);
1819*4882a593Smuzhiyun else
1820*4882a593Smuzhiyun netdev_info(dev, "flipped to 10base2\n");
1821*4882a593Smuzhiyun }
1822*4882a593Smuzhiyun }
1823*4882a593Smuzhiyun smc->media_status = media;
1824*4882a593Smuzhiyun }
1825*4882a593Smuzhiyun
1826*4882a593Smuzhiyun reschedule:
1827*4882a593Smuzhiyun smc->media.expires = jiffies + HZ;
1828*4882a593Smuzhiyun add_timer(&smc->media);
1829*4882a593Smuzhiyun SMC_SELECT_BANK(saved_bank);
1830*4882a593Smuzhiyun spin_unlock_irqrestore(&smc->lock, flags);
1831*4882a593Smuzhiyun }
1832*4882a593Smuzhiyun
smc_link_ok(struct net_device * dev)1833*4882a593Smuzhiyun static int smc_link_ok(struct net_device *dev)
1834*4882a593Smuzhiyun {
1835*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1836*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1837*4882a593Smuzhiyun
1838*4882a593Smuzhiyun if (smc->cfg & CFG_MII_SELECT) {
1839*4882a593Smuzhiyun return mii_link_ok(&smc->mii_if);
1840*4882a593Smuzhiyun } else {
1841*4882a593Smuzhiyun SMC_SELECT_BANK(0);
1842*4882a593Smuzhiyun return inw(ioaddr + EPH) & EPH_LINK_OK;
1843*4882a593Smuzhiyun }
1844*4882a593Smuzhiyun }
1845*4882a593Smuzhiyun
smc_netdev_get_ecmd(struct net_device * dev,struct ethtool_link_ksettings * ecmd)1846*4882a593Smuzhiyun static void smc_netdev_get_ecmd(struct net_device *dev,
1847*4882a593Smuzhiyun struct ethtool_link_ksettings *ecmd)
1848*4882a593Smuzhiyun {
1849*4882a593Smuzhiyun u16 tmp;
1850*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1851*4882a593Smuzhiyun u32 supported;
1852*4882a593Smuzhiyun
1853*4882a593Smuzhiyun supported = (SUPPORTED_TP | SUPPORTED_AUI |
1854*4882a593Smuzhiyun SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1855*4882a593Smuzhiyun
1856*4882a593Smuzhiyun SMC_SELECT_BANK(1);
1857*4882a593Smuzhiyun tmp = inw(ioaddr + CONFIG);
1858*4882a593Smuzhiyun ecmd->base.port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1859*4882a593Smuzhiyun ecmd->base.speed = SPEED_10;
1860*4882a593Smuzhiyun ecmd->base.phy_address = ioaddr + MGMT;
1861*4882a593Smuzhiyun
1862*4882a593Smuzhiyun SMC_SELECT_BANK(0);
1863*4882a593Smuzhiyun tmp = inw(ioaddr + TCR);
1864*4882a593Smuzhiyun ecmd->base.duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1865*4882a593Smuzhiyun
1866*4882a593Smuzhiyun ethtool_convert_legacy_u32_to_link_mode(ecmd->link_modes.supported,
1867*4882a593Smuzhiyun supported);
1868*4882a593Smuzhiyun }
1869*4882a593Smuzhiyun
smc_netdev_set_ecmd(struct net_device * dev,const struct ethtool_link_ksettings * ecmd)1870*4882a593Smuzhiyun static int smc_netdev_set_ecmd(struct net_device *dev,
1871*4882a593Smuzhiyun const struct ethtool_link_ksettings *ecmd)
1872*4882a593Smuzhiyun {
1873*4882a593Smuzhiyun u16 tmp;
1874*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1875*4882a593Smuzhiyun
1876*4882a593Smuzhiyun if (ecmd->base.speed != SPEED_10)
1877*4882a593Smuzhiyun return -EINVAL;
1878*4882a593Smuzhiyun if (ecmd->base.duplex != DUPLEX_HALF &&
1879*4882a593Smuzhiyun ecmd->base.duplex != DUPLEX_FULL)
1880*4882a593Smuzhiyun return -EINVAL;
1881*4882a593Smuzhiyun if (ecmd->base.port != PORT_TP && ecmd->base.port != PORT_AUI)
1882*4882a593Smuzhiyun return -EINVAL;
1883*4882a593Smuzhiyun
1884*4882a593Smuzhiyun if (ecmd->base.port == PORT_AUI)
1885*4882a593Smuzhiyun smc_set_xcvr(dev, 1);
1886*4882a593Smuzhiyun else
1887*4882a593Smuzhiyun smc_set_xcvr(dev, 0);
1888*4882a593Smuzhiyun
1889*4882a593Smuzhiyun SMC_SELECT_BANK(0);
1890*4882a593Smuzhiyun tmp = inw(ioaddr + TCR);
1891*4882a593Smuzhiyun if (ecmd->base.duplex == DUPLEX_FULL)
1892*4882a593Smuzhiyun tmp |= TCR_FDUPLX;
1893*4882a593Smuzhiyun else
1894*4882a593Smuzhiyun tmp &= ~TCR_FDUPLX;
1895*4882a593Smuzhiyun outw(tmp, ioaddr + TCR);
1896*4882a593Smuzhiyun
1897*4882a593Smuzhiyun return 0;
1898*4882a593Smuzhiyun }
1899*4882a593Smuzhiyun
check_if_running(struct net_device * dev)1900*4882a593Smuzhiyun static int check_if_running(struct net_device *dev)
1901*4882a593Smuzhiyun {
1902*4882a593Smuzhiyun if (!netif_running(dev))
1903*4882a593Smuzhiyun return -EINVAL;
1904*4882a593Smuzhiyun return 0;
1905*4882a593Smuzhiyun }
1906*4882a593Smuzhiyun
smc_get_drvinfo(struct net_device * dev,struct ethtool_drvinfo * info)1907*4882a593Smuzhiyun static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1908*4882a593Smuzhiyun {
1909*4882a593Smuzhiyun strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1910*4882a593Smuzhiyun strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1911*4882a593Smuzhiyun }
1912*4882a593Smuzhiyun
smc_get_link_ksettings(struct net_device * dev,struct ethtool_link_ksettings * ecmd)1913*4882a593Smuzhiyun static int smc_get_link_ksettings(struct net_device *dev,
1914*4882a593Smuzhiyun struct ethtool_link_ksettings *ecmd)
1915*4882a593Smuzhiyun {
1916*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1917*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1918*4882a593Smuzhiyun u16 saved_bank = inw(ioaddr + BANK_SELECT);
1919*4882a593Smuzhiyun unsigned long flags;
1920*4882a593Smuzhiyun
1921*4882a593Smuzhiyun spin_lock_irqsave(&smc->lock, flags);
1922*4882a593Smuzhiyun SMC_SELECT_BANK(3);
1923*4882a593Smuzhiyun if (smc->cfg & CFG_MII_SELECT)
1924*4882a593Smuzhiyun mii_ethtool_get_link_ksettings(&smc->mii_if, ecmd);
1925*4882a593Smuzhiyun else
1926*4882a593Smuzhiyun smc_netdev_get_ecmd(dev, ecmd);
1927*4882a593Smuzhiyun SMC_SELECT_BANK(saved_bank);
1928*4882a593Smuzhiyun spin_unlock_irqrestore(&smc->lock, flags);
1929*4882a593Smuzhiyun return 0;
1930*4882a593Smuzhiyun }
1931*4882a593Smuzhiyun
smc_set_link_ksettings(struct net_device * dev,const struct ethtool_link_ksettings * ecmd)1932*4882a593Smuzhiyun static int smc_set_link_ksettings(struct net_device *dev,
1933*4882a593Smuzhiyun const struct ethtool_link_ksettings *ecmd)
1934*4882a593Smuzhiyun {
1935*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1936*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1937*4882a593Smuzhiyun u16 saved_bank = inw(ioaddr + BANK_SELECT);
1938*4882a593Smuzhiyun int ret;
1939*4882a593Smuzhiyun unsigned long flags;
1940*4882a593Smuzhiyun
1941*4882a593Smuzhiyun spin_lock_irqsave(&smc->lock, flags);
1942*4882a593Smuzhiyun SMC_SELECT_BANK(3);
1943*4882a593Smuzhiyun if (smc->cfg & CFG_MII_SELECT)
1944*4882a593Smuzhiyun ret = mii_ethtool_set_link_ksettings(&smc->mii_if, ecmd);
1945*4882a593Smuzhiyun else
1946*4882a593Smuzhiyun ret = smc_netdev_set_ecmd(dev, ecmd);
1947*4882a593Smuzhiyun SMC_SELECT_BANK(saved_bank);
1948*4882a593Smuzhiyun spin_unlock_irqrestore(&smc->lock, flags);
1949*4882a593Smuzhiyun return ret;
1950*4882a593Smuzhiyun }
1951*4882a593Smuzhiyun
smc_get_link(struct net_device * dev)1952*4882a593Smuzhiyun static u32 smc_get_link(struct net_device *dev)
1953*4882a593Smuzhiyun {
1954*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1955*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1956*4882a593Smuzhiyun u16 saved_bank = inw(ioaddr + BANK_SELECT);
1957*4882a593Smuzhiyun u32 ret;
1958*4882a593Smuzhiyun unsigned long flags;
1959*4882a593Smuzhiyun
1960*4882a593Smuzhiyun spin_lock_irqsave(&smc->lock, flags);
1961*4882a593Smuzhiyun SMC_SELECT_BANK(3);
1962*4882a593Smuzhiyun ret = smc_link_ok(dev);
1963*4882a593Smuzhiyun SMC_SELECT_BANK(saved_bank);
1964*4882a593Smuzhiyun spin_unlock_irqrestore(&smc->lock, flags);
1965*4882a593Smuzhiyun return ret;
1966*4882a593Smuzhiyun }
1967*4882a593Smuzhiyun
smc_nway_reset(struct net_device * dev)1968*4882a593Smuzhiyun static int smc_nway_reset(struct net_device *dev)
1969*4882a593Smuzhiyun {
1970*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1971*4882a593Smuzhiyun if (smc->cfg & CFG_MII_SELECT) {
1972*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
1973*4882a593Smuzhiyun u16 saved_bank = inw(ioaddr + BANK_SELECT);
1974*4882a593Smuzhiyun int res;
1975*4882a593Smuzhiyun
1976*4882a593Smuzhiyun SMC_SELECT_BANK(3);
1977*4882a593Smuzhiyun res = mii_nway_restart(&smc->mii_if);
1978*4882a593Smuzhiyun SMC_SELECT_BANK(saved_bank);
1979*4882a593Smuzhiyun
1980*4882a593Smuzhiyun return res;
1981*4882a593Smuzhiyun } else
1982*4882a593Smuzhiyun return -EOPNOTSUPP;
1983*4882a593Smuzhiyun }
1984*4882a593Smuzhiyun
1985*4882a593Smuzhiyun static const struct ethtool_ops ethtool_ops = {
1986*4882a593Smuzhiyun .begin = check_if_running,
1987*4882a593Smuzhiyun .get_drvinfo = smc_get_drvinfo,
1988*4882a593Smuzhiyun .get_link = smc_get_link,
1989*4882a593Smuzhiyun .nway_reset = smc_nway_reset,
1990*4882a593Smuzhiyun .get_link_ksettings = smc_get_link_ksettings,
1991*4882a593Smuzhiyun .set_link_ksettings = smc_set_link_ksettings,
1992*4882a593Smuzhiyun };
1993*4882a593Smuzhiyun
smc_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)1994*4882a593Smuzhiyun static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1995*4882a593Smuzhiyun {
1996*4882a593Smuzhiyun struct smc_private *smc = netdev_priv(dev);
1997*4882a593Smuzhiyun struct mii_ioctl_data *mii = if_mii(rq);
1998*4882a593Smuzhiyun int rc = 0;
1999*4882a593Smuzhiyun u16 saved_bank;
2000*4882a593Smuzhiyun unsigned int ioaddr = dev->base_addr;
2001*4882a593Smuzhiyun unsigned long flags;
2002*4882a593Smuzhiyun
2003*4882a593Smuzhiyun if (!netif_running(dev))
2004*4882a593Smuzhiyun return -EINVAL;
2005*4882a593Smuzhiyun
2006*4882a593Smuzhiyun spin_lock_irqsave(&smc->lock, flags);
2007*4882a593Smuzhiyun saved_bank = inw(ioaddr + BANK_SELECT);
2008*4882a593Smuzhiyun SMC_SELECT_BANK(3);
2009*4882a593Smuzhiyun rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2010*4882a593Smuzhiyun SMC_SELECT_BANK(saved_bank);
2011*4882a593Smuzhiyun spin_unlock_irqrestore(&smc->lock, flags);
2012*4882a593Smuzhiyun return rc;
2013*4882a593Smuzhiyun }
2014*4882a593Smuzhiyun
2015*4882a593Smuzhiyun static const struct pcmcia_device_id smc91c92_ids[] = {
2016*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2017*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2018*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2019*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2020*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2021*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2022*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2023*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
2024*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2025*4882a593Smuzhiyun PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
2026*4882a593Smuzhiyun PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2027*4882a593Smuzhiyun PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2028*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2029*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2030*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2031*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2032*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2033*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2034*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
2035*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2036*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
2037*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2038*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2039*4882a593Smuzhiyun PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2040*4882a593Smuzhiyun /* These conflict with other cards! */
2041*4882a593Smuzhiyun /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2042*4882a593Smuzhiyun /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2043*4882a593Smuzhiyun PCMCIA_DEVICE_NULL,
2044*4882a593Smuzhiyun };
2045*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2046*4882a593Smuzhiyun
2047*4882a593Smuzhiyun static struct pcmcia_driver smc91c92_cs_driver = {
2048*4882a593Smuzhiyun .owner = THIS_MODULE,
2049*4882a593Smuzhiyun .name = "smc91c92_cs",
2050*4882a593Smuzhiyun .probe = smc91c92_probe,
2051*4882a593Smuzhiyun .remove = smc91c92_detach,
2052*4882a593Smuzhiyun .id_table = smc91c92_ids,
2053*4882a593Smuzhiyun .suspend = smc91c92_suspend,
2054*4882a593Smuzhiyun .resume = smc91c92_resume,
2055*4882a593Smuzhiyun };
2056*4882a593Smuzhiyun module_pcmcia_driver(smc91c92_cs_driver);
2057