xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/sfc/mcdi.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /****************************************************************************
3*4882a593Smuzhiyun  * Driver for Solarflare network controllers and boards
4*4882a593Smuzhiyun  * Copyright 2008-2013 Solarflare Communications Inc.
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/delay.h>
8*4882a593Smuzhiyun #include <linux/moduleparam.h>
9*4882a593Smuzhiyun #include <linux/atomic.h>
10*4882a593Smuzhiyun #include "net_driver.h"
11*4882a593Smuzhiyun #include "nic.h"
12*4882a593Smuzhiyun #include "io.h"
13*4882a593Smuzhiyun #include "farch_regs.h"
14*4882a593Smuzhiyun #include "mcdi_pcol.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /**************************************************************************
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  * Management-Controller-to-Driver Interface
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  **************************************************************************
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define MCDI_RPC_TIMEOUT       (10 * HZ)
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /* A reboot/assertion causes the MCDI status word to be set after the
26*4882a593Smuzhiyun  * command word is set or a REBOOT event is sent. If we notice a reboot
27*4882a593Smuzhiyun  * via these mechanisms then wait 250ms for the status word to be set.
28*4882a593Smuzhiyun  */
29*4882a593Smuzhiyun #define MCDI_STATUS_DELAY_US		100
30*4882a593Smuzhiyun #define MCDI_STATUS_DELAY_COUNT		2500
31*4882a593Smuzhiyun #define MCDI_STATUS_SLEEP_MS						\
32*4882a593Smuzhiyun 	(MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define SEQ_MASK							\
35*4882a593Smuzhiyun 	EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun struct efx_mcdi_async_param {
38*4882a593Smuzhiyun 	struct list_head list;
39*4882a593Smuzhiyun 	unsigned int cmd;
40*4882a593Smuzhiyun 	size_t inlen;
41*4882a593Smuzhiyun 	size_t outlen;
42*4882a593Smuzhiyun 	bool quiet;
43*4882a593Smuzhiyun 	efx_mcdi_async_completer *complete;
44*4882a593Smuzhiyun 	unsigned long cookie;
45*4882a593Smuzhiyun 	/* followed by request/response buffer */
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun static void efx_mcdi_timeout_async(struct timer_list *t);
49*4882a593Smuzhiyun static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
50*4882a593Smuzhiyun 			       bool *was_attached_out);
51*4882a593Smuzhiyun static bool efx_mcdi_poll_once(struct efx_nic *efx);
52*4882a593Smuzhiyun static void efx_mcdi_abandon(struct efx_nic *efx);
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #ifdef CONFIG_SFC_MCDI_LOGGING
55*4882a593Smuzhiyun static bool mcdi_logging_default;
56*4882a593Smuzhiyun module_param(mcdi_logging_default, bool, 0644);
57*4882a593Smuzhiyun MODULE_PARM_DESC(mcdi_logging_default,
58*4882a593Smuzhiyun 		 "Enable MCDI logging on newly-probed functions");
59*4882a593Smuzhiyun #endif
60*4882a593Smuzhiyun 
efx_mcdi_init(struct efx_nic * efx)61*4882a593Smuzhiyun int efx_mcdi_init(struct efx_nic *efx)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi;
64*4882a593Smuzhiyun 	bool already_attached;
65*4882a593Smuzhiyun 	int rc = -ENOMEM;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
68*4882a593Smuzhiyun 	if (!efx->mcdi)
69*4882a593Smuzhiyun 		goto fail;
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	mcdi = efx_mcdi(efx);
72*4882a593Smuzhiyun 	mcdi->efx = efx;
73*4882a593Smuzhiyun #ifdef CONFIG_SFC_MCDI_LOGGING
74*4882a593Smuzhiyun 	/* consuming code assumes buffer is page-sized */
75*4882a593Smuzhiyun 	mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL);
76*4882a593Smuzhiyun 	if (!mcdi->logging_buffer)
77*4882a593Smuzhiyun 		goto fail1;
78*4882a593Smuzhiyun 	mcdi->logging_enabled = mcdi_logging_default;
79*4882a593Smuzhiyun #endif
80*4882a593Smuzhiyun 	init_waitqueue_head(&mcdi->wq);
81*4882a593Smuzhiyun 	init_waitqueue_head(&mcdi->proxy_rx_wq);
82*4882a593Smuzhiyun 	spin_lock_init(&mcdi->iface_lock);
83*4882a593Smuzhiyun 	mcdi->state = MCDI_STATE_QUIESCENT;
84*4882a593Smuzhiyun 	mcdi->mode = MCDI_MODE_POLL;
85*4882a593Smuzhiyun 	spin_lock_init(&mcdi->async_lock);
86*4882a593Smuzhiyun 	INIT_LIST_HEAD(&mcdi->async_list);
87*4882a593Smuzhiyun 	timer_setup(&mcdi->async_timer, efx_mcdi_timeout_async, 0);
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	(void) efx_mcdi_poll_reboot(efx);
90*4882a593Smuzhiyun 	mcdi->new_epoch = true;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	/* Recover from a failed assertion before probing */
93*4882a593Smuzhiyun 	rc = efx_mcdi_handle_assertion(efx);
94*4882a593Smuzhiyun 	if (rc)
95*4882a593Smuzhiyun 		goto fail2;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	/* Let the MC (and BMC, if this is a LOM) know that the driver
98*4882a593Smuzhiyun 	 * is loaded. We should do this before we reset the NIC.
99*4882a593Smuzhiyun 	 */
100*4882a593Smuzhiyun 	rc = efx_mcdi_drv_attach(efx, true, &already_attached);
101*4882a593Smuzhiyun 	if (rc) {
102*4882a593Smuzhiyun 		netif_err(efx, probe, efx->net_dev,
103*4882a593Smuzhiyun 			  "Unable to register driver with MCPU\n");
104*4882a593Smuzhiyun 		goto fail2;
105*4882a593Smuzhiyun 	}
106*4882a593Smuzhiyun 	if (already_attached)
107*4882a593Smuzhiyun 		/* Not a fatal error */
108*4882a593Smuzhiyun 		netif_err(efx, probe, efx->net_dev,
109*4882a593Smuzhiyun 			  "Host already registered with MCPU\n");
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	if (efx->mcdi->fn_flags &
112*4882a593Smuzhiyun 	    (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
113*4882a593Smuzhiyun 		efx->primary = efx;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	return 0;
116*4882a593Smuzhiyun fail2:
117*4882a593Smuzhiyun #ifdef CONFIG_SFC_MCDI_LOGGING
118*4882a593Smuzhiyun 	free_page((unsigned long)mcdi->logging_buffer);
119*4882a593Smuzhiyun fail1:
120*4882a593Smuzhiyun #endif
121*4882a593Smuzhiyun 	kfree(efx->mcdi);
122*4882a593Smuzhiyun 	efx->mcdi = NULL;
123*4882a593Smuzhiyun fail:
124*4882a593Smuzhiyun 	return rc;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun 
efx_mcdi_detach(struct efx_nic * efx)127*4882a593Smuzhiyun void efx_mcdi_detach(struct efx_nic *efx)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun 	if (!efx->mcdi)
130*4882a593Smuzhiyun 		return;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	/* Relinquish the device (back to the BMC, if this is a LOM) */
135*4882a593Smuzhiyun 	efx_mcdi_drv_attach(efx, false, NULL);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
efx_mcdi_fini(struct efx_nic * efx)138*4882a593Smuzhiyun void efx_mcdi_fini(struct efx_nic *efx)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	if (!efx->mcdi)
141*4882a593Smuzhiyun 		return;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun #ifdef CONFIG_SFC_MCDI_LOGGING
144*4882a593Smuzhiyun 	free_page((unsigned long)efx->mcdi->iface.logging_buffer);
145*4882a593Smuzhiyun #endif
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	kfree(efx->mcdi);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun 
efx_mcdi_send_request(struct efx_nic * efx,unsigned cmd,const efx_dword_t * inbuf,size_t inlen)150*4882a593Smuzhiyun static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
151*4882a593Smuzhiyun 				  const efx_dword_t *inbuf, size_t inlen)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
154*4882a593Smuzhiyun #ifdef CONFIG_SFC_MCDI_LOGGING
155*4882a593Smuzhiyun 	char *buf = mcdi->logging_buffer; /* page-sized */
156*4882a593Smuzhiyun #endif
157*4882a593Smuzhiyun 	efx_dword_t hdr[2];
158*4882a593Smuzhiyun 	size_t hdr_len;
159*4882a593Smuzhiyun 	u32 xflags, seqno;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	/* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
164*4882a593Smuzhiyun 	spin_lock_bh(&mcdi->iface_lock);
165*4882a593Smuzhiyun 	++mcdi->seqno;
166*4882a593Smuzhiyun 	seqno = mcdi->seqno & SEQ_MASK;
167*4882a593Smuzhiyun 	spin_unlock_bh(&mcdi->iface_lock);
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	xflags = 0;
170*4882a593Smuzhiyun 	if (mcdi->mode == MCDI_MODE_EVENTS)
171*4882a593Smuzhiyun 		xflags |= MCDI_HEADER_XFLAGS_EVREQ;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	if (efx->type->mcdi_max_ver == 1) {
174*4882a593Smuzhiyun 		/* MCDI v1 */
175*4882a593Smuzhiyun 		EFX_POPULATE_DWORD_7(hdr[0],
176*4882a593Smuzhiyun 				     MCDI_HEADER_RESPONSE, 0,
177*4882a593Smuzhiyun 				     MCDI_HEADER_RESYNC, 1,
178*4882a593Smuzhiyun 				     MCDI_HEADER_CODE, cmd,
179*4882a593Smuzhiyun 				     MCDI_HEADER_DATALEN, inlen,
180*4882a593Smuzhiyun 				     MCDI_HEADER_SEQ, seqno,
181*4882a593Smuzhiyun 				     MCDI_HEADER_XFLAGS, xflags,
182*4882a593Smuzhiyun 				     MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
183*4882a593Smuzhiyun 		hdr_len = 4;
184*4882a593Smuzhiyun 	} else {
185*4882a593Smuzhiyun 		/* MCDI v2 */
186*4882a593Smuzhiyun 		BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
187*4882a593Smuzhiyun 		EFX_POPULATE_DWORD_7(hdr[0],
188*4882a593Smuzhiyun 				     MCDI_HEADER_RESPONSE, 0,
189*4882a593Smuzhiyun 				     MCDI_HEADER_RESYNC, 1,
190*4882a593Smuzhiyun 				     MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
191*4882a593Smuzhiyun 				     MCDI_HEADER_DATALEN, 0,
192*4882a593Smuzhiyun 				     MCDI_HEADER_SEQ, seqno,
193*4882a593Smuzhiyun 				     MCDI_HEADER_XFLAGS, xflags,
194*4882a593Smuzhiyun 				     MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
195*4882a593Smuzhiyun 		EFX_POPULATE_DWORD_2(hdr[1],
196*4882a593Smuzhiyun 				     MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
197*4882a593Smuzhiyun 				     MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
198*4882a593Smuzhiyun 		hdr_len = 8;
199*4882a593Smuzhiyun 	}
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun #ifdef CONFIG_SFC_MCDI_LOGGING
202*4882a593Smuzhiyun 	if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
203*4882a593Smuzhiyun 		int bytes = 0;
204*4882a593Smuzhiyun 		int i;
205*4882a593Smuzhiyun 		/* Lengths should always be a whole number of dwords, so scream
206*4882a593Smuzhiyun 		 * if they're not.
207*4882a593Smuzhiyun 		 */
208*4882a593Smuzhiyun 		WARN_ON_ONCE(hdr_len % 4);
209*4882a593Smuzhiyun 		WARN_ON_ONCE(inlen % 4);
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 		/* We own the logging buffer, as only one MCDI can be in
212*4882a593Smuzhiyun 		 * progress on a NIC at any one time.  So no need for locking.
213*4882a593Smuzhiyun 		 */
214*4882a593Smuzhiyun 		for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++)
215*4882a593Smuzhiyun 			bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
216*4882a593Smuzhiyun 					   " %08x",
217*4882a593Smuzhiyun 					   le32_to_cpu(hdr[i].u32[0]));
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 		for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++)
220*4882a593Smuzhiyun 			bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
221*4882a593Smuzhiyun 					   " %08x",
222*4882a593Smuzhiyun 					   le32_to_cpu(inbuf[i].u32[0]));
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 		netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf);
225*4882a593Smuzhiyun 	}
226*4882a593Smuzhiyun #endif
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	mcdi->new_epoch = false;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun 
efx_mcdi_errno(unsigned int mcdi_err)233*4882a593Smuzhiyun static int efx_mcdi_errno(unsigned int mcdi_err)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun 	switch (mcdi_err) {
236*4882a593Smuzhiyun 	case 0:
237*4882a593Smuzhiyun 		return 0;
238*4882a593Smuzhiyun #define TRANSLATE_ERROR(name)					\
239*4882a593Smuzhiyun 	case MC_CMD_ERR_ ## name:				\
240*4882a593Smuzhiyun 		return -name;
241*4882a593Smuzhiyun 	TRANSLATE_ERROR(EPERM);
242*4882a593Smuzhiyun 	TRANSLATE_ERROR(ENOENT);
243*4882a593Smuzhiyun 	TRANSLATE_ERROR(EINTR);
244*4882a593Smuzhiyun 	TRANSLATE_ERROR(EAGAIN);
245*4882a593Smuzhiyun 	TRANSLATE_ERROR(EACCES);
246*4882a593Smuzhiyun 	TRANSLATE_ERROR(EBUSY);
247*4882a593Smuzhiyun 	TRANSLATE_ERROR(EINVAL);
248*4882a593Smuzhiyun 	TRANSLATE_ERROR(EDEADLK);
249*4882a593Smuzhiyun 	TRANSLATE_ERROR(ENOSYS);
250*4882a593Smuzhiyun 	TRANSLATE_ERROR(ETIME);
251*4882a593Smuzhiyun 	TRANSLATE_ERROR(EALREADY);
252*4882a593Smuzhiyun 	TRANSLATE_ERROR(ENOSPC);
253*4882a593Smuzhiyun #undef TRANSLATE_ERROR
254*4882a593Smuzhiyun 	case MC_CMD_ERR_ENOTSUP:
255*4882a593Smuzhiyun 		return -EOPNOTSUPP;
256*4882a593Smuzhiyun 	case MC_CMD_ERR_ALLOC_FAIL:
257*4882a593Smuzhiyun 		return -ENOBUFS;
258*4882a593Smuzhiyun 	case MC_CMD_ERR_MAC_EXIST:
259*4882a593Smuzhiyun 		return -EADDRINUSE;
260*4882a593Smuzhiyun 	default:
261*4882a593Smuzhiyun 		return -EPROTO;
262*4882a593Smuzhiyun 	}
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun 
efx_mcdi_read_response_header(struct efx_nic * efx)265*4882a593Smuzhiyun static void efx_mcdi_read_response_header(struct efx_nic *efx)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
268*4882a593Smuzhiyun 	unsigned int respseq, respcmd, error;
269*4882a593Smuzhiyun #ifdef CONFIG_SFC_MCDI_LOGGING
270*4882a593Smuzhiyun 	char *buf = mcdi->logging_buffer; /* page-sized */
271*4882a593Smuzhiyun #endif
272*4882a593Smuzhiyun 	efx_dword_t hdr;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	efx->type->mcdi_read_response(efx, &hdr, 0, 4);
275*4882a593Smuzhiyun 	respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
276*4882a593Smuzhiyun 	respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
277*4882a593Smuzhiyun 	error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	if (respcmd != MC_CMD_V2_EXTN) {
280*4882a593Smuzhiyun 		mcdi->resp_hdr_len = 4;
281*4882a593Smuzhiyun 		mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
282*4882a593Smuzhiyun 	} else {
283*4882a593Smuzhiyun 		efx->type->mcdi_read_response(efx, &hdr, 4, 4);
284*4882a593Smuzhiyun 		mcdi->resp_hdr_len = 8;
285*4882a593Smuzhiyun 		mcdi->resp_data_len =
286*4882a593Smuzhiyun 			EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
287*4882a593Smuzhiyun 	}
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun #ifdef CONFIG_SFC_MCDI_LOGGING
290*4882a593Smuzhiyun 	if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
291*4882a593Smuzhiyun 		size_t hdr_len, data_len;
292*4882a593Smuzhiyun 		int bytes = 0;
293*4882a593Smuzhiyun 		int i;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 		WARN_ON_ONCE(mcdi->resp_hdr_len % 4);
296*4882a593Smuzhiyun 		hdr_len = mcdi->resp_hdr_len / 4;
297*4882a593Smuzhiyun 		/* MCDI_DECLARE_BUF ensures that underlying buffer is padded
298*4882a593Smuzhiyun 		 * to dword size, and the MCDI buffer is always dword size
299*4882a593Smuzhiyun 		 */
300*4882a593Smuzhiyun 		data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4);
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 		/* We own the logging buffer, as only one MCDI can be in
303*4882a593Smuzhiyun 		 * progress on a NIC at any one time.  So no need for locking.
304*4882a593Smuzhiyun 		 */
305*4882a593Smuzhiyun 		for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) {
306*4882a593Smuzhiyun 			efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4);
307*4882a593Smuzhiyun 			bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
308*4882a593Smuzhiyun 					   " %08x", le32_to_cpu(hdr.u32[0]));
309*4882a593Smuzhiyun 		}
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 		for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) {
312*4882a593Smuzhiyun 			efx->type->mcdi_read_response(efx, &hdr,
313*4882a593Smuzhiyun 					mcdi->resp_hdr_len + (i * 4), 4);
314*4882a593Smuzhiyun 			bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
315*4882a593Smuzhiyun 					   " %08x", le32_to_cpu(hdr.u32[0]));
316*4882a593Smuzhiyun 		}
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 		netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf);
319*4882a593Smuzhiyun 	}
320*4882a593Smuzhiyun #endif
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	mcdi->resprc_raw = 0;
323*4882a593Smuzhiyun 	if (error && mcdi->resp_data_len == 0) {
324*4882a593Smuzhiyun 		netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
325*4882a593Smuzhiyun 		mcdi->resprc = -EIO;
326*4882a593Smuzhiyun 	} else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
327*4882a593Smuzhiyun 		netif_err(efx, hw, efx->net_dev,
328*4882a593Smuzhiyun 			  "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
329*4882a593Smuzhiyun 			  respseq, mcdi->seqno);
330*4882a593Smuzhiyun 		mcdi->resprc = -EIO;
331*4882a593Smuzhiyun 	} else if (error) {
332*4882a593Smuzhiyun 		efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
333*4882a593Smuzhiyun 		mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0);
334*4882a593Smuzhiyun 		mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw);
335*4882a593Smuzhiyun 	} else {
336*4882a593Smuzhiyun 		mcdi->resprc = 0;
337*4882a593Smuzhiyun 	}
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun 
efx_mcdi_poll_once(struct efx_nic * efx)340*4882a593Smuzhiyun static bool efx_mcdi_poll_once(struct efx_nic *efx)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	rmb();
345*4882a593Smuzhiyun 	if (!efx->type->mcdi_poll_response(efx))
346*4882a593Smuzhiyun 		return false;
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	spin_lock_bh(&mcdi->iface_lock);
349*4882a593Smuzhiyun 	efx_mcdi_read_response_header(efx);
350*4882a593Smuzhiyun 	spin_unlock_bh(&mcdi->iface_lock);
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	return true;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun 
efx_mcdi_poll(struct efx_nic * efx)355*4882a593Smuzhiyun static int efx_mcdi_poll(struct efx_nic *efx)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
358*4882a593Smuzhiyun 	unsigned long time, finish;
359*4882a593Smuzhiyun 	unsigned int spins;
360*4882a593Smuzhiyun 	int rc;
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	/* Check for a reboot atomically with respect to efx_mcdi_copyout() */
363*4882a593Smuzhiyun 	rc = efx_mcdi_poll_reboot(efx);
364*4882a593Smuzhiyun 	if (rc) {
365*4882a593Smuzhiyun 		spin_lock_bh(&mcdi->iface_lock);
366*4882a593Smuzhiyun 		mcdi->resprc = rc;
367*4882a593Smuzhiyun 		mcdi->resp_hdr_len = 0;
368*4882a593Smuzhiyun 		mcdi->resp_data_len = 0;
369*4882a593Smuzhiyun 		spin_unlock_bh(&mcdi->iface_lock);
370*4882a593Smuzhiyun 		return 0;
371*4882a593Smuzhiyun 	}
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	/* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
374*4882a593Smuzhiyun 	 * because generally mcdi responses are fast. After that, back off
375*4882a593Smuzhiyun 	 * and poll once a jiffy (approximately)
376*4882a593Smuzhiyun 	 */
377*4882a593Smuzhiyun 	spins = USER_TICK_USEC;
378*4882a593Smuzhiyun 	finish = jiffies + MCDI_RPC_TIMEOUT;
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	while (1) {
381*4882a593Smuzhiyun 		if (spins != 0) {
382*4882a593Smuzhiyun 			--spins;
383*4882a593Smuzhiyun 			udelay(1);
384*4882a593Smuzhiyun 		} else {
385*4882a593Smuzhiyun 			schedule_timeout_uninterruptible(1);
386*4882a593Smuzhiyun 		}
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 		time = jiffies;
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 		if (efx_mcdi_poll_once(efx))
391*4882a593Smuzhiyun 			break;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 		if (time_after(time, finish))
394*4882a593Smuzhiyun 			return -ETIMEDOUT;
395*4882a593Smuzhiyun 	}
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	/* Return rc=0 like wait_event_timeout() */
398*4882a593Smuzhiyun 	return 0;
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun /* Test and clear MC-rebooted flag for this port/function; reset
402*4882a593Smuzhiyun  * software state as necessary.
403*4882a593Smuzhiyun  */
efx_mcdi_poll_reboot(struct efx_nic * efx)404*4882a593Smuzhiyun int efx_mcdi_poll_reboot(struct efx_nic *efx)
405*4882a593Smuzhiyun {
406*4882a593Smuzhiyun 	if (!efx->mcdi)
407*4882a593Smuzhiyun 		return 0;
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	return efx->type->mcdi_poll_reboot(efx);
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun 
efx_mcdi_acquire_async(struct efx_mcdi_iface * mcdi)412*4882a593Smuzhiyun static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun 	return cmpxchg(&mcdi->state,
415*4882a593Smuzhiyun 		       MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
416*4882a593Smuzhiyun 		MCDI_STATE_QUIESCENT;
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun 
efx_mcdi_acquire_sync(struct efx_mcdi_iface * mcdi)419*4882a593Smuzhiyun static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
420*4882a593Smuzhiyun {
421*4882a593Smuzhiyun 	/* Wait until the interface becomes QUIESCENT and we win the race
422*4882a593Smuzhiyun 	 * to mark it RUNNING_SYNC.
423*4882a593Smuzhiyun 	 */
424*4882a593Smuzhiyun 	wait_event(mcdi->wq,
425*4882a593Smuzhiyun 		   cmpxchg(&mcdi->state,
426*4882a593Smuzhiyun 			   MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
427*4882a593Smuzhiyun 		   MCDI_STATE_QUIESCENT);
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
efx_mcdi_await_completion(struct efx_nic * efx)430*4882a593Smuzhiyun static int efx_mcdi_await_completion(struct efx_nic *efx)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
435*4882a593Smuzhiyun 			       MCDI_RPC_TIMEOUT) == 0)
436*4882a593Smuzhiyun 		return -ETIMEDOUT;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	/* Check if efx_mcdi_set_mode() switched us back to polled completions.
439*4882a593Smuzhiyun 	 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
440*4882a593Smuzhiyun 	 * completed the request first, then we'll just end up completing the
441*4882a593Smuzhiyun 	 * request again, which is safe.
442*4882a593Smuzhiyun 	 *
443*4882a593Smuzhiyun 	 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
444*4882a593Smuzhiyun 	 * wait_event_timeout() implicitly provides.
445*4882a593Smuzhiyun 	 */
446*4882a593Smuzhiyun 	if (mcdi->mode == MCDI_MODE_POLL)
447*4882a593Smuzhiyun 		return efx_mcdi_poll(efx);
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	return 0;
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
453*4882a593Smuzhiyun  * requester.  Return whether this was done.  Does not take any locks.
454*4882a593Smuzhiyun  */
efx_mcdi_complete_sync(struct efx_mcdi_iface * mcdi)455*4882a593Smuzhiyun static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
456*4882a593Smuzhiyun {
457*4882a593Smuzhiyun 	if (cmpxchg(&mcdi->state,
458*4882a593Smuzhiyun 		    MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
459*4882a593Smuzhiyun 	    MCDI_STATE_RUNNING_SYNC) {
460*4882a593Smuzhiyun 		wake_up(&mcdi->wq);
461*4882a593Smuzhiyun 		return true;
462*4882a593Smuzhiyun 	}
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	return false;
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun 
efx_mcdi_release(struct efx_mcdi_iface * mcdi)467*4882a593Smuzhiyun static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun 	if (mcdi->mode == MCDI_MODE_EVENTS) {
470*4882a593Smuzhiyun 		struct efx_mcdi_async_param *async;
471*4882a593Smuzhiyun 		struct efx_nic *efx = mcdi->efx;
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 		/* Process the asynchronous request queue */
474*4882a593Smuzhiyun 		spin_lock_bh(&mcdi->async_lock);
475*4882a593Smuzhiyun 		async = list_first_entry_or_null(
476*4882a593Smuzhiyun 			&mcdi->async_list, struct efx_mcdi_async_param, list);
477*4882a593Smuzhiyun 		if (async) {
478*4882a593Smuzhiyun 			mcdi->state = MCDI_STATE_RUNNING_ASYNC;
479*4882a593Smuzhiyun 			efx_mcdi_send_request(efx, async->cmd,
480*4882a593Smuzhiyun 					      (const efx_dword_t *)(async + 1),
481*4882a593Smuzhiyun 					      async->inlen);
482*4882a593Smuzhiyun 			mod_timer(&mcdi->async_timer,
483*4882a593Smuzhiyun 				  jiffies + MCDI_RPC_TIMEOUT);
484*4882a593Smuzhiyun 		}
485*4882a593Smuzhiyun 		spin_unlock_bh(&mcdi->async_lock);
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 		if (async)
488*4882a593Smuzhiyun 			return;
489*4882a593Smuzhiyun 	}
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	mcdi->state = MCDI_STATE_QUIESCENT;
492*4882a593Smuzhiyun 	wake_up(&mcdi->wq);
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
496*4882a593Smuzhiyun  * asynchronous completion function, and release the interface.
497*4882a593Smuzhiyun  * Return whether this was done.  Must be called in bh-disabled
498*4882a593Smuzhiyun  * context.  Will take iface_lock and async_lock.
499*4882a593Smuzhiyun  */
efx_mcdi_complete_async(struct efx_mcdi_iface * mcdi,bool timeout)500*4882a593Smuzhiyun static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun 	struct efx_nic *efx = mcdi->efx;
503*4882a593Smuzhiyun 	struct efx_mcdi_async_param *async;
504*4882a593Smuzhiyun 	size_t hdr_len, data_len, err_len;
505*4882a593Smuzhiyun 	efx_dword_t *outbuf;
506*4882a593Smuzhiyun 	MCDI_DECLARE_BUF_ERR(errbuf);
507*4882a593Smuzhiyun 	int rc;
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun 	if (cmpxchg(&mcdi->state,
510*4882a593Smuzhiyun 		    MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
511*4882a593Smuzhiyun 	    MCDI_STATE_RUNNING_ASYNC)
512*4882a593Smuzhiyun 		return false;
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	spin_lock(&mcdi->iface_lock);
515*4882a593Smuzhiyun 	if (timeout) {
516*4882a593Smuzhiyun 		/* Ensure that if the completion event arrives later,
517*4882a593Smuzhiyun 		 * the seqno check in efx_mcdi_ev_cpl() will fail
518*4882a593Smuzhiyun 		 */
519*4882a593Smuzhiyun 		++mcdi->seqno;
520*4882a593Smuzhiyun 		++mcdi->credits;
521*4882a593Smuzhiyun 		rc = -ETIMEDOUT;
522*4882a593Smuzhiyun 		hdr_len = 0;
523*4882a593Smuzhiyun 		data_len = 0;
524*4882a593Smuzhiyun 	} else {
525*4882a593Smuzhiyun 		rc = mcdi->resprc;
526*4882a593Smuzhiyun 		hdr_len = mcdi->resp_hdr_len;
527*4882a593Smuzhiyun 		data_len = mcdi->resp_data_len;
528*4882a593Smuzhiyun 	}
529*4882a593Smuzhiyun 	spin_unlock(&mcdi->iface_lock);
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	/* Stop the timer.  In case the timer function is running, we
532*4882a593Smuzhiyun 	 * must wait for it to return so that there is no possibility
533*4882a593Smuzhiyun 	 * of it aborting the next request.
534*4882a593Smuzhiyun 	 */
535*4882a593Smuzhiyun 	if (!timeout)
536*4882a593Smuzhiyun 		del_timer_sync(&mcdi->async_timer);
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	spin_lock(&mcdi->async_lock);
539*4882a593Smuzhiyun 	async = list_first_entry(&mcdi->async_list,
540*4882a593Smuzhiyun 				 struct efx_mcdi_async_param, list);
541*4882a593Smuzhiyun 	list_del(&async->list);
542*4882a593Smuzhiyun 	spin_unlock(&mcdi->async_lock);
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	outbuf = (efx_dword_t *)(async + 1);
545*4882a593Smuzhiyun 	efx->type->mcdi_read_response(efx, outbuf, hdr_len,
546*4882a593Smuzhiyun 				      min(async->outlen, data_len));
547*4882a593Smuzhiyun 	if (!timeout && rc && !async->quiet) {
548*4882a593Smuzhiyun 		err_len = min(sizeof(errbuf), data_len);
549*4882a593Smuzhiyun 		efx->type->mcdi_read_response(efx, errbuf, hdr_len,
550*4882a593Smuzhiyun 					      sizeof(errbuf));
551*4882a593Smuzhiyun 		efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
552*4882a593Smuzhiyun 				       err_len, rc);
553*4882a593Smuzhiyun 	}
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	if (async->complete)
556*4882a593Smuzhiyun 		async->complete(efx, async->cookie, rc, outbuf,
557*4882a593Smuzhiyun 				min(async->outlen, data_len));
558*4882a593Smuzhiyun 	kfree(async);
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 	efx_mcdi_release(mcdi);
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun 	return true;
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun 
efx_mcdi_ev_cpl(struct efx_nic * efx,unsigned int seqno,unsigned int datalen,unsigned int mcdi_err)565*4882a593Smuzhiyun static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
566*4882a593Smuzhiyun 			    unsigned int datalen, unsigned int mcdi_err)
567*4882a593Smuzhiyun {
568*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
569*4882a593Smuzhiyun 	bool wake = false;
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	spin_lock(&mcdi->iface_lock);
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
574*4882a593Smuzhiyun 		if (mcdi->credits)
575*4882a593Smuzhiyun 			/* The request has been cancelled */
576*4882a593Smuzhiyun 			--mcdi->credits;
577*4882a593Smuzhiyun 		else
578*4882a593Smuzhiyun 			netif_err(efx, hw, efx->net_dev,
579*4882a593Smuzhiyun 				  "MC response mismatch tx seq 0x%x rx "
580*4882a593Smuzhiyun 				  "seq 0x%x\n", seqno, mcdi->seqno);
581*4882a593Smuzhiyun 	} else {
582*4882a593Smuzhiyun 		if (efx->type->mcdi_max_ver >= 2) {
583*4882a593Smuzhiyun 			/* MCDI v2 responses don't fit in an event */
584*4882a593Smuzhiyun 			efx_mcdi_read_response_header(efx);
585*4882a593Smuzhiyun 		} else {
586*4882a593Smuzhiyun 			mcdi->resprc = efx_mcdi_errno(mcdi_err);
587*4882a593Smuzhiyun 			mcdi->resp_hdr_len = 4;
588*4882a593Smuzhiyun 			mcdi->resp_data_len = datalen;
589*4882a593Smuzhiyun 		}
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 		wake = true;
592*4882a593Smuzhiyun 	}
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	spin_unlock(&mcdi->iface_lock);
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 	if (wake) {
597*4882a593Smuzhiyun 		if (!efx_mcdi_complete_async(mcdi, false))
598*4882a593Smuzhiyun 			(void) efx_mcdi_complete_sync(mcdi);
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 		/* If the interface isn't RUNNING_ASYNC or
601*4882a593Smuzhiyun 		 * RUNNING_SYNC then we've received a duplicate
602*4882a593Smuzhiyun 		 * completion after we've already transitioned back to
603*4882a593Smuzhiyun 		 * QUIESCENT. [A subsequent invocation would increment
604*4882a593Smuzhiyun 		 * seqno, so would have failed the seqno check].
605*4882a593Smuzhiyun 		 */
606*4882a593Smuzhiyun 	}
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun 
efx_mcdi_timeout_async(struct timer_list * t)609*4882a593Smuzhiyun static void efx_mcdi_timeout_async(struct timer_list *t)
610*4882a593Smuzhiyun {
611*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = from_timer(mcdi, t, async_timer);
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun 	efx_mcdi_complete_async(mcdi, true);
614*4882a593Smuzhiyun }
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun static int
efx_mcdi_check_supported(struct efx_nic * efx,unsigned int cmd,size_t inlen)617*4882a593Smuzhiyun efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
618*4882a593Smuzhiyun {
619*4882a593Smuzhiyun 	if (efx->type->mcdi_max_ver < 0 ||
620*4882a593Smuzhiyun 	     (efx->type->mcdi_max_ver < 2 &&
621*4882a593Smuzhiyun 	      cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
622*4882a593Smuzhiyun 		return -EINVAL;
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
625*4882a593Smuzhiyun 	    (efx->type->mcdi_max_ver < 2 &&
626*4882a593Smuzhiyun 	     inlen > MCDI_CTL_SDU_LEN_MAX_V1))
627*4882a593Smuzhiyun 		return -EMSGSIZE;
628*4882a593Smuzhiyun 
629*4882a593Smuzhiyun 	return 0;
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun 
efx_mcdi_get_proxy_handle(struct efx_nic * efx,size_t hdr_len,size_t data_len,u32 * proxy_handle)632*4882a593Smuzhiyun static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx,
633*4882a593Smuzhiyun 				      size_t hdr_len, size_t data_len,
634*4882a593Smuzhiyun 				      u32 *proxy_handle)
635*4882a593Smuzhiyun {
636*4882a593Smuzhiyun 	MCDI_DECLARE_BUF_ERR(testbuf);
637*4882a593Smuzhiyun 	const size_t buflen = sizeof(testbuf);
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun 	if (!proxy_handle || data_len < buflen)
640*4882a593Smuzhiyun 		return false;
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 	efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen);
643*4882a593Smuzhiyun 	if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) {
644*4882a593Smuzhiyun 		*proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE);
645*4882a593Smuzhiyun 		return true;
646*4882a593Smuzhiyun 	}
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	return false;
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun 
_efx_mcdi_rpc_finish(struct efx_nic * efx,unsigned int cmd,size_t inlen,efx_dword_t * outbuf,size_t outlen,size_t * outlen_actual,bool quiet,u32 * proxy_handle,int * raw_rc)651*4882a593Smuzhiyun static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd,
652*4882a593Smuzhiyun 				size_t inlen,
653*4882a593Smuzhiyun 				efx_dword_t *outbuf, size_t outlen,
654*4882a593Smuzhiyun 				size_t *outlen_actual, bool quiet,
655*4882a593Smuzhiyun 				u32 *proxy_handle, int *raw_rc)
656*4882a593Smuzhiyun {
657*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
658*4882a593Smuzhiyun 	MCDI_DECLARE_BUF_ERR(errbuf);
659*4882a593Smuzhiyun 	int rc;
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	if (mcdi->mode == MCDI_MODE_POLL)
662*4882a593Smuzhiyun 		rc = efx_mcdi_poll(efx);
663*4882a593Smuzhiyun 	else
664*4882a593Smuzhiyun 		rc = efx_mcdi_await_completion(efx);
665*4882a593Smuzhiyun 
666*4882a593Smuzhiyun 	if (rc != 0) {
667*4882a593Smuzhiyun 		netif_err(efx, hw, efx->net_dev,
668*4882a593Smuzhiyun 			  "MC command 0x%x inlen %d mode %d timed out\n",
669*4882a593Smuzhiyun 			  cmd, (int)inlen, mcdi->mode);
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun 		if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
672*4882a593Smuzhiyun 			netif_err(efx, hw, efx->net_dev,
673*4882a593Smuzhiyun 				  "MCDI request was completed without an event\n");
674*4882a593Smuzhiyun 			rc = 0;
675*4882a593Smuzhiyun 		}
676*4882a593Smuzhiyun 
677*4882a593Smuzhiyun 		efx_mcdi_abandon(efx);
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 		/* Close the race with efx_mcdi_ev_cpl() executing just too late
680*4882a593Smuzhiyun 		 * and completing a request we've just cancelled, by ensuring
681*4882a593Smuzhiyun 		 * that the seqno check therein fails.
682*4882a593Smuzhiyun 		 */
683*4882a593Smuzhiyun 		spin_lock_bh(&mcdi->iface_lock);
684*4882a593Smuzhiyun 		++mcdi->seqno;
685*4882a593Smuzhiyun 		++mcdi->credits;
686*4882a593Smuzhiyun 		spin_unlock_bh(&mcdi->iface_lock);
687*4882a593Smuzhiyun 	}
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 	if (proxy_handle)
690*4882a593Smuzhiyun 		*proxy_handle = 0;
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun 	if (rc != 0) {
693*4882a593Smuzhiyun 		if (outlen_actual)
694*4882a593Smuzhiyun 			*outlen_actual = 0;
695*4882a593Smuzhiyun 	} else {
696*4882a593Smuzhiyun 		size_t hdr_len, data_len, err_len;
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 		/* At the very least we need a memory barrier here to ensure
699*4882a593Smuzhiyun 		 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
700*4882a593Smuzhiyun 		 * a spurious efx_mcdi_ev_cpl() running concurrently by
701*4882a593Smuzhiyun 		 * acquiring the iface_lock. */
702*4882a593Smuzhiyun 		spin_lock_bh(&mcdi->iface_lock);
703*4882a593Smuzhiyun 		rc = mcdi->resprc;
704*4882a593Smuzhiyun 		if (raw_rc)
705*4882a593Smuzhiyun 			*raw_rc = mcdi->resprc_raw;
706*4882a593Smuzhiyun 		hdr_len = mcdi->resp_hdr_len;
707*4882a593Smuzhiyun 		data_len = mcdi->resp_data_len;
708*4882a593Smuzhiyun 		err_len = min(sizeof(errbuf), data_len);
709*4882a593Smuzhiyun 		spin_unlock_bh(&mcdi->iface_lock);
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 		BUG_ON(rc > 0);
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun 		efx->type->mcdi_read_response(efx, outbuf, hdr_len,
714*4882a593Smuzhiyun 					      min(outlen, data_len));
715*4882a593Smuzhiyun 		if (outlen_actual)
716*4882a593Smuzhiyun 			*outlen_actual = data_len;
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 		efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
719*4882a593Smuzhiyun 
720*4882a593Smuzhiyun 		if (cmd == MC_CMD_REBOOT && rc == -EIO) {
721*4882a593Smuzhiyun 			/* Don't reset if MC_CMD_REBOOT returns EIO */
722*4882a593Smuzhiyun 		} else if (rc == -EIO || rc == -EINTR) {
723*4882a593Smuzhiyun 			netif_err(efx, hw, efx->net_dev, "MC reboot detected\n");
724*4882a593Smuzhiyun 			netif_dbg(efx, hw, efx->net_dev, "MC rebooted during command %d rc %d\n",
725*4882a593Smuzhiyun 				  cmd, -rc);
726*4882a593Smuzhiyun 			if (efx->type->mcdi_reboot_detected)
727*4882a593Smuzhiyun 				efx->type->mcdi_reboot_detected(efx);
728*4882a593Smuzhiyun 			efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
729*4882a593Smuzhiyun 		} else if (proxy_handle && (rc == -EPROTO) &&
730*4882a593Smuzhiyun 			   efx_mcdi_get_proxy_handle(efx, hdr_len, data_len,
731*4882a593Smuzhiyun 						     proxy_handle)) {
732*4882a593Smuzhiyun 			mcdi->proxy_rx_status = 0;
733*4882a593Smuzhiyun 			mcdi->proxy_rx_handle = 0;
734*4882a593Smuzhiyun 			mcdi->state = MCDI_STATE_PROXY_WAIT;
735*4882a593Smuzhiyun 		} else if (rc && !quiet) {
736*4882a593Smuzhiyun 			efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
737*4882a593Smuzhiyun 					       rc);
738*4882a593Smuzhiyun 		}
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 		if (rc == -EIO || rc == -EINTR) {
741*4882a593Smuzhiyun 			msleep(MCDI_STATUS_SLEEP_MS);
742*4882a593Smuzhiyun 			efx_mcdi_poll_reboot(efx);
743*4882a593Smuzhiyun 			mcdi->new_epoch = true;
744*4882a593Smuzhiyun 		}
745*4882a593Smuzhiyun 	}
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun 	if (!proxy_handle || !*proxy_handle)
748*4882a593Smuzhiyun 		efx_mcdi_release(mcdi);
749*4882a593Smuzhiyun 	return rc;
750*4882a593Smuzhiyun }
751*4882a593Smuzhiyun 
efx_mcdi_proxy_abort(struct efx_mcdi_iface * mcdi)752*4882a593Smuzhiyun static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi)
753*4882a593Smuzhiyun {
754*4882a593Smuzhiyun 	if (mcdi->state == MCDI_STATE_PROXY_WAIT) {
755*4882a593Smuzhiyun 		/* Interrupt the proxy wait. */
756*4882a593Smuzhiyun 		mcdi->proxy_rx_status = -EINTR;
757*4882a593Smuzhiyun 		wake_up(&mcdi->proxy_rx_wq);
758*4882a593Smuzhiyun 	}
759*4882a593Smuzhiyun }
760*4882a593Smuzhiyun 
efx_mcdi_ev_proxy_response(struct efx_nic * efx,u32 handle,int status)761*4882a593Smuzhiyun static void efx_mcdi_ev_proxy_response(struct efx_nic *efx,
762*4882a593Smuzhiyun 				       u32 handle, int status)
763*4882a593Smuzhiyun {
764*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun 	WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT);
767*4882a593Smuzhiyun 
768*4882a593Smuzhiyun 	mcdi->proxy_rx_status = efx_mcdi_errno(status);
769*4882a593Smuzhiyun 	/* Ensure the status is written before we update the handle, since the
770*4882a593Smuzhiyun 	 * latter is used to check if we've finished.
771*4882a593Smuzhiyun 	 */
772*4882a593Smuzhiyun 	wmb();
773*4882a593Smuzhiyun 	mcdi->proxy_rx_handle = handle;
774*4882a593Smuzhiyun 	wake_up(&mcdi->proxy_rx_wq);
775*4882a593Smuzhiyun }
776*4882a593Smuzhiyun 
efx_mcdi_proxy_wait(struct efx_nic * efx,u32 handle,bool quiet)777*4882a593Smuzhiyun static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet)
778*4882a593Smuzhiyun {
779*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
780*4882a593Smuzhiyun 	int rc;
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun 	/* Wait for a proxy event, or timeout. */
783*4882a593Smuzhiyun 	rc = wait_event_timeout(mcdi->proxy_rx_wq,
784*4882a593Smuzhiyun 				mcdi->proxy_rx_handle != 0 ||
785*4882a593Smuzhiyun 				mcdi->proxy_rx_status == -EINTR,
786*4882a593Smuzhiyun 				MCDI_RPC_TIMEOUT);
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 	if (rc <= 0) {
789*4882a593Smuzhiyun 		netif_dbg(efx, hw, efx->net_dev,
790*4882a593Smuzhiyun 			  "MCDI proxy timeout %d\n", handle);
791*4882a593Smuzhiyun 		return -ETIMEDOUT;
792*4882a593Smuzhiyun 	} else if (mcdi->proxy_rx_handle != handle) {
793*4882a593Smuzhiyun 		netif_warn(efx, hw, efx->net_dev,
794*4882a593Smuzhiyun 			   "MCDI proxy unexpected handle %d (expected %d)\n",
795*4882a593Smuzhiyun 			   mcdi->proxy_rx_handle, handle);
796*4882a593Smuzhiyun 		return -EINVAL;
797*4882a593Smuzhiyun 	}
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun 	return mcdi->proxy_rx_status;
800*4882a593Smuzhiyun }
801*4882a593Smuzhiyun 
_efx_mcdi_rpc(struct efx_nic * efx,unsigned int cmd,const efx_dword_t * inbuf,size_t inlen,efx_dword_t * outbuf,size_t outlen,size_t * outlen_actual,bool quiet,int * raw_rc)802*4882a593Smuzhiyun static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd,
803*4882a593Smuzhiyun 			 const efx_dword_t *inbuf, size_t inlen,
804*4882a593Smuzhiyun 			 efx_dword_t *outbuf, size_t outlen,
805*4882a593Smuzhiyun 			 size_t *outlen_actual, bool quiet, int *raw_rc)
806*4882a593Smuzhiyun {
807*4882a593Smuzhiyun 	u32 proxy_handle = 0; /* Zero is an invalid proxy handle. */
808*4882a593Smuzhiyun 	int rc;
809*4882a593Smuzhiyun 
810*4882a593Smuzhiyun 	if (inbuf && inlen && (inbuf == outbuf)) {
811*4882a593Smuzhiyun 		/* The input buffer can't be aliased with the output. */
812*4882a593Smuzhiyun 		WARN_ON(1);
813*4882a593Smuzhiyun 		return -EINVAL;
814*4882a593Smuzhiyun 	}
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun 	rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
817*4882a593Smuzhiyun 	if (rc)
818*4882a593Smuzhiyun 		return rc;
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun 	rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
821*4882a593Smuzhiyun 				  outlen_actual, quiet, &proxy_handle, raw_rc);
822*4882a593Smuzhiyun 
823*4882a593Smuzhiyun 	if (proxy_handle) {
824*4882a593Smuzhiyun 		/* Handle proxy authorisation. This allows approval of MCDI
825*4882a593Smuzhiyun 		 * operations to be delegated to the admin function, allowing
826*4882a593Smuzhiyun 		 * fine control over (eg) multicast subscriptions.
827*4882a593Smuzhiyun 		 */
828*4882a593Smuzhiyun 		struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun 		netif_dbg(efx, hw, efx->net_dev,
831*4882a593Smuzhiyun 			  "MCDI waiting for proxy auth %d\n",
832*4882a593Smuzhiyun 			  proxy_handle);
833*4882a593Smuzhiyun 		rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet);
834*4882a593Smuzhiyun 
835*4882a593Smuzhiyun 		if (rc == 0) {
836*4882a593Smuzhiyun 			netif_dbg(efx, hw, efx->net_dev,
837*4882a593Smuzhiyun 				  "MCDI proxy retry %d\n", proxy_handle);
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun 			/* We now retry the original request. */
840*4882a593Smuzhiyun 			mcdi->state = MCDI_STATE_RUNNING_SYNC;
841*4882a593Smuzhiyun 			efx_mcdi_send_request(efx, cmd, inbuf, inlen);
842*4882a593Smuzhiyun 
843*4882a593Smuzhiyun 			rc = _efx_mcdi_rpc_finish(efx, cmd, inlen,
844*4882a593Smuzhiyun 						  outbuf, outlen, outlen_actual,
845*4882a593Smuzhiyun 						  quiet, NULL, raw_rc);
846*4882a593Smuzhiyun 		} else {
847*4882a593Smuzhiyun 			netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err,
848*4882a593Smuzhiyun 				       "MC command 0x%x failed after proxy auth rc=%d\n",
849*4882a593Smuzhiyun 				       cmd, rc);
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun 			if (rc == -EINTR || rc == -EIO)
852*4882a593Smuzhiyun 				efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
853*4882a593Smuzhiyun 			efx_mcdi_release(mcdi);
854*4882a593Smuzhiyun 		}
855*4882a593Smuzhiyun 	}
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun 	return rc;
858*4882a593Smuzhiyun }
859*4882a593Smuzhiyun 
_efx_mcdi_rpc_evb_retry(struct efx_nic * efx,unsigned cmd,const efx_dword_t * inbuf,size_t inlen,efx_dword_t * outbuf,size_t outlen,size_t * outlen_actual,bool quiet)860*4882a593Smuzhiyun static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd,
861*4882a593Smuzhiyun 				   const efx_dword_t *inbuf, size_t inlen,
862*4882a593Smuzhiyun 				   efx_dword_t *outbuf, size_t outlen,
863*4882a593Smuzhiyun 				   size_t *outlen_actual, bool quiet)
864*4882a593Smuzhiyun {
865*4882a593Smuzhiyun 	int raw_rc = 0;
866*4882a593Smuzhiyun 	int rc;
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
869*4882a593Smuzhiyun 			   outbuf, outlen, outlen_actual, true, &raw_rc);
870*4882a593Smuzhiyun 
871*4882a593Smuzhiyun 	if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
872*4882a593Smuzhiyun 	    efx->type->is_vf) {
873*4882a593Smuzhiyun 		/* If the EVB port isn't available within a VF this may
874*4882a593Smuzhiyun 		 * mean the PF is still bringing the switch up. We should
875*4882a593Smuzhiyun 		 * retry our request shortly.
876*4882a593Smuzhiyun 		 */
877*4882a593Smuzhiyun 		unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT;
878*4882a593Smuzhiyun 		unsigned int delay_us = 10000;
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun 		netif_dbg(efx, hw, efx->net_dev,
881*4882a593Smuzhiyun 			  "%s: NO_EVB_PORT; will retry request\n",
882*4882a593Smuzhiyun 			  __func__);
883*4882a593Smuzhiyun 
884*4882a593Smuzhiyun 		do {
885*4882a593Smuzhiyun 			usleep_range(delay_us, delay_us + 10000);
886*4882a593Smuzhiyun 			rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
887*4882a593Smuzhiyun 					   outbuf, outlen, outlen_actual,
888*4882a593Smuzhiyun 					   true, &raw_rc);
889*4882a593Smuzhiyun 			if (delay_us < 100000)
890*4882a593Smuzhiyun 				delay_us <<= 1;
891*4882a593Smuzhiyun 		} while ((rc == -EPROTO) &&
892*4882a593Smuzhiyun 			 (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
893*4882a593Smuzhiyun 			 time_before(jiffies, abort_time));
894*4882a593Smuzhiyun 	}
895*4882a593Smuzhiyun 
896*4882a593Smuzhiyun 	if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO))
897*4882a593Smuzhiyun 		efx_mcdi_display_error(efx, cmd, inlen,
898*4882a593Smuzhiyun 				       outbuf, outlen, rc);
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun 	return rc;
901*4882a593Smuzhiyun }
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun /**
904*4882a593Smuzhiyun  * efx_mcdi_rpc - Issue an MCDI command and wait for completion
905*4882a593Smuzhiyun  * @efx: NIC through which to issue the command
906*4882a593Smuzhiyun  * @cmd: Command type number
907*4882a593Smuzhiyun  * @inbuf: Command parameters
908*4882a593Smuzhiyun  * @inlen: Length of command parameters, in bytes.  Must be a multiple
909*4882a593Smuzhiyun  *	of 4 and no greater than %MCDI_CTL_SDU_LEN_MAX_V1.
910*4882a593Smuzhiyun  * @outbuf: Response buffer.  May be %NULL if @outlen is 0.
911*4882a593Smuzhiyun  * @outlen: Length of response buffer, in bytes.  If the actual
912*4882a593Smuzhiyun  *	response is longer than @outlen & ~3, it will be truncated
913*4882a593Smuzhiyun  *	to that length.
914*4882a593Smuzhiyun  * @outlen_actual: Pointer through which to return the actual response
915*4882a593Smuzhiyun  *	length.  May be %NULL if this is not needed.
916*4882a593Smuzhiyun  *
917*4882a593Smuzhiyun  * This function may sleep and therefore must be called in an appropriate
918*4882a593Smuzhiyun  * context.
919*4882a593Smuzhiyun  *
920*4882a593Smuzhiyun  * Return: A negative error code, or zero if successful.  The error
921*4882a593Smuzhiyun  *	code may come from the MCDI response or may indicate a failure
922*4882a593Smuzhiyun  *	to communicate with the MC.  In the former case, the response
923*4882a593Smuzhiyun  *	will still be copied to @outbuf and *@outlen_actual will be
924*4882a593Smuzhiyun  *	set accordingly.  In the latter case, *@outlen_actual will be
925*4882a593Smuzhiyun  *	set to zero.
926*4882a593Smuzhiyun  */
efx_mcdi_rpc(struct efx_nic * efx,unsigned cmd,const efx_dword_t * inbuf,size_t inlen,efx_dword_t * outbuf,size_t outlen,size_t * outlen_actual)927*4882a593Smuzhiyun int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
928*4882a593Smuzhiyun 		 const efx_dword_t *inbuf, size_t inlen,
929*4882a593Smuzhiyun 		 efx_dword_t *outbuf, size_t outlen,
930*4882a593Smuzhiyun 		 size_t *outlen_actual)
931*4882a593Smuzhiyun {
932*4882a593Smuzhiyun 	return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
933*4882a593Smuzhiyun 				       outlen_actual, false);
934*4882a593Smuzhiyun }
935*4882a593Smuzhiyun 
936*4882a593Smuzhiyun /* Normally, on receiving an error code in the MCDI response,
937*4882a593Smuzhiyun  * efx_mcdi_rpc will log an error message containing (among other
938*4882a593Smuzhiyun  * things) the raw error code, by means of efx_mcdi_display_error.
939*4882a593Smuzhiyun  * This _quiet version suppresses that; if the caller wishes to log
940*4882a593Smuzhiyun  * the error conditionally on the return code, it should call this
941*4882a593Smuzhiyun  * function and is then responsible for calling efx_mcdi_display_error
942*4882a593Smuzhiyun  * as needed.
943*4882a593Smuzhiyun  */
efx_mcdi_rpc_quiet(struct efx_nic * efx,unsigned cmd,const efx_dword_t * inbuf,size_t inlen,efx_dword_t * outbuf,size_t outlen,size_t * outlen_actual)944*4882a593Smuzhiyun int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
945*4882a593Smuzhiyun 		       const efx_dword_t *inbuf, size_t inlen,
946*4882a593Smuzhiyun 		       efx_dword_t *outbuf, size_t outlen,
947*4882a593Smuzhiyun 		       size_t *outlen_actual)
948*4882a593Smuzhiyun {
949*4882a593Smuzhiyun 	return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
950*4882a593Smuzhiyun 				       outlen_actual, true);
951*4882a593Smuzhiyun }
952*4882a593Smuzhiyun 
efx_mcdi_rpc_start(struct efx_nic * efx,unsigned cmd,const efx_dword_t * inbuf,size_t inlen)953*4882a593Smuzhiyun int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
954*4882a593Smuzhiyun 		       const efx_dword_t *inbuf, size_t inlen)
955*4882a593Smuzhiyun {
956*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
957*4882a593Smuzhiyun 	int rc;
958*4882a593Smuzhiyun 
959*4882a593Smuzhiyun 	rc = efx_mcdi_check_supported(efx, cmd, inlen);
960*4882a593Smuzhiyun 	if (rc)
961*4882a593Smuzhiyun 		return rc;
962*4882a593Smuzhiyun 
963*4882a593Smuzhiyun 	if (efx->mc_bist_for_other_fn)
964*4882a593Smuzhiyun 		return -ENETDOWN;
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun 	if (mcdi->mode == MCDI_MODE_FAIL)
967*4882a593Smuzhiyun 		return -ENETDOWN;
968*4882a593Smuzhiyun 
969*4882a593Smuzhiyun 	efx_mcdi_acquire_sync(mcdi);
970*4882a593Smuzhiyun 	efx_mcdi_send_request(efx, cmd, inbuf, inlen);
971*4882a593Smuzhiyun 	return 0;
972*4882a593Smuzhiyun }
973*4882a593Smuzhiyun 
_efx_mcdi_rpc_async(struct efx_nic * efx,unsigned int cmd,const efx_dword_t * inbuf,size_t inlen,size_t outlen,efx_mcdi_async_completer * complete,unsigned long cookie,bool quiet)974*4882a593Smuzhiyun static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
975*4882a593Smuzhiyun 			       const efx_dword_t *inbuf, size_t inlen,
976*4882a593Smuzhiyun 			       size_t outlen,
977*4882a593Smuzhiyun 			       efx_mcdi_async_completer *complete,
978*4882a593Smuzhiyun 			       unsigned long cookie, bool quiet)
979*4882a593Smuzhiyun {
980*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
981*4882a593Smuzhiyun 	struct efx_mcdi_async_param *async;
982*4882a593Smuzhiyun 	int rc;
983*4882a593Smuzhiyun 
984*4882a593Smuzhiyun 	rc = efx_mcdi_check_supported(efx, cmd, inlen);
985*4882a593Smuzhiyun 	if (rc)
986*4882a593Smuzhiyun 		return rc;
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun 	if (efx->mc_bist_for_other_fn)
989*4882a593Smuzhiyun 		return -ENETDOWN;
990*4882a593Smuzhiyun 
991*4882a593Smuzhiyun 	async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
992*4882a593Smuzhiyun 			GFP_ATOMIC);
993*4882a593Smuzhiyun 	if (!async)
994*4882a593Smuzhiyun 		return -ENOMEM;
995*4882a593Smuzhiyun 
996*4882a593Smuzhiyun 	async->cmd = cmd;
997*4882a593Smuzhiyun 	async->inlen = inlen;
998*4882a593Smuzhiyun 	async->outlen = outlen;
999*4882a593Smuzhiyun 	async->quiet = quiet;
1000*4882a593Smuzhiyun 	async->complete = complete;
1001*4882a593Smuzhiyun 	async->cookie = cookie;
1002*4882a593Smuzhiyun 	memcpy(async + 1, inbuf, inlen);
1003*4882a593Smuzhiyun 
1004*4882a593Smuzhiyun 	spin_lock_bh(&mcdi->async_lock);
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun 	if (mcdi->mode == MCDI_MODE_EVENTS) {
1007*4882a593Smuzhiyun 		list_add_tail(&async->list, &mcdi->async_list);
1008*4882a593Smuzhiyun 
1009*4882a593Smuzhiyun 		/* If this is at the front of the queue, try to start it
1010*4882a593Smuzhiyun 		 * immediately
1011*4882a593Smuzhiyun 		 */
1012*4882a593Smuzhiyun 		if (mcdi->async_list.next == &async->list &&
1013*4882a593Smuzhiyun 		    efx_mcdi_acquire_async(mcdi)) {
1014*4882a593Smuzhiyun 			efx_mcdi_send_request(efx, cmd, inbuf, inlen);
1015*4882a593Smuzhiyun 			mod_timer(&mcdi->async_timer,
1016*4882a593Smuzhiyun 				  jiffies + MCDI_RPC_TIMEOUT);
1017*4882a593Smuzhiyun 		}
1018*4882a593Smuzhiyun 	} else {
1019*4882a593Smuzhiyun 		kfree(async);
1020*4882a593Smuzhiyun 		rc = -ENETDOWN;
1021*4882a593Smuzhiyun 	}
1022*4882a593Smuzhiyun 
1023*4882a593Smuzhiyun 	spin_unlock_bh(&mcdi->async_lock);
1024*4882a593Smuzhiyun 
1025*4882a593Smuzhiyun 	return rc;
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun 
1028*4882a593Smuzhiyun /**
1029*4882a593Smuzhiyun  * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
1030*4882a593Smuzhiyun  * @efx: NIC through which to issue the command
1031*4882a593Smuzhiyun  * @cmd: Command type number
1032*4882a593Smuzhiyun  * @inbuf: Command parameters
1033*4882a593Smuzhiyun  * @inlen: Length of command parameters, in bytes
1034*4882a593Smuzhiyun  * @outlen: Length to allocate for response buffer, in bytes
1035*4882a593Smuzhiyun  * @complete: Function to be called on completion or cancellation.
1036*4882a593Smuzhiyun  * @cookie: Arbitrary value to be passed to @complete.
1037*4882a593Smuzhiyun  *
1038*4882a593Smuzhiyun  * This function does not sleep and therefore may be called in atomic
1039*4882a593Smuzhiyun  * context.  It will fail if event queues are disabled or if MCDI
1040*4882a593Smuzhiyun  * event completions have been disabled due to an error.
1041*4882a593Smuzhiyun  *
1042*4882a593Smuzhiyun  * If it succeeds, the @complete function will be called exactly once
1043*4882a593Smuzhiyun  * in atomic context, when one of the following occurs:
1044*4882a593Smuzhiyun  * (a) the completion event is received (in NAPI context)
1045*4882a593Smuzhiyun  * (b) event queues are disabled (in the process that disables them)
1046*4882a593Smuzhiyun  * (c) the request times-out (in timer context)
1047*4882a593Smuzhiyun  */
1048*4882a593Smuzhiyun int
efx_mcdi_rpc_async(struct efx_nic * efx,unsigned int cmd,const efx_dword_t * inbuf,size_t inlen,size_t outlen,efx_mcdi_async_completer * complete,unsigned long cookie)1049*4882a593Smuzhiyun efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
1050*4882a593Smuzhiyun 		   const efx_dword_t *inbuf, size_t inlen, size_t outlen,
1051*4882a593Smuzhiyun 		   efx_mcdi_async_completer *complete, unsigned long cookie)
1052*4882a593Smuzhiyun {
1053*4882a593Smuzhiyun 	return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
1054*4882a593Smuzhiyun 				   cookie, false);
1055*4882a593Smuzhiyun }
1056*4882a593Smuzhiyun 
efx_mcdi_rpc_async_quiet(struct efx_nic * efx,unsigned int cmd,const efx_dword_t * inbuf,size_t inlen,size_t outlen,efx_mcdi_async_completer * complete,unsigned long cookie)1057*4882a593Smuzhiyun int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
1058*4882a593Smuzhiyun 			     const efx_dword_t *inbuf, size_t inlen,
1059*4882a593Smuzhiyun 			     size_t outlen, efx_mcdi_async_completer *complete,
1060*4882a593Smuzhiyun 			     unsigned long cookie)
1061*4882a593Smuzhiyun {
1062*4882a593Smuzhiyun 	return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
1063*4882a593Smuzhiyun 				   cookie, true);
1064*4882a593Smuzhiyun }
1065*4882a593Smuzhiyun 
efx_mcdi_rpc_finish(struct efx_nic * efx,unsigned cmd,size_t inlen,efx_dword_t * outbuf,size_t outlen,size_t * outlen_actual)1066*4882a593Smuzhiyun int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
1067*4882a593Smuzhiyun 			efx_dword_t *outbuf, size_t outlen,
1068*4882a593Smuzhiyun 			size_t *outlen_actual)
1069*4882a593Smuzhiyun {
1070*4882a593Smuzhiyun 	return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
1071*4882a593Smuzhiyun 				    outlen_actual, false, NULL, NULL);
1072*4882a593Smuzhiyun }
1073*4882a593Smuzhiyun 
efx_mcdi_rpc_finish_quiet(struct efx_nic * efx,unsigned cmd,size_t inlen,efx_dword_t * outbuf,size_t outlen,size_t * outlen_actual)1074*4882a593Smuzhiyun int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
1075*4882a593Smuzhiyun 			      efx_dword_t *outbuf, size_t outlen,
1076*4882a593Smuzhiyun 			      size_t *outlen_actual)
1077*4882a593Smuzhiyun {
1078*4882a593Smuzhiyun 	return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
1079*4882a593Smuzhiyun 				    outlen_actual, true, NULL, NULL);
1080*4882a593Smuzhiyun }
1081*4882a593Smuzhiyun 
efx_mcdi_display_error(struct efx_nic * efx,unsigned cmd,size_t inlen,efx_dword_t * outbuf,size_t outlen,int rc)1082*4882a593Smuzhiyun void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
1083*4882a593Smuzhiyun 			    size_t inlen, efx_dword_t *outbuf,
1084*4882a593Smuzhiyun 			    size_t outlen, int rc)
1085*4882a593Smuzhiyun {
1086*4882a593Smuzhiyun 	int code = 0, err_arg = 0;
1087*4882a593Smuzhiyun 
1088*4882a593Smuzhiyun 	if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
1089*4882a593Smuzhiyun 		code = MCDI_DWORD(outbuf, ERR_CODE);
1090*4882a593Smuzhiyun 	if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
1091*4882a593Smuzhiyun 		err_arg = MCDI_DWORD(outbuf, ERR_ARG);
1092*4882a593Smuzhiyun 	netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err,
1093*4882a593Smuzhiyun 		       "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n",
1094*4882a593Smuzhiyun 		       cmd, inlen, rc, code, err_arg);
1095*4882a593Smuzhiyun }
1096*4882a593Smuzhiyun 
1097*4882a593Smuzhiyun /* Switch to polled MCDI completions.  This can be called in various
1098*4882a593Smuzhiyun  * error conditions with various locks held, so it must be lockless.
1099*4882a593Smuzhiyun  * Caller is responsible for flushing asynchronous requests later.
1100*4882a593Smuzhiyun  */
efx_mcdi_mode_poll(struct efx_nic * efx)1101*4882a593Smuzhiyun void efx_mcdi_mode_poll(struct efx_nic *efx)
1102*4882a593Smuzhiyun {
1103*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi;
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun 	if (!efx->mcdi)
1106*4882a593Smuzhiyun 		return;
1107*4882a593Smuzhiyun 
1108*4882a593Smuzhiyun 	mcdi = efx_mcdi(efx);
1109*4882a593Smuzhiyun 	/* If already in polling mode, nothing to do.
1110*4882a593Smuzhiyun 	 * If in fail-fast state, don't switch to polled completion.
1111*4882a593Smuzhiyun 	 * FLR recovery will do that later.
1112*4882a593Smuzhiyun 	 */
1113*4882a593Smuzhiyun 	if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
1114*4882a593Smuzhiyun 		return;
1115*4882a593Smuzhiyun 
1116*4882a593Smuzhiyun 	/* We can switch from event completion to polled completion, because
1117*4882a593Smuzhiyun 	 * mcdi requests are always completed in shared memory. We do this by
1118*4882a593Smuzhiyun 	 * switching the mode to POLL'd then completing the request.
1119*4882a593Smuzhiyun 	 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
1120*4882a593Smuzhiyun 	 *
1121*4882a593Smuzhiyun 	 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
1122*4882a593Smuzhiyun 	 * which efx_mcdi_complete_sync() provides for us.
1123*4882a593Smuzhiyun 	 */
1124*4882a593Smuzhiyun 	mcdi->mode = MCDI_MODE_POLL;
1125*4882a593Smuzhiyun 
1126*4882a593Smuzhiyun 	efx_mcdi_complete_sync(mcdi);
1127*4882a593Smuzhiyun }
1128*4882a593Smuzhiyun 
1129*4882a593Smuzhiyun /* Flush any running or queued asynchronous requests, after event processing
1130*4882a593Smuzhiyun  * is stopped
1131*4882a593Smuzhiyun  */
efx_mcdi_flush_async(struct efx_nic * efx)1132*4882a593Smuzhiyun void efx_mcdi_flush_async(struct efx_nic *efx)
1133*4882a593Smuzhiyun {
1134*4882a593Smuzhiyun 	struct efx_mcdi_async_param *async, *next;
1135*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi;
1136*4882a593Smuzhiyun 
1137*4882a593Smuzhiyun 	if (!efx->mcdi)
1138*4882a593Smuzhiyun 		return;
1139*4882a593Smuzhiyun 
1140*4882a593Smuzhiyun 	mcdi = efx_mcdi(efx);
1141*4882a593Smuzhiyun 
1142*4882a593Smuzhiyun 	/* We must be in poll or fail mode so no more requests can be queued */
1143*4882a593Smuzhiyun 	BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
1144*4882a593Smuzhiyun 
1145*4882a593Smuzhiyun 	del_timer_sync(&mcdi->async_timer);
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun 	/* If a request is still running, make sure we give the MC
1148*4882a593Smuzhiyun 	 * time to complete it so that the response won't overwrite our
1149*4882a593Smuzhiyun 	 * next request.
1150*4882a593Smuzhiyun 	 */
1151*4882a593Smuzhiyun 	if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
1152*4882a593Smuzhiyun 		efx_mcdi_poll(efx);
1153*4882a593Smuzhiyun 		mcdi->state = MCDI_STATE_QUIESCENT;
1154*4882a593Smuzhiyun 	}
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun 	/* Nothing else will access the async list now, so it is safe
1157*4882a593Smuzhiyun 	 * to walk it without holding async_lock.  If we hold it while
1158*4882a593Smuzhiyun 	 * calling a completer then lockdep may warn that we have
1159*4882a593Smuzhiyun 	 * acquired locks in the wrong order.
1160*4882a593Smuzhiyun 	 */
1161*4882a593Smuzhiyun 	list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
1162*4882a593Smuzhiyun 		if (async->complete)
1163*4882a593Smuzhiyun 			async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
1164*4882a593Smuzhiyun 		list_del(&async->list);
1165*4882a593Smuzhiyun 		kfree(async);
1166*4882a593Smuzhiyun 	}
1167*4882a593Smuzhiyun }
1168*4882a593Smuzhiyun 
efx_mcdi_mode_event(struct efx_nic * efx)1169*4882a593Smuzhiyun void efx_mcdi_mode_event(struct efx_nic *efx)
1170*4882a593Smuzhiyun {
1171*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi;
1172*4882a593Smuzhiyun 
1173*4882a593Smuzhiyun 	if (!efx->mcdi)
1174*4882a593Smuzhiyun 		return;
1175*4882a593Smuzhiyun 
1176*4882a593Smuzhiyun 	mcdi = efx_mcdi(efx);
1177*4882a593Smuzhiyun 	/* If already in event completion mode, nothing to do.
1178*4882a593Smuzhiyun 	 * If in fail-fast state, don't switch to event completion.  FLR
1179*4882a593Smuzhiyun 	 * recovery will do that later.
1180*4882a593Smuzhiyun 	 */
1181*4882a593Smuzhiyun 	if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
1182*4882a593Smuzhiyun 		return;
1183*4882a593Smuzhiyun 
1184*4882a593Smuzhiyun 	/* We can't switch from polled to event completion in the middle of a
1185*4882a593Smuzhiyun 	 * request, because the completion method is specified in the request.
1186*4882a593Smuzhiyun 	 * So acquire the interface to serialise the requestors. We don't need
1187*4882a593Smuzhiyun 	 * to acquire the iface_lock to change the mode here, but we do need a
1188*4882a593Smuzhiyun 	 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
1189*4882a593Smuzhiyun 	 * efx_mcdi_acquire() provides.
1190*4882a593Smuzhiyun 	 */
1191*4882a593Smuzhiyun 	efx_mcdi_acquire_sync(mcdi);
1192*4882a593Smuzhiyun 	mcdi->mode = MCDI_MODE_EVENTS;
1193*4882a593Smuzhiyun 	efx_mcdi_release(mcdi);
1194*4882a593Smuzhiyun }
1195*4882a593Smuzhiyun 
efx_mcdi_ev_death(struct efx_nic * efx,int rc)1196*4882a593Smuzhiyun static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
1197*4882a593Smuzhiyun {
1198*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1199*4882a593Smuzhiyun 
1200*4882a593Smuzhiyun 	/* If there is an outstanding MCDI request, it has been terminated
1201*4882a593Smuzhiyun 	 * either by a BADASSERT or REBOOT event. If the mcdi interface is
1202*4882a593Smuzhiyun 	 * in polled mode, then do nothing because the MC reboot handler will
1203*4882a593Smuzhiyun 	 * set the header correctly. However, if the mcdi interface is waiting
1204*4882a593Smuzhiyun 	 * for a CMDDONE event it won't receive it [and since all MCDI events
1205*4882a593Smuzhiyun 	 * are sent to the same queue, we can't be racing with
1206*4882a593Smuzhiyun 	 * efx_mcdi_ev_cpl()]
1207*4882a593Smuzhiyun 	 *
1208*4882a593Smuzhiyun 	 * If there is an outstanding asynchronous request, we can't
1209*4882a593Smuzhiyun 	 * complete it now (efx_mcdi_complete() would deadlock).  The
1210*4882a593Smuzhiyun 	 * reset process will take care of this.
1211*4882a593Smuzhiyun 	 *
1212*4882a593Smuzhiyun 	 * There's a race here with efx_mcdi_send_request(), because
1213*4882a593Smuzhiyun 	 * we might receive a REBOOT event *before* the request has
1214*4882a593Smuzhiyun 	 * been copied out. In polled mode (during startup) this is
1215*4882a593Smuzhiyun 	 * irrelevant, because efx_mcdi_complete_sync() is ignored. In
1216*4882a593Smuzhiyun 	 * event mode, this condition is just an edge-case of
1217*4882a593Smuzhiyun 	 * receiving a REBOOT event after posting the MCDI
1218*4882a593Smuzhiyun 	 * request. Did the mc reboot before or after the copyout? The
1219*4882a593Smuzhiyun 	 * best we can do always is just return failure.
1220*4882a593Smuzhiyun 	 *
1221*4882a593Smuzhiyun 	 * If there is an outstanding proxy response expected it is not going
1222*4882a593Smuzhiyun 	 * to arrive. We should thus abort it.
1223*4882a593Smuzhiyun 	 */
1224*4882a593Smuzhiyun 	spin_lock(&mcdi->iface_lock);
1225*4882a593Smuzhiyun 	efx_mcdi_proxy_abort(mcdi);
1226*4882a593Smuzhiyun 
1227*4882a593Smuzhiyun 	if (efx_mcdi_complete_sync(mcdi)) {
1228*4882a593Smuzhiyun 		if (mcdi->mode == MCDI_MODE_EVENTS) {
1229*4882a593Smuzhiyun 			mcdi->resprc = rc;
1230*4882a593Smuzhiyun 			mcdi->resp_hdr_len = 0;
1231*4882a593Smuzhiyun 			mcdi->resp_data_len = 0;
1232*4882a593Smuzhiyun 			++mcdi->credits;
1233*4882a593Smuzhiyun 		}
1234*4882a593Smuzhiyun 	} else {
1235*4882a593Smuzhiyun 		int count;
1236*4882a593Smuzhiyun 
1237*4882a593Smuzhiyun 		/* Consume the status word since efx_mcdi_rpc_finish() won't */
1238*4882a593Smuzhiyun 		for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
1239*4882a593Smuzhiyun 			rc = efx_mcdi_poll_reboot(efx);
1240*4882a593Smuzhiyun 			if (rc)
1241*4882a593Smuzhiyun 				break;
1242*4882a593Smuzhiyun 			udelay(MCDI_STATUS_DELAY_US);
1243*4882a593Smuzhiyun 		}
1244*4882a593Smuzhiyun 
1245*4882a593Smuzhiyun 		/* On EF10, a CODE_MC_REBOOT event can be received without the
1246*4882a593Smuzhiyun 		 * reboot detection in efx_mcdi_poll_reboot() being triggered.
1247*4882a593Smuzhiyun 		 * If zero was returned from the final call to
1248*4882a593Smuzhiyun 		 * efx_mcdi_poll_reboot(), the MC reboot wasn't noticed but the
1249*4882a593Smuzhiyun 		 * MC has definitely rebooted so prepare for the reset.
1250*4882a593Smuzhiyun 		 */
1251*4882a593Smuzhiyun 		if (!rc && efx->type->mcdi_reboot_detected)
1252*4882a593Smuzhiyun 			efx->type->mcdi_reboot_detected(efx);
1253*4882a593Smuzhiyun 
1254*4882a593Smuzhiyun 		mcdi->new_epoch = true;
1255*4882a593Smuzhiyun 
1256*4882a593Smuzhiyun 		/* Nobody was waiting for an MCDI request, so trigger a reset */
1257*4882a593Smuzhiyun 		efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
1258*4882a593Smuzhiyun 	}
1259*4882a593Smuzhiyun 
1260*4882a593Smuzhiyun 	spin_unlock(&mcdi->iface_lock);
1261*4882a593Smuzhiyun }
1262*4882a593Smuzhiyun 
1263*4882a593Smuzhiyun /* The MC is going down in to BIST mode. set the BIST flag to block
1264*4882a593Smuzhiyun  * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
1265*4882a593Smuzhiyun  * (which doesn't actually execute a reset, it waits for the controlling
1266*4882a593Smuzhiyun  * function to reset it).
1267*4882a593Smuzhiyun  */
efx_mcdi_ev_bist(struct efx_nic * efx)1268*4882a593Smuzhiyun static void efx_mcdi_ev_bist(struct efx_nic *efx)
1269*4882a593Smuzhiyun {
1270*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun 	spin_lock(&mcdi->iface_lock);
1273*4882a593Smuzhiyun 	efx->mc_bist_for_other_fn = true;
1274*4882a593Smuzhiyun 	efx_mcdi_proxy_abort(mcdi);
1275*4882a593Smuzhiyun 
1276*4882a593Smuzhiyun 	if (efx_mcdi_complete_sync(mcdi)) {
1277*4882a593Smuzhiyun 		if (mcdi->mode == MCDI_MODE_EVENTS) {
1278*4882a593Smuzhiyun 			mcdi->resprc = -EIO;
1279*4882a593Smuzhiyun 			mcdi->resp_hdr_len = 0;
1280*4882a593Smuzhiyun 			mcdi->resp_data_len = 0;
1281*4882a593Smuzhiyun 			++mcdi->credits;
1282*4882a593Smuzhiyun 		}
1283*4882a593Smuzhiyun 	}
1284*4882a593Smuzhiyun 	mcdi->new_epoch = true;
1285*4882a593Smuzhiyun 	efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
1286*4882a593Smuzhiyun 	spin_unlock(&mcdi->iface_lock);
1287*4882a593Smuzhiyun }
1288*4882a593Smuzhiyun 
1289*4882a593Smuzhiyun /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
1290*4882a593Smuzhiyun  * to recover.
1291*4882a593Smuzhiyun  */
efx_mcdi_abandon(struct efx_nic * efx)1292*4882a593Smuzhiyun static void efx_mcdi_abandon(struct efx_nic *efx)
1293*4882a593Smuzhiyun {
1294*4882a593Smuzhiyun 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1295*4882a593Smuzhiyun 
1296*4882a593Smuzhiyun 	if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
1297*4882a593Smuzhiyun 		return; /* it had already been done */
1298*4882a593Smuzhiyun 	netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
1299*4882a593Smuzhiyun 	efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
1300*4882a593Smuzhiyun }
1301*4882a593Smuzhiyun 
efx_handle_drain_event(struct efx_nic * efx)1302*4882a593Smuzhiyun static void efx_handle_drain_event(struct efx_nic *efx)
1303*4882a593Smuzhiyun {
1304*4882a593Smuzhiyun 	if (atomic_dec_and_test(&efx->active_queues))
1305*4882a593Smuzhiyun 		wake_up(&efx->flush_wq);
1306*4882a593Smuzhiyun 
1307*4882a593Smuzhiyun 	WARN_ON(atomic_read(&efx->active_queues) < 0);
1308*4882a593Smuzhiyun }
1309*4882a593Smuzhiyun 
1310*4882a593Smuzhiyun /* Called from efx_farch_ev_process and efx_ef10_ev_process for MCDI events */
efx_mcdi_process_event(struct efx_channel * channel,efx_qword_t * event)1311*4882a593Smuzhiyun void efx_mcdi_process_event(struct efx_channel *channel,
1312*4882a593Smuzhiyun 			    efx_qword_t *event)
1313*4882a593Smuzhiyun {
1314*4882a593Smuzhiyun 	struct efx_nic *efx = channel->efx;
1315*4882a593Smuzhiyun 	int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
1316*4882a593Smuzhiyun 	u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
1317*4882a593Smuzhiyun 
1318*4882a593Smuzhiyun 	switch (code) {
1319*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_BADSSERT:
1320*4882a593Smuzhiyun 		netif_err(efx, hw, efx->net_dev,
1321*4882a593Smuzhiyun 			  "MC watchdog or assertion failure at 0x%x\n", data);
1322*4882a593Smuzhiyun 		efx_mcdi_ev_death(efx, -EINTR);
1323*4882a593Smuzhiyun 		break;
1324*4882a593Smuzhiyun 
1325*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_PMNOTICE:
1326*4882a593Smuzhiyun 		netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
1327*4882a593Smuzhiyun 		break;
1328*4882a593Smuzhiyun 
1329*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_CMDDONE:
1330*4882a593Smuzhiyun 		efx_mcdi_ev_cpl(efx,
1331*4882a593Smuzhiyun 				MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
1332*4882a593Smuzhiyun 				MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
1333*4882a593Smuzhiyun 				MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
1334*4882a593Smuzhiyun 		break;
1335*4882a593Smuzhiyun 
1336*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_LINKCHANGE:
1337*4882a593Smuzhiyun 		efx_mcdi_process_link_change(efx, event);
1338*4882a593Smuzhiyun 		break;
1339*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_SENSOREVT:
1340*4882a593Smuzhiyun 		efx_sensor_event(efx, event);
1341*4882a593Smuzhiyun 		break;
1342*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_SCHEDERR:
1343*4882a593Smuzhiyun 		netif_dbg(efx, hw, efx->net_dev,
1344*4882a593Smuzhiyun 			  "MC Scheduler alert (0x%x)\n", data);
1345*4882a593Smuzhiyun 		break;
1346*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_REBOOT:
1347*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_MC_REBOOT:
1348*4882a593Smuzhiyun 		netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
1349*4882a593Smuzhiyun 		efx_mcdi_ev_death(efx, -EIO);
1350*4882a593Smuzhiyun 		break;
1351*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_MC_BIST:
1352*4882a593Smuzhiyun 		netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
1353*4882a593Smuzhiyun 		efx_mcdi_ev_bist(efx);
1354*4882a593Smuzhiyun 		break;
1355*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_MAC_STATS_DMA:
1356*4882a593Smuzhiyun 		/* MAC stats are gather lazily.  We can ignore this. */
1357*4882a593Smuzhiyun 		break;
1358*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_FLR:
1359*4882a593Smuzhiyun 		if (efx->type->sriov_flr)
1360*4882a593Smuzhiyun 			efx->type->sriov_flr(efx,
1361*4882a593Smuzhiyun 					     MCDI_EVENT_FIELD(*event, FLR_VF));
1362*4882a593Smuzhiyun 		break;
1363*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_PTP_RX:
1364*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_PTP_FAULT:
1365*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_PTP_PPS:
1366*4882a593Smuzhiyun 		efx_ptp_event(efx, event);
1367*4882a593Smuzhiyun 		break;
1368*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_PTP_TIME:
1369*4882a593Smuzhiyun 		efx_time_sync_event(channel, event);
1370*4882a593Smuzhiyun 		break;
1371*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_TX_FLUSH:
1372*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_RX_FLUSH:
1373*4882a593Smuzhiyun 		/* Two flush events will be sent: one to the same event
1374*4882a593Smuzhiyun 		 * queue as completions, and one to event queue 0.
1375*4882a593Smuzhiyun 		 * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
1376*4882a593Smuzhiyun 		 * flag will be set, and we should ignore the event
1377*4882a593Smuzhiyun 		 * because we want to wait for all completions.
1378*4882a593Smuzhiyun 		 */
1379*4882a593Smuzhiyun 		BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
1380*4882a593Smuzhiyun 			     MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
1381*4882a593Smuzhiyun 		if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
1382*4882a593Smuzhiyun 			efx_handle_drain_event(efx);
1383*4882a593Smuzhiyun 		break;
1384*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_TX_ERR:
1385*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_RX_ERR:
1386*4882a593Smuzhiyun 		netif_err(efx, hw, efx->net_dev,
1387*4882a593Smuzhiyun 			  "%s DMA error (event: "EFX_QWORD_FMT")\n",
1388*4882a593Smuzhiyun 			  code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
1389*4882a593Smuzhiyun 			  EFX_QWORD_VAL(*event));
1390*4882a593Smuzhiyun 		efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
1391*4882a593Smuzhiyun 		break;
1392*4882a593Smuzhiyun 	case MCDI_EVENT_CODE_PROXY_RESPONSE:
1393*4882a593Smuzhiyun 		efx_mcdi_ev_proxy_response(efx,
1394*4882a593Smuzhiyun 				MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE),
1395*4882a593Smuzhiyun 				MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC));
1396*4882a593Smuzhiyun 		break;
1397*4882a593Smuzhiyun 	default:
1398*4882a593Smuzhiyun 		netif_err(efx, hw, efx->net_dev,
1399*4882a593Smuzhiyun 			  "Unknown MCDI event " EFX_QWORD_FMT "\n",
1400*4882a593Smuzhiyun 			  EFX_QWORD_VAL(*event));
1401*4882a593Smuzhiyun 	}
1402*4882a593Smuzhiyun }
1403*4882a593Smuzhiyun 
1404*4882a593Smuzhiyun /**************************************************************************
1405*4882a593Smuzhiyun  *
1406*4882a593Smuzhiyun  * Specific request functions
1407*4882a593Smuzhiyun  *
1408*4882a593Smuzhiyun  **************************************************************************
1409*4882a593Smuzhiyun  */
1410*4882a593Smuzhiyun 
efx_mcdi_print_fwver(struct efx_nic * efx,char * buf,size_t len)1411*4882a593Smuzhiyun void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
1412*4882a593Smuzhiyun {
1413*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
1414*4882a593Smuzhiyun 	size_t outlength;
1415*4882a593Smuzhiyun 	const __le16 *ver_words;
1416*4882a593Smuzhiyun 	size_t offset;
1417*4882a593Smuzhiyun 	int rc;
1418*4882a593Smuzhiyun 
1419*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
1420*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
1421*4882a593Smuzhiyun 			  outbuf, sizeof(outbuf), &outlength);
1422*4882a593Smuzhiyun 	if (rc)
1423*4882a593Smuzhiyun 		goto fail;
1424*4882a593Smuzhiyun 	if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
1425*4882a593Smuzhiyun 		rc = -EIO;
1426*4882a593Smuzhiyun 		goto fail;
1427*4882a593Smuzhiyun 	}
1428*4882a593Smuzhiyun 
1429*4882a593Smuzhiyun 	ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
1430*4882a593Smuzhiyun 	offset = scnprintf(buf, len, "%u.%u.%u.%u",
1431*4882a593Smuzhiyun 			   le16_to_cpu(ver_words[0]),
1432*4882a593Smuzhiyun 			   le16_to_cpu(ver_words[1]),
1433*4882a593Smuzhiyun 			   le16_to_cpu(ver_words[2]),
1434*4882a593Smuzhiyun 			   le16_to_cpu(ver_words[3]));
1435*4882a593Smuzhiyun 
1436*4882a593Smuzhiyun 	if (efx->type->print_additional_fwver)
1437*4882a593Smuzhiyun 		offset += efx->type->print_additional_fwver(efx, buf + offset,
1438*4882a593Smuzhiyun 							    len - offset);
1439*4882a593Smuzhiyun 
1440*4882a593Smuzhiyun 	/* It's theoretically possible for the string to exceed 31
1441*4882a593Smuzhiyun 	 * characters, though in practice the first three version
1442*4882a593Smuzhiyun 	 * components are short enough that this doesn't happen.
1443*4882a593Smuzhiyun 	 */
1444*4882a593Smuzhiyun 	if (WARN_ON(offset >= len))
1445*4882a593Smuzhiyun 		buf[0] = 0;
1446*4882a593Smuzhiyun 
1447*4882a593Smuzhiyun 	return;
1448*4882a593Smuzhiyun 
1449*4882a593Smuzhiyun fail:
1450*4882a593Smuzhiyun 	netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1451*4882a593Smuzhiyun 	buf[0] = 0;
1452*4882a593Smuzhiyun }
1453*4882a593Smuzhiyun 
efx_mcdi_drv_attach(struct efx_nic * efx,bool driver_operating,bool * was_attached)1454*4882a593Smuzhiyun static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
1455*4882a593Smuzhiyun 			       bool *was_attached)
1456*4882a593Smuzhiyun {
1457*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
1458*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
1459*4882a593Smuzhiyun 	size_t outlen;
1460*4882a593Smuzhiyun 	int rc;
1461*4882a593Smuzhiyun 
1462*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
1463*4882a593Smuzhiyun 		       driver_operating ? 1 : 0);
1464*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
1465*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
1466*4882a593Smuzhiyun 
1467*4882a593Smuzhiyun 	rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
1468*4882a593Smuzhiyun 				outbuf, sizeof(outbuf), &outlen);
1469*4882a593Smuzhiyun 	/* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID
1470*4882a593Smuzhiyun 	 * specified will fail with EPERM, and we have to tell the MC we don't
1471*4882a593Smuzhiyun 	 * care what firmware we get.
1472*4882a593Smuzhiyun 	 */
1473*4882a593Smuzhiyun 	if (rc == -EPERM) {
1474*4882a593Smuzhiyun 		netif_dbg(efx, probe, efx->net_dev,
1475*4882a593Smuzhiyun 			  "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n");
1476*4882a593Smuzhiyun 		MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID,
1477*4882a593Smuzhiyun 			       MC_CMD_FW_DONT_CARE);
1478*4882a593Smuzhiyun 		rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf,
1479*4882a593Smuzhiyun 					sizeof(inbuf), outbuf, sizeof(outbuf),
1480*4882a593Smuzhiyun 					&outlen);
1481*4882a593Smuzhiyun 	}
1482*4882a593Smuzhiyun 	if (rc) {
1483*4882a593Smuzhiyun 		efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf),
1484*4882a593Smuzhiyun 				       outbuf, outlen, rc);
1485*4882a593Smuzhiyun 		goto fail;
1486*4882a593Smuzhiyun 	}
1487*4882a593Smuzhiyun 	if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
1488*4882a593Smuzhiyun 		rc = -EIO;
1489*4882a593Smuzhiyun 		goto fail;
1490*4882a593Smuzhiyun 	}
1491*4882a593Smuzhiyun 
1492*4882a593Smuzhiyun 	if (driver_operating) {
1493*4882a593Smuzhiyun 		if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
1494*4882a593Smuzhiyun 			efx->mcdi->fn_flags =
1495*4882a593Smuzhiyun 				MCDI_DWORD(outbuf,
1496*4882a593Smuzhiyun 					   DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
1497*4882a593Smuzhiyun 		} else {
1498*4882a593Smuzhiyun 			/* Synthesise flags for Siena */
1499*4882a593Smuzhiyun 			efx->mcdi->fn_flags =
1500*4882a593Smuzhiyun 				1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1501*4882a593Smuzhiyun 				1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
1502*4882a593Smuzhiyun 				(efx_port_num(efx) == 0) <<
1503*4882a593Smuzhiyun 				MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
1504*4882a593Smuzhiyun 		}
1505*4882a593Smuzhiyun 	}
1506*4882a593Smuzhiyun 
1507*4882a593Smuzhiyun 	/* We currently assume we have control of the external link
1508*4882a593Smuzhiyun 	 * and are completely trusted by firmware.  Abort probing
1509*4882a593Smuzhiyun 	 * if that's not true for this function.
1510*4882a593Smuzhiyun 	 */
1511*4882a593Smuzhiyun 
1512*4882a593Smuzhiyun 	if (was_attached != NULL)
1513*4882a593Smuzhiyun 		*was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
1514*4882a593Smuzhiyun 	return 0;
1515*4882a593Smuzhiyun 
1516*4882a593Smuzhiyun fail:
1517*4882a593Smuzhiyun 	netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1518*4882a593Smuzhiyun 	return rc;
1519*4882a593Smuzhiyun }
1520*4882a593Smuzhiyun 
efx_mcdi_get_board_cfg(struct efx_nic * efx,u8 * mac_address,u16 * fw_subtype_list,u32 * capabilities)1521*4882a593Smuzhiyun int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
1522*4882a593Smuzhiyun 			   u16 *fw_subtype_list, u32 *capabilities)
1523*4882a593Smuzhiyun {
1524*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
1525*4882a593Smuzhiyun 	size_t outlen, i;
1526*4882a593Smuzhiyun 	int port_num = efx_port_num(efx);
1527*4882a593Smuzhiyun 	int rc;
1528*4882a593Smuzhiyun 
1529*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
1530*4882a593Smuzhiyun 	/* we need __aligned(2) for ether_addr_copy */
1531*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
1532*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
1533*4882a593Smuzhiyun 
1534*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
1535*4882a593Smuzhiyun 			  outbuf, sizeof(outbuf), &outlen);
1536*4882a593Smuzhiyun 	if (rc)
1537*4882a593Smuzhiyun 		goto fail;
1538*4882a593Smuzhiyun 
1539*4882a593Smuzhiyun 	if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1540*4882a593Smuzhiyun 		rc = -EIO;
1541*4882a593Smuzhiyun 		goto fail;
1542*4882a593Smuzhiyun 	}
1543*4882a593Smuzhiyun 
1544*4882a593Smuzhiyun 	if (mac_address)
1545*4882a593Smuzhiyun 		ether_addr_copy(mac_address,
1546*4882a593Smuzhiyun 				port_num ?
1547*4882a593Smuzhiyun 				MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
1548*4882a593Smuzhiyun 				MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
1549*4882a593Smuzhiyun 	if (fw_subtype_list) {
1550*4882a593Smuzhiyun 		for (i = 0;
1551*4882a593Smuzhiyun 		     i < MCDI_VAR_ARRAY_LEN(outlen,
1552*4882a593Smuzhiyun 					    GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
1553*4882a593Smuzhiyun 		     i++)
1554*4882a593Smuzhiyun 			fw_subtype_list[i] = MCDI_ARRAY_WORD(
1555*4882a593Smuzhiyun 				outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
1556*4882a593Smuzhiyun 		for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
1557*4882a593Smuzhiyun 			fw_subtype_list[i] = 0;
1558*4882a593Smuzhiyun 	}
1559*4882a593Smuzhiyun 	if (capabilities) {
1560*4882a593Smuzhiyun 		if (port_num)
1561*4882a593Smuzhiyun 			*capabilities = MCDI_DWORD(outbuf,
1562*4882a593Smuzhiyun 					GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1563*4882a593Smuzhiyun 		else
1564*4882a593Smuzhiyun 			*capabilities = MCDI_DWORD(outbuf,
1565*4882a593Smuzhiyun 					GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1566*4882a593Smuzhiyun 	}
1567*4882a593Smuzhiyun 
1568*4882a593Smuzhiyun 	return 0;
1569*4882a593Smuzhiyun 
1570*4882a593Smuzhiyun fail:
1571*4882a593Smuzhiyun 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
1572*4882a593Smuzhiyun 		  __func__, rc, (int)outlen);
1573*4882a593Smuzhiyun 
1574*4882a593Smuzhiyun 	return rc;
1575*4882a593Smuzhiyun }
1576*4882a593Smuzhiyun 
efx_mcdi_log_ctrl(struct efx_nic * efx,bool evq,bool uart,u32 dest_evq)1577*4882a593Smuzhiyun int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
1578*4882a593Smuzhiyun {
1579*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
1580*4882a593Smuzhiyun 	u32 dest = 0;
1581*4882a593Smuzhiyun 	int rc;
1582*4882a593Smuzhiyun 
1583*4882a593Smuzhiyun 	if (uart)
1584*4882a593Smuzhiyun 		dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
1585*4882a593Smuzhiyun 	if (evq)
1586*4882a593Smuzhiyun 		dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
1587*4882a593Smuzhiyun 
1588*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
1589*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
1590*4882a593Smuzhiyun 
1591*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
1592*4882a593Smuzhiyun 
1593*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
1594*4882a593Smuzhiyun 			  NULL, 0, NULL);
1595*4882a593Smuzhiyun 	return rc;
1596*4882a593Smuzhiyun }
1597*4882a593Smuzhiyun 
efx_mcdi_nvram_types(struct efx_nic * efx,u32 * nvram_types_out)1598*4882a593Smuzhiyun int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
1599*4882a593Smuzhiyun {
1600*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
1601*4882a593Smuzhiyun 	size_t outlen;
1602*4882a593Smuzhiyun 	int rc;
1603*4882a593Smuzhiyun 
1604*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
1605*4882a593Smuzhiyun 
1606*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
1607*4882a593Smuzhiyun 			  outbuf, sizeof(outbuf), &outlen);
1608*4882a593Smuzhiyun 	if (rc)
1609*4882a593Smuzhiyun 		goto fail;
1610*4882a593Smuzhiyun 	if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
1611*4882a593Smuzhiyun 		rc = -EIO;
1612*4882a593Smuzhiyun 		goto fail;
1613*4882a593Smuzhiyun 	}
1614*4882a593Smuzhiyun 
1615*4882a593Smuzhiyun 	*nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
1616*4882a593Smuzhiyun 	return 0;
1617*4882a593Smuzhiyun 
1618*4882a593Smuzhiyun fail:
1619*4882a593Smuzhiyun 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1620*4882a593Smuzhiyun 		  __func__, rc);
1621*4882a593Smuzhiyun 	return rc;
1622*4882a593Smuzhiyun }
1623*4882a593Smuzhiyun 
1624*4882a593Smuzhiyun /* This function finds types using the new NVRAM_PARTITIONS mcdi. */
efx_new_mcdi_nvram_types(struct efx_nic * efx,u32 * number,u32 * nvram_types)1625*4882a593Smuzhiyun static int efx_new_mcdi_nvram_types(struct efx_nic *efx, u32 *number,
1626*4882a593Smuzhiyun 				    u32 *nvram_types)
1627*4882a593Smuzhiyun {
1628*4882a593Smuzhiyun 	efx_dword_t *outbuf = kzalloc(MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2,
1629*4882a593Smuzhiyun 				      GFP_KERNEL);
1630*4882a593Smuzhiyun 	size_t outlen;
1631*4882a593Smuzhiyun 	int rc;
1632*4882a593Smuzhiyun 
1633*4882a593Smuzhiyun 	if (!outbuf)
1634*4882a593Smuzhiyun 		return -ENOMEM;
1635*4882a593Smuzhiyun 
1636*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_NVRAM_PARTITIONS_IN_LEN != 0);
1637*4882a593Smuzhiyun 
1638*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_PARTITIONS, NULL, 0,
1639*4882a593Smuzhiyun 			  outbuf, MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2, &outlen);
1640*4882a593Smuzhiyun 	if (rc)
1641*4882a593Smuzhiyun 		goto fail;
1642*4882a593Smuzhiyun 
1643*4882a593Smuzhiyun 	*number = MCDI_DWORD(outbuf, NVRAM_PARTITIONS_OUT_NUM_PARTITIONS);
1644*4882a593Smuzhiyun 
1645*4882a593Smuzhiyun 	memcpy(nvram_types, MCDI_PTR(outbuf, NVRAM_PARTITIONS_OUT_TYPE_ID),
1646*4882a593Smuzhiyun 	       *number * sizeof(u32));
1647*4882a593Smuzhiyun 
1648*4882a593Smuzhiyun fail:
1649*4882a593Smuzhiyun 	kfree(outbuf);
1650*4882a593Smuzhiyun 	return rc;
1651*4882a593Smuzhiyun }
1652*4882a593Smuzhiyun 
efx_mcdi_nvram_info(struct efx_nic * efx,unsigned int type,size_t * size_out,size_t * erase_size_out,bool * protected_out)1653*4882a593Smuzhiyun int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
1654*4882a593Smuzhiyun 			size_t *size_out, size_t *erase_size_out,
1655*4882a593Smuzhiyun 			bool *protected_out)
1656*4882a593Smuzhiyun {
1657*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
1658*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
1659*4882a593Smuzhiyun 	size_t outlen;
1660*4882a593Smuzhiyun 	int rc;
1661*4882a593Smuzhiyun 
1662*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
1663*4882a593Smuzhiyun 
1664*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
1665*4882a593Smuzhiyun 			  outbuf, sizeof(outbuf), &outlen);
1666*4882a593Smuzhiyun 	if (rc)
1667*4882a593Smuzhiyun 		goto fail;
1668*4882a593Smuzhiyun 	if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
1669*4882a593Smuzhiyun 		rc = -EIO;
1670*4882a593Smuzhiyun 		goto fail;
1671*4882a593Smuzhiyun 	}
1672*4882a593Smuzhiyun 
1673*4882a593Smuzhiyun 	*size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
1674*4882a593Smuzhiyun 	*erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
1675*4882a593Smuzhiyun 	*protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
1676*4882a593Smuzhiyun 				(1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
1677*4882a593Smuzhiyun 	return 0;
1678*4882a593Smuzhiyun 
1679*4882a593Smuzhiyun fail:
1680*4882a593Smuzhiyun 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1681*4882a593Smuzhiyun 	return rc;
1682*4882a593Smuzhiyun }
1683*4882a593Smuzhiyun 
efx_mcdi_nvram_test(struct efx_nic * efx,unsigned int type)1684*4882a593Smuzhiyun static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
1685*4882a593Smuzhiyun {
1686*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
1687*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
1688*4882a593Smuzhiyun 	int rc;
1689*4882a593Smuzhiyun 
1690*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
1691*4882a593Smuzhiyun 
1692*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
1693*4882a593Smuzhiyun 			  outbuf, sizeof(outbuf), NULL);
1694*4882a593Smuzhiyun 	if (rc)
1695*4882a593Smuzhiyun 		return rc;
1696*4882a593Smuzhiyun 
1697*4882a593Smuzhiyun 	switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
1698*4882a593Smuzhiyun 	case MC_CMD_NVRAM_TEST_PASS:
1699*4882a593Smuzhiyun 	case MC_CMD_NVRAM_TEST_NOTSUPP:
1700*4882a593Smuzhiyun 		return 0;
1701*4882a593Smuzhiyun 	default:
1702*4882a593Smuzhiyun 		return -EIO;
1703*4882a593Smuzhiyun 	}
1704*4882a593Smuzhiyun }
1705*4882a593Smuzhiyun 
1706*4882a593Smuzhiyun /* This function tests nvram partitions using the new mcdi partition lookup scheme */
efx_new_mcdi_nvram_test_all(struct efx_nic * efx)1707*4882a593Smuzhiyun int efx_new_mcdi_nvram_test_all(struct efx_nic *efx)
1708*4882a593Smuzhiyun {
1709*4882a593Smuzhiyun 	u32 *nvram_types = kzalloc(MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2,
1710*4882a593Smuzhiyun 				   GFP_KERNEL);
1711*4882a593Smuzhiyun 	unsigned int number;
1712*4882a593Smuzhiyun 	int rc, i;
1713*4882a593Smuzhiyun 
1714*4882a593Smuzhiyun 	if (!nvram_types)
1715*4882a593Smuzhiyun 		return -ENOMEM;
1716*4882a593Smuzhiyun 
1717*4882a593Smuzhiyun 	rc = efx_new_mcdi_nvram_types(efx, &number, nvram_types);
1718*4882a593Smuzhiyun 	if (rc)
1719*4882a593Smuzhiyun 		goto fail;
1720*4882a593Smuzhiyun 
1721*4882a593Smuzhiyun 	/* Require at least one check */
1722*4882a593Smuzhiyun 	rc = -EAGAIN;
1723*4882a593Smuzhiyun 
1724*4882a593Smuzhiyun 	for (i = 0; i < number; i++) {
1725*4882a593Smuzhiyun 		if (nvram_types[i] == NVRAM_PARTITION_TYPE_PARTITION_MAP ||
1726*4882a593Smuzhiyun 		    nvram_types[i] == NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG)
1727*4882a593Smuzhiyun 			continue;
1728*4882a593Smuzhiyun 
1729*4882a593Smuzhiyun 		rc = efx_mcdi_nvram_test(efx, nvram_types[i]);
1730*4882a593Smuzhiyun 		if (rc)
1731*4882a593Smuzhiyun 			goto fail;
1732*4882a593Smuzhiyun 	}
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun fail:
1735*4882a593Smuzhiyun 	kfree(nvram_types);
1736*4882a593Smuzhiyun 	return rc;
1737*4882a593Smuzhiyun }
1738*4882a593Smuzhiyun 
efx_mcdi_nvram_test_all(struct efx_nic * efx)1739*4882a593Smuzhiyun int efx_mcdi_nvram_test_all(struct efx_nic *efx)
1740*4882a593Smuzhiyun {
1741*4882a593Smuzhiyun 	u32 nvram_types;
1742*4882a593Smuzhiyun 	unsigned int type;
1743*4882a593Smuzhiyun 	int rc;
1744*4882a593Smuzhiyun 
1745*4882a593Smuzhiyun 	rc = efx_mcdi_nvram_types(efx, &nvram_types);
1746*4882a593Smuzhiyun 	if (rc)
1747*4882a593Smuzhiyun 		goto fail1;
1748*4882a593Smuzhiyun 
1749*4882a593Smuzhiyun 	type = 0;
1750*4882a593Smuzhiyun 	while (nvram_types != 0) {
1751*4882a593Smuzhiyun 		if (nvram_types & 1) {
1752*4882a593Smuzhiyun 			rc = efx_mcdi_nvram_test(efx, type);
1753*4882a593Smuzhiyun 			if (rc)
1754*4882a593Smuzhiyun 				goto fail2;
1755*4882a593Smuzhiyun 		}
1756*4882a593Smuzhiyun 		type++;
1757*4882a593Smuzhiyun 		nvram_types >>= 1;
1758*4882a593Smuzhiyun 	}
1759*4882a593Smuzhiyun 
1760*4882a593Smuzhiyun 	return 0;
1761*4882a593Smuzhiyun 
1762*4882a593Smuzhiyun fail2:
1763*4882a593Smuzhiyun 	netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
1764*4882a593Smuzhiyun 		  __func__, type);
1765*4882a593Smuzhiyun fail1:
1766*4882a593Smuzhiyun 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1767*4882a593Smuzhiyun 	return rc;
1768*4882a593Smuzhiyun }
1769*4882a593Smuzhiyun 
1770*4882a593Smuzhiyun /* Returns 1 if an assertion was read, 0 if no assertion had fired,
1771*4882a593Smuzhiyun  * negative on error.
1772*4882a593Smuzhiyun  */
efx_mcdi_read_assertion(struct efx_nic * efx)1773*4882a593Smuzhiyun static int efx_mcdi_read_assertion(struct efx_nic *efx)
1774*4882a593Smuzhiyun {
1775*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
1776*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
1777*4882a593Smuzhiyun 	unsigned int flags, index;
1778*4882a593Smuzhiyun 	const char *reason;
1779*4882a593Smuzhiyun 	size_t outlen;
1780*4882a593Smuzhiyun 	int retry;
1781*4882a593Smuzhiyun 	int rc;
1782*4882a593Smuzhiyun 
1783*4882a593Smuzhiyun 	/* Attempt to read any stored assertion state before we reboot
1784*4882a593Smuzhiyun 	 * the mcfw out of the assertion handler. Retry twice, once
1785*4882a593Smuzhiyun 	 * because a boot-time assertion might cause this command to fail
1786*4882a593Smuzhiyun 	 * with EINTR. And once again because GET_ASSERTS can race with
1787*4882a593Smuzhiyun 	 * MC_CMD_REBOOT running on the other port. */
1788*4882a593Smuzhiyun 	retry = 2;
1789*4882a593Smuzhiyun 	do {
1790*4882a593Smuzhiyun 		MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
1791*4882a593Smuzhiyun 		rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
1792*4882a593Smuzhiyun 					inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
1793*4882a593Smuzhiyun 					outbuf, sizeof(outbuf), &outlen);
1794*4882a593Smuzhiyun 		if (rc == -EPERM)
1795*4882a593Smuzhiyun 			return 0;
1796*4882a593Smuzhiyun 	} while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
1797*4882a593Smuzhiyun 
1798*4882a593Smuzhiyun 	if (rc) {
1799*4882a593Smuzhiyun 		efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
1800*4882a593Smuzhiyun 				       MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
1801*4882a593Smuzhiyun 				       outlen, rc);
1802*4882a593Smuzhiyun 		return rc;
1803*4882a593Smuzhiyun 	}
1804*4882a593Smuzhiyun 	if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
1805*4882a593Smuzhiyun 		return -EIO;
1806*4882a593Smuzhiyun 
1807*4882a593Smuzhiyun 	/* Print out any recorded assertion state */
1808*4882a593Smuzhiyun 	flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1809*4882a593Smuzhiyun 	if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1810*4882a593Smuzhiyun 		return 0;
1811*4882a593Smuzhiyun 
1812*4882a593Smuzhiyun 	reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1813*4882a593Smuzhiyun 		? "system-level assertion"
1814*4882a593Smuzhiyun 		: (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1815*4882a593Smuzhiyun 		? "thread-level assertion"
1816*4882a593Smuzhiyun 		: (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1817*4882a593Smuzhiyun 		? "watchdog reset"
1818*4882a593Smuzhiyun 		: "unknown assertion";
1819*4882a593Smuzhiyun 	netif_err(efx, hw, efx->net_dev,
1820*4882a593Smuzhiyun 		  "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1821*4882a593Smuzhiyun 		  MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1822*4882a593Smuzhiyun 		  MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
1823*4882a593Smuzhiyun 
1824*4882a593Smuzhiyun 	/* Print out the registers */
1825*4882a593Smuzhiyun 	for (index = 0;
1826*4882a593Smuzhiyun 	     index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1827*4882a593Smuzhiyun 	     index++)
1828*4882a593Smuzhiyun 		netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
1829*4882a593Smuzhiyun 			  1 + index,
1830*4882a593Smuzhiyun 			  MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
1831*4882a593Smuzhiyun 					   index));
1832*4882a593Smuzhiyun 
1833*4882a593Smuzhiyun 	return 1;
1834*4882a593Smuzhiyun }
1835*4882a593Smuzhiyun 
efx_mcdi_exit_assertion(struct efx_nic * efx)1836*4882a593Smuzhiyun static int efx_mcdi_exit_assertion(struct efx_nic *efx)
1837*4882a593Smuzhiyun {
1838*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1839*4882a593Smuzhiyun 	int rc;
1840*4882a593Smuzhiyun 
1841*4882a593Smuzhiyun 	/* If the MC is running debug firmware, it might now be
1842*4882a593Smuzhiyun 	 * waiting for a debugger to attach, but we just want it to
1843*4882a593Smuzhiyun 	 * reboot.  We set a flag that makes the command a no-op if it
1844*4882a593Smuzhiyun 	 * has already done so.
1845*4882a593Smuzhiyun 	 * The MCDI will thus return either 0 or -EIO.
1846*4882a593Smuzhiyun 	 */
1847*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1848*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1849*4882a593Smuzhiyun 		       MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
1850*4882a593Smuzhiyun 	rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1851*4882a593Smuzhiyun 				NULL, 0, NULL);
1852*4882a593Smuzhiyun 	if (rc == -EIO)
1853*4882a593Smuzhiyun 		rc = 0;
1854*4882a593Smuzhiyun 	if (rc)
1855*4882a593Smuzhiyun 		efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN,
1856*4882a593Smuzhiyun 				       NULL, 0, rc);
1857*4882a593Smuzhiyun 	return rc;
1858*4882a593Smuzhiyun }
1859*4882a593Smuzhiyun 
efx_mcdi_handle_assertion(struct efx_nic * efx)1860*4882a593Smuzhiyun int efx_mcdi_handle_assertion(struct efx_nic *efx)
1861*4882a593Smuzhiyun {
1862*4882a593Smuzhiyun 	int rc;
1863*4882a593Smuzhiyun 
1864*4882a593Smuzhiyun 	rc = efx_mcdi_read_assertion(efx);
1865*4882a593Smuzhiyun 	if (rc <= 0)
1866*4882a593Smuzhiyun 		return rc;
1867*4882a593Smuzhiyun 
1868*4882a593Smuzhiyun 	return efx_mcdi_exit_assertion(efx);
1869*4882a593Smuzhiyun }
1870*4882a593Smuzhiyun 
efx_mcdi_set_id_led(struct efx_nic * efx,enum efx_led_mode mode)1871*4882a593Smuzhiyun int efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1872*4882a593Smuzhiyun {
1873*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
1874*4882a593Smuzhiyun 
1875*4882a593Smuzhiyun 	BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1876*4882a593Smuzhiyun 	BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1877*4882a593Smuzhiyun 	BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1878*4882a593Smuzhiyun 
1879*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1880*4882a593Smuzhiyun 
1881*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1882*4882a593Smuzhiyun 
1883*4882a593Smuzhiyun 	return efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), NULL, 0, NULL);
1884*4882a593Smuzhiyun }
1885*4882a593Smuzhiyun 
efx_mcdi_reset_func(struct efx_nic * efx)1886*4882a593Smuzhiyun static int efx_mcdi_reset_func(struct efx_nic *efx)
1887*4882a593Smuzhiyun {
1888*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
1889*4882a593Smuzhiyun 	int rc;
1890*4882a593Smuzhiyun 
1891*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
1892*4882a593Smuzhiyun 	MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
1893*4882a593Smuzhiyun 			      ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
1894*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
1895*4882a593Smuzhiyun 			  NULL, 0, NULL);
1896*4882a593Smuzhiyun 	return rc;
1897*4882a593Smuzhiyun }
1898*4882a593Smuzhiyun 
efx_mcdi_reset_mc(struct efx_nic * efx)1899*4882a593Smuzhiyun static int efx_mcdi_reset_mc(struct efx_nic *efx)
1900*4882a593Smuzhiyun {
1901*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1902*4882a593Smuzhiyun 	int rc;
1903*4882a593Smuzhiyun 
1904*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1905*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1906*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1907*4882a593Smuzhiyun 			  NULL, 0, NULL);
1908*4882a593Smuzhiyun 	/* White is black, and up is down */
1909*4882a593Smuzhiyun 	if (rc == -EIO)
1910*4882a593Smuzhiyun 		return 0;
1911*4882a593Smuzhiyun 	if (rc == 0)
1912*4882a593Smuzhiyun 		rc = -EIO;
1913*4882a593Smuzhiyun 	return rc;
1914*4882a593Smuzhiyun }
1915*4882a593Smuzhiyun 
efx_mcdi_map_reset_reason(enum reset_type reason)1916*4882a593Smuzhiyun enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
1917*4882a593Smuzhiyun {
1918*4882a593Smuzhiyun 	return RESET_TYPE_RECOVER_OR_ALL;
1919*4882a593Smuzhiyun }
1920*4882a593Smuzhiyun 
efx_mcdi_reset(struct efx_nic * efx,enum reset_type method)1921*4882a593Smuzhiyun int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1922*4882a593Smuzhiyun {
1923*4882a593Smuzhiyun 	int rc;
1924*4882a593Smuzhiyun 
1925*4882a593Smuzhiyun 	/* If MCDI is down, we can't handle_assertion */
1926*4882a593Smuzhiyun 	if (method == RESET_TYPE_MCDI_TIMEOUT) {
1927*4882a593Smuzhiyun 		rc = pci_reset_function(efx->pci_dev);
1928*4882a593Smuzhiyun 		if (rc)
1929*4882a593Smuzhiyun 			return rc;
1930*4882a593Smuzhiyun 		/* Re-enable polled MCDI completion */
1931*4882a593Smuzhiyun 		if (efx->mcdi) {
1932*4882a593Smuzhiyun 			struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1933*4882a593Smuzhiyun 			mcdi->mode = MCDI_MODE_POLL;
1934*4882a593Smuzhiyun 		}
1935*4882a593Smuzhiyun 		return 0;
1936*4882a593Smuzhiyun 	}
1937*4882a593Smuzhiyun 
1938*4882a593Smuzhiyun 	/* Recover from a failed assertion pre-reset */
1939*4882a593Smuzhiyun 	rc = efx_mcdi_handle_assertion(efx);
1940*4882a593Smuzhiyun 	if (rc)
1941*4882a593Smuzhiyun 		return rc;
1942*4882a593Smuzhiyun 
1943*4882a593Smuzhiyun 	if (method == RESET_TYPE_DATAPATH)
1944*4882a593Smuzhiyun 		return 0;
1945*4882a593Smuzhiyun 	else if (method == RESET_TYPE_WORLD)
1946*4882a593Smuzhiyun 		return efx_mcdi_reset_mc(efx);
1947*4882a593Smuzhiyun 	else
1948*4882a593Smuzhiyun 		return efx_mcdi_reset_func(efx);
1949*4882a593Smuzhiyun }
1950*4882a593Smuzhiyun 
efx_mcdi_wol_filter_set(struct efx_nic * efx,u32 type,const u8 * mac,int * id_out)1951*4882a593Smuzhiyun static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1952*4882a593Smuzhiyun 				   const u8 *mac, int *id_out)
1953*4882a593Smuzhiyun {
1954*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1955*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
1956*4882a593Smuzhiyun 	size_t outlen;
1957*4882a593Smuzhiyun 	int rc;
1958*4882a593Smuzhiyun 
1959*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1960*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1961*4882a593Smuzhiyun 		       MC_CMD_FILTER_MODE_SIMPLE);
1962*4882a593Smuzhiyun 	ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
1963*4882a593Smuzhiyun 
1964*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1965*4882a593Smuzhiyun 			  outbuf, sizeof(outbuf), &outlen);
1966*4882a593Smuzhiyun 	if (rc)
1967*4882a593Smuzhiyun 		goto fail;
1968*4882a593Smuzhiyun 
1969*4882a593Smuzhiyun 	if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
1970*4882a593Smuzhiyun 		rc = -EIO;
1971*4882a593Smuzhiyun 		goto fail;
1972*4882a593Smuzhiyun 	}
1973*4882a593Smuzhiyun 
1974*4882a593Smuzhiyun 	*id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1975*4882a593Smuzhiyun 
1976*4882a593Smuzhiyun 	return 0;
1977*4882a593Smuzhiyun 
1978*4882a593Smuzhiyun fail:
1979*4882a593Smuzhiyun 	*id_out = -1;
1980*4882a593Smuzhiyun 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1981*4882a593Smuzhiyun 	return rc;
1982*4882a593Smuzhiyun 
1983*4882a593Smuzhiyun }
1984*4882a593Smuzhiyun 
1985*4882a593Smuzhiyun 
1986*4882a593Smuzhiyun int
efx_mcdi_wol_filter_set_magic(struct efx_nic * efx,const u8 * mac,int * id_out)1987*4882a593Smuzhiyun efx_mcdi_wol_filter_set_magic(struct efx_nic *efx,  const u8 *mac, int *id_out)
1988*4882a593Smuzhiyun {
1989*4882a593Smuzhiyun 	return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1990*4882a593Smuzhiyun }
1991*4882a593Smuzhiyun 
1992*4882a593Smuzhiyun 
efx_mcdi_wol_filter_get_magic(struct efx_nic * efx,int * id_out)1993*4882a593Smuzhiyun int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1994*4882a593Smuzhiyun {
1995*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
1996*4882a593Smuzhiyun 	size_t outlen;
1997*4882a593Smuzhiyun 	int rc;
1998*4882a593Smuzhiyun 
1999*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
2000*4882a593Smuzhiyun 			  outbuf, sizeof(outbuf), &outlen);
2001*4882a593Smuzhiyun 	if (rc)
2002*4882a593Smuzhiyun 		goto fail;
2003*4882a593Smuzhiyun 
2004*4882a593Smuzhiyun 	if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
2005*4882a593Smuzhiyun 		rc = -EIO;
2006*4882a593Smuzhiyun 		goto fail;
2007*4882a593Smuzhiyun 	}
2008*4882a593Smuzhiyun 
2009*4882a593Smuzhiyun 	*id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
2010*4882a593Smuzhiyun 
2011*4882a593Smuzhiyun 	return 0;
2012*4882a593Smuzhiyun 
2013*4882a593Smuzhiyun fail:
2014*4882a593Smuzhiyun 	*id_out = -1;
2015*4882a593Smuzhiyun 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
2016*4882a593Smuzhiyun 	return rc;
2017*4882a593Smuzhiyun }
2018*4882a593Smuzhiyun 
2019*4882a593Smuzhiyun 
efx_mcdi_wol_filter_remove(struct efx_nic * efx,int id)2020*4882a593Smuzhiyun int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
2021*4882a593Smuzhiyun {
2022*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
2023*4882a593Smuzhiyun 	int rc;
2024*4882a593Smuzhiyun 
2025*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
2026*4882a593Smuzhiyun 
2027*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
2028*4882a593Smuzhiyun 			  NULL, 0, NULL);
2029*4882a593Smuzhiyun 	return rc;
2030*4882a593Smuzhiyun }
2031*4882a593Smuzhiyun 
efx_mcdi_flush_rxqs(struct efx_nic * efx)2032*4882a593Smuzhiyun int efx_mcdi_flush_rxqs(struct efx_nic *efx)
2033*4882a593Smuzhiyun {
2034*4882a593Smuzhiyun 	struct efx_channel *channel;
2035*4882a593Smuzhiyun 	struct efx_rx_queue *rx_queue;
2036*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf,
2037*4882a593Smuzhiyun 			 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
2038*4882a593Smuzhiyun 	int rc, count;
2039*4882a593Smuzhiyun 
2040*4882a593Smuzhiyun 	BUILD_BUG_ON(EFX_MAX_CHANNELS >
2041*4882a593Smuzhiyun 		     MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
2042*4882a593Smuzhiyun 
2043*4882a593Smuzhiyun 	count = 0;
2044*4882a593Smuzhiyun 	efx_for_each_channel(channel, efx) {
2045*4882a593Smuzhiyun 		efx_for_each_channel_rx_queue(rx_queue, channel) {
2046*4882a593Smuzhiyun 			if (rx_queue->flush_pending) {
2047*4882a593Smuzhiyun 				rx_queue->flush_pending = false;
2048*4882a593Smuzhiyun 				atomic_dec(&efx->rxq_flush_pending);
2049*4882a593Smuzhiyun 				MCDI_SET_ARRAY_DWORD(
2050*4882a593Smuzhiyun 					inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
2051*4882a593Smuzhiyun 					count, efx_rx_queue_index(rx_queue));
2052*4882a593Smuzhiyun 				count++;
2053*4882a593Smuzhiyun 			}
2054*4882a593Smuzhiyun 		}
2055*4882a593Smuzhiyun 	}
2056*4882a593Smuzhiyun 
2057*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
2058*4882a593Smuzhiyun 			  MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
2059*4882a593Smuzhiyun 	WARN_ON(rc < 0);
2060*4882a593Smuzhiyun 
2061*4882a593Smuzhiyun 	return rc;
2062*4882a593Smuzhiyun }
2063*4882a593Smuzhiyun 
efx_mcdi_wol_filter_reset(struct efx_nic * efx)2064*4882a593Smuzhiyun int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
2065*4882a593Smuzhiyun {
2066*4882a593Smuzhiyun 	int rc;
2067*4882a593Smuzhiyun 
2068*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
2069*4882a593Smuzhiyun 	return rc;
2070*4882a593Smuzhiyun }
2071*4882a593Smuzhiyun 
efx_mcdi_set_workaround(struct efx_nic * efx,u32 type,bool enabled,unsigned int * flags)2072*4882a593Smuzhiyun int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled,
2073*4882a593Smuzhiyun 			    unsigned int *flags)
2074*4882a593Smuzhiyun {
2075*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
2076*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN);
2077*4882a593Smuzhiyun 	size_t outlen;
2078*4882a593Smuzhiyun 	int rc;
2079*4882a593Smuzhiyun 
2080*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
2081*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
2082*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
2083*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
2084*4882a593Smuzhiyun 			  outbuf, sizeof(outbuf), &outlen);
2085*4882a593Smuzhiyun 	if (rc)
2086*4882a593Smuzhiyun 		return rc;
2087*4882a593Smuzhiyun 
2088*4882a593Smuzhiyun 	if (!flags)
2089*4882a593Smuzhiyun 		return 0;
2090*4882a593Smuzhiyun 
2091*4882a593Smuzhiyun 	if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
2092*4882a593Smuzhiyun 		*flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS);
2093*4882a593Smuzhiyun 	else
2094*4882a593Smuzhiyun 		*flags = 0;
2095*4882a593Smuzhiyun 
2096*4882a593Smuzhiyun 	return 0;
2097*4882a593Smuzhiyun }
2098*4882a593Smuzhiyun 
efx_mcdi_get_workarounds(struct efx_nic * efx,unsigned int * impl_out,unsigned int * enabled_out)2099*4882a593Smuzhiyun int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out,
2100*4882a593Smuzhiyun 			     unsigned int *enabled_out)
2101*4882a593Smuzhiyun {
2102*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN);
2103*4882a593Smuzhiyun 	size_t outlen;
2104*4882a593Smuzhiyun 	int rc;
2105*4882a593Smuzhiyun 
2106*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0,
2107*4882a593Smuzhiyun 			  outbuf, sizeof(outbuf), &outlen);
2108*4882a593Smuzhiyun 	if (rc)
2109*4882a593Smuzhiyun 		goto fail;
2110*4882a593Smuzhiyun 
2111*4882a593Smuzhiyun 	if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) {
2112*4882a593Smuzhiyun 		rc = -EIO;
2113*4882a593Smuzhiyun 		goto fail;
2114*4882a593Smuzhiyun 	}
2115*4882a593Smuzhiyun 
2116*4882a593Smuzhiyun 	if (impl_out)
2117*4882a593Smuzhiyun 		*impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED);
2118*4882a593Smuzhiyun 
2119*4882a593Smuzhiyun 	if (enabled_out)
2120*4882a593Smuzhiyun 		*enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED);
2121*4882a593Smuzhiyun 
2122*4882a593Smuzhiyun 	return 0;
2123*4882a593Smuzhiyun 
2124*4882a593Smuzhiyun fail:
2125*4882a593Smuzhiyun 	/* Older firmware lacks GET_WORKAROUNDS and this isn't especially
2126*4882a593Smuzhiyun 	 * terrifying.  The call site will have to deal with it though.
2127*4882a593Smuzhiyun 	 */
2128*4882a593Smuzhiyun 	netif_cond_dbg(efx, hw, efx->net_dev, rc == -ENOSYS, err,
2129*4882a593Smuzhiyun 		       "%s: failed rc=%d\n", __func__, rc);
2130*4882a593Smuzhiyun 	return rc;
2131*4882a593Smuzhiyun }
2132*4882a593Smuzhiyun 
2133*4882a593Smuzhiyun #ifdef CONFIG_SFC_MTD
2134*4882a593Smuzhiyun 
2135*4882a593Smuzhiyun #define EFX_MCDI_NVRAM_LEN_MAX 128
2136*4882a593Smuzhiyun 
efx_mcdi_nvram_update_start(struct efx_nic * efx,unsigned int type)2137*4882a593Smuzhiyun static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
2138*4882a593Smuzhiyun {
2139*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_V2_IN_LEN);
2140*4882a593Smuzhiyun 	int rc;
2141*4882a593Smuzhiyun 
2142*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
2143*4882a593Smuzhiyun 	MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_START_V2_IN_FLAGS,
2144*4882a593Smuzhiyun 			      NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT,
2145*4882a593Smuzhiyun 			      1);
2146*4882a593Smuzhiyun 
2147*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
2148*4882a593Smuzhiyun 
2149*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
2150*4882a593Smuzhiyun 			  NULL, 0, NULL);
2151*4882a593Smuzhiyun 
2152*4882a593Smuzhiyun 	return rc;
2153*4882a593Smuzhiyun }
2154*4882a593Smuzhiyun 
efx_mcdi_nvram_read(struct efx_nic * efx,unsigned int type,loff_t offset,u8 * buffer,size_t length)2155*4882a593Smuzhiyun static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
2156*4882a593Smuzhiyun 			       loff_t offset, u8 *buffer, size_t length)
2157*4882a593Smuzhiyun {
2158*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_V2_LEN);
2159*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf,
2160*4882a593Smuzhiyun 			 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
2161*4882a593Smuzhiyun 	size_t outlen;
2162*4882a593Smuzhiyun 	int rc;
2163*4882a593Smuzhiyun 
2164*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
2165*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
2166*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
2167*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_V2_MODE,
2168*4882a593Smuzhiyun 		       MC_CMD_NVRAM_READ_IN_V2_DEFAULT);
2169*4882a593Smuzhiyun 
2170*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
2171*4882a593Smuzhiyun 			  outbuf, sizeof(outbuf), &outlen);
2172*4882a593Smuzhiyun 	if (rc)
2173*4882a593Smuzhiyun 		return rc;
2174*4882a593Smuzhiyun 
2175*4882a593Smuzhiyun 	memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
2176*4882a593Smuzhiyun 	return 0;
2177*4882a593Smuzhiyun }
2178*4882a593Smuzhiyun 
efx_mcdi_nvram_write(struct efx_nic * efx,unsigned int type,loff_t offset,const u8 * buffer,size_t length)2179*4882a593Smuzhiyun static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
2180*4882a593Smuzhiyun 				loff_t offset, const u8 *buffer, size_t length)
2181*4882a593Smuzhiyun {
2182*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf,
2183*4882a593Smuzhiyun 			 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
2184*4882a593Smuzhiyun 	int rc;
2185*4882a593Smuzhiyun 
2186*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
2187*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
2188*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
2189*4882a593Smuzhiyun 	memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
2190*4882a593Smuzhiyun 
2191*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
2192*4882a593Smuzhiyun 
2193*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
2194*4882a593Smuzhiyun 			  ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
2195*4882a593Smuzhiyun 			  NULL, 0, NULL);
2196*4882a593Smuzhiyun 	return rc;
2197*4882a593Smuzhiyun }
2198*4882a593Smuzhiyun 
efx_mcdi_nvram_erase(struct efx_nic * efx,unsigned int type,loff_t offset,size_t length)2199*4882a593Smuzhiyun static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
2200*4882a593Smuzhiyun 				loff_t offset, size_t length)
2201*4882a593Smuzhiyun {
2202*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
2203*4882a593Smuzhiyun 	int rc;
2204*4882a593Smuzhiyun 
2205*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
2206*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
2207*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
2208*4882a593Smuzhiyun 
2209*4882a593Smuzhiyun 	BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
2210*4882a593Smuzhiyun 
2211*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
2212*4882a593Smuzhiyun 			  NULL, 0, NULL);
2213*4882a593Smuzhiyun 	return rc;
2214*4882a593Smuzhiyun }
2215*4882a593Smuzhiyun 
efx_mcdi_nvram_update_finish(struct efx_nic * efx,unsigned int type)2216*4882a593Smuzhiyun static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
2217*4882a593Smuzhiyun {
2218*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN);
2219*4882a593Smuzhiyun 	MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN);
2220*4882a593Smuzhiyun 	size_t outlen;
2221*4882a593Smuzhiyun 	int rc, rc2;
2222*4882a593Smuzhiyun 
2223*4882a593Smuzhiyun 	MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
2224*4882a593Smuzhiyun 	/* Always set this flag. Old firmware ignores it */
2225*4882a593Smuzhiyun 	MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_FINISH_V2_IN_FLAGS,
2226*4882a593Smuzhiyun 			      NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT,
2227*4882a593Smuzhiyun 			      1);
2228*4882a593Smuzhiyun 
2229*4882a593Smuzhiyun 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
2230*4882a593Smuzhiyun 			  outbuf, sizeof(outbuf), &outlen);
2231*4882a593Smuzhiyun 	if (!rc && outlen >= MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) {
2232*4882a593Smuzhiyun 		rc2 = MCDI_DWORD(outbuf, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE);
2233*4882a593Smuzhiyun 		if (rc2 != MC_CMD_NVRAM_VERIFY_RC_SUCCESS)
2234*4882a593Smuzhiyun 			netif_err(efx, drv, efx->net_dev,
2235*4882a593Smuzhiyun 				  "NVRAM update failed verification with code 0x%x\n",
2236*4882a593Smuzhiyun 				  rc2);
2237*4882a593Smuzhiyun 		switch (rc2) {
2238*4882a593Smuzhiyun 		case MC_CMD_NVRAM_VERIFY_RC_SUCCESS:
2239*4882a593Smuzhiyun 			break;
2240*4882a593Smuzhiyun 		case MC_CMD_NVRAM_VERIFY_RC_CMS_CHECK_FAILED:
2241*4882a593Smuzhiyun 		case MC_CMD_NVRAM_VERIFY_RC_MESSAGE_DIGEST_CHECK_FAILED:
2242*4882a593Smuzhiyun 		case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHECK_FAILED:
2243*4882a593Smuzhiyun 		case MC_CMD_NVRAM_VERIFY_RC_TRUSTED_APPROVERS_CHECK_FAILED:
2244*4882a593Smuzhiyun 		case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHAIN_CHECK_FAILED:
2245*4882a593Smuzhiyun 			rc = -EIO;
2246*4882a593Smuzhiyun 			break;
2247*4882a593Smuzhiyun 		case MC_CMD_NVRAM_VERIFY_RC_INVALID_CMS_FORMAT:
2248*4882a593Smuzhiyun 		case MC_CMD_NVRAM_VERIFY_RC_BAD_MESSAGE_DIGEST:
2249*4882a593Smuzhiyun 			rc = -EINVAL;
2250*4882a593Smuzhiyun 			break;
2251*4882a593Smuzhiyun 		case MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES:
2252*4882a593Smuzhiyun 		case MC_CMD_NVRAM_VERIFY_RC_NO_TRUSTED_APPROVERS:
2253*4882a593Smuzhiyun 		case MC_CMD_NVRAM_VERIFY_RC_NO_SIGNATURE_MATCH:
2254*4882a593Smuzhiyun 			rc = -EPERM;
2255*4882a593Smuzhiyun 			break;
2256*4882a593Smuzhiyun 		default:
2257*4882a593Smuzhiyun 			netif_err(efx, drv, efx->net_dev,
2258*4882a593Smuzhiyun 				  "Unknown response to NVRAM_UPDATE_FINISH\n");
2259*4882a593Smuzhiyun 			rc = -EIO;
2260*4882a593Smuzhiyun 		}
2261*4882a593Smuzhiyun 	}
2262*4882a593Smuzhiyun 
2263*4882a593Smuzhiyun 	return rc;
2264*4882a593Smuzhiyun }
2265*4882a593Smuzhiyun 
efx_mcdi_mtd_read(struct mtd_info * mtd,loff_t start,size_t len,size_t * retlen,u8 * buffer)2266*4882a593Smuzhiyun int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
2267*4882a593Smuzhiyun 		      size_t len, size_t *retlen, u8 *buffer)
2268*4882a593Smuzhiyun {
2269*4882a593Smuzhiyun 	struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2270*4882a593Smuzhiyun 	struct efx_nic *efx = mtd->priv;
2271*4882a593Smuzhiyun 	loff_t offset = start;
2272*4882a593Smuzhiyun 	loff_t end = min_t(loff_t, start + len, mtd->size);
2273*4882a593Smuzhiyun 	size_t chunk;
2274*4882a593Smuzhiyun 	int rc = 0;
2275*4882a593Smuzhiyun 
2276*4882a593Smuzhiyun 	while (offset < end) {
2277*4882a593Smuzhiyun 		chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
2278*4882a593Smuzhiyun 		rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
2279*4882a593Smuzhiyun 					 buffer, chunk);
2280*4882a593Smuzhiyun 		if (rc)
2281*4882a593Smuzhiyun 			goto out;
2282*4882a593Smuzhiyun 		offset += chunk;
2283*4882a593Smuzhiyun 		buffer += chunk;
2284*4882a593Smuzhiyun 	}
2285*4882a593Smuzhiyun out:
2286*4882a593Smuzhiyun 	*retlen = offset - start;
2287*4882a593Smuzhiyun 	return rc;
2288*4882a593Smuzhiyun }
2289*4882a593Smuzhiyun 
efx_mcdi_mtd_erase(struct mtd_info * mtd,loff_t start,size_t len)2290*4882a593Smuzhiyun int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
2291*4882a593Smuzhiyun {
2292*4882a593Smuzhiyun 	struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2293*4882a593Smuzhiyun 	struct efx_nic *efx = mtd->priv;
2294*4882a593Smuzhiyun 	loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
2295*4882a593Smuzhiyun 	loff_t end = min_t(loff_t, start + len, mtd->size);
2296*4882a593Smuzhiyun 	size_t chunk = part->common.mtd.erasesize;
2297*4882a593Smuzhiyun 	int rc = 0;
2298*4882a593Smuzhiyun 
2299*4882a593Smuzhiyun 	if (!part->updating) {
2300*4882a593Smuzhiyun 		rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
2301*4882a593Smuzhiyun 		if (rc)
2302*4882a593Smuzhiyun 			goto out;
2303*4882a593Smuzhiyun 		part->updating = true;
2304*4882a593Smuzhiyun 	}
2305*4882a593Smuzhiyun 
2306*4882a593Smuzhiyun 	/* The MCDI interface can in fact do multiple erase blocks at once;
2307*4882a593Smuzhiyun 	 * but erasing may be slow, so we make multiple calls here to avoid
2308*4882a593Smuzhiyun 	 * tripping the MCDI RPC timeout. */
2309*4882a593Smuzhiyun 	while (offset < end) {
2310*4882a593Smuzhiyun 		rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
2311*4882a593Smuzhiyun 					  chunk);
2312*4882a593Smuzhiyun 		if (rc)
2313*4882a593Smuzhiyun 			goto out;
2314*4882a593Smuzhiyun 		offset += chunk;
2315*4882a593Smuzhiyun 	}
2316*4882a593Smuzhiyun out:
2317*4882a593Smuzhiyun 	return rc;
2318*4882a593Smuzhiyun }
2319*4882a593Smuzhiyun 
efx_mcdi_mtd_write(struct mtd_info * mtd,loff_t start,size_t len,size_t * retlen,const u8 * buffer)2320*4882a593Smuzhiyun int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
2321*4882a593Smuzhiyun 		       size_t len, size_t *retlen, const u8 *buffer)
2322*4882a593Smuzhiyun {
2323*4882a593Smuzhiyun 	struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2324*4882a593Smuzhiyun 	struct efx_nic *efx = mtd->priv;
2325*4882a593Smuzhiyun 	loff_t offset = start;
2326*4882a593Smuzhiyun 	loff_t end = min_t(loff_t, start + len, mtd->size);
2327*4882a593Smuzhiyun 	size_t chunk;
2328*4882a593Smuzhiyun 	int rc = 0;
2329*4882a593Smuzhiyun 
2330*4882a593Smuzhiyun 	if (!part->updating) {
2331*4882a593Smuzhiyun 		rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
2332*4882a593Smuzhiyun 		if (rc)
2333*4882a593Smuzhiyun 			goto out;
2334*4882a593Smuzhiyun 		part->updating = true;
2335*4882a593Smuzhiyun 	}
2336*4882a593Smuzhiyun 
2337*4882a593Smuzhiyun 	while (offset < end) {
2338*4882a593Smuzhiyun 		chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
2339*4882a593Smuzhiyun 		rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
2340*4882a593Smuzhiyun 					  buffer, chunk);
2341*4882a593Smuzhiyun 		if (rc)
2342*4882a593Smuzhiyun 			goto out;
2343*4882a593Smuzhiyun 		offset += chunk;
2344*4882a593Smuzhiyun 		buffer += chunk;
2345*4882a593Smuzhiyun 	}
2346*4882a593Smuzhiyun out:
2347*4882a593Smuzhiyun 	*retlen = offset - start;
2348*4882a593Smuzhiyun 	return rc;
2349*4882a593Smuzhiyun }
2350*4882a593Smuzhiyun 
efx_mcdi_mtd_sync(struct mtd_info * mtd)2351*4882a593Smuzhiyun int efx_mcdi_mtd_sync(struct mtd_info *mtd)
2352*4882a593Smuzhiyun {
2353*4882a593Smuzhiyun 	struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2354*4882a593Smuzhiyun 	struct efx_nic *efx = mtd->priv;
2355*4882a593Smuzhiyun 	int rc = 0;
2356*4882a593Smuzhiyun 
2357*4882a593Smuzhiyun 	if (part->updating) {
2358*4882a593Smuzhiyun 		part->updating = false;
2359*4882a593Smuzhiyun 		rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
2360*4882a593Smuzhiyun 	}
2361*4882a593Smuzhiyun 
2362*4882a593Smuzhiyun 	return rc;
2363*4882a593Smuzhiyun }
2364*4882a593Smuzhiyun 
efx_mcdi_mtd_rename(struct efx_mtd_partition * part)2365*4882a593Smuzhiyun void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
2366*4882a593Smuzhiyun {
2367*4882a593Smuzhiyun 	struct efx_mcdi_mtd_partition *mcdi_part =
2368*4882a593Smuzhiyun 		container_of(part, struct efx_mcdi_mtd_partition, common);
2369*4882a593Smuzhiyun 	struct efx_nic *efx = part->mtd.priv;
2370*4882a593Smuzhiyun 
2371*4882a593Smuzhiyun 	snprintf(part->name, sizeof(part->name), "%s %s:%02x",
2372*4882a593Smuzhiyun 		 efx->name, part->type_name, mcdi_part->fw_subtype);
2373*4882a593Smuzhiyun }
2374*4882a593Smuzhiyun 
2375*4882a593Smuzhiyun #endif /* CONFIG_SFC_MTD */
2376