1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /**************************************************************************** 3*4882a593Smuzhiyun * Driver for Solarflare network controllers and boards 4*4882a593Smuzhiyun * Copyright 2007-2013 Solarflare Communications Inc. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef EF4_ENUM_H 8*4882a593Smuzhiyun #define EF4_ENUM_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /** 11*4882a593Smuzhiyun * enum ef4_loopback_mode - loopback modes 12*4882a593Smuzhiyun * @LOOPBACK_NONE: no loopback 13*4882a593Smuzhiyun * @LOOPBACK_DATA: data path loopback 14*4882a593Smuzhiyun * @LOOPBACK_GMAC: loopback within GMAC 15*4882a593Smuzhiyun * @LOOPBACK_XGMII: loopback after XMAC 16*4882a593Smuzhiyun * @LOOPBACK_XGXS: loopback within BPX after XGXS 17*4882a593Smuzhiyun * @LOOPBACK_XAUI: loopback within BPX before XAUI serdes 18*4882a593Smuzhiyun * @LOOPBACK_GMII: loopback within BPX after GMAC 19*4882a593Smuzhiyun * @LOOPBACK_SGMII: loopback within BPX within SGMII 20*4882a593Smuzhiyun * @LOOPBACK_XGBR: loopback within BPX within XGBR 21*4882a593Smuzhiyun * @LOOPBACK_XFI: loopback within BPX before XFI serdes 22*4882a593Smuzhiyun * @LOOPBACK_XAUI_FAR: loopback within BPX after XAUI serdes 23*4882a593Smuzhiyun * @LOOPBACK_GMII_FAR: loopback within BPX before SGMII 24*4882a593Smuzhiyun * @LOOPBACK_SGMII_FAR: loopback within BPX after SGMII 25*4882a593Smuzhiyun * @LOOPBACK_XFI_FAR: loopback after XFI serdes 26*4882a593Smuzhiyun * @LOOPBACK_GPHY: loopback within 1G PHY at unspecified level 27*4882a593Smuzhiyun * @LOOPBACK_PHYXS: loopback within 10G PHY at PHYXS level 28*4882a593Smuzhiyun * @LOOPBACK_PCS: loopback within 10G PHY at PCS level 29*4882a593Smuzhiyun * @LOOPBACK_PMAPMD: loopback within 10G PHY at PMAPMD level 30*4882a593Smuzhiyun * @LOOPBACK_XPORT: cross port loopback 31*4882a593Smuzhiyun * @LOOPBACK_XGMII_WS: wireside loopback excluding XMAC 32*4882a593Smuzhiyun * @LOOPBACK_XAUI_WS: wireside loopback within BPX within XAUI serdes 33*4882a593Smuzhiyun * @LOOPBACK_XAUI_WS_FAR: wireside loopback within BPX including XAUI serdes 34*4882a593Smuzhiyun * @LOOPBACK_XAUI_WS_NEAR: wireside loopback within BPX excluding XAUI serdes 35*4882a593Smuzhiyun * @LOOPBACK_GMII_WS: wireside loopback excluding GMAC 36*4882a593Smuzhiyun * @LOOPBACK_XFI_WS: wireside loopback excluding XFI serdes 37*4882a593Smuzhiyun * @LOOPBACK_XFI_WS_FAR: wireside loopback including XFI serdes 38*4882a593Smuzhiyun * @LOOPBACK_PHYXS_WS: wireside loopback within 10G PHY at PHYXS level 39*4882a593Smuzhiyun */ 40*4882a593Smuzhiyun /* Please keep up-to-date w.r.t the following two #defines */ 41*4882a593Smuzhiyun enum ef4_loopback_mode { 42*4882a593Smuzhiyun LOOPBACK_NONE = 0, 43*4882a593Smuzhiyun LOOPBACK_DATA = 1, 44*4882a593Smuzhiyun LOOPBACK_GMAC = 2, 45*4882a593Smuzhiyun LOOPBACK_XGMII = 3, 46*4882a593Smuzhiyun LOOPBACK_XGXS = 4, 47*4882a593Smuzhiyun LOOPBACK_XAUI = 5, 48*4882a593Smuzhiyun LOOPBACK_GMII = 6, 49*4882a593Smuzhiyun LOOPBACK_SGMII = 7, 50*4882a593Smuzhiyun LOOPBACK_XGBR = 8, 51*4882a593Smuzhiyun LOOPBACK_XFI = 9, 52*4882a593Smuzhiyun LOOPBACK_XAUI_FAR = 10, 53*4882a593Smuzhiyun LOOPBACK_GMII_FAR = 11, 54*4882a593Smuzhiyun LOOPBACK_SGMII_FAR = 12, 55*4882a593Smuzhiyun LOOPBACK_XFI_FAR = 13, 56*4882a593Smuzhiyun LOOPBACK_GPHY = 14, 57*4882a593Smuzhiyun LOOPBACK_PHYXS = 15, 58*4882a593Smuzhiyun LOOPBACK_PCS = 16, 59*4882a593Smuzhiyun LOOPBACK_PMAPMD = 17, 60*4882a593Smuzhiyun LOOPBACK_XPORT = 18, 61*4882a593Smuzhiyun LOOPBACK_XGMII_WS = 19, 62*4882a593Smuzhiyun LOOPBACK_XAUI_WS = 20, 63*4882a593Smuzhiyun LOOPBACK_XAUI_WS_FAR = 21, 64*4882a593Smuzhiyun LOOPBACK_XAUI_WS_NEAR = 22, 65*4882a593Smuzhiyun LOOPBACK_GMII_WS = 23, 66*4882a593Smuzhiyun LOOPBACK_XFI_WS = 24, 67*4882a593Smuzhiyun LOOPBACK_XFI_WS_FAR = 25, 68*4882a593Smuzhiyun LOOPBACK_PHYXS_WS = 26, 69*4882a593Smuzhiyun LOOPBACK_MAX 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun #define LOOPBACK_TEST_MAX LOOPBACK_PMAPMD 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* These loopbacks occur within the controller */ 74*4882a593Smuzhiyun #define LOOPBACKS_INTERNAL ((1 << LOOPBACK_DATA) | \ 75*4882a593Smuzhiyun (1 << LOOPBACK_GMAC) | \ 76*4882a593Smuzhiyun (1 << LOOPBACK_XGMII)| \ 77*4882a593Smuzhiyun (1 << LOOPBACK_XGXS) | \ 78*4882a593Smuzhiyun (1 << LOOPBACK_XAUI) | \ 79*4882a593Smuzhiyun (1 << LOOPBACK_GMII) | \ 80*4882a593Smuzhiyun (1 << LOOPBACK_SGMII) | \ 81*4882a593Smuzhiyun (1 << LOOPBACK_XGBR) | \ 82*4882a593Smuzhiyun (1 << LOOPBACK_XFI) | \ 83*4882a593Smuzhiyun (1 << LOOPBACK_XAUI_FAR) | \ 84*4882a593Smuzhiyun (1 << LOOPBACK_GMII_FAR) | \ 85*4882a593Smuzhiyun (1 << LOOPBACK_SGMII_FAR) | \ 86*4882a593Smuzhiyun (1 << LOOPBACK_XFI_FAR) | \ 87*4882a593Smuzhiyun (1 << LOOPBACK_XGMII_WS) | \ 88*4882a593Smuzhiyun (1 << LOOPBACK_XAUI_WS) | \ 89*4882a593Smuzhiyun (1 << LOOPBACK_XAUI_WS_FAR) | \ 90*4882a593Smuzhiyun (1 << LOOPBACK_XAUI_WS_NEAR) | \ 91*4882a593Smuzhiyun (1 << LOOPBACK_GMII_WS) | \ 92*4882a593Smuzhiyun (1 << LOOPBACK_XFI_WS) | \ 93*4882a593Smuzhiyun (1 << LOOPBACK_XFI_WS_FAR)) 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #define LOOPBACKS_WS ((1 << LOOPBACK_XGMII_WS) | \ 96*4882a593Smuzhiyun (1 << LOOPBACK_XAUI_WS) | \ 97*4882a593Smuzhiyun (1 << LOOPBACK_XAUI_WS_FAR) | \ 98*4882a593Smuzhiyun (1 << LOOPBACK_XAUI_WS_NEAR) | \ 99*4882a593Smuzhiyun (1 << LOOPBACK_GMII_WS) | \ 100*4882a593Smuzhiyun (1 << LOOPBACK_XFI_WS) | \ 101*4882a593Smuzhiyun (1 << LOOPBACK_XFI_WS_FAR) | \ 102*4882a593Smuzhiyun (1 << LOOPBACK_PHYXS_WS)) 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun #define LOOPBACKS_EXTERNAL(_efx) \ 105*4882a593Smuzhiyun ((_efx)->loopback_modes & ~LOOPBACKS_INTERNAL & \ 106*4882a593Smuzhiyun ~(1 << LOOPBACK_NONE)) 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #define LOOPBACK_MASK(_efx) \ 109*4882a593Smuzhiyun (1 << (_efx)->loopback_mode) 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun #define LOOPBACK_INTERNAL(_efx) \ 112*4882a593Smuzhiyun (!!(LOOPBACKS_INTERNAL & LOOPBACK_MASK(_efx))) 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun #define LOOPBACK_EXTERNAL(_efx) \ 115*4882a593Smuzhiyun (!!(LOOPBACK_MASK(_efx) & LOOPBACKS_EXTERNAL(_efx))) 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun #define LOOPBACK_CHANGED(_from, _to, _mask) \ 118*4882a593Smuzhiyun (!!((LOOPBACK_MASK(_from) ^ LOOPBACK_MASK(_to)) & (_mask))) 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #define LOOPBACK_OUT_OF(_from, _to, _mask) \ 121*4882a593Smuzhiyun ((LOOPBACK_MASK(_from) & (_mask)) && !(LOOPBACK_MASK(_to) & (_mask))) 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun /*****************************************************************************/ 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun /** 126*4882a593Smuzhiyun * enum reset_type - reset types 127*4882a593Smuzhiyun * 128*4882a593Smuzhiyun * %RESET_TYPE_INVSIBLE, %RESET_TYPE_ALL, %RESET_TYPE_WORLD and 129*4882a593Smuzhiyun * %RESET_TYPE_DISABLE specify the method/scope of the reset. The 130*4882a593Smuzhiyun * other valuesspecify reasons, which ef4_schedule_reset() will choose 131*4882a593Smuzhiyun * a method for. 132*4882a593Smuzhiyun * 133*4882a593Smuzhiyun * Reset methods are numbered in order of increasing scope. 134*4882a593Smuzhiyun * 135*4882a593Smuzhiyun * @RESET_TYPE_INVISIBLE: Reset datapath and MAC 136*4882a593Smuzhiyun * @RESET_TYPE_RECOVER_OR_ALL: Try to recover. Apply RESET_TYPE_ALL 137*4882a593Smuzhiyun * if unsuccessful. 138*4882a593Smuzhiyun * @RESET_TYPE_ALL: Reset datapath, MAC and PHY 139*4882a593Smuzhiyun * @RESET_TYPE_WORLD: Reset as much as possible 140*4882a593Smuzhiyun * @RESET_TYPE_RECOVER_OR_DISABLE: Try to recover. Apply RESET_TYPE_DISABLE if 141*4882a593Smuzhiyun * unsuccessful. 142*4882a593Smuzhiyun * @RESET_TYPE_DATAPATH: Reset datapath only. 143*4882a593Smuzhiyun * @RESET_TYPE_DISABLE: Reset datapath, MAC and PHY; leave NIC disabled 144*4882a593Smuzhiyun * @RESET_TYPE_TX_WATCHDOG: reset due to TX watchdog 145*4882a593Smuzhiyun * @RESET_TYPE_INT_ERROR: reset due to internal error 146*4882a593Smuzhiyun * @RESET_TYPE_RX_RECOVERY: reset to recover from RX datapath errors 147*4882a593Smuzhiyun * @RESET_TYPE_DMA_ERROR: DMA error 148*4882a593Smuzhiyun * @RESET_TYPE_TX_SKIP: hardware completed empty tx descriptors 149*4882a593Smuzhiyun */ 150*4882a593Smuzhiyun enum reset_type { 151*4882a593Smuzhiyun RESET_TYPE_INVISIBLE, 152*4882a593Smuzhiyun RESET_TYPE_RECOVER_OR_ALL, 153*4882a593Smuzhiyun RESET_TYPE_ALL, 154*4882a593Smuzhiyun RESET_TYPE_WORLD, 155*4882a593Smuzhiyun RESET_TYPE_RECOVER_OR_DISABLE, 156*4882a593Smuzhiyun RESET_TYPE_DATAPATH, 157*4882a593Smuzhiyun RESET_TYPE_DISABLE, 158*4882a593Smuzhiyun RESET_TYPE_MAX_METHOD, 159*4882a593Smuzhiyun RESET_TYPE_TX_WATCHDOG, 160*4882a593Smuzhiyun RESET_TYPE_INT_ERROR, 161*4882a593Smuzhiyun RESET_TYPE_RX_RECOVERY, 162*4882a593Smuzhiyun RESET_TYPE_DMA_ERROR, 163*4882a593Smuzhiyun RESET_TYPE_TX_SKIP, 164*4882a593Smuzhiyun RESET_TYPE_MAX, 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun #endif /* EF4_ENUM_H */ 168