1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/drivers/acorn/net/ether3.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 1995-2000 Russell King
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SEEQ nq8005 ethernet driver for Acorn/ANT Ether3 card
8*4882a593Smuzhiyun * for Acorn machines
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * By Russell King, with some suggestions from borris@ant.co.uk
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Changelog:
13*4882a593Smuzhiyun * 1.04 RMK 29/02/1996 Won't pass packets that are from our ethernet
14*4882a593Smuzhiyun * address up to the higher levels - they're
15*4882a593Smuzhiyun * silently ignored. I/F can now be put into
16*4882a593Smuzhiyun * multicast mode. Receiver routine optimised.
17*4882a593Smuzhiyun * 1.05 RMK 30/02/1996 Now claims interrupt at open when part of
18*4882a593Smuzhiyun * the kernel rather than when a module.
19*4882a593Smuzhiyun * 1.06 RMK 02/03/1996 Various code cleanups
20*4882a593Smuzhiyun * 1.07 RMK 13/10/1996 Optimised interrupt routine and transmit
21*4882a593Smuzhiyun * routines.
22*4882a593Smuzhiyun * 1.08 RMK 14/10/1996 Fixed problem with too many packets,
23*4882a593Smuzhiyun * prevented the kernel message about dropped
24*4882a593Smuzhiyun * packets appearing too many times a second.
25*4882a593Smuzhiyun * Now does not disable all IRQs, only the IRQ
26*4882a593Smuzhiyun * used by this card.
27*4882a593Smuzhiyun * 1.09 RMK 10/11/1996 Only enables TX irq when buffer space is low,
28*4882a593Smuzhiyun * but we still service the TX queue if we get a
29*4882a593Smuzhiyun * RX interrupt.
30*4882a593Smuzhiyun * 1.10 RMK 15/07/1997 Fixed autoprobing of NQ8004.
31*4882a593Smuzhiyun * 1.11 RMK 16/11/1997 Fixed autoprobing of NQ8005A.
32*4882a593Smuzhiyun * 1.12 RMK 31/12/1997 Removed reference to dev_tint for Linux 2.1.
33*4882a593Smuzhiyun * RMK 27/06/1998 Changed asm/delay.h to linux/delay.h.
34*4882a593Smuzhiyun * 1.13 RMK 29/06/1998 Fixed problem with transmission of packets.
35*4882a593Smuzhiyun * Chip seems to have a bug in, whereby if the
36*4882a593Smuzhiyun * packet starts two bytes from the end of the
37*4882a593Smuzhiyun * buffer, it corrupts the receiver chain, and
38*4882a593Smuzhiyun * never updates the transmit status correctly.
39*4882a593Smuzhiyun * 1.14 RMK 07/01/1998 Added initial code for ETHERB addressing.
40*4882a593Smuzhiyun * 1.15 RMK 30/04/1999 More fixes to the transmit routine for buggy
41*4882a593Smuzhiyun * hardware.
42*4882a593Smuzhiyun * 1.16 RMK 10/02/2000 Updated for 2.3.43
43*4882a593Smuzhiyun * 1.17 RMK 13/05/2000 Updated for 2.3.99-pre8
44*4882a593Smuzhiyun */
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #include <linux/module.h>
47*4882a593Smuzhiyun #include <linux/kernel.h>
48*4882a593Smuzhiyun #include <linux/types.h>
49*4882a593Smuzhiyun #include <linux/fcntl.h>
50*4882a593Smuzhiyun #include <linux/interrupt.h>
51*4882a593Smuzhiyun #include <linux/ioport.h>
52*4882a593Smuzhiyun #include <linux/in.h>
53*4882a593Smuzhiyun #include <linux/slab.h>
54*4882a593Smuzhiyun #include <linux/string.h>
55*4882a593Smuzhiyun #include <linux/errno.h>
56*4882a593Smuzhiyun #include <linux/netdevice.h>
57*4882a593Smuzhiyun #include <linux/etherdevice.h>
58*4882a593Smuzhiyun #include <linux/skbuff.h>
59*4882a593Smuzhiyun #include <linux/device.h>
60*4882a593Smuzhiyun #include <linux/init.h>
61*4882a593Smuzhiyun #include <linux/delay.h>
62*4882a593Smuzhiyun #include <linux/bitops.h>
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun #include <asm/ecard.h>
65*4882a593Smuzhiyun #include <asm/io.h>
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun static char version[] = "ether3 ethernet driver (c) 1995-2000 R.M.King v1.17\n";
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #include "ether3.h"
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun static unsigned int net_debug = NET_DEBUG;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun static void ether3_setmulticastlist(struct net_device *dev);
74*4882a593Smuzhiyun static int ether3_rx(struct net_device *dev, unsigned int maxcnt);
75*4882a593Smuzhiyun static void ether3_tx(struct net_device *dev);
76*4882a593Smuzhiyun static int ether3_open (struct net_device *dev);
77*4882a593Smuzhiyun static netdev_tx_t ether3_sendpacket(struct sk_buff *skb,
78*4882a593Smuzhiyun struct net_device *dev);
79*4882a593Smuzhiyun static irqreturn_t ether3_interrupt (int irq, void *dev_id);
80*4882a593Smuzhiyun static int ether3_close (struct net_device *dev);
81*4882a593Smuzhiyun static void ether3_setmulticastlist (struct net_device *dev);
82*4882a593Smuzhiyun static void ether3_timeout(struct net_device *dev, unsigned int txqueue);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun #define BUS_16 2
85*4882a593Smuzhiyun #define BUS_8 1
86*4882a593Smuzhiyun #define BUS_UNKNOWN 0
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /* --------------------------------------------------------------------------- */
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun typedef enum {
91*4882a593Smuzhiyun buffer_write,
92*4882a593Smuzhiyun buffer_read
93*4882a593Smuzhiyun } buffer_rw_t;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /*
96*4882a593Smuzhiyun * ether3 read/write. Slow things down a bit...
97*4882a593Smuzhiyun * The SEEQ8005 doesn't like us writing to its registers
98*4882a593Smuzhiyun * too quickly.
99*4882a593Smuzhiyun */
ether3_outb(int v,void __iomem * r)100*4882a593Smuzhiyun static inline void ether3_outb(int v, void __iomem *r)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun writeb(v, r);
103*4882a593Smuzhiyun udelay(1);
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
ether3_outw(int v,void __iomem * r)106*4882a593Smuzhiyun static inline void ether3_outw(int v, void __iomem *r)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun writew(v, r);
109*4882a593Smuzhiyun udelay(1);
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun #define ether3_inb(r) ({ unsigned int __v = readb((r)); udelay(1); __v; })
112*4882a593Smuzhiyun #define ether3_inw(r) ({ unsigned int __v = readw((r)); udelay(1); __v; })
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun static int
ether3_setbuffer(struct net_device * dev,buffer_rw_t read,int start)115*4882a593Smuzhiyun ether3_setbuffer(struct net_device *dev, buffer_rw_t read, int start)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun int timeout = 1000;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
120*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.command | CMD_FIFOWRITE, REG_COMMAND);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun while ((ether3_inw(REG_STATUS) & STAT_FIFOEMPTY) == 0) {
123*4882a593Smuzhiyun if (!timeout--) {
124*4882a593Smuzhiyun printk("%s: setbuffer broken\n", dev->name);
125*4882a593Smuzhiyun priv(dev)->broken = 1;
126*4882a593Smuzhiyun return 1;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun udelay(1);
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun if (read == buffer_read) {
132*4882a593Smuzhiyun ether3_outw(start, REG_DMAADDR);
133*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.command | CMD_FIFOREAD, REG_COMMAND);
134*4882a593Smuzhiyun } else {
135*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.command | CMD_FIFOWRITE, REG_COMMAND);
136*4882a593Smuzhiyun ether3_outw(start, REG_DMAADDR);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun return 0;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /*
142*4882a593Smuzhiyun * write data to the buffer memory
143*4882a593Smuzhiyun */
144*4882a593Smuzhiyun #define ether3_writebuffer(dev,data,length) \
145*4882a593Smuzhiyun writesw(REG_BUFWIN, (data), (length) >> 1)
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun #define ether3_writeword(dev,data) \
148*4882a593Smuzhiyun writew((data), REG_BUFWIN)
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun #define ether3_writelong(dev,data) { \
151*4882a593Smuzhiyun void __iomem *reg_bufwin = REG_BUFWIN; \
152*4882a593Smuzhiyun writew((data), reg_bufwin); \
153*4882a593Smuzhiyun writew((data) >> 16, reg_bufwin); \
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /*
157*4882a593Smuzhiyun * read data from the buffer memory
158*4882a593Smuzhiyun */
159*4882a593Smuzhiyun #define ether3_readbuffer(dev,data,length) \
160*4882a593Smuzhiyun readsw(REG_BUFWIN, (data), (length) >> 1)
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun #define ether3_readword(dev) \
163*4882a593Smuzhiyun readw(REG_BUFWIN)
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun #define ether3_readlong(dev) \
166*4882a593Smuzhiyun readw(REG_BUFWIN) | (readw(REG_BUFWIN) << 16)
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /*
169*4882a593Smuzhiyun * Switch LED off...
170*4882a593Smuzhiyun */
ether3_ledoff(struct timer_list * t)171*4882a593Smuzhiyun static void ether3_ledoff(struct timer_list *t)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun struct dev_priv *private = from_timer(private, t, timer);
174*4882a593Smuzhiyun struct net_device *dev = private->dev;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config2 |= CFG2_CTRLO, REG_CONFIG2);
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /*
180*4882a593Smuzhiyun * switch LED on...
181*4882a593Smuzhiyun */
ether3_ledon(struct net_device * dev)182*4882a593Smuzhiyun static inline void ether3_ledon(struct net_device *dev)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun del_timer(&priv(dev)->timer);
185*4882a593Smuzhiyun priv(dev)->timer.expires = jiffies + HZ / 50; /* leave on for 1/50th second */
186*4882a593Smuzhiyun add_timer(&priv(dev)->timer);
187*4882a593Smuzhiyun if (priv(dev)->regs.config2 & CFG2_CTRLO)
188*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config2 &= ~CFG2_CTRLO, REG_CONFIG2);
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /*
192*4882a593Smuzhiyun * Read the ethernet address string from the on board rom.
193*4882a593Smuzhiyun * This is an ascii string!!!
194*4882a593Smuzhiyun */
195*4882a593Smuzhiyun static int
ether3_addr(char * addr,struct expansion_card * ec)196*4882a593Smuzhiyun ether3_addr(char *addr, struct expansion_card *ec)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun struct in_chunk_dir cd;
199*4882a593Smuzhiyun char *s;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun if (ecard_readchunk(&cd, ec, 0xf5, 0) && (s = strchr(cd.d.string, '('))) {
202*4882a593Smuzhiyun int i;
203*4882a593Smuzhiyun for (i = 0; i<6; i++) {
204*4882a593Smuzhiyun addr[i] = simple_strtoul(s + 1, &s, 0x10);
205*4882a593Smuzhiyun if (*s != (i==5?')' : ':' ))
206*4882a593Smuzhiyun break;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun if (i == 6)
209*4882a593Smuzhiyun return 0;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun /* I wonder if we should even let the user continue in this case
212*4882a593Smuzhiyun * - no, it would be better to disable the device
213*4882a593Smuzhiyun */
214*4882a593Smuzhiyun printk(KERN_ERR "ether3: Couldn't read a valid MAC address from card.\n");
215*4882a593Smuzhiyun return -ENODEV;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun /* --------------------------------------------------------------------------- */
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun static int
ether3_ramtest(struct net_device * dev,unsigned char byte)221*4882a593Smuzhiyun ether3_ramtest(struct net_device *dev, unsigned char byte)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun unsigned char *buffer = kmalloc(RX_END, GFP_KERNEL);
224*4882a593Smuzhiyun int i,ret = 0;
225*4882a593Smuzhiyun int max_errors = 4;
226*4882a593Smuzhiyun int bad = -1;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun if (!buffer)
229*4882a593Smuzhiyun return 1;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun memset(buffer, byte, RX_END);
232*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_write, 0);
233*4882a593Smuzhiyun ether3_writebuffer(dev, buffer, TX_END);
234*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_write, RX_START);
235*4882a593Smuzhiyun ether3_writebuffer(dev, buffer + RX_START, RX_LEN);
236*4882a593Smuzhiyun memset(buffer, byte ^ 0xff, RX_END);
237*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_read, 0);
238*4882a593Smuzhiyun ether3_readbuffer(dev, buffer, TX_END);
239*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_read, RX_START);
240*4882a593Smuzhiyun ether3_readbuffer(dev, buffer + RX_START, RX_LEN);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun for (i = 0; i < RX_END; i++) {
243*4882a593Smuzhiyun if (buffer[i] != byte) {
244*4882a593Smuzhiyun if (max_errors > 0 && bad != buffer[i]) {
245*4882a593Smuzhiyun printk("%s: RAM failed with (%02X instead of %02X) at 0x%04X",
246*4882a593Smuzhiyun dev->name, buffer[i], byte, i);
247*4882a593Smuzhiyun ret = 2;
248*4882a593Smuzhiyun max_errors--;
249*4882a593Smuzhiyun bad = i;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun } else {
252*4882a593Smuzhiyun if (bad != -1) {
253*4882a593Smuzhiyun if (bad != i - 1)
254*4882a593Smuzhiyun printk(" - 0x%04X\n", i - 1);
255*4882a593Smuzhiyun printk("\n");
256*4882a593Smuzhiyun bad = -1;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun if (bad != -1)
261*4882a593Smuzhiyun printk(" - 0xffff\n");
262*4882a593Smuzhiyun kfree(buffer);
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun return ret;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun /* ------------------------------------------------------------------------------- */
268*4882a593Smuzhiyun
ether3_init_2(struct net_device * dev)269*4882a593Smuzhiyun static int ether3_init_2(struct net_device *dev)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun int i;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun priv(dev)->regs.config1 = CFG1_RECVCOMPSTAT0|CFG1_DMABURST8;
274*4882a593Smuzhiyun priv(dev)->regs.config2 = CFG2_CTRLO|CFG2_RECVCRC|CFG2_ERRENCRC;
275*4882a593Smuzhiyun priv(dev)->regs.command = 0;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun /*
278*4882a593Smuzhiyun * Set up our hardware address
279*4882a593Smuzhiyun */
280*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1);
281*4882a593Smuzhiyun for (i = 0; i < 6; i++)
282*4882a593Smuzhiyun ether3_outb(dev->dev_addr[i], REG_BUFWIN);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun if (dev->flags & IFF_PROMISC)
285*4882a593Smuzhiyun priv(dev)->regs.config1 |= CFG1_RECVPROMISC;
286*4882a593Smuzhiyun else if (dev->flags & IFF_MULTICAST)
287*4882a593Smuzhiyun priv(dev)->regs.config1 |= CFG1_RECVSPECBRMULTI;
288*4882a593Smuzhiyun else
289*4882a593Smuzhiyun priv(dev)->regs.config1 |= CFG1_RECVSPECBROAD;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun /*
292*4882a593Smuzhiyun * There is a problem with the NQ8005 in that it occasionally loses the
293*4882a593Smuzhiyun * last two bytes. To get round this problem, we receive the CRC as
294*4882a593Smuzhiyun * well. That way, if we do lose the last two, then it doesn't matter.
295*4882a593Smuzhiyun */
296*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1);
297*4882a593Smuzhiyun ether3_outw((TX_END>>8) - 1, REG_BUFWIN);
298*4882a593Smuzhiyun ether3_outw(priv(dev)->rx_head, REG_RECVPTR);
299*4882a593Smuzhiyun ether3_outw(0, REG_TRANSMITPTR);
300*4882a593Smuzhiyun ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND);
301*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config2, REG_CONFIG2);
302*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
303*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.command, REG_COMMAND);
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun i = ether3_ramtest(dev, 0x5A);
306*4882a593Smuzhiyun if(i)
307*4882a593Smuzhiyun return i;
308*4882a593Smuzhiyun i = ether3_ramtest(dev, 0x1E);
309*4882a593Smuzhiyun if(i)
310*4882a593Smuzhiyun return i;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_write, 0);
313*4882a593Smuzhiyun ether3_writelong(dev, 0);
314*4882a593Smuzhiyun return 0;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun static void
ether3_init_for_open(struct net_device * dev)318*4882a593Smuzhiyun ether3_init_for_open(struct net_device *dev)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun int i;
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun /* Reset the chip */
323*4882a593Smuzhiyun ether3_outw(CFG2_RESET, REG_CONFIG2);
324*4882a593Smuzhiyun udelay(4);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun priv(dev)->regs.command = 0;
327*4882a593Smuzhiyun ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND);
328*4882a593Smuzhiyun while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON))
329*4882a593Smuzhiyun barrier();
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1);
332*4882a593Smuzhiyun for (i = 0; i < 6; i++)
333*4882a593Smuzhiyun ether3_outb(dev->dev_addr[i], REG_BUFWIN);
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun priv(dev)->tx_head = 0;
336*4882a593Smuzhiyun priv(dev)->tx_tail = 0;
337*4882a593Smuzhiyun priv(dev)->regs.config2 |= CFG2_CTRLO;
338*4882a593Smuzhiyun priv(dev)->rx_head = RX_START;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1);
341*4882a593Smuzhiyun ether3_outw((TX_END>>8) - 1, REG_BUFWIN);
342*4882a593Smuzhiyun ether3_outw(priv(dev)->rx_head, REG_RECVPTR);
343*4882a593Smuzhiyun ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND);
344*4882a593Smuzhiyun ether3_outw(0, REG_TRANSMITPTR);
345*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config2, REG_CONFIG2);
346*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_write, 0);
349*4882a593Smuzhiyun ether3_writelong(dev, 0);
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun priv(dev)->regs.command = CMD_ENINTRX | CMD_ENINTTX;
352*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.command | CMD_RXON, REG_COMMAND);
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun static inline int
ether3_probe_bus_8(struct net_device * dev,int val)356*4882a593Smuzhiyun ether3_probe_bus_8(struct net_device *dev, int val)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun int write_low, write_high, read_low, read_high;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun write_low = val & 255;
361*4882a593Smuzhiyun write_high = val >> 8;
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun printk(KERN_DEBUG "ether3_probe: write8 [%02X:%02X]", write_high, write_low);
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun ether3_outb(write_low, REG_RECVPTR);
366*4882a593Smuzhiyun ether3_outb(write_high, REG_RECVPTR + 4);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun read_low = ether3_inb(REG_RECVPTR);
369*4882a593Smuzhiyun read_high = ether3_inb(REG_RECVPTR + 4);
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun printk(", read8 [%02X:%02X]\n", read_high, read_low);
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun return read_low == write_low && read_high == write_high;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun static inline int
ether3_probe_bus_16(struct net_device * dev,int val)377*4882a593Smuzhiyun ether3_probe_bus_16(struct net_device *dev, int val)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun int read_val;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun ether3_outw(val, REG_RECVPTR);
382*4882a593Smuzhiyun read_val = ether3_inw(REG_RECVPTR);
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun printk(KERN_DEBUG "ether3_probe: write16 [%04X], read16 [%04X]\n", val, read_val);
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun return read_val == val;
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /*
390*4882a593Smuzhiyun * Open/initialize the board. This is called (in the current kernel)
391*4882a593Smuzhiyun * sometime after booting when the 'ifconfig' program is run.
392*4882a593Smuzhiyun *
393*4882a593Smuzhiyun * This routine should set everything up anew at each open, even
394*4882a593Smuzhiyun * registers that "should" only need to be set once at boot, so that
395*4882a593Smuzhiyun * there is non-reboot way to recover if something goes wrong.
396*4882a593Smuzhiyun */
397*4882a593Smuzhiyun static int
ether3_open(struct net_device * dev)398*4882a593Smuzhiyun ether3_open(struct net_device *dev)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun if (request_irq(dev->irq, ether3_interrupt, 0, "ether3", dev))
401*4882a593Smuzhiyun return -EAGAIN;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun ether3_init_for_open(dev);
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun netif_start_queue(dev);
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun return 0;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun /*
411*4882a593Smuzhiyun * The inverse routine to ether3_open().
412*4882a593Smuzhiyun */
413*4882a593Smuzhiyun static int
ether3_close(struct net_device * dev)414*4882a593Smuzhiyun ether3_close(struct net_device *dev)
415*4882a593Smuzhiyun {
416*4882a593Smuzhiyun netif_stop_queue(dev);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun disable_irq(dev->irq);
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND);
421*4882a593Smuzhiyun priv(dev)->regs.command = 0;
422*4882a593Smuzhiyun while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON))
423*4882a593Smuzhiyun barrier();
424*4882a593Smuzhiyun ether3_outb(0x80, REG_CONFIG2 + 4);
425*4882a593Smuzhiyun ether3_outw(0, REG_COMMAND);
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun free_irq(dev->irq, dev);
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun return 0;
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun /*
433*4882a593Smuzhiyun * Set or clear promiscuous/multicast mode filter for this adaptor.
434*4882a593Smuzhiyun *
435*4882a593Smuzhiyun * We don't attempt any packet filtering. The card may have a SEEQ 8004
436*4882a593Smuzhiyun * in which does not have the other ethernet address registers present...
437*4882a593Smuzhiyun */
ether3_setmulticastlist(struct net_device * dev)438*4882a593Smuzhiyun static void ether3_setmulticastlist(struct net_device *dev)
439*4882a593Smuzhiyun {
440*4882a593Smuzhiyun priv(dev)->regs.config1 &= ~CFG1_RECVPROMISC;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun if (dev->flags & IFF_PROMISC) {
443*4882a593Smuzhiyun /* promiscuous mode */
444*4882a593Smuzhiyun priv(dev)->regs.config1 |= CFG1_RECVPROMISC;
445*4882a593Smuzhiyun } else if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
446*4882a593Smuzhiyun priv(dev)->regs.config1 |= CFG1_RECVSPECBRMULTI;
447*4882a593Smuzhiyun } else
448*4882a593Smuzhiyun priv(dev)->regs.config1 |= CFG1_RECVSPECBROAD;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun
ether3_timeout(struct net_device * dev,unsigned int txqueue)453*4882a593Smuzhiyun static void ether3_timeout(struct net_device *dev, unsigned int txqueue)
454*4882a593Smuzhiyun {
455*4882a593Smuzhiyun unsigned long flags;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun del_timer(&priv(dev)->timer);
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun local_irq_save(flags);
460*4882a593Smuzhiyun printk(KERN_ERR "%s: transmit timed out, network cable problem?\n", dev->name);
461*4882a593Smuzhiyun printk(KERN_ERR "%s: state: { status=%04X cfg1=%04X cfg2=%04X }\n", dev->name,
462*4882a593Smuzhiyun ether3_inw(REG_STATUS), ether3_inw(REG_CONFIG1), ether3_inw(REG_CONFIG2));
463*4882a593Smuzhiyun printk(KERN_ERR "%s: { rpr=%04X rea=%04X tpr=%04X }\n", dev->name,
464*4882a593Smuzhiyun ether3_inw(REG_RECVPTR), ether3_inw(REG_RECVEND), ether3_inw(REG_TRANSMITPTR));
465*4882a593Smuzhiyun printk(KERN_ERR "%s: tx head=%X tx tail=%X\n", dev->name,
466*4882a593Smuzhiyun priv(dev)->tx_head, priv(dev)->tx_tail);
467*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_read, priv(dev)->tx_tail);
468*4882a593Smuzhiyun printk(KERN_ERR "%s: packet status = %08X\n", dev->name, ether3_readlong(dev));
469*4882a593Smuzhiyun local_irq_restore(flags);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun priv(dev)->regs.config2 |= CFG2_CTRLO;
472*4882a593Smuzhiyun dev->stats.tx_errors += 1;
473*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.config2, REG_CONFIG2);
474*4882a593Smuzhiyun priv(dev)->tx_head = priv(dev)->tx_tail = 0;
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun netif_wake_queue(dev);
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun /*
480*4882a593Smuzhiyun * Transmit a packet
481*4882a593Smuzhiyun */
482*4882a593Smuzhiyun static netdev_tx_t
ether3_sendpacket(struct sk_buff * skb,struct net_device * dev)483*4882a593Smuzhiyun ether3_sendpacket(struct sk_buff *skb, struct net_device *dev)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun unsigned long flags;
486*4882a593Smuzhiyun unsigned int length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
487*4882a593Smuzhiyun unsigned int ptr, next_ptr;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun if (priv(dev)->broken) {
490*4882a593Smuzhiyun dev_kfree_skb(skb);
491*4882a593Smuzhiyun dev->stats.tx_dropped++;
492*4882a593Smuzhiyun netif_start_queue(dev);
493*4882a593Smuzhiyun return NETDEV_TX_OK;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun length = (length + 1) & ~1;
497*4882a593Smuzhiyun if (length != skb->len) {
498*4882a593Smuzhiyun if (skb_padto(skb, length))
499*4882a593Smuzhiyun goto out;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun next_ptr = (priv(dev)->tx_head + 1) & 15;
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun local_irq_save(flags);
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun if (priv(dev)->tx_tail == next_ptr) {
507*4882a593Smuzhiyun local_irq_restore(flags);
508*4882a593Smuzhiyun return NETDEV_TX_BUSY; /* unable to queue */
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun ptr = 0x600 * priv(dev)->tx_head;
512*4882a593Smuzhiyun priv(dev)->tx_head = next_ptr;
513*4882a593Smuzhiyun next_ptr *= 0x600;
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun #define TXHDR_FLAGS (TXHDR_TRANSMIT|TXHDR_CHAINCONTINUE|TXHDR_DATAFOLLOWS|TXHDR_ENSUCCESS)
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_write, next_ptr);
518*4882a593Smuzhiyun ether3_writelong(dev, 0);
519*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_write, ptr);
520*4882a593Smuzhiyun ether3_writelong(dev, 0);
521*4882a593Smuzhiyun ether3_writebuffer(dev, skb->data, length);
522*4882a593Smuzhiyun ether3_writeword(dev, htons(next_ptr));
523*4882a593Smuzhiyun ether3_writeword(dev, TXHDR_CHAINCONTINUE >> 16);
524*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_write, ptr);
525*4882a593Smuzhiyun ether3_writeword(dev, htons((ptr + length + 4)));
526*4882a593Smuzhiyun ether3_writeword(dev, TXHDR_FLAGS >> 16);
527*4882a593Smuzhiyun ether3_ledon(dev);
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun if (!(ether3_inw(REG_STATUS) & STAT_TXON)) {
530*4882a593Smuzhiyun ether3_outw(ptr, REG_TRANSMITPTR);
531*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.command | CMD_TXON, REG_COMMAND);
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun next_ptr = (priv(dev)->tx_head + 1) & 15;
535*4882a593Smuzhiyun local_irq_restore(flags);
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun dev_kfree_skb(skb);
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun if (priv(dev)->tx_tail == next_ptr)
540*4882a593Smuzhiyun netif_stop_queue(dev);
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun out:
543*4882a593Smuzhiyun return NETDEV_TX_OK;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun static irqreturn_t
ether3_interrupt(int irq,void * dev_id)547*4882a593Smuzhiyun ether3_interrupt(int irq, void *dev_id)
548*4882a593Smuzhiyun {
549*4882a593Smuzhiyun struct net_device *dev = (struct net_device *)dev_id;
550*4882a593Smuzhiyun unsigned int status, handled = IRQ_NONE;
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun #if NET_DEBUG > 1
553*4882a593Smuzhiyun if(net_debug & DEBUG_INT)
554*4882a593Smuzhiyun printk("eth3irq: %d ", irq);
555*4882a593Smuzhiyun #endif
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun status = ether3_inw(REG_STATUS);
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun if (status & STAT_INTRX) {
560*4882a593Smuzhiyun ether3_outw(CMD_ACKINTRX | priv(dev)->regs.command, REG_COMMAND);
561*4882a593Smuzhiyun ether3_rx(dev, 12);
562*4882a593Smuzhiyun handled = IRQ_HANDLED;
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun if (status & STAT_INTTX) {
566*4882a593Smuzhiyun ether3_outw(CMD_ACKINTTX | priv(dev)->regs.command, REG_COMMAND);
567*4882a593Smuzhiyun ether3_tx(dev);
568*4882a593Smuzhiyun handled = IRQ_HANDLED;
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun #if NET_DEBUG > 1
572*4882a593Smuzhiyun if(net_debug & DEBUG_INT)
573*4882a593Smuzhiyun printk("done\n");
574*4882a593Smuzhiyun #endif
575*4882a593Smuzhiyun return handled;
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun /*
579*4882a593Smuzhiyun * If we have a good packet(s), get it/them out of the buffers.
580*4882a593Smuzhiyun */
ether3_rx(struct net_device * dev,unsigned int maxcnt)581*4882a593Smuzhiyun static int ether3_rx(struct net_device *dev, unsigned int maxcnt)
582*4882a593Smuzhiyun {
583*4882a593Smuzhiyun unsigned int next_ptr = priv(dev)->rx_head, received = 0;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun ether3_ledon(dev);
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun do {
588*4882a593Smuzhiyun unsigned int this_ptr, status;
589*4882a593Smuzhiyun unsigned char addrs[16];
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun /*
592*4882a593Smuzhiyun * read the first 16 bytes from the buffer.
593*4882a593Smuzhiyun * This contains the status bytes etc and ethernet addresses,
594*4882a593Smuzhiyun * and we also check the source ethernet address to see if
595*4882a593Smuzhiyun * it originated from us.
596*4882a593Smuzhiyun */
597*4882a593Smuzhiyun {
598*4882a593Smuzhiyun unsigned int temp_ptr;
599*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_read, next_ptr);
600*4882a593Smuzhiyun temp_ptr = ether3_readword(dev);
601*4882a593Smuzhiyun status = ether3_readword(dev);
602*4882a593Smuzhiyun if ((status & (RXSTAT_DONE | RXHDR_CHAINCONTINUE | RXHDR_RECEIVE)) !=
603*4882a593Smuzhiyun (RXSTAT_DONE | RXHDR_CHAINCONTINUE) || !temp_ptr)
604*4882a593Smuzhiyun break;
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun this_ptr = next_ptr + 4;
607*4882a593Smuzhiyun next_ptr = ntohs(temp_ptr);
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_read, this_ptr);
610*4882a593Smuzhiyun ether3_readbuffer(dev, addrs+2, 12);
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun if (next_ptr < RX_START || next_ptr >= RX_END) {
613*4882a593Smuzhiyun printk("%s: bad next pointer @%04X: ", dev->name, priv(dev)->rx_head);
614*4882a593Smuzhiyun printk("%02X %02X %02X %02X ", next_ptr >> 8, next_ptr & 255, status & 255, status >> 8);
615*4882a593Smuzhiyun printk("%pM %pM\n", addrs + 2, addrs + 8);
616*4882a593Smuzhiyun next_ptr = priv(dev)->rx_head;
617*4882a593Smuzhiyun break;
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun /*
620*4882a593Smuzhiyun * ignore our own packets...
621*4882a593Smuzhiyun */
622*4882a593Smuzhiyun if (!(*(unsigned long *)&dev->dev_addr[0] ^ *(unsigned long *)&addrs[2+6]) &&
623*4882a593Smuzhiyun !(*(unsigned short *)&dev->dev_addr[4] ^ *(unsigned short *)&addrs[2+10])) {
624*4882a593Smuzhiyun maxcnt ++; /* compensate for loopedback packet */
625*4882a593Smuzhiyun ether3_outw(next_ptr >> 8, REG_RECVEND);
626*4882a593Smuzhiyun } else
627*4882a593Smuzhiyun if (!(status & (RXSTAT_OVERSIZE|RXSTAT_CRCERROR|RXSTAT_DRIBBLEERROR|RXSTAT_SHORTPACKET))) {
628*4882a593Smuzhiyun unsigned int length = next_ptr - this_ptr;
629*4882a593Smuzhiyun struct sk_buff *skb;
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun if (next_ptr <= this_ptr)
632*4882a593Smuzhiyun length += RX_END - RX_START;
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun skb = netdev_alloc_skb(dev, length + 2);
635*4882a593Smuzhiyun if (skb) {
636*4882a593Smuzhiyun unsigned char *buf;
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun skb_reserve(skb, 2);
639*4882a593Smuzhiyun buf = skb_put(skb, length);
640*4882a593Smuzhiyun ether3_readbuffer(dev, buf + 12, length - 12);
641*4882a593Smuzhiyun ether3_outw(next_ptr >> 8, REG_RECVEND);
642*4882a593Smuzhiyun *(unsigned short *)(buf + 0) = *(unsigned short *)(addrs + 2);
643*4882a593Smuzhiyun *(unsigned long *)(buf + 2) = *(unsigned long *)(addrs + 4);
644*4882a593Smuzhiyun *(unsigned long *)(buf + 6) = *(unsigned long *)(addrs + 8);
645*4882a593Smuzhiyun *(unsigned short *)(buf + 10) = *(unsigned short *)(addrs + 12);
646*4882a593Smuzhiyun skb->protocol = eth_type_trans(skb, dev);
647*4882a593Smuzhiyun netif_rx(skb);
648*4882a593Smuzhiyun received ++;
649*4882a593Smuzhiyun } else {
650*4882a593Smuzhiyun ether3_outw(next_ptr >> 8, REG_RECVEND);
651*4882a593Smuzhiyun dev->stats.rx_dropped++;
652*4882a593Smuzhiyun goto done;
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun } else {
655*4882a593Smuzhiyun struct net_device_stats *stats = &dev->stats;
656*4882a593Smuzhiyun ether3_outw(next_ptr >> 8, REG_RECVEND);
657*4882a593Smuzhiyun if (status & RXSTAT_OVERSIZE) stats->rx_over_errors ++;
658*4882a593Smuzhiyun if (status & RXSTAT_CRCERROR) stats->rx_crc_errors ++;
659*4882a593Smuzhiyun if (status & RXSTAT_DRIBBLEERROR) stats->rx_fifo_errors ++;
660*4882a593Smuzhiyun if (status & RXSTAT_SHORTPACKET) stats->rx_length_errors ++;
661*4882a593Smuzhiyun stats->rx_errors++;
662*4882a593Smuzhiyun }
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun while (-- maxcnt);
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun done:
667*4882a593Smuzhiyun dev->stats.rx_packets += received;
668*4882a593Smuzhiyun priv(dev)->rx_head = next_ptr;
669*4882a593Smuzhiyun /*
670*4882a593Smuzhiyun * If rx went off line, then that means that the buffer may be full. We
671*4882a593Smuzhiyun * have dropped at least one packet.
672*4882a593Smuzhiyun */
673*4882a593Smuzhiyun if (!(ether3_inw(REG_STATUS) & STAT_RXON)) {
674*4882a593Smuzhiyun dev->stats.rx_dropped++;
675*4882a593Smuzhiyun ether3_outw(next_ptr, REG_RECVPTR);
676*4882a593Smuzhiyun ether3_outw(priv(dev)->regs.command | CMD_RXON, REG_COMMAND);
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun return maxcnt;
680*4882a593Smuzhiyun }
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun /*
683*4882a593Smuzhiyun * Update stats for the transmitted packet(s)
684*4882a593Smuzhiyun */
ether3_tx(struct net_device * dev)685*4882a593Smuzhiyun static void ether3_tx(struct net_device *dev)
686*4882a593Smuzhiyun {
687*4882a593Smuzhiyun unsigned int tx_tail = priv(dev)->tx_tail;
688*4882a593Smuzhiyun int max_work = 14;
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun do {
691*4882a593Smuzhiyun unsigned long status;
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun /*
694*4882a593Smuzhiyun * Read the packet header
695*4882a593Smuzhiyun */
696*4882a593Smuzhiyun ether3_setbuffer(dev, buffer_read, tx_tail * 0x600);
697*4882a593Smuzhiyun status = ether3_readlong(dev);
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun /*
700*4882a593Smuzhiyun * Check to see if this packet has been transmitted
701*4882a593Smuzhiyun */
702*4882a593Smuzhiyun if ((status & (TXSTAT_DONE | TXHDR_TRANSMIT)) !=
703*4882a593Smuzhiyun (TXSTAT_DONE | TXHDR_TRANSMIT))
704*4882a593Smuzhiyun break;
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun /*
707*4882a593Smuzhiyun * Update errors
708*4882a593Smuzhiyun */
709*4882a593Smuzhiyun if (!(status & (TXSTAT_BABBLED | TXSTAT_16COLLISIONS)))
710*4882a593Smuzhiyun dev->stats.tx_packets++;
711*4882a593Smuzhiyun else {
712*4882a593Smuzhiyun dev->stats.tx_errors++;
713*4882a593Smuzhiyun if (status & TXSTAT_16COLLISIONS)
714*4882a593Smuzhiyun dev->stats.collisions += 16;
715*4882a593Smuzhiyun if (status & TXSTAT_BABBLED)
716*4882a593Smuzhiyun dev->stats.tx_fifo_errors++;
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun tx_tail = (tx_tail + 1) & 15;
720*4882a593Smuzhiyun } while (--max_work);
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun if (priv(dev)->tx_tail != tx_tail) {
723*4882a593Smuzhiyun priv(dev)->tx_tail = tx_tail;
724*4882a593Smuzhiyun netif_wake_queue(dev);
725*4882a593Smuzhiyun }
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun
ether3_banner(void)728*4882a593Smuzhiyun static void ether3_banner(void)
729*4882a593Smuzhiyun {
730*4882a593Smuzhiyun static unsigned version_printed = 0;
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun if (net_debug && version_printed++ == 0)
733*4882a593Smuzhiyun printk(KERN_INFO "%s", version);
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun static const struct net_device_ops ether3_netdev_ops = {
737*4882a593Smuzhiyun .ndo_open = ether3_open,
738*4882a593Smuzhiyun .ndo_stop = ether3_close,
739*4882a593Smuzhiyun .ndo_start_xmit = ether3_sendpacket,
740*4882a593Smuzhiyun .ndo_set_rx_mode = ether3_setmulticastlist,
741*4882a593Smuzhiyun .ndo_tx_timeout = ether3_timeout,
742*4882a593Smuzhiyun .ndo_validate_addr = eth_validate_addr,
743*4882a593Smuzhiyun .ndo_set_mac_address = eth_mac_addr,
744*4882a593Smuzhiyun };
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun static int
ether3_probe(struct expansion_card * ec,const struct ecard_id * id)747*4882a593Smuzhiyun ether3_probe(struct expansion_card *ec, const struct ecard_id *id)
748*4882a593Smuzhiyun {
749*4882a593Smuzhiyun const struct ether3_data *data = id->data;
750*4882a593Smuzhiyun struct net_device *dev;
751*4882a593Smuzhiyun int bus_type, ret;
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun ether3_banner();
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun ret = ecard_request_resources(ec);
756*4882a593Smuzhiyun if (ret)
757*4882a593Smuzhiyun goto out;
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun dev = alloc_etherdev(sizeof(struct dev_priv));
760*4882a593Smuzhiyun if (!dev) {
761*4882a593Smuzhiyun ret = -ENOMEM;
762*4882a593Smuzhiyun goto release;
763*4882a593Smuzhiyun }
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun SET_NETDEV_DEV(dev, &ec->dev);
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun priv(dev)->base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
768*4882a593Smuzhiyun if (!priv(dev)->base) {
769*4882a593Smuzhiyun ret = -ENOMEM;
770*4882a593Smuzhiyun goto free;
771*4882a593Smuzhiyun }
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun ec->irqaddr = priv(dev)->base + data->base_offset;
774*4882a593Smuzhiyun ec->irqmask = 0xf0;
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun priv(dev)->seeq = priv(dev)->base + data->base_offset;
777*4882a593Smuzhiyun dev->irq = ec->irq;
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun ether3_addr(dev->dev_addr, ec);
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun priv(dev)->dev = dev;
782*4882a593Smuzhiyun timer_setup(&priv(dev)->timer, ether3_ledoff, 0);
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun /* Reset card...
785*4882a593Smuzhiyun */
786*4882a593Smuzhiyun ether3_outb(0x80, REG_CONFIG2 + 4);
787*4882a593Smuzhiyun bus_type = BUS_UNKNOWN;
788*4882a593Smuzhiyun udelay(4);
789*4882a593Smuzhiyun
790*4882a593Smuzhiyun /* Test using Receive Pointer (16-bit register) to find out
791*4882a593Smuzhiyun * how the ether3 is connected to the bus...
792*4882a593Smuzhiyun */
793*4882a593Smuzhiyun if (ether3_probe_bus_8(dev, 0x100) &&
794*4882a593Smuzhiyun ether3_probe_bus_8(dev, 0x201))
795*4882a593Smuzhiyun bus_type = BUS_8;
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun if (bus_type == BUS_UNKNOWN &&
798*4882a593Smuzhiyun ether3_probe_bus_16(dev, 0x101) &&
799*4882a593Smuzhiyun ether3_probe_bus_16(dev, 0x201))
800*4882a593Smuzhiyun bus_type = BUS_16;
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun switch (bus_type) {
803*4882a593Smuzhiyun case BUS_UNKNOWN:
804*4882a593Smuzhiyun printk(KERN_ERR "%s: unable to identify bus width\n", dev->name);
805*4882a593Smuzhiyun ret = -ENODEV;
806*4882a593Smuzhiyun goto free;
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun case BUS_8:
809*4882a593Smuzhiyun printk(KERN_ERR "%s: %s found, but is an unsupported "
810*4882a593Smuzhiyun "8-bit card\n", dev->name, data->name);
811*4882a593Smuzhiyun ret = -ENODEV;
812*4882a593Smuzhiyun goto free;
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun default:
815*4882a593Smuzhiyun break;
816*4882a593Smuzhiyun }
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun if (ether3_init_2(dev)) {
819*4882a593Smuzhiyun ret = -ENODEV;
820*4882a593Smuzhiyun goto free;
821*4882a593Smuzhiyun }
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun dev->netdev_ops = ðer3_netdev_ops;
824*4882a593Smuzhiyun dev->watchdog_timeo = 5 * HZ / 100;
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun ret = register_netdev(dev);
827*4882a593Smuzhiyun if (ret)
828*4882a593Smuzhiyun goto free;
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun printk("%s: %s in slot %d, %pM\n",
831*4882a593Smuzhiyun dev->name, data->name, ec->slot_no, dev->dev_addr);
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun ecard_set_drvdata(ec, dev);
834*4882a593Smuzhiyun return 0;
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun free:
837*4882a593Smuzhiyun free_netdev(dev);
838*4882a593Smuzhiyun release:
839*4882a593Smuzhiyun ecard_release_resources(ec);
840*4882a593Smuzhiyun out:
841*4882a593Smuzhiyun return ret;
842*4882a593Smuzhiyun }
843*4882a593Smuzhiyun
ether3_remove(struct expansion_card * ec)844*4882a593Smuzhiyun static void ether3_remove(struct expansion_card *ec)
845*4882a593Smuzhiyun {
846*4882a593Smuzhiyun struct net_device *dev = ecard_get_drvdata(ec);
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun ecard_set_drvdata(ec, NULL);
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun unregister_netdev(dev);
851*4882a593Smuzhiyun free_netdev(dev);
852*4882a593Smuzhiyun ecard_release_resources(ec);
853*4882a593Smuzhiyun }
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun static struct ether3_data ether3 = {
856*4882a593Smuzhiyun .name = "ether3",
857*4882a593Smuzhiyun .base_offset = 0,
858*4882a593Smuzhiyun };
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun static struct ether3_data etherb = {
861*4882a593Smuzhiyun .name = "etherb",
862*4882a593Smuzhiyun .base_offset = 0x800,
863*4882a593Smuzhiyun };
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun static const struct ecard_id ether3_ids[] = {
866*4882a593Smuzhiyun { MANU_ANT2, PROD_ANT_ETHER3, ðer3 },
867*4882a593Smuzhiyun { MANU_ANT, PROD_ANT_ETHER3, ðer3 },
868*4882a593Smuzhiyun { MANU_ANT, PROD_ANT_ETHERB, ðerb },
869*4882a593Smuzhiyun { 0xffff, 0xffff }
870*4882a593Smuzhiyun };
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun static struct ecard_driver ether3_driver = {
873*4882a593Smuzhiyun .probe = ether3_probe,
874*4882a593Smuzhiyun .remove = ether3_remove,
875*4882a593Smuzhiyun .id_table = ether3_ids,
876*4882a593Smuzhiyun .drv = {
877*4882a593Smuzhiyun .name = "ether3",
878*4882a593Smuzhiyun },
879*4882a593Smuzhiyun };
880*4882a593Smuzhiyun
ether3_init(void)881*4882a593Smuzhiyun static int __init ether3_init(void)
882*4882a593Smuzhiyun {
883*4882a593Smuzhiyun return ecard_register_driver(ðer3_driver);
884*4882a593Smuzhiyun }
885*4882a593Smuzhiyun
ether3_exit(void)886*4882a593Smuzhiyun static void __exit ether3_exit(void)
887*4882a593Smuzhiyun {
888*4882a593Smuzhiyun ecard_remove_driver(ðer3_driver);
889*4882a593Smuzhiyun }
890*4882a593Smuzhiyun
891*4882a593Smuzhiyun module_init(ether3_init);
892*4882a593Smuzhiyun module_exit(ether3_exit);
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun MODULE_LICENSE("GPL");
895