1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* 10G controller driver for Samsung SoCs
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2013 Samsung Electronics Co., Ltd.
5*4882a593Smuzhiyun * http://www.samsung.com
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Siva Reddy Kallam <siva.kallam@samsung.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/clk.h>
13*4882a593Smuzhiyun #include <linux/interrupt.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/netdevice.h>
16*4882a593Smuzhiyun #include <linux/net_tstamp.h>
17*4882a593Smuzhiyun #include <linux/phy.h>
18*4882a593Smuzhiyun #include <linux/ptp_clock_kernel.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include "sxgbe_common.h"
21*4882a593Smuzhiyun #include "sxgbe_reg.h"
22*4882a593Smuzhiyun #include "sxgbe_dma.h"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun struct sxgbe_stats {
25*4882a593Smuzhiyun char stat_string[ETH_GSTRING_LEN];
26*4882a593Smuzhiyun int sizeof_stat;
27*4882a593Smuzhiyun int stat_offset;
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define SXGBE_STAT(m) \
31*4882a593Smuzhiyun { \
32*4882a593Smuzhiyun #m, \
33*4882a593Smuzhiyun sizeof_field(struct sxgbe_extra_stats, m), \
34*4882a593Smuzhiyun offsetof(struct sxgbe_priv_data, xstats.m) \
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static const struct sxgbe_stats sxgbe_gstrings_stats[] = {
38*4882a593Smuzhiyun /* TX/RX IRQ events */
39*4882a593Smuzhiyun SXGBE_STAT(tx_process_stopped_irq),
40*4882a593Smuzhiyun SXGBE_STAT(tx_ctxt_desc_err),
41*4882a593Smuzhiyun SXGBE_STAT(tx_threshold),
42*4882a593Smuzhiyun SXGBE_STAT(rx_threshold),
43*4882a593Smuzhiyun SXGBE_STAT(tx_pkt_n),
44*4882a593Smuzhiyun SXGBE_STAT(rx_pkt_n),
45*4882a593Smuzhiyun SXGBE_STAT(normal_irq_n),
46*4882a593Smuzhiyun SXGBE_STAT(tx_normal_irq_n),
47*4882a593Smuzhiyun SXGBE_STAT(rx_normal_irq_n),
48*4882a593Smuzhiyun SXGBE_STAT(napi_poll),
49*4882a593Smuzhiyun SXGBE_STAT(tx_clean),
50*4882a593Smuzhiyun SXGBE_STAT(tx_reset_ic_bit),
51*4882a593Smuzhiyun SXGBE_STAT(rx_process_stopped_irq),
52*4882a593Smuzhiyun SXGBE_STAT(rx_underflow_irq),
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* Bus access errors */
55*4882a593Smuzhiyun SXGBE_STAT(fatal_bus_error_irq),
56*4882a593Smuzhiyun SXGBE_STAT(tx_read_transfer_err),
57*4882a593Smuzhiyun SXGBE_STAT(tx_write_transfer_err),
58*4882a593Smuzhiyun SXGBE_STAT(tx_desc_access_err),
59*4882a593Smuzhiyun SXGBE_STAT(tx_buffer_access_err),
60*4882a593Smuzhiyun SXGBE_STAT(tx_data_transfer_err),
61*4882a593Smuzhiyun SXGBE_STAT(rx_read_transfer_err),
62*4882a593Smuzhiyun SXGBE_STAT(rx_write_transfer_err),
63*4882a593Smuzhiyun SXGBE_STAT(rx_desc_access_err),
64*4882a593Smuzhiyun SXGBE_STAT(rx_buffer_access_err),
65*4882a593Smuzhiyun SXGBE_STAT(rx_data_transfer_err),
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* EEE-LPI stats */
68*4882a593Smuzhiyun SXGBE_STAT(tx_lpi_entry_n),
69*4882a593Smuzhiyun SXGBE_STAT(tx_lpi_exit_n),
70*4882a593Smuzhiyun SXGBE_STAT(rx_lpi_entry_n),
71*4882a593Smuzhiyun SXGBE_STAT(rx_lpi_exit_n),
72*4882a593Smuzhiyun SXGBE_STAT(eee_wakeup_error_n),
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* RX specific */
75*4882a593Smuzhiyun /* L2 error */
76*4882a593Smuzhiyun SXGBE_STAT(rx_code_gmii_err),
77*4882a593Smuzhiyun SXGBE_STAT(rx_watchdog_err),
78*4882a593Smuzhiyun SXGBE_STAT(rx_crc_err),
79*4882a593Smuzhiyun SXGBE_STAT(rx_gaint_pkt_err),
80*4882a593Smuzhiyun SXGBE_STAT(ip_hdr_err),
81*4882a593Smuzhiyun SXGBE_STAT(ip_payload_err),
82*4882a593Smuzhiyun SXGBE_STAT(overflow_error),
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* L2 Pkt type */
85*4882a593Smuzhiyun SXGBE_STAT(len_pkt),
86*4882a593Smuzhiyun SXGBE_STAT(mac_ctl_pkt),
87*4882a593Smuzhiyun SXGBE_STAT(dcb_ctl_pkt),
88*4882a593Smuzhiyun SXGBE_STAT(arp_pkt),
89*4882a593Smuzhiyun SXGBE_STAT(oam_pkt),
90*4882a593Smuzhiyun SXGBE_STAT(untag_okt),
91*4882a593Smuzhiyun SXGBE_STAT(other_pkt),
92*4882a593Smuzhiyun SXGBE_STAT(svlan_tag_pkt),
93*4882a593Smuzhiyun SXGBE_STAT(cvlan_tag_pkt),
94*4882a593Smuzhiyun SXGBE_STAT(dvlan_ocvlan_icvlan_pkt),
95*4882a593Smuzhiyun SXGBE_STAT(dvlan_osvlan_isvlan_pkt),
96*4882a593Smuzhiyun SXGBE_STAT(dvlan_osvlan_icvlan_pkt),
97*4882a593Smuzhiyun SXGBE_STAT(dvan_ocvlan_icvlan_pkt),
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* L3/L4 Pkt type */
100*4882a593Smuzhiyun SXGBE_STAT(not_ip_pkt),
101*4882a593Smuzhiyun SXGBE_STAT(ip4_tcp_pkt),
102*4882a593Smuzhiyun SXGBE_STAT(ip4_udp_pkt),
103*4882a593Smuzhiyun SXGBE_STAT(ip4_icmp_pkt),
104*4882a593Smuzhiyun SXGBE_STAT(ip4_unknown_pkt),
105*4882a593Smuzhiyun SXGBE_STAT(ip6_tcp_pkt),
106*4882a593Smuzhiyun SXGBE_STAT(ip6_udp_pkt),
107*4882a593Smuzhiyun SXGBE_STAT(ip6_icmp_pkt),
108*4882a593Smuzhiyun SXGBE_STAT(ip6_unknown_pkt),
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /* Filter specific */
111*4882a593Smuzhiyun SXGBE_STAT(vlan_filter_match),
112*4882a593Smuzhiyun SXGBE_STAT(sa_filter_fail),
113*4882a593Smuzhiyun SXGBE_STAT(da_filter_fail),
114*4882a593Smuzhiyun SXGBE_STAT(hash_filter_pass),
115*4882a593Smuzhiyun SXGBE_STAT(l3_filter_match),
116*4882a593Smuzhiyun SXGBE_STAT(l4_filter_match),
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /* RX context specific */
119*4882a593Smuzhiyun SXGBE_STAT(timestamp_dropped),
120*4882a593Smuzhiyun SXGBE_STAT(rx_msg_type_no_ptp),
121*4882a593Smuzhiyun SXGBE_STAT(rx_ptp_type_sync),
122*4882a593Smuzhiyun SXGBE_STAT(rx_ptp_type_follow_up),
123*4882a593Smuzhiyun SXGBE_STAT(rx_ptp_type_delay_req),
124*4882a593Smuzhiyun SXGBE_STAT(rx_ptp_type_delay_resp),
125*4882a593Smuzhiyun SXGBE_STAT(rx_ptp_type_pdelay_req),
126*4882a593Smuzhiyun SXGBE_STAT(rx_ptp_type_pdelay_resp),
127*4882a593Smuzhiyun SXGBE_STAT(rx_ptp_type_pdelay_follow_up),
128*4882a593Smuzhiyun SXGBE_STAT(rx_ptp_announce),
129*4882a593Smuzhiyun SXGBE_STAT(rx_ptp_mgmt),
130*4882a593Smuzhiyun SXGBE_STAT(rx_ptp_signal),
131*4882a593Smuzhiyun SXGBE_STAT(rx_ptp_resv_msg_type),
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun #define SXGBE_STATS_LEN ARRAY_SIZE(sxgbe_gstrings_stats)
134*4882a593Smuzhiyun
sxgbe_get_eee(struct net_device * dev,struct ethtool_eee * edata)135*4882a593Smuzhiyun static int sxgbe_get_eee(struct net_device *dev,
136*4882a593Smuzhiyun struct ethtool_eee *edata)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun struct sxgbe_priv_data *priv = netdev_priv(dev);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun if (!priv->hw_cap.eee)
141*4882a593Smuzhiyun return -EOPNOTSUPP;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun edata->eee_enabled = priv->eee_enabled;
144*4882a593Smuzhiyun edata->eee_active = priv->eee_active;
145*4882a593Smuzhiyun edata->tx_lpi_timer = priv->tx_lpi_timer;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return phy_ethtool_get_eee(dev->phydev, edata);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
sxgbe_set_eee(struct net_device * dev,struct ethtool_eee * edata)150*4882a593Smuzhiyun static int sxgbe_set_eee(struct net_device *dev,
151*4882a593Smuzhiyun struct ethtool_eee *edata)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun struct sxgbe_priv_data *priv = netdev_priv(dev);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun priv->eee_enabled = edata->eee_enabled;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun if (!priv->eee_enabled) {
158*4882a593Smuzhiyun sxgbe_disable_eee_mode(priv);
159*4882a593Smuzhiyun } else {
160*4882a593Smuzhiyun /* We are asking for enabling the EEE but it is safe
161*4882a593Smuzhiyun * to verify all by invoking the eee_init function.
162*4882a593Smuzhiyun * In case of failure it will return an error.
163*4882a593Smuzhiyun */
164*4882a593Smuzhiyun priv->eee_enabled = sxgbe_eee_init(priv);
165*4882a593Smuzhiyun if (!priv->eee_enabled)
166*4882a593Smuzhiyun return -EOPNOTSUPP;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /* Do not change tx_lpi_timer in case of failure */
169*4882a593Smuzhiyun priv->tx_lpi_timer = edata->tx_lpi_timer;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun return phy_ethtool_set_eee(dev->phydev, edata);
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
sxgbe_getdrvinfo(struct net_device * dev,struct ethtool_drvinfo * info)175*4882a593Smuzhiyun static void sxgbe_getdrvinfo(struct net_device *dev,
176*4882a593Smuzhiyun struct ethtool_drvinfo *info)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
179*4882a593Smuzhiyun strlcpy(info->version, DRV_VERSION, sizeof(info->version));
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
sxgbe_getmsglevel(struct net_device * dev)182*4882a593Smuzhiyun static u32 sxgbe_getmsglevel(struct net_device *dev)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun struct sxgbe_priv_data *priv = netdev_priv(dev);
185*4882a593Smuzhiyun return priv->msg_enable;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
sxgbe_setmsglevel(struct net_device * dev,u32 level)188*4882a593Smuzhiyun static void sxgbe_setmsglevel(struct net_device *dev, u32 level)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun struct sxgbe_priv_data *priv = netdev_priv(dev);
191*4882a593Smuzhiyun priv->msg_enable = level;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
sxgbe_get_strings(struct net_device * dev,u32 stringset,u8 * data)194*4882a593Smuzhiyun static void sxgbe_get_strings(struct net_device *dev, u32 stringset, u8 *data)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun int i;
197*4882a593Smuzhiyun u8 *p = data;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun switch (stringset) {
200*4882a593Smuzhiyun case ETH_SS_STATS:
201*4882a593Smuzhiyun for (i = 0; i < SXGBE_STATS_LEN; i++) {
202*4882a593Smuzhiyun memcpy(p, sxgbe_gstrings_stats[i].stat_string,
203*4882a593Smuzhiyun ETH_GSTRING_LEN);
204*4882a593Smuzhiyun p += ETH_GSTRING_LEN;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun break;
207*4882a593Smuzhiyun default:
208*4882a593Smuzhiyun WARN_ON(1);
209*4882a593Smuzhiyun break;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
sxgbe_get_sset_count(struct net_device * netdev,int sset)213*4882a593Smuzhiyun static int sxgbe_get_sset_count(struct net_device *netdev, int sset)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun int len;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun switch (sset) {
218*4882a593Smuzhiyun case ETH_SS_STATS:
219*4882a593Smuzhiyun len = SXGBE_STATS_LEN;
220*4882a593Smuzhiyun return len;
221*4882a593Smuzhiyun default:
222*4882a593Smuzhiyun return -EINVAL;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
sxgbe_get_ethtool_stats(struct net_device * dev,struct ethtool_stats * dummy,u64 * data)226*4882a593Smuzhiyun static void sxgbe_get_ethtool_stats(struct net_device *dev,
227*4882a593Smuzhiyun struct ethtool_stats *dummy, u64 *data)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun struct sxgbe_priv_data *priv = netdev_priv(dev);
230*4882a593Smuzhiyun int i;
231*4882a593Smuzhiyun char *p;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun if (priv->eee_enabled) {
234*4882a593Smuzhiyun int val = phy_get_eee_err(dev->phydev);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun if (val)
237*4882a593Smuzhiyun priv->xstats.eee_wakeup_error_n = val;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun for (i = 0; i < SXGBE_STATS_LEN; i++) {
241*4882a593Smuzhiyun p = (char *)priv + sxgbe_gstrings_stats[i].stat_offset;
242*4882a593Smuzhiyun data[i] = (sxgbe_gstrings_stats[i].sizeof_stat == sizeof(u64))
243*4882a593Smuzhiyun ? (*(u64 *)p) : (*(u32 *)p);
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
sxgbe_get_channels(struct net_device * dev,struct ethtool_channels * channel)247*4882a593Smuzhiyun static void sxgbe_get_channels(struct net_device *dev,
248*4882a593Smuzhiyun struct ethtool_channels *channel)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun channel->max_rx = SXGBE_MAX_RX_CHANNELS;
251*4882a593Smuzhiyun channel->max_tx = SXGBE_MAX_TX_CHANNELS;
252*4882a593Smuzhiyun channel->rx_count = SXGBE_RX_QUEUES;
253*4882a593Smuzhiyun channel->tx_count = SXGBE_TX_QUEUES;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun
sxgbe_riwt2usec(u32 riwt,struct sxgbe_priv_data * priv)256*4882a593Smuzhiyun static u32 sxgbe_riwt2usec(u32 riwt, struct sxgbe_priv_data *priv)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun unsigned long clk = clk_get_rate(priv->sxgbe_clk);
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun if (!clk)
261*4882a593Smuzhiyun return 0;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun return (riwt * 256) / (clk / 1000000);
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
sxgbe_usec2riwt(u32 usec,struct sxgbe_priv_data * priv)266*4882a593Smuzhiyun static u32 sxgbe_usec2riwt(u32 usec, struct sxgbe_priv_data *priv)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun unsigned long clk = clk_get_rate(priv->sxgbe_clk);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun if (!clk)
271*4882a593Smuzhiyun return 0;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun return (usec * (clk / 1000000)) / 256;
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
sxgbe_get_coalesce(struct net_device * dev,struct ethtool_coalesce * ec)276*4882a593Smuzhiyun static int sxgbe_get_coalesce(struct net_device *dev,
277*4882a593Smuzhiyun struct ethtool_coalesce *ec)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun struct sxgbe_priv_data *priv = netdev_priv(dev);
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun if (priv->use_riwt)
282*4882a593Smuzhiyun ec->rx_coalesce_usecs = sxgbe_riwt2usec(priv->rx_riwt, priv);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun return 0;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
sxgbe_set_coalesce(struct net_device * dev,struct ethtool_coalesce * ec)287*4882a593Smuzhiyun static int sxgbe_set_coalesce(struct net_device *dev,
288*4882a593Smuzhiyun struct ethtool_coalesce *ec)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun struct sxgbe_priv_data *priv = netdev_priv(dev);
291*4882a593Smuzhiyun unsigned int rx_riwt;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun if (!ec->rx_coalesce_usecs)
294*4882a593Smuzhiyun return -EINVAL;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun rx_riwt = sxgbe_usec2riwt(ec->rx_coalesce_usecs, priv);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun if ((rx_riwt > SXGBE_MAX_DMA_RIWT) || (rx_riwt < SXGBE_MIN_DMA_RIWT))
299*4882a593Smuzhiyun return -EINVAL;
300*4882a593Smuzhiyun else if (!priv->use_riwt)
301*4882a593Smuzhiyun return -EOPNOTSUPP;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun priv->rx_riwt = rx_riwt;
304*4882a593Smuzhiyun priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun return 0;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
sxgbe_get_rss_hash_opts(struct sxgbe_priv_data * priv,struct ethtool_rxnfc * cmd)309*4882a593Smuzhiyun static int sxgbe_get_rss_hash_opts(struct sxgbe_priv_data *priv,
310*4882a593Smuzhiyun struct ethtool_rxnfc *cmd)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun cmd->data = 0;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun /* Report default options for RSS on sxgbe */
315*4882a593Smuzhiyun switch (cmd->flow_type) {
316*4882a593Smuzhiyun case TCP_V4_FLOW:
317*4882a593Smuzhiyun case UDP_V4_FLOW:
318*4882a593Smuzhiyun cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
319*4882a593Smuzhiyun fallthrough;
320*4882a593Smuzhiyun case SCTP_V4_FLOW:
321*4882a593Smuzhiyun case AH_ESP_V4_FLOW:
322*4882a593Smuzhiyun case AH_V4_FLOW:
323*4882a593Smuzhiyun case ESP_V4_FLOW:
324*4882a593Smuzhiyun case IPV4_FLOW:
325*4882a593Smuzhiyun cmd->data |= RXH_IP_SRC | RXH_IP_DST;
326*4882a593Smuzhiyun break;
327*4882a593Smuzhiyun case TCP_V6_FLOW:
328*4882a593Smuzhiyun case UDP_V6_FLOW:
329*4882a593Smuzhiyun cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
330*4882a593Smuzhiyun fallthrough;
331*4882a593Smuzhiyun case SCTP_V6_FLOW:
332*4882a593Smuzhiyun case AH_ESP_V6_FLOW:
333*4882a593Smuzhiyun case AH_V6_FLOW:
334*4882a593Smuzhiyun case ESP_V6_FLOW:
335*4882a593Smuzhiyun case IPV6_FLOW:
336*4882a593Smuzhiyun cmd->data |= RXH_IP_SRC | RXH_IP_DST;
337*4882a593Smuzhiyun break;
338*4882a593Smuzhiyun default:
339*4882a593Smuzhiyun return -EINVAL;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun return 0;
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun
sxgbe_get_rxnfc(struct net_device * dev,struct ethtool_rxnfc * cmd,u32 * rule_locs)345*4882a593Smuzhiyun static int sxgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
346*4882a593Smuzhiyun u32 *rule_locs)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun struct sxgbe_priv_data *priv = netdev_priv(dev);
349*4882a593Smuzhiyun int ret = -EOPNOTSUPP;
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun switch (cmd->cmd) {
352*4882a593Smuzhiyun case ETHTOOL_GRXFH:
353*4882a593Smuzhiyun ret = sxgbe_get_rss_hash_opts(priv, cmd);
354*4882a593Smuzhiyun break;
355*4882a593Smuzhiyun default:
356*4882a593Smuzhiyun break;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun return ret;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
sxgbe_set_rss_hash_opt(struct sxgbe_priv_data * priv,struct ethtool_rxnfc * cmd)362*4882a593Smuzhiyun static int sxgbe_set_rss_hash_opt(struct sxgbe_priv_data *priv,
363*4882a593Smuzhiyun struct ethtool_rxnfc *cmd)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun u32 reg_val = 0;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun /* RSS does not support anything other than hashing
368*4882a593Smuzhiyun * to queues on src and dst IPs and ports
369*4882a593Smuzhiyun */
370*4882a593Smuzhiyun if (cmd->data & ~(RXH_IP_SRC | RXH_IP_DST |
371*4882a593Smuzhiyun RXH_L4_B_0_1 | RXH_L4_B_2_3))
372*4882a593Smuzhiyun return -EINVAL;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun switch (cmd->flow_type) {
375*4882a593Smuzhiyun case TCP_V4_FLOW:
376*4882a593Smuzhiyun case TCP_V6_FLOW:
377*4882a593Smuzhiyun if (!(cmd->data & RXH_IP_SRC) ||
378*4882a593Smuzhiyun !(cmd->data & RXH_IP_DST) ||
379*4882a593Smuzhiyun !(cmd->data & RXH_L4_B_0_1) ||
380*4882a593Smuzhiyun !(cmd->data & RXH_L4_B_2_3))
381*4882a593Smuzhiyun return -EINVAL;
382*4882a593Smuzhiyun reg_val = SXGBE_CORE_RSS_CTL_TCP4TE;
383*4882a593Smuzhiyun break;
384*4882a593Smuzhiyun case UDP_V4_FLOW:
385*4882a593Smuzhiyun case UDP_V6_FLOW:
386*4882a593Smuzhiyun if (!(cmd->data & RXH_IP_SRC) ||
387*4882a593Smuzhiyun !(cmd->data & RXH_IP_DST) ||
388*4882a593Smuzhiyun !(cmd->data & RXH_L4_B_0_1) ||
389*4882a593Smuzhiyun !(cmd->data & RXH_L4_B_2_3))
390*4882a593Smuzhiyun return -EINVAL;
391*4882a593Smuzhiyun reg_val = SXGBE_CORE_RSS_CTL_UDP4TE;
392*4882a593Smuzhiyun break;
393*4882a593Smuzhiyun case SCTP_V4_FLOW:
394*4882a593Smuzhiyun case AH_ESP_V4_FLOW:
395*4882a593Smuzhiyun case AH_V4_FLOW:
396*4882a593Smuzhiyun case ESP_V4_FLOW:
397*4882a593Smuzhiyun case AH_ESP_V6_FLOW:
398*4882a593Smuzhiyun case AH_V6_FLOW:
399*4882a593Smuzhiyun case ESP_V6_FLOW:
400*4882a593Smuzhiyun case SCTP_V6_FLOW:
401*4882a593Smuzhiyun case IPV4_FLOW:
402*4882a593Smuzhiyun case IPV6_FLOW:
403*4882a593Smuzhiyun if (!(cmd->data & RXH_IP_SRC) ||
404*4882a593Smuzhiyun !(cmd->data & RXH_IP_DST) ||
405*4882a593Smuzhiyun (cmd->data & RXH_L4_B_0_1) ||
406*4882a593Smuzhiyun (cmd->data & RXH_L4_B_2_3))
407*4882a593Smuzhiyun return -EINVAL;
408*4882a593Smuzhiyun reg_val = SXGBE_CORE_RSS_CTL_IP2TE;
409*4882a593Smuzhiyun break;
410*4882a593Smuzhiyun default:
411*4882a593Smuzhiyun return -EINVAL;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun /* Read SXGBE RSS control register and update */
415*4882a593Smuzhiyun reg_val |= readl(priv->ioaddr + SXGBE_CORE_RSS_CTL_REG);
416*4882a593Smuzhiyun writel(reg_val, priv->ioaddr + SXGBE_CORE_RSS_CTL_REG);
417*4882a593Smuzhiyun readl(priv->ioaddr + SXGBE_CORE_RSS_CTL_REG);
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun return 0;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
sxgbe_set_rxnfc(struct net_device * dev,struct ethtool_rxnfc * cmd)422*4882a593Smuzhiyun static int sxgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun struct sxgbe_priv_data *priv = netdev_priv(dev);
425*4882a593Smuzhiyun int ret = -EOPNOTSUPP;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun switch (cmd->cmd) {
428*4882a593Smuzhiyun case ETHTOOL_SRXFH:
429*4882a593Smuzhiyun ret = sxgbe_set_rss_hash_opt(priv, cmd);
430*4882a593Smuzhiyun break;
431*4882a593Smuzhiyun default:
432*4882a593Smuzhiyun break;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun return ret;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun
sxgbe_get_regs(struct net_device * dev,struct ethtool_regs * regs,void * space)438*4882a593Smuzhiyun static void sxgbe_get_regs(struct net_device *dev,
439*4882a593Smuzhiyun struct ethtool_regs *regs, void *space)
440*4882a593Smuzhiyun {
441*4882a593Smuzhiyun struct sxgbe_priv_data *priv = netdev_priv(dev);
442*4882a593Smuzhiyun u32 *reg_space = (u32 *)space;
443*4882a593Smuzhiyun int reg_offset;
444*4882a593Smuzhiyun int reg_ix = 0;
445*4882a593Smuzhiyun void __iomem *ioaddr = priv->ioaddr;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun memset(reg_space, 0x0, REG_SPACE_SIZE);
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun /* MAC registers */
450*4882a593Smuzhiyun for (reg_offset = START_MAC_REG_OFFSET;
451*4882a593Smuzhiyun reg_offset <= MAX_MAC_REG_OFFSET; reg_offset += 4) {
452*4882a593Smuzhiyun reg_space[reg_ix] = readl(ioaddr + reg_offset);
453*4882a593Smuzhiyun reg_ix++;
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun /* MTL registers */
457*4882a593Smuzhiyun for (reg_offset = START_MTL_REG_OFFSET;
458*4882a593Smuzhiyun reg_offset <= MAX_MTL_REG_OFFSET; reg_offset += 4) {
459*4882a593Smuzhiyun reg_space[reg_ix] = readl(ioaddr + reg_offset);
460*4882a593Smuzhiyun reg_ix++;
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun /* DMA registers */
464*4882a593Smuzhiyun for (reg_offset = START_DMA_REG_OFFSET;
465*4882a593Smuzhiyun reg_offset <= MAX_DMA_REG_OFFSET; reg_offset += 4) {
466*4882a593Smuzhiyun reg_space[reg_ix] = readl(ioaddr + reg_offset);
467*4882a593Smuzhiyun reg_ix++;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun BUG_ON(reg_ix * 4 > REG_SPACE_SIZE);
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun
sxgbe_get_regs_len(struct net_device * dev)473*4882a593Smuzhiyun static int sxgbe_get_regs_len(struct net_device *dev)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun return REG_SPACE_SIZE;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun static const struct ethtool_ops sxgbe_ethtool_ops = {
479*4882a593Smuzhiyun .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS,
480*4882a593Smuzhiyun .get_drvinfo = sxgbe_getdrvinfo,
481*4882a593Smuzhiyun .get_msglevel = sxgbe_getmsglevel,
482*4882a593Smuzhiyun .set_msglevel = sxgbe_setmsglevel,
483*4882a593Smuzhiyun .get_link = ethtool_op_get_link,
484*4882a593Smuzhiyun .get_strings = sxgbe_get_strings,
485*4882a593Smuzhiyun .get_ethtool_stats = sxgbe_get_ethtool_stats,
486*4882a593Smuzhiyun .get_sset_count = sxgbe_get_sset_count,
487*4882a593Smuzhiyun .get_channels = sxgbe_get_channels,
488*4882a593Smuzhiyun .get_coalesce = sxgbe_get_coalesce,
489*4882a593Smuzhiyun .set_coalesce = sxgbe_set_coalesce,
490*4882a593Smuzhiyun .get_rxnfc = sxgbe_get_rxnfc,
491*4882a593Smuzhiyun .set_rxnfc = sxgbe_set_rxnfc,
492*4882a593Smuzhiyun .get_regs = sxgbe_get_regs,
493*4882a593Smuzhiyun .get_regs_len = sxgbe_get_regs_len,
494*4882a593Smuzhiyun .get_eee = sxgbe_get_eee,
495*4882a593Smuzhiyun .set_eee = sxgbe_set_eee,
496*4882a593Smuzhiyun .get_link_ksettings = phy_ethtool_get_link_ksettings,
497*4882a593Smuzhiyun .set_link_ksettings = phy_ethtool_set_link_ksettings,
498*4882a593Smuzhiyun };
499*4882a593Smuzhiyun
sxgbe_set_ethtool_ops(struct net_device * netdev)500*4882a593Smuzhiyun void sxgbe_set_ethtool_ops(struct net_device *netdev)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun netdev->ethtool_ops = &sxgbe_ethtool_ops;
503*4882a593Smuzhiyun }
504