xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/qualcomm/qca_spi.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  *   Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
3*4882a593Smuzhiyun  *   Copyright (c) 2014, I2SE GmbH
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *   Permission to use, copy, modify, and/or distribute this software
6*4882a593Smuzhiyun  *   for any purpose with or without fee is hereby granted, provided
7*4882a593Smuzhiyun  *   that the above copyright notice and this permission notice appear
8*4882a593Smuzhiyun  *   in all copies.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  *   THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11*4882a593Smuzhiyun  *   WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12*4882a593Smuzhiyun  *   WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
13*4882a593Smuzhiyun  *   THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
14*4882a593Smuzhiyun  *   CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
15*4882a593Smuzhiyun  *   LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
16*4882a593Smuzhiyun  *   NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
17*4882a593Smuzhiyun  *   CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /*   This module implements the Qualcomm Atheros SPI protocol for
21*4882a593Smuzhiyun  *   kernel-based SPI device; it is essentially an Ethernet-to-SPI
22*4882a593Smuzhiyun  *   serial converter;
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include <linux/errno.h>
26*4882a593Smuzhiyun #include <linux/etherdevice.h>
27*4882a593Smuzhiyun #include <linux/if_arp.h>
28*4882a593Smuzhiyun #include <linux/if_ether.h>
29*4882a593Smuzhiyun #include <linux/init.h>
30*4882a593Smuzhiyun #include <linux/interrupt.h>
31*4882a593Smuzhiyun #include <linux/jiffies.h>
32*4882a593Smuzhiyun #include <linux/kernel.h>
33*4882a593Smuzhiyun #include <linux/kthread.h>
34*4882a593Smuzhiyun #include <linux/module.h>
35*4882a593Smuzhiyun #include <linux/moduleparam.h>
36*4882a593Smuzhiyun #include <linux/netdevice.h>
37*4882a593Smuzhiyun #include <linux/of.h>
38*4882a593Smuzhiyun #include <linux/of_device.h>
39*4882a593Smuzhiyun #include <linux/of_net.h>
40*4882a593Smuzhiyun #include <linux/sched.h>
41*4882a593Smuzhiyun #include <linux/skbuff.h>
42*4882a593Smuzhiyun #include <linux/spi/spi.h>
43*4882a593Smuzhiyun #include <linux/types.h>
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #include "qca_7k.h"
46*4882a593Smuzhiyun #include "qca_7k_common.h"
47*4882a593Smuzhiyun #include "qca_debug.h"
48*4882a593Smuzhiyun #include "qca_spi.h"
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #define MAX_DMA_BURST_LEN 5000
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun /*   Modules parameters     */
53*4882a593Smuzhiyun #define QCASPI_CLK_SPEED_MIN 1000000
54*4882a593Smuzhiyun #define QCASPI_CLK_SPEED_MAX 16000000
55*4882a593Smuzhiyun #define QCASPI_CLK_SPEED     8000000
56*4882a593Smuzhiyun static int qcaspi_clkspeed;
57*4882a593Smuzhiyun module_param(qcaspi_clkspeed, int, 0);
58*4882a593Smuzhiyun MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000.");
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #define QCASPI_BURST_LEN_MIN 1
61*4882a593Smuzhiyun #define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN
62*4882a593Smuzhiyun static int qcaspi_burst_len = MAX_DMA_BURST_LEN;
63*4882a593Smuzhiyun module_param(qcaspi_burst_len, int, 0);
64*4882a593Smuzhiyun MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000.");
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun #define QCASPI_PLUGGABLE_MIN 0
67*4882a593Smuzhiyun #define QCASPI_PLUGGABLE_MAX 1
68*4882a593Smuzhiyun static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN;
69*4882a593Smuzhiyun module_param(qcaspi_pluggable, int, 0);
70*4882a593Smuzhiyun MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no).");
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun #define QCASPI_WRITE_VERIFY_MIN 0
73*4882a593Smuzhiyun #define QCASPI_WRITE_VERIFY_MAX 3
74*4882a593Smuzhiyun static int wr_verify = QCASPI_WRITE_VERIFY_MIN;
75*4882a593Smuzhiyun module_param(wr_verify, int, 0);
76*4882a593Smuzhiyun MODULE_PARM_DESC(wr_verify, "SPI register write verify trails. Use 0-3.");
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun #define QCASPI_TX_TIMEOUT (1 * HZ)
79*4882a593Smuzhiyun #define QCASPI_QCA7K_REBOOT_TIME_MS 1000
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun static void
start_spi_intr_handling(struct qcaspi * qca,u16 * intr_cause)82*4882a593Smuzhiyun start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun 	*intr_cause = 0;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify);
87*4882a593Smuzhiyun 	qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause);
88*4882a593Smuzhiyun 	netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause);
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun static void
end_spi_intr_handling(struct qcaspi * qca,u16 intr_cause)92*4882a593Smuzhiyun end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	u16 intr_enable = (SPI_INT_CPU_ON |
95*4882a593Smuzhiyun 			   SPI_INT_PKT_AVLBL |
96*4882a593Smuzhiyun 			   SPI_INT_RDBUF_ERR |
97*4882a593Smuzhiyun 			   SPI_INT_WRBUF_ERR);
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause, 0);
100*4882a593Smuzhiyun 	qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable, wr_verify);
101*4882a593Smuzhiyun 	netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause);
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun static u32
qcaspi_write_burst(struct qcaspi * qca,u8 * src,u32 len)105*4882a593Smuzhiyun qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun 	__be16 cmd;
108*4882a593Smuzhiyun 	struct spi_message msg;
109*4882a593Smuzhiyun 	struct spi_transfer transfer[2];
110*4882a593Smuzhiyun 	int ret;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	memset(&transfer, 0, sizeof(transfer));
113*4882a593Smuzhiyun 	spi_message_init(&msg);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL);
116*4882a593Smuzhiyun 	transfer[0].tx_buf = &cmd;
117*4882a593Smuzhiyun 	transfer[0].len = QCASPI_CMD_LEN;
118*4882a593Smuzhiyun 	transfer[1].tx_buf = src;
119*4882a593Smuzhiyun 	transfer[1].len = len;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	spi_message_add_tail(&transfer[0], &msg);
122*4882a593Smuzhiyun 	spi_message_add_tail(&transfer[1], &msg);
123*4882a593Smuzhiyun 	ret = spi_sync(qca->spi_dev, &msg);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) {
126*4882a593Smuzhiyun 		qcaspi_spi_error(qca);
127*4882a593Smuzhiyun 		return 0;
128*4882a593Smuzhiyun 	}
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	return len;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun static u32
qcaspi_write_legacy(struct qcaspi * qca,u8 * src,u32 len)134*4882a593Smuzhiyun qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	struct spi_message msg;
137*4882a593Smuzhiyun 	struct spi_transfer transfer;
138*4882a593Smuzhiyun 	int ret;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	memset(&transfer, 0, sizeof(transfer));
141*4882a593Smuzhiyun 	spi_message_init(&msg);
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	transfer.tx_buf = src;
144*4882a593Smuzhiyun 	transfer.len = len;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	spi_message_add_tail(&transfer, &msg);
147*4882a593Smuzhiyun 	ret = spi_sync(qca->spi_dev, &msg);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	if (ret || (msg.actual_length != len)) {
150*4882a593Smuzhiyun 		qcaspi_spi_error(qca);
151*4882a593Smuzhiyun 		return 0;
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	return len;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun static u32
qcaspi_read_burst(struct qcaspi * qca,u8 * dst,u32 len)158*4882a593Smuzhiyun qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun 	struct spi_message msg;
161*4882a593Smuzhiyun 	__be16 cmd;
162*4882a593Smuzhiyun 	struct spi_transfer transfer[2];
163*4882a593Smuzhiyun 	int ret;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	memset(&transfer, 0, sizeof(transfer));
166*4882a593Smuzhiyun 	spi_message_init(&msg);
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL);
169*4882a593Smuzhiyun 	transfer[0].tx_buf = &cmd;
170*4882a593Smuzhiyun 	transfer[0].len = QCASPI_CMD_LEN;
171*4882a593Smuzhiyun 	transfer[1].rx_buf = dst;
172*4882a593Smuzhiyun 	transfer[1].len = len;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	spi_message_add_tail(&transfer[0], &msg);
175*4882a593Smuzhiyun 	spi_message_add_tail(&transfer[1], &msg);
176*4882a593Smuzhiyun 	ret = spi_sync(qca->spi_dev, &msg);
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) {
179*4882a593Smuzhiyun 		qcaspi_spi_error(qca);
180*4882a593Smuzhiyun 		return 0;
181*4882a593Smuzhiyun 	}
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	return len;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun static u32
qcaspi_read_legacy(struct qcaspi * qca,u8 * dst,u32 len)187*4882a593Smuzhiyun qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun 	struct spi_message msg;
190*4882a593Smuzhiyun 	struct spi_transfer transfer;
191*4882a593Smuzhiyun 	int ret;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	memset(&transfer, 0, sizeof(transfer));
194*4882a593Smuzhiyun 	spi_message_init(&msg);
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	transfer.rx_buf = dst;
197*4882a593Smuzhiyun 	transfer.len = len;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	spi_message_add_tail(&transfer, &msg);
200*4882a593Smuzhiyun 	ret = spi_sync(qca->spi_dev, &msg);
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	if (ret || (msg.actual_length != len)) {
203*4882a593Smuzhiyun 		qcaspi_spi_error(qca);
204*4882a593Smuzhiyun 		return 0;
205*4882a593Smuzhiyun 	}
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return len;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun static int
qcaspi_tx_cmd(struct qcaspi * qca,u16 cmd)211*4882a593Smuzhiyun qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	__be16 tx_data;
214*4882a593Smuzhiyun 	struct spi_message msg;
215*4882a593Smuzhiyun 	struct spi_transfer transfer;
216*4882a593Smuzhiyun 	int ret;
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	memset(&transfer, 0, sizeof(transfer));
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	spi_message_init(&msg);
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	tx_data = cpu_to_be16(cmd);
223*4882a593Smuzhiyun 	transfer.len = sizeof(cmd);
224*4882a593Smuzhiyun 	transfer.tx_buf = &tx_data;
225*4882a593Smuzhiyun 	spi_message_add_tail(&transfer, &msg);
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	ret = spi_sync(qca->spi_dev, &msg);
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	if (!ret)
230*4882a593Smuzhiyun 		ret = msg.status;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	if (ret)
233*4882a593Smuzhiyun 		qcaspi_spi_error(qca);
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	return ret;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun static int
qcaspi_tx_frame(struct qcaspi * qca,struct sk_buff * skb)239*4882a593Smuzhiyun qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun 	u32 count;
242*4882a593Smuzhiyun 	u32 written;
243*4882a593Smuzhiyun 	u32 offset;
244*4882a593Smuzhiyun 	u32 len;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	len = skb->len;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len, wr_verify);
249*4882a593Smuzhiyun 	if (qca->legacy_mode)
250*4882a593Smuzhiyun 		qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL);
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	offset = 0;
253*4882a593Smuzhiyun 	while (len) {
254*4882a593Smuzhiyun 		count = len;
255*4882a593Smuzhiyun 		if (count > qca->burst_len)
256*4882a593Smuzhiyun 			count = qca->burst_len;
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 		if (qca->legacy_mode) {
259*4882a593Smuzhiyun 			written = qcaspi_write_legacy(qca,
260*4882a593Smuzhiyun 						      skb->data + offset,
261*4882a593Smuzhiyun 						      count);
262*4882a593Smuzhiyun 		} else {
263*4882a593Smuzhiyun 			written = qcaspi_write_burst(qca,
264*4882a593Smuzhiyun 						     skb->data + offset,
265*4882a593Smuzhiyun 						     count);
266*4882a593Smuzhiyun 		}
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 		if (written != count)
269*4882a593Smuzhiyun 			return -1;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 		offset += count;
272*4882a593Smuzhiyun 		len -= count;
273*4882a593Smuzhiyun 	}
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	return 0;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun static int
qcaspi_transmit(struct qcaspi * qca)279*4882a593Smuzhiyun qcaspi_transmit(struct qcaspi *qca)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun 	struct net_device_stats *n_stats = &qca->net_dev->stats;
282*4882a593Smuzhiyun 	u16 available = 0;
283*4882a593Smuzhiyun 	u32 pkt_len;
284*4882a593Smuzhiyun 	u16 new_head;
285*4882a593Smuzhiyun 	u16 packets = 0;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	if (qca->txr.skb[qca->txr.head] == NULL)
288*4882a593Smuzhiyun 		return 0;
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available);
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	if (available > QCASPI_HW_BUF_LEN) {
293*4882a593Smuzhiyun 		/* This could only happen by interferences on the SPI line.
294*4882a593Smuzhiyun 		 * So retry later ...
295*4882a593Smuzhiyun 		 */
296*4882a593Smuzhiyun 		qca->stats.buf_avail_err++;
297*4882a593Smuzhiyun 		return -1;
298*4882a593Smuzhiyun 	}
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	while (qca->txr.skb[qca->txr.head]) {
301*4882a593Smuzhiyun 		pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN;
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 		if (available < pkt_len) {
304*4882a593Smuzhiyun 			if (packets == 0)
305*4882a593Smuzhiyun 				qca->stats.write_buf_miss++;
306*4882a593Smuzhiyun 			break;
307*4882a593Smuzhiyun 		}
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 		if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) {
310*4882a593Smuzhiyun 			qca->stats.write_err++;
311*4882a593Smuzhiyun 			return -1;
312*4882a593Smuzhiyun 		}
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 		packets++;
315*4882a593Smuzhiyun 		n_stats->tx_packets++;
316*4882a593Smuzhiyun 		n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len;
317*4882a593Smuzhiyun 		available -= pkt_len;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 		/* remove the skb from the queue */
320*4882a593Smuzhiyun 		/* XXX After inconsistent lock states netif_tx_lock()
321*4882a593Smuzhiyun 		 * has been replaced by netif_tx_lock_bh() and so on.
322*4882a593Smuzhiyun 		 */
323*4882a593Smuzhiyun 		netif_tx_lock_bh(qca->net_dev);
324*4882a593Smuzhiyun 		dev_kfree_skb(qca->txr.skb[qca->txr.head]);
325*4882a593Smuzhiyun 		qca->txr.skb[qca->txr.head] = NULL;
326*4882a593Smuzhiyun 		qca->txr.size -= pkt_len;
327*4882a593Smuzhiyun 		new_head = qca->txr.head + 1;
328*4882a593Smuzhiyun 		if (new_head >= qca->txr.count)
329*4882a593Smuzhiyun 			new_head = 0;
330*4882a593Smuzhiyun 		qca->txr.head = new_head;
331*4882a593Smuzhiyun 		if (netif_queue_stopped(qca->net_dev))
332*4882a593Smuzhiyun 			netif_wake_queue(qca->net_dev);
333*4882a593Smuzhiyun 		netif_tx_unlock_bh(qca->net_dev);
334*4882a593Smuzhiyun 	}
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	return 0;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun static int
qcaspi_receive(struct qcaspi * qca)340*4882a593Smuzhiyun qcaspi_receive(struct qcaspi *qca)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun 	struct net_device *net_dev = qca->net_dev;
343*4882a593Smuzhiyun 	struct net_device_stats *n_stats = &net_dev->stats;
344*4882a593Smuzhiyun 	u16 available = 0;
345*4882a593Smuzhiyun 	u32 bytes_read;
346*4882a593Smuzhiyun 	u8 *cp;
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	/* Allocate rx SKB if we don't have one available. */
349*4882a593Smuzhiyun 	if (!qca->rx_skb) {
350*4882a593Smuzhiyun 		qca->rx_skb = netdev_alloc_skb_ip_align(net_dev,
351*4882a593Smuzhiyun 							net_dev->mtu +
352*4882a593Smuzhiyun 							VLAN_ETH_HLEN);
353*4882a593Smuzhiyun 		if (!qca->rx_skb) {
354*4882a593Smuzhiyun 			netdev_dbg(net_dev, "out of RX resources\n");
355*4882a593Smuzhiyun 			qca->stats.out_of_mem++;
356*4882a593Smuzhiyun 			return -1;
357*4882a593Smuzhiyun 		}
358*4882a593Smuzhiyun 	}
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	/* Read the packet size. */
361*4882a593Smuzhiyun 	qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available);
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %08x\n",
364*4882a593Smuzhiyun 		   available);
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	if (available > QCASPI_HW_BUF_LEN + QCASPI_HW_PKT_LEN) {
367*4882a593Smuzhiyun 		/* This could only happen by interferences on the SPI line.
368*4882a593Smuzhiyun 		 * So retry later ...
369*4882a593Smuzhiyun 		 */
370*4882a593Smuzhiyun 		qca->stats.buf_avail_err++;
371*4882a593Smuzhiyun 		return -1;
372*4882a593Smuzhiyun 	} else if (available == 0) {
373*4882a593Smuzhiyun 		netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n");
374*4882a593Smuzhiyun 		return -1;
375*4882a593Smuzhiyun 	}
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available, wr_verify);
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	if (qca->legacy_mode)
380*4882a593Smuzhiyun 		qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL);
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	while (available) {
383*4882a593Smuzhiyun 		u32 count = available;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 		if (count > qca->burst_len)
386*4882a593Smuzhiyun 			count = qca->burst_len;
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 		if (qca->legacy_mode) {
389*4882a593Smuzhiyun 			bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer,
390*4882a593Smuzhiyun 							count);
391*4882a593Smuzhiyun 		} else {
392*4882a593Smuzhiyun 			bytes_read = qcaspi_read_burst(qca, qca->rx_buffer,
393*4882a593Smuzhiyun 						       count);
394*4882a593Smuzhiyun 		}
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 		netdev_dbg(net_dev, "available: %d, byte read: %d\n",
397*4882a593Smuzhiyun 			   available, bytes_read);
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 		if (bytes_read) {
400*4882a593Smuzhiyun 			available -= bytes_read;
401*4882a593Smuzhiyun 		} else {
402*4882a593Smuzhiyun 			qca->stats.read_err++;
403*4882a593Smuzhiyun 			return -1;
404*4882a593Smuzhiyun 		}
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 		cp = qca->rx_buffer;
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 		while ((bytes_read--) && (qca->rx_skb)) {
409*4882a593Smuzhiyun 			s32 retcode;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 			retcode = qcafrm_fsm_decode(&qca->frm_handle,
412*4882a593Smuzhiyun 						    qca->rx_skb->data,
413*4882a593Smuzhiyun 						    skb_tailroom(qca->rx_skb),
414*4882a593Smuzhiyun 						    *cp);
415*4882a593Smuzhiyun 			cp++;
416*4882a593Smuzhiyun 			switch (retcode) {
417*4882a593Smuzhiyun 			case QCAFRM_GATHER:
418*4882a593Smuzhiyun 			case QCAFRM_NOHEAD:
419*4882a593Smuzhiyun 				break;
420*4882a593Smuzhiyun 			case QCAFRM_NOTAIL:
421*4882a593Smuzhiyun 				netdev_dbg(net_dev, "no RX tail\n");
422*4882a593Smuzhiyun 				n_stats->rx_errors++;
423*4882a593Smuzhiyun 				n_stats->rx_dropped++;
424*4882a593Smuzhiyun 				break;
425*4882a593Smuzhiyun 			case QCAFRM_INVLEN:
426*4882a593Smuzhiyun 				netdev_dbg(net_dev, "invalid RX length\n");
427*4882a593Smuzhiyun 				n_stats->rx_errors++;
428*4882a593Smuzhiyun 				n_stats->rx_dropped++;
429*4882a593Smuzhiyun 				break;
430*4882a593Smuzhiyun 			default:
431*4882a593Smuzhiyun 				qca->rx_skb->dev = qca->net_dev;
432*4882a593Smuzhiyun 				n_stats->rx_packets++;
433*4882a593Smuzhiyun 				n_stats->rx_bytes += retcode;
434*4882a593Smuzhiyun 				skb_put(qca->rx_skb, retcode);
435*4882a593Smuzhiyun 				qca->rx_skb->protocol = eth_type_trans(
436*4882a593Smuzhiyun 					qca->rx_skb, qca->rx_skb->dev);
437*4882a593Smuzhiyun 				skb_checksum_none_assert(qca->rx_skb);
438*4882a593Smuzhiyun 				netif_rx_ni(qca->rx_skb);
439*4882a593Smuzhiyun 				qca->rx_skb = netdev_alloc_skb_ip_align(net_dev,
440*4882a593Smuzhiyun 					net_dev->mtu + VLAN_ETH_HLEN);
441*4882a593Smuzhiyun 				if (!qca->rx_skb) {
442*4882a593Smuzhiyun 					netdev_dbg(net_dev, "out of RX resources\n");
443*4882a593Smuzhiyun 					n_stats->rx_errors++;
444*4882a593Smuzhiyun 					qca->stats.out_of_mem++;
445*4882a593Smuzhiyun 					break;
446*4882a593Smuzhiyun 				}
447*4882a593Smuzhiyun 			}
448*4882a593Smuzhiyun 		}
449*4882a593Smuzhiyun 	}
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	return 0;
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun /*   Check that tx ring stores only so much bytes
455*4882a593Smuzhiyun  *   that fit into the internal QCA buffer.
456*4882a593Smuzhiyun  */
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun static int
qcaspi_tx_ring_has_space(struct tx_ring * txr)459*4882a593Smuzhiyun qcaspi_tx_ring_has_space(struct tx_ring *txr)
460*4882a593Smuzhiyun {
461*4882a593Smuzhiyun 	if (txr->skb[txr->tail])
462*4882a593Smuzhiyun 		return 0;
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	return (txr->size + QCAFRM_MAX_LEN < QCASPI_HW_BUF_LEN) ? 1 : 0;
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun /*   Flush the tx ring. This function is only safe to
468*4882a593Smuzhiyun  *   call from the qcaspi_spi_thread.
469*4882a593Smuzhiyun  */
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun static void
qcaspi_flush_tx_ring(struct qcaspi * qca)472*4882a593Smuzhiyun qcaspi_flush_tx_ring(struct qcaspi *qca)
473*4882a593Smuzhiyun {
474*4882a593Smuzhiyun 	int i;
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	/* XXX After inconsistent lock states netif_tx_lock()
477*4882a593Smuzhiyun 	 * has been replaced by netif_tx_lock_bh() and so on.
478*4882a593Smuzhiyun 	 */
479*4882a593Smuzhiyun 	netif_tx_lock_bh(qca->net_dev);
480*4882a593Smuzhiyun 	for (i = 0; i < TX_RING_MAX_LEN; i++) {
481*4882a593Smuzhiyun 		if (qca->txr.skb[i]) {
482*4882a593Smuzhiyun 			dev_kfree_skb(qca->txr.skb[i]);
483*4882a593Smuzhiyun 			qca->txr.skb[i] = NULL;
484*4882a593Smuzhiyun 			qca->net_dev->stats.tx_dropped++;
485*4882a593Smuzhiyun 		}
486*4882a593Smuzhiyun 	}
487*4882a593Smuzhiyun 	qca->txr.tail = 0;
488*4882a593Smuzhiyun 	qca->txr.head = 0;
489*4882a593Smuzhiyun 	qca->txr.size = 0;
490*4882a593Smuzhiyun 	netif_tx_unlock_bh(qca->net_dev);
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun static void
qcaspi_qca7k_sync(struct qcaspi * qca,int event)494*4882a593Smuzhiyun qcaspi_qca7k_sync(struct qcaspi *qca, int event)
495*4882a593Smuzhiyun {
496*4882a593Smuzhiyun 	u16 signature = 0;
497*4882a593Smuzhiyun 	u16 spi_config;
498*4882a593Smuzhiyun 	u16 wrbuf_space = 0;
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun 	if (event == QCASPI_EVENT_CPUON) {
501*4882a593Smuzhiyun 		/* Read signature twice, if not valid
502*4882a593Smuzhiyun 		 * go back to unknown state.
503*4882a593Smuzhiyun 		 */
504*4882a593Smuzhiyun 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
505*4882a593Smuzhiyun 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
506*4882a593Smuzhiyun 		if (signature != QCASPI_GOOD_SIGNATURE) {
507*4882a593Smuzhiyun 			qca->sync = QCASPI_SYNC_UNKNOWN;
508*4882a593Smuzhiyun 			netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n");
509*4882a593Smuzhiyun 		} else {
510*4882a593Smuzhiyun 			/* ensure that the WRBUF is empty */
511*4882a593Smuzhiyun 			qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA,
512*4882a593Smuzhiyun 					     &wrbuf_space);
513*4882a593Smuzhiyun 			if (wrbuf_space != QCASPI_HW_BUF_LEN) {
514*4882a593Smuzhiyun 				netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n");
515*4882a593Smuzhiyun 				qca->sync = QCASPI_SYNC_UNKNOWN;
516*4882a593Smuzhiyun 			} else {
517*4882a593Smuzhiyun 				netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n");
518*4882a593Smuzhiyun 				qca->sync = QCASPI_SYNC_READY;
519*4882a593Smuzhiyun 				return;
520*4882a593Smuzhiyun 			}
521*4882a593Smuzhiyun 		}
522*4882a593Smuzhiyun 	}
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	switch (qca->sync) {
525*4882a593Smuzhiyun 	case QCASPI_SYNC_READY:
526*4882a593Smuzhiyun 		/* Read signature, if not valid go to unknown state. */
527*4882a593Smuzhiyun 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
528*4882a593Smuzhiyun 		if (signature != QCASPI_GOOD_SIGNATURE) {
529*4882a593Smuzhiyun 			qca->sync = QCASPI_SYNC_UNKNOWN;
530*4882a593Smuzhiyun 			netdev_dbg(qca->net_dev, "sync: bad signature, restart\n");
531*4882a593Smuzhiyun 			/* don't reset right away */
532*4882a593Smuzhiyun 			return;
533*4882a593Smuzhiyun 		}
534*4882a593Smuzhiyun 		break;
535*4882a593Smuzhiyun 	case QCASPI_SYNC_UNKNOWN:
536*4882a593Smuzhiyun 		/* Read signature, if not valid stay in unknown state */
537*4882a593Smuzhiyun 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
538*4882a593Smuzhiyun 		if (signature != QCASPI_GOOD_SIGNATURE) {
539*4882a593Smuzhiyun 			netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n");
540*4882a593Smuzhiyun 			return;
541*4882a593Smuzhiyun 		}
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 		/* TODO: use GPIO to reset QCA7000 in legacy mode*/
544*4882a593Smuzhiyun 		netdev_dbg(qca->net_dev, "sync: resetting device.\n");
545*4882a593Smuzhiyun 		qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config);
546*4882a593Smuzhiyun 		spi_config |= QCASPI_SLAVE_RESET_BIT;
547*4882a593Smuzhiyun 		qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config, 0);
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 		qca->sync = QCASPI_SYNC_RESET;
550*4882a593Smuzhiyun 		qca->stats.trig_reset++;
551*4882a593Smuzhiyun 		qca->reset_count = 0;
552*4882a593Smuzhiyun 		break;
553*4882a593Smuzhiyun 	case QCASPI_SYNC_RESET:
554*4882a593Smuzhiyun 		qca->reset_count++;
555*4882a593Smuzhiyun 		netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n",
556*4882a593Smuzhiyun 			   qca->reset_count);
557*4882a593Smuzhiyun 		if (qca->reset_count >= QCASPI_RESET_TIMEOUT) {
558*4882a593Smuzhiyun 			/* reset did not seem to take place, try again */
559*4882a593Smuzhiyun 			qca->sync = QCASPI_SYNC_UNKNOWN;
560*4882a593Smuzhiyun 			qca->stats.reset_timeout++;
561*4882a593Smuzhiyun 			netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n");
562*4882a593Smuzhiyun 		}
563*4882a593Smuzhiyun 		break;
564*4882a593Smuzhiyun 	}
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun static int
qcaspi_spi_thread(void * data)568*4882a593Smuzhiyun qcaspi_spi_thread(void *data)
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun 	struct qcaspi *qca = data;
571*4882a593Smuzhiyun 	u16 intr_cause = 0;
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	netdev_info(qca->net_dev, "SPI thread created\n");
574*4882a593Smuzhiyun 	while (!kthread_should_stop()) {
575*4882a593Smuzhiyun 		set_current_state(TASK_INTERRUPTIBLE);
576*4882a593Smuzhiyun 		if ((qca->intr_req == qca->intr_svc) &&
577*4882a593Smuzhiyun 		    (qca->txr.skb[qca->txr.head] == NULL) &&
578*4882a593Smuzhiyun 		    (qca->sync == QCASPI_SYNC_READY))
579*4882a593Smuzhiyun 			schedule();
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 		set_current_state(TASK_RUNNING);
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 		netdev_dbg(qca->net_dev, "have work to do. int: %d, tx_skb: %p\n",
584*4882a593Smuzhiyun 			   qca->intr_req - qca->intr_svc,
585*4882a593Smuzhiyun 			   qca->txr.skb[qca->txr.head]);
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 		qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE);
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 		if (qca->sync != QCASPI_SYNC_READY) {
590*4882a593Smuzhiyun 			netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n",
591*4882a593Smuzhiyun 				   (unsigned int)qca->sync);
592*4882a593Smuzhiyun 			netif_stop_queue(qca->net_dev);
593*4882a593Smuzhiyun 			netif_carrier_off(qca->net_dev);
594*4882a593Smuzhiyun 			qcaspi_flush_tx_ring(qca);
595*4882a593Smuzhiyun 			msleep(QCASPI_QCA7K_REBOOT_TIME_MS);
596*4882a593Smuzhiyun 		}
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 		if (qca->intr_svc != qca->intr_req) {
599*4882a593Smuzhiyun 			qca->intr_svc = qca->intr_req;
600*4882a593Smuzhiyun 			start_spi_intr_handling(qca, &intr_cause);
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 			if (intr_cause & SPI_INT_CPU_ON) {
603*4882a593Smuzhiyun 				qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON);
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 				/* not synced. */
606*4882a593Smuzhiyun 				if (qca->sync != QCASPI_SYNC_READY)
607*4882a593Smuzhiyun 					continue;
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 				qca->stats.device_reset++;
610*4882a593Smuzhiyun 				netif_wake_queue(qca->net_dev);
611*4882a593Smuzhiyun 				netif_carrier_on(qca->net_dev);
612*4882a593Smuzhiyun 			}
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 			if (intr_cause & SPI_INT_RDBUF_ERR) {
615*4882a593Smuzhiyun 				/* restart sync */
616*4882a593Smuzhiyun 				netdev_dbg(qca->net_dev, "===> rdbuf error!\n");
617*4882a593Smuzhiyun 				qca->stats.read_buf_err++;
618*4882a593Smuzhiyun 				qca->sync = QCASPI_SYNC_UNKNOWN;
619*4882a593Smuzhiyun 				continue;
620*4882a593Smuzhiyun 			}
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 			if (intr_cause & SPI_INT_WRBUF_ERR) {
623*4882a593Smuzhiyun 				/* restart sync */
624*4882a593Smuzhiyun 				netdev_dbg(qca->net_dev, "===> wrbuf error!\n");
625*4882a593Smuzhiyun 				qca->stats.write_buf_err++;
626*4882a593Smuzhiyun 				qca->sync = QCASPI_SYNC_UNKNOWN;
627*4882a593Smuzhiyun 				continue;
628*4882a593Smuzhiyun 			}
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 			/* can only handle other interrupts
631*4882a593Smuzhiyun 			 * if sync has occurred
632*4882a593Smuzhiyun 			 */
633*4882a593Smuzhiyun 			if (qca->sync == QCASPI_SYNC_READY) {
634*4882a593Smuzhiyun 				if (intr_cause & SPI_INT_PKT_AVLBL)
635*4882a593Smuzhiyun 					qcaspi_receive(qca);
636*4882a593Smuzhiyun 			}
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 			end_spi_intr_handling(qca, intr_cause);
639*4882a593Smuzhiyun 		}
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 		if (qca->sync == QCASPI_SYNC_READY)
642*4882a593Smuzhiyun 			qcaspi_transmit(qca);
643*4882a593Smuzhiyun 	}
644*4882a593Smuzhiyun 	set_current_state(TASK_RUNNING);
645*4882a593Smuzhiyun 	netdev_info(qca->net_dev, "SPI thread exit\n");
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun 	return 0;
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun static irqreturn_t
qcaspi_intr_handler(int irq,void * data)651*4882a593Smuzhiyun qcaspi_intr_handler(int irq, void *data)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun 	struct qcaspi *qca = data;
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	qca->intr_req++;
656*4882a593Smuzhiyun 	if (qca->spi_thread &&
657*4882a593Smuzhiyun 	    qca->spi_thread->state != TASK_RUNNING)
658*4882a593Smuzhiyun 		wake_up_process(qca->spi_thread);
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 	return IRQ_HANDLED;
661*4882a593Smuzhiyun }
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun static int
qcaspi_netdev_open(struct net_device * dev)664*4882a593Smuzhiyun qcaspi_netdev_open(struct net_device *dev)
665*4882a593Smuzhiyun {
666*4882a593Smuzhiyun 	struct qcaspi *qca = netdev_priv(dev);
667*4882a593Smuzhiyun 	int ret = 0;
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun 	if (!qca)
670*4882a593Smuzhiyun 		return -EINVAL;
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	qca->intr_req = 1;
673*4882a593Smuzhiyun 	qca->intr_svc = 0;
674*4882a593Smuzhiyun 	qca->sync = QCASPI_SYNC_UNKNOWN;
675*4882a593Smuzhiyun 	qcafrm_fsm_init_spi(&qca->frm_handle);
676*4882a593Smuzhiyun 
677*4882a593Smuzhiyun 	qca->spi_thread = kthread_run((void *)qcaspi_spi_thread,
678*4882a593Smuzhiyun 				      qca, "%s", dev->name);
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun 	if (IS_ERR(qca->spi_thread)) {
681*4882a593Smuzhiyun 		netdev_err(dev, "%s: unable to start kernel thread.\n",
682*4882a593Smuzhiyun 			   QCASPI_DRV_NAME);
683*4882a593Smuzhiyun 		return PTR_ERR(qca->spi_thread);
684*4882a593Smuzhiyun 	}
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	ret = request_irq(qca->spi_dev->irq, qcaspi_intr_handler, 0,
687*4882a593Smuzhiyun 			  dev->name, qca);
688*4882a593Smuzhiyun 	if (ret) {
689*4882a593Smuzhiyun 		netdev_err(dev, "%s: unable to get IRQ %d (irqval=%d).\n",
690*4882a593Smuzhiyun 			   QCASPI_DRV_NAME, qca->spi_dev->irq, ret);
691*4882a593Smuzhiyun 		kthread_stop(qca->spi_thread);
692*4882a593Smuzhiyun 		return ret;
693*4882a593Smuzhiyun 	}
694*4882a593Smuzhiyun 
695*4882a593Smuzhiyun 	/* SPI thread takes care of TX queue */
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	return 0;
698*4882a593Smuzhiyun }
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun static int
qcaspi_netdev_close(struct net_device * dev)701*4882a593Smuzhiyun qcaspi_netdev_close(struct net_device *dev)
702*4882a593Smuzhiyun {
703*4882a593Smuzhiyun 	struct qcaspi *qca = netdev_priv(dev);
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	netif_stop_queue(dev);
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun 	qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify);
708*4882a593Smuzhiyun 	free_irq(qca->spi_dev->irq, qca);
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun 	kthread_stop(qca->spi_thread);
711*4882a593Smuzhiyun 	qca->spi_thread = NULL;
712*4882a593Smuzhiyun 	qcaspi_flush_tx_ring(qca);
713*4882a593Smuzhiyun 
714*4882a593Smuzhiyun 	return 0;
715*4882a593Smuzhiyun }
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun static netdev_tx_t
qcaspi_netdev_xmit(struct sk_buff * skb,struct net_device * dev)718*4882a593Smuzhiyun qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev)
719*4882a593Smuzhiyun {
720*4882a593Smuzhiyun 	u32 frame_len;
721*4882a593Smuzhiyun 	u8 *ptmp;
722*4882a593Smuzhiyun 	struct qcaspi *qca = netdev_priv(dev);
723*4882a593Smuzhiyun 	u16 new_tail;
724*4882a593Smuzhiyun 	struct sk_buff *tskb;
725*4882a593Smuzhiyun 	u8 pad_len = 0;
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun 	if (skb->len < QCAFRM_MIN_LEN)
728*4882a593Smuzhiyun 		pad_len = QCAFRM_MIN_LEN - skb->len;
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 	if (qca->txr.skb[qca->txr.tail]) {
731*4882a593Smuzhiyun 		netdev_warn(qca->net_dev, "queue was unexpectedly full!\n");
732*4882a593Smuzhiyun 		netif_stop_queue(qca->net_dev);
733*4882a593Smuzhiyun 		qca->stats.ring_full++;
734*4882a593Smuzhiyun 		return NETDEV_TX_BUSY;
735*4882a593Smuzhiyun 	}
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 	if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) ||
738*4882a593Smuzhiyun 	    (skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) {
739*4882a593Smuzhiyun 		tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN,
740*4882a593Smuzhiyun 				       QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC);
741*4882a593Smuzhiyun 		if (!tskb) {
742*4882a593Smuzhiyun 			qca->stats.out_of_mem++;
743*4882a593Smuzhiyun 			return NETDEV_TX_BUSY;
744*4882a593Smuzhiyun 		}
745*4882a593Smuzhiyun 		dev_kfree_skb(skb);
746*4882a593Smuzhiyun 		skb = tskb;
747*4882a593Smuzhiyun 	}
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 	frame_len = skb->len + pad_len;
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	ptmp = skb_push(skb, QCAFRM_HEADER_LEN);
752*4882a593Smuzhiyun 	qcafrm_create_header(ptmp, frame_len);
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	if (pad_len) {
755*4882a593Smuzhiyun 		ptmp = skb_put_zero(skb, pad_len);
756*4882a593Smuzhiyun 	}
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun 	ptmp = skb_put(skb, QCAFRM_FOOTER_LEN);
759*4882a593Smuzhiyun 	qcafrm_create_footer(ptmp);
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 	netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n",
762*4882a593Smuzhiyun 		   skb->len);
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun 	qca->txr.size += skb->len + QCASPI_HW_PKT_LEN;
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun 	new_tail = qca->txr.tail + 1;
767*4882a593Smuzhiyun 	if (new_tail >= qca->txr.count)
768*4882a593Smuzhiyun 		new_tail = 0;
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun 	qca->txr.skb[qca->txr.tail] = skb;
771*4882a593Smuzhiyun 	qca->txr.tail = new_tail;
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun 	if (!qcaspi_tx_ring_has_space(&qca->txr)) {
774*4882a593Smuzhiyun 		netif_stop_queue(qca->net_dev);
775*4882a593Smuzhiyun 		qca->stats.ring_full++;
776*4882a593Smuzhiyun 	}
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun 	netif_trans_update(dev);
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 	if (qca->spi_thread &&
781*4882a593Smuzhiyun 	    qca->spi_thread->state != TASK_RUNNING)
782*4882a593Smuzhiyun 		wake_up_process(qca->spi_thread);
783*4882a593Smuzhiyun 
784*4882a593Smuzhiyun 	return NETDEV_TX_OK;
785*4882a593Smuzhiyun }
786*4882a593Smuzhiyun 
787*4882a593Smuzhiyun static void
qcaspi_netdev_tx_timeout(struct net_device * dev,unsigned int txqueue)788*4882a593Smuzhiyun qcaspi_netdev_tx_timeout(struct net_device *dev, unsigned int txqueue)
789*4882a593Smuzhiyun {
790*4882a593Smuzhiyun 	struct qcaspi *qca = netdev_priv(dev);
791*4882a593Smuzhiyun 
792*4882a593Smuzhiyun 	netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n",
793*4882a593Smuzhiyun 		    jiffies, jiffies - dev_trans_start(dev));
794*4882a593Smuzhiyun 	qca->net_dev->stats.tx_errors++;
795*4882a593Smuzhiyun 	/* Trigger tx queue flush and QCA7000 reset */
796*4882a593Smuzhiyun 	qca->sync = QCASPI_SYNC_UNKNOWN;
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 	if (qca->spi_thread)
799*4882a593Smuzhiyun 		wake_up_process(qca->spi_thread);
800*4882a593Smuzhiyun }
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun static int
qcaspi_netdev_init(struct net_device * dev)803*4882a593Smuzhiyun qcaspi_netdev_init(struct net_device *dev)
804*4882a593Smuzhiyun {
805*4882a593Smuzhiyun 	struct qcaspi *qca = netdev_priv(dev);
806*4882a593Smuzhiyun 
807*4882a593Smuzhiyun 	dev->mtu = QCAFRM_MAX_MTU;
808*4882a593Smuzhiyun 	dev->type = ARPHRD_ETHER;
809*4882a593Smuzhiyun 	qca->clkspeed = qcaspi_clkspeed;
810*4882a593Smuzhiyun 	qca->burst_len = qcaspi_burst_len;
811*4882a593Smuzhiyun 	qca->spi_thread = NULL;
812*4882a593Smuzhiyun 	qca->buffer_size = (dev->mtu + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN +
813*4882a593Smuzhiyun 		QCAFRM_FOOTER_LEN + 4) * 4;
814*4882a593Smuzhiyun 
815*4882a593Smuzhiyun 	memset(&qca->stats, 0, sizeof(struct qcaspi_stats));
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun 	qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL);
818*4882a593Smuzhiyun 	if (!qca->rx_buffer)
819*4882a593Smuzhiyun 		return -ENOBUFS;
820*4882a593Smuzhiyun 
821*4882a593Smuzhiyun 	qca->rx_skb = netdev_alloc_skb_ip_align(dev, qca->net_dev->mtu +
822*4882a593Smuzhiyun 						VLAN_ETH_HLEN);
823*4882a593Smuzhiyun 	if (!qca->rx_skb) {
824*4882a593Smuzhiyun 		kfree(qca->rx_buffer);
825*4882a593Smuzhiyun 		netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n");
826*4882a593Smuzhiyun 		return -ENOBUFS;
827*4882a593Smuzhiyun 	}
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 	return 0;
830*4882a593Smuzhiyun }
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun static void
qcaspi_netdev_uninit(struct net_device * dev)833*4882a593Smuzhiyun qcaspi_netdev_uninit(struct net_device *dev)
834*4882a593Smuzhiyun {
835*4882a593Smuzhiyun 	struct qcaspi *qca = netdev_priv(dev);
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 	kfree(qca->rx_buffer);
838*4882a593Smuzhiyun 	qca->buffer_size = 0;
839*4882a593Smuzhiyun 	dev_kfree_skb(qca->rx_skb);
840*4882a593Smuzhiyun }
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun static const struct net_device_ops qcaspi_netdev_ops = {
843*4882a593Smuzhiyun 	.ndo_init = qcaspi_netdev_init,
844*4882a593Smuzhiyun 	.ndo_uninit = qcaspi_netdev_uninit,
845*4882a593Smuzhiyun 	.ndo_open = qcaspi_netdev_open,
846*4882a593Smuzhiyun 	.ndo_stop = qcaspi_netdev_close,
847*4882a593Smuzhiyun 	.ndo_start_xmit = qcaspi_netdev_xmit,
848*4882a593Smuzhiyun 	.ndo_set_mac_address = eth_mac_addr,
849*4882a593Smuzhiyun 	.ndo_tx_timeout = qcaspi_netdev_tx_timeout,
850*4882a593Smuzhiyun 	.ndo_validate_addr = eth_validate_addr,
851*4882a593Smuzhiyun };
852*4882a593Smuzhiyun 
853*4882a593Smuzhiyun static void
qcaspi_netdev_setup(struct net_device * dev)854*4882a593Smuzhiyun qcaspi_netdev_setup(struct net_device *dev)
855*4882a593Smuzhiyun {
856*4882a593Smuzhiyun 	struct qcaspi *qca = NULL;
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun 	dev->netdev_ops = &qcaspi_netdev_ops;
859*4882a593Smuzhiyun 	qcaspi_set_ethtool_ops(dev);
860*4882a593Smuzhiyun 	dev->watchdog_timeo = QCASPI_TX_TIMEOUT;
861*4882a593Smuzhiyun 	dev->priv_flags &= ~IFF_TX_SKB_SHARING;
862*4882a593Smuzhiyun 	dev->tx_queue_len = 100;
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 	/* MTU range: 46 - 1500 */
865*4882a593Smuzhiyun 	dev->min_mtu = QCAFRM_MIN_MTU;
866*4882a593Smuzhiyun 	dev->max_mtu = QCAFRM_MAX_MTU;
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	qca = netdev_priv(dev);
869*4882a593Smuzhiyun 	memset(qca, 0, sizeof(struct qcaspi));
870*4882a593Smuzhiyun 
871*4882a593Smuzhiyun 	memset(&qca->txr, 0, sizeof(qca->txr));
872*4882a593Smuzhiyun 	qca->txr.count = TX_RING_MAX_LEN;
873*4882a593Smuzhiyun }
874*4882a593Smuzhiyun 
875*4882a593Smuzhiyun static const struct of_device_id qca_spi_of_match[] = {
876*4882a593Smuzhiyun 	{ .compatible = "qca,qca7000" },
877*4882a593Smuzhiyun 	{ /* sentinel */ }
878*4882a593Smuzhiyun };
879*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, qca_spi_of_match);
880*4882a593Smuzhiyun 
881*4882a593Smuzhiyun static int
qca_spi_probe(struct spi_device * spi)882*4882a593Smuzhiyun qca_spi_probe(struct spi_device *spi)
883*4882a593Smuzhiyun {
884*4882a593Smuzhiyun 	struct qcaspi *qca = NULL;
885*4882a593Smuzhiyun 	struct net_device *qcaspi_devs = NULL;
886*4882a593Smuzhiyun 	u8 legacy_mode = 0;
887*4882a593Smuzhiyun 	u16 signature;
888*4882a593Smuzhiyun 	const char *mac;
889*4882a593Smuzhiyun 
890*4882a593Smuzhiyun 	if (!spi->dev.of_node) {
891*4882a593Smuzhiyun 		dev_err(&spi->dev, "Missing device tree\n");
892*4882a593Smuzhiyun 		return -EINVAL;
893*4882a593Smuzhiyun 	}
894*4882a593Smuzhiyun 
895*4882a593Smuzhiyun 	legacy_mode = of_property_read_bool(spi->dev.of_node,
896*4882a593Smuzhiyun 					    "qca,legacy-mode");
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun 	if (qcaspi_clkspeed == 0) {
899*4882a593Smuzhiyun 		if (spi->max_speed_hz)
900*4882a593Smuzhiyun 			qcaspi_clkspeed = spi->max_speed_hz;
901*4882a593Smuzhiyun 		else
902*4882a593Smuzhiyun 			qcaspi_clkspeed = QCASPI_CLK_SPEED;
903*4882a593Smuzhiyun 	}
904*4882a593Smuzhiyun 
905*4882a593Smuzhiyun 	if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) ||
906*4882a593Smuzhiyun 	    (qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) {
907*4882a593Smuzhiyun 		dev_err(&spi->dev, "Invalid clkspeed: %d\n",
908*4882a593Smuzhiyun 			qcaspi_clkspeed);
909*4882a593Smuzhiyun 		return -EINVAL;
910*4882a593Smuzhiyun 	}
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun 	if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) ||
913*4882a593Smuzhiyun 	    (qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) {
914*4882a593Smuzhiyun 		dev_err(&spi->dev, "Invalid burst len: %d\n",
915*4882a593Smuzhiyun 			qcaspi_burst_len);
916*4882a593Smuzhiyun 		return -EINVAL;
917*4882a593Smuzhiyun 	}
918*4882a593Smuzhiyun 
919*4882a593Smuzhiyun 	if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) ||
920*4882a593Smuzhiyun 	    (qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) {
921*4882a593Smuzhiyun 		dev_err(&spi->dev, "Invalid pluggable: %d\n",
922*4882a593Smuzhiyun 			qcaspi_pluggable);
923*4882a593Smuzhiyun 		return -EINVAL;
924*4882a593Smuzhiyun 	}
925*4882a593Smuzhiyun 
926*4882a593Smuzhiyun 	if (wr_verify < QCASPI_WRITE_VERIFY_MIN ||
927*4882a593Smuzhiyun 	    wr_verify > QCASPI_WRITE_VERIFY_MAX) {
928*4882a593Smuzhiyun 		dev_err(&spi->dev, "Invalid write verify: %d\n",
929*4882a593Smuzhiyun 			wr_verify);
930*4882a593Smuzhiyun 		return -EINVAL;
931*4882a593Smuzhiyun 	}
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun 	dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n",
934*4882a593Smuzhiyun 		 QCASPI_DRV_VERSION,
935*4882a593Smuzhiyun 		 qcaspi_clkspeed,
936*4882a593Smuzhiyun 		 qcaspi_burst_len,
937*4882a593Smuzhiyun 		 qcaspi_pluggable);
938*4882a593Smuzhiyun 
939*4882a593Smuzhiyun 	spi->mode = SPI_MODE_3;
940*4882a593Smuzhiyun 	spi->max_speed_hz = qcaspi_clkspeed;
941*4882a593Smuzhiyun 	if (spi_setup(spi) < 0) {
942*4882a593Smuzhiyun 		dev_err(&spi->dev, "Unable to setup SPI device\n");
943*4882a593Smuzhiyun 		return -EFAULT;
944*4882a593Smuzhiyun 	}
945*4882a593Smuzhiyun 
946*4882a593Smuzhiyun 	qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi));
947*4882a593Smuzhiyun 	if (!qcaspi_devs)
948*4882a593Smuzhiyun 		return -ENOMEM;
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun 	qcaspi_netdev_setup(qcaspi_devs);
951*4882a593Smuzhiyun 	SET_NETDEV_DEV(qcaspi_devs, &spi->dev);
952*4882a593Smuzhiyun 
953*4882a593Smuzhiyun 	qca = netdev_priv(qcaspi_devs);
954*4882a593Smuzhiyun 	if (!qca) {
955*4882a593Smuzhiyun 		free_netdev(qcaspi_devs);
956*4882a593Smuzhiyun 		dev_err(&spi->dev, "Fail to retrieve private structure\n");
957*4882a593Smuzhiyun 		return -ENOMEM;
958*4882a593Smuzhiyun 	}
959*4882a593Smuzhiyun 	qca->net_dev = qcaspi_devs;
960*4882a593Smuzhiyun 	qca->spi_dev = spi;
961*4882a593Smuzhiyun 	qca->legacy_mode = legacy_mode;
962*4882a593Smuzhiyun 
963*4882a593Smuzhiyun 	spi_set_drvdata(spi, qcaspi_devs);
964*4882a593Smuzhiyun 
965*4882a593Smuzhiyun 	mac = of_get_mac_address(spi->dev.of_node);
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 	if (!IS_ERR(mac))
968*4882a593Smuzhiyun 		ether_addr_copy(qca->net_dev->dev_addr, mac);
969*4882a593Smuzhiyun 
970*4882a593Smuzhiyun 	if (!is_valid_ether_addr(qca->net_dev->dev_addr)) {
971*4882a593Smuzhiyun 		eth_hw_addr_random(qca->net_dev);
972*4882a593Smuzhiyun 		dev_info(&spi->dev, "Using random MAC address: %pM\n",
973*4882a593Smuzhiyun 			 qca->net_dev->dev_addr);
974*4882a593Smuzhiyun 	}
975*4882a593Smuzhiyun 
976*4882a593Smuzhiyun 	netif_carrier_off(qca->net_dev);
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun 	if (!qcaspi_pluggable) {
979*4882a593Smuzhiyun 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
980*4882a593Smuzhiyun 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
981*4882a593Smuzhiyun 
982*4882a593Smuzhiyun 		if (signature != QCASPI_GOOD_SIGNATURE) {
983*4882a593Smuzhiyun 			dev_err(&spi->dev, "Invalid signature (0x%04X)\n",
984*4882a593Smuzhiyun 				signature);
985*4882a593Smuzhiyun 			free_netdev(qcaspi_devs);
986*4882a593Smuzhiyun 			return -EFAULT;
987*4882a593Smuzhiyun 		}
988*4882a593Smuzhiyun 	}
989*4882a593Smuzhiyun 
990*4882a593Smuzhiyun 	if (register_netdev(qcaspi_devs)) {
991*4882a593Smuzhiyun 		dev_err(&spi->dev, "Unable to register net device %s\n",
992*4882a593Smuzhiyun 			qcaspi_devs->name);
993*4882a593Smuzhiyun 		free_netdev(qcaspi_devs);
994*4882a593Smuzhiyun 		return -EFAULT;
995*4882a593Smuzhiyun 	}
996*4882a593Smuzhiyun 
997*4882a593Smuzhiyun 	qcaspi_init_device_debugfs(qca);
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun 	return 0;
1000*4882a593Smuzhiyun }
1001*4882a593Smuzhiyun 
1002*4882a593Smuzhiyun static int
qca_spi_remove(struct spi_device * spi)1003*4882a593Smuzhiyun qca_spi_remove(struct spi_device *spi)
1004*4882a593Smuzhiyun {
1005*4882a593Smuzhiyun 	struct net_device *qcaspi_devs = spi_get_drvdata(spi);
1006*4882a593Smuzhiyun 	struct qcaspi *qca = netdev_priv(qcaspi_devs);
1007*4882a593Smuzhiyun 
1008*4882a593Smuzhiyun 	qcaspi_remove_device_debugfs(qca);
1009*4882a593Smuzhiyun 
1010*4882a593Smuzhiyun 	unregister_netdev(qcaspi_devs);
1011*4882a593Smuzhiyun 	free_netdev(qcaspi_devs);
1012*4882a593Smuzhiyun 
1013*4882a593Smuzhiyun 	return 0;
1014*4882a593Smuzhiyun }
1015*4882a593Smuzhiyun 
1016*4882a593Smuzhiyun static const struct spi_device_id qca_spi_id[] = {
1017*4882a593Smuzhiyun 	{ "qca7000", 0 },
1018*4882a593Smuzhiyun 	{ /* sentinel */ }
1019*4882a593Smuzhiyun };
1020*4882a593Smuzhiyun MODULE_DEVICE_TABLE(spi, qca_spi_id);
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun static struct spi_driver qca_spi_driver = {
1023*4882a593Smuzhiyun 	.driver	= {
1024*4882a593Smuzhiyun 		.name	= QCASPI_DRV_NAME,
1025*4882a593Smuzhiyun 		.of_match_table = qca_spi_of_match,
1026*4882a593Smuzhiyun 	},
1027*4882a593Smuzhiyun 	.id_table = qca_spi_id,
1028*4882a593Smuzhiyun 	.probe    = qca_spi_probe,
1029*4882a593Smuzhiyun 	.remove   = qca_spi_remove,
1030*4882a593Smuzhiyun };
1031*4882a593Smuzhiyun module_spi_driver(qca_spi_driver);
1032*4882a593Smuzhiyun 
1033*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm Atheros QCA7000 SPI Driver");
1034*4882a593Smuzhiyun MODULE_AUTHOR("Qualcomm Atheros Communications");
1035*4882a593Smuzhiyun MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>");
1036*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
1037*4882a593Smuzhiyun MODULE_VERSION(QCASPI_DRV_VERSION);
1038