xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/qlogic/qed/qed_l2.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2*4882a593Smuzhiyun /* QLogic qed NIC Driver
3*4882a593Smuzhiyun  * Copyright (c) 2015-2017  QLogic Corporation
4*4882a593Smuzhiyun  * Copyright (c) 2019-2020 Marvell International Ltd.
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/types.h>
8*4882a593Smuzhiyun #include <asm/byteorder.h>
9*4882a593Smuzhiyun #include <asm/param.h>
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/dma-mapping.h>
12*4882a593Smuzhiyun #include <linux/etherdevice.h>
13*4882a593Smuzhiyun #include <linux/interrupt.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/pci.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <linux/stddef.h>
19*4882a593Smuzhiyun #include <linux/string.h>
20*4882a593Smuzhiyun #include <linux/workqueue.h>
21*4882a593Smuzhiyun #include <linux/bitops.h>
22*4882a593Smuzhiyun #include <linux/bug.h>
23*4882a593Smuzhiyun #include <linux/vmalloc.h>
24*4882a593Smuzhiyun #include "qed.h"
25*4882a593Smuzhiyun #include <linux/qed/qed_chain.h>
26*4882a593Smuzhiyun #include "qed_cxt.h"
27*4882a593Smuzhiyun #include "qed_dcbx.h"
28*4882a593Smuzhiyun #include "qed_dev_api.h"
29*4882a593Smuzhiyun #include <linux/qed/qed_eth_if.h>
30*4882a593Smuzhiyun #include "qed_hsi.h"
31*4882a593Smuzhiyun #include "qed_hw.h"
32*4882a593Smuzhiyun #include "qed_int.h"
33*4882a593Smuzhiyun #include "qed_l2.h"
34*4882a593Smuzhiyun #include "qed_mcp.h"
35*4882a593Smuzhiyun #include "qed_ptp.h"
36*4882a593Smuzhiyun #include "qed_reg_addr.h"
37*4882a593Smuzhiyun #include "qed_sp.h"
38*4882a593Smuzhiyun #include "qed_sriov.h"
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define QED_MAX_SGES_NUM 16
42*4882a593Smuzhiyun #define CRC32_POLY 0x1edc6f41
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun struct qed_l2_info {
45*4882a593Smuzhiyun 	u32 queues;
46*4882a593Smuzhiyun 	unsigned long **pp_qid_usage;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	/* The lock is meant to synchronize access to the qid usage */
49*4882a593Smuzhiyun 	struct mutex lock;
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun 
qed_l2_alloc(struct qed_hwfn * p_hwfn)52*4882a593Smuzhiyun int qed_l2_alloc(struct qed_hwfn *p_hwfn)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun 	struct qed_l2_info *p_l2_info;
55*4882a593Smuzhiyun 	unsigned long **pp_qids;
56*4882a593Smuzhiyun 	u32 i;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	if (!QED_IS_L2_PERSONALITY(p_hwfn))
59*4882a593Smuzhiyun 		return 0;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	p_l2_info = kzalloc(sizeof(*p_l2_info), GFP_KERNEL);
62*4882a593Smuzhiyun 	if (!p_l2_info)
63*4882a593Smuzhiyun 		return -ENOMEM;
64*4882a593Smuzhiyun 	p_hwfn->p_l2_info = p_l2_info;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	if (IS_PF(p_hwfn->cdev)) {
67*4882a593Smuzhiyun 		p_l2_info->queues = RESC_NUM(p_hwfn, QED_L2_QUEUE);
68*4882a593Smuzhiyun 	} else {
69*4882a593Smuzhiyun 		u8 rx = 0, tx = 0;
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 		qed_vf_get_num_rxqs(p_hwfn, &rx);
72*4882a593Smuzhiyun 		qed_vf_get_num_txqs(p_hwfn, &tx);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 		p_l2_info->queues = max_t(u8, rx, tx);
75*4882a593Smuzhiyun 	}
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	pp_qids = kcalloc(p_l2_info->queues, sizeof(unsigned long *),
78*4882a593Smuzhiyun 			  GFP_KERNEL);
79*4882a593Smuzhiyun 	if (!pp_qids)
80*4882a593Smuzhiyun 		return -ENOMEM;
81*4882a593Smuzhiyun 	p_l2_info->pp_qid_usage = pp_qids;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	for (i = 0; i < p_l2_info->queues; i++) {
84*4882a593Smuzhiyun 		pp_qids[i] = kzalloc(MAX_QUEUES_PER_QZONE / 8, GFP_KERNEL);
85*4882a593Smuzhiyun 		if (!pp_qids[i])
86*4882a593Smuzhiyun 			return -ENOMEM;
87*4882a593Smuzhiyun 	}
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	return 0;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun 
qed_l2_setup(struct qed_hwfn * p_hwfn)92*4882a593Smuzhiyun void qed_l2_setup(struct qed_hwfn *p_hwfn)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	if (!QED_IS_L2_PERSONALITY(p_hwfn))
95*4882a593Smuzhiyun 		return;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	mutex_init(&p_hwfn->p_l2_info->lock);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
qed_l2_free(struct qed_hwfn * p_hwfn)100*4882a593Smuzhiyun void qed_l2_free(struct qed_hwfn *p_hwfn)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	u32 i;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	if (!QED_IS_L2_PERSONALITY(p_hwfn))
105*4882a593Smuzhiyun 		return;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	if (!p_hwfn->p_l2_info)
108*4882a593Smuzhiyun 		return;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (!p_hwfn->p_l2_info->pp_qid_usage)
111*4882a593Smuzhiyun 		goto out_l2_info;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	/* Free until hit first uninitialized entry */
114*4882a593Smuzhiyun 	for (i = 0; i < p_hwfn->p_l2_info->queues; i++) {
115*4882a593Smuzhiyun 		if (!p_hwfn->p_l2_info->pp_qid_usage[i])
116*4882a593Smuzhiyun 			break;
117*4882a593Smuzhiyun 		kfree(p_hwfn->p_l2_info->pp_qid_usage[i]);
118*4882a593Smuzhiyun 	}
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	kfree(p_hwfn->p_l2_info->pp_qid_usage);
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun out_l2_info:
123*4882a593Smuzhiyun 	kfree(p_hwfn->p_l2_info);
124*4882a593Smuzhiyun 	p_hwfn->p_l2_info = NULL;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun 
qed_eth_queue_qid_usage_add(struct qed_hwfn * p_hwfn,struct qed_queue_cid * p_cid)127*4882a593Smuzhiyun static bool qed_eth_queue_qid_usage_add(struct qed_hwfn *p_hwfn,
128*4882a593Smuzhiyun 					struct qed_queue_cid *p_cid)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	struct qed_l2_info *p_l2_info = p_hwfn->p_l2_info;
131*4882a593Smuzhiyun 	u16 queue_id = p_cid->rel.queue_id;
132*4882a593Smuzhiyun 	bool b_rc = true;
133*4882a593Smuzhiyun 	u8 first;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	mutex_lock(&p_l2_info->lock);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	if (queue_id >= p_l2_info->queues) {
138*4882a593Smuzhiyun 		DP_NOTICE(p_hwfn,
139*4882a593Smuzhiyun 			  "Requested to increase usage for qzone %04x out of %08x\n",
140*4882a593Smuzhiyun 			  queue_id, p_l2_info->queues);
141*4882a593Smuzhiyun 		b_rc = false;
142*4882a593Smuzhiyun 		goto out;
143*4882a593Smuzhiyun 	}
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	first = (u8)find_first_zero_bit(p_l2_info->pp_qid_usage[queue_id],
146*4882a593Smuzhiyun 					MAX_QUEUES_PER_QZONE);
147*4882a593Smuzhiyun 	if (first >= MAX_QUEUES_PER_QZONE) {
148*4882a593Smuzhiyun 		b_rc = false;
149*4882a593Smuzhiyun 		goto out;
150*4882a593Smuzhiyun 	}
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	__set_bit(first, p_l2_info->pp_qid_usage[queue_id]);
153*4882a593Smuzhiyun 	p_cid->qid_usage_idx = first;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun out:
156*4882a593Smuzhiyun 	mutex_unlock(&p_l2_info->lock);
157*4882a593Smuzhiyun 	return b_rc;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
qed_eth_queue_qid_usage_del(struct qed_hwfn * p_hwfn,struct qed_queue_cid * p_cid)160*4882a593Smuzhiyun static void qed_eth_queue_qid_usage_del(struct qed_hwfn *p_hwfn,
161*4882a593Smuzhiyun 					struct qed_queue_cid *p_cid)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	mutex_lock(&p_hwfn->p_l2_info->lock);
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	clear_bit(p_cid->qid_usage_idx,
166*4882a593Smuzhiyun 		  p_hwfn->p_l2_info->pp_qid_usage[p_cid->rel.queue_id]);
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	mutex_unlock(&p_hwfn->p_l2_info->lock);
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
qed_eth_queue_cid_release(struct qed_hwfn * p_hwfn,struct qed_queue_cid * p_cid)171*4882a593Smuzhiyun void qed_eth_queue_cid_release(struct qed_hwfn *p_hwfn,
172*4882a593Smuzhiyun 			       struct qed_queue_cid *p_cid)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	bool b_legacy_vf = !!(p_cid->vf_legacy & QED_QCID_LEGACY_VF_CID);
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	if (IS_PF(p_hwfn->cdev) && !b_legacy_vf)
177*4882a593Smuzhiyun 		_qed_cxt_release_cid(p_hwfn, p_cid->cid, p_cid->vfid);
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	/* For PF's VFs we maintain the index inside queue-zone in IOV */
180*4882a593Smuzhiyun 	if (p_cid->vfid == QED_QUEUE_CID_SELF)
181*4882a593Smuzhiyun 		qed_eth_queue_qid_usage_del(p_hwfn, p_cid);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	vfree(p_cid);
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun /* The internal is only meant to be directly called by PFs initializeing CIDs
187*4882a593Smuzhiyun  * for their VFs.
188*4882a593Smuzhiyun  */
189*4882a593Smuzhiyun static struct qed_queue_cid *
_qed_eth_queue_to_cid(struct qed_hwfn * p_hwfn,u16 opaque_fid,u32 cid,struct qed_queue_start_common_params * p_params,bool b_is_rx,struct qed_queue_cid_vf_params * p_vf_params)190*4882a593Smuzhiyun _qed_eth_queue_to_cid(struct qed_hwfn *p_hwfn,
191*4882a593Smuzhiyun 		      u16 opaque_fid,
192*4882a593Smuzhiyun 		      u32 cid,
193*4882a593Smuzhiyun 		      struct qed_queue_start_common_params *p_params,
194*4882a593Smuzhiyun 		      bool b_is_rx,
195*4882a593Smuzhiyun 		      struct qed_queue_cid_vf_params *p_vf_params)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun 	struct qed_queue_cid *p_cid;
198*4882a593Smuzhiyun 	int rc;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	p_cid = vzalloc(sizeof(*p_cid));
201*4882a593Smuzhiyun 	if (!p_cid)
202*4882a593Smuzhiyun 		return NULL;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	p_cid->opaque_fid = opaque_fid;
205*4882a593Smuzhiyun 	p_cid->cid = cid;
206*4882a593Smuzhiyun 	p_cid->p_owner = p_hwfn;
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	/* Fill in parameters */
209*4882a593Smuzhiyun 	p_cid->rel.vport_id = p_params->vport_id;
210*4882a593Smuzhiyun 	p_cid->rel.queue_id = p_params->queue_id;
211*4882a593Smuzhiyun 	p_cid->rel.stats_id = p_params->stats_id;
212*4882a593Smuzhiyun 	p_cid->sb_igu_id = p_params->p_sb->igu_sb_id;
213*4882a593Smuzhiyun 	p_cid->b_is_rx = b_is_rx;
214*4882a593Smuzhiyun 	p_cid->sb_idx = p_params->sb_idx;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	/* Fill-in bits related to VFs' queues if information was provided */
217*4882a593Smuzhiyun 	if (p_vf_params) {
218*4882a593Smuzhiyun 		p_cid->vfid = p_vf_params->vfid;
219*4882a593Smuzhiyun 		p_cid->vf_qid = p_vf_params->vf_qid;
220*4882a593Smuzhiyun 		p_cid->vf_legacy = p_vf_params->vf_legacy;
221*4882a593Smuzhiyun 	} else {
222*4882a593Smuzhiyun 		p_cid->vfid = QED_QUEUE_CID_SELF;
223*4882a593Smuzhiyun 	}
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	/* Don't try calculating the absolute indices for VFs */
226*4882a593Smuzhiyun 	if (IS_VF(p_hwfn->cdev)) {
227*4882a593Smuzhiyun 		p_cid->abs = p_cid->rel;
228*4882a593Smuzhiyun 		goto out;
229*4882a593Smuzhiyun 	}
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	/* Calculate the engine-absolute indices of the resources.
232*4882a593Smuzhiyun 	 * This would guarantee they're valid later on.
233*4882a593Smuzhiyun 	 * In some cases [SBs] we already have the right values.
234*4882a593Smuzhiyun 	 */
235*4882a593Smuzhiyun 	rc = qed_fw_vport(p_hwfn, p_cid->rel.vport_id, &p_cid->abs.vport_id);
236*4882a593Smuzhiyun 	if (rc)
237*4882a593Smuzhiyun 		goto fail;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	rc = qed_fw_l2_queue(p_hwfn, p_cid->rel.queue_id, &p_cid->abs.queue_id);
240*4882a593Smuzhiyun 	if (rc)
241*4882a593Smuzhiyun 		goto fail;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	/* In case of a PF configuring its VF's queues, the stats-id is already
244*4882a593Smuzhiyun 	 * absolute [since there's a single index that's suitable per-VF].
245*4882a593Smuzhiyun 	 */
246*4882a593Smuzhiyun 	if (p_cid->vfid == QED_QUEUE_CID_SELF) {
247*4882a593Smuzhiyun 		rc = qed_fw_vport(p_hwfn, p_cid->rel.stats_id,
248*4882a593Smuzhiyun 				  &p_cid->abs.stats_id);
249*4882a593Smuzhiyun 		if (rc)
250*4882a593Smuzhiyun 			goto fail;
251*4882a593Smuzhiyun 	} else {
252*4882a593Smuzhiyun 		p_cid->abs.stats_id = p_cid->rel.stats_id;
253*4882a593Smuzhiyun 	}
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun out:
256*4882a593Smuzhiyun 	/* VF-images have provided the qid_usage_idx on their own.
257*4882a593Smuzhiyun 	 * Otherwise, we need to allocate a unique one.
258*4882a593Smuzhiyun 	 */
259*4882a593Smuzhiyun 	if (!p_vf_params) {
260*4882a593Smuzhiyun 		if (!qed_eth_queue_qid_usage_add(p_hwfn, p_cid))
261*4882a593Smuzhiyun 			goto fail;
262*4882a593Smuzhiyun 	} else {
263*4882a593Smuzhiyun 		p_cid->qid_usage_idx = p_vf_params->qid_usage_idx;
264*4882a593Smuzhiyun 	}
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	DP_VERBOSE(p_hwfn,
267*4882a593Smuzhiyun 		   QED_MSG_SP,
268*4882a593Smuzhiyun 		   "opaque_fid: %04x CID %08x vport %02x [%02x] qzone %04x.%02x [%04x] stats %02x [%02x] SB %04x PI %02x\n",
269*4882a593Smuzhiyun 		   p_cid->opaque_fid,
270*4882a593Smuzhiyun 		   p_cid->cid,
271*4882a593Smuzhiyun 		   p_cid->rel.vport_id,
272*4882a593Smuzhiyun 		   p_cid->abs.vport_id,
273*4882a593Smuzhiyun 		   p_cid->rel.queue_id,
274*4882a593Smuzhiyun 		   p_cid->qid_usage_idx,
275*4882a593Smuzhiyun 		   p_cid->abs.queue_id,
276*4882a593Smuzhiyun 		   p_cid->rel.stats_id,
277*4882a593Smuzhiyun 		   p_cid->abs.stats_id, p_cid->sb_igu_id, p_cid->sb_idx);
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	return p_cid;
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun fail:
282*4882a593Smuzhiyun 	vfree(p_cid);
283*4882a593Smuzhiyun 	return NULL;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun struct qed_queue_cid *
qed_eth_queue_to_cid(struct qed_hwfn * p_hwfn,u16 opaque_fid,struct qed_queue_start_common_params * p_params,bool b_is_rx,struct qed_queue_cid_vf_params * p_vf_params)287*4882a593Smuzhiyun qed_eth_queue_to_cid(struct qed_hwfn *p_hwfn,
288*4882a593Smuzhiyun 		     u16 opaque_fid,
289*4882a593Smuzhiyun 		     struct qed_queue_start_common_params *p_params,
290*4882a593Smuzhiyun 		     bool b_is_rx,
291*4882a593Smuzhiyun 		     struct qed_queue_cid_vf_params *p_vf_params)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun 	struct qed_queue_cid *p_cid;
294*4882a593Smuzhiyun 	u8 vfid = QED_CXT_PF_CID;
295*4882a593Smuzhiyun 	bool b_legacy_vf = false;
296*4882a593Smuzhiyun 	u32 cid = 0;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	/* In case of legacy VFs, The CID can be derived from the additional
299*4882a593Smuzhiyun 	 * VF parameters - the VF assumes queue X uses CID X, so we can simply
300*4882a593Smuzhiyun 	 * use the vf_qid for this purpose as well.
301*4882a593Smuzhiyun 	 */
302*4882a593Smuzhiyun 	if (p_vf_params) {
303*4882a593Smuzhiyun 		vfid = p_vf_params->vfid;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 		if (p_vf_params->vf_legacy & QED_QCID_LEGACY_VF_CID) {
306*4882a593Smuzhiyun 			b_legacy_vf = true;
307*4882a593Smuzhiyun 			cid = p_vf_params->vf_qid;
308*4882a593Smuzhiyun 		}
309*4882a593Smuzhiyun 	}
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	/* Get a unique firmware CID for this queue, in case it's a PF.
312*4882a593Smuzhiyun 	 * VF's don't need a CID as the queue configuration will be done
313*4882a593Smuzhiyun 	 * by PF.
314*4882a593Smuzhiyun 	 */
315*4882a593Smuzhiyun 	if (IS_PF(p_hwfn->cdev) && !b_legacy_vf) {
316*4882a593Smuzhiyun 		if (_qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_ETH,
317*4882a593Smuzhiyun 					 &cid, vfid)) {
318*4882a593Smuzhiyun 			DP_NOTICE(p_hwfn, "Failed to acquire cid\n");
319*4882a593Smuzhiyun 			return NULL;
320*4882a593Smuzhiyun 		}
321*4882a593Smuzhiyun 	}
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	p_cid = _qed_eth_queue_to_cid(p_hwfn, opaque_fid, cid,
324*4882a593Smuzhiyun 				      p_params, b_is_rx, p_vf_params);
325*4882a593Smuzhiyun 	if (!p_cid && IS_PF(p_hwfn->cdev) && !b_legacy_vf)
326*4882a593Smuzhiyun 		_qed_cxt_release_cid(p_hwfn, cid, vfid);
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	return p_cid;
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun static struct qed_queue_cid *
qed_eth_queue_to_cid_pf(struct qed_hwfn * p_hwfn,u16 opaque_fid,bool b_is_rx,struct qed_queue_start_common_params * p_params)332*4882a593Smuzhiyun qed_eth_queue_to_cid_pf(struct qed_hwfn *p_hwfn,
333*4882a593Smuzhiyun 			u16 opaque_fid,
334*4882a593Smuzhiyun 			bool b_is_rx,
335*4882a593Smuzhiyun 			struct qed_queue_start_common_params *p_params)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun 	return qed_eth_queue_to_cid(p_hwfn, opaque_fid, p_params, b_is_rx,
338*4882a593Smuzhiyun 				    NULL);
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun 
qed_sp_eth_vport_start(struct qed_hwfn * p_hwfn,struct qed_sp_vport_start_params * p_params)341*4882a593Smuzhiyun int qed_sp_eth_vport_start(struct qed_hwfn *p_hwfn,
342*4882a593Smuzhiyun 			   struct qed_sp_vport_start_params *p_params)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun 	struct vport_start_ramrod_data *p_ramrod = NULL;
345*4882a593Smuzhiyun 	struct eth_vport_tpa_param *tpa_param;
346*4882a593Smuzhiyun 	struct qed_spq_entry *p_ent =  NULL;
347*4882a593Smuzhiyun 	struct qed_sp_init_data init_data;
348*4882a593Smuzhiyun 	u16 min_size, rx_mode = 0;
349*4882a593Smuzhiyun 	u8 abs_vport_id = 0;
350*4882a593Smuzhiyun 	int rc;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
353*4882a593Smuzhiyun 	if (rc)
354*4882a593Smuzhiyun 		return rc;
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	memset(&init_data, 0, sizeof(init_data));
357*4882a593Smuzhiyun 	init_data.cid = qed_spq_get_cid(p_hwfn);
358*4882a593Smuzhiyun 	init_data.opaque_fid = p_params->opaque_fid;
359*4882a593Smuzhiyun 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	rc = qed_sp_init_request(p_hwfn, &p_ent,
362*4882a593Smuzhiyun 				 ETH_RAMROD_VPORT_START,
363*4882a593Smuzhiyun 				 PROTOCOLID_ETH, &init_data);
364*4882a593Smuzhiyun 	if (rc)
365*4882a593Smuzhiyun 		return rc;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	p_ramrod		= &p_ent->ramrod.vport_start;
368*4882a593Smuzhiyun 	p_ramrod->vport_id	= abs_vport_id;
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	p_ramrod->mtu			= cpu_to_le16(p_params->mtu);
371*4882a593Smuzhiyun 	p_ramrod->handle_ptp_pkts	= p_params->handle_ptp_pkts;
372*4882a593Smuzhiyun 	p_ramrod->inner_vlan_removal_en	= p_params->remove_inner_vlan;
373*4882a593Smuzhiyun 	p_ramrod->drop_ttl0_en		= p_params->drop_ttl0;
374*4882a593Smuzhiyun 	p_ramrod->untagged		= p_params->only_untagged;
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, 1);
377*4882a593Smuzhiyun 	SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, 1);
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	p_ramrod->rx_mode.state = cpu_to_le16(rx_mode);
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	/* TPA related fields */
382*4882a593Smuzhiyun 	tpa_param = &p_ramrod->tpa_param;
383*4882a593Smuzhiyun 	memset(tpa_param, 0, sizeof(*tpa_param));
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	tpa_param->max_buff_num = p_params->max_buffers_per_cqe;
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 	switch (p_params->tpa_mode) {
388*4882a593Smuzhiyun 	case QED_TPA_MODE_GRO:
389*4882a593Smuzhiyun 		min_size = p_params->mtu / 2;
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 		tpa_param->tpa_max_aggs_num = ETH_TPA_MAX_AGGS_NUM;
392*4882a593Smuzhiyun 		tpa_param->tpa_max_size = cpu_to_le16(U16_MAX);
393*4882a593Smuzhiyun 		tpa_param->tpa_min_size_to_cont = cpu_to_le16(min_size);
394*4882a593Smuzhiyun 		tpa_param->tpa_min_size_to_start = cpu_to_le16(min_size);
395*4882a593Smuzhiyun 		tpa_param->tpa_ipv4_en_flg = 1;
396*4882a593Smuzhiyun 		tpa_param->tpa_ipv6_en_flg = 1;
397*4882a593Smuzhiyun 		tpa_param->tpa_pkt_split_flg = 1;
398*4882a593Smuzhiyun 		tpa_param->tpa_gro_consistent_flg = 1;
399*4882a593Smuzhiyun 	default:
400*4882a593Smuzhiyun 		break;
401*4882a593Smuzhiyun 	}
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	p_ramrod->tx_switching_en = p_params->tx_switching;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	p_ramrod->ctl_frame_mac_check_en = !!p_params->check_mac;
406*4882a593Smuzhiyun 	p_ramrod->ctl_frame_ethtype_check_en = !!p_params->check_ethtype;
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	/* Software Function ID in hwfn (PFs are 0 - 15, VFs are 16 - 135) */
409*4882a593Smuzhiyun 	p_ramrod->sw_fid = qed_concrete_to_sw_fid(p_hwfn->cdev,
410*4882a593Smuzhiyun 						  p_params->concrete_fid);
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	return qed_spq_post(p_hwfn, p_ent, NULL);
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun 
qed_sp_vport_start(struct qed_hwfn * p_hwfn,struct qed_sp_vport_start_params * p_params)415*4882a593Smuzhiyun static int qed_sp_vport_start(struct qed_hwfn *p_hwfn,
416*4882a593Smuzhiyun 			      struct qed_sp_vport_start_params *p_params)
417*4882a593Smuzhiyun {
418*4882a593Smuzhiyun 	if (IS_VF(p_hwfn->cdev)) {
419*4882a593Smuzhiyun 		return qed_vf_pf_vport_start(p_hwfn, p_params->vport_id,
420*4882a593Smuzhiyun 					     p_params->mtu,
421*4882a593Smuzhiyun 					     p_params->remove_inner_vlan,
422*4882a593Smuzhiyun 					     p_params->tpa_mode,
423*4882a593Smuzhiyun 					     p_params->max_buffers_per_cqe,
424*4882a593Smuzhiyun 					     p_params->only_untagged);
425*4882a593Smuzhiyun 	}
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	return qed_sp_eth_vport_start(p_hwfn, p_params);
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun static int
qed_sp_vport_update_rss(struct qed_hwfn * p_hwfn,struct vport_update_ramrod_data * p_ramrod,struct qed_rss_params * p_rss)431*4882a593Smuzhiyun qed_sp_vport_update_rss(struct qed_hwfn *p_hwfn,
432*4882a593Smuzhiyun 			struct vport_update_ramrod_data *p_ramrod,
433*4882a593Smuzhiyun 			struct qed_rss_params *p_rss)
434*4882a593Smuzhiyun {
435*4882a593Smuzhiyun 	struct eth_vport_rss_config *p_config;
436*4882a593Smuzhiyun 	u16 capabilities = 0;
437*4882a593Smuzhiyun 	int i, table_size;
438*4882a593Smuzhiyun 	int rc = 0;
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	if (!p_rss) {
441*4882a593Smuzhiyun 		p_ramrod->common.update_rss_flg = 0;
442*4882a593Smuzhiyun 		return rc;
443*4882a593Smuzhiyun 	}
444*4882a593Smuzhiyun 	p_config = &p_ramrod->rss_config;
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	BUILD_BUG_ON(QED_RSS_IND_TABLE_SIZE != ETH_RSS_IND_TABLE_ENTRIES_NUM);
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	rc = qed_fw_rss_eng(p_hwfn, p_rss->rss_eng_id, &p_config->rss_id);
449*4882a593Smuzhiyun 	if (rc)
450*4882a593Smuzhiyun 		return rc;
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	p_ramrod->common.update_rss_flg = p_rss->update_rss_config;
453*4882a593Smuzhiyun 	p_config->update_rss_capabilities = p_rss->update_rss_capabilities;
454*4882a593Smuzhiyun 	p_config->update_rss_ind_table = p_rss->update_rss_ind_table;
455*4882a593Smuzhiyun 	p_config->update_rss_key = p_rss->update_rss_key;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	p_config->rss_mode = p_rss->rss_enable ?
458*4882a593Smuzhiyun 			     ETH_VPORT_RSS_MODE_REGULAR :
459*4882a593Smuzhiyun 			     ETH_VPORT_RSS_MODE_DISABLED;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	SET_FIELD(capabilities,
462*4882a593Smuzhiyun 		  ETH_VPORT_RSS_CONFIG_IPV4_CAPABILITY,
463*4882a593Smuzhiyun 		  !!(p_rss->rss_caps & QED_RSS_IPV4));
464*4882a593Smuzhiyun 	SET_FIELD(capabilities,
465*4882a593Smuzhiyun 		  ETH_VPORT_RSS_CONFIG_IPV6_CAPABILITY,
466*4882a593Smuzhiyun 		  !!(p_rss->rss_caps & QED_RSS_IPV6));
467*4882a593Smuzhiyun 	SET_FIELD(capabilities,
468*4882a593Smuzhiyun 		  ETH_VPORT_RSS_CONFIG_IPV4_TCP_CAPABILITY,
469*4882a593Smuzhiyun 		  !!(p_rss->rss_caps & QED_RSS_IPV4_TCP));
470*4882a593Smuzhiyun 	SET_FIELD(capabilities,
471*4882a593Smuzhiyun 		  ETH_VPORT_RSS_CONFIG_IPV6_TCP_CAPABILITY,
472*4882a593Smuzhiyun 		  !!(p_rss->rss_caps & QED_RSS_IPV6_TCP));
473*4882a593Smuzhiyun 	SET_FIELD(capabilities,
474*4882a593Smuzhiyun 		  ETH_VPORT_RSS_CONFIG_IPV4_UDP_CAPABILITY,
475*4882a593Smuzhiyun 		  !!(p_rss->rss_caps & QED_RSS_IPV4_UDP));
476*4882a593Smuzhiyun 	SET_FIELD(capabilities,
477*4882a593Smuzhiyun 		  ETH_VPORT_RSS_CONFIG_IPV6_UDP_CAPABILITY,
478*4882a593Smuzhiyun 		  !!(p_rss->rss_caps & QED_RSS_IPV6_UDP));
479*4882a593Smuzhiyun 	p_config->tbl_size = p_rss->rss_table_size_log;
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun 	p_config->capabilities = cpu_to_le16(capabilities);
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP,
484*4882a593Smuzhiyun 		   "update rss flag %d, rss_mode = %d, update_caps = %d, capabilities = %d, update_ind = %d, update_rss_key = %d\n",
485*4882a593Smuzhiyun 		   p_ramrod->common.update_rss_flg,
486*4882a593Smuzhiyun 		   p_config->rss_mode,
487*4882a593Smuzhiyun 		   p_config->update_rss_capabilities,
488*4882a593Smuzhiyun 		   p_config->capabilities,
489*4882a593Smuzhiyun 		   p_config->update_rss_ind_table, p_config->update_rss_key);
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	table_size = min_t(int, QED_RSS_IND_TABLE_SIZE,
492*4882a593Smuzhiyun 			   1 << p_config->tbl_size);
493*4882a593Smuzhiyun 	for (i = 0; i < table_size; i++) {
494*4882a593Smuzhiyun 		struct qed_queue_cid *p_queue = p_rss->rss_ind_table[i];
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 		if (!p_queue)
497*4882a593Smuzhiyun 			return -EINVAL;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 		p_config->indirection_table[i] =
500*4882a593Smuzhiyun 		    cpu_to_le16(p_queue->abs.queue_id);
501*4882a593Smuzhiyun 	}
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP,
504*4882a593Smuzhiyun 		   "Configured RSS indirection table [%d entries]:\n",
505*4882a593Smuzhiyun 		   table_size);
506*4882a593Smuzhiyun 	for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i += 0x10) {
507*4882a593Smuzhiyun 		DP_VERBOSE(p_hwfn,
508*4882a593Smuzhiyun 			   NETIF_MSG_IFUP,
509*4882a593Smuzhiyun 			   "%04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x\n",
510*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i]),
511*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 1]),
512*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 2]),
513*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 3]),
514*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 4]),
515*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 5]),
516*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 6]),
517*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 7]),
518*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 8]),
519*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 9]),
520*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 10]),
521*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 11]),
522*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 12]),
523*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 13]),
524*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 14]),
525*4882a593Smuzhiyun 			   le16_to_cpu(p_config->indirection_table[i + 15]));
526*4882a593Smuzhiyun 	}
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	for (i = 0; i < 10; i++)
529*4882a593Smuzhiyun 		p_config->rss_key[i] = cpu_to_le32(p_rss->rss_key[i]);
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	return rc;
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun static void
qed_sp_update_accept_mode(struct qed_hwfn * p_hwfn,struct vport_update_ramrod_data * p_ramrod,struct qed_filter_accept_flags accept_flags)535*4882a593Smuzhiyun qed_sp_update_accept_mode(struct qed_hwfn *p_hwfn,
536*4882a593Smuzhiyun 			  struct vport_update_ramrod_data *p_ramrod,
537*4882a593Smuzhiyun 			  struct qed_filter_accept_flags accept_flags)
538*4882a593Smuzhiyun {
539*4882a593Smuzhiyun 	p_ramrod->common.update_rx_mode_flg =
540*4882a593Smuzhiyun 		accept_flags.update_rx_mode_config;
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	p_ramrod->common.update_tx_mode_flg =
543*4882a593Smuzhiyun 		accept_flags.update_tx_mode_config;
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	/* Set Rx mode accept flags */
546*4882a593Smuzhiyun 	if (p_ramrod->common.update_rx_mode_flg) {
547*4882a593Smuzhiyun 		u8 accept_filter = accept_flags.rx_accept_filter;
548*4882a593Smuzhiyun 		u16 state = 0;
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 		SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_DROP_ALL,
551*4882a593Smuzhiyun 			  !(!!(accept_filter & QED_ACCEPT_UCAST_MATCHED) ||
552*4882a593Smuzhiyun 			    !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED)));
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 		SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_ACCEPT_UNMATCHED,
555*4882a593Smuzhiyun 			  !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED));
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun 		SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_DROP_ALL,
558*4882a593Smuzhiyun 			  !(!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) ||
559*4882a593Smuzhiyun 			    !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun 		SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_ACCEPT_ALL,
562*4882a593Smuzhiyun 			  (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) &&
563*4882a593Smuzhiyun 			   !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 		SET_FIELD(state, ETH_VPORT_RX_MODE_BCAST_ACCEPT_ALL,
566*4882a593Smuzhiyun 			  !!(accept_filter & QED_ACCEPT_BCAST));
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 		SET_FIELD(state, ETH_VPORT_RX_MODE_ACCEPT_ANY_VNI,
569*4882a593Smuzhiyun 			  !!(accept_filter & QED_ACCEPT_ANY_VNI));
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 		p_ramrod->rx_mode.state = cpu_to_le16(state);
572*4882a593Smuzhiyun 		DP_VERBOSE(p_hwfn, QED_MSG_SP,
573*4882a593Smuzhiyun 			   "p_ramrod->rx_mode.state = 0x%x\n", state);
574*4882a593Smuzhiyun 	}
575*4882a593Smuzhiyun 
576*4882a593Smuzhiyun 	/* Set Tx mode accept flags */
577*4882a593Smuzhiyun 	if (p_ramrod->common.update_tx_mode_flg) {
578*4882a593Smuzhiyun 		u8 accept_filter = accept_flags.tx_accept_filter;
579*4882a593Smuzhiyun 		u16 state = 0;
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 		SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_DROP_ALL,
582*4882a593Smuzhiyun 			  !!(accept_filter & QED_ACCEPT_NONE));
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 		SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_DROP_ALL,
585*4882a593Smuzhiyun 			  !!(accept_filter & QED_ACCEPT_NONE));
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 		SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_ACCEPT_ALL,
588*4882a593Smuzhiyun 			  (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) &&
589*4882a593Smuzhiyun 			   !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 		SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_ACCEPT_ALL,
592*4882a593Smuzhiyun 			  (!!(accept_filter & QED_ACCEPT_UCAST_MATCHED) &&
593*4882a593Smuzhiyun 			   !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED)));
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 		SET_FIELD(state, ETH_VPORT_TX_MODE_BCAST_ACCEPT_ALL,
596*4882a593Smuzhiyun 			  !!(accept_filter & QED_ACCEPT_BCAST));
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 		p_ramrod->tx_mode.state = cpu_to_le16(state);
599*4882a593Smuzhiyun 		DP_VERBOSE(p_hwfn, QED_MSG_SP,
600*4882a593Smuzhiyun 			   "p_ramrod->tx_mode.state = 0x%x\n", state);
601*4882a593Smuzhiyun 	}
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun static void
qed_sp_vport_update_sge_tpa(struct qed_hwfn * p_hwfn,struct vport_update_ramrod_data * p_ramrod,const struct qed_sge_tpa_params * param)605*4882a593Smuzhiyun qed_sp_vport_update_sge_tpa(struct qed_hwfn *p_hwfn,
606*4882a593Smuzhiyun 			    struct vport_update_ramrod_data *p_ramrod,
607*4882a593Smuzhiyun 			    const struct qed_sge_tpa_params *param)
608*4882a593Smuzhiyun {
609*4882a593Smuzhiyun 	struct eth_vport_tpa_param *tpa;
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	if (!param) {
612*4882a593Smuzhiyun 		p_ramrod->common.update_tpa_param_flg = 0;
613*4882a593Smuzhiyun 		p_ramrod->common.update_tpa_en_flg = 0;
614*4882a593Smuzhiyun 		p_ramrod->common.update_tpa_param_flg = 0;
615*4882a593Smuzhiyun 		return;
616*4882a593Smuzhiyun 	}
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 	p_ramrod->common.update_tpa_en_flg = param->update_tpa_en_flg;
619*4882a593Smuzhiyun 	tpa = &p_ramrod->tpa_param;
620*4882a593Smuzhiyun 	tpa->tpa_ipv4_en_flg = param->tpa_ipv4_en_flg;
621*4882a593Smuzhiyun 	tpa->tpa_ipv6_en_flg = param->tpa_ipv6_en_flg;
622*4882a593Smuzhiyun 	tpa->tpa_ipv4_tunn_en_flg = param->tpa_ipv4_tunn_en_flg;
623*4882a593Smuzhiyun 	tpa->tpa_ipv6_tunn_en_flg = param->tpa_ipv6_tunn_en_flg;
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun 	p_ramrod->common.update_tpa_param_flg = param->update_tpa_param_flg;
626*4882a593Smuzhiyun 	tpa->max_buff_num = param->max_buffers_per_cqe;
627*4882a593Smuzhiyun 	tpa->tpa_pkt_split_flg = param->tpa_pkt_split_flg;
628*4882a593Smuzhiyun 	tpa->tpa_hdr_data_split_flg = param->tpa_hdr_data_split_flg;
629*4882a593Smuzhiyun 	tpa->tpa_gro_consistent_flg = param->tpa_gro_consistent_flg;
630*4882a593Smuzhiyun 	tpa->tpa_max_aggs_num = param->tpa_max_aggs_num;
631*4882a593Smuzhiyun 	tpa->tpa_max_size = cpu_to_le16(param->tpa_max_size);
632*4882a593Smuzhiyun 	tpa->tpa_min_size_to_start = cpu_to_le16(param->tpa_min_size_to_start);
633*4882a593Smuzhiyun 	tpa->tpa_min_size_to_cont = cpu_to_le16(param->tpa_min_size_to_cont);
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun static void
qed_sp_update_mcast_bin(struct qed_hwfn * p_hwfn,struct vport_update_ramrod_data * p_ramrod,struct qed_sp_vport_update_params * p_params)637*4882a593Smuzhiyun qed_sp_update_mcast_bin(struct qed_hwfn *p_hwfn,
638*4882a593Smuzhiyun 			struct vport_update_ramrod_data *p_ramrod,
639*4882a593Smuzhiyun 			struct qed_sp_vport_update_params *p_params)
640*4882a593Smuzhiyun {
641*4882a593Smuzhiyun 	int i;
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	memset(&p_ramrod->approx_mcast.bins, 0,
644*4882a593Smuzhiyun 	       sizeof(p_ramrod->approx_mcast.bins));
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	if (!p_params->update_approx_mcast_flg)
647*4882a593Smuzhiyun 		return;
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun 	p_ramrod->common.update_approx_mcast_flg = 1;
650*4882a593Smuzhiyun 	for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
651*4882a593Smuzhiyun 		u32 *p_bins = p_params->bins;
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun 		p_ramrod->approx_mcast.bins[i] = cpu_to_le32(p_bins[i]);
654*4882a593Smuzhiyun 	}
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun 
qed_sp_vport_update(struct qed_hwfn * p_hwfn,struct qed_sp_vport_update_params * p_params,enum spq_mode comp_mode,struct qed_spq_comp_cb * p_comp_data)657*4882a593Smuzhiyun int qed_sp_vport_update(struct qed_hwfn *p_hwfn,
658*4882a593Smuzhiyun 			struct qed_sp_vport_update_params *p_params,
659*4882a593Smuzhiyun 			enum spq_mode comp_mode,
660*4882a593Smuzhiyun 			struct qed_spq_comp_cb *p_comp_data)
661*4882a593Smuzhiyun {
662*4882a593Smuzhiyun 	struct qed_rss_params *p_rss_params = p_params->rss_params;
663*4882a593Smuzhiyun 	struct vport_update_ramrod_data_cmn *p_cmn;
664*4882a593Smuzhiyun 	struct qed_sp_init_data init_data;
665*4882a593Smuzhiyun 	struct vport_update_ramrod_data *p_ramrod = NULL;
666*4882a593Smuzhiyun 	struct qed_spq_entry *p_ent = NULL;
667*4882a593Smuzhiyun 	u8 abs_vport_id = 0, val;
668*4882a593Smuzhiyun 	int rc = -EINVAL;
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun 	if (IS_VF(p_hwfn->cdev)) {
671*4882a593Smuzhiyun 		rc = qed_vf_pf_vport_update(p_hwfn, p_params);
672*4882a593Smuzhiyun 		return rc;
673*4882a593Smuzhiyun 	}
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 	rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
676*4882a593Smuzhiyun 	if (rc)
677*4882a593Smuzhiyun 		return rc;
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 	memset(&init_data, 0, sizeof(init_data));
680*4882a593Smuzhiyun 	init_data.cid = qed_spq_get_cid(p_hwfn);
681*4882a593Smuzhiyun 	init_data.opaque_fid = p_params->opaque_fid;
682*4882a593Smuzhiyun 	init_data.comp_mode = comp_mode;
683*4882a593Smuzhiyun 	init_data.p_comp_data = p_comp_data;
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 	rc = qed_sp_init_request(p_hwfn, &p_ent,
686*4882a593Smuzhiyun 				 ETH_RAMROD_VPORT_UPDATE,
687*4882a593Smuzhiyun 				 PROTOCOLID_ETH, &init_data);
688*4882a593Smuzhiyun 	if (rc)
689*4882a593Smuzhiyun 		return rc;
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	/* Copy input params to ramrod according to FW struct */
692*4882a593Smuzhiyun 	p_ramrod = &p_ent->ramrod.vport_update;
693*4882a593Smuzhiyun 	p_cmn = &p_ramrod->common;
694*4882a593Smuzhiyun 
695*4882a593Smuzhiyun 	p_cmn->vport_id = abs_vport_id;
696*4882a593Smuzhiyun 	p_cmn->rx_active_flg = p_params->vport_active_rx_flg;
697*4882a593Smuzhiyun 	p_cmn->update_rx_active_flg = p_params->update_vport_active_rx_flg;
698*4882a593Smuzhiyun 	p_cmn->tx_active_flg = p_params->vport_active_tx_flg;
699*4882a593Smuzhiyun 	p_cmn->update_tx_active_flg = p_params->update_vport_active_tx_flg;
700*4882a593Smuzhiyun 	p_cmn->accept_any_vlan = p_params->accept_any_vlan;
701*4882a593Smuzhiyun 	val = p_params->update_accept_any_vlan_flg;
702*4882a593Smuzhiyun 	p_cmn->update_accept_any_vlan_flg = val;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	p_cmn->inner_vlan_removal_en = p_params->inner_vlan_removal_flg;
705*4882a593Smuzhiyun 	val = p_params->update_inner_vlan_removal_flg;
706*4882a593Smuzhiyun 	p_cmn->update_inner_vlan_removal_en_flg = val;
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun 	p_cmn->default_vlan_en = p_params->default_vlan_enable_flg;
709*4882a593Smuzhiyun 	val = p_params->update_default_vlan_enable_flg;
710*4882a593Smuzhiyun 	p_cmn->update_default_vlan_en_flg = val;
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun 	p_cmn->default_vlan = cpu_to_le16(p_params->default_vlan);
713*4882a593Smuzhiyun 	p_cmn->update_default_vlan_flg = p_params->update_default_vlan_flg;
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 	p_cmn->silent_vlan_removal_en = p_params->silent_vlan_removal_flg;
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 	p_ramrod->common.tx_switching_en = p_params->tx_switching_flg;
718*4882a593Smuzhiyun 	p_cmn->update_tx_switching_en_flg = p_params->update_tx_switching_flg;
719*4882a593Smuzhiyun 
720*4882a593Smuzhiyun 	p_cmn->anti_spoofing_en = p_params->anti_spoofing_en;
721*4882a593Smuzhiyun 	val = p_params->update_anti_spoofing_en_flg;
722*4882a593Smuzhiyun 	p_ramrod->common.update_anti_spoofing_en_flg = val;
723*4882a593Smuzhiyun 
724*4882a593Smuzhiyun 	rc = qed_sp_vport_update_rss(p_hwfn, p_ramrod, p_rss_params);
725*4882a593Smuzhiyun 	if (rc) {
726*4882a593Smuzhiyun 		qed_sp_destroy_request(p_hwfn, p_ent);
727*4882a593Smuzhiyun 		return rc;
728*4882a593Smuzhiyun 	}
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 	if (p_params->update_ctl_frame_check) {
731*4882a593Smuzhiyun 		p_cmn->ctl_frame_mac_check_en = p_params->mac_chk_en;
732*4882a593Smuzhiyun 		p_cmn->ctl_frame_ethtype_check_en = p_params->ethtype_chk_en;
733*4882a593Smuzhiyun 	}
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	/* Update mcast bins for VFs, PF doesn't use this functionality */
736*4882a593Smuzhiyun 	qed_sp_update_mcast_bin(p_hwfn, p_ramrod, p_params);
737*4882a593Smuzhiyun 
738*4882a593Smuzhiyun 	qed_sp_update_accept_mode(p_hwfn, p_ramrod, p_params->accept_flags);
739*4882a593Smuzhiyun 	qed_sp_vport_update_sge_tpa(p_hwfn, p_ramrod, p_params->sge_tpa_params);
740*4882a593Smuzhiyun 	return qed_spq_post(p_hwfn, p_ent, NULL);
741*4882a593Smuzhiyun }
742*4882a593Smuzhiyun 
qed_sp_vport_stop(struct qed_hwfn * p_hwfn,u16 opaque_fid,u8 vport_id)743*4882a593Smuzhiyun int qed_sp_vport_stop(struct qed_hwfn *p_hwfn, u16 opaque_fid, u8 vport_id)
744*4882a593Smuzhiyun {
745*4882a593Smuzhiyun 	struct vport_stop_ramrod_data *p_ramrod;
746*4882a593Smuzhiyun 	struct qed_sp_init_data init_data;
747*4882a593Smuzhiyun 	struct qed_spq_entry *p_ent;
748*4882a593Smuzhiyun 	u8 abs_vport_id = 0;
749*4882a593Smuzhiyun 	int rc;
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	if (IS_VF(p_hwfn->cdev))
752*4882a593Smuzhiyun 		return qed_vf_pf_vport_stop(p_hwfn);
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	rc = qed_fw_vport(p_hwfn, vport_id, &abs_vport_id);
755*4882a593Smuzhiyun 	if (rc)
756*4882a593Smuzhiyun 		return rc;
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun 	memset(&init_data, 0, sizeof(init_data));
759*4882a593Smuzhiyun 	init_data.cid = qed_spq_get_cid(p_hwfn);
760*4882a593Smuzhiyun 	init_data.opaque_fid = opaque_fid;
761*4882a593Smuzhiyun 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
762*4882a593Smuzhiyun 
763*4882a593Smuzhiyun 	rc = qed_sp_init_request(p_hwfn, &p_ent,
764*4882a593Smuzhiyun 				 ETH_RAMROD_VPORT_STOP,
765*4882a593Smuzhiyun 				 PROTOCOLID_ETH, &init_data);
766*4882a593Smuzhiyun 	if (rc)
767*4882a593Smuzhiyun 		return rc;
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun 	p_ramrod = &p_ent->ramrod.vport_stop;
770*4882a593Smuzhiyun 	p_ramrod->vport_id = abs_vport_id;
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun 	return qed_spq_post(p_hwfn, p_ent, NULL);
773*4882a593Smuzhiyun }
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun static int
qed_vf_pf_accept_flags(struct qed_hwfn * p_hwfn,struct qed_filter_accept_flags * p_accept_flags)776*4882a593Smuzhiyun qed_vf_pf_accept_flags(struct qed_hwfn *p_hwfn,
777*4882a593Smuzhiyun 		       struct qed_filter_accept_flags *p_accept_flags)
778*4882a593Smuzhiyun {
779*4882a593Smuzhiyun 	struct qed_sp_vport_update_params s_params;
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	memset(&s_params, 0, sizeof(s_params));
782*4882a593Smuzhiyun 	memcpy(&s_params.accept_flags, p_accept_flags,
783*4882a593Smuzhiyun 	       sizeof(struct qed_filter_accept_flags));
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun 	return qed_vf_pf_vport_update(p_hwfn, &s_params);
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun 
qed_filter_accept_cmd(struct qed_dev * cdev,u8 vport,struct qed_filter_accept_flags accept_flags,u8 update_accept_any_vlan,u8 accept_any_vlan,enum spq_mode comp_mode,struct qed_spq_comp_cb * p_comp_data)788*4882a593Smuzhiyun static int qed_filter_accept_cmd(struct qed_dev *cdev,
789*4882a593Smuzhiyun 				 u8 vport,
790*4882a593Smuzhiyun 				 struct qed_filter_accept_flags accept_flags,
791*4882a593Smuzhiyun 				 u8 update_accept_any_vlan,
792*4882a593Smuzhiyun 				 u8 accept_any_vlan,
793*4882a593Smuzhiyun 				 enum spq_mode comp_mode,
794*4882a593Smuzhiyun 				 struct qed_spq_comp_cb *p_comp_data)
795*4882a593Smuzhiyun {
796*4882a593Smuzhiyun 	struct qed_sp_vport_update_params vport_update_params;
797*4882a593Smuzhiyun 	int i, rc;
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun 	/* Prepare and send the vport rx_mode change */
800*4882a593Smuzhiyun 	memset(&vport_update_params, 0, sizeof(vport_update_params));
801*4882a593Smuzhiyun 	vport_update_params.vport_id = vport;
802*4882a593Smuzhiyun 	vport_update_params.accept_flags = accept_flags;
803*4882a593Smuzhiyun 	vport_update_params.update_accept_any_vlan_flg = update_accept_any_vlan;
804*4882a593Smuzhiyun 	vport_update_params.accept_any_vlan = accept_any_vlan;
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun 	for_each_hwfn(cdev, i) {
807*4882a593Smuzhiyun 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun 		vport_update_params.opaque_fid = p_hwfn->hw_info.opaque_fid;
810*4882a593Smuzhiyun 
811*4882a593Smuzhiyun 		if (IS_VF(cdev)) {
812*4882a593Smuzhiyun 			rc = qed_vf_pf_accept_flags(p_hwfn, &accept_flags);
813*4882a593Smuzhiyun 			if (rc)
814*4882a593Smuzhiyun 				return rc;
815*4882a593Smuzhiyun 			continue;
816*4882a593Smuzhiyun 		}
817*4882a593Smuzhiyun 
818*4882a593Smuzhiyun 		rc = qed_sp_vport_update(p_hwfn, &vport_update_params,
819*4882a593Smuzhiyun 					 comp_mode, p_comp_data);
820*4882a593Smuzhiyun 		if (rc) {
821*4882a593Smuzhiyun 			DP_ERR(cdev, "Update rx_mode failed %d\n", rc);
822*4882a593Smuzhiyun 			return rc;
823*4882a593Smuzhiyun 		}
824*4882a593Smuzhiyun 
825*4882a593Smuzhiyun 		DP_VERBOSE(p_hwfn, QED_MSG_SP,
826*4882a593Smuzhiyun 			   "Accept filter configured, flags = [Rx]%x [Tx]%x\n",
827*4882a593Smuzhiyun 			   accept_flags.rx_accept_filter,
828*4882a593Smuzhiyun 			   accept_flags.tx_accept_filter);
829*4882a593Smuzhiyun 		if (update_accept_any_vlan)
830*4882a593Smuzhiyun 			DP_VERBOSE(p_hwfn, QED_MSG_SP,
831*4882a593Smuzhiyun 				   "accept_any_vlan=%d configured\n",
832*4882a593Smuzhiyun 				   accept_any_vlan);
833*4882a593Smuzhiyun 	}
834*4882a593Smuzhiyun 
835*4882a593Smuzhiyun 	return 0;
836*4882a593Smuzhiyun }
837*4882a593Smuzhiyun 
qed_eth_rxq_start_ramrod(struct qed_hwfn * p_hwfn,struct qed_queue_cid * p_cid,u16 bd_max_bytes,dma_addr_t bd_chain_phys_addr,dma_addr_t cqe_pbl_addr,u16 cqe_pbl_size)838*4882a593Smuzhiyun int qed_eth_rxq_start_ramrod(struct qed_hwfn *p_hwfn,
839*4882a593Smuzhiyun 			     struct qed_queue_cid *p_cid,
840*4882a593Smuzhiyun 			     u16 bd_max_bytes,
841*4882a593Smuzhiyun 			     dma_addr_t bd_chain_phys_addr,
842*4882a593Smuzhiyun 			     dma_addr_t cqe_pbl_addr, u16 cqe_pbl_size)
843*4882a593Smuzhiyun {
844*4882a593Smuzhiyun 	struct rx_queue_start_ramrod_data *p_ramrod = NULL;
845*4882a593Smuzhiyun 	struct qed_spq_entry *p_ent = NULL;
846*4882a593Smuzhiyun 	struct qed_sp_init_data init_data;
847*4882a593Smuzhiyun 	int rc = -EINVAL;
848*4882a593Smuzhiyun 
849*4882a593Smuzhiyun 	DP_VERBOSE(p_hwfn, QED_MSG_SP,
850*4882a593Smuzhiyun 		   "opaque_fid=0x%x, cid=0x%x, rx_qzone=0x%x, vport_id=0x%x, sb_id=0x%x\n",
851*4882a593Smuzhiyun 		   p_cid->opaque_fid, p_cid->cid,
852*4882a593Smuzhiyun 		   p_cid->abs.queue_id, p_cid->abs.vport_id, p_cid->sb_igu_id);
853*4882a593Smuzhiyun 
854*4882a593Smuzhiyun 	/* Get SPQ entry */
855*4882a593Smuzhiyun 	memset(&init_data, 0, sizeof(init_data));
856*4882a593Smuzhiyun 	init_data.cid = p_cid->cid;
857*4882a593Smuzhiyun 	init_data.opaque_fid = p_cid->opaque_fid;
858*4882a593Smuzhiyun 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
859*4882a593Smuzhiyun 
860*4882a593Smuzhiyun 	rc = qed_sp_init_request(p_hwfn, &p_ent,
861*4882a593Smuzhiyun 				 ETH_RAMROD_RX_QUEUE_START,
862*4882a593Smuzhiyun 				 PROTOCOLID_ETH, &init_data);
863*4882a593Smuzhiyun 	if (rc)
864*4882a593Smuzhiyun 		return rc;
865*4882a593Smuzhiyun 
866*4882a593Smuzhiyun 	p_ramrod = &p_ent->ramrod.rx_queue_start;
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	p_ramrod->sb_id = cpu_to_le16(p_cid->sb_igu_id);
869*4882a593Smuzhiyun 	p_ramrod->sb_index = p_cid->sb_idx;
870*4882a593Smuzhiyun 	p_ramrod->vport_id = p_cid->abs.vport_id;
871*4882a593Smuzhiyun 	p_ramrod->stats_counter_id = p_cid->abs.stats_id;
872*4882a593Smuzhiyun 	p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id);
873*4882a593Smuzhiyun 	p_ramrod->complete_cqe_flg = 0;
874*4882a593Smuzhiyun 	p_ramrod->complete_event_flg = 1;
875*4882a593Smuzhiyun 
876*4882a593Smuzhiyun 	p_ramrod->bd_max_bytes = cpu_to_le16(bd_max_bytes);
877*4882a593Smuzhiyun 	DMA_REGPAIR_LE(p_ramrod->bd_base, bd_chain_phys_addr);
878*4882a593Smuzhiyun 
879*4882a593Smuzhiyun 	p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
880*4882a593Smuzhiyun 	DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, cqe_pbl_addr);
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun 	if (p_cid->vfid != QED_QUEUE_CID_SELF) {
883*4882a593Smuzhiyun 		bool b_legacy_vf = !!(p_cid->vf_legacy &
884*4882a593Smuzhiyun 				      QED_QCID_LEGACY_VF_RX_PROD);
885*4882a593Smuzhiyun 
886*4882a593Smuzhiyun 		p_ramrod->vf_rx_prod_index = p_cid->vf_qid;
887*4882a593Smuzhiyun 		DP_VERBOSE(p_hwfn, QED_MSG_SP,
888*4882a593Smuzhiyun 			   "Queue%s is meant for VF rxq[%02x]\n",
889*4882a593Smuzhiyun 			   b_legacy_vf ? " [legacy]" : "", p_cid->vf_qid);
890*4882a593Smuzhiyun 		p_ramrod->vf_rx_prod_use_zone_a = b_legacy_vf;
891*4882a593Smuzhiyun 	}
892*4882a593Smuzhiyun 
893*4882a593Smuzhiyun 	return qed_spq_post(p_hwfn, p_ent, NULL);
894*4882a593Smuzhiyun }
895*4882a593Smuzhiyun 
896*4882a593Smuzhiyun static int
qed_eth_pf_rx_queue_start(struct qed_hwfn * p_hwfn,struct qed_queue_cid * p_cid,u16 bd_max_bytes,dma_addr_t bd_chain_phys_addr,dma_addr_t cqe_pbl_addr,u16 cqe_pbl_size,void __iomem ** pp_prod)897*4882a593Smuzhiyun qed_eth_pf_rx_queue_start(struct qed_hwfn *p_hwfn,
898*4882a593Smuzhiyun 			  struct qed_queue_cid *p_cid,
899*4882a593Smuzhiyun 			  u16 bd_max_bytes,
900*4882a593Smuzhiyun 			  dma_addr_t bd_chain_phys_addr,
901*4882a593Smuzhiyun 			  dma_addr_t cqe_pbl_addr,
902*4882a593Smuzhiyun 			  u16 cqe_pbl_size, void __iomem **pp_prod)
903*4882a593Smuzhiyun {
904*4882a593Smuzhiyun 	u32 init_prod_val = 0;
905*4882a593Smuzhiyun 
906*4882a593Smuzhiyun 	*pp_prod = p_hwfn->regview +
907*4882a593Smuzhiyun 		   GTT_BAR0_MAP_REG_MSDM_RAM +
908*4882a593Smuzhiyun 		    MSTORM_ETH_PF_PRODS_OFFSET(p_cid->abs.queue_id);
909*4882a593Smuzhiyun 
910*4882a593Smuzhiyun 	/* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
911*4882a593Smuzhiyun 	__internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
912*4882a593Smuzhiyun 			  (u32 *)(&init_prod_val));
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	return qed_eth_rxq_start_ramrod(p_hwfn, p_cid,
915*4882a593Smuzhiyun 					bd_max_bytes,
916*4882a593Smuzhiyun 					bd_chain_phys_addr,
917*4882a593Smuzhiyun 					cqe_pbl_addr, cqe_pbl_size);
918*4882a593Smuzhiyun }
919*4882a593Smuzhiyun 
920*4882a593Smuzhiyun static int
qed_eth_rx_queue_start(struct qed_hwfn * p_hwfn,u16 opaque_fid,struct qed_queue_start_common_params * p_params,u16 bd_max_bytes,dma_addr_t bd_chain_phys_addr,dma_addr_t cqe_pbl_addr,u16 cqe_pbl_size,struct qed_rxq_start_ret_params * p_ret_params)921*4882a593Smuzhiyun qed_eth_rx_queue_start(struct qed_hwfn *p_hwfn,
922*4882a593Smuzhiyun 		       u16 opaque_fid,
923*4882a593Smuzhiyun 		       struct qed_queue_start_common_params *p_params,
924*4882a593Smuzhiyun 		       u16 bd_max_bytes,
925*4882a593Smuzhiyun 		       dma_addr_t bd_chain_phys_addr,
926*4882a593Smuzhiyun 		       dma_addr_t cqe_pbl_addr,
927*4882a593Smuzhiyun 		       u16 cqe_pbl_size,
928*4882a593Smuzhiyun 		       struct qed_rxq_start_ret_params *p_ret_params)
929*4882a593Smuzhiyun {
930*4882a593Smuzhiyun 	struct qed_queue_cid *p_cid;
931*4882a593Smuzhiyun 	int rc;
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun 	/* Allocate a CID for the queue */
934*4882a593Smuzhiyun 	p_cid = qed_eth_queue_to_cid_pf(p_hwfn, opaque_fid, true, p_params);
935*4882a593Smuzhiyun 	if (!p_cid)
936*4882a593Smuzhiyun 		return -ENOMEM;
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun 	if (IS_PF(p_hwfn->cdev)) {
939*4882a593Smuzhiyun 		rc = qed_eth_pf_rx_queue_start(p_hwfn, p_cid,
940*4882a593Smuzhiyun 					       bd_max_bytes,
941*4882a593Smuzhiyun 					       bd_chain_phys_addr,
942*4882a593Smuzhiyun 					       cqe_pbl_addr, cqe_pbl_size,
943*4882a593Smuzhiyun 					       &p_ret_params->p_prod);
944*4882a593Smuzhiyun 	} else {
945*4882a593Smuzhiyun 		rc = qed_vf_pf_rxq_start(p_hwfn, p_cid,
946*4882a593Smuzhiyun 					 bd_max_bytes,
947*4882a593Smuzhiyun 					 bd_chain_phys_addr,
948*4882a593Smuzhiyun 					 cqe_pbl_addr,
949*4882a593Smuzhiyun 					 cqe_pbl_size, &p_ret_params->p_prod);
950*4882a593Smuzhiyun 	}
951*4882a593Smuzhiyun 
952*4882a593Smuzhiyun 	/* Provide the caller with a reference to as handler */
953*4882a593Smuzhiyun 	if (rc)
954*4882a593Smuzhiyun 		qed_eth_queue_cid_release(p_hwfn, p_cid);
955*4882a593Smuzhiyun 	else
956*4882a593Smuzhiyun 		p_ret_params->p_handle = (void *)p_cid;
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun 	return rc;
959*4882a593Smuzhiyun }
960*4882a593Smuzhiyun 
qed_sp_eth_rx_queues_update(struct qed_hwfn * p_hwfn,void ** pp_rxq_handles,u8 num_rxqs,u8 complete_cqe_flg,u8 complete_event_flg,enum spq_mode comp_mode,struct qed_spq_comp_cb * p_comp_data)961*4882a593Smuzhiyun int qed_sp_eth_rx_queues_update(struct qed_hwfn *p_hwfn,
962*4882a593Smuzhiyun 				void **pp_rxq_handles,
963*4882a593Smuzhiyun 				u8 num_rxqs,
964*4882a593Smuzhiyun 				u8 complete_cqe_flg,
965*4882a593Smuzhiyun 				u8 complete_event_flg,
966*4882a593Smuzhiyun 				enum spq_mode comp_mode,
967*4882a593Smuzhiyun 				struct qed_spq_comp_cb *p_comp_data)
968*4882a593Smuzhiyun {
969*4882a593Smuzhiyun 	struct rx_queue_update_ramrod_data *p_ramrod = NULL;
970*4882a593Smuzhiyun 	struct qed_spq_entry *p_ent = NULL;
971*4882a593Smuzhiyun 	struct qed_sp_init_data init_data;
972*4882a593Smuzhiyun 	struct qed_queue_cid *p_cid;
973*4882a593Smuzhiyun 	int rc = -EINVAL;
974*4882a593Smuzhiyun 	u8 i;
975*4882a593Smuzhiyun 
976*4882a593Smuzhiyun 	memset(&init_data, 0, sizeof(init_data));
977*4882a593Smuzhiyun 	init_data.comp_mode = comp_mode;
978*4882a593Smuzhiyun 	init_data.p_comp_data = p_comp_data;
979*4882a593Smuzhiyun 
980*4882a593Smuzhiyun 	for (i = 0; i < num_rxqs; i++) {
981*4882a593Smuzhiyun 		p_cid = ((struct qed_queue_cid **)pp_rxq_handles)[i];
982*4882a593Smuzhiyun 
983*4882a593Smuzhiyun 		/* Get SPQ entry */
984*4882a593Smuzhiyun 		init_data.cid = p_cid->cid;
985*4882a593Smuzhiyun 		init_data.opaque_fid = p_cid->opaque_fid;
986*4882a593Smuzhiyun 
987*4882a593Smuzhiyun 		rc = qed_sp_init_request(p_hwfn, &p_ent,
988*4882a593Smuzhiyun 					 ETH_RAMROD_RX_QUEUE_UPDATE,
989*4882a593Smuzhiyun 					 PROTOCOLID_ETH, &init_data);
990*4882a593Smuzhiyun 		if (rc)
991*4882a593Smuzhiyun 			return rc;
992*4882a593Smuzhiyun 
993*4882a593Smuzhiyun 		p_ramrod = &p_ent->ramrod.rx_queue_update;
994*4882a593Smuzhiyun 		p_ramrod->vport_id = p_cid->abs.vport_id;
995*4882a593Smuzhiyun 
996*4882a593Smuzhiyun 		p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id);
997*4882a593Smuzhiyun 		p_ramrod->complete_cqe_flg = complete_cqe_flg;
998*4882a593Smuzhiyun 		p_ramrod->complete_event_flg = complete_event_flg;
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 		rc = qed_spq_post(p_hwfn, p_ent, NULL);
1001*4882a593Smuzhiyun 		if (rc)
1002*4882a593Smuzhiyun 			return rc;
1003*4882a593Smuzhiyun 	}
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 	return rc;
1006*4882a593Smuzhiyun }
1007*4882a593Smuzhiyun 
1008*4882a593Smuzhiyun static int
qed_eth_pf_rx_queue_stop(struct qed_hwfn * p_hwfn,struct qed_queue_cid * p_cid,bool b_eq_completion_only,bool b_cqe_completion)1009*4882a593Smuzhiyun qed_eth_pf_rx_queue_stop(struct qed_hwfn *p_hwfn,
1010*4882a593Smuzhiyun 			 struct qed_queue_cid *p_cid,
1011*4882a593Smuzhiyun 			 bool b_eq_completion_only, bool b_cqe_completion)
1012*4882a593Smuzhiyun {
1013*4882a593Smuzhiyun 	struct rx_queue_stop_ramrod_data *p_ramrod = NULL;
1014*4882a593Smuzhiyun 	struct qed_spq_entry *p_ent = NULL;
1015*4882a593Smuzhiyun 	struct qed_sp_init_data init_data;
1016*4882a593Smuzhiyun 	int rc;
1017*4882a593Smuzhiyun 
1018*4882a593Smuzhiyun 	memset(&init_data, 0, sizeof(init_data));
1019*4882a593Smuzhiyun 	init_data.cid = p_cid->cid;
1020*4882a593Smuzhiyun 	init_data.opaque_fid = p_cid->opaque_fid;
1021*4882a593Smuzhiyun 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1022*4882a593Smuzhiyun 
1023*4882a593Smuzhiyun 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1024*4882a593Smuzhiyun 				 ETH_RAMROD_RX_QUEUE_STOP,
1025*4882a593Smuzhiyun 				 PROTOCOLID_ETH, &init_data);
1026*4882a593Smuzhiyun 	if (rc)
1027*4882a593Smuzhiyun 		return rc;
1028*4882a593Smuzhiyun 
1029*4882a593Smuzhiyun 	p_ramrod = &p_ent->ramrod.rx_queue_stop;
1030*4882a593Smuzhiyun 	p_ramrod->vport_id = p_cid->abs.vport_id;
1031*4882a593Smuzhiyun 	p_ramrod->rx_queue_id = cpu_to_le16(p_cid->abs.queue_id);
1032*4882a593Smuzhiyun 
1033*4882a593Smuzhiyun 	/* Cleaning the queue requires the completion to arrive there.
1034*4882a593Smuzhiyun 	 * In addition, VFs require the answer to come as eqe to PF.
1035*4882a593Smuzhiyun 	 */
1036*4882a593Smuzhiyun 	p_ramrod->complete_cqe_flg = ((p_cid->vfid == QED_QUEUE_CID_SELF) &&
1037*4882a593Smuzhiyun 				      !b_eq_completion_only) ||
1038*4882a593Smuzhiyun 				     b_cqe_completion;
1039*4882a593Smuzhiyun 	p_ramrod->complete_event_flg = (p_cid->vfid != QED_QUEUE_CID_SELF) ||
1040*4882a593Smuzhiyun 				       b_eq_completion_only;
1041*4882a593Smuzhiyun 
1042*4882a593Smuzhiyun 	return qed_spq_post(p_hwfn, p_ent, NULL);
1043*4882a593Smuzhiyun }
1044*4882a593Smuzhiyun 
qed_eth_rx_queue_stop(struct qed_hwfn * p_hwfn,void * p_rxq,bool eq_completion_only,bool cqe_completion)1045*4882a593Smuzhiyun int qed_eth_rx_queue_stop(struct qed_hwfn *p_hwfn,
1046*4882a593Smuzhiyun 			  void *p_rxq,
1047*4882a593Smuzhiyun 			  bool eq_completion_only, bool cqe_completion)
1048*4882a593Smuzhiyun {
1049*4882a593Smuzhiyun 	struct qed_queue_cid *p_cid = (struct qed_queue_cid *)p_rxq;
1050*4882a593Smuzhiyun 	int rc = -EINVAL;
1051*4882a593Smuzhiyun 
1052*4882a593Smuzhiyun 	if (IS_PF(p_hwfn->cdev))
1053*4882a593Smuzhiyun 		rc = qed_eth_pf_rx_queue_stop(p_hwfn, p_cid,
1054*4882a593Smuzhiyun 					      eq_completion_only,
1055*4882a593Smuzhiyun 					      cqe_completion);
1056*4882a593Smuzhiyun 	else
1057*4882a593Smuzhiyun 		rc = qed_vf_pf_rxq_stop(p_hwfn, p_cid, cqe_completion);
1058*4882a593Smuzhiyun 
1059*4882a593Smuzhiyun 	if (!rc)
1060*4882a593Smuzhiyun 		qed_eth_queue_cid_release(p_hwfn, p_cid);
1061*4882a593Smuzhiyun 	return rc;
1062*4882a593Smuzhiyun }
1063*4882a593Smuzhiyun 
1064*4882a593Smuzhiyun int
qed_eth_txq_start_ramrod(struct qed_hwfn * p_hwfn,struct qed_queue_cid * p_cid,dma_addr_t pbl_addr,u16 pbl_size,u16 pq_id)1065*4882a593Smuzhiyun qed_eth_txq_start_ramrod(struct qed_hwfn *p_hwfn,
1066*4882a593Smuzhiyun 			 struct qed_queue_cid *p_cid,
1067*4882a593Smuzhiyun 			 dma_addr_t pbl_addr, u16 pbl_size, u16 pq_id)
1068*4882a593Smuzhiyun {
1069*4882a593Smuzhiyun 	struct tx_queue_start_ramrod_data *p_ramrod = NULL;
1070*4882a593Smuzhiyun 	struct qed_spq_entry *p_ent = NULL;
1071*4882a593Smuzhiyun 	struct qed_sp_init_data init_data;
1072*4882a593Smuzhiyun 	int rc = -EINVAL;
1073*4882a593Smuzhiyun 
1074*4882a593Smuzhiyun 	/* Get SPQ entry */
1075*4882a593Smuzhiyun 	memset(&init_data, 0, sizeof(init_data));
1076*4882a593Smuzhiyun 	init_data.cid = p_cid->cid;
1077*4882a593Smuzhiyun 	init_data.opaque_fid = p_cid->opaque_fid;
1078*4882a593Smuzhiyun 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1079*4882a593Smuzhiyun 
1080*4882a593Smuzhiyun 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1081*4882a593Smuzhiyun 				 ETH_RAMROD_TX_QUEUE_START,
1082*4882a593Smuzhiyun 				 PROTOCOLID_ETH, &init_data);
1083*4882a593Smuzhiyun 	if (rc)
1084*4882a593Smuzhiyun 		return rc;
1085*4882a593Smuzhiyun 
1086*4882a593Smuzhiyun 	p_ramrod = &p_ent->ramrod.tx_queue_start;
1087*4882a593Smuzhiyun 	p_ramrod->vport_id = p_cid->abs.vport_id;
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun 	p_ramrod->sb_id = cpu_to_le16(p_cid->sb_igu_id);
1090*4882a593Smuzhiyun 	p_ramrod->sb_index = p_cid->sb_idx;
1091*4882a593Smuzhiyun 	p_ramrod->stats_counter_id = p_cid->abs.stats_id;
1092*4882a593Smuzhiyun 
1093*4882a593Smuzhiyun 	p_ramrod->queue_zone_id = cpu_to_le16(p_cid->abs.queue_id);
1094*4882a593Smuzhiyun 	p_ramrod->same_as_last_id = cpu_to_le16(p_cid->abs.queue_id);
1095*4882a593Smuzhiyun 
1096*4882a593Smuzhiyun 	p_ramrod->pbl_size = cpu_to_le16(pbl_size);
1097*4882a593Smuzhiyun 	DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, pbl_addr);
1098*4882a593Smuzhiyun 
1099*4882a593Smuzhiyun 	p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
1100*4882a593Smuzhiyun 
1101*4882a593Smuzhiyun 	return qed_spq_post(p_hwfn, p_ent, NULL);
1102*4882a593Smuzhiyun }
1103*4882a593Smuzhiyun 
1104*4882a593Smuzhiyun static int
qed_eth_pf_tx_queue_start(struct qed_hwfn * p_hwfn,struct qed_queue_cid * p_cid,u8 tc,dma_addr_t pbl_addr,u16 pbl_size,void __iomem ** pp_doorbell)1105*4882a593Smuzhiyun qed_eth_pf_tx_queue_start(struct qed_hwfn *p_hwfn,
1106*4882a593Smuzhiyun 			  struct qed_queue_cid *p_cid,
1107*4882a593Smuzhiyun 			  u8 tc,
1108*4882a593Smuzhiyun 			  dma_addr_t pbl_addr,
1109*4882a593Smuzhiyun 			  u16 pbl_size, void __iomem **pp_doorbell)
1110*4882a593Smuzhiyun {
1111*4882a593Smuzhiyun 	int rc;
1112*4882a593Smuzhiyun 
1113*4882a593Smuzhiyun 
1114*4882a593Smuzhiyun 	rc = qed_eth_txq_start_ramrod(p_hwfn, p_cid,
1115*4882a593Smuzhiyun 				      pbl_addr, pbl_size,
1116*4882a593Smuzhiyun 				      qed_get_cm_pq_idx_mcos(p_hwfn, tc));
1117*4882a593Smuzhiyun 	if (rc)
1118*4882a593Smuzhiyun 		return rc;
1119*4882a593Smuzhiyun 
1120*4882a593Smuzhiyun 	/* Provide the caller with the necessary return values */
1121*4882a593Smuzhiyun 	*pp_doorbell = p_hwfn->doorbells +
1122*4882a593Smuzhiyun 		       qed_db_addr(p_cid->cid, DQ_DEMS_LEGACY);
1123*4882a593Smuzhiyun 
1124*4882a593Smuzhiyun 	return 0;
1125*4882a593Smuzhiyun }
1126*4882a593Smuzhiyun 
1127*4882a593Smuzhiyun static int
qed_eth_tx_queue_start(struct qed_hwfn * p_hwfn,u16 opaque_fid,struct qed_queue_start_common_params * p_params,u8 tc,dma_addr_t pbl_addr,u16 pbl_size,struct qed_txq_start_ret_params * p_ret_params)1128*4882a593Smuzhiyun qed_eth_tx_queue_start(struct qed_hwfn *p_hwfn,
1129*4882a593Smuzhiyun 		       u16 opaque_fid,
1130*4882a593Smuzhiyun 		       struct qed_queue_start_common_params *p_params,
1131*4882a593Smuzhiyun 		       u8 tc,
1132*4882a593Smuzhiyun 		       dma_addr_t pbl_addr,
1133*4882a593Smuzhiyun 		       u16 pbl_size,
1134*4882a593Smuzhiyun 		       struct qed_txq_start_ret_params *p_ret_params)
1135*4882a593Smuzhiyun {
1136*4882a593Smuzhiyun 	struct qed_queue_cid *p_cid;
1137*4882a593Smuzhiyun 	int rc;
1138*4882a593Smuzhiyun 
1139*4882a593Smuzhiyun 	p_cid = qed_eth_queue_to_cid_pf(p_hwfn, opaque_fid, false, p_params);
1140*4882a593Smuzhiyun 	if (!p_cid)
1141*4882a593Smuzhiyun 		return -EINVAL;
1142*4882a593Smuzhiyun 
1143*4882a593Smuzhiyun 	if (IS_PF(p_hwfn->cdev))
1144*4882a593Smuzhiyun 		rc = qed_eth_pf_tx_queue_start(p_hwfn, p_cid, tc,
1145*4882a593Smuzhiyun 					       pbl_addr, pbl_size,
1146*4882a593Smuzhiyun 					       &p_ret_params->p_doorbell);
1147*4882a593Smuzhiyun 	else
1148*4882a593Smuzhiyun 		rc = qed_vf_pf_txq_start(p_hwfn, p_cid,
1149*4882a593Smuzhiyun 					 pbl_addr, pbl_size,
1150*4882a593Smuzhiyun 					 &p_ret_params->p_doorbell);
1151*4882a593Smuzhiyun 
1152*4882a593Smuzhiyun 	if (rc)
1153*4882a593Smuzhiyun 		qed_eth_queue_cid_release(p_hwfn, p_cid);
1154*4882a593Smuzhiyun 	else
1155*4882a593Smuzhiyun 		p_ret_params->p_handle = (void *)p_cid;
1156*4882a593Smuzhiyun 
1157*4882a593Smuzhiyun 	return rc;
1158*4882a593Smuzhiyun }
1159*4882a593Smuzhiyun 
1160*4882a593Smuzhiyun static int
qed_eth_pf_tx_queue_stop(struct qed_hwfn * p_hwfn,struct qed_queue_cid * p_cid)1161*4882a593Smuzhiyun qed_eth_pf_tx_queue_stop(struct qed_hwfn *p_hwfn, struct qed_queue_cid *p_cid)
1162*4882a593Smuzhiyun {
1163*4882a593Smuzhiyun 	struct qed_spq_entry *p_ent = NULL;
1164*4882a593Smuzhiyun 	struct qed_sp_init_data init_data;
1165*4882a593Smuzhiyun 	int rc;
1166*4882a593Smuzhiyun 
1167*4882a593Smuzhiyun 	memset(&init_data, 0, sizeof(init_data));
1168*4882a593Smuzhiyun 	init_data.cid = p_cid->cid;
1169*4882a593Smuzhiyun 	init_data.opaque_fid = p_cid->opaque_fid;
1170*4882a593Smuzhiyun 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1171*4882a593Smuzhiyun 
1172*4882a593Smuzhiyun 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1173*4882a593Smuzhiyun 				 ETH_RAMROD_TX_QUEUE_STOP,
1174*4882a593Smuzhiyun 				 PROTOCOLID_ETH, &init_data);
1175*4882a593Smuzhiyun 	if (rc)
1176*4882a593Smuzhiyun 		return rc;
1177*4882a593Smuzhiyun 
1178*4882a593Smuzhiyun 	return qed_spq_post(p_hwfn, p_ent, NULL);
1179*4882a593Smuzhiyun }
1180*4882a593Smuzhiyun 
qed_eth_tx_queue_stop(struct qed_hwfn * p_hwfn,void * p_handle)1181*4882a593Smuzhiyun int qed_eth_tx_queue_stop(struct qed_hwfn *p_hwfn, void *p_handle)
1182*4882a593Smuzhiyun {
1183*4882a593Smuzhiyun 	struct qed_queue_cid *p_cid = (struct qed_queue_cid *)p_handle;
1184*4882a593Smuzhiyun 	int rc;
1185*4882a593Smuzhiyun 
1186*4882a593Smuzhiyun 	if (IS_PF(p_hwfn->cdev))
1187*4882a593Smuzhiyun 		rc = qed_eth_pf_tx_queue_stop(p_hwfn, p_cid);
1188*4882a593Smuzhiyun 	else
1189*4882a593Smuzhiyun 		rc = qed_vf_pf_txq_stop(p_hwfn, p_cid);
1190*4882a593Smuzhiyun 
1191*4882a593Smuzhiyun 	if (!rc)
1192*4882a593Smuzhiyun 		qed_eth_queue_cid_release(p_hwfn, p_cid);
1193*4882a593Smuzhiyun 	return rc;
1194*4882a593Smuzhiyun }
1195*4882a593Smuzhiyun 
qed_filter_action(enum qed_filter_opcode opcode)1196*4882a593Smuzhiyun static enum eth_filter_action qed_filter_action(enum qed_filter_opcode opcode)
1197*4882a593Smuzhiyun {
1198*4882a593Smuzhiyun 	enum eth_filter_action action = MAX_ETH_FILTER_ACTION;
1199*4882a593Smuzhiyun 
1200*4882a593Smuzhiyun 	switch (opcode) {
1201*4882a593Smuzhiyun 	case QED_FILTER_ADD:
1202*4882a593Smuzhiyun 		action = ETH_FILTER_ACTION_ADD;
1203*4882a593Smuzhiyun 		break;
1204*4882a593Smuzhiyun 	case QED_FILTER_REMOVE:
1205*4882a593Smuzhiyun 		action = ETH_FILTER_ACTION_REMOVE;
1206*4882a593Smuzhiyun 		break;
1207*4882a593Smuzhiyun 	case QED_FILTER_FLUSH:
1208*4882a593Smuzhiyun 		action = ETH_FILTER_ACTION_REMOVE_ALL;
1209*4882a593Smuzhiyun 		break;
1210*4882a593Smuzhiyun 	default:
1211*4882a593Smuzhiyun 		action = MAX_ETH_FILTER_ACTION;
1212*4882a593Smuzhiyun 	}
1213*4882a593Smuzhiyun 
1214*4882a593Smuzhiyun 	return action;
1215*4882a593Smuzhiyun }
1216*4882a593Smuzhiyun 
1217*4882a593Smuzhiyun static int
qed_filter_ucast_common(struct qed_hwfn * p_hwfn,u16 opaque_fid,struct qed_filter_ucast * p_filter_cmd,struct vport_filter_update_ramrod_data ** pp_ramrod,struct qed_spq_entry ** pp_ent,enum spq_mode comp_mode,struct qed_spq_comp_cb * p_comp_data)1218*4882a593Smuzhiyun qed_filter_ucast_common(struct qed_hwfn *p_hwfn,
1219*4882a593Smuzhiyun 			u16 opaque_fid,
1220*4882a593Smuzhiyun 			struct qed_filter_ucast *p_filter_cmd,
1221*4882a593Smuzhiyun 			struct vport_filter_update_ramrod_data **pp_ramrod,
1222*4882a593Smuzhiyun 			struct qed_spq_entry **pp_ent,
1223*4882a593Smuzhiyun 			enum spq_mode comp_mode,
1224*4882a593Smuzhiyun 			struct qed_spq_comp_cb *p_comp_data)
1225*4882a593Smuzhiyun {
1226*4882a593Smuzhiyun 	u8 vport_to_add_to = 0, vport_to_remove_from = 0;
1227*4882a593Smuzhiyun 	struct vport_filter_update_ramrod_data *p_ramrod;
1228*4882a593Smuzhiyun 	struct eth_filter_cmd *p_first_filter;
1229*4882a593Smuzhiyun 	struct eth_filter_cmd *p_second_filter;
1230*4882a593Smuzhiyun 	struct qed_sp_init_data init_data;
1231*4882a593Smuzhiyun 	enum eth_filter_action action;
1232*4882a593Smuzhiyun 	int rc;
1233*4882a593Smuzhiyun 
1234*4882a593Smuzhiyun 	rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from,
1235*4882a593Smuzhiyun 			  &vport_to_remove_from);
1236*4882a593Smuzhiyun 	if (rc)
1237*4882a593Smuzhiyun 		return rc;
1238*4882a593Smuzhiyun 
1239*4882a593Smuzhiyun 	rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to,
1240*4882a593Smuzhiyun 			  &vport_to_add_to);
1241*4882a593Smuzhiyun 	if (rc)
1242*4882a593Smuzhiyun 		return rc;
1243*4882a593Smuzhiyun 
1244*4882a593Smuzhiyun 	/* Get SPQ entry */
1245*4882a593Smuzhiyun 	memset(&init_data, 0, sizeof(init_data));
1246*4882a593Smuzhiyun 	init_data.cid = qed_spq_get_cid(p_hwfn);
1247*4882a593Smuzhiyun 	init_data.opaque_fid = opaque_fid;
1248*4882a593Smuzhiyun 	init_data.comp_mode = comp_mode;
1249*4882a593Smuzhiyun 	init_data.p_comp_data = p_comp_data;
1250*4882a593Smuzhiyun 
1251*4882a593Smuzhiyun 	rc = qed_sp_init_request(p_hwfn, pp_ent,
1252*4882a593Smuzhiyun 				 ETH_RAMROD_FILTERS_UPDATE,
1253*4882a593Smuzhiyun 				 PROTOCOLID_ETH, &init_data);
1254*4882a593Smuzhiyun 	if (rc)
1255*4882a593Smuzhiyun 		return rc;
1256*4882a593Smuzhiyun 
1257*4882a593Smuzhiyun 	*pp_ramrod = &(*pp_ent)->ramrod.vport_filter_update;
1258*4882a593Smuzhiyun 	p_ramrod = *pp_ramrod;
1259*4882a593Smuzhiyun 	p_ramrod->filter_cmd_hdr.rx = p_filter_cmd->is_rx_filter ? 1 : 0;
1260*4882a593Smuzhiyun 	p_ramrod->filter_cmd_hdr.tx = p_filter_cmd->is_tx_filter ? 1 : 0;
1261*4882a593Smuzhiyun 
1262*4882a593Smuzhiyun 	switch (p_filter_cmd->opcode) {
1263*4882a593Smuzhiyun 	case QED_FILTER_REPLACE:
1264*4882a593Smuzhiyun 	case QED_FILTER_MOVE:
1265*4882a593Smuzhiyun 		p_ramrod->filter_cmd_hdr.cmd_cnt = 2; break;
1266*4882a593Smuzhiyun 	default:
1267*4882a593Smuzhiyun 		p_ramrod->filter_cmd_hdr.cmd_cnt = 1; break;
1268*4882a593Smuzhiyun 	}
1269*4882a593Smuzhiyun 
1270*4882a593Smuzhiyun 	p_first_filter	= &p_ramrod->filter_cmds[0];
1271*4882a593Smuzhiyun 	p_second_filter = &p_ramrod->filter_cmds[1];
1272*4882a593Smuzhiyun 
1273*4882a593Smuzhiyun 	switch (p_filter_cmd->type) {
1274*4882a593Smuzhiyun 	case QED_FILTER_MAC:
1275*4882a593Smuzhiyun 		p_first_filter->type = ETH_FILTER_TYPE_MAC; break;
1276*4882a593Smuzhiyun 	case QED_FILTER_VLAN:
1277*4882a593Smuzhiyun 		p_first_filter->type = ETH_FILTER_TYPE_VLAN; break;
1278*4882a593Smuzhiyun 	case QED_FILTER_MAC_VLAN:
1279*4882a593Smuzhiyun 		p_first_filter->type = ETH_FILTER_TYPE_PAIR; break;
1280*4882a593Smuzhiyun 	case QED_FILTER_INNER_MAC:
1281*4882a593Smuzhiyun 		p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC; break;
1282*4882a593Smuzhiyun 	case QED_FILTER_INNER_VLAN:
1283*4882a593Smuzhiyun 		p_first_filter->type = ETH_FILTER_TYPE_INNER_VLAN; break;
1284*4882a593Smuzhiyun 	case QED_FILTER_INNER_PAIR:
1285*4882a593Smuzhiyun 		p_first_filter->type = ETH_FILTER_TYPE_INNER_PAIR; break;
1286*4882a593Smuzhiyun 	case QED_FILTER_INNER_MAC_VNI_PAIR:
1287*4882a593Smuzhiyun 		p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR;
1288*4882a593Smuzhiyun 		break;
1289*4882a593Smuzhiyun 	case QED_FILTER_MAC_VNI_PAIR:
1290*4882a593Smuzhiyun 		p_first_filter->type = ETH_FILTER_TYPE_MAC_VNI_PAIR; break;
1291*4882a593Smuzhiyun 	case QED_FILTER_VNI:
1292*4882a593Smuzhiyun 		p_first_filter->type = ETH_FILTER_TYPE_VNI; break;
1293*4882a593Smuzhiyun 	}
1294*4882a593Smuzhiyun 
1295*4882a593Smuzhiyun 	if ((p_first_filter->type == ETH_FILTER_TYPE_MAC) ||
1296*4882a593Smuzhiyun 	    (p_first_filter->type == ETH_FILTER_TYPE_PAIR) ||
1297*4882a593Smuzhiyun 	    (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC) ||
1298*4882a593Smuzhiyun 	    (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR) ||
1299*4882a593Smuzhiyun 	    (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) ||
1300*4882a593Smuzhiyun 	    (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR)) {
1301*4882a593Smuzhiyun 		qed_set_fw_mac_addr(&p_first_filter->mac_msb,
1302*4882a593Smuzhiyun 				    &p_first_filter->mac_mid,
1303*4882a593Smuzhiyun 				    &p_first_filter->mac_lsb,
1304*4882a593Smuzhiyun 				    (u8 *)p_filter_cmd->mac);
1305*4882a593Smuzhiyun 	}
1306*4882a593Smuzhiyun 
1307*4882a593Smuzhiyun 	if ((p_first_filter->type == ETH_FILTER_TYPE_VLAN) ||
1308*4882a593Smuzhiyun 	    (p_first_filter->type == ETH_FILTER_TYPE_PAIR) ||
1309*4882a593Smuzhiyun 	    (p_first_filter->type == ETH_FILTER_TYPE_INNER_VLAN) ||
1310*4882a593Smuzhiyun 	    (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR))
1311*4882a593Smuzhiyun 		p_first_filter->vlan_id = cpu_to_le16(p_filter_cmd->vlan);
1312*4882a593Smuzhiyun 
1313*4882a593Smuzhiyun 	if ((p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) ||
1314*4882a593Smuzhiyun 	    (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR) ||
1315*4882a593Smuzhiyun 	    (p_first_filter->type == ETH_FILTER_TYPE_VNI))
1316*4882a593Smuzhiyun 		p_first_filter->vni = cpu_to_le32(p_filter_cmd->vni);
1317*4882a593Smuzhiyun 
1318*4882a593Smuzhiyun 	if (p_filter_cmd->opcode == QED_FILTER_MOVE) {
1319*4882a593Smuzhiyun 		p_second_filter->type = p_first_filter->type;
1320*4882a593Smuzhiyun 		p_second_filter->mac_msb = p_first_filter->mac_msb;
1321*4882a593Smuzhiyun 		p_second_filter->mac_mid = p_first_filter->mac_mid;
1322*4882a593Smuzhiyun 		p_second_filter->mac_lsb = p_first_filter->mac_lsb;
1323*4882a593Smuzhiyun 		p_second_filter->vlan_id = p_first_filter->vlan_id;
1324*4882a593Smuzhiyun 		p_second_filter->vni = p_first_filter->vni;
1325*4882a593Smuzhiyun 
1326*4882a593Smuzhiyun 		p_first_filter->action = ETH_FILTER_ACTION_REMOVE;
1327*4882a593Smuzhiyun 
1328*4882a593Smuzhiyun 		p_first_filter->vport_id = vport_to_remove_from;
1329*4882a593Smuzhiyun 
1330*4882a593Smuzhiyun 		p_second_filter->action = ETH_FILTER_ACTION_ADD;
1331*4882a593Smuzhiyun 		p_second_filter->vport_id = vport_to_add_to;
1332*4882a593Smuzhiyun 	} else if (p_filter_cmd->opcode == QED_FILTER_REPLACE) {
1333*4882a593Smuzhiyun 		p_first_filter->vport_id = vport_to_add_to;
1334*4882a593Smuzhiyun 		memcpy(p_second_filter, p_first_filter,
1335*4882a593Smuzhiyun 		       sizeof(*p_second_filter));
1336*4882a593Smuzhiyun 		p_first_filter->action	= ETH_FILTER_ACTION_REMOVE_ALL;
1337*4882a593Smuzhiyun 		p_second_filter->action = ETH_FILTER_ACTION_ADD;
1338*4882a593Smuzhiyun 	} else {
1339*4882a593Smuzhiyun 		action = qed_filter_action(p_filter_cmd->opcode);
1340*4882a593Smuzhiyun 
1341*4882a593Smuzhiyun 		if (action == MAX_ETH_FILTER_ACTION) {
1342*4882a593Smuzhiyun 			DP_NOTICE(p_hwfn,
1343*4882a593Smuzhiyun 				  "%d is not supported yet\n",
1344*4882a593Smuzhiyun 				  p_filter_cmd->opcode);
1345*4882a593Smuzhiyun 			qed_sp_destroy_request(p_hwfn, *pp_ent);
1346*4882a593Smuzhiyun 			return -EINVAL;
1347*4882a593Smuzhiyun 		}
1348*4882a593Smuzhiyun 
1349*4882a593Smuzhiyun 		p_first_filter->action = action;
1350*4882a593Smuzhiyun 		p_first_filter->vport_id = (p_filter_cmd->opcode ==
1351*4882a593Smuzhiyun 					    QED_FILTER_REMOVE) ?
1352*4882a593Smuzhiyun 					   vport_to_remove_from :
1353*4882a593Smuzhiyun 					   vport_to_add_to;
1354*4882a593Smuzhiyun 	}
1355*4882a593Smuzhiyun 
1356*4882a593Smuzhiyun 	return 0;
1357*4882a593Smuzhiyun }
1358*4882a593Smuzhiyun 
qed_sp_eth_filter_ucast(struct qed_hwfn * p_hwfn,u16 opaque_fid,struct qed_filter_ucast * p_filter_cmd,enum spq_mode comp_mode,struct qed_spq_comp_cb * p_comp_data)1359*4882a593Smuzhiyun int qed_sp_eth_filter_ucast(struct qed_hwfn *p_hwfn,
1360*4882a593Smuzhiyun 			    u16 opaque_fid,
1361*4882a593Smuzhiyun 			    struct qed_filter_ucast *p_filter_cmd,
1362*4882a593Smuzhiyun 			    enum spq_mode comp_mode,
1363*4882a593Smuzhiyun 			    struct qed_spq_comp_cb *p_comp_data)
1364*4882a593Smuzhiyun {
1365*4882a593Smuzhiyun 	struct vport_filter_update_ramrod_data	*p_ramrod	= NULL;
1366*4882a593Smuzhiyun 	struct qed_spq_entry			*p_ent		= NULL;
1367*4882a593Smuzhiyun 	struct eth_filter_cmd_header		*p_header;
1368*4882a593Smuzhiyun 	int					rc;
1369*4882a593Smuzhiyun 
1370*4882a593Smuzhiyun 	rc = qed_filter_ucast_common(p_hwfn, opaque_fid, p_filter_cmd,
1371*4882a593Smuzhiyun 				     &p_ramrod, &p_ent,
1372*4882a593Smuzhiyun 				     comp_mode, p_comp_data);
1373*4882a593Smuzhiyun 	if (rc) {
1374*4882a593Smuzhiyun 		DP_ERR(p_hwfn, "Uni. filter command failed %d\n", rc);
1375*4882a593Smuzhiyun 		return rc;
1376*4882a593Smuzhiyun 	}
1377*4882a593Smuzhiyun 	p_header = &p_ramrod->filter_cmd_hdr;
1378*4882a593Smuzhiyun 	p_header->assert_on_error = p_filter_cmd->assert_on_error;
1379*4882a593Smuzhiyun 
1380*4882a593Smuzhiyun 	rc = qed_spq_post(p_hwfn, p_ent, NULL);
1381*4882a593Smuzhiyun 	if (rc) {
1382*4882a593Smuzhiyun 		DP_ERR(p_hwfn, "Unicast filter ADD command failed %d\n", rc);
1383*4882a593Smuzhiyun 		return rc;
1384*4882a593Smuzhiyun 	}
1385*4882a593Smuzhiyun 
1386*4882a593Smuzhiyun 	DP_VERBOSE(p_hwfn, QED_MSG_SP,
1387*4882a593Smuzhiyun 		   "Unicast filter configured, opcode = %s, type = %s, cmd_cnt = %d, is_rx_filter = %d, is_tx_filter = %d\n",
1388*4882a593Smuzhiyun 		   (p_filter_cmd->opcode == QED_FILTER_ADD) ? "ADD" :
1389*4882a593Smuzhiyun 		   ((p_filter_cmd->opcode == QED_FILTER_REMOVE) ?
1390*4882a593Smuzhiyun 		   "REMOVE" :
1391*4882a593Smuzhiyun 		   ((p_filter_cmd->opcode == QED_FILTER_MOVE) ?
1392*4882a593Smuzhiyun 		    "MOVE" : "REPLACE")),
1393*4882a593Smuzhiyun 		   (p_filter_cmd->type == QED_FILTER_MAC) ? "MAC" :
1394*4882a593Smuzhiyun 		   ((p_filter_cmd->type == QED_FILTER_VLAN) ?
1395*4882a593Smuzhiyun 		    "VLAN" : "MAC & VLAN"),
1396*4882a593Smuzhiyun 		   p_ramrod->filter_cmd_hdr.cmd_cnt,
1397*4882a593Smuzhiyun 		   p_filter_cmd->is_rx_filter,
1398*4882a593Smuzhiyun 		   p_filter_cmd->is_tx_filter);
1399*4882a593Smuzhiyun 	DP_VERBOSE(p_hwfn, QED_MSG_SP,
1400*4882a593Smuzhiyun 		   "vport_to_add_to = %d, vport_to_remove_from = %d, mac = %2x:%2x:%2x:%2x:%2x:%2x, vlan = %d\n",
1401*4882a593Smuzhiyun 		   p_filter_cmd->vport_to_add_to,
1402*4882a593Smuzhiyun 		   p_filter_cmd->vport_to_remove_from,
1403*4882a593Smuzhiyun 		   p_filter_cmd->mac[0],
1404*4882a593Smuzhiyun 		   p_filter_cmd->mac[1],
1405*4882a593Smuzhiyun 		   p_filter_cmd->mac[2],
1406*4882a593Smuzhiyun 		   p_filter_cmd->mac[3],
1407*4882a593Smuzhiyun 		   p_filter_cmd->mac[4],
1408*4882a593Smuzhiyun 		   p_filter_cmd->mac[5],
1409*4882a593Smuzhiyun 		   p_filter_cmd->vlan);
1410*4882a593Smuzhiyun 
1411*4882a593Smuzhiyun 	return 0;
1412*4882a593Smuzhiyun }
1413*4882a593Smuzhiyun 
1414*4882a593Smuzhiyun /*******************************************************************************
1415*4882a593Smuzhiyun  * Description:
1416*4882a593Smuzhiyun  *         Calculates crc 32 on a buffer
1417*4882a593Smuzhiyun  *         Note: crc32_length MUST be aligned to 8
1418*4882a593Smuzhiyun  * Return:
1419*4882a593Smuzhiyun  ******************************************************************************/
qed_calc_crc32c(u8 * crc32_packet,u32 crc32_length,u32 crc32_seed,u8 complement)1420*4882a593Smuzhiyun static u32 qed_calc_crc32c(u8 *crc32_packet,
1421*4882a593Smuzhiyun 			   u32 crc32_length, u32 crc32_seed, u8 complement)
1422*4882a593Smuzhiyun {
1423*4882a593Smuzhiyun 	u32 byte = 0, bit = 0, crc32_result = crc32_seed;
1424*4882a593Smuzhiyun 	u8 msb = 0, current_byte = 0;
1425*4882a593Smuzhiyun 
1426*4882a593Smuzhiyun 	if ((!crc32_packet) ||
1427*4882a593Smuzhiyun 	    (crc32_length == 0) ||
1428*4882a593Smuzhiyun 	    ((crc32_length % 8) != 0))
1429*4882a593Smuzhiyun 		return crc32_result;
1430*4882a593Smuzhiyun 	for (byte = 0; byte < crc32_length; byte++) {
1431*4882a593Smuzhiyun 		current_byte = crc32_packet[byte];
1432*4882a593Smuzhiyun 		for (bit = 0; bit < 8; bit++) {
1433*4882a593Smuzhiyun 			msb = (u8)(crc32_result >> 31);
1434*4882a593Smuzhiyun 			crc32_result = crc32_result << 1;
1435*4882a593Smuzhiyun 			if (msb != (0x1 & (current_byte >> bit))) {
1436*4882a593Smuzhiyun 				crc32_result = crc32_result ^ CRC32_POLY;
1437*4882a593Smuzhiyun 				crc32_result |= 1; /*crc32_result[0] = 1;*/
1438*4882a593Smuzhiyun 			}
1439*4882a593Smuzhiyun 		}
1440*4882a593Smuzhiyun 	}
1441*4882a593Smuzhiyun 	return crc32_result;
1442*4882a593Smuzhiyun }
1443*4882a593Smuzhiyun 
qed_crc32c_le(u32 seed,u8 * mac,u32 len)1444*4882a593Smuzhiyun static u32 qed_crc32c_le(u32 seed, u8 *mac, u32 len)
1445*4882a593Smuzhiyun {
1446*4882a593Smuzhiyun 	u32 packet_buf[2] = { 0 };
1447*4882a593Smuzhiyun 
1448*4882a593Smuzhiyun 	memcpy((u8 *)(&packet_buf[0]), &mac[0], 6);
1449*4882a593Smuzhiyun 	return qed_calc_crc32c((u8 *)packet_buf, 8, seed, 0);
1450*4882a593Smuzhiyun }
1451*4882a593Smuzhiyun 
qed_mcast_bin_from_mac(u8 * mac)1452*4882a593Smuzhiyun u8 qed_mcast_bin_from_mac(u8 *mac)
1453*4882a593Smuzhiyun {
1454*4882a593Smuzhiyun 	u32 crc = qed_crc32c_le(ETH_MULTICAST_BIN_FROM_MAC_SEED,
1455*4882a593Smuzhiyun 				mac, ETH_ALEN);
1456*4882a593Smuzhiyun 
1457*4882a593Smuzhiyun 	return crc & 0xff;
1458*4882a593Smuzhiyun }
1459*4882a593Smuzhiyun 
1460*4882a593Smuzhiyun static int
qed_sp_eth_filter_mcast(struct qed_hwfn * p_hwfn,u16 opaque_fid,struct qed_filter_mcast * p_filter_cmd,enum spq_mode comp_mode,struct qed_spq_comp_cb * p_comp_data)1461*4882a593Smuzhiyun qed_sp_eth_filter_mcast(struct qed_hwfn *p_hwfn,
1462*4882a593Smuzhiyun 			u16 opaque_fid,
1463*4882a593Smuzhiyun 			struct qed_filter_mcast *p_filter_cmd,
1464*4882a593Smuzhiyun 			enum spq_mode comp_mode,
1465*4882a593Smuzhiyun 			struct qed_spq_comp_cb *p_comp_data)
1466*4882a593Smuzhiyun {
1467*4882a593Smuzhiyun 	struct vport_update_ramrod_data *p_ramrod = NULL;
1468*4882a593Smuzhiyun 	u32 bins[ETH_MULTICAST_MAC_BINS_IN_REGS];
1469*4882a593Smuzhiyun 	struct qed_spq_entry *p_ent = NULL;
1470*4882a593Smuzhiyun 	struct qed_sp_init_data init_data;
1471*4882a593Smuzhiyun 	u8 abs_vport_id = 0;
1472*4882a593Smuzhiyun 	int rc, i;
1473*4882a593Smuzhiyun 
1474*4882a593Smuzhiyun 	if (p_filter_cmd->opcode == QED_FILTER_ADD)
1475*4882a593Smuzhiyun 		rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to,
1476*4882a593Smuzhiyun 				  &abs_vport_id);
1477*4882a593Smuzhiyun 	else
1478*4882a593Smuzhiyun 		rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from,
1479*4882a593Smuzhiyun 				  &abs_vport_id);
1480*4882a593Smuzhiyun 	if (rc)
1481*4882a593Smuzhiyun 		return rc;
1482*4882a593Smuzhiyun 
1483*4882a593Smuzhiyun 	/* Get SPQ entry */
1484*4882a593Smuzhiyun 	memset(&init_data, 0, sizeof(init_data));
1485*4882a593Smuzhiyun 	init_data.cid = qed_spq_get_cid(p_hwfn);
1486*4882a593Smuzhiyun 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1487*4882a593Smuzhiyun 	init_data.comp_mode = comp_mode;
1488*4882a593Smuzhiyun 	init_data.p_comp_data = p_comp_data;
1489*4882a593Smuzhiyun 
1490*4882a593Smuzhiyun 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1491*4882a593Smuzhiyun 				 ETH_RAMROD_VPORT_UPDATE,
1492*4882a593Smuzhiyun 				 PROTOCOLID_ETH, &init_data);
1493*4882a593Smuzhiyun 	if (rc) {
1494*4882a593Smuzhiyun 		DP_ERR(p_hwfn, "Multi-cast command failed %d\n", rc);
1495*4882a593Smuzhiyun 		return rc;
1496*4882a593Smuzhiyun 	}
1497*4882a593Smuzhiyun 
1498*4882a593Smuzhiyun 	p_ramrod = &p_ent->ramrod.vport_update;
1499*4882a593Smuzhiyun 	p_ramrod->common.update_approx_mcast_flg = 1;
1500*4882a593Smuzhiyun 
1501*4882a593Smuzhiyun 	/* explicitly clear out the entire vector */
1502*4882a593Smuzhiyun 	memset(&p_ramrod->approx_mcast.bins, 0,
1503*4882a593Smuzhiyun 	       sizeof(p_ramrod->approx_mcast.bins));
1504*4882a593Smuzhiyun 	memset(bins, 0, sizeof(bins));
1505*4882a593Smuzhiyun 	/* filter ADD op is explicit set op and it removes
1506*4882a593Smuzhiyun 	 *  any existing filters for the vport
1507*4882a593Smuzhiyun 	 */
1508*4882a593Smuzhiyun 	if (p_filter_cmd->opcode == QED_FILTER_ADD) {
1509*4882a593Smuzhiyun 		for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
1510*4882a593Smuzhiyun 			u32 bit, nbits;
1511*4882a593Smuzhiyun 
1512*4882a593Smuzhiyun 			bit = qed_mcast_bin_from_mac(p_filter_cmd->mac[i]);
1513*4882a593Smuzhiyun 			nbits = sizeof(u32) * BITS_PER_BYTE;
1514*4882a593Smuzhiyun 			bins[bit / nbits] |= 1 << (bit % nbits);
1515*4882a593Smuzhiyun 		}
1516*4882a593Smuzhiyun 
1517*4882a593Smuzhiyun 		/* Convert to correct endianity */
1518*4882a593Smuzhiyun 		for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
1519*4882a593Smuzhiyun 			struct vport_update_ramrod_mcast *p_ramrod_bins;
1520*4882a593Smuzhiyun 
1521*4882a593Smuzhiyun 			p_ramrod_bins = &p_ramrod->approx_mcast;
1522*4882a593Smuzhiyun 			p_ramrod_bins->bins[i] = cpu_to_le32(bins[i]);
1523*4882a593Smuzhiyun 		}
1524*4882a593Smuzhiyun 	}
1525*4882a593Smuzhiyun 
1526*4882a593Smuzhiyun 	p_ramrod->common.vport_id = abs_vport_id;
1527*4882a593Smuzhiyun 
1528*4882a593Smuzhiyun 	return qed_spq_post(p_hwfn, p_ent, NULL);
1529*4882a593Smuzhiyun }
1530*4882a593Smuzhiyun 
qed_filter_mcast_cmd(struct qed_dev * cdev,struct qed_filter_mcast * p_filter_cmd,enum spq_mode comp_mode,struct qed_spq_comp_cb * p_comp_data)1531*4882a593Smuzhiyun static int qed_filter_mcast_cmd(struct qed_dev *cdev,
1532*4882a593Smuzhiyun 				struct qed_filter_mcast *p_filter_cmd,
1533*4882a593Smuzhiyun 				enum spq_mode comp_mode,
1534*4882a593Smuzhiyun 				struct qed_spq_comp_cb *p_comp_data)
1535*4882a593Smuzhiyun {
1536*4882a593Smuzhiyun 	int rc = 0;
1537*4882a593Smuzhiyun 	int i;
1538*4882a593Smuzhiyun 
1539*4882a593Smuzhiyun 	/* only ADD and REMOVE operations are supported for multi-cast */
1540*4882a593Smuzhiyun 	if ((p_filter_cmd->opcode != QED_FILTER_ADD &&
1541*4882a593Smuzhiyun 	     (p_filter_cmd->opcode != QED_FILTER_REMOVE)) ||
1542*4882a593Smuzhiyun 	    (p_filter_cmd->num_mc_addrs > QED_MAX_MC_ADDRS))
1543*4882a593Smuzhiyun 		return -EINVAL;
1544*4882a593Smuzhiyun 
1545*4882a593Smuzhiyun 	for_each_hwfn(cdev, i) {
1546*4882a593Smuzhiyun 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1547*4882a593Smuzhiyun 
1548*4882a593Smuzhiyun 		u16 opaque_fid;
1549*4882a593Smuzhiyun 
1550*4882a593Smuzhiyun 		if (IS_VF(cdev)) {
1551*4882a593Smuzhiyun 			qed_vf_pf_filter_mcast(p_hwfn, p_filter_cmd);
1552*4882a593Smuzhiyun 			continue;
1553*4882a593Smuzhiyun 		}
1554*4882a593Smuzhiyun 
1555*4882a593Smuzhiyun 		opaque_fid = p_hwfn->hw_info.opaque_fid;
1556*4882a593Smuzhiyun 
1557*4882a593Smuzhiyun 		rc = qed_sp_eth_filter_mcast(p_hwfn,
1558*4882a593Smuzhiyun 					     opaque_fid,
1559*4882a593Smuzhiyun 					     p_filter_cmd,
1560*4882a593Smuzhiyun 					     comp_mode, p_comp_data);
1561*4882a593Smuzhiyun 	}
1562*4882a593Smuzhiyun 	return rc;
1563*4882a593Smuzhiyun }
1564*4882a593Smuzhiyun 
qed_filter_ucast_cmd(struct qed_dev * cdev,struct qed_filter_ucast * p_filter_cmd,enum spq_mode comp_mode,struct qed_spq_comp_cb * p_comp_data)1565*4882a593Smuzhiyun static int qed_filter_ucast_cmd(struct qed_dev *cdev,
1566*4882a593Smuzhiyun 				struct qed_filter_ucast *p_filter_cmd,
1567*4882a593Smuzhiyun 				enum spq_mode comp_mode,
1568*4882a593Smuzhiyun 				struct qed_spq_comp_cb *p_comp_data)
1569*4882a593Smuzhiyun {
1570*4882a593Smuzhiyun 	int rc = 0;
1571*4882a593Smuzhiyun 	int i;
1572*4882a593Smuzhiyun 
1573*4882a593Smuzhiyun 	for_each_hwfn(cdev, i) {
1574*4882a593Smuzhiyun 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1575*4882a593Smuzhiyun 		u16 opaque_fid;
1576*4882a593Smuzhiyun 
1577*4882a593Smuzhiyun 		if (IS_VF(cdev)) {
1578*4882a593Smuzhiyun 			rc = qed_vf_pf_filter_ucast(p_hwfn, p_filter_cmd);
1579*4882a593Smuzhiyun 			continue;
1580*4882a593Smuzhiyun 		}
1581*4882a593Smuzhiyun 
1582*4882a593Smuzhiyun 		opaque_fid = p_hwfn->hw_info.opaque_fid;
1583*4882a593Smuzhiyun 
1584*4882a593Smuzhiyun 		rc = qed_sp_eth_filter_ucast(p_hwfn,
1585*4882a593Smuzhiyun 					     opaque_fid,
1586*4882a593Smuzhiyun 					     p_filter_cmd,
1587*4882a593Smuzhiyun 					     comp_mode, p_comp_data);
1588*4882a593Smuzhiyun 		if (rc)
1589*4882a593Smuzhiyun 			break;
1590*4882a593Smuzhiyun 	}
1591*4882a593Smuzhiyun 
1592*4882a593Smuzhiyun 	return rc;
1593*4882a593Smuzhiyun }
1594*4882a593Smuzhiyun 
1595*4882a593Smuzhiyun /* Statistics related code */
__qed_get_vport_pstats_addrlen(struct qed_hwfn * p_hwfn,u32 * p_addr,u32 * p_len,u16 statistics_bin)1596*4882a593Smuzhiyun static void __qed_get_vport_pstats_addrlen(struct qed_hwfn *p_hwfn,
1597*4882a593Smuzhiyun 					   u32 *p_addr,
1598*4882a593Smuzhiyun 					   u32 *p_len, u16 statistics_bin)
1599*4882a593Smuzhiyun {
1600*4882a593Smuzhiyun 	if (IS_PF(p_hwfn->cdev)) {
1601*4882a593Smuzhiyun 		*p_addr = BAR0_MAP_REG_PSDM_RAM +
1602*4882a593Smuzhiyun 		    PSTORM_QUEUE_STAT_OFFSET(statistics_bin);
1603*4882a593Smuzhiyun 		*p_len = sizeof(struct eth_pstorm_per_queue_stat);
1604*4882a593Smuzhiyun 	} else {
1605*4882a593Smuzhiyun 		struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info;
1606*4882a593Smuzhiyun 		struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
1607*4882a593Smuzhiyun 
1608*4882a593Smuzhiyun 		*p_addr = p_resp->pfdev_info.stats_info.pstats.address;
1609*4882a593Smuzhiyun 		*p_len = p_resp->pfdev_info.stats_info.pstats.len;
1610*4882a593Smuzhiyun 	}
1611*4882a593Smuzhiyun }
1612*4882a593Smuzhiyun 
1613*4882a593Smuzhiyun static noinline_for_stack void
__qed_get_vport_pstats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_eth_stats * p_stats,u16 statistics_bin)1614*4882a593Smuzhiyun __qed_get_vport_pstats(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
1615*4882a593Smuzhiyun 		       struct qed_eth_stats *p_stats, u16 statistics_bin)
1616*4882a593Smuzhiyun {
1617*4882a593Smuzhiyun 	struct eth_pstorm_per_queue_stat pstats;
1618*4882a593Smuzhiyun 	u32 pstats_addr = 0, pstats_len = 0;
1619*4882a593Smuzhiyun 
1620*4882a593Smuzhiyun 	__qed_get_vport_pstats_addrlen(p_hwfn, &pstats_addr, &pstats_len,
1621*4882a593Smuzhiyun 				       statistics_bin);
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun 	memset(&pstats, 0, sizeof(pstats));
1624*4882a593Smuzhiyun 	qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, pstats_len);
1625*4882a593Smuzhiyun 
1626*4882a593Smuzhiyun 	p_stats->common.tx_ucast_bytes +=
1627*4882a593Smuzhiyun 	    HILO_64_REGPAIR(pstats.sent_ucast_bytes);
1628*4882a593Smuzhiyun 	p_stats->common.tx_mcast_bytes +=
1629*4882a593Smuzhiyun 	    HILO_64_REGPAIR(pstats.sent_mcast_bytes);
1630*4882a593Smuzhiyun 	p_stats->common.tx_bcast_bytes +=
1631*4882a593Smuzhiyun 	    HILO_64_REGPAIR(pstats.sent_bcast_bytes);
1632*4882a593Smuzhiyun 	p_stats->common.tx_ucast_pkts +=
1633*4882a593Smuzhiyun 	    HILO_64_REGPAIR(pstats.sent_ucast_pkts);
1634*4882a593Smuzhiyun 	p_stats->common.tx_mcast_pkts +=
1635*4882a593Smuzhiyun 	    HILO_64_REGPAIR(pstats.sent_mcast_pkts);
1636*4882a593Smuzhiyun 	p_stats->common.tx_bcast_pkts +=
1637*4882a593Smuzhiyun 	    HILO_64_REGPAIR(pstats.sent_bcast_pkts);
1638*4882a593Smuzhiyun 	p_stats->common.tx_err_drop_pkts +=
1639*4882a593Smuzhiyun 	    HILO_64_REGPAIR(pstats.error_drop_pkts);
1640*4882a593Smuzhiyun }
1641*4882a593Smuzhiyun 
1642*4882a593Smuzhiyun static noinline_for_stack void
__qed_get_vport_tstats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_eth_stats * p_stats,u16 statistics_bin)1643*4882a593Smuzhiyun __qed_get_vport_tstats(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
1644*4882a593Smuzhiyun 		       struct qed_eth_stats *p_stats, u16 statistics_bin)
1645*4882a593Smuzhiyun {
1646*4882a593Smuzhiyun 	struct tstorm_per_port_stat tstats;
1647*4882a593Smuzhiyun 	u32 tstats_addr, tstats_len;
1648*4882a593Smuzhiyun 
1649*4882a593Smuzhiyun 	if (IS_PF(p_hwfn->cdev)) {
1650*4882a593Smuzhiyun 		tstats_addr = BAR0_MAP_REG_TSDM_RAM +
1651*4882a593Smuzhiyun 		    TSTORM_PORT_STAT_OFFSET(MFW_PORT(p_hwfn));
1652*4882a593Smuzhiyun 		tstats_len = sizeof(struct tstorm_per_port_stat);
1653*4882a593Smuzhiyun 	} else {
1654*4882a593Smuzhiyun 		struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info;
1655*4882a593Smuzhiyun 		struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
1656*4882a593Smuzhiyun 
1657*4882a593Smuzhiyun 		tstats_addr = p_resp->pfdev_info.stats_info.tstats.address;
1658*4882a593Smuzhiyun 		tstats_len = p_resp->pfdev_info.stats_info.tstats.len;
1659*4882a593Smuzhiyun 	}
1660*4882a593Smuzhiyun 
1661*4882a593Smuzhiyun 	memset(&tstats, 0, sizeof(tstats));
1662*4882a593Smuzhiyun 	qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, tstats_len);
1663*4882a593Smuzhiyun 
1664*4882a593Smuzhiyun 	p_stats->common.mftag_filter_discards +=
1665*4882a593Smuzhiyun 	    HILO_64_REGPAIR(tstats.mftag_filter_discard);
1666*4882a593Smuzhiyun 	p_stats->common.mac_filter_discards +=
1667*4882a593Smuzhiyun 	    HILO_64_REGPAIR(tstats.eth_mac_filter_discard);
1668*4882a593Smuzhiyun 	p_stats->common.gft_filter_drop +=
1669*4882a593Smuzhiyun 		HILO_64_REGPAIR(tstats.eth_gft_drop_pkt);
1670*4882a593Smuzhiyun }
1671*4882a593Smuzhiyun 
__qed_get_vport_ustats_addrlen(struct qed_hwfn * p_hwfn,u32 * p_addr,u32 * p_len,u16 statistics_bin)1672*4882a593Smuzhiyun static void __qed_get_vport_ustats_addrlen(struct qed_hwfn *p_hwfn,
1673*4882a593Smuzhiyun 					   u32 *p_addr,
1674*4882a593Smuzhiyun 					   u32 *p_len, u16 statistics_bin)
1675*4882a593Smuzhiyun {
1676*4882a593Smuzhiyun 	if (IS_PF(p_hwfn->cdev)) {
1677*4882a593Smuzhiyun 		*p_addr = BAR0_MAP_REG_USDM_RAM +
1678*4882a593Smuzhiyun 		    USTORM_QUEUE_STAT_OFFSET(statistics_bin);
1679*4882a593Smuzhiyun 		*p_len = sizeof(struct eth_ustorm_per_queue_stat);
1680*4882a593Smuzhiyun 	} else {
1681*4882a593Smuzhiyun 		struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info;
1682*4882a593Smuzhiyun 		struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
1683*4882a593Smuzhiyun 
1684*4882a593Smuzhiyun 		*p_addr = p_resp->pfdev_info.stats_info.ustats.address;
1685*4882a593Smuzhiyun 		*p_len = p_resp->pfdev_info.stats_info.ustats.len;
1686*4882a593Smuzhiyun 	}
1687*4882a593Smuzhiyun }
1688*4882a593Smuzhiyun 
1689*4882a593Smuzhiyun static noinline_for_stack
__qed_get_vport_ustats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_eth_stats * p_stats,u16 statistics_bin)1690*4882a593Smuzhiyun void __qed_get_vport_ustats(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
1691*4882a593Smuzhiyun 			    struct qed_eth_stats *p_stats, u16 statistics_bin)
1692*4882a593Smuzhiyun {
1693*4882a593Smuzhiyun 	struct eth_ustorm_per_queue_stat ustats;
1694*4882a593Smuzhiyun 	u32 ustats_addr = 0, ustats_len = 0;
1695*4882a593Smuzhiyun 
1696*4882a593Smuzhiyun 	__qed_get_vport_ustats_addrlen(p_hwfn, &ustats_addr, &ustats_len,
1697*4882a593Smuzhiyun 				       statistics_bin);
1698*4882a593Smuzhiyun 
1699*4882a593Smuzhiyun 	memset(&ustats, 0, sizeof(ustats));
1700*4882a593Smuzhiyun 	qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, ustats_len);
1701*4882a593Smuzhiyun 
1702*4882a593Smuzhiyun 	p_stats->common.rx_ucast_bytes +=
1703*4882a593Smuzhiyun 	    HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
1704*4882a593Smuzhiyun 	p_stats->common.rx_mcast_bytes +=
1705*4882a593Smuzhiyun 	    HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
1706*4882a593Smuzhiyun 	p_stats->common.rx_bcast_bytes +=
1707*4882a593Smuzhiyun 	    HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
1708*4882a593Smuzhiyun 	p_stats->common.rx_ucast_pkts += HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
1709*4882a593Smuzhiyun 	p_stats->common.rx_mcast_pkts += HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
1710*4882a593Smuzhiyun 	p_stats->common.rx_bcast_pkts += HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
1711*4882a593Smuzhiyun }
1712*4882a593Smuzhiyun 
__qed_get_vport_mstats_addrlen(struct qed_hwfn * p_hwfn,u32 * p_addr,u32 * p_len,u16 statistics_bin)1713*4882a593Smuzhiyun static void __qed_get_vport_mstats_addrlen(struct qed_hwfn *p_hwfn,
1714*4882a593Smuzhiyun 					   u32 *p_addr,
1715*4882a593Smuzhiyun 					   u32 *p_len, u16 statistics_bin)
1716*4882a593Smuzhiyun {
1717*4882a593Smuzhiyun 	if (IS_PF(p_hwfn->cdev)) {
1718*4882a593Smuzhiyun 		*p_addr = BAR0_MAP_REG_MSDM_RAM +
1719*4882a593Smuzhiyun 		    MSTORM_QUEUE_STAT_OFFSET(statistics_bin);
1720*4882a593Smuzhiyun 		*p_len = sizeof(struct eth_mstorm_per_queue_stat);
1721*4882a593Smuzhiyun 	} else {
1722*4882a593Smuzhiyun 		struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info;
1723*4882a593Smuzhiyun 		struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
1724*4882a593Smuzhiyun 
1725*4882a593Smuzhiyun 		*p_addr = p_resp->pfdev_info.stats_info.mstats.address;
1726*4882a593Smuzhiyun 		*p_len = p_resp->pfdev_info.stats_info.mstats.len;
1727*4882a593Smuzhiyun 	}
1728*4882a593Smuzhiyun }
1729*4882a593Smuzhiyun 
1730*4882a593Smuzhiyun static noinline_for_stack void
__qed_get_vport_mstats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_eth_stats * p_stats,u16 statistics_bin)1731*4882a593Smuzhiyun __qed_get_vport_mstats(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
1732*4882a593Smuzhiyun 		       struct qed_eth_stats *p_stats, u16 statistics_bin)
1733*4882a593Smuzhiyun {
1734*4882a593Smuzhiyun 	struct eth_mstorm_per_queue_stat mstats;
1735*4882a593Smuzhiyun 	u32 mstats_addr = 0, mstats_len = 0;
1736*4882a593Smuzhiyun 
1737*4882a593Smuzhiyun 	__qed_get_vport_mstats_addrlen(p_hwfn, &mstats_addr, &mstats_len,
1738*4882a593Smuzhiyun 				       statistics_bin);
1739*4882a593Smuzhiyun 
1740*4882a593Smuzhiyun 	memset(&mstats, 0, sizeof(mstats));
1741*4882a593Smuzhiyun 	qed_memcpy_from(p_hwfn, p_ptt, &mstats, mstats_addr, mstats_len);
1742*4882a593Smuzhiyun 
1743*4882a593Smuzhiyun 	p_stats->common.no_buff_discards +=
1744*4882a593Smuzhiyun 	    HILO_64_REGPAIR(mstats.no_buff_discard);
1745*4882a593Smuzhiyun 	p_stats->common.packet_too_big_discard +=
1746*4882a593Smuzhiyun 	    HILO_64_REGPAIR(mstats.packet_too_big_discard);
1747*4882a593Smuzhiyun 	p_stats->common.ttl0_discard += HILO_64_REGPAIR(mstats.ttl0_discard);
1748*4882a593Smuzhiyun 	p_stats->common.tpa_coalesced_pkts +=
1749*4882a593Smuzhiyun 	    HILO_64_REGPAIR(mstats.tpa_coalesced_pkts);
1750*4882a593Smuzhiyun 	p_stats->common.tpa_coalesced_events +=
1751*4882a593Smuzhiyun 	    HILO_64_REGPAIR(mstats.tpa_coalesced_events);
1752*4882a593Smuzhiyun 	p_stats->common.tpa_aborts_num +=
1753*4882a593Smuzhiyun 	    HILO_64_REGPAIR(mstats.tpa_aborts_num);
1754*4882a593Smuzhiyun 	p_stats->common.tpa_coalesced_bytes +=
1755*4882a593Smuzhiyun 	    HILO_64_REGPAIR(mstats.tpa_coalesced_bytes);
1756*4882a593Smuzhiyun }
1757*4882a593Smuzhiyun 
1758*4882a593Smuzhiyun static noinline_for_stack void
__qed_get_vport_port_stats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_eth_stats * p_stats)1759*4882a593Smuzhiyun __qed_get_vport_port_stats(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
1760*4882a593Smuzhiyun 			   struct qed_eth_stats *p_stats)
1761*4882a593Smuzhiyun {
1762*4882a593Smuzhiyun 	struct qed_eth_stats_common *p_common = &p_stats->common;
1763*4882a593Smuzhiyun 	struct port_stats port_stats;
1764*4882a593Smuzhiyun 	int j;
1765*4882a593Smuzhiyun 
1766*4882a593Smuzhiyun 	memset(&port_stats, 0, sizeof(port_stats));
1767*4882a593Smuzhiyun 
1768*4882a593Smuzhiyun 	qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
1769*4882a593Smuzhiyun 			p_hwfn->mcp_info->port_addr +
1770*4882a593Smuzhiyun 			offsetof(struct public_port, stats),
1771*4882a593Smuzhiyun 			sizeof(port_stats));
1772*4882a593Smuzhiyun 
1773*4882a593Smuzhiyun 	p_common->rx_64_byte_packets += port_stats.eth.r64;
1774*4882a593Smuzhiyun 	p_common->rx_65_to_127_byte_packets += port_stats.eth.r127;
1775*4882a593Smuzhiyun 	p_common->rx_128_to_255_byte_packets += port_stats.eth.r255;
1776*4882a593Smuzhiyun 	p_common->rx_256_to_511_byte_packets += port_stats.eth.r511;
1777*4882a593Smuzhiyun 	p_common->rx_512_to_1023_byte_packets += port_stats.eth.r1023;
1778*4882a593Smuzhiyun 	p_common->rx_1024_to_1518_byte_packets += port_stats.eth.r1518;
1779*4882a593Smuzhiyun 	p_common->rx_crc_errors += port_stats.eth.rfcs;
1780*4882a593Smuzhiyun 	p_common->rx_mac_crtl_frames += port_stats.eth.rxcf;
1781*4882a593Smuzhiyun 	p_common->rx_pause_frames += port_stats.eth.rxpf;
1782*4882a593Smuzhiyun 	p_common->rx_pfc_frames += port_stats.eth.rxpp;
1783*4882a593Smuzhiyun 	p_common->rx_align_errors += port_stats.eth.raln;
1784*4882a593Smuzhiyun 	p_common->rx_carrier_errors += port_stats.eth.rfcr;
1785*4882a593Smuzhiyun 	p_common->rx_oversize_packets += port_stats.eth.rovr;
1786*4882a593Smuzhiyun 	p_common->rx_jabbers += port_stats.eth.rjbr;
1787*4882a593Smuzhiyun 	p_common->rx_undersize_packets += port_stats.eth.rund;
1788*4882a593Smuzhiyun 	p_common->rx_fragments += port_stats.eth.rfrg;
1789*4882a593Smuzhiyun 	p_common->tx_64_byte_packets += port_stats.eth.t64;
1790*4882a593Smuzhiyun 	p_common->tx_65_to_127_byte_packets += port_stats.eth.t127;
1791*4882a593Smuzhiyun 	p_common->tx_128_to_255_byte_packets += port_stats.eth.t255;
1792*4882a593Smuzhiyun 	p_common->tx_256_to_511_byte_packets += port_stats.eth.t511;
1793*4882a593Smuzhiyun 	p_common->tx_512_to_1023_byte_packets += port_stats.eth.t1023;
1794*4882a593Smuzhiyun 	p_common->tx_1024_to_1518_byte_packets += port_stats.eth.t1518;
1795*4882a593Smuzhiyun 	p_common->tx_pause_frames += port_stats.eth.txpf;
1796*4882a593Smuzhiyun 	p_common->tx_pfc_frames += port_stats.eth.txpp;
1797*4882a593Smuzhiyun 	p_common->rx_mac_bytes += port_stats.eth.rbyte;
1798*4882a593Smuzhiyun 	p_common->rx_mac_uc_packets += port_stats.eth.rxuca;
1799*4882a593Smuzhiyun 	p_common->rx_mac_mc_packets += port_stats.eth.rxmca;
1800*4882a593Smuzhiyun 	p_common->rx_mac_bc_packets += port_stats.eth.rxbca;
1801*4882a593Smuzhiyun 	p_common->rx_mac_frames_ok += port_stats.eth.rxpok;
1802*4882a593Smuzhiyun 	p_common->tx_mac_bytes += port_stats.eth.tbyte;
1803*4882a593Smuzhiyun 	p_common->tx_mac_uc_packets += port_stats.eth.txuca;
1804*4882a593Smuzhiyun 	p_common->tx_mac_mc_packets += port_stats.eth.txmca;
1805*4882a593Smuzhiyun 	p_common->tx_mac_bc_packets += port_stats.eth.txbca;
1806*4882a593Smuzhiyun 	p_common->tx_mac_ctrl_frames += port_stats.eth.txcf;
1807*4882a593Smuzhiyun 	for (j = 0; j < 8; j++) {
1808*4882a593Smuzhiyun 		p_common->brb_truncates += port_stats.brb.brb_truncate[j];
1809*4882a593Smuzhiyun 		p_common->brb_discards += port_stats.brb.brb_discard[j];
1810*4882a593Smuzhiyun 	}
1811*4882a593Smuzhiyun 
1812*4882a593Smuzhiyun 	if (QED_IS_BB(p_hwfn->cdev)) {
1813*4882a593Smuzhiyun 		struct qed_eth_stats_bb *p_bb = &p_stats->bb;
1814*4882a593Smuzhiyun 
1815*4882a593Smuzhiyun 		p_bb->rx_1519_to_1522_byte_packets +=
1816*4882a593Smuzhiyun 		    port_stats.eth.u0.bb0.r1522;
1817*4882a593Smuzhiyun 		p_bb->rx_1519_to_2047_byte_packets +=
1818*4882a593Smuzhiyun 		    port_stats.eth.u0.bb0.r2047;
1819*4882a593Smuzhiyun 		p_bb->rx_2048_to_4095_byte_packets +=
1820*4882a593Smuzhiyun 		    port_stats.eth.u0.bb0.r4095;
1821*4882a593Smuzhiyun 		p_bb->rx_4096_to_9216_byte_packets +=
1822*4882a593Smuzhiyun 		    port_stats.eth.u0.bb0.r9216;
1823*4882a593Smuzhiyun 		p_bb->rx_9217_to_16383_byte_packets +=
1824*4882a593Smuzhiyun 		    port_stats.eth.u0.bb0.r16383;
1825*4882a593Smuzhiyun 		p_bb->tx_1519_to_2047_byte_packets +=
1826*4882a593Smuzhiyun 		    port_stats.eth.u1.bb1.t2047;
1827*4882a593Smuzhiyun 		p_bb->tx_2048_to_4095_byte_packets +=
1828*4882a593Smuzhiyun 		    port_stats.eth.u1.bb1.t4095;
1829*4882a593Smuzhiyun 		p_bb->tx_4096_to_9216_byte_packets +=
1830*4882a593Smuzhiyun 		    port_stats.eth.u1.bb1.t9216;
1831*4882a593Smuzhiyun 		p_bb->tx_9217_to_16383_byte_packets +=
1832*4882a593Smuzhiyun 		    port_stats.eth.u1.bb1.t16383;
1833*4882a593Smuzhiyun 		p_bb->tx_lpi_entry_count += port_stats.eth.u2.bb2.tlpiec;
1834*4882a593Smuzhiyun 		p_bb->tx_total_collisions += port_stats.eth.u2.bb2.tncl;
1835*4882a593Smuzhiyun 	} else {
1836*4882a593Smuzhiyun 		struct qed_eth_stats_ah *p_ah = &p_stats->ah;
1837*4882a593Smuzhiyun 
1838*4882a593Smuzhiyun 		p_ah->rx_1519_to_max_byte_packets +=
1839*4882a593Smuzhiyun 		    port_stats.eth.u0.ah0.r1519_to_max;
1840*4882a593Smuzhiyun 		p_ah->tx_1519_to_max_byte_packets =
1841*4882a593Smuzhiyun 		    port_stats.eth.u1.ah1.t1519_to_max;
1842*4882a593Smuzhiyun 	}
1843*4882a593Smuzhiyun 
1844*4882a593Smuzhiyun 	p_common->link_change_count = qed_rd(p_hwfn, p_ptt,
1845*4882a593Smuzhiyun 					     p_hwfn->mcp_info->port_addr +
1846*4882a593Smuzhiyun 					     offsetof(struct public_port,
1847*4882a593Smuzhiyun 						      link_change_count));
1848*4882a593Smuzhiyun }
1849*4882a593Smuzhiyun 
__qed_get_vport_stats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_eth_stats * stats,u16 statistics_bin,bool b_get_port_stats)1850*4882a593Smuzhiyun static void __qed_get_vport_stats(struct qed_hwfn *p_hwfn,
1851*4882a593Smuzhiyun 				  struct qed_ptt *p_ptt,
1852*4882a593Smuzhiyun 				  struct qed_eth_stats *stats,
1853*4882a593Smuzhiyun 				  u16 statistics_bin, bool b_get_port_stats)
1854*4882a593Smuzhiyun {
1855*4882a593Smuzhiyun 	__qed_get_vport_mstats(p_hwfn, p_ptt, stats, statistics_bin);
1856*4882a593Smuzhiyun 	__qed_get_vport_ustats(p_hwfn, p_ptt, stats, statistics_bin);
1857*4882a593Smuzhiyun 	__qed_get_vport_tstats(p_hwfn, p_ptt, stats, statistics_bin);
1858*4882a593Smuzhiyun 	__qed_get_vport_pstats(p_hwfn, p_ptt, stats, statistics_bin);
1859*4882a593Smuzhiyun 
1860*4882a593Smuzhiyun 	if (b_get_port_stats && p_hwfn->mcp_info)
1861*4882a593Smuzhiyun 		__qed_get_vport_port_stats(p_hwfn, p_ptt, stats);
1862*4882a593Smuzhiyun }
1863*4882a593Smuzhiyun 
_qed_get_vport_stats(struct qed_dev * cdev,struct qed_eth_stats * stats)1864*4882a593Smuzhiyun static void _qed_get_vport_stats(struct qed_dev *cdev,
1865*4882a593Smuzhiyun 				 struct qed_eth_stats *stats)
1866*4882a593Smuzhiyun {
1867*4882a593Smuzhiyun 	u8 fw_vport = 0;
1868*4882a593Smuzhiyun 	int i;
1869*4882a593Smuzhiyun 
1870*4882a593Smuzhiyun 	memset(stats, 0, sizeof(*stats));
1871*4882a593Smuzhiyun 
1872*4882a593Smuzhiyun 	for_each_hwfn(cdev, i) {
1873*4882a593Smuzhiyun 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1874*4882a593Smuzhiyun 		struct qed_ptt *p_ptt = IS_PF(cdev) ? qed_ptt_acquire(p_hwfn)
1875*4882a593Smuzhiyun 						    :  NULL;
1876*4882a593Smuzhiyun 		bool b_get_port_stats;
1877*4882a593Smuzhiyun 
1878*4882a593Smuzhiyun 		if (IS_PF(cdev)) {
1879*4882a593Smuzhiyun 			/* The main vport index is relative first */
1880*4882a593Smuzhiyun 			if (qed_fw_vport(p_hwfn, 0, &fw_vport)) {
1881*4882a593Smuzhiyun 				DP_ERR(p_hwfn, "No vport available!\n");
1882*4882a593Smuzhiyun 				goto out;
1883*4882a593Smuzhiyun 			}
1884*4882a593Smuzhiyun 		}
1885*4882a593Smuzhiyun 
1886*4882a593Smuzhiyun 		if (IS_PF(cdev) && !p_ptt) {
1887*4882a593Smuzhiyun 			DP_ERR(p_hwfn, "Failed to acquire ptt\n");
1888*4882a593Smuzhiyun 			continue;
1889*4882a593Smuzhiyun 		}
1890*4882a593Smuzhiyun 
1891*4882a593Smuzhiyun 		b_get_port_stats = IS_PF(cdev) && IS_LEAD_HWFN(p_hwfn);
1892*4882a593Smuzhiyun 		__qed_get_vport_stats(p_hwfn, p_ptt, stats, fw_vport,
1893*4882a593Smuzhiyun 				      b_get_port_stats);
1894*4882a593Smuzhiyun 
1895*4882a593Smuzhiyun out:
1896*4882a593Smuzhiyun 		if (IS_PF(cdev) && p_ptt)
1897*4882a593Smuzhiyun 			qed_ptt_release(p_hwfn, p_ptt);
1898*4882a593Smuzhiyun 	}
1899*4882a593Smuzhiyun }
1900*4882a593Smuzhiyun 
qed_get_vport_stats(struct qed_dev * cdev,struct qed_eth_stats * stats)1901*4882a593Smuzhiyun void qed_get_vport_stats(struct qed_dev *cdev, struct qed_eth_stats *stats)
1902*4882a593Smuzhiyun {
1903*4882a593Smuzhiyun 	u32 i;
1904*4882a593Smuzhiyun 
1905*4882a593Smuzhiyun 	if (!cdev) {
1906*4882a593Smuzhiyun 		memset(stats, 0, sizeof(*stats));
1907*4882a593Smuzhiyun 		return;
1908*4882a593Smuzhiyun 	}
1909*4882a593Smuzhiyun 
1910*4882a593Smuzhiyun 	_qed_get_vport_stats(cdev, stats);
1911*4882a593Smuzhiyun 
1912*4882a593Smuzhiyun 	if (!cdev->reset_stats)
1913*4882a593Smuzhiyun 		return;
1914*4882a593Smuzhiyun 
1915*4882a593Smuzhiyun 	/* Reduce the statistics baseline */
1916*4882a593Smuzhiyun 	for (i = 0; i < sizeof(struct qed_eth_stats) / sizeof(u64); i++)
1917*4882a593Smuzhiyun 		((u64 *)stats)[i] -= ((u64 *)cdev->reset_stats)[i];
1918*4882a593Smuzhiyun }
1919*4882a593Smuzhiyun 
1920*4882a593Smuzhiyun /* zeroes V-PORT specific portion of stats (Port stats remains untouched) */
qed_reset_vport_stats(struct qed_dev * cdev)1921*4882a593Smuzhiyun void qed_reset_vport_stats(struct qed_dev *cdev)
1922*4882a593Smuzhiyun {
1923*4882a593Smuzhiyun 	int i;
1924*4882a593Smuzhiyun 
1925*4882a593Smuzhiyun 	for_each_hwfn(cdev, i) {
1926*4882a593Smuzhiyun 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1927*4882a593Smuzhiyun 		struct eth_mstorm_per_queue_stat mstats;
1928*4882a593Smuzhiyun 		struct eth_ustorm_per_queue_stat ustats;
1929*4882a593Smuzhiyun 		struct eth_pstorm_per_queue_stat pstats;
1930*4882a593Smuzhiyun 		struct qed_ptt *p_ptt = IS_PF(cdev) ? qed_ptt_acquire(p_hwfn)
1931*4882a593Smuzhiyun 						    : NULL;
1932*4882a593Smuzhiyun 		u32 addr = 0, len = 0;
1933*4882a593Smuzhiyun 
1934*4882a593Smuzhiyun 		if (IS_PF(cdev) && !p_ptt) {
1935*4882a593Smuzhiyun 			DP_ERR(p_hwfn, "Failed to acquire ptt\n");
1936*4882a593Smuzhiyun 			continue;
1937*4882a593Smuzhiyun 		}
1938*4882a593Smuzhiyun 
1939*4882a593Smuzhiyun 		memset(&mstats, 0, sizeof(mstats));
1940*4882a593Smuzhiyun 		__qed_get_vport_mstats_addrlen(p_hwfn, &addr, &len, 0);
1941*4882a593Smuzhiyun 		qed_memcpy_to(p_hwfn, p_ptt, addr, &mstats, len);
1942*4882a593Smuzhiyun 
1943*4882a593Smuzhiyun 		memset(&ustats, 0, sizeof(ustats));
1944*4882a593Smuzhiyun 		__qed_get_vport_ustats_addrlen(p_hwfn, &addr, &len, 0);
1945*4882a593Smuzhiyun 		qed_memcpy_to(p_hwfn, p_ptt, addr, &ustats, len);
1946*4882a593Smuzhiyun 
1947*4882a593Smuzhiyun 		memset(&pstats, 0, sizeof(pstats));
1948*4882a593Smuzhiyun 		__qed_get_vport_pstats_addrlen(p_hwfn, &addr, &len, 0);
1949*4882a593Smuzhiyun 		qed_memcpy_to(p_hwfn, p_ptt, addr, &pstats, len);
1950*4882a593Smuzhiyun 
1951*4882a593Smuzhiyun 		if (IS_PF(cdev))
1952*4882a593Smuzhiyun 			qed_ptt_release(p_hwfn, p_ptt);
1953*4882a593Smuzhiyun 	}
1954*4882a593Smuzhiyun 
1955*4882a593Smuzhiyun 	/* PORT statistics are not necessarily reset, so we need to
1956*4882a593Smuzhiyun 	 * read and create a baseline for future statistics.
1957*4882a593Smuzhiyun 	 * Link change stat is maintained by MFW, return its value as is.
1958*4882a593Smuzhiyun 	 */
1959*4882a593Smuzhiyun 	if (!cdev->reset_stats) {
1960*4882a593Smuzhiyun 		DP_INFO(cdev, "Reset stats not allocated\n");
1961*4882a593Smuzhiyun 	} else {
1962*4882a593Smuzhiyun 		_qed_get_vport_stats(cdev, cdev->reset_stats);
1963*4882a593Smuzhiyun 		cdev->reset_stats->common.link_change_count = 0;
1964*4882a593Smuzhiyun 	}
1965*4882a593Smuzhiyun }
1966*4882a593Smuzhiyun 
1967*4882a593Smuzhiyun static enum gft_profile_type
qed_arfs_mode_to_hsi(enum qed_filter_config_mode mode)1968*4882a593Smuzhiyun qed_arfs_mode_to_hsi(enum qed_filter_config_mode mode)
1969*4882a593Smuzhiyun {
1970*4882a593Smuzhiyun 	if (mode == QED_FILTER_CONFIG_MODE_5_TUPLE)
1971*4882a593Smuzhiyun 		return GFT_PROFILE_TYPE_4_TUPLE;
1972*4882a593Smuzhiyun 	if (mode == QED_FILTER_CONFIG_MODE_IP_DEST)
1973*4882a593Smuzhiyun 		return GFT_PROFILE_TYPE_IP_DST_ADDR;
1974*4882a593Smuzhiyun 	if (mode == QED_FILTER_CONFIG_MODE_IP_SRC)
1975*4882a593Smuzhiyun 		return GFT_PROFILE_TYPE_IP_SRC_ADDR;
1976*4882a593Smuzhiyun 	return GFT_PROFILE_TYPE_L4_DST_PORT;
1977*4882a593Smuzhiyun }
1978*4882a593Smuzhiyun 
qed_arfs_mode_configure(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_arfs_config_params * p_cfg_params)1979*4882a593Smuzhiyun void qed_arfs_mode_configure(struct qed_hwfn *p_hwfn,
1980*4882a593Smuzhiyun 			     struct qed_ptt *p_ptt,
1981*4882a593Smuzhiyun 			     struct qed_arfs_config_params *p_cfg_params)
1982*4882a593Smuzhiyun {
1983*4882a593Smuzhiyun 	if (test_bit(QED_MF_DISABLE_ARFS, &p_hwfn->cdev->mf_bits))
1984*4882a593Smuzhiyun 		return;
1985*4882a593Smuzhiyun 
1986*4882a593Smuzhiyun 	if (p_cfg_params->mode != QED_FILTER_CONFIG_MODE_DISABLE) {
1987*4882a593Smuzhiyun 		qed_gft_config(p_hwfn, p_ptt, p_hwfn->rel_pf_id,
1988*4882a593Smuzhiyun 			       p_cfg_params->tcp,
1989*4882a593Smuzhiyun 			       p_cfg_params->udp,
1990*4882a593Smuzhiyun 			       p_cfg_params->ipv4,
1991*4882a593Smuzhiyun 			       p_cfg_params->ipv6,
1992*4882a593Smuzhiyun 			       qed_arfs_mode_to_hsi(p_cfg_params->mode));
1993*4882a593Smuzhiyun 		DP_VERBOSE(p_hwfn,
1994*4882a593Smuzhiyun 			   QED_MSG_SP,
1995*4882a593Smuzhiyun 			   "Configured Filtering: tcp = %s, udp = %s, ipv4 = %s, ipv6 =%s mode=%08x\n",
1996*4882a593Smuzhiyun 			   p_cfg_params->tcp ? "Enable" : "Disable",
1997*4882a593Smuzhiyun 			   p_cfg_params->udp ? "Enable" : "Disable",
1998*4882a593Smuzhiyun 			   p_cfg_params->ipv4 ? "Enable" : "Disable",
1999*4882a593Smuzhiyun 			   p_cfg_params->ipv6 ? "Enable" : "Disable",
2000*4882a593Smuzhiyun 			   (u32)p_cfg_params->mode);
2001*4882a593Smuzhiyun 	} else {
2002*4882a593Smuzhiyun 		DP_VERBOSE(p_hwfn, QED_MSG_SP, "Disabled Filtering\n");
2003*4882a593Smuzhiyun 		qed_gft_disable(p_hwfn, p_ptt, p_hwfn->rel_pf_id);
2004*4882a593Smuzhiyun 	}
2005*4882a593Smuzhiyun }
2006*4882a593Smuzhiyun 
2007*4882a593Smuzhiyun int
qed_configure_rfs_ntuple_filter(struct qed_hwfn * p_hwfn,struct qed_spq_comp_cb * p_cb,struct qed_ntuple_filter_params * p_params)2008*4882a593Smuzhiyun qed_configure_rfs_ntuple_filter(struct qed_hwfn *p_hwfn,
2009*4882a593Smuzhiyun 				struct qed_spq_comp_cb *p_cb,
2010*4882a593Smuzhiyun 				struct qed_ntuple_filter_params *p_params)
2011*4882a593Smuzhiyun {
2012*4882a593Smuzhiyun 	struct rx_update_gft_filter_data *p_ramrod = NULL;
2013*4882a593Smuzhiyun 	struct qed_spq_entry *p_ent = NULL;
2014*4882a593Smuzhiyun 	struct qed_sp_init_data init_data;
2015*4882a593Smuzhiyun 	u16 abs_rx_q_id = 0;
2016*4882a593Smuzhiyun 	u8 abs_vport_id = 0;
2017*4882a593Smuzhiyun 	int rc = -EINVAL;
2018*4882a593Smuzhiyun 
2019*4882a593Smuzhiyun 	/* Get SPQ entry */
2020*4882a593Smuzhiyun 	memset(&init_data, 0, sizeof(init_data));
2021*4882a593Smuzhiyun 	init_data.cid = qed_spq_get_cid(p_hwfn);
2022*4882a593Smuzhiyun 
2023*4882a593Smuzhiyun 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
2024*4882a593Smuzhiyun 
2025*4882a593Smuzhiyun 	if (p_cb) {
2026*4882a593Smuzhiyun 		init_data.comp_mode = QED_SPQ_MODE_CB;
2027*4882a593Smuzhiyun 		init_data.p_comp_data = p_cb;
2028*4882a593Smuzhiyun 	} else {
2029*4882a593Smuzhiyun 		init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
2030*4882a593Smuzhiyun 	}
2031*4882a593Smuzhiyun 
2032*4882a593Smuzhiyun 	rc = qed_sp_init_request(p_hwfn, &p_ent,
2033*4882a593Smuzhiyun 				 ETH_RAMROD_GFT_UPDATE_FILTER,
2034*4882a593Smuzhiyun 				 PROTOCOLID_ETH, &init_data);
2035*4882a593Smuzhiyun 	if (rc)
2036*4882a593Smuzhiyun 		return rc;
2037*4882a593Smuzhiyun 
2038*4882a593Smuzhiyun 	p_ramrod = &p_ent->ramrod.rx_update_gft;
2039*4882a593Smuzhiyun 
2040*4882a593Smuzhiyun 	DMA_REGPAIR_LE(p_ramrod->pkt_hdr_addr, p_params->addr);
2041*4882a593Smuzhiyun 	p_ramrod->pkt_hdr_length = cpu_to_le16(p_params->length);
2042*4882a593Smuzhiyun 
2043*4882a593Smuzhiyun 	if (p_params->b_is_drop) {
2044*4882a593Smuzhiyun 		p_ramrod->vport_id = cpu_to_le16(ETH_GFT_TRASHCAN_VPORT);
2045*4882a593Smuzhiyun 	} else {
2046*4882a593Smuzhiyun 		rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
2047*4882a593Smuzhiyun 		if (rc)
2048*4882a593Smuzhiyun 			goto err;
2049*4882a593Smuzhiyun 
2050*4882a593Smuzhiyun 		if (p_params->qid != QED_RFS_NTUPLE_QID_RSS) {
2051*4882a593Smuzhiyun 			rc = qed_fw_l2_queue(p_hwfn, p_params->qid,
2052*4882a593Smuzhiyun 					     &abs_rx_q_id);
2053*4882a593Smuzhiyun 			if (rc)
2054*4882a593Smuzhiyun 				goto err;
2055*4882a593Smuzhiyun 
2056*4882a593Smuzhiyun 			p_ramrod->rx_qid_valid = 1;
2057*4882a593Smuzhiyun 			p_ramrod->rx_qid = cpu_to_le16(abs_rx_q_id);
2058*4882a593Smuzhiyun 		}
2059*4882a593Smuzhiyun 
2060*4882a593Smuzhiyun 		p_ramrod->vport_id = cpu_to_le16((u16)abs_vport_id);
2061*4882a593Smuzhiyun 	}
2062*4882a593Smuzhiyun 
2063*4882a593Smuzhiyun 	p_ramrod->flow_id_valid = 0;
2064*4882a593Smuzhiyun 	p_ramrod->flow_id = 0;
2065*4882a593Smuzhiyun 	p_ramrod->filter_action = p_params->b_is_add ? GFT_ADD_FILTER
2066*4882a593Smuzhiyun 	    : GFT_DELETE_FILTER;
2067*4882a593Smuzhiyun 
2068*4882a593Smuzhiyun 	DP_VERBOSE(p_hwfn, QED_MSG_SP,
2069*4882a593Smuzhiyun 		   "V[%0x], Q[%04x] - %s filter from 0x%llx [length %04xb]\n",
2070*4882a593Smuzhiyun 		   abs_vport_id, abs_rx_q_id,
2071*4882a593Smuzhiyun 		   p_params->b_is_add ? "Adding" : "Removing",
2072*4882a593Smuzhiyun 		   (u64)p_params->addr, p_params->length);
2073*4882a593Smuzhiyun 
2074*4882a593Smuzhiyun 	return qed_spq_post(p_hwfn, p_ent, NULL);
2075*4882a593Smuzhiyun 
2076*4882a593Smuzhiyun err:
2077*4882a593Smuzhiyun 	qed_sp_destroy_request(p_hwfn, p_ent);
2078*4882a593Smuzhiyun 	return rc;
2079*4882a593Smuzhiyun }
2080*4882a593Smuzhiyun 
qed_get_rxq_coalesce(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_queue_cid * p_cid,u16 * p_rx_coal)2081*4882a593Smuzhiyun int qed_get_rxq_coalesce(struct qed_hwfn *p_hwfn,
2082*4882a593Smuzhiyun 			 struct qed_ptt *p_ptt,
2083*4882a593Smuzhiyun 			 struct qed_queue_cid *p_cid, u16 *p_rx_coal)
2084*4882a593Smuzhiyun {
2085*4882a593Smuzhiyun 	u32 coalesce, address, is_valid;
2086*4882a593Smuzhiyun 	struct cau_sb_entry sb_entry;
2087*4882a593Smuzhiyun 	u8 timer_res;
2088*4882a593Smuzhiyun 	int rc;
2089*4882a593Smuzhiyun 
2090*4882a593Smuzhiyun 	rc = qed_dmae_grc2host(p_hwfn, p_ptt, CAU_REG_SB_VAR_MEMORY +
2091*4882a593Smuzhiyun 			       p_cid->sb_igu_id * sizeof(u64),
2092*4882a593Smuzhiyun 			       (u64)(uintptr_t)&sb_entry, 2, NULL);
2093*4882a593Smuzhiyun 	if (rc) {
2094*4882a593Smuzhiyun 		DP_ERR(p_hwfn, "dmae_grc2host failed %d\n", rc);
2095*4882a593Smuzhiyun 		return rc;
2096*4882a593Smuzhiyun 	}
2097*4882a593Smuzhiyun 
2098*4882a593Smuzhiyun 	timer_res = GET_FIELD(le32_to_cpu(sb_entry.params),
2099*4882a593Smuzhiyun 			      CAU_SB_ENTRY_TIMER_RES0);
2100*4882a593Smuzhiyun 
2101*4882a593Smuzhiyun 	address = BAR0_MAP_REG_USDM_RAM +
2102*4882a593Smuzhiyun 		  USTORM_ETH_QUEUE_ZONE_OFFSET(p_cid->abs.queue_id);
2103*4882a593Smuzhiyun 	coalesce = qed_rd(p_hwfn, p_ptt, address);
2104*4882a593Smuzhiyun 
2105*4882a593Smuzhiyun 	is_valid = GET_FIELD(coalesce, COALESCING_TIMESET_VALID);
2106*4882a593Smuzhiyun 	if (!is_valid)
2107*4882a593Smuzhiyun 		return -EINVAL;
2108*4882a593Smuzhiyun 
2109*4882a593Smuzhiyun 	coalesce = GET_FIELD(coalesce, COALESCING_TIMESET_TIMESET);
2110*4882a593Smuzhiyun 	*p_rx_coal = (u16)(coalesce << timer_res);
2111*4882a593Smuzhiyun 
2112*4882a593Smuzhiyun 	return 0;
2113*4882a593Smuzhiyun }
2114*4882a593Smuzhiyun 
qed_get_txq_coalesce(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_queue_cid * p_cid,u16 * p_tx_coal)2115*4882a593Smuzhiyun int qed_get_txq_coalesce(struct qed_hwfn *p_hwfn,
2116*4882a593Smuzhiyun 			 struct qed_ptt *p_ptt,
2117*4882a593Smuzhiyun 			 struct qed_queue_cid *p_cid, u16 *p_tx_coal)
2118*4882a593Smuzhiyun {
2119*4882a593Smuzhiyun 	u32 coalesce, address, is_valid;
2120*4882a593Smuzhiyun 	struct cau_sb_entry sb_entry;
2121*4882a593Smuzhiyun 	u8 timer_res;
2122*4882a593Smuzhiyun 	int rc;
2123*4882a593Smuzhiyun 
2124*4882a593Smuzhiyun 	rc = qed_dmae_grc2host(p_hwfn, p_ptt, CAU_REG_SB_VAR_MEMORY +
2125*4882a593Smuzhiyun 			       p_cid->sb_igu_id * sizeof(u64),
2126*4882a593Smuzhiyun 			       (u64)(uintptr_t)&sb_entry, 2, NULL);
2127*4882a593Smuzhiyun 	if (rc) {
2128*4882a593Smuzhiyun 		DP_ERR(p_hwfn, "dmae_grc2host failed %d\n", rc);
2129*4882a593Smuzhiyun 		return rc;
2130*4882a593Smuzhiyun 	}
2131*4882a593Smuzhiyun 
2132*4882a593Smuzhiyun 	timer_res = GET_FIELD(le32_to_cpu(sb_entry.params),
2133*4882a593Smuzhiyun 			      CAU_SB_ENTRY_TIMER_RES1);
2134*4882a593Smuzhiyun 
2135*4882a593Smuzhiyun 	address = BAR0_MAP_REG_XSDM_RAM +
2136*4882a593Smuzhiyun 		  XSTORM_ETH_QUEUE_ZONE_OFFSET(p_cid->abs.queue_id);
2137*4882a593Smuzhiyun 	coalesce = qed_rd(p_hwfn, p_ptt, address);
2138*4882a593Smuzhiyun 
2139*4882a593Smuzhiyun 	is_valid = GET_FIELD(coalesce, COALESCING_TIMESET_VALID);
2140*4882a593Smuzhiyun 	if (!is_valid)
2141*4882a593Smuzhiyun 		return -EINVAL;
2142*4882a593Smuzhiyun 
2143*4882a593Smuzhiyun 	coalesce = GET_FIELD(coalesce, COALESCING_TIMESET_TIMESET);
2144*4882a593Smuzhiyun 	*p_tx_coal = (u16)(coalesce << timer_res);
2145*4882a593Smuzhiyun 
2146*4882a593Smuzhiyun 	return 0;
2147*4882a593Smuzhiyun }
2148*4882a593Smuzhiyun 
qed_get_queue_coalesce(struct qed_hwfn * p_hwfn,u16 * p_coal,void * handle)2149*4882a593Smuzhiyun int qed_get_queue_coalesce(struct qed_hwfn *p_hwfn, u16 *p_coal, void *handle)
2150*4882a593Smuzhiyun {
2151*4882a593Smuzhiyun 	struct qed_queue_cid *p_cid = handle;
2152*4882a593Smuzhiyun 	struct qed_ptt *p_ptt;
2153*4882a593Smuzhiyun 	int rc = 0;
2154*4882a593Smuzhiyun 
2155*4882a593Smuzhiyun 	if (IS_VF(p_hwfn->cdev)) {
2156*4882a593Smuzhiyun 		rc = qed_vf_pf_get_coalesce(p_hwfn, p_coal, p_cid);
2157*4882a593Smuzhiyun 		if (rc)
2158*4882a593Smuzhiyun 			DP_NOTICE(p_hwfn, "Unable to read queue coalescing\n");
2159*4882a593Smuzhiyun 
2160*4882a593Smuzhiyun 		return rc;
2161*4882a593Smuzhiyun 	}
2162*4882a593Smuzhiyun 
2163*4882a593Smuzhiyun 	p_ptt = qed_ptt_acquire(p_hwfn);
2164*4882a593Smuzhiyun 	if (!p_ptt)
2165*4882a593Smuzhiyun 		return -EAGAIN;
2166*4882a593Smuzhiyun 
2167*4882a593Smuzhiyun 	if (p_cid->b_is_rx) {
2168*4882a593Smuzhiyun 		rc = qed_get_rxq_coalesce(p_hwfn, p_ptt, p_cid, p_coal);
2169*4882a593Smuzhiyun 		if (rc)
2170*4882a593Smuzhiyun 			goto out;
2171*4882a593Smuzhiyun 	} else {
2172*4882a593Smuzhiyun 		rc = qed_get_txq_coalesce(p_hwfn, p_ptt, p_cid, p_coal);
2173*4882a593Smuzhiyun 		if (rc)
2174*4882a593Smuzhiyun 			goto out;
2175*4882a593Smuzhiyun 	}
2176*4882a593Smuzhiyun 
2177*4882a593Smuzhiyun out:
2178*4882a593Smuzhiyun 	qed_ptt_release(p_hwfn, p_ptt);
2179*4882a593Smuzhiyun 
2180*4882a593Smuzhiyun 	return rc;
2181*4882a593Smuzhiyun }
2182*4882a593Smuzhiyun 
qed_fill_eth_dev_info(struct qed_dev * cdev,struct qed_dev_eth_info * info)2183*4882a593Smuzhiyun static int qed_fill_eth_dev_info(struct qed_dev *cdev,
2184*4882a593Smuzhiyun 				 struct qed_dev_eth_info *info)
2185*4882a593Smuzhiyun {
2186*4882a593Smuzhiyun 	struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
2187*4882a593Smuzhiyun 	int i;
2188*4882a593Smuzhiyun 
2189*4882a593Smuzhiyun 	memset(info, 0, sizeof(*info));
2190*4882a593Smuzhiyun 
2191*4882a593Smuzhiyun 	if (IS_PF(cdev)) {
2192*4882a593Smuzhiyun 		int max_vf_vlan_filters = 0;
2193*4882a593Smuzhiyun 		int max_vf_mac_filters = 0;
2194*4882a593Smuzhiyun 
2195*4882a593Smuzhiyun 		info->num_tc = p_hwfn->hw_info.num_hw_tc;
2196*4882a593Smuzhiyun 
2197*4882a593Smuzhiyun 		if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
2198*4882a593Smuzhiyun 			u16 num_queues = 0;
2199*4882a593Smuzhiyun 
2200*4882a593Smuzhiyun 			/* Since the feature controls only queue-zones,
2201*4882a593Smuzhiyun 			 * make sure we have the contexts [rx, xdp, tcs] to
2202*4882a593Smuzhiyun 			 * match.
2203*4882a593Smuzhiyun 			 */
2204*4882a593Smuzhiyun 			for_each_hwfn(cdev, i) {
2205*4882a593Smuzhiyun 				struct qed_hwfn *hwfn = &cdev->hwfns[i];
2206*4882a593Smuzhiyun 				u16 l2_queues = (u16)FEAT_NUM(hwfn,
2207*4882a593Smuzhiyun 							      QED_PF_L2_QUE);
2208*4882a593Smuzhiyun 				u16 cids;
2209*4882a593Smuzhiyun 
2210*4882a593Smuzhiyun 				cids = hwfn->pf_params.eth_pf_params.num_cons;
2211*4882a593Smuzhiyun 				cids /= (2 + info->num_tc);
2212*4882a593Smuzhiyun 				num_queues += min_t(u16, l2_queues, cids);
2213*4882a593Smuzhiyun 			}
2214*4882a593Smuzhiyun 
2215*4882a593Smuzhiyun 			/* queues might theoretically be >256, but interrupts'
2216*4882a593Smuzhiyun 			 * upper-limit guarantes that it would fit in a u8.
2217*4882a593Smuzhiyun 			 */
2218*4882a593Smuzhiyun 			if (cdev->int_params.fp_msix_cnt) {
2219*4882a593Smuzhiyun 				u8 irqs = cdev->int_params.fp_msix_cnt;
2220*4882a593Smuzhiyun 
2221*4882a593Smuzhiyun 				info->num_queues = (u8)min_t(u16,
2222*4882a593Smuzhiyun 							     num_queues, irqs);
2223*4882a593Smuzhiyun 			}
2224*4882a593Smuzhiyun 		} else {
2225*4882a593Smuzhiyun 			info->num_queues = cdev->num_hwfns;
2226*4882a593Smuzhiyun 		}
2227*4882a593Smuzhiyun 
2228*4882a593Smuzhiyun 		if (IS_QED_SRIOV(cdev)) {
2229*4882a593Smuzhiyun 			max_vf_vlan_filters = cdev->p_iov_info->total_vfs *
2230*4882a593Smuzhiyun 					      QED_ETH_VF_NUM_VLAN_FILTERS;
2231*4882a593Smuzhiyun 			max_vf_mac_filters = cdev->p_iov_info->total_vfs *
2232*4882a593Smuzhiyun 					     QED_ETH_VF_NUM_MAC_FILTERS;
2233*4882a593Smuzhiyun 		}
2234*4882a593Smuzhiyun 		info->num_vlan_filters = RESC_NUM(QED_LEADING_HWFN(cdev),
2235*4882a593Smuzhiyun 						  QED_VLAN) -
2236*4882a593Smuzhiyun 					 max_vf_vlan_filters;
2237*4882a593Smuzhiyun 		info->num_mac_filters = RESC_NUM(QED_LEADING_HWFN(cdev),
2238*4882a593Smuzhiyun 						 QED_MAC) -
2239*4882a593Smuzhiyun 					max_vf_mac_filters;
2240*4882a593Smuzhiyun 
2241*4882a593Smuzhiyun 		ether_addr_copy(info->port_mac,
2242*4882a593Smuzhiyun 				cdev->hwfns[0].hw_info.hw_mac_addr);
2243*4882a593Smuzhiyun 
2244*4882a593Smuzhiyun 		info->xdp_supported = true;
2245*4882a593Smuzhiyun 	} else {
2246*4882a593Smuzhiyun 		u16 total_cids = 0;
2247*4882a593Smuzhiyun 
2248*4882a593Smuzhiyun 		info->num_tc = 1;
2249*4882a593Smuzhiyun 
2250*4882a593Smuzhiyun 		/* Determine queues &  XDP support */
2251*4882a593Smuzhiyun 		for_each_hwfn(cdev, i) {
2252*4882a593Smuzhiyun 			struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
2253*4882a593Smuzhiyun 			u8 queues, cids;
2254*4882a593Smuzhiyun 
2255*4882a593Smuzhiyun 			qed_vf_get_num_cids(p_hwfn, &cids);
2256*4882a593Smuzhiyun 			qed_vf_get_num_rxqs(p_hwfn, &queues);
2257*4882a593Smuzhiyun 			info->num_queues += queues;
2258*4882a593Smuzhiyun 			total_cids += cids;
2259*4882a593Smuzhiyun 		}
2260*4882a593Smuzhiyun 
2261*4882a593Smuzhiyun 		/* Enable VF XDP in case PF guarntees sufficient connections */
2262*4882a593Smuzhiyun 		if (total_cids >= info->num_queues * 3)
2263*4882a593Smuzhiyun 			info->xdp_supported = true;
2264*4882a593Smuzhiyun 
2265*4882a593Smuzhiyun 		qed_vf_get_num_vlan_filters(&cdev->hwfns[0],
2266*4882a593Smuzhiyun 					    (u8 *)&info->num_vlan_filters);
2267*4882a593Smuzhiyun 		qed_vf_get_num_mac_filters(&cdev->hwfns[0],
2268*4882a593Smuzhiyun 					   (u8 *)&info->num_mac_filters);
2269*4882a593Smuzhiyun 		qed_vf_get_port_mac(&cdev->hwfns[0], info->port_mac);
2270*4882a593Smuzhiyun 
2271*4882a593Smuzhiyun 		info->is_legacy = !!cdev->hwfns[0].vf_iov_info->b_pre_fp_hsi;
2272*4882a593Smuzhiyun 	}
2273*4882a593Smuzhiyun 
2274*4882a593Smuzhiyun 	qed_fill_dev_info(cdev, &info->common);
2275*4882a593Smuzhiyun 
2276*4882a593Smuzhiyun 	if (IS_VF(cdev))
2277*4882a593Smuzhiyun 		eth_zero_addr(info->common.hw_mac);
2278*4882a593Smuzhiyun 
2279*4882a593Smuzhiyun 	return 0;
2280*4882a593Smuzhiyun }
2281*4882a593Smuzhiyun 
qed_register_eth_ops(struct qed_dev * cdev,struct qed_eth_cb_ops * ops,void * cookie)2282*4882a593Smuzhiyun static void qed_register_eth_ops(struct qed_dev *cdev,
2283*4882a593Smuzhiyun 				 struct qed_eth_cb_ops *ops, void *cookie)
2284*4882a593Smuzhiyun {
2285*4882a593Smuzhiyun 	cdev->protocol_ops.eth = ops;
2286*4882a593Smuzhiyun 	cdev->ops_cookie = cookie;
2287*4882a593Smuzhiyun 
2288*4882a593Smuzhiyun 	/* For VF, we start bulletin reading */
2289*4882a593Smuzhiyun 	if (IS_VF(cdev))
2290*4882a593Smuzhiyun 		qed_vf_start_iov_wq(cdev);
2291*4882a593Smuzhiyun }
2292*4882a593Smuzhiyun 
qed_check_mac(struct qed_dev * cdev,u8 * mac)2293*4882a593Smuzhiyun static bool qed_check_mac(struct qed_dev *cdev, u8 *mac)
2294*4882a593Smuzhiyun {
2295*4882a593Smuzhiyun 	if (IS_PF(cdev))
2296*4882a593Smuzhiyun 		return true;
2297*4882a593Smuzhiyun 
2298*4882a593Smuzhiyun 	return qed_vf_check_mac(&cdev->hwfns[0], mac);
2299*4882a593Smuzhiyun }
2300*4882a593Smuzhiyun 
qed_start_vport(struct qed_dev * cdev,struct qed_start_vport_params * params)2301*4882a593Smuzhiyun static int qed_start_vport(struct qed_dev *cdev,
2302*4882a593Smuzhiyun 			   struct qed_start_vport_params *params)
2303*4882a593Smuzhiyun {
2304*4882a593Smuzhiyun 	int rc, i;
2305*4882a593Smuzhiyun 
2306*4882a593Smuzhiyun 	for_each_hwfn(cdev, i) {
2307*4882a593Smuzhiyun 		struct qed_sp_vport_start_params start = { 0 };
2308*4882a593Smuzhiyun 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
2309*4882a593Smuzhiyun 
2310*4882a593Smuzhiyun 		start.tpa_mode = params->gro_enable ? QED_TPA_MODE_GRO :
2311*4882a593Smuzhiyun 							QED_TPA_MODE_NONE;
2312*4882a593Smuzhiyun 		start.remove_inner_vlan = params->remove_inner_vlan;
2313*4882a593Smuzhiyun 		start.only_untagged = true;	/* untagged only */
2314*4882a593Smuzhiyun 		start.drop_ttl0 = params->drop_ttl0;
2315*4882a593Smuzhiyun 		start.opaque_fid = p_hwfn->hw_info.opaque_fid;
2316*4882a593Smuzhiyun 		start.concrete_fid = p_hwfn->hw_info.concrete_fid;
2317*4882a593Smuzhiyun 		start.handle_ptp_pkts = params->handle_ptp_pkts;
2318*4882a593Smuzhiyun 		start.vport_id = params->vport_id;
2319*4882a593Smuzhiyun 		start.max_buffers_per_cqe = 16;
2320*4882a593Smuzhiyun 		start.mtu = params->mtu;
2321*4882a593Smuzhiyun 
2322*4882a593Smuzhiyun 		rc = qed_sp_vport_start(p_hwfn, &start);
2323*4882a593Smuzhiyun 		if (rc) {
2324*4882a593Smuzhiyun 			DP_ERR(cdev, "Failed to start VPORT\n");
2325*4882a593Smuzhiyun 			return rc;
2326*4882a593Smuzhiyun 		}
2327*4882a593Smuzhiyun 
2328*4882a593Smuzhiyun 		rc = qed_hw_start_fastpath(p_hwfn);
2329*4882a593Smuzhiyun 		if (rc) {
2330*4882a593Smuzhiyun 			DP_ERR(cdev, "Failed to start VPORT fastpath\n");
2331*4882a593Smuzhiyun 			return rc;
2332*4882a593Smuzhiyun 		}
2333*4882a593Smuzhiyun 
2334*4882a593Smuzhiyun 		DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
2335*4882a593Smuzhiyun 			   "Started V-PORT %d with MTU %d\n",
2336*4882a593Smuzhiyun 			   start.vport_id, start.mtu);
2337*4882a593Smuzhiyun 	}
2338*4882a593Smuzhiyun 
2339*4882a593Smuzhiyun 	if (params->clear_stats)
2340*4882a593Smuzhiyun 		qed_reset_vport_stats(cdev);
2341*4882a593Smuzhiyun 
2342*4882a593Smuzhiyun 	return 0;
2343*4882a593Smuzhiyun }
2344*4882a593Smuzhiyun 
qed_stop_vport(struct qed_dev * cdev,u8 vport_id)2345*4882a593Smuzhiyun static int qed_stop_vport(struct qed_dev *cdev, u8 vport_id)
2346*4882a593Smuzhiyun {
2347*4882a593Smuzhiyun 	int rc, i;
2348*4882a593Smuzhiyun 
2349*4882a593Smuzhiyun 	for_each_hwfn(cdev, i) {
2350*4882a593Smuzhiyun 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
2351*4882a593Smuzhiyun 
2352*4882a593Smuzhiyun 		rc = qed_sp_vport_stop(p_hwfn,
2353*4882a593Smuzhiyun 				       p_hwfn->hw_info.opaque_fid, vport_id);
2354*4882a593Smuzhiyun 
2355*4882a593Smuzhiyun 		if (rc) {
2356*4882a593Smuzhiyun 			DP_ERR(cdev, "Failed to stop VPORT\n");
2357*4882a593Smuzhiyun 			return rc;
2358*4882a593Smuzhiyun 		}
2359*4882a593Smuzhiyun 	}
2360*4882a593Smuzhiyun 	return 0;
2361*4882a593Smuzhiyun }
2362*4882a593Smuzhiyun 
qed_update_vport_rss(struct qed_dev * cdev,struct qed_update_vport_rss_params * input,struct qed_rss_params * rss)2363*4882a593Smuzhiyun static int qed_update_vport_rss(struct qed_dev *cdev,
2364*4882a593Smuzhiyun 				struct qed_update_vport_rss_params *input,
2365*4882a593Smuzhiyun 				struct qed_rss_params *rss)
2366*4882a593Smuzhiyun {
2367*4882a593Smuzhiyun 	int i, fn;
2368*4882a593Smuzhiyun 
2369*4882a593Smuzhiyun 	/* Update configuration with what's correct regardless of CMT */
2370*4882a593Smuzhiyun 	rss->update_rss_config = 1;
2371*4882a593Smuzhiyun 	rss->rss_enable = 1;
2372*4882a593Smuzhiyun 	rss->update_rss_capabilities = 1;
2373*4882a593Smuzhiyun 	rss->update_rss_ind_table = 1;
2374*4882a593Smuzhiyun 	rss->update_rss_key = 1;
2375*4882a593Smuzhiyun 	rss->rss_caps = input->rss_caps;
2376*4882a593Smuzhiyun 	memcpy(rss->rss_key, input->rss_key, QED_RSS_KEY_SIZE * sizeof(u32));
2377*4882a593Smuzhiyun 
2378*4882a593Smuzhiyun 	/* In regular scenario, we'd simply need to take input handlers.
2379*4882a593Smuzhiyun 	 * But in CMT, we'd have to split the handlers according to the
2380*4882a593Smuzhiyun 	 * engine they were configured on. We'd then have to understand
2381*4882a593Smuzhiyun 	 * whether RSS is really required, since 2-queues on CMT doesn't
2382*4882a593Smuzhiyun 	 * require RSS.
2383*4882a593Smuzhiyun 	 */
2384*4882a593Smuzhiyun 	if (cdev->num_hwfns == 1) {
2385*4882a593Smuzhiyun 		memcpy(rss->rss_ind_table,
2386*4882a593Smuzhiyun 		       input->rss_ind_table,
2387*4882a593Smuzhiyun 		       QED_RSS_IND_TABLE_SIZE * sizeof(void *));
2388*4882a593Smuzhiyun 		rss->rss_table_size_log = 7;
2389*4882a593Smuzhiyun 		return 0;
2390*4882a593Smuzhiyun 	}
2391*4882a593Smuzhiyun 
2392*4882a593Smuzhiyun 	/* Start by copying the non-spcific information to the 2nd copy */
2393*4882a593Smuzhiyun 	memcpy(&rss[1], &rss[0], sizeof(struct qed_rss_params));
2394*4882a593Smuzhiyun 
2395*4882a593Smuzhiyun 	/* CMT should be round-robin */
2396*4882a593Smuzhiyun 	for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
2397*4882a593Smuzhiyun 		struct qed_queue_cid *cid = input->rss_ind_table[i];
2398*4882a593Smuzhiyun 		struct qed_rss_params *t_rss;
2399*4882a593Smuzhiyun 
2400*4882a593Smuzhiyun 		if (cid->p_owner == QED_LEADING_HWFN(cdev))
2401*4882a593Smuzhiyun 			t_rss = &rss[0];
2402*4882a593Smuzhiyun 		else
2403*4882a593Smuzhiyun 			t_rss = &rss[1];
2404*4882a593Smuzhiyun 
2405*4882a593Smuzhiyun 		t_rss->rss_ind_table[i / cdev->num_hwfns] = cid;
2406*4882a593Smuzhiyun 	}
2407*4882a593Smuzhiyun 
2408*4882a593Smuzhiyun 	/* Make sure RSS is actually required */
2409*4882a593Smuzhiyun 	for_each_hwfn(cdev, fn) {
2410*4882a593Smuzhiyun 		for (i = 1; i < QED_RSS_IND_TABLE_SIZE / cdev->num_hwfns; i++) {
2411*4882a593Smuzhiyun 			if (rss[fn].rss_ind_table[i] !=
2412*4882a593Smuzhiyun 			    rss[fn].rss_ind_table[0])
2413*4882a593Smuzhiyun 				break;
2414*4882a593Smuzhiyun 		}
2415*4882a593Smuzhiyun 		if (i == QED_RSS_IND_TABLE_SIZE / cdev->num_hwfns) {
2416*4882a593Smuzhiyun 			DP_VERBOSE(cdev, NETIF_MSG_IFUP,
2417*4882a593Smuzhiyun 				   "CMT - 1 queue per-hwfn; Disabling RSS\n");
2418*4882a593Smuzhiyun 			return -EINVAL;
2419*4882a593Smuzhiyun 		}
2420*4882a593Smuzhiyun 		rss[fn].rss_table_size_log = 6;
2421*4882a593Smuzhiyun 	}
2422*4882a593Smuzhiyun 
2423*4882a593Smuzhiyun 	return 0;
2424*4882a593Smuzhiyun }
2425*4882a593Smuzhiyun 
qed_update_vport(struct qed_dev * cdev,struct qed_update_vport_params * params)2426*4882a593Smuzhiyun static int qed_update_vport(struct qed_dev *cdev,
2427*4882a593Smuzhiyun 			    struct qed_update_vport_params *params)
2428*4882a593Smuzhiyun {
2429*4882a593Smuzhiyun 	struct qed_sp_vport_update_params sp_params;
2430*4882a593Smuzhiyun 	struct qed_rss_params *rss;
2431*4882a593Smuzhiyun 	int rc = 0, i;
2432*4882a593Smuzhiyun 
2433*4882a593Smuzhiyun 	if (!cdev)
2434*4882a593Smuzhiyun 		return -ENODEV;
2435*4882a593Smuzhiyun 
2436*4882a593Smuzhiyun 	rss = vzalloc(array_size(sizeof(*rss), cdev->num_hwfns));
2437*4882a593Smuzhiyun 	if (!rss)
2438*4882a593Smuzhiyun 		return -ENOMEM;
2439*4882a593Smuzhiyun 
2440*4882a593Smuzhiyun 	memset(&sp_params, 0, sizeof(sp_params));
2441*4882a593Smuzhiyun 
2442*4882a593Smuzhiyun 	/* Translate protocol params into sp params */
2443*4882a593Smuzhiyun 	sp_params.vport_id = params->vport_id;
2444*4882a593Smuzhiyun 	sp_params.update_vport_active_rx_flg = params->update_vport_active_flg;
2445*4882a593Smuzhiyun 	sp_params.update_vport_active_tx_flg = params->update_vport_active_flg;
2446*4882a593Smuzhiyun 	sp_params.vport_active_rx_flg = params->vport_active_flg;
2447*4882a593Smuzhiyun 	sp_params.vport_active_tx_flg = params->vport_active_flg;
2448*4882a593Smuzhiyun 	sp_params.update_tx_switching_flg = params->update_tx_switching_flg;
2449*4882a593Smuzhiyun 	sp_params.tx_switching_flg = params->tx_switching_flg;
2450*4882a593Smuzhiyun 	sp_params.accept_any_vlan = params->accept_any_vlan;
2451*4882a593Smuzhiyun 	sp_params.update_accept_any_vlan_flg =
2452*4882a593Smuzhiyun 		params->update_accept_any_vlan_flg;
2453*4882a593Smuzhiyun 
2454*4882a593Smuzhiyun 	/* Prepare the RSS configuration */
2455*4882a593Smuzhiyun 	if (params->update_rss_flg)
2456*4882a593Smuzhiyun 		if (qed_update_vport_rss(cdev, &params->rss_params, rss))
2457*4882a593Smuzhiyun 			params->update_rss_flg = 0;
2458*4882a593Smuzhiyun 
2459*4882a593Smuzhiyun 	for_each_hwfn(cdev, i) {
2460*4882a593Smuzhiyun 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
2461*4882a593Smuzhiyun 
2462*4882a593Smuzhiyun 		if (params->update_rss_flg)
2463*4882a593Smuzhiyun 			sp_params.rss_params = &rss[i];
2464*4882a593Smuzhiyun 
2465*4882a593Smuzhiyun 		sp_params.opaque_fid = p_hwfn->hw_info.opaque_fid;
2466*4882a593Smuzhiyun 		rc = qed_sp_vport_update(p_hwfn, &sp_params,
2467*4882a593Smuzhiyun 					 QED_SPQ_MODE_EBLOCK,
2468*4882a593Smuzhiyun 					 NULL);
2469*4882a593Smuzhiyun 		if (rc) {
2470*4882a593Smuzhiyun 			DP_ERR(cdev, "Failed to update VPORT\n");
2471*4882a593Smuzhiyun 			goto out;
2472*4882a593Smuzhiyun 		}
2473*4882a593Smuzhiyun 
2474*4882a593Smuzhiyun 		DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
2475*4882a593Smuzhiyun 			   "Updated V-PORT %d: active_flag %d [update %d]\n",
2476*4882a593Smuzhiyun 			   params->vport_id, params->vport_active_flg,
2477*4882a593Smuzhiyun 			   params->update_vport_active_flg);
2478*4882a593Smuzhiyun 	}
2479*4882a593Smuzhiyun 
2480*4882a593Smuzhiyun out:
2481*4882a593Smuzhiyun 	vfree(rss);
2482*4882a593Smuzhiyun 	return rc;
2483*4882a593Smuzhiyun }
2484*4882a593Smuzhiyun 
qed_start_rxq(struct qed_dev * cdev,u8 rss_num,struct qed_queue_start_common_params * p_params,u16 bd_max_bytes,dma_addr_t bd_chain_phys_addr,dma_addr_t cqe_pbl_addr,u16 cqe_pbl_size,struct qed_rxq_start_ret_params * ret_params)2485*4882a593Smuzhiyun static int qed_start_rxq(struct qed_dev *cdev,
2486*4882a593Smuzhiyun 			 u8 rss_num,
2487*4882a593Smuzhiyun 			 struct qed_queue_start_common_params *p_params,
2488*4882a593Smuzhiyun 			 u16 bd_max_bytes,
2489*4882a593Smuzhiyun 			 dma_addr_t bd_chain_phys_addr,
2490*4882a593Smuzhiyun 			 dma_addr_t cqe_pbl_addr,
2491*4882a593Smuzhiyun 			 u16 cqe_pbl_size,
2492*4882a593Smuzhiyun 			 struct qed_rxq_start_ret_params *ret_params)
2493*4882a593Smuzhiyun {
2494*4882a593Smuzhiyun 	struct qed_hwfn *p_hwfn;
2495*4882a593Smuzhiyun 	int rc, hwfn_index;
2496*4882a593Smuzhiyun 
2497*4882a593Smuzhiyun 	hwfn_index = rss_num % cdev->num_hwfns;
2498*4882a593Smuzhiyun 	p_hwfn = &cdev->hwfns[hwfn_index];
2499*4882a593Smuzhiyun 
2500*4882a593Smuzhiyun 	p_params->queue_id = p_params->queue_id / cdev->num_hwfns;
2501*4882a593Smuzhiyun 	p_params->stats_id = p_params->vport_id;
2502*4882a593Smuzhiyun 
2503*4882a593Smuzhiyun 	rc = qed_eth_rx_queue_start(p_hwfn,
2504*4882a593Smuzhiyun 				    p_hwfn->hw_info.opaque_fid,
2505*4882a593Smuzhiyun 				    p_params,
2506*4882a593Smuzhiyun 				    bd_max_bytes,
2507*4882a593Smuzhiyun 				    bd_chain_phys_addr,
2508*4882a593Smuzhiyun 				    cqe_pbl_addr, cqe_pbl_size, ret_params);
2509*4882a593Smuzhiyun 	if (rc) {
2510*4882a593Smuzhiyun 		DP_ERR(cdev, "Failed to start RXQ#%d\n", p_params->queue_id);
2511*4882a593Smuzhiyun 		return rc;
2512*4882a593Smuzhiyun 	}
2513*4882a593Smuzhiyun 
2514*4882a593Smuzhiyun 	DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
2515*4882a593Smuzhiyun 		   "Started RX-Q %d [rss_num %d] on V-PORT %d and SB igu %d\n",
2516*4882a593Smuzhiyun 		   p_params->queue_id, rss_num, p_params->vport_id,
2517*4882a593Smuzhiyun 		   p_params->p_sb->igu_sb_id);
2518*4882a593Smuzhiyun 
2519*4882a593Smuzhiyun 	return 0;
2520*4882a593Smuzhiyun }
2521*4882a593Smuzhiyun 
qed_stop_rxq(struct qed_dev * cdev,u8 rss_id,void * handle)2522*4882a593Smuzhiyun static int qed_stop_rxq(struct qed_dev *cdev, u8 rss_id, void *handle)
2523*4882a593Smuzhiyun {
2524*4882a593Smuzhiyun 	int rc, hwfn_index;
2525*4882a593Smuzhiyun 	struct qed_hwfn *p_hwfn;
2526*4882a593Smuzhiyun 
2527*4882a593Smuzhiyun 	hwfn_index = rss_id % cdev->num_hwfns;
2528*4882a593Smuzhiyun 	p_hwfn = &cdev->hwfns[hwfn_index];
2529*4882a593Smuzhiyun 
2530*4882a593Smuzhiyun 	rc = qed_eth_rx_queue_stop(p_hwfn, handle, false, false);
2531*4882a593Smuzhiyun 	if (rc) {
2532*4882a593Smuzhiyun 		DP_ERR(cdev, "Failed to stop RXQ#%02x\n", rss_id);
2533*4882a593Smuzhiyun 		return rc;
2534*4882a593Smuzhiyun 	}
2535*4882a593Smuzhiyun 
2536*4882a593Smuzhiyun 	return 0;
2537*4882a593Smuzhiyun }
2538*4882a593Smuzhiyun 
qed_start_txq(struct qed_dev * cdev,u8 rss_num,struct qed_queue_start_common_params * p_params,dma_addr_t pbl_addr,u16 pbl_size,struct qed_txq_start_ret_params * ret_params)2539*4882a593Smuzhiyun static int qed_start_txq(struct qed_dev *cdev,
2540*4882a593Smuzhiyun 			 u8 rss_num,
2541*4882a593Smuzhiyun 			 struct qed_queue_start_common_params *p_params,
2542*4882a593Smuzhiyun 			 dma_addr_t pbl_addr,
2543*4882a593Smuzhiyun 			 u16 pbl_size,
2544*4882a593Smuzhiyun 			 struct qed_txq_start_ret_params *ret_params)
2545*4882a593Smuzhiyun {
2546*4882a593Smuzhiyun 	struct qed_hwfn *p_hwfn;
2547*4882a593Smuzhiyun 	int rc, hwfn_index;
2548*4882a593Smuzhiyun 
2549*4882a593Smuzhiyun 	hwfn_index = rss_num % cdev->num_hwfns;
2550*4882a593Smuzhiyun 	p_hwfn = &cdev->hwfns[hwfn_index];
2551*4882a593Smuzhiyun 	p_params->queue_id = p_params->queue_id / cdev->num_hwfns;
2552*4882a593Smuzhiyun 	p_params->stats_id = p_params->vport_id;
2553*4882a593Smuzhiyun 
2554*4882a593Smuzhiyun 	rc = qed_eth_tx_queue_start(p_hwfn,
2555*4882a593Smuzhiyun 				    p_hwfn->hw_info.opaque_fid,
2556*4882a593Smuzhiyun 				    p_params, p_params->tc,
2557*4882a593Smuzhiyun 				    pbl_addr, pbl_size, ret_params);
2558*4882a593Smuzhiyun 
2559*4882a593Smuzhiyun 	if (rc) {
2560*4882a593Smuzhiyun 		DP_ERR(cdev, "Failed to start TXQ#%d\n", p_params->queue_id);
2561*4882a593Smuzhiyun 		return rc;
2562*4882a593Smuzhiyun 	}
2563*4882a593Smuzhiyun 
2564*4882a593Smuzhiyun 	DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
2565*4882a593Smuzhiyun 		   "Started TX-Q %d [rss_num %d] on V-PORT %d and SB igu %d\n",
2566*4882a593Smuzhiyun 		   p_params->queue_id, rss_num, p_params->vport_id,
2567*4882a593Smuzhiyun 		   p_params->p_sb->igu_sb_id);
2568*4882a593Smuzhiyun 
2569*4882a593Smuzhiyun 	return 0;
2570*4882a593Smuzhiyun }
2571*4882a593Smuzhiyun 
2572*4882a593Smuzhiyun #define QED_HW_STOP_RETRY_LIMIT (10)
qed_fastpath_stop(struct qed_dev * cdev)2573*4882a593Smuzhiyun static int qed_fastpath_stop(struct qed_dev *cdev)
2574*4882a593Smuzhiyun {
2575*4882a593Smuzhiyun 	int rc;
2576*4882a593Smuzhiyun 
2577*4882a593Smuzhiyun 	rc = qed_hw_stop_fastpath(cdev);
2578*4882a593Smuzhiyun 	if (rc) {
2579*4882a593Smuzhiyun 		DP_ERR(cdev, "Failed to stop Fastpath\n");
2580*4882a593Smuzhiyun 		return rc;
2581*4882a593Smuzhiyun 	}
2582*4882a593Smuzhiyun 
2583*4882a593Smuzhiyun 	return 0;
2584*4882a593Smuzhiyun }
2585*4882a593Smuzhiyun 
qed_stop_txq(struct qed_dev * cdev,u8 rss_id,void * handle)2586*4882a593Smuzhiyun static int qed_stop_txq(struct qed_dev *cdev, u8 rss_id, void *handle)
2587*4882a593Smuzhiyun {
2588*4882a593Smuzhiyun 	struct qed_hwfn *p_hwfn;
2589*4882a593Smuzhiyun 	int rc, hwfn_index;
2590*4882a593Smuzhiyun 
2591*4882a593Smuzhiyun 	hwfn_index = rss_id % cdev->num_hwfns;
2592*4882a593Smuzhiyun 	p_hwfn = &cdev->hwfns[hwfn_index];
2593*4882a593Smuzhiyun 
2594*4882a593Smuzhiyun 	rc = qed_eth_tx_queue_stop(p_hwfn, handle);
2595*4882a593Smuzhiyun 	if (rc) {
2596*4882a593Smuzhiyun 		DP_ERR(cdev, "Failed to stop TXQ#%02x\n", rss_id);
2597*4882a593Smuzhiyun 		return rc;
2598*4882a593Smuzhiyun 	}
2599*4882a593Smuzhiyun 
2600*4882a593Smuzhiyun 	return 0;
2601*4882a593Smuzhiyun }
2602*4882a593Smuzhiyun 
qed_tunn_configure(struct qed_dev * cdev,struct qed_tunn_params * tunn_params)2603*4882a593Smuzhiyun static int qed_tunn_configure(struct qed_dev *cdev,
2604*4882a593Smuzhiyun 			      struct qed_tunn_params *tunn_params)
2605*4882a593Smuzhiyun {
2606*4882a593Smuzhiyun 	struct qed_tunnel_info tunn_info;
2607*4882a593Smuzhiyun 	int i, rc;
2608*4882a593Smuzhiyun 
2609*4882a593Smuzhiyun 	memset(&tunn_info, 0, sizeof(tunn_info));
2610*4882a593Smuzhiyun 	if (tunn_params->update_vxlan_port) {
2611*4882a593Smuzhiyun 		tunn_info.vxlan_port.b_update_port = true;
2612*4882a593Smuzhiyun 		tunn_info.vxlan_port.port = tunn_params->vxlan_port;
2613*4882a593Smuzhiyun 	}
2614*4882a593Smuzhiyun 
2615*4882a593Smuzhiyun 	if (tunn_params->update_geneve_port) {
2616*4882a593Smuzhiyun 		tunn_info.geneve_port.b_update_port = true;
2617*4882a593Smuzhiyun 		tunn_info.geneve_port.port = tunn_params->geneve_port;
2618*4882a593Smuzhiyun 	}
2619*4882a593Smuzhiyun 
2620*4882a593Smuzhiyun 	for_each_hwfn(cdev, i) {
2621*4882a593Smuzhiyun 		struct qed_hwfn *hwfn = &cdev->hwfns[i];
2622*4882a593Smuzhiyun 		struct qed_ptt *p_ptt;
2623*4882a593Smuzhiyun 		struct qed_tunnel_info *tun;
2624*4882a593Smuzhiyun 
2625*4882a593Smuzhiyun 		tun = &hwfn->cdev->tunnel;
2626*4882a593Smuzhiyun 		if (IS_PF(cdev)) {
2627*4882a593Smuzhiyun 			p_ptt = qed_ptt_acquire(hwfn);
2628*4882a593Smuzhiyun 			if (!p_ptt)
2629*4882a593Smuzhiyun 				return -EAGAIN;
2630*4882a593Smuzhiyun 		} else {
2631*4882a593Smuzhiyun 			p_ptt = NULL;
2632*4882a593Smuzhiyun 		}
2633*4882a593Smuzhiyun 
2634*4882a593Smuzhiyun 		rc = qed_sp_pf_update_tunn_cfg(hwfn, p_ptt, &tunn_info,
2635*4882a593Smuzhiyun 					       QED_SPQ_MODE_EBLOCK, NULL);
2636*4882a593Smuzhiyun 		if (rc) {
2637*4882a593Smuzhiyun 			if (IS_PF(cdev))
2638*4882a593Smuzhiyun 				qed_ptt_release(hwfn, p_ptt);
2639*4882a593Smuzhiyun 			return rc;
2640*4882a593Smuzhiyun 		}
2641*4882a593Smuzhiyun 
2642*4882a593Smuzhiyun 		if (IS_PF_SRIOV(hwfn)) {
2643*4882a593Smuzhiyun 			u16 vxlan_port, geneve_port;
2644*4882a593Smuzhiyun 			int j;
2645*4882a593Smuzhiyun 
2646*4882a593Smuzhiyun 			vxlan_port = tun->vxlan_port.port;
2647*4882a593Smuzhiyun 			geneve_port = tun->geneve_port.port;
2648*4882a593Smuzhiyun 
2649*4882a593Smuzhiyun 			qed_for_each_vf(hwfn, j) {
2650*4882a593Smuzhiyun 				qed_iov_bulletin_set_udp_ports(hwfn, j,
2651*4882a593Smuzhiyun 							       vxlan_port,
2652*4882a593Smuzhiyun 							       geneve_port);
2653*4882a593Smuzhiyun 			}
2654*4882a593Smuzhiyun 
2655*4882a593Smuzhiyun 			qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
2656*4882a593Smuzhiyun 		}
2657*4882a593Smuzhiyun 		if (IS_PF(cdev))
2658*4882a593Smuzhiyun 			qed_ptt_release(hwfn, p_ptt);
2659*4882a593Smuzhiyun 	}
2660*4882a593Smuzhiyun 
2661*4882a593Smuzhiyun 	return 0;
2662*4882a593Smuzhiyun }
2663*4882a593Smuzhiyun 
qed_configure_filter_rx_mode(struct qed_dev * cdev,enum qed_filter_rx_mode_type type)2664*4882a593Smuzhiyun static int qed_configure_filter_rx_mode(struct qed_dev *cdev,
2665*4882a593Smuzhiyun 					enum qed_filter_rx_mode_type type)
2666*4882a593Smuzhiyun {
2667*4882a593Smuzhiyun 	struct qed_filter_accept_flags accept_flags;
2668*4882a593Smuzhiyun 
2669*4882a593Smuzhiyun 	memset(&accept_flags, 0, sizeof(accept_flags));
2670*4882a593Smuzhiyun 
2671*4882a593Smuzhiyun 	accept_flags.update_rx_mode_config = 1;
2672*4882a593Smuzhiyun 	accept_flags.update_tx_mode_config = 1;
2673*4882a593Smuzhiyun 	accept_flags.rx_accept_filter = QED_ACCEPT_UCAST_MATCHED |
2674*4882a593Smuzhiyun 					QED_ACCEPT_MCAST_MATCHED |
2675*4882a593Smuzhiyun 					QED_ACCEPT_BCAST;
2676*4882a593Smuzhiyun 	accept_flags.tx_accept_filter = QED_ACCEPT_UCAST_MATCHED |
2677*4882a593Smuzhiyun 					QED_ACCEPT_MCAST_MATCHED |
2678*4882a593Smuzhiyun 					QED_ACCEPT_BCAST;
2679*4882a593Smuzhiyun 
2680*4882a593Smuzhiyun 	if (type == QED_FILTER_RX_MODE_TYPE_PROMISC) {
2681*4882a593Smuzhiyun 		accept_flags.rx_accept_filter |= QED_ACCEPT_UCAST_UNMATCHED |
2682*4882a593Smuzhiyun 						 QED_ACCEPT_MCAST_UNMATCHED;
2683*4882a593Smuzhiyun 		accept_flags.tx_accept_filter |= QED_ACCEPT_UCAST_UNMATCHED |
2684*4882a593Smuzhiyun 						 QED_ACCEPT_MCAST_UNMATCHED;
2685*4882a593Smuzhiyun 	} else if (type == QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC) {
2686*4882a593Smuzhiyun 		accept_flags.rx_accept_filter |= QED_ACCEPT_MCAST_UNMATCHED;
2687*4882a593Smuzhiyun 		accept_flags.tx_accept_filter |= QED_ACCEPT_MCAST_UNMATCHED;
2688*4882a593Smuzhiyun 	}
2689*4882a593Smuzhiyun 
2690*4882a593Smuzhiyun 	return qed_filter_accept_cmd(cdev, 0, accept_flags, false, false,
2691*4882a593Smuzhiyun 				     QED_SPQ_MODE_CB, NULL);
2692*4882a593Smuzhiyun }
2693*4882a593Smuzhiyun 
qed_configure_filter_ucast(struct qed_dev * cdev,struct qed_filter_ucast_params * params)2694*4882a593Smuzhiyun static int qed_configure_filter_ucast(struct qed_dev *cdev,
2695*4882a593Smuzhiyun 				      struct qed_filter_ucast_params *params)
2696*4882a593Smuzhiyun {
2697*4882a593Smuzhiyun 	struct qed_filter_ucast ucast;
2698*4882a593Smuzhiyun 
2699*4882a593Smuzhiyun 	if (!params->vlan_valid && !params->mac_valid) {
2700*4882a593Smuzhiyun 		DP_NOTICE(cdev,
2701*4882a593Smuzhiyun 			  "Tried configuring a unicast filter, but both MAC and VLAN are not set\n");
2702*4882a593Smuzhiyun 		return -EINVAL;
2703*4882a593Smuzhiyun 	}
2704*4882a593Smuzhiyun 
2705*4882a593Smuzhiyun 	memset(&ucast, 0, sizeof(ucast));
2706*4882a593Smuzhiyun 	switch (params->type) {
2707*4882a593Smuzhiyun 	case QED_FILTER_XCAST_TYPE_ADD:
2708*4882a593Smuzhiyun 		ucast.opcode = QED_FILTER_ADD;
2709*4882a593Smuzhiyun 		break;
2710*4882a593Smuzhiyun 	case QED_FILTER_XCAST_TYPE_DEL:
2711*4882a593Smuzhiyun 		ucast.opcode = QED_FILTER_REMOVE;
2712*4882a593Smuzhiyun 		break;
2713*4882a593Smuzhiyun 	case QED_FILTER_XCAST_TYPE_REPLACE:
2714*4882a593Smuzhiyun 		ucast.opcode = QED_FILTER_REPLACE;
2715*4882a593Smuzhiyun 		break;
2716*4882a593Smuzhiyun 	default:
2717*4882a593Smuzhiyun 		DP_NOTICE(cdev, "Unknown unicast filter type %d\n",
2718*4882a593Smuzhiyun 			  params->type);
2719*4882a593Smuzhiyun 	}
2720*4882a593Smuzhiyun 
2721*4882a593Smuzhiyun 	if (params->vlan_valid && params->mac_valid) {
2722*4882a593Smuzhiyun 		ucast.type = QED_FILTER_MAC_VLAN;
2723*4882a593Smuzhiyun 		ether_addr_copy(ucast.mac, params->mac);
2724*4882a593Smuzhiyun 		ucast.vlan = params->vlan;
2725*4882a593Smuzhiyun 	} else if (params->mac_valid) {
2726*4882a593Smuzhiyun 		ucast.type = QED_FILTER_MAC;
2727*4882a593Smuzhiyun 		ether_addr_copy(ucast.mac, params->mac);
2728*4882a593Smuzhiyun 	} else {
2729*4882a593Smuzhiyun 		ucast.type = QED_FILTER_VLAN;
2730*4882a593Smuzhiyun 		ucast.vlan = params->vlan;
2731*4882a593Smuzhiyun 	}
2732*4882a593Smuzhiyun 
2733*4882a593Smuzhiyun 	ucast.is_rx_filter = true;
2734*4882a593Smuzhiyun 	ucast.is_tx_filter = true;
2735*4882a593Smuzhiyun 
2736*4882a593Smuzhiyun 	return qed_filter_ucast_cmd(cdev, &ucast, QED_SPQ_MODE_CB, NULL);
2737*4882a593Smuzhiyun }
2738*4882a593Smuzhiyun 
qed_configure_filter_mcast(struct qed_dev * cdev,struct qed_filter_mcast_params * params)2739*4882a593Smuzhiyun static int qed_configure_filter_mcast(struct qed_dev *cdev,
2740*4882a593Smuzhiyun 				      struct qed_filter_mcast_params *params)
2741*4882a593Smuzhiyun {
2742*4882a593Smuzhiyun 	struct qed_filter_mcast mcast;
2743*4882a593Smuzhiyun 	int i;
2744*4882a593Smuzhiyun 
2745*4882a593Smuzhiyun 	memset(&mcast, 0, sizeof(mcast));
2746*4882a593Smuzhiyun 	switch (params->type) {
2747*4882a593Smuzhiyun 	case QED_FILTER_XCAST_TYPE_ADD:
2748*4882a593Smuzhiyun 		mcast.opcode = QED_FILTER_ADD;
2749*4882a593Smuzhiyun 		break;
2750*4882a593Smuzhiyun 	case QED_FILTER_XCAST_TYPE_DEL:
2751*4882a593Smuzhiyun 		mcast.opcode = QED_FILTER_REMOVE;
2752*4882a593Smuzhiyun 		break;
2753*4882a593Smuzhiyun 	default:
2754*4882a593Smuzhiyun 		DP_NOTICE(cdev, "Unknown multicast filter type %d\n",
2755*4882a593Smuzhiyun 			  params->type);
2756*4882a593Smuzhiyun 	}
2757*4882a593Smuzhiyun 
2758*4882a593Smuzhiyun 	mcast.num_mc_addrs = params->num;
2759*4882a593Smuzhiyun 	for (i = 0; i < mcast.num_mc_addrs; i++)
2760*4882a593Smuzhiyun 		ether_addr_copy(mcast.mac[i], params->mac[i]);
2761*4882a593Smuzhiyun 
2762*4882a593Smuzhiyun 	return qed_filter_mcast_cmd(cdev, &mcast, QED_SPQ_MODE_CB, NULL);
2763*4882a593Smuzhiyun }
2764*4882a593Smuzhiyun 
qed_configure_filter(struct qed_dev * cdev,struct qed_filter_params * params)2765*4882a593Smuzhiyun static int qed_configure_filter(struct qed_dev *cdev,
2766*4882a593Smuzhiyun 				struct qed_filter_params *params)
2767*4882a593Smuzhiyun {
2768*4882a593Smuzhiyun 	enum qed_filter_rx_mode_type accept_flags;
2769*4882a593Smuzhiyun 
2770*4882a593Smuzhiyun 	switch (params->type) {
2771*4882a593Smuzhiyun 	case QED_FILTER_TYPE_UCAST:
2772*4882a593Smuzhiyun 		return qed_configure_filter_ucast(cdev, &params->filter.ucast);
2773*4882a593Smuzhiyun 	case QED_FILTER_TYPE_MCAST:
2774*4882a593Smuzhiyun 		return qed_configure_filter_mcast(cdev, &params->filter.mcast);
2775*4882a593Smuzhiyun 	case QED_FILTER_TYPE_RX_MODE:
2776*4882a593Smuzhiyun 		accept_flags = params->filter.accept_flags;
2777*4882a593Smuzhiyun 		return qed_configure_filter_rx_mode(cdev, accept_flags);
2778*4882a593Smuzhiyun 	default:
2779*4882a593Smuzhiyun 		DP_NOTICE(cdev, "Unknown filter type %d\n", (int)params->type);
2780*4882a593Smuzhiyun 		return -EINVAL;
2781*4882a593Smuzhiyun 	}
2782*4882a593Smuzhiyun }
2783*4882a593Smuzhiyun 
qed_configure_arfs_searcher(struct qed_dev * cdev,enum qed_filter_config_mode mode)2784*4882a593Smuzhiyun static int qed_configure_arfs_searcher(struct qed_dev *cdev,
2785*4882a593Smuzhiyun 				       enum qed_filter_config_mode mode)
2786*4882a593Smuzhiyun {
2787*4882a593Smuzhiyun 	struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
2788*4882a593Smuzhiyun 	struct qed_arfs_config_params arfs_config_params;
2789*4882a593Smuzhiyun 
2790*4882a593Smuzhiyun 	memset(&arfs_config_params, 0, sizeof(arfs_config_params));
2791*4882a593Smuzhiyun 	arfs_config_params.tcp = true;
2792*4882a593Smuzhiyun 	arfs_config_params.udp = true;
2793*4882a593Smuzhiyun 	arfs_config_params.ipv4 = true;
2794*4882a593Smuzhiyun 	arfs_config_params.ipv6 = true;
2795*4882a593Smuzhiyun 	arfs_config_params.mode = mode;
2796*4882a593Smuzhiyun 	qed_arfs_mode_configure(p_hwfn, p_hwfn->p_arfs_ptt,
2797*4882a593Smuzhiyun 				&arfs_config_params);
2798*4882a593Smuzhiyun 	return 0;
2799*4882a593Smuzhiyun }
2800*4882a593Smuzhiyun 
2801*4882a593Smuzhiyun static void
qed_arfs_sp_response_handler(struct qed_hwfn * p_hwfn,void * cookie,union event_ring_data * data,u8 fw_return_code)2802*4882a593Smuzhiyun qed_arfs_sp_response_handler(struct qed_hwfn *p_hwfn,
2803*4882a593Smuzhiyun 			     void *cookie,
2804*4882a593Smuzhiyun 			     union event_ring_data *data, u8 fw_return_code)
2805*4882a593Smuzhiyun {
2806*4882a593Smuzhiyun 	struct qed_common_cb_ops *op = p_hwfn->cdev->protocol_ops.common;
2807*4882a593Smuzhiyun 	void *dev = p_hwfn->cdev->ops_cookie;
2808*4882a593Smuzhiyun 
2809*4882a593Smuzhiyun 	op->arfs_filter_op(dev, cookie, fw_return_code);
2810*4882a593Smuzhiyun }
2811*4882a593Smuzhiyun 
2812*4882a593Smuzhiyun static int
qed_ntuple_arfs_filter_config(struct qed_dev * cdev,void * cookie,struct qed_ntuple_filter_params * params)2813*4882a593Smuzhiyun qed_ntuple_arfs_filter_config(struct qed_dev *cdev,
2814*4882a593Smuzhiyun 			      void *cookie,
2815*4882a593Smuzhiyun 			      struct qed_ntuple_filter_params *params)
2816*4882a593Smuzhiyun {
2817*4882a593Smuzhiyun 	struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
2818*4882a593Smuzhiyun 	struct qed_spq_comp_cb cb;
2819*4882a593Smuzhiyun 	int rc = -EINVAL;
2820*4882a593Smuzhiyun 
2821*4882a593Smuzhiyun 	cb.function = qed_arfs_sp_response_handler;
2822*4882a593Smuzhiyun 	cb.cookie = cookie;
2823*4882a593Smuzhiyun 
2824*4882a593Smuzhiyun 	if (params->b_is_vf) {
2825*4882a593Smuzhiyun 		if (!qed_iov_is_valid_vfid(p_hwfn, params->vf_id, false,
2826*4882a593Smuzhiyun 					   false)) {
2827*4882a593Smuzhiyun 			DP_INFO(p_hwfn, "vfid 0x%02x is out of bounds\n",
2828*4882a593Smuzhiyun 				params->vf_id);
2829*4882a593Smuzhiyun 			return rc;
2830*4882a593Smuzhiyun 		}
2831*4882a593Smuzhiyun 
2832*4882a593Smuzhiyun 		params->vport_id = params->vf_id + 1;
2833*4882a593Smuzhiyun 		params->qid = QED_RFS_NTUPLE_QID_RSS;
2834*4882a593Smuzhiyun 	}
2835*4882a593Smuzhiyun 
2836*4882a593Smuzhiyun 	rc = qed_configure_rfs_ntuple_filter(p_hwfn, &cb, params);
2837*4882a593Smuzhiyun 	if (rc)
2838*4882a593Smuzhiyun 		DP_NOTICE(p_hwfn,
2839*4882a593Smuzhiyun 			  "Failed to issue a-RFS filter configuration\n");
2840*4882a593Smuzhiyun 	else
2841*4882a593Smuzhiyun 		DP_VERBOSE(p_hwfn, NETIF_MSG_DRV,
2842*4882a593Smuzhiyun 			   "Successfully issued a-RFS filter configuration\n");
2843*4882a593Smuzhiyun 
2844*4882a593Smuzhiyun 	return rc;
2845*4882a593Smuzhiyun }
2846*4882a593Smuzhiyun 
qed_get_coalesce(struct qed_dev * cdev,u16 * coal,void * handle)2847*4882a593Smuzhiyun static int qed_get_coalesce(struct qed_dev *cdev, u16 *coal, void *handle)
2848*4882a593Smuzhiyun {
2849*4882a593Smuzhiyun 	struct qed_queue_cid *p_cid = handle;
2850*4882a593Smuzhiyun 	struct qed_hwfn *p_hwfn;
2851*4882a593Smuzhiyun 	int rc;
2852*4882a593Smuzhiyun 
2853*4882a593Smuzhiyun 	p_hwfn = p_cid->p_owner;
2854*4882a593Smuzhiyun 	rc = qed_get_queue_coalesce(p_hwfn, coal, handle);
2855*4882a593Smuzhiyun 	if (rc)
2856*4882a593Smuzhiyun 		DP_VERBOSE(cdev, QED_MSG_DEBUG,
2857*4882a593Smuzhiyun 			   "Unable to read queue coalescing\n");
2858*4882a593Smuzhiyun 
2859*4882a593Smuzhiyun 	return rc;
2860*4882a593Smuzhiyun }
2861*4882a593Smuzhiyun 
qed_fp_cqe_completion(struct qed_dev * dev,u8 rss_id,struct eth_slow_path_rx_cqe * cqe)2862*4882a593Smuzhiyun static int qed_fp_cqe_completion(struct qed_dev *dev,
2863*4882a593Smuzhiyun 				 u8 rss_id, struct eth_slow_path_rx_cqe *cqe)
2864*4882a593Smuzhiyun {
2865*4882a593Smuzhiyun 	return qed_eth_cqe_completion(&dev->hwfns[rss_id % dev->num_hwfns],
2866*4882a593Smuzhiyun 				      cqe);
2867*4882a593Smuzhiyun }
2868*4882a593Smuzhiyun 
qed_req_bulletin_update_mac(struct qed_dev * cdev,u8 * mac)2869*4882a593Smuzhiyun static int qed_req_bulletin_update_mac(struct qed_dev *cdev, u8 *mac)
2870*4882a593Smuzhiyun {
2871*4882a593Smuzhiyun 	int i, ret;
2872*4882a593Smuzhiyun 
2873*4882a593Smuzhiyun 	if (IS_PF(cdev))
2874*4882a593Smuzhiyun 		return 0;
2875*4882a593Smuzhiyun 
2876*4882a593Smuzhiyun 	for_each_hwfn(cdev, i) {
2877*4882a593Smuzhiyun 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
2878*4882a593Smuzhiyun 
2879*4882a593Smuzhiyun 		ret = qed_vf_pf_bulletin_update_mac(p_hwfn, mac);
2880*4882a593Smuzhiyun 		if (ret)
2881*4882a593Smuzhiyun 			return ret;
2882*4882a593Smuzhiyun 	}
2883*4882a593Smuzhiyun 
2884*4882a593Smuzhiyun 	return 0;
2885*4882a593Smuzhiyun }
2886*4882a593Smuzhiyun 
2887*4882a593Smuzhiyun static const struct qed_eth_ops qed_eth_ops_pass = {
2888*4882a593Smuzhiyun 	.common = &qed_common_ops_pass,
2889*4882a593Smuzhiyun #ifdef CONFIG_QED_SRIOV
2890*4882a593Smuzhiyun 	.iov = &qed_iov_ops_pass,
2891*4882a593Smuzhiyun #endif
2892*4882a593Smuzhiyun #ifdef CONFIG_DCB
2893*4882a593Smuzhiyun 	.dcb = &qed_dcbnl_ops_pass,
2894*4882a593Smuzhiyun #endif
2895*4882a593Smuzhiyun 	.ptp = &qed_ptp_ops_pass,
2896*4882a593Smuzhiyun 	.fill_dev_info = &qed_fill_eth_dev_info,
2897*4882a593Smuzhiyun 	.register_ops = &qed_register_eth_ops,
2898*4882a593Smuzhiyun 	.check_mac = &qed_check_mac,
2899*4882a593Smuzhiyun 	.vport_start = &qed_start_vport,
2900*4882a593Smuzhiyun 	.vport_stop = &qed_stop_vport,
2901*4882a593Smuzhiyun 	.vport_update = &qed_update_vport,
2902*4882a593Smuzhiyun 	.q_rx_start = &qed_start_rxq,
2903*4882a593Smuzhiyun 	.q_rx_stop = &qed_stop_rxq,
2904*4882a593Smuzhiyun 	.q_tx_start = &qed_start_txq,
2905*4882a593Smuzhiyun 	.q_tx_stop = &qed_stop_txq,
2906*4882a593Smuzhiyun 	.filter_config = &qed_configure_filter,
2907*4882a593Smuzhiyun 	.fastpath_stop = &qed_fastpath_stop,
2908*4882a593Smuzhiyun 	.eth_cqe_completion = &qed_fp_cqe_completion,
2909*4882a593Smuzhiyun 	.get_vport_stats = &qed_get_vport_stats,
2910*4882a593Smuzhiyun 	.tunn_config = &qed_tunn_configure,
2911*4882a593Smuzhiyun 	.ntuple_filter_config = &qed_ntuple_arfs_filter_config,
2912*4882a593Smuzhiyun 	.configure_arfs_searcher = &qed_configure_arfs_searcher,
2913*4882a593Smuzhiyun 	.get_coalesce = &qed_get_coalesce,
2914*4882a593Smuzhiyun 	.req_bulletin_update_mac = &qed_req_bulletin_update_mac,
2915*4882a593Smuzhiyun };
2916*4882a593Smuzhiyun 
qed_get_eth_ops(void)2917*4882a593Smuzhiyun const struct qed_eth_ops *qed_get_eth_ops(void)
2918*4882a593Smuzhiyun {
2919*4882a593Smuzhiyun 	return &qed_eth_ops_pass;
2920*4882a593Smuzhiyun }
2921*4882a593Smuzhiyun EXPORT_SYMBOL(qed_get_eth_ops);
2922*4882a593Smuzhiyun 
qed_put_eth_ops(void)2923*4882a593Smuzhiyun void qed_put_eth_ops(void)
2924*4882a593Smuzhiyun {
2925*4882a593Smuzhiyun 	/* TODO - reference count for module? */
2926*4882a593Smuzhiyun }
2927*4882a593Smuzhiyun EXPORT_SYMBOL(qed_put_eth_ops);
2928