1*4882a593Smuzhiyun // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun /* Copyright (C) 2017 Netronome Systems, Inc. */
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #include <linux/kernel.h>
5*4882a593Smuzhiyun #include <linux/bitops.h>
6*4882a593Smuzhiyun #include <linux/hwmon.h>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include "nfpcore/nfp_cpp.h"
9*4882a593Smuzhiyun #include "nfpcore/nfp_nsp.h"
10*4882a593Smuzhiyun #include "nfp_main.h"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #define NFP_TEMP_MAX (95 * 1000)
13*4882a593Smuzhiyun #define NFP_TEMP_CRIT (105 * 1000)
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define NFP_POWER_MAX (25 * 1000 * 1000)
16*4882a593Smuzhiyun
nfp_hwmon_sensor_id(enum hwmon_sensor_types type,int channel)17*4882a593Smuzhiyun static int nfp_hwmon_sensor_id(enum hwmon_sensor_types type, int channel)
18*4882a593Smuzhiyun {
19*4882a593Smuzhiyun if (type == hwmon_temp)
20*4882a593Smuzhiyun return NFP_SENSOR_CHIP_TEMPERATURE;
21*4882a593Smuzhiyun if (type == hwmon_power)
22*4882a593Smuzhiyun return NFP_SENSOR_ASSEMBLY_POWER + channel;
23*4882a593Smuzhiyun return -EINVAL;
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun static int
nfp_hwmon_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)27*4882a593Smuzhiyun nfp_hwmon_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
28*4882a593Smuzhiyun int channel, long *val)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun static const struct {
31*4882a593Smuzhiyun enum hwmon_sensor_types type;
32*4882a593Smuzhiyun u32 attr;
33*4882a593Smuzhiyun long val;
34*4882a593Smuzhiyun } const_vals[] = {
35*4882a593Smuzhiyun { hwmon_temp, hwmon_temp_max, NFP_TEMP_MAX },
36*4882a593Smuzhiyun { hwmon_temp, hwmon_temp_crit, NFP_TEMP_CRIT },
37*4882a593Smuzhiyun { hwmon_power, hwmon_power_max, NFP_POWER_MAX },
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun struct nfp_pf *pf = dev_get_drvdata(dev);
40*4882a593Smuzhiyun enum nfp_nsp_sensor_id id;
41*4882a593Smuzhiyun int err, i;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(const_vals); i++)
44*4882a593Smuzhiyun if (const_vals[i].type == type && const_vals[i].attr == attr) {
45*4882a593Smuzhiyun *val = const_vals[i].val;
46*4882a593Smuzhiyun return 0;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun err = nfp_hwmon_sensor_id(type, channel);
50*4882a593Smuzhiyun if (err < 0)
51*4882a593Smuzhiyun return err;
52*4882a593Smuzhiyun id = err;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun if (!(pf->nspi->sensor_mask & BIT(id)))
55*4882a593Smuzhiyun return -EOPNOTSUPP;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun if (type == hwmon_temp && attr == hwmon_temp_input)
58*4882a593Smuzhiyun return nfp_hwmon_read_sensor(pf->cpp, id, val);
59*4882a593Smuzhiyun if (type == hwmon_power && attr == hwmon_power_input)
60*4882a593Smuzhiyun return nfp_hwmon_read_sensor(pf->cpp, id, val);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun return -EINVAL;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static umode_t
nfp_hwmon_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)66*4882a593Smuzhiyun nfp_hwmon_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
67*4882a593Smuzhiyun int channel)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun if (type == hwmon_temp) {
70*4882a593Smuzhiyun switch (attr) {
71*4882a593Smuzhiyun case hwmon_temp_input:
72*4882a593Smuzhiyun case hwmon_temp_crit:
73*4882a593Smuzhiyun case hwmon_temp_max:
74*4882a593Smuzhiyun return 0444;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun } else if (type == hwmon_power) {
77*4882a593Smuzhiyun switch (attr) {
78*4882a593Smuzhiyun case hwmon_power_input:
79*4882a593Smuzhiyun case hwmon_power_max:
80*4882a593Smuzhiyun return 0444;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun return 0;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun static u32 nfp_chip_config[] = {
87*4882a593Smuzhiyun HWMON_C_REGISTER_TZ,
88*4882a593Smuzhiyun 0
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun static const struct hwmon_channel_info nfp_chip = {
92*4882a593Smuzhiyun .type = hwmon_chip,
93*4882a593Smuzhiyun .config = nfp_chip_config,
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun static u32 nfp_temp_config[] = {
97*4882a593Smuzhiyun HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT,
98*4882a593Smuzhiyun 0
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun static const struct hwmon_channel_info nfp_temp = {
102*4882a593Smuzhiyun .type = hwmon_temp,
103*4882a593Smuzhiyun .config = nfp_temp_config,
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun static u32 nfp_power_config[] = {
107*4882a593Smuzhiyun HWMON_P_INPUT | HWMON_P_MAX,
108*4882a593Smuzhiyun HWMON_P_INPUT,
109*4882a593Smuzhiyun HWMON_P_INPUT,
110*4882a593Smuzhiyun 0
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun static const struct hwmon_channel_info nfp_power = {
114*4882a593Smuzhiyun .type = hwmon_power,
115*4882a593Smuzhiyun .config = nfp_power_config,
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun static const struct hwmon_channel_info *nfp_hwmon_info[] = {
119*4882a593Smuzhiyun &nfp_chip,
120*4882a593Smuzhiyun &nfp_temp,
121*4882a593Smuzhiyun &nfp_power,
122*4882a593Smuzhiyun NULL
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun static const struct hwmon_ops nfp_hwmon_ops = {
126*4882a593Smuzhiyun .is_visible = nfp_hwmon_is_visible,
127*4882a593Smuzhiyun .read = nfp_hwmon_read,
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun static const struct hwmon_chip_info nfp_chip_info = {
131*4882a593Smuzhiyun .ops = &nfp_hwmon_ops,
132*4882a593Smuzhiyun .info = nfp_hwmon_info,
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun
nfp_hwmon_register(struct nfp_pf * pf)135*4882a593Smuzhiyun int nfp_hwmon_register(struct nfp_pf *pf)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun if (!IS_REACHABLE(CONFIG_HWMON))
138*4882a593Smuzhiyun return 0;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun if (!pf->nspi) {
141*4882a593Smuzhiyun nfp_warn(pf->cpp, "not registering HWMON (no NSP info)\n");
142*4882a593Smuzhiyun return 0;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun if (!pf->nspi->sensor_mask) {
145*4882a593Smuzhiyun nfp_info(pf->cpp,
146*4882a593Smuzhiyun "not registering HWMON (NSP doesn't report sensors)\n");
147*4882a593Smuzhiyun return 0;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun pf->hwmon_dev = hwmon_device_register_with_info(&pf->pdev->dev, "nfp",
151*4882a593Smuzhiyun pf, &nfp_chip_info,
152*4882a593Smuzhiyun NULL);
153*4882a593Smuzhiyun return PTR_ERR_OR_ZERO(pf->hwmon_dev);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
nfp_hwmon_unregister(struct nfp_pf * pf)156*4882a593Smuzhiyun void nfp_hwmon_unregister(struct nfp_pf *pf)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun if (!IS_REACHABLE(CONFIG_HWMON) || !pf->hwmon_dev)
159*4882a593Smuzhiyun return;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun hwmon_device_unregister(pf->hwmon_dev);
162*4882a593Smuzhiyun }
163