1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun * This software may be used and distributed according to the terms of
3*4882a593Smuzhiyun * the GNU General Public License (GPL), incorporated herein by reference.
4*4882a593Smuzhiyun * Drivers based on or derived from this code fall under the GPL and must
5*4882a593Smuzhiyun * retain the authorship, copyright and license notice. This file is not
6*4882a593Smuzhiyun * a complete program and may only be used when the entire operating
7*4882a593Smuzhiyun * system is licensed under the GPL.
8*4882a593Smuzhiyun * See the file COPYING in this distribution for more information.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * vxge-main.c: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
11*4882a593Smuzhiyun * Virtualized Server Adapter.
12*4882a593Smuzhiyun * Copyright(c) 2002-2010 Exar Corp.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * The module loadable parameters that are supported by the driver and a brief
15*4882a593Smuzhiyun * explanation of all the variables:
16*4882a593Smuzhiyun * vlan_tag_strip:
17*4882a593Smuzhiyun * Strip VLAN Tag enable/disable. Instructs the device to remove
18*4882a593Smuzhiyun * the VLAN tag from all received tagged frames that are not
19*4882a593Smuzhiyun * replicated at the internal L2 switch.
20*4882a593Smuzhiyun * 0 - Do not strip the VLAN tag.
21*4882a593Smuzhiyun * 1 - Strip the VLAN tag.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * addr_learn_en:
24*4882a593Smuzhiyun * Enable learning the mac address of the guest OS interface in
25*4882a593Smuzhiyun * a virtualization environment.
26*4882a593Smuzhiyun * 0 - DISABLE
27*4882a593Smuzhiyun * 1 - ENABLE
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun * max_config_port:
30*4882a593Smuzhiyun * Maximum number of port to be supported.
31*4882a593Smuzhiyun * MIN -1 and MAX - 2
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun * max_config_vpath:
34*4882a593Smuzhiyun * This configures the maximum no of VPATH configures for each
35*4882a593Smuzhiyun * device function.
36*4882a593Smuzhiyun * MIN - 1 and MAX - 17
37*4882a593Smuzhiyun *
38*4882a593Smuzhiyun * max_config_dev:
39*4882a593Smuzhiyun * This configures maximum no of Device function to be enabled.
40*4882a593Smuzhiyun * MIN - 1 and MAX - 17
41*4882a593Smuzhiyun *
42*4882a593Smuzhiyun ******************************************************************************/
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #include <linux/bitops.h>
47*4882a593Smuzhiyun #include <linux/if_vlan.h>
48*4882a593Smuzhiyun #include <linux/interrupt.h>
49*4882a593Smuzhiyun #include <linux/pci.h>
50*4882a593Smuzhiyun #include <linux/slab.h>
51*4882a593Smuzhiyun #include <linux/tcp.h>
52*4882a593Smuzhiyun #include <net/ip.h>
53*4882a593Smuzhiyun #include <linux/netdevice.h>
54*4882a593Smuzhiyun #include <linux/etherdevice.h>
55*4882a593Smuzhiyun #include <linux/firmware.h>
56*4882a593Smuzhiyun #include <linux/net_tstamp.h>
57*4882a593Smuzhiyun #include <linux/prefetch.h>
58*4882a593Smuzhiyun #include <linux/module.h>
59*4882a593Smuzhiyun #include "vxge-main.h"
60*4882a593Smuzhiyun #include "vxge-reg.h"
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
63*4882a593Smuzhiyun MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
64*4882a593Smuzhiyun "Virtualized Server Adapter");
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun static const struct pci_device_id vxge_id_table[] = {
67*4882a593Smuzhiyun {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
68*4882a593Smuzhiyun PCI_ANY_ID},
69*4882a593Smuzhiyun {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
70*4882a593Smuzhiyun PCI_ANY_ID},
71*4882a593Smuzhiyun {0}
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, vxge_id_table);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
77*4882a593Smuzhiyun VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
78*4882a593Smuzhiyun VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
79*4882a593Smuzhiyun VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
80*4882a593Smuzhiyun VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
81*4882a593Smuzhiyun VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
84*4882a593Smuzhiyun {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
85*4882a593Smuzhiyun static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
86*4882a593Smuzhiyun {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
87*4882a593Smuzhiyun module_param_array(bw_percentage, uint, NULL, 0);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun static struct vxge_drv_config *driver_config;
90*4882a593Smuzhiyun static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
91*4882a593Smuzhiyun
is_vxge_card_up(struct vxgedev * vdev)92*4882a593Smuzhiyun static inline int is_vxge_card_up(struct vxgedev *vdev)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
VXGE_COMPLETE_VPATH_TX(struct vxge_fifo * fifo)97*4882a593Smuzhiyun static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun struct sk_buff **skb_ptr = NULL;
100*4882a593Smuzhiyun struct sk_buff **temp;
101*4882a593Smuzhiyun #define NR_SKB_COMPLETED 16
102*4882a593Smuzhiyun struct sk_buff *completed[NR_SKB_COMPLETED];
103*4882a593Smuzhiyun int more;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun do {
106*4882a593Smuzhiyun more = 0;
107*4882a593Smuzhiyun skb_ptr = completed;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun if (__netif_tx_trylock(fifo->txq)) {
110*4882a593Smuzhiyun vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
111*4882a593Smuzhiyun NR_SKB_COMPLETED, &more);
112*4882a593Smuzhiyun __netif_tx_unlock(fifo->txq);
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun /* free SKBs */
116*4882a593Smuzhiyun for (temp = completed; temp != skb_ptr; temp++)
117*4882a593Smuzhiyun dev_consume_skb_irq(*temp);
118*4882a593Smuzhiyun } while (more);
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
VXGE_COMPLETE_ALL_TX(struct vxgedev * vdev)121*4882a593Smuzhiyun static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun int i;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun /* Complete all transmits */
126*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++)
127*4882a593Smuzhiyun VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
VXGE_COMPLETE_ALL_RX(struct vxgedev * vdev)130*4882a593Smuzhiyun static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun int i;
133*4882a593Smuzhiyun struct vxge_ring *ring;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /* Complete all receives*/
136*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
137*4882a593Smuzhiyun ring = &vdev->vpaths[i].ring;
138*4882a593Smuzhiyun vxge_hw_vpath_poll_rx(ring->handle);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun /*
143*4882a593Smuzhiyun * vxge_callback_link_up
144*4882a593Smuzhiyun *
145*4882a593Smuzhiyun * This function is called during interrupt context to notify link up state
146*4882a593Smuzhiyun * change.
147*4882a593Smuzhiyun */
vxge_callback_link_up(struct __vxge_hw_device * hldev)148*4882a593Smuzhiyun static void vxge_callback_link_up(struct __vxge_hw_device *hldev)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun struct net_device *dev = hldev->ndev;
151*4882a593Smuzhiyun struct vxgedev *vdev = netdev_priv(dev);
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
154*4882a593Smuzhiyun vdev->ndev->name, __func__, __LINE__);
155*4882a593Smuzhiyun netdev_notice(vdev->ndev, "Link Up\n");
156*4882a593Smuzhiyun vdev->stats.link_up++;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun netif_carrier_on(vdev->ndev);
159*4882a593Smuzhiyun netif_tx_wake_all_queues(vdev->ndev);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
162*4882a593Smuzhiyun "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /*
166*4882a593Smuzhiyun * vxge_callback_link_down
167*4882a593Smuzhiyun *
168*4882a593Smuzhiyun * This function is called during interrupt context to notify link down state
169*4882a593Smuzhiyun * change.
170*4882a593Smuzhiyun */
vxge_callback_link_down(struct __vxge_hw_device * hldev)171*4882a593Smuzhiyun static void vxge_callback_link_down(struct __vxge_hw_device *hldev)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun struct net_device *dev = hldev->ndev;
174*4882a593Smuzhiyun struct vxgedev *vdev = netdev_priv(dev);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
177*4882a593Smuzhiyun "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
178*4882a593Smuzhiyun netdev_notice(vdev->ndev, "Link Down\n");
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun vdev->stats.link_down++;
181*4882a593Smuzhiyun netif_carrier_off(vdev->ndev);
182*4882a593Smuzhiyun netif_tx_stop_all_queues(vdev->ndev);
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
185*4882a593Smuzhiyun "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun /*
189*4882a593Smuzhiyun * vxge_rx_alloc
190*4882a593Smuzhiyun *
191*4882a593Smuzhiyun * Allocate SKB.
192*4882a593Smuzhiyun */
193*4882a593Smuzhiyun static struct sk_buff *
vxge_rx_alloc(void * dtrh,struct vxge_ring * ring,const int skb_size)194*4882a593Smuzhiyun vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun struct net_device *dev;
197*4882a593Smuzhiyun struct sk_buff *skb;
198*4882a593Smuzhiyun struct vxge_rx_priv *rx_priv;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun dev = ring->ndev;
201*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
202*4882a593Smuzhiyun ring->ndev->name, __func__, __LINE__);
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /* try to allocate skb first. this one may fail */
207*4882a593Smuzhiyun skb = netdev_alloc_skb(dev, skb_size +
208*4882a593Smuzhiyun VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
209*4882a593Smuzhiyun if (skb == NULL) {
210*4882a593Smuzhiyun vxge_debug_mem(VXGE_ERR,
211*4882a593Smuzhiyun "%s: out of memory to allocate SKB", dev->name);
212*4882a593Smuzhiyun ring->stats.skb_alloc_fail++;
213*4882a593Smuzhiyun return NULL;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun vxge_debug_mem(VXGE_TRACE,
217*4882a593Smuzhiyun "%s: %s:%d Skb : 0x%p", ring->ndev->name,
218*4882a593Smuzhiyun __func__, __LINE__, skb);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun rx_priv->skb = skb;
223*4882a593Smuzhiyun rx_priv->skb_data = NULL;
224*4882a593Smuzhiyun rx_priv->data_size = skb_size;
225*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
226*4882a593Smuzhiyun "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun return skb;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun /*
232*4882a593Smuzhiyun * vxge_rx_map
233*4882a593Smuzhiyun */
vxge_rx_map(void * dtrh,struct vxge_ring * ring)234*4882a593Smuzhiyun static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun struct vxge_rx_priv *rx_priv;
237*4882a593Smuzhiyun dma_addr_t dma_addr;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
240*4882a593Smuzhiyun ring->ndev->name, __func__, __LINE__);
241*4882a593Smuzhiyun rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun rx_priv->skb_data = rx_priv->skb->data;
244*4882a593Smuzhiyun dma_addr = dma_map_single(&ring->pdev->dev, rx_priv->skb_data,
245*4882a593Smuzhiyun rx_priv->data_size, DMA_FROM_DEVICE);
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun if (unlikely(dma_mapping_error(&ring->pdev->dev, dma_addr))) {
248*4882a593Smuzhiyun ring->stats.pci_map_fail++;
249*4882a593Smuzhiyun return -EIO;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun vxge_debug_mem(VXGE_TRACE,
252*4882a593Smuzhiyun "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
253*4882a593Smuzhiyun ring->ndev->name, __func__, __LINE__,
254*4882a593Smuzhiyun (unsigned long long)dma_addr);
255*4882a593Smuzhiyun vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun rx_priv->data_dma = dma_addr;
258*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
259*4882a593Smuzhiyun "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun return 0;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /*
265*4882a593Smuzhiyun * vxge_rx_initial_replenish
266*4882a593Smuzhiyun * Allocation of RxD as an initial replenish procedure.
267*4882a593Smuzhiyun */
268*4882a593Smuzhiyun static enum vxge_hw_status
vxge_rx_initial_replenish(void * dtrh,void * userdata)269*4882a593Smuzhiyun vxge_rx_initial_replenish(void *dtrh, void *userdata)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun struct vxge_ring *ring = (struct vxge_ring *)userdata;
272*4882a593Smuzhiyun struct vxge_rx_priv *rx_priv;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
275*4882a593Smuzhiyun ring->ndev->name, __func__, __LINE__);
276*4882a593Smuzhiyun if (vxge_rx_alloc(dtrh, ring,
277*4882a593Smuzhiyun VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
278*4882a593Smuzhiyun return VXGE_HW_FAIL;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun if (vxge_rx_map(dtrh, ring)) {
281*4882a593Smuzhiyun rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
282*4882a593Smuzhiyun dev_kfree_skb(rx_priv->skb);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun return VXGE_HW_FAIL;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
287*4882a593Smuzhiyun "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun return VXGE_HW_OK;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun static inline void
vxge_rx_complete(struct vxge_ring * ring,struct sk_buff * skb,u16 vlan,int pkt_length,struct vxge_hw_ring_rxd_info * ext_info)293*4882a593Smuzhiyun vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
294*4882a593Smuzhiyun int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
298*4882a593Smuzhiyun ring->ndev->name, __func__, __LINE__);
299*4882a593Smuzhiyun skb_record_rx_queue(skb, ring->driver_id);
300*4882a593Smuzhiyun skb->protocol = eth_type_trans(skb, ring->ndev);
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun u64_stats_update_begin(&ring->stats.syncp);
303*4882a593Smuzhiyun ring->stats.rx_frms++;
304*4882a593Smuzhiyun ring->stats.rx_bytes += pkt_length;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun if (skb->pkt_type == PACKET_MULTICAST)
307*4882a593Smuzhiyun ring->stats.rx_mcast++;
308*4882a593Smuzhiyun u64_stats_update_end(&ring->stats.syncp);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun vxge_debug_rx(VXGE_TRACE,
311*4882a593Smuzhiyun "%s: %s:%d skb protocol = %d",
312*4882a593Smuzhiyun ring->ndev->name, __func__, __LINE__, skb->protocol);
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun if (ext_info->vlan &&
315*4882a593Smuzhiyun ring->vlan_tag_strip == VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE)
316*4882a593Smuzhiyun __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ext_info->vlan);
317*4882a593Smuzhiyun napi_gro_receive(ring->napi_p, skb);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
320*4882a593Smuzhiyun "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun
vxge_re_pre_post(void * dtr,struct vxge_ring * ring,struct vxge_rx_priv * rx_priv)323*4882a593Smuzhiyun static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
324*4882a593Smuzhiyun struct vxge_rx_priv *rx_priv)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun dma_sync_single_for_device(&ring->pdev->dev, rx_priv->data_dma,
327*4882a593Smuzhiyun rx_priv->data_size, DMA_FROM_DEVICE);
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
330*4882a593Smuzhiyun vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun
vxge_post(int * dtr_cnt,void ** first_dtr,void * post_dtr,struct __vxge_hw_ring * ringh)333*4882a593Smuzhiyun static inline void vxge_post(int *dtr_cnt, void **first_dtr,
334*4882a593Smuzhiyun void *post_dtr, struct __vxge_hw_ring *ringh)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun int dtr_count = *dtr_cnt;
337*4882a593Smuzhiyun if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
338*4882a593Smuzhiyun if (*first_dtr)
339*4882a593Smuzhiyun vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
340*4882a593Smuzhiyun *first_dtr = post_dtr;
341*4882a593Smuzhiyun } else
342*4882a593Smuzhiyun vxge_hw_ring_rxd_post_post(ringh, post_dtr);
343*4882a593Smuzhiyun dtr_count++;
344*4882a593Smuzhiyun *dtr_cnt = dtr_count;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun /*
348*4882a593Smuzhiyun * vxge_rx_1b_compl
349*4882a593Smuzhiyun *
350*4882a593Smuzhiyun * If the interrupt is because of a received frame or if the receive ring
351*4882a593Smuzhiyun * contains fresh as yet un-processed frames, this function is called.
352*4882a593Smuzhiyun */
353*4882a593Smuzhiyun static enum vxge_hw_status
vxge_rx_1b_compl(struct __vxge_hw_ring * ringh,void * dtr,u8 t_code,void * userdata)354*4882a593Smuzhiyun vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
355*4882a593Smuzhiyun u8 t_code, void *userdata)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun struct vxge_ring *ring = (struct vxge_ring *)userdata;
358*4882a593Smuzhiyun struct net_device *dev = ring->ndev;
359*4882a593Smuzhiyun unsigned int dma_sizes;
360*4882a593Smuzhiyun void *first_dtr = NULL;
361*4882a593Smuzhiyun int dtr_cnt = 0;
362*4882a593Smuzhiyun int data_size;
363*4882a593Smuzhiyun dma_addr_t data_dma;
364*4882a593Smuzhiyun int pkt_length;
365*4882a593Smuzhiyun struct sk_buff *skb;
366*4882a593Smuzhiyun struct vxge_rx_priv *rx_priv;
367*4882a593Smuzhiyun struct vxge_hw_ring_rxd_info ext_info;
368*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
369*4882a593Smuzhiyun ring->ndev->name, __func__, __LINE__);
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun if (ring->budget <= 0)
372*4882a593Smuzhiyun goto out;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun do {
375*4882a593Smuzhiyun prefetch((char *)dtr + L1_CACHE_BYTES);
376*4882a593Smuzhiyun rx_priv = vxge_hw_ring_rxd_private_get(dtr);
377*4882a593Smuzhiyun skb = rx_priv->skb;
378*4882a593Smuzhiyun data_size = rx_priv->data_size;
379*4882a593Smuzhiyun data_dma = rx_priv->data_dma;
380*4882a593Smuzhiyun prefetch(rx_priv->skb_data);
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun vxge_debug_rx(VXGE_TRACE,
383*4882a593Smuzhiyun "%s: %s:%d skb = 0x%p",
384*4882a593Smuzhiyun ring->ndev->name, __func__, __LINE__, skb);
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
387*4882a593Smuzhiyun pkt_length = dma_sizes;
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun pkt_length -= ETH_FCS_LEN;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun vxge_debug_rx(VXGE_TRACE,
392*4882a593Smuzhiyun "%s: %s:%d Packet Length = %d",
393*4882a593Smuzhiyun ring->ndev->name, __func__, __LINE__, pkt_length);
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun /* check skb validity */
398*4882a593Smuzhiyun vxge_assert(skb);
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun prefetch((char *)skb + L1_CACHE_BYTES);
401*4882a593Smuzhiyun if (unlikely(t_code)) {
402*4882a593Smuzhiyun if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
403*4882a593Smuzhiyun VXGE_HW_OK) {
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun ring->stats.rx_errors++;
406*4882a593Smuzhiyun vxge_debug_rx(VXGE_TRACE,
407*4882a593Smuzhiyun "%s: %s :%d Rx T_code is %d",
408*4882a593Smuzhiyun ring->ndev->name, __func__,
409*4882a593Smuzhiyun __LINE__, t_code);
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun /* If the t_code is not supported and if the
412*4882a593Smuzhiyun * t_code is other than 0x5 (unparseable packet
413*4882a593Smuzhiyun * such as unknown UPV6 header), Drop it !!!
414*4882a593Smuzhiyun */
415*4882a593Smuzhiyun vxge_re_pre_post(dtr, ring, rx_priv);
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
418*4882a593Smuzhiyun ring->stats.rx_dropped++;
419*4882a593Smuzhiyun continue;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
424*4882a593Smuzhiyun if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
425*4882a593Smuzhiyun if (!vxge_rx_map(dtr, ring)) {
426*4882a593Smuzhiyun skb_put(skb, pkt_length);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun dma_unmap_single(&ring->pdev->dev,
429*4882a593Smuzhiyun data_dma, data_size,
430*4882a593Smuzhiyun DMA_FROM_DEVICE);
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun vxge_hw_ring_rxd_pre_post(ringh, dtr);
433*4882a593Smuzhiyun vxge_post(&dtr_cnt, &first_dtr, dtr,
434*4882a593Smuzhiyun ringh);
435*4882a593Smuzhiyun } else {
436*4882a593Smuzhiyun dev_kfree_skb(rx_priv->skb);
437*4882a593Smuzhiyun rx_priv->skb = skb;
438*4882a593Smuzhiyun rx_priv->data_size = data_size;
439*4882a593Smuzhiyun vxge_re_pre_post(dtr, ring, rx_priv);
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun vxge_post(&dtr_cnt, &first_dtr, dtr,
442*4882a593Smuzhiyun ringh);
443*4882a593Smuzhiyun ring->stats.rx_dropped++;
444*4882a593Smuzhiyun break;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun } else {
447*4882a593Smuzhiyun vxge_re_pre_post(dtr, ring, rx_priv);
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
450*4882a593Smuzhiyun ring->stats.rx_dropped++;
451*4882a593Smuzhiyun break;
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun } else {
454*4882a593Smuzhiyun struct sk_buff *skb_up;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun skb_up = netdev_alloc_skb(dev, pkt_length +
457*4882a593Smuzhiyun VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
458*4882a593Smuzhiyun if (skb_up != NULL) {
459*4882a593Smuzhiyun skb_reserve(skb_up,
460*4882a593Smuzhiyun VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun dma_sync_single_for_cpu(&ring->pdev->dev,
463*4882a593Smuzhiyun data_dma, data_size,
464*4882a593Smuzhiyun DMA_FROM_DEVICE);
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun vxge_debug_mem(VXGE_TRACE,
467*4882a593Smuzhiyun "%s: %s:%d skb_up = %p",
468*4882a593Smuzhiyun ring->ndev->name, __func__,
469*4882a593Smuzhiyun __LINE__, skb);
470*4882a593Smuzhiyun memcpy(skb_up->data, skb->data, pkt_length);
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun vxge_re_pre_post(dtr, ring, rx_priv);
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun vxge_post(&dtr_cnt, &first_dtr, dtr,
475*4882a593Smuzhiyun ringh);
476*4882a593Smuzhiyun /* will netif_rx small SKB instead */
477*4882a593Smuzhiyun skb = skb_up;
478*4882a593Smuzhiyun skb_put(skb, pkt_length);
479*4882a593Smuzhiyun } else {
480*4882a593Smuzhiyun vxge_re_pre_post(dtr, ring, rx_priv);
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
483*4882a593Smuzhiyun vxge_debug_rx(VXGE_ERR,
484*4882a593Smuzhiyun "%s: vxge_rx_1b_compl: out of "
485*4882a593Smuzhiyun "memory", dev->name);
486*4882a593Smuzhiyun ring->stats.skb_alloc_fail++;
487*4882a593Smuzhiyun break;
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
492*4882a593Smuzhiyun !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
493*4882a593Smuzhiyun (dev->features & NETIF_F_RXCSUM) && /* Offload Rx side CSUM */
494*4882a593Smuzhiyun ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
495*4882a593Smuzhiyun ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
496*4882a593Smuzhiyun skb->ip_summed = CHECKSUM_UNNECESSARY;
497*4882a593Smuzhiyun else
498*4882a593Smuzhiyun skb_checksum_none_assert(skb);
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun if (ring->rx_hwts) {
502*4882a593Smuzhiyun struct skb_shared_hwtstamps *skb_hwts;
503*4882a593Smuzhiyun u32 ns = *(u32 *)(skb->head + pkt_length);
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun skb_hwts = skb_hwtstamps(skb);
506*4882a593Smuzhiyun skb_hwts->hwtstamp = ns_to_ktime(ns);
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun /* rth_hash_type and rth_it_hit are non-zero regardless of
510*4882a593Smuzhiyun * whether rss is enabled. Only the rth_value is zero/non-zero
511*4882a593Smuzhiyun * if rss is disabled/enabled, so key off of that.
512*4882a593Smuzhiyun */
513*4882a593Smuzhiyun if (ext_info.rth_value)
514*4882a593Smuzhiyun skb_set_hash(skb, ext_info.rth_value,
515*4882a593Smuzhiyun PKT_HASH_TYPE_L3);
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun vxge_rx_complete(ring, skb, ext_info.vlan,
518*4882a593Smuzhiyun pkt_length, &ext_info);
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun ring->budget--;
521*4882a593Smuzhiyun ring->pkts_processed++;
522*4882a593Smuzhiyun if (!ring->budget)
523*4882a593Smuzhiyun break;
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
526*4882a593Smuzhiyun &t_code) == VXGE_HW_OK);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun if (first_dtr)
529*4882a593Smuzhiyun vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun out:
532*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
533*4882a593Smuzhiyun "%s:%d Exiting...",
534*4882a593Smuzhiyun __func__, __LINE__);
535*4882a593Smuzhiyun return VXGE_HW_OK;
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun /*
539*4882a593Smuzhiyun * vxge_xmit_compl
540*4882a593Smuzhiyun *
541*4882a593Smuzhiyun * If an interrupt was raised to indicate DMA complete of the Tx packet,
542*4882a593Smuzhiyun * this function is called. It identifies the last TxD whose buffer was
543*4882a593Smuzhiyun * freed and frees all skbs whose data have already DMA'ed into the NICs
544*4882a593Smuzhiyun * internal memory.
545*4882a593Smuzhiyun */
546*4882a593Smuzhiyun static enum vxge_hw_status
vxge_xmit_compl(struct __vxge_hw_fifo * fifo_hw,void * dtr,enum vxge_hw_fifo_tcode t_code,void * userdata,struct sk_buff *** skb_ptr,int nr_skb,int * more)547*4882a593Smuzhiyun vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
548*4882a593Smuzhiyun enum vxge_hw_fifo_tcode t_code, void *userdata,
549*4882a593Smuzhiyun struct sk_buff ***skb_ptr, int nr_skb, int *more)
550*4882a593Smuzhiyun {
551*4882a593Smuzhiyun struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
552*4882a593Smuzhiyun struct sk_buff *skb, **done_skb = *skb_ptr;
553*4882a593Smuzhiyun int pkt_cnt = 0;
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
556*4882a593Smuzhiyun "%s:%d Entered....", __func__, __LINE__);
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun do {
559*4882a593Smuzhiyun int frg_cnt;
560*4882a593Smuzhiyun skb_frag_t *frag;
561*4882a593Smuzhiyun int i = 0, j;
562*4882a593Smuzhiyun struct vxge_tx_priv *txd_priv =
563*4882a593Smuzhiyun vxge_hw_fifo_txdl_private_get(dtr);
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun skb = txd_priv->skb;
566*4882a593Smuzhiyun frg_cnt = skb_shinfo(skb)->nr_frags;
567*4882a593Smuzhiyun frag = &skb_shinfo(skb)->frags[0];
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun vxge_debug_tx(VXGE_TRACE,
570*4882a593Smuzhiyun "%s: %s:%d fifo_hw = %p dtr = %p "
571*4882a593Smuzhiyun "tcode = 0x%x", fifo->ndev->name, __func__,
572*4882a593Smuzhiyun __LINE__, fifo_hw, dtr, t_code);
573*4882a593Smuzhiyun /* check skb validity */
574*4882a593Smuzhiyun vxge_assert(skb);
575*4882a593Smuzhiyun vxge_debug_tx(VXGE_TRACE,
576*4882a593Smuzhiyun "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
577*4882a593Smuzhiyun fifo->ndev->name, __func__, __LINE__,
578*4882a593Smuzhiyun skb, txd_priv, frg_cnt);
579*4882a593Smuzhiyun if (unlikely(t_code)) {
580*4882a593Smuzhiyun fifo->stats.tx_errors++;
581*4882a593Smuzhiyun vxge_debug_tx(VXGE_ERR,
582*4882a593Smuzhiyun "%s: tx: dtr %p completed due to "
583*4882a593Smuzhiyun "error t_code %01x", fifo->ndev->name,
584*4882a593Smuzhiyun dtr, t_code);
585*4882a593Smuzhiyun vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun /* for unfragmented skb */
589*4882a593Smuzhiyun dma_unmap_single(&fifo->pdev->dev, txd_priv->dma_buffers[i++],
590*4882a593Smuzhiyun skb_headlen(skb), DMA_TO_DEVICE);
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun for (j = 0; j < frg_cnt; j++) {
593*4882a593Smuzhiyun dma_unmap_page(&fifo->pdev->dev,
594*4882a593Smuzhiyun txd_priv->dma_buffers[i++],
595*4882a593Smuzhiyun skb_frag_size(frag), DMA_TO_DEVICE);
596*4882a593Smuzhiyun frag += 1;
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun vxge_hw_fifo_txdl_free(fifo_hw, dtr);
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun /* Updating the statistics block */
602*4882a593Smuzhiyun u64_stats_update_begin(&fifo->stats.syncp);
603*4882a593Smuzhiyun fifo->stats.tx_frms++;
604*4882a593Smuzhiyun fifo->stats.tx_bytes += skb->len;
605*4882a593Smuzhiyun u64_stats_update_end(&fifo->stats.syncp);
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun *done_skb++ = skb;
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun if (--nr_skb <= 0) {
610*4882a593Smuzhiyun *more = 1;
611*4882a593Smuzhiyun break;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun pkt_cnt++;
615*4882a593Smuzhiyun if (pkt_cnt > fifo->indicate_max_pkts)
616*4882a593Smuzhiyun break;
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
619*4882a593Smuzhiyun &dtr, &t_code) == VXGE_HW_OK);
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun *skb_ptr = done_skb;
622*4882a593Smuzhiyun if (netif_tx_queue_stopped(fifo->txq))
623*4882a593Smuzhiyun netif_tx_wake_queue(fifo->txq);
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
626*4882a593Smuzhiyun "%s: %s:%d Exiting...",
627*4882a593Smuzhiyun fifo->ndev->name, __func__, __LINE__);
628*4882a593Smuzhiyun return VXGE_HW_OK;
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun /* select a vpath to transmit the packet */
vxge_get_vpath_no(struct vxgedev * vdev,struct sk_buff * skb)632*4882a593Smuzhiyun static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
633*4882a593Smuzhiyun {
634*4882a593Smuzhiyun u16 queue_len, counter = 0;
635*4882a593Smuzhiyun if (skb->protocol == htons(ETH_P_IP)) {
636*4882a593Smuzhiyun struct iphdr *ip;
637*4882a593Smuzhiyun struct tcphdr *th;
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun ip = ip_hdr(skb);
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun if (!ip_is_fragment(ip)) {
642*4882a593Smuzhiyun th = (struct tcphdr *)(((unsigned char *)ip) +
643*4882a593Smuzhiyun ip->ihl*4);
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun queue_len = vdev->no_of_vpath;
646*4882a593Smuzhiyun counter = (ntohs(th->source) +
647*4882a593Smuzhiyun ntohs(th->dest)) &
648*4882a593Smuzhiyun vdev->vpath_selector[queue_len - 1];
649*4882a593Smuzhiyun if (counter >= queue_len)
650*4882a593Smuzhiyun counter = queue_len - 1;
651*4882a593Smuzhiyun }
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun return counter;
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun
vxge_search_mac_addr_in_list(struct vxge_vpath * vpath,u64 del_mac)656*4882a593Smuzhiyun static enum vxge_hw_status vxge_search_mac_addr_in_list(
657*4882a593Smuzhiyun struct vxge_vpath *vpath, u64 del_mac)
658*4882a593Smuzhiyun {
659*4882a593Smuzhiyun struct list_head *entry, *next;
660*4882a593Smuzhiyun list_for_each_safe(entry, next, &vpath->mac_addr_list) {
661*4882a593Smuzhiyun if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
662*4882a593Smuzhiyun return TRUE;
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun return FALSE;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun
vxge_mac_list_add(struct vxge_vpath * vpath,struct macInfo * mac)667*4882a593Smuzhiyun static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
668*4882a593Smuzhiyun {
669*4882a593Smuzhiyun struct vxge_mac_addrs *new_mac_entry;
670*4882a593Smuzhiyun u8 *mac_address = NULL;
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
673*4882a593Smuzhiyun return TRUE;
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
676*4882a593Smuzhiyun if (!new_mac_entry) {
677*4882a593Smuzhiyun vxge_debug_mem(VXGE_ERR,
678*4882a593Smuzhiyun "%s: memory allocation failed",
679*4882a593Smuzhiyun VXGE_DRIVER_NAME);
680*4882a593Smuzhiyun return FALSE;
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun list_add(&new_mac_entry->item, &vpath->mac_addr_list);
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun /* Copy the new mac address to the list */
686*4882a593Smuzhiyun mac_address = (u8 *)&new_mac_entry->macaddr;
687*4882a593Smuzhiyun memcpy(mac_address, mac->macaddr, ETH_ALEN);
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun new_mac_entry->state = mac->state;
690*4882a593Smuzhiyun vpath->mac_addr_cnt++;
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun if (is_multicast_ether_addr(mac->macaddr))
693*4882a593Smuzhiyun vpath->mcast_addr_cnt++;
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun return TRUE;
696*4882a593Smuzhiyun }
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun /* Add a mac address to DA table */
699*4882a593Smuzhiyun static enum vxge_hw_status
vxge_add_mac_addr(struct vxgedev * vdev,struct macInfo * mac)700*4882a593Smuzhiyun vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
701*4882a593Smuzhiyun {
702*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
703*4882a593Smuzhiyun struct vxge_vpath *vpath;
704*4882a593Smuzhiyun enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun if (is_multicast_ether_addr(mac->macaddr))
707*4882a593Smuzhiyun duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
708*4882a593Smuzhiyun else
709*4882a593Smuzhiyun duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun vpath = &vdev->vpaths[mac->vpath_no];
712*4882a593Smuzhiyun status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
713*4882a593Smuzhiyun mac->macmask, duplicate_mode);
714*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
715*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
716*4882a593Smuzhiyun "DA config add entry failed for vpath:%d",
717*4882a593Smuzhiyun vpath->device_id);
718*4882a593Smuzhiyun } else
719*4882a593Smuzhiyun if (FALSE == vxge_mac_list_add(vpath, mac))
720*4882a593Smuzhiyun status = -EPERM;
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun return status;
723*4882a593Smuzhiyun }
724*4882a593Smuzhiyun
vxge_learn_mac(struct vxgedev * vdev,u8 * mac_header)725*4882a593Smuzhiyun static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
726*4882a593Smuzhiyun {
727*4882a593Smuzhiyun struct macInfo mac_info;
728*4882a593Smuzhiyun u8 *mac_address = NULL;
729*4882a593Smuzhiyun u64 mac_addr = 0, vpath_vector = 0;
730*4882a593Smuzhiyun int vpath_idx = 0;
731*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
732*4882a593Smuzhiyun struct vxge_vpath *vpath = NULL;
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun mac_address = (u8 *)&mac_addr;
735*4882a593Smuzhiyun memcpy(mac_address, mac_header, ETH_ALEN);
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun /* Is this mac address already in the list? */
738*4882a593Smuzhiyun for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
739*4882a593Smuzhiyun vpath = &vdev->vpaths[vpath_idx];
740*4882a593Smuzhiyun if (vxge_search_mac_addr_in_list(vpath, mac_addr))
741*4882a593Smuzhiyun return vpath_idx;
742*4882a593Smuzhiyun }
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun memset(&mac_info, 0, sizeof(struct macInfo));
745*4882a593Smuzhiyun memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun /* Any vpath has room to add mac address to its da table? */
748*4882a593Smuzhiyun for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
749*4882a593Smuzhiyun vpath = &vdev->vpaths[vpath_idx];
750*4882a593Smuzhiyun if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
751*4882a593Smuzhiyun /* Add this mac address to this vpath */
752*4882a593Smuzhiyun mac_info.vpath_no = vpath_idx;
753*4882a593Smuzhiyun mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
754*4882a593Smuzhiyun status = vxge_add_mac_addr(vdev, &mac_info);
755*4882a593Smuzhiyun if (status != VXGE_HW_OK)
756*4882a593Smuzhiyun return -EPERM;
757*4882a593Smuzhiyun return vpath_idx;
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun }
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
762*4882a593Smuzhiyun vpath_idx = 0;
763*4882a593Smuzhiyun mac_info.vpath_no = vpath_idx;
764*4882a593Smuzhiyun /* Is the first vpath already selected as catch-basin ? */
765*4882a593Smuzhiyun vpath = &vdev->vpaths[vpath_idx];
766*4882a593Smuzhiyun if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
767*4882a593Smuzhiyun /* Add this mac address to this vpath */
768*4882a593Smuzhiyun if (FALSE == vxge_mac_list_add(vpath, &mac_info))
769*4882a593Smuzhiyun return -EPERM;
770*4882a593Smuzhiyun return vpath_idx;
771*4882a593Smuzhiyun }
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun /* Select first vpath as catch-basin */
774*4882a593Smuzhiyun vpath_vector = vxge_mBIT(vpath->device_id);
775*4882a593Smuzhiyun status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
776*4882a593Smuzhiyun vxge_hw_mgmt_reg_type_mrpcim,
777*4882a593Smuzhiyun 0,
778*4882a593Smuzhiyun (ulong)offsetof(
779*4882a593Smuzhiyun struct vxge_hw_mrpcim_reg,
780*4882a593Smuzhiyun rts_mgr_cbasin_cfg),
781*4882a593Smuzhiyun vpath_vector);
782*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
783*4882a593Smuzhiyun vxge_debug_tx(VXGE_ERR,
784*4882a593Smuzhiyun "%s: Unable to set the vpath-%d in catch-basin mode",
785*4882a593Smuzhiyun VXGE_DRIVER_NAME, vpath->device_id);
786*4882a593Smuzhiyun return -EPERM;
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun if (FALSE == vxge_mac_list_add(vpath, &mac_info))
790*4882a593Smuzhiyun return -EPERM;
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun return vpath_idx;
793*4882a593Smuzhiyun }
794*4882a593Smuzhiyun
795*4882a593Smuzhiyun /**
796*4882a593Smuzhiyun * vxge_xmit
797*4882a593Smuzhiyun * @skb : the socket buffer containing the Tx data.
798*4882a593Smuzhiyun * @dev : device pointer.
799*4882a593Smuzhiyun *
800*4882a593Smuzhiyun * This function is the Tx entry point of the driver. Neterion NIC supports
801*4882a593Smuzhiyun * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
802*4882a593Smuzhiyun */
803*4882a593Smuzhiyun static netdev_tx_t
vxge_xmit(struct sk_buff * skb,struct net_device * dev)804*4882a593Smuzhiyun vxge_xmit(struct sk_buff *skb, struct net_device *dev)
805*4882a593Smuzhiyun {
806*4882a593Smuzhiyun struct vxge_fifo *fifo = NULL;
807*4882a593Smuzhiyun void *dtr_priv;
808*4882a593Smuzhiyun void *dtr = NULL;
809*4882a593Smuzhiyun struct vxgedev *vdev = NULL;
810*4882a593Smuzhiyun enum vxge_hw_status status;
811*4882a593Smuzhiyun int frg_cnt, first_frg_len;
812*4882a593Smuzhiyun skb_frag_t *frag;
813*4882a593Smuzhiyun int i = 0, j = 0, avail;
814*4882a593Smuzhiyun u64 dma_pointer;
815*4882a593Smuzhiyun struct vxge_tx_priv *txdl_priv = NULL;
816*4882a593Smuzhiyun struct __vxge_hw_fifo *fifo_hw;
817*4882a593Smuzhiyun int offload_type;
818*4882a593Smuzhiyun int vpath_no = 0;
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
821*4882a593Smuzhiyun dev->name, __func__, __LINE__);
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun /* A buffer with no data will be dropped */
824*4882a593Smuzhiyun if (unlikely(skb->len <= 0)) {
825*4882a593Smuzhiyun vxge_debug_tx(VXGE_ERR,
826*4882a593Smuzhiyun "%s: Buffer has no data..", dev->name);
827*4882a593Smuzhiyun dev_kfree_skb_any(skb);
828*4882a593Smuzhiyun return NETDEV_TX_OK;
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun vdev = netdev_priv(dev);
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun if (unlikely(!is_vxge_card_up(vdev))) {
834*4882a593Smuzhiyun vxge_debug_tx(VXGE_ERR,
835*4882a593Smuzhiyun "%s: vdev not initialized", dev->name);
836*4882a593Smuzhiyun dev_kfree_skb_any(skb);
837*4882a593Smuzhiyun return NETDEV_TX_OK;
838*4882a593Smuzhiyun }
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun if (vdev->config.addr_learn_en) {
841*4882a593Smuzhiyun vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
842*4882a593Smuzhiyun if (vpath_no == -EPERM) {
843*4882a593Smuzhiyun vxge_debug_tx(VXGE_ERR,
844*4882a593Smuzhiyun "%s: Failed to store the mac address",
845*4882a593Smuzhiyun dev->name);
846*4882a593Smuzhiyun dev_kfree_skb_any(skb);
847*4882a593Smuzhiyun return NETDEV_TX_OK;
848*4882a593Smuzhiyun }
849*4882a593Smuzhiyun }
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
852*4882a593Smuzhiyun vpath_no = skb_get_queue_mapping(skb);
853*4882a593Smuzhiyun else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
854*4882a593Smuzhiyun vpath_no = vxge_get_vpath_no(vdev, skb);
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun if (vpath_no >= vdev->no_of_vpath)
859*4882a593Smuzhiyun vpath_no = 0;
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun fifo = &vdev->vpaths[vpath_no].fifo;
862*4882a593Smuzhiyun fifo_hw = fifo->handle;
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun if (netif_tx_queue_stopped(fifo->txq))
865*4882a593Smuzhiyun return NETDEV_TX_BUSY;
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
868*4882a593Smuzhiyun if (avail == 0) {
869*4882a593Smuzhiyun vxge_debug_tx(VXGE_ERR,
870*4882a593Smuzhiyun "%s: No free TXDs available", dev->name);
871*4882a593Smuzhiyun fifo->stats.txd_not_free++;
872*4882a593Smuzhiyun goto _exit0;
873*4882a593Smuzhiyun }
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun /* Last TXD? Stop tx queue to avoid dropping packets. TX
876*4882a593Smuzhiyun * completion will resume the queue.
877*4882a593Smuzhiyun */
878*4882a593Smuzhiyun if (avail == 1)
879*4882a593Smuzhiyun netif_tx_stop_queue(fifo->txq);
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
882*4882a593Smuzhiyun if (unlikely(status != VXGE_HW_OK)) {
883*4882a593Smuzhiyun vxge_debug_tx(VXGE_ERR,
884*4882a593Smuzhiyun "%s: Out of descriptors .", dev->name);
885*4882a593Smuzhiyun fifo->stats.txd_out_of_desc++;
886*4882a593Smuzhiyun goto _exit0;
887*4882a593Smuzhiyun }
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun vxge_debug_tx(VXGE_TRACE,
890*4882a593Smuzhiyun "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
891*4882a593Smuzhiyun dev->name, __func__, __LINE__,
892*4882a593Smuzhiyun fifo_hw, dtr, dtr_priv);
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun if (skb_vlan_tag_present(skb)) {
895*4882a593Smuzhiyun u16 vlan_tag = skb_vlan_tag_get(skb);
896*4882a593Smuzhiyun vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
897*4882a593Smuzhiyun }
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun first_frg_len = skb_headlen(skb);
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun dma_pointer = dma_map_single(&fifo->pdev->dev, skb->data,
902*4882a593Smuzhiyun first_frg_len, DMA_TO_DEVICE);
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun if (unlikely(dma_mapping_error(&fifo->pdev->dev, dma_pointer))) {
905*4882a593Smuzhiyun vxge_hw_fifo_txdl_free(fifo_hw, dtr);
906*4882a593Smuzhiyun fifo->stats.pci_map_fail++;
907*4882a593Smuzhiyun goto _exit0;
908*4882a593Smuzhiyun }
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
911*4882a593Smuzhiyun txdl_priv->skb = skb;
912*4882a593Smuzhiyun txdl_priv->dma_buffers[j] = dma_pointer;
913*4882a593Smuzhiyun
914*4882a593Smuzhiyun frg_cnt = skb_shinfo(skb)->nr_frags;
915*4882a593Smuzhiyun vxge_debug_tx(VXGE_TRACE,
916*4882a593Smuzhiyun "%s: %s:%d skb = %p txdl_priv = %p "
917*4882a593Smuzhiyun "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
918*4882a593Smuzhiyun __func__, __LINE__, skb, txdl_priv,
919*4882a593Smuzhiyun frg_cnt, (unsigned long long)dma_pointer);
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
922*4882a593Smuzhiyun first_frg_len);
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun frag = &skb_shinfo(skb)->frags[0];
925*4882a593Smuzhiyun for (i = 0; i < frg_cnt; i++) {
926*4882a593Smuzhiyun /* ignore 0 length fragment */
927*4882a593Smuzhiyun if (!skb_frag_size(frag))
928*4882a593Smuzhiyun continue;
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun dma_pointer = (u64)skb_frag_dma_map(&fifo->pdev->dev, frag,
931*4882a593Smuzhiyun 0, skb_frag_size(frag),
932*4882a593Smuzhiyun DMA_TO_DEVICE);
933*4882a593Smuzhiyun
934*4882a593Smuzhiyun if (unlikely(dma_mapping_error(&fifo->pdev->dev, dma_pointer)))
935*4882a593Smuzhiyun goto _exit2;
936*4882a593Smuzhiyun vxge_debug_tx(VXGE_TRACE,
937*4882a593Smuzhiyun "%s: %s:%d frag = %d dma_pointer = 0x%llx",
938*4882a593Smuzhiyun dev->name, __func__, __LINE__, i,
939*4882a593Smuzhiyun (unsigned long long)dma_pointer);
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun txdl_priv->dma_buffers[j] = dma_pointer;
942*4882a593Smuzhiyun vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
943*4882a593Smuzhiyun skb_frag_size(frag));
944*4882a593Smuzhiyun frag += 1;
945*4882a593Smuzhiyun }
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun offload_type = vxge_offload_type(skb);
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
950*4882a593Smuzhiyun int mss = vxge_tcp_mss(skb);
951*4882a593Smuzhiyun if (mss) {
952*4882a593Smuzhiyun vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
953*4882a593Smuzhiyun dev->name, __func__, __LINE__, mss);
954*4882a593Smuzhiyun vxge_hw_fifo_txdl_mss_set(dtr, mss);
955*4882a593Smuzhiyun } else {
956*4882a593Smuzhiyun vxge_assert(skb->len <=
957*4882a593Smuzhiyun dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
958*4882a593Smuzhiyun vxge_assert(0);
959*4882a593Smuzhiyun goto _exit1;
960*4882a593Smuzhiyun }
961*4882a593Smuzhiyun }
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun if (skb->ip_summed == CHECKSUM_PARTIAL)
964*4882a593Smuzhiyun vxge_hw_fifo_txdl_cksum_set_bits(dtr,
965*4882a593Smuzhiyun VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
966*4882a593Smuzhiyun VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
967*4882a593Smuzhiyun VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun vxge_hw_fifo_txdl_post(fifo_hw, dtr);
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
972*4882a593Smuzhiyun dev->name, __func__, __LINE__);
973*4882a593Smuzhiyun return NETDEV_TX_OK;
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun _exit2:
976*4882a593Smuzhiyun vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
977*4882a593Smuzhiyun _exit1:
978*4882a593Smuzhiyun j = 0;
979*4882a593Smuzhiyun frag = &skb_shinfo(skb)->frags[0];
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun dma_unmap_single(&fifo->pdev->dev, txdl_priv->dma_buffers[j++],
982*4882a593Smuzhiyun skb_headlen(skb), DMA_TO_DEVICE);
983*4882a593Smuzhiyun
984*4882a593Smuzhiyun for (; j < i; j++) {
985*4882a593Smuzhiyun dma_unmap_page(&fifo->pdev->dev, txdl_priv->dma_buffers[j],
986*4882a593Smuzhiyun skb_frag_size(frag), DMA_TO_DEVICE);
987*4882a593Smuzhiyun frag += 1;
988*4882a593Smuzhiyun }
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun vxge_hw_fifo_txdl_free(fifo_hw, dtr);
991*4882a593Smuzhiyun _exit0:
992*4882a593Smuzhiyun netif_tx_stop_queue(fifo->txq);
993*4882a593Smuzhiyun dev_kfree_skb_any(skb);
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun return NETDEV_TX_OK;
996*4882a593Smuzhiyun }
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun /*
999*4882a593Smuzhiyun * vxge_rx_term
1000*4882a593Smuzhiyun *
1001*4882a593Smuzhiyun * Function will be called by hw function to abort all outstanding receive
1002*4882a593Smuzhiyun * descriptors.
1003*4882a593Smuzhiyun */
1004*4882a593Smuzhiyun static void
vxge_rx_term(void * dtrh,enum vxge_hw_rxd_state state,void * userdata)1005*4882a593Smuzhiyun vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
1006*4882a593Smuzhiyun {
1007*4882a593Smuzhiyun struct vxge_ring *ring = (struct vxge_ring *)userdata;
1008*4882a593Smuzhiyun struct vxge_rx_priv *rx_priv =
1009*4882a593Smuzhiyun vxge_hw_ring_rxd_private_get(dtrh);
1010*4882a593Smuzhiyun
1011*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
1012*4882a593Smuzhiyun ring->ndev->name, __func__, __LINE__);
1013*4882a593Smuzhiyun if (state != VXGE_HW_RXD_STATE_POSTED)
1014*4882a593Smuzhiyun return;
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun dma_unmap_single(&ring->pdev->dev, rx_priv->data_dma,
1017*4882a593Smuzhiyun rx_priv->data_size, DMA_FROM_DEVICE);
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun dev_kfree_skb(rx_priv->skb);
1020*4882a593Smuzhiyun rx_priv->skb_data = NULL;
1021*4882a593Smuzhiyun
1022*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
1023*4882a593Smuzhiyun "%s: %s:%d Exiting...",
1024*4882a593Smuzhiyun ring->ndev->name, __func__, __LINE__);
1025*4882a593Smuzhiyun }
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun /*
1028*4882a593Smuzhiyun * vxge_tx_term
1029*4882a593Smuzhiyun *
1030*4882a593Smuzhiyun * Function will be called to abort all outstanding tx descriptors
1031*4882a593Smuzhiyun */
1032*4882a593Smuzhiyun static void
vxge_tx_term(void * dtrh,enum vxge_hw_txdl_state state,void * userdata)1033*4882a593Smuzhiyun vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
1034*4882a593Smuzhiyun {
1035*4882a593Smuzhiyun struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
1036*4882a593Smuzhiyun skb_frag_t *frag;
1037*4882a593Smuzhiyun int i = 0, j, frg_cnt;
1038*4882a593Smuzhiyun struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
1039*4882a593Smuzhiyun struct sk_buff *skb = txd_priv->skb;
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1042*4882a593Smuzhiyun
1043*4882a593Smuzhiyun if (state != VXGE_HW_TXDL_STATE_POSTED)
1044*4882a593Smuzhiyun return;
1045*4882a593Smuzhiyun
1046*4882a593Smuzhiyun /* check skb validity */
1047*4882a593Smuzhiyun vxge_assert(skb);
1048*4882a593Smuzhiyun frg_cnt = skb_shinfo(skb)->nr_frags;
1049*4882a593Smuzhiyun frag = &skb_shinfo(skb)->frags[0];
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun /* for unfragmented skb */
1052*4882a593Smuzhiyun dma_unmap_single(&fifo->pdev->dev, txd_priv->dma_buffers[i++],
1053*4882a593Smuzhiyun skb_headlen(skb), DMA_TO_DEVICE);
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun for (j = 0; j < frg_cnt; j++) {
1056*4882a593Smuzhiyun dma_unmap_page(&fifo->pdev->dev, txd_priv->dma_buffers[i++],
1057*4882a593Smuzhiyun skb_frag_size(frag), DMA_TO_DEVICE);
1058*4882a593Smuzhiyun frag += 1;
1059*4882a593Smuzhiyun }
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun dev_kfree_skb(skb);
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
1064*4882a593Smuzhiyun "%s:%d Exiting...", __func__, __LINE__);
1065*4882a593Smuzhiyun }
1066*4882a593Smuzhiyun
vxge_mac_list_del(struct vxge_vpath * vpath,struct macInfo * mac)1067*4882a593Smuzhiyun static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
1068*4882a593Smuzhiyun {
1069*4882a593Smuzhiyun struct list_head *entry, *next;
1070*4882a593Smuzhiyun u64 del_mac = 0;
1071*4882a593Smuzhiyun u8 *mac_address = (u8 *) (&del_mac);
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun /* Copy the mac address to delete from the list */
1074*4882a593Smuzhiyun memcpy(mac_address, mac->macaddr, ETH_ALEN);
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1077*4882a593Smuzhiyun if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
1078*4882a593Smuzhiyun list_del(entry);
1079*4882a593Smuzhiyun kfree(entry);
1080*4882a593Smuzhiyun vpath->mac_addr_cnt--;
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun if (is_multicast_ether_addr(mac->macaddr))
1083*4882a593Smuzhiyun vpath->mcast_addr_cnt--;
1084*4882a593Smuzhiyun return TRUE;
1085*4882a593Smuzhiyun }
1086*4882a593Smuzhiyun }
1087*4882a593Smuzhiyun
1088*4882a593Smuzhiyun return FALSE;
1089*4882a593Smuzhiyun }
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun /* delete a mac address from DA table */
1092*4882a593Smuzhiyun static enum vxge_hw_status
vxge_del_mac_addr(struct vxgedev * vdev,struct macInfo * mac)1093*4882a593Smuzhiyun vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
1094*4882a593Smuzhiyun {
1095*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
1096*4882a593Smuzhiyun struct vxge_vpath *vpath;
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun vpath = &vdev->vpaths[mac->vpath_no];
1099*4882a593Smuzhiyun status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
1100*4882a593Smuzhiyun mac->macmask);
1101*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
1102*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1103*4882a593Smuzhiyun "DA config delete entry failed for vpath:%d",
1104*4882a593Smuzhiyun vpath->device_id);
1105*4882a593Smuzhiyun } else
1106*4882a593Smuzhiyun vxge_mac_list_del(vpath, mac);
1107*4882a593Smuzhiyun return status;
1108*4882a593Smuzhiyun }
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun /**
1111*4882a593Smuzhiyun * vxge_set_multicast
1112*4882a593Smuzhiyun * @dev: pointer to the device structure
1113*4882a593Smuzhiyun *
1114*4882a593Smuzhiyun * Entry point for multicast address enable/disable
1115*4882a593Smuzhiyun * This function is a driver entry point which gets called by the kernel
1116*4882a593Smuzhiyun * whenever multicast addresses must be enabled/disabled. This also gets
1117*4882a593Smuzhiyun * called to set/reset promiscuous mode. Depending on the deivce flag, we
1118*4882a593Smuzhiyun * determine, if multicast address must be enabled or if promiscuous mode
1119*4882a593Smuzhiyun * is to be disabled etc.
1120*4882a593Smuzhiyun */
vxge_set_multicast(struct net_device * dev)1121*4882a593Smuzhiyun static void vxge_set_multicast(struct net_device *dev)
1122*4882a593Smuzhiyun {
1123*4882a593Smuzhiyun struct netdev_hw_addr *ha;
1124*4882a593Smuzhiyun struct vxgedev *vdev;
1125*4882a593Smuzhiyun int i, mcast_cnt = 0;
1126*4882a593Smuzhiyun struct vxge_vpath *vpath;
1127*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
1128*4882a593Smuzhiyun struct macInfo mac_info;
1129*4882a593Smuzhiyun int vpath_idx = 0;
1130*4882a593Smuzhiyun struct vxge_mac_addrs *mac_entry;
1131*4882a593Smuzhiyun struct list_head *list_head;
1132*4882a593Smuzhiyun struct list_head *entry, *next;
1133*4882a593Smuzhiyun u8 *mac_address = NULL;
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
1136*4882a593Smuzhiyun "%s:%d", __func__, __LINE__);
1137*4882a593Smuzhiyun
1138*4882a593Smuzhiyun vdev = netdev_priv(dev);
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun if (unlikely(!is_vxge_card_up(vdev)))
1141*4882a593Smuzhiyun return;
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
1144*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
1145*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
1146*4882a593Smuzhiyun vxge_assert(vpath->is_open);
1147*4882a593Smuzhiyun status = vxge_hw_vpath_mcast_enable(vpath->handle);
1148*4882a593Smuzhiyun if (status != VXGE_HW_OK)
1149*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "failed to enable "
1150*4882a593Smuzhiyun "multicast, status %d", status);
1151*4882a593Smuzhiyun vdev->all_multi_flg = 1;
1152*4882a593Smuzhiyun }
1153*4882a593Smuzhiyun } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
1154*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
1155*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
1156*4882a593Smuzhiyun vxge_assert(vpath->is_open);
1157*4882a593Smuzhiyun status = vxge_hw_vpath_mcast_disable(vpath->handle);
1158*4882a593Smuzhiyun if (status != VXGE_HW_OK)
1159*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "failed to disable "
1160*4882a593Smuzhiyun "multicast, status %d", status);
1161*4882a593Smuzhiyun vdev->all_multi_flg = 0;
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun }
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun if (!vdev->config.addr_learn_en) {
1167*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
1168*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
1169*4882a593Smuzhiyun vxge_assert(vpath->is_open);
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun if (dev->flags & IFF_PROMISC)
1172*4882a593Smuzhiyun status = vxge_hw_vpath_promisc_enable(
1173*4882a593Smuzhiyun vpath->handle);
1174*4882a593Smuzhiyun else
1175*4882a593Smuzhiyun status = vxge_hw_vpath_promisc_disable(
1176*4882a593Smuzhiyun vpath->handle);
1177*4882a593Smuzhiyun if (status != VXGE_HW_OK)
1178*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "failed to %s promisc"
1179*4882a593Smuzhiyun ", status %d", dev->flags&IFF_PROMISC ?
1180*4882a593Smuzhiyun "enable" : "disable", status);
1181*4882a593Smuzhiyun }
1182*4882a593Smuzhiyun }
1183*4882a593Smuzhiyun
1184*4882a593Smuzhiyun memset(&mac_info, 0, sizeof(struct macInfo));
1185*4882a593Smuzhiyun /* Update individual M_CAST address list */
1186*4882a593Smuzhiyun if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
1187*4882a593Smuzhiyun mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1188*4882a593Smuzhiyun list_head = &vdev->vpaths[0].mac_addr_list;
1189*4882a593Smuzhiyun if ((netdev_mc_count(dev) +
1190*4882a593Smuzhiyun (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
1191*4882a593Smuzhiyun vdev->vpaths[0].max_mac_addr_cnt)
1192*4882a593Smuzhiyun goto _set_all_mcast;
1193*4882a593Smuzhiyun
1194*4882a593Smuzhiyun /* Delete previous MC's */
1195*4882a593Smuzhiyun for (i = 0; i < mcast_cnt; i++) {
1196*4882a593Smuzhiyun list_for_each_safe(entry, next, list_head) {
1197*4882a593Smuzhiyun mac_entry = (struct vxge_mac_addrs *)entry;
1198*4882a593Smuzhiyun /* Copy the mac address to delete */
1199*4882a593Smuzhiyun mac_address = (u8 *)&mac_entry->macaddr;
1200*4882a593Smuzhiyun memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun if (is_multicast_ether_addr(mac_info.macaddr)) {
1203*4882a593Smuzhiyun for (vpath_idx = 0; vpath_idx <
1204*4882a593Smuzhiyun vdev->no_of_vpath;
1205*4882a593Smuzhiyun vpath_idx++) {
1206*4882a593Smuzhiyun mac_info.vpath_no = vpath_idx;
1207*4882a593Smuzhiyun status = vxge_del_mac_addr(
1208*4882a593Smuzhiyun vdev,
1209*4882a593Smuzhiyun &mac_info);
1210*4882a593Smuzhiyun }
1211*4882a593Smuzhiyun }
1212*4882a593Smuzhiyun }
1213*4882a593Smuzhiyun }
1214*4882a593Smuzhiyun
1215*4882a593Smuzhiyun /* Add new ones */
1216*4882a593Smuzhiyun netdev_for_each_mc_addr(ha, dev) {
1217*4882a593Smuzhiyun memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
1218*4882a593Smuzhiyun for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1219*4882a593Smuzhiyun vpath_idx++) {
1220*4882a593Smuzhiyun mac_info.vpath_no = vpath_idx;
1221*4882a593Smuzhiyun mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1222*4882a593Smuzhiyun status = vxge_add_mac_addr(vdev, &mac_info);
1223*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
1224*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1225*4882a593Smuzhiyun "%s:%d Setting individual"
1226*4882a593Smuzhiyun "multicast address failed",
1227*4882a593Smuzhiyun __func__, __LINE__);
1228*4882a593Smuzhiyun goto _set_all_mcast;
1229*4882a593Smuzhiyun }
1230*4882a593Smuzhiyun }
1231*4882a593Smuzhiyun }
1232*4882a593Smuzhiyun
1233*4882a593Smuzhiyun return;
1234*4882a593Smuzhiyun _set_all_mcast:
1235*4882a593Smuzhiyun mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1236*4882a593Smuzhiyun /* Delete previous MC's */
1237*4882a593Smuzhiyun for (i = 0; i < mcast_cnt; i++) {
1238*4882a593Smuzhiyun list_for_each_safe(entry, next, list_head) {
1239*4882a593Smuzhiyun mac_entry = (struct vxge_mac_addrs *)entry;
1240*4882a593Smuzhiyun /* Copy the mac address to delete */
1241*4882a593Smuzhiyun mac_address = (u8 *)&mac_entry->macaddr;
1242*4882a593Smuzhiyun memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun if (is_multicast_ether_addr(mac_info.macaddr))
1245*4882a593Smuzhiyun break;
1246*4882a593Smuzhiyun }
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1249*4882a593Smuzhiyun vpath_idx++) {
1250*4882a593Smuzhiyun mac_info.vpath_no = vpath_idx;
1251*4882a593Smuzhiyun status = vxge_del_mac_addr(vdev, &mac_info);
1252*4882a593Smuzhiyun }
1253*4882a593Smuzhiyun }
1254*4882a593Smuzhiyun
1255*4882a593Smuzhiyun /* Enable all multicast */
1256*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
1257*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
1258*4882a593Smuzhiyun vxge_assert(vpath->is_open);
1259*4882a593Smuzhiyun
1260*4882a593Smuzhiyun status = vxge_hw_vpath_mcast_enable(vpath->handle);
1261*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
1262*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1263*4882a593Smuzhiyun "%s:%d Enabling all multicasts failed",
1264*4882a593Smuzhiyun __func__, __LINE__);
1265*4882a593Smuzhiyun }
1266*4882a593Smuzhiyun vdev->all_multi_flg = 1;
1267*4882a593Smuzhiyun }
1268*4882a593Smuzhiyun dev->flags |= IFF_ALLMULTI;
1269*4882a593Smuzhiyun }
1270*4882a593Smuzhiyun
1271*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
1272*4882a593Smuzhiyun "%s:%d Exiting...", __func__, __LINE__);
1273*4882a593Smuzhiyun }
1274*4882a593Smuzhiyun
1275*4882a593Smuzhiyun /**
1276*4882a593Smuzhiyun * vxge_set_mac_addr
1277*4882a593Smuzhiyun * @dev: pointer to the device structure
1278*4882a593Smuzhiyun * @p: socket info
1279*4882a593Smuzhiyun *
1280*4882a593Smuzhiyun * Update entry "0" (default MAC addr)
1281*4882a593Smuzhiyun */
vxge_set_mac_addr(struct net_device * dev,void * p)1282*4882a593Smuzhiyun static int vxge_set_mac_addr(struct net_device *dev, void *p)
1283*4882a593Smuzhiyun {
1284*4882a593Smuzhiyun struct sockaddr *addr = p;
1285*4882a593Smuzhiyun struct vxgedev *vdev;
1286*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
1287*4882a593Smuzhiyun struct macInfo mac_info_new, mac_info_old;
1288*4882a593Smuzhiyun int vpath_idx = 0;
1289*4882a593Smuzhiyun
1290*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1291*4882a593Smuzhiyun
1292*4882a593Smuzhiyun vdev = netdev_priv(dev);
1293*4882a593Smuzhiyun
1294*4882a593Smuzhiyun if (!is_valid_ether_addr(addr->sa_data))
1295*4882a593Smuzhiyun return -EINVAL;
1296*4882a593Smuzhiyun
1297*4882a593Smuzhiyun memset(&mac_info_new, 0, sizeof(struct macInfo));
1298*4882a593Smuzhiyun memset(&mac_info_old, 0, sizeof(struct macInfo));
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
1301*4882a593Smuzhiyun __func__, __LINE__);
1302*4882a593Smuzhiyun
1303*4882a593Smuzhiyun /* Get the old address */
1304*4882a593Smuzhiyun memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
1305*4882a593Smuzhiyun
1306*4882a593Smuzhiyun /* Copy the new address */
1307*4882a593Smuzhiyun memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
1308*4882a593Smuzhiyun
1309*4882a593Smuzhiyun /* First delete the old mac address from all the vpaths
1310*4882a593Smuzhiyun as we can't specify the index while adding new mac address */
1311*4882a593Smuzhiyun for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1312*4882a593Smuzhiyun struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
1313*4882a593Smuzhiyun if (!vpath->is_open) {
1314*4882a593Smuzhiyun /* This can happen when this interface is added/removed
1315*4882a593Smuzhiyun to the bonding interface. Delete this station address
1316*4882a593Smuzhiyun from the linked list */
1317*4882a593Smuzhiyun vxge_mac_list_del(vpath, &mac_info_old);
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun /* Add this new address to the linked list
1320*4882a593Smuzhiyun for later restoring */
1321*4882a593Smuzhiyun vxge_mac_list_add(vpath, &mac_info_new);
1322*4882a593Smuzhiyun
1323*4882a593Smuzhiyun continue;
1324*4882a593Smuzhiyun }
1325*4882a593Smuzhiyun /* Delete the station address */
1326*4882a593Smuzhiyun mac_info_old.vpath_no = vpath_idx;
1327*4882a593Smuzhiyun status = vxge_del_mac_addr(vdev, &mac_info_old);
1328*4882a593Smuzhiyun }
1329*4882a593Smuzhiyun
1330*4882a593Smuzhiyun if (unlikely(!is_vxge_card_up(vdev))) {
1331*4882a593Smuzhiyun memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1332*4882a593Smuzhiyun return VXGE_HW_OK;
1333*4882a593Smuzhiyun }
1334*4882a593Smuzhiyun
1335*4882a593Smuzhiyun /* Set this mac address to all the vpaths */
1336*4882a593Smuzhiyun for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1337*4882a593Smuzhiyun mac_info_new.vpath_no = vpath_idx;
1338*4882a593Smuzhiyun mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1339*4882a593Smuzhiyun status = vxge_add_mac_addr(vdev, &mac_info_new);
1340*4882a593Smuzhiyun if (status != VXGE_HW_OK)
1341*4882a593Smuzhiyun return -EINVAL;
1342*4882a593Smuzhiyun }
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1345*4882a593Smuzhiyun
1346*4882a593Smuzhiyun return status;
1347*4882a593Smuzhiyun }
1348*4882a593Smuzhiyun
1349*4882a593Smuzhiyun /*
1350*4882a593Smuzhiyun * vxge_vpath_intr_enable
1351*4882a593Smuzhiyun * @vdev: pointer to vdev
1352*4882a593Smuzhiyun * @vp_id: vpath for which to enable the interrupts
1353*4882a593Smuzhiyun *
1354*4882a593Smuzhiyun * Enables the interrupts for the vpath
1355*4882a593Smuzhiyun */
vxge_vpath_intr_enable(struct vxgedev * vdev,int vp_id)1356*4882a593Smuzhiyun static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
1357*4882a593Smuzhiyun {
1358*4882a593Smuzhiyun struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
1359*4882a593Smuzhiyun int msix_id = 0;
1360*4882a593Smuzhiyun int tim_msix_id[4] = {0, 1, 0, 0};
1361*4882a593Smuzhiyun int alarm_msix_id = VXGE_ALARM_MSIX_ID;
1362*4882a593Smuzhiyun
1363*4882a593Smuzhiyun vxge_hw_vpath_intr_enable(vpath->handle);
1364*4882a593Smuzhiyun
1365*4882a593Smuzhiyun if (vdev->config.intr_type == INTA)
1366*4882a593Smuzhiyun vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
1367*4882a593Smuzhiyun else {
1368*4882a593Smuzhiyun vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
1369*4882a593Smuzhiyun alarm_msix_id);
1370*4882a593Smuzhiyun
1371*4882a593Smuzhiyun msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
1372*4882a593Smuzhiyun vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1373*4882a593Smuzhiyun vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
1374*4882a593Smuzhiyun
1375*4882a593Smuzhiyun /* enable the alarm vector */
1376*4882a593Smuzhiyun msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1377*4882a593Smuzhiyun VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
1378*4882a593Smuzhiyun vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1379*4882a593Smuzhiyun }
1380*4882a593Smuzhiyun }
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun /*
1383*4882a593Smuzhiyun * vxge_vpath_intr_disable
1384*4882a593Smuzhiyun * @vdev: pointer to vdev
1385*4882a593Smuzhiyun * @vp_id: vpath for which to disable the interrupts
1386*4882a593Smuzhiyun *
1387*4882a593Smuzhiyun * Disables the interrupts for the vpath
1388*4882a593Smuzhiyun */
vxge_vpath_intr_disable(struct vxgedev * vdev,int vp_id)1389*4882a593Smuzhiyun static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
1390*4882a593Smuzhiyun {
1391*4882a593Smuzhiyun struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
1392*4882a593Smuzhiyun struct __vxge_hw_device *hldev;
1393*4882a593Smuzhiyun int msix_id;
1394*4882a593Smuzhiyun
1395*4882a593Smuzhiyun hldev = pci_get_drvdata(vdev->pdev);
1396*4882a593Smuzhiyun
1397*4882a593Smuzhiyun vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
1398*4882a593Smuzhiyun
1399*4882a593Smuzhiyun vxge_hw_vpath_intr_disable(vpath->handle);
1400*4882a593Smuzhiyun
1401*4882a593Smuzhiyun if (vdev->config.intr_type == INTA)
1402*4882a593Smuzhiyun vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
1403*4882a593Smuzhiyun else {
1404*4882a593Smuzhiyun msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
1405*4882a593Smuzhiyun vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1406*4882a593Smuzhiyun vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
1407*4882a593Smuzhiyun
1408*4882a593Smuzhiyun /* disable the alarm vector */
1409*4882a593Smuzhiyun msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1410*4882a593Smuzhiyun VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
1411*4882a593Smuzhiyun vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1412*4882a593Smuzhiyun }
1413*4882a593Smuzhiyun }
1414*4882a593Smuzhiyun
1415*4882a593Smuzhiyun /* list all mac addresses from DA table */
1416*4882a593Smuzhiyun static enum vxge_hw_status
vxge_search_mac_addr_in_da_table(struct vxge_vpath * vpath,struct macInfo * mac)1417*4882a593Smuzhiyun vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath, struct macInfo *mac)
1418*4882a593Smuzhiyun {
1419*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
1420*4882a593Smuzhiyun unsigned char macmask[ETH_ALEN];
1421*4882a593Smuzhiyun unsigned char macaddr[ETH_ALEN];
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun status = vxge_hw_vpath_mac_addr_get(vpath->handle,
1424*4882a593Smuzhiyun macaddr, macmask);
1425*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
1426*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1427*4882a593Smuzhiyun "DA config list entry failed for vpath:%d",
1428*4882a593Smuzhiyun vpath->device_id);
1429*4882a593Smuzhiyun return status;
1430*4882a593Smuzhiyun }
1431*4882a593Smuzhiyun
1432*4882a593Smuzhiyun while (!ether_addr_equal(mac->macaddr, macaddr)) {
1433*4882a593Smuzhiyun status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
1434*4882a593Smuzhiyun macaddr, macmask);
1435*4882a593Smuzhiyun if (status != VXGE_HW_OK)
1436*4882a593Smuzhiyun break;
1437*4882a593Smuzhiyun }
1438*4882a593Smuzhiyun
1439*4882a593Smuzhiyun return status;
1440*4882a593Smuzhiyun }
1441*4882a593Smuzhiyun
1442*4882a593Smuzhiyun /* Store all mac addresses from the list to the DA table */
vxge_restore_vpath_mac_addr(struct vxge_vpath * vpath)1443*4882a593Smuzhiyun static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
1444*4882a593Smuzhiyun {
1445*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
1446*4882a593Smuzhiyun struct macInfo mac_info;
1447*4882a593Smuzhiyun u8 *mac_address = NULL;
1448*4882a593Smuzhiyun struct list_head *entry, *next;
1449*4882a593Smuzhiyun
1450*4882a593Smuzhiyun memset(&mac_info, 0, sizeof(struct macInfo));
1451*4882a593Smuzhiyun
1452*4882a593Smuzhiyun if (vpath->is_open) {
1453*4882a593Smuzhiyun list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1454*4882a593Smuzhiyun mac_address =
1455*4882a593Smuzhiyun (u8 *)&
1456*4882a593Smuzhiyun ((struct vxge_mac_addrs *)entry)->macaddr;
1457*4882a593Smuzhiyun memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1458*4882a593Smuzhiyun ((struct vxge_mac_addrs *)entry)->state =
1459*4882a593Smuzhiyun VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1460*4882a593Smuzhiyun /* does this mac address already exist in da table? */
1461*4882a593Smuzhiyun status = vxge_search_mac_addr_in_da_table(vpath,
1462*4882a593Smuzhiyun &mac_info);
1463*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
1464*4882a593Smuzhiyun /* Add this mac address to the DA table */
1465*4882a593Smuzhiyun status = vxge_hw_vpath_mac_addr_add(
1466*4882a593Smuzhiyun vpath->handle, mac_info.macaddr,
1467*4882a593Smuzhiyun mac_info.macmask,
1468*4882a593Smuzhiyun VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
1469*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
1470*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1471*4882a593Smuzhiyun "DA add entry failed for vpath:%d",
1472*4882a593Smuzhiyun vpath->device_id);
1473*4882a593Smuzhiyun ((struct vxge_mac_addrs *)entry)->state
1474*4882a593Smuzhiyun = VXGE_LL_MAC_ADDR_IN_LIST;
1475*4882a593Smuzhiyun }
1476*4882a593Smuzhiyun }
1477*4882a593Smuzhiyun }
1478*4882a593Smuzhiyun }
1479*4882a593Smuzhiyun
1480*4882a593Smuzhiyun return status;
1481*4882a593Smuzhiyun }
1482*4882a593Smuzhiyun
1483*4882a593Smuzhiyun /* Store all vlan ids from the list to the vid table */
1484*4882a593Smuzhiyun static enum vxge_hw_status
vxge_restore_vpath_vid_table(struct vxge_vpath * vpath)1485*4882a593Smuzhiyun vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
1486*4882a593Smuzhiyun {
1487*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
1488*4882a593Smuzhiyun struct vxgedev *vdev = vpath->vdev;
1489*4882a593Smuzhiyun u16 vid;
1490*4882a593Smuzhiyun
1491*4882a593Smuzhiyun if (!vpath->is_open)
1492*4882a593Smuzhiyun return status;
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun for_each_set_bit(vid, vdev->active_vlans, VLAN_N_VID)
1495*4882a593Smuzhiyun status = vxge_hw_vpath_vid_add(vpath->handle, vid);
1496*4882a593Smuzhiyun
1497*4882a593Smuzhiyun return status;
1498*4882a593Smuzhiyun }
1499*4882a593Smuzhiyun
1500*4882a593Smuzhiyun /*
1501*4882a593Smuzhiyun * vxge_reset_vpath
1502*4882a593Smuzhiyun * @vdev: pointer to vdev
1503*4882a593Smuzhiyun * @vp_id: vpath to reset
1504*4882a593Smuzhiyun *
1505*4882a593Smuzhiyun * Resets the vpath
1506*4882a593Smuzhiyun */
vxge_reset_vpath(struct vxgedev * vdev,int vp_id)1507*4882a593Smuzhiyun static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
1508*4882a593Smuzhiyun {
1509*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
1510*4882a593Smuzhiyun struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
1511*4882a593Smuzhiyun int ret = 0;
1512*4882a593Smuzhiyun
1513*4882a593Smuzhiyun /* check if device is down already */
1514*4882a593Smuzhiyun if (unlikely(!is_vxge_card_up(vdev)))
1515*4882a593Smuzhiyun return 0;
1516*4882a593Smuzhiyun
1517*4882a593Smuzhiyun /* is device reset already scheduled */
1518*4882a593Smuzhiyun if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1519*4882a593Smuzhiyun return 0;
1520*4882a593Smuzhiyun
1521*4882a593Smuzhiyun if (vpath->handle) {
1522*4882a593Smuzhiyun if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
1523*4882a593Smuzhiyun if (is_vxge_card_up(vdev) &&
1524*4882a593Smuzhiyun vxge_hw_vpath_recover_from_reset(vpath->handle)
1525*4882a593Smuzhiyun != VXGE_HW_OK) {
1526*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1527*4882a593Smuzhiyun "vxge_hw_vpath_recover_from_reset"
1528*4882a593Smuzhiyun "failed for vpath:%d", vp_id);
1529*4882a593Smuzhiyun return status;
1530*4882a593Smuzhiyun }
1531*4882a593Smuzhiyun } else {
1532*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1533*4882a593Smuzhiyun "vxge_hw_vpath_reset failed for"
1534*4882a593Smuzhiyun "vpath:%d", vp_id);
1535*4882a593Smuzhiyun return status;
1536*4882a593Smuzhiyun }
1537*4882a593Smuzhiyun } else
1538*4882a593Smuzhiyun return VXGE_HW_FAIL;
1539*4882a593Smuzhiyun
1540*4882a593Smuzhiyun vxge_restore_vpath_mac_addr(vpath);
1541*4882a593Smuzhiyun vxge_restore_vpath_vid_table(vpath);
1542*4882a593Smuzhiyun
1543*4882a593Smuzhiyun /* Enable all broadcast */
1544*4882a593Smuzhiyun vxge_hw_vpath_bcast_enable(vpath->handle);
1545*4882a593Smuzhiyun
1546*4882a593Smuzhiyun /* Enable all multicast */
1547*4882a593Smuzhiyun if (vdev->all_multi_flg) {
1548*4882a593Smuzhiyun status = vxge_hw_vpath_mcast_enable(vpath->handle);
1549*4882a593Smuzhiyun if (status != VXGE_HW_OK)
1550*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1551*4882a593Smuzhiyun "%s:%d Enabling multicast failed",
1552*4882a593Smuzhiyun __func__, __LINE__);
1553*4882a593Smuzhiyun }
1554*4882a593Smuzhiyun
1555*4882a593Smuzhiyun /* Enable the interrupts */
1556*4882a593Smuzhiyun vxge_vpath_intr_enable(vdev, vp_id);
1557*4882a593Smuzhiyun
1558*4882a593Smuzhiyun smp_wmb();
1559*4882a593Smuzhiyun
1560*4882a593Smuzhiyun /* Enable the flow of traffic through the vpath */
1561*4882a593Smuzhiyun vxge_hw_vpath_enable(vpath->handle);
1562*4882a593Smuzhiyun
1563*4882a593Smuzhiyun smp_wmb();
1564*4882a593Smuzhiyun vxge_hw_vpath_rx_doorbell_init(vpath->handle);
1565*4882a593Smuzhiyun vpath->ring.last_status = VXGE_HW_OK;
1566*4882a593Smuzhiyun
1567*4882a593Smuzhiyun /* Vpath reset done */
1568*4882a593Smuzhiyun clear_bit(vp_id, &vdev->vp_reset);
1569*4882a593Smuzhiyun
1570*4882a593Smuzhiyun /* Start the vpath queue */
1571*4882a593Smuzhiyun if (netif_tx_queue_stopped(vpath->fifo.txq))
1572*4882a593Smuzhiyun netif_tx_wake_queue(vpath->fifo.txq);
1573*4882a593Smuzhiyun
1574*4882a593Smuzhiyun return ret;
1575*4882a593Smuzhiyun }
1576*4882a593Smuzhiyun
1577*4882a593Smuzhiyun /* Configure CI */
vxge_config_ci_for_tti_rti(struct vxgedev * vdev)1578*4882a593Smuzhiyun static void vxge_config_ci_for_tti_rti(struct vxgedev *vdev)
1579*4882a593Smuzhiyun {
1580*4882a593Smuzhiyun int i = 0;
1581*4882a593Smuzhiyun
1582*4882a593Smuzhiyun /* Enable CI for RTI */
1583*4882a593Smuzhiyun if (vdev->config.intr_type == MSI_X) {
1584*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
1585*4882a593Smuzhiyun struct __vxge_hw_ring *hw_ring;
1586*4882a593Smuzhiyun
1587*4882a593Smuzhiyun hw_ring = vdev->vpaths[i].ring.handle;
1588*4882a593Smuzhiyun vxge_hw_vpath_dynamic_rti_ci_set(hw_ring);
1589*4882a593Smuzhiyun }
1590*4882a593Smuzhiyun }
1591*4882a593Smuzhiyun
1592*4882a593Smuzhiyun /* Enable CI for TTI */
1593*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
1594*4882a593Smuzhiyun struct __vxge_hw_fifo *hw_fifo = vdev->vpaths[i].fifo.handle;
1595*4882a593Smuzhiyun vxge_hw_vpath_tti_ci_set(hw_fifo);
1596*4882a593Smuzhiyun /*
1597*4882a593Smuzhiyun * For Inta (with or without napi), Set CI ON for only one
1598*4882a593Smuzhiyun * vpath. (Have only one free running timer).
1599*4882a593Smuzhiyun */
1600*4882a593Smuzhiyun if ((vdev->config.intr_type == INTA) && (i == 0))
1601*4882a593Smuzhiyun break;
1602*4882a593Smuzhiyun }
1603*4882a593Smuzhiyun
1604*4882a593Smuzhiyun return;
1605*4882a593Smuzhiyun }
1606*4882a593Smuzhiyun
do_vxge_reset(struct vxgedev * vdev,int event)1607*4882a593Smuzhiyun static int do_vxge_reset(struct vxgedev *vdev, int event)
1608*4882a593Smuzhiyun {
1609*4882a593Smuzhiyun enum vxge_hw_status status;
1610*4882a593Smuzhiyun int ret = 0, vp_id, i;
1611*4882a593Smuzhiyun
1612*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1613*4882a593Smuzhiyun
1614*4882a593Smuzhiyun if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
1615*4882a593Smuzhiyun /* check if device is down already */
1616*4882a593Smuzhiyun if (unlikely(!is_vxge_card_up(vdev)))
1617*4882a593Smuzhiyun return 0;
1618*4882a593Smuzhiyun
1619*4882a593Smuzhiyun /* is reset already scheduled */
1620*4882a593Smuzhiyun if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1621*4882a593Smuzhiyun return 0;
1622*4882a593Smuzhiyun }
1623*4882a593Smuzhiyun
1624*4882a593Smuzhiyun if (event == VXGE_LL_FULL_RESET) {
1625*4882a593Smuzhiyun netif_carrier_off(vdev->ndev);
1626*4882a593Smuzhiyun
1627*4882a593Smuzhiyun /* wait for all the vpath reset to complete */
1628*4882a593Smuzhiyun for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1629*4882a593Smuzhiyun while (test_bit(vp_id, &vdev->vp_reset))
1630*4882a593Smuzhiyun msleep(50);
1631*4882a593Smuzhiyun }
1632*4882a593Smuzhiyun
1633*4882a593Smuzhiyun netif_carrier_on(vdev->ndev);
1634*4882a593Smuzhiyun
1635*4882a593Smuzhiyun /* if execution mode is set to debug, don't reset the adapter */
1636*4882a593Smuzhiyun if (unlikely(vdev->exec_mode)) {
1637*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1638*4882a593Smuzhiyun "%s: execution mode is debug, returning..",
1639*4882a593Smuzhiyun vdev->ndev->name);
1640*4882a593Smuzhiyun clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1641*4882a593Smuzhiyun netif_tx_stop_all_queues(vdev->ndev);
1642*4882a593Smuzhiyun return 0;
1643*4882a593Smuzhiyun }
1644*4882a593Smuzhiyun }
1645*4882a593Smuzhiyun
1646*4882a593Smuzhiyun if (event == VXGE_LL_FULL_RESET) {
1647*4882a593Smuzhiyun vxge_hw_device_wait_receive_idle(vdev->devh);
1648*4882a593Smuzhiyun vxge_hw_device_intr_disable(vdev->devh);
1649*4882a593Smuzhiyun
1650*4882a593Smuzhiyun switch (vdev->cric_err_event) {
1651*4882a593Smuzhiyun case VXGE_HW_EVENT_UNKNOWN:
1652*4882a593Smuzhiyun netif_tx_stop_all_queues(vdev->ndev);
1653*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1654*4882a593Smuzhiyun "fatal: %s: Disabling device due to"
1655*4882a593Smuzhiyun "unknown error",
1656*4882a593Smuzhiyun vdev->ndev->name);
1657*4882a593Smuzhiyun ret = -EPERM;
1658*4882a593Smuzhiyun goto out;
1659*4882a593Smuzhiyun case VXGE_HW_EVENT_RESET_START:
1660*4882a593Smuzhiyun break;
1661*4882a593Smuzhiyun case VXGE_HW_EVENT_RESET_COMPLETE:
1662*4882a593Smuzhiyun case VXGE_HW_EVENT_LINK_DOWN:
1663*4882a593Smuzhiyun case VXGE_HW_EVENT_LINK_UP:
1664*4882a593Smuzhiyun case VXGE_HW_EVENT_ALARM_CLEARED:
1665*4882a593Smuzhiyun case VXGE_HW_EVENT_ECCERR:
1666*4882a593Smuzhiyun case VXGE_HW_EVENT_MRPCIM_ECCERR:
1667*4882a593Smuzhiyun ret = -EPERM;
1668*4882a593Smuzhiyun goto out;
1669*4882a593Smuzhiyun case VXGE_HW_EVENT_FIFO_ERR:
1670*4882a593Smuzhiyun case VXGE_HW_EVENT_VPATH_ERR:
1671*4882a593Smuzhiyun break;
1672*4882a593Smuzhiyun case VXGE_HW_EVENT_CRITICAL_ERR:
1673*4882a593Smuzhiyun netif_tx_stop_all_queues(vdev->ndev);
1674*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1675*4882a593Smuzhiyun "fatal: %s: Disabling device due to"
1676*4882a593Smuzhiyun "serious error",
1677*4882a593Smuzhiyun vdev->ndev->name);
1678*4882a593Smuzhiyun /* SOP or device reset required */
1679*4882a593Smuzhiyun /* This event is not currently used */
1680*4882a593Smuzhiyun ret = -EPERM;
1681*4882a593Smuzhiyun goto out;
1682*4882a593Smuzhiyun case VXGE_HW_EVENT_SERR:
1683*4882a593Smuzhiyun netif_tx_stop_all_queues(vdev->ndev);
1684*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1685*4882a593Smuzhiyun "fatal: %s: Disabling device due to"
1686*4882a593Smuzhiyun "serious error",
1687*4882a593Smuzhiyun vdev->ndev->name);
1688*4882a593Smuzhiyun ret = -EPERM;
1689*4882a593Smuzhiyun goto out;
1690*4882a593Smuzhiyun case VXGE_HW_EVENT_SRPCIM_SERR:
1691*4882a593Smuzhiyun case VXGE_HW_EVENT_MRPCIM_SERR:
1692*4882a593Smuzhiyun ret = -EPERM;
1693*4882a593Smuzhiyun goto out;
1694*4882a593Smuzhiyun case VXGE_HW_EVENT_SLOT_FREEZE:
1695*4882a593Smuzhiyun netif_tx_stop_all_queues(vdev->ndev);
1696*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1697*4882a593Smuzhiyun "fatal: %s: Disabling device due to"
1698*4882a593Smuzhiyun "slot freeze",
1699*4882a593Smuzhiyun vdev->ndev->name);
1700*4882a593Smuzhiyun ret = -EPERM;
1701*4882a593Smuzhiyun goto out;
1702*4882a593Smuzhiyun default:
1703*4882a593Smuzhiyun break;
1704*4882a593Smuzhiyun
1705*4882a593Smuzhiyun }
1706*4882a593Smuzhiyun }
1707*4882a593Smuzhiyun
1708*4882a593Smuzhiyun if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
1709*4882a593Smuzhiyun netif_tx_stop_all_queues(vdev->ndev);
1710*4882a593Smuzhiyun
1711*4882a593Smuzhiyun if (event == VXGE_LL_FULL_RESET) {
1712*4882a593Smuzhiyun status = vxge_reset_all_vpaths(vdev);
1713*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
1714*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1715*4882a593Smuzhiyun "fatal: %s: can not reset vpaths",
1716*4882a593Smuzhiyun vdev->ndev->name);
1717*4882a593Smuzhiyun ret = -EPERM;
1718*4882a593Smuzhiyun goto out;
1719*4882a593Smuzhiyun }
1720*4882a593Smuzhiyun }
1721*4882a593Smuzhiyun
1722*4882a593Smuzhiyun if (event == VXGE_LL_COMPL_RESET) {
1723*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++)
1724*4882a593Smuzhiyun if (vdev->vpaths[i].handle) {
1725*4882a593Smuzhiyun if (vxge_hw_vpath_recover_from_reset(
1726*4882a593Smuzhiyun vdev->vpaths[i].handle)
1727*4882a593Smuzhiyun != VXGE_HW_OK) {
1728*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1729*4882a593Smuzhiyun "vxge_hw_vpath_recover_"
1730*4882a593Smuzhiyun "from_reset failed for vpath: "
1731*4882a593Smuzhiyun "%d", i);
1732*4882a593Smuzhiyun ret = -EPERM;
1733*4882a593Smuzhiyun goto out;
1734*4882a593Smuzhiyun }
1735*4882a593Smuzhiyun } else {
1736*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1737*4882a593Smuzhiyun "vxge_hw_vpath_reset failed for "
1738*4882a593Smuzhiyun "vpath:%d", i);
1739*4882a593Smuzhiyun ret = -EPERM;
1740*4882a593Smuzhiyun goto out;
1741*4882a593Smuzhiyun }
1742*4882a593Smuzhiyun }
1743*4882a593Smuzhiyun
1744*4882a593Smuzhiyun if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
1745*4882a593Smuzhiyun /* Reprogram the DA table with populated mac addresses */
1746*4882a593Smuzhiyun for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1747*4882a593Smuzhiyun vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
1748*4882a593Smuzhiyun vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
1749*4882a593Smuzhiyun }
1750*4882a593Smuzhiyun
1751*4882a593Smuzhiyun /* enable vpath interrupts */
1752*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++)
1753*4882a593Smuzhiyun vxge_vpath_intr_enable(vdev, i);
1754*4882a593Smuzhiyun
1755*4882a593Smuzhiyun vxge_hw_device_intr_enable(vdev->devh);
1756*4882a593Smuzhiyun
1757*4882a593Smuzhiyun smp_wmb();
1758*4882a593Smuzhiyun
1759*4882a593Smuzhiyun /* Indicate card up */
1760*4882a593Smuzhiyun set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1761*4882a593Smuzhiyun
1762*4882a593Smuzhiyun /* Get the traffic to flow through the vpaths */
1763*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
1764*4882a593Smuzhiyun vxge_hw_vpath_enable(vdev->vpaths[i].handle);
1765*4882a593Smuzhiyun smp_wmb();
1766*4882a593Smuzhiyun vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
1767*4882a593Smuzhiyun }
1768*4882a593Smuzhiyun
1769*4882a593Smuzhiyun netif_tx_wake_all_queues(vdev->ndev);
1770*4882a593Smuzhiyun }
1771*4882a593Smuzhiyun
1772*4882a593Smuzhiyun /* configure CI */
1773*4882a593Smuzhiyun vxge_config_ci_for_tti_rti(vdev);
1774*4882a593Smuzhiyun
1775*4882a593Smuzhiyun out:
1776*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
1777*4882a593Smuzhiyun "%s:%d Exiting...", __func__, __LINE__);
1778*4882a593Smuzhiyun
1779*4882a593Smuzhiyun /* Indicate reset done */
1780*4882a593Smuzhiyun if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
1781*4882a593Smuzhiyun clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
1782*4882a593Smuzhiyun return ret;
1783*4882a593Smuzhiyun }
1784*4882a593Smuzhiyun
1785*4882a593Smuzhiyun /*
1786*4882a593Smuzhiyun * vxge_reset
1787*4882a593Smuzhiyun * @vdev: pointer to ll device
1788*4882a593Smuzhiyun *
1789*4882a593Smuzhiyun * driver may reset the chip on events of serr, eccerr, etc
1790*4882a593Smuzhiyun */
vxge_reset(struct work_struct * work)1791*4882a593Smuzhiyun static void vxge_reset(struct work_struct *work)
1792*4882a593Smuzhiyun {
1793*4882a593Smuzhiyun struct vxgedev *vdev = container_of(work, struct vxgedev, reset_task);
1794*4882a593Smuzhiyun
1795*4882a593Smuzhiyun if (!netif_running(vdev->ndev))
1796*4882a593Smuzhiyun return;
1797*4882a593Smuzhiyun
1798*4882a593Smuzhiyun do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
1799*4882a593Smuzhiyun }
1800*4882a593Smuzhiyun
1801*4882a593Smuzhiyun /**
1802*4882a593Smuzhiyun * vxge_poll - Receive handler when Receive Polling is used.
1803*4882a593Smuzhiyun * @napi: pointer to the napi structure.
1804*4882a593Smuzhiyun * @budget: Number of packets budgeted to be processed in this iteration.
1805*4882a593Smuzhiyun *
1806*4882a593Smuzhiyun * This function comes into picture only if Receive side is being handled
1807*4882a593Smuzhiyun * through polling (called NAPI in linux). It mostly does what the normal
1808*4882a593Smuzhiyun * Rx interrupt handler does in terms of descriptor and packet processing
1809*4882a593Smuzhiyun * but not in an interrupt context. Also it will process a specified number
1810*4882a593Smuzhiyun * of packets at most in one iteration. This value is passed down by the
1811*4882a593Smuzhiyun * kernel as the function argument 'budget'.
1812*4882a593Smuzhiyun */
vxge_poll_msix(struct napi_struct * napi,int budget)1813*4882a593Smuzhiyun static int vxge_poll_msix(struct napi_struct *napi, int budget)
1814*4882a593Smuzhiyun {
1815*4882a593Smuzhiyun struct vxge_ring *ring = container_of(napi, struct vxge_ring, napi);
1816*4882a593Smuzhiyun int pkts_processed;
1817*4882a593Smuzhiyun int budget_org = budget;
1818*4882a593Smuzhiyun
1819*4882a593Smuzhiyun ring->budget = budget;
1820*4882a593Smuzhiyun ring->pkts_processed = 0;
1821*4882a593Smuzhiyun vxge_hw_vpath_poll_rx(ring->handle);
1822*4882a593Smuzhiyun pkts_processed = ring->pkts_processed;
1823*4882a593Smuzhiyun
1824*4882a593Smuzhiyun if (pkts_processed < budget_org) {
1825*4882a593Smuzhiyun napi_complete_done(napi, pkts_processed);
1826*4882a593Smuzhiyun
1827*4882a593Smuzhiyun /* Re enable the Rx interrupts for the vpath */
1828*4882a593Smuzhiyun vxge_hw_channel_msix_unmask(
1829*4882a593Smuzhiyun (struct __vxge_hw_channel *)ring->handle,
1830*4882a593Smuzhiyun ring->rx_vector_no);
1831*4882a593Smuzhiyun }
1832*4882a593Smuzhiyun
1833*4882a593Smuzhiyun /* We are copying and returning the local variable, in case if after
1834*4882a593Smuzhiyun * clearing the msix interrupt above, if the interrupt fires right
1835*4882a593Smuzhiyun * away which can preempt this NAPI thread */
1836*4882a593Smuzhiyun return pkts_processed;
1837*4882a593Smuzhiyun }
1838*4882a593Smuzhiyun
vxge_poll_inta(struct napi_struct * napi,int budget)1839*4882a593Smuzhiyun static int vxge_poll_inta(struct napi_struct *napi, int budget)
1840*4882a593Smuzhiyun {
1841*4882a593Smuzhiyun struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
1842*4882a593Smuzhiyun int pkts_processed = 0;
1843*4882a593Smuzhiyun int i;
1844*4882a593Smuzhiyun int budget_org = budget;
1845*4882a593Smuzhiyun struct vxge_ring *ring;
1846*4882a593Smuzhiyun
1847*4882a593Smuzhiyun struct __vxge_hw_device *hldev = pci_get_drvdata(vdev->pdev);
1848*4882a593Smuzhiyun
1849*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
1850*4882a593Smuzhiyun ring = &vdev->vpaths[i].ring;
1851*4882a593Smuzhiyun ring->budget = budget;
1852*4882a593Smuzhiyun ring->pkts_processed = 0;
1853*4882a593Smuzhiyun vxge_hw_vpath_poll_rx(ring->handle);
1854*4882a593Smuzhiyun pkts_processed += ring->pkts_processed;
1855*4882a593Smuzhiyun budget -= ring->pkts_processed;
1856*4882a593Smuzhiyun if (budget <= 0)
1857*4882a593Smuzhiyun break;
1858*4882a593Smuzhiyun }
1859*4882a593Smuzhiyun
1860*4882a593Smuzhiyun VXGE_COMPLETE_ALL_TX(vdev);
1861*4882a593Smuzhiyun
1862*4882a593Smuzhiyun if (pkts_processed < budget_org) {
1863*4882a593Smuzhiyun napi_complete_done(napi, pkts_processed);
1864*4882a593Smuzhiyun /* Re enable the Rx interrupts for the ring */
1865*4882a593Smuzhiyun vxge_hw_device_unmask_all(hldev);
1866*4882a593Smuzhiyun vxge_hw_device_flush_io(hldev);
1867*4882a593Smuzhiyun }
1868*4882a593Smuzhiyun
1869*4882a593Smuzhiyun return pkts_processed;
1870*4882a593Smuzhiyun }
1871*4882a593Smuzhiyun
1872*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
1873*4882a593Smuzhiyun /**
1874*4882a593Smuzhiyun * vxge_netpoll - netpoll event handler entry point
1875*4882a593Smuzhiyun * @dev : pointer to the device structure.
1876*4882a593Smuzhiyun * Description:
1877*4882a593Smuzhiyun * This function will be called by upper layer to check for events on the
1878*4882a593Smuzhiyun * interface in situations where interrupts are disabled. It is used for
1879*4882a593Smuzhiyun * specific in-kernel networking tasks, such as remote consoles and kernel
1880*4882a593Smuzhiyun * debugging over the network (example netdump in RedHat).
1881*4882a593Smuzhiyun */
vxge_netpoll(struct net_device * dev)1882*4882a593Smuzhiyun static void vxge_netpoll(struct net_device *dev)
1883*4882a593Smuzhiyun {
1884*4882a593Smuzhiyun struct vxgedev *vdev = netdev_priv(dev);
1885*4882a593Smuzhiyun struct pci_dev *pdev = vdev->pdev;
1886*4882a593Smuzhiyun struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
1887*4882a593Smuzhiyun const int irq = pdev->irq;
1888*4882a593Smuzhiyun
1889*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1890*4882a593Smuzhiyun
1891*4882a593Smuzhiyun if (pci_channel_offline(pdev))
1892*4882a593Smuzhiyun return;
1893*4882a593Smuzhiyun
1894*4882a593Smuzhiyun disable_irq(irq);
1895*4882a593Smuzhiyun vxge_hw_device_clear_tx_rx(hldev);
1896*4882a593Smuzhiyun
1897*4882a593Smuzhiyun vxge_hw_device_clear_tx_rx(hldev);
1898*4882a593Smuzhiyun VXGE_COMPLETE_ALL_RX(vdev);
1899*4882a593Smuzhiyun VXGE_COMPLETE_ALL_TX(vdev);
1900*4882a593Smuzhiyun
1901*4882a593Smuzhiyun enable_irq(irq);
1902*4882a593Smuzhiyun
1903*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
1904*4882a593Smuzhiyun "%s:%d Exiting...", __func__, __LINE__);
1905*4882a593Smuzhiyun }
1906*4882a593Smuzhiyun #endif
1907*4882a593Smuzhiyun
1908*4882a593Smuzhiyun /* RTH configuration */
vxge_rth_configure(struct vxgedev * vdev)1909*4882a593Smuzhiyun static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
1910*4882a593Smuzhiyun {
1911*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
1912*4882a593Smuzhiyun struct vxge_hw_rth_hash_types hash_types;
1913*4882a593Smuzhiyun u8 itable[256] = {0}; /* indirection table */
1914*4882a593Smuzhiyun u8 mtable[256] = {0}; /* CPU to vpath mapping */
1915*4882a593Smuzhiyun int index;
1916*4882a593Smuzhiyun
1917*4882a593Smuzhiyun /*
1918*4882a593Smuzhiyun * Filling
1919*4882a593Smuzhiyun * - itable with bucket numbers
1920*4882a593Smuzhiyun * - mtable with bucket-to-vpath mapping
1921*4882a593Smuzhiyun */
1922*4882a593Smuzhiyun for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
1923*4882a593Smuzhiyun itable[index] = index;
1924*4882a593Smuzhiyun mtable[index] = index % vdev->no_of_vpath;
1925*4882a593Smuzhiyun }
1926*4882a593Smuzhiyun
1927*4882a593Smuzhiyun /* set indirection table, bucket-to-vpath mapping */
1928*4882a593Smuzhiyun status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
1929*4882a593Smuzhiyun vdev->no_of_vpath,
1930*4882a593Smuzhiyun mtable, itable,
1931*4882a593Smuzhiyun vdev->config.rth_bkt_sz);
1932*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
1933*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1934*4882a593Smuzhiyun "RTH indirection table configuration failed "
1935*4882a593Smuzhiyun "for vpath:%d", vdev->vpaths[0].device_id);
1936*4882a593Smuzhiyun return status;
1937*4882a593Smuzhiyun }
1938*4882a593Smuzhiyun
1939*4882a593Smuzhiyun /* Fill RTH hash types */
1940*4882a593Smuzhiyun hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
1941*4882a593Smuzhiyun hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
1942*4882a593Smuzhiyun hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
1943*4882a593Smuzhiyun hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
1944*4882a593Smuzhiyun hash_types.hash_type_tcpipv6ex_en =
1945*4882a593Smuzhiyun vdev->config.rth_hash_type_tcpipv6ex;
1946*4882a593Smuzhiyun hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
1947*4882a593Smuzhiyun
1948*4882a593Smuzhiyun /*
1949*4882a593Smuzhiyun * Because the itable_set() method uses the active_table field
1950*4882a593Smuzhiyun * for the target virtual path the RTH config should be updated
1951*4882a593Smuzhiyun * for all VPATHs. The h/w only uses the lowest numbered VPATH
1952*4882a593Smuzhiyun * when steering frames.
1953*4882a593Smuzhiyun */
1954*4882a593Smuzhiyun for (index = 0; index < vdev->no_of_vpath; index++) {
1955*4882a593Smuzhiyun status = vxge_hw_vpath_rts_rth_set(
1956*4882a593Smuzhiyun vdev->vpaths[index].handle,
1957*4882a593Smuzhiyun vdev->config.rth_algorithm,
1958*4882a593Smuzhiyun &hash_types,
1959*4882a593Smuzhiyun vdev->config.rth_bkt_sz);
1960*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
1961*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1962*4882a593Smuzhiyun "RTH configuration failed for vpath:%d",
1963*4882a593Smuzhiyun vdev->vpaths[index].device_id);
1964*4882a593Smuzhiyun return status;
1965*4882a593Smuzhiyun }
1966*4882a593Smuzhiyun }
1967*4882a593Smuzhiyun
1968*4882a593Smuzhiyun return status;
1969*4882a593Smuzhiyun }
1970*4882a593Smuzhiyun
1971*4882a593Smuzhiyun /* reset vpaths */
vxge_reset_all_vpaths(struct vxgedev * vdev)1972*4882a593Smuzhiyun static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
1973*4882a593Smuzhiyun {
1974*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
1975*4882a593Smuzhiyun struct vxge_vpath *vpath;
1976*4882a593Smuzhiyun int i;
1977*4882a593Smuzhiyun
1978*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
1979*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
1980*4882a593Smuzhiyun if (vpath->handle) {
1981*4882a593Smuzhiyun if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
1982*4882a593Smuzhiyun if (is_vxge_card_up(vdev) &&
1983*4882a593Smuzhiyun vxge_hw_vpath_recover_from_reset(
1984*4882a593Smuzhiyun vpath->handle) != VXGE_HW_OK) {
1985*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1986*4882a593Smuzhiyun "vxge_hw_vpath_recover_"
1987*4882a593Smuzhiyun "from_reset failed for vpath: "
1988*4882a593Smuzhiyun "%d", i);
1989*4882a593Smuzhiyun return status;
1990*4882a593Smuzhiyun }
1991*4882a593Smuzhiyun } else {
1992*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
1993*4882a593Smuzhiyun "vxge_hw_vpath_reset failed for "
1994*4882a593Smuzhiyun "vpath:%d", i);
1995*4882a593Smuzhiyun return status;
1996*4882a593Smuzhiyun }
1997*4882a593Smuzhiyun }
1998*4882a593Smuzhiyun }
1999*4882a593Smuzhiyun
2000*4882a593Smuzhiyun return status;
2001*4882a593Smuzhiyun }
2002*4882a593Smuzhiyun
2003*4882a593Smuzhiyun /* close vpaths */
vxge_close_vpaths(struct vxgedev * vdev,int index)2004*4882a593Smuzhiyun static void vxge_close_vpaths(struct vxgedev *vdev, int index)
2005*4882a593Smuzhiyun {
2006*4882a593Smuzhiyun struct vxge_vpath *vpath;
2007*4882a593Smuzhiyun int i;
2008*4882a593Smuzhiyun
2009*4882a593Smuzhiyun for (i = index; i < vdev->no_of_vpath; i++) {
2010*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
2011*4882a593Smuzhiyun
2012*4882a593Smuzhiyun if (vpath->handle && vpath->is_open) {
2013*4882a593Smuzhiyun vxge_hw_vpath_close(vpath->handle);
2014*4882a593Smuzhiyun vdev->stats.vpaths_open--;
2015*4882a593Smuzhiyun }
2016*4882a593Smuzhiyun vpath->is_open = 0;
2017*4882a593Smuzhiyun vpath->handle = NULL;
2018*4882a593Smuzhiyun }
2019*4882a593Smuzhiyun }
2020*4882a593Smuzhiyun
2021*4882a593Smuzhiyun /* open vpaths */
vxge_open_vpaths(struct vxgedev * vdev)2022*4882a593Smuzhiyun static int vxge_open_vpaths(struct vxgedev *vdev)
2023*4882a593Smuzhiyun {
2024*4882a593Smuzhiyun struct vxge_hw_vpath_attr attr;
2025*4882a593Smuzhiyun enum vxge_hw_status status;
2026*4882a593Smuzhiyun struct vxge_vpath *vpath;
2027*4882a593Smuzhiyun u32 vp_id = 0;
2028*4882a593Smuzhiyun int i;
2029*4882a593Smuzhiyun
2030*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
2031*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
2032*4882a593Smuzhiyun vxge_assert(vpath->is_configured);
2033*4882a593Smuzhiyun
2034*4882a593Smuzhiyun if (!vdev->titan1) {
2035*4882a593Smuzhiyun struct vxge_hw_vp_config *vcfg;
2036*4882a593Smuzhiyun vcfg = &vdev->devh->config.vp_config[vpath->device_id];
2037*4882a593Smuzhiyun
2038*4882a593Smuzhiyun vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
2039*4882a593Smuzhiyun vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
2040*4882a593Smuzhiyun vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
2041*4882a593Smuzhiyun vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
2042*4882a593Smuzhiyun vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
2043*4882a593Smuzhiyun vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
2044*4882a593Smuzhiyun vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
2045*4882a593Smuzhiyun vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
2046*4882a593Smuzhiyun vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
2047*4882a593Smuzhiyun }
2048*4882a593Smuzhiyun
2049*4882a593Smuzhiyun attr.vp_id = vpath->device_id;
2050*4882a593Smuzhiyun attr.fifo_attr.callback = vxge_xmit_compl;
2051*4882a593Smuzhiyun attr.fifo_attr.txdl_term = vxge_tx_term;
2052*4882a593Smuzhiyun attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
2053*4882a593Smuzhiyun attr.fifo_attr.userdata = &vpath->fifo;
2054*4882a593Smuzhiyun
2055*4882a593Smuzhiyun attr.ring_attr.callback = vxge_rx_1b_compl;
2056*4882a593Smuzhiyun attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
2057*4882a593Smuzhiyun attr.ring_attr.rxd_term = vxge_rx_term;
2058*4882a593Smuzhiyun attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
2059*4882a593Smuzhiyun attr.ring_attr.userdata = &vpath->ring;
2060*4882a593Smuzhiyun
2061*4882a593Smuzhiyun vpath->ring.ndev = vdev->ndev;
2062*4882a593Smuzhiyun vpath->ring.pdev = vdev->pdev;
2063*4882a593Smuzhiyun
2064*4882a593Smuzhiyun status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
2065*4882a593Smuzhiyun if (status == VXGE_HW_OK) {
2066*4882a593Smuzhiyun vpath->fifo.handle =
2067*4882a593Smuzhiyun (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
2068*4882a593Smuzhiyun vpath->ring.handle =
2069*4882a593Smuzhiyun (struct __vxge_hw_ring *)attr.ring_attr.userdata;
2070*4882a593Smuzhiyun vpath->fifo.tx_steering_type =
2071*4882a593Smuzhiyun vdev->config.tx_steering_type;
2072*4882a593Smuzhiyun vpath->fifo.ndev = vdev->ndev;
2073*4882a593Smuzhiyun vpath->fifo.pdev = vdev->pdev;
2074*4882a593Smuzhiyun
2075*4882a593Smuzhiyun u64_stats_init(&vpath->fifo.stats.syncp);
2076*4882a593Smuzhiyun u64_stats_init(&vpath->ring.stats.syncp);
2077*4882a593Smuzhiyun
2078*4882a593Smuzhiyun if (vdev->config.tx_steering_type)
2079*4882a593Smuzhiyun vpath->fifo.txq =
2080*4882a593Smuzhiyun netdev_get_tx_queue(vdev->ndev, i);
2081*4882a593Smuzhiyun else
2082*4882a593Smuzhiyun vpath->fifo.txq =
2083*4882a593Smuzhiyun netdev_get_tx_queue(vdev->ndev, 0);
2084*4882a593Smuzhiyun vpath->fifo.indicate_max_pkts =
2085*4882a593Smuzhiyun vdev->config.fifo_indicate_max_pkts;
2086*4882a593Smuzhiyun vpath->fifo.tx_vector_no = 0;
2087*4882a593Smuzhiyun vpath->ring.rx_vector_no = 0;
2088*4882a593Smuzhiyun vpath->ring.rx_hwts = vdev->rx_hwts;
2089*4882a593Smuzhiyun vpath->is_open = 1;
2090*4882a593Smuzhiyun vdev->vp_handles[i] = vpath->handle;
2091*4882a593Smuzhiyun vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
2092*4882a593Smuzhiyun vdev->stats.vpaths_open++;
2093*4882a593Smuzhiyun } else {
2094*4882a593Smuzhiyun vdev->stats.vpath_open_fail++;
2095*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "%s: vpath: %d failed to "
2096*4882a593Smuzhiyun "open with status: %d",
2097*4882a593Smuzhiyun vdev->ndev->name, vpath->device_id,
2098*4882a593Smuzhiyun status);
2099*4882a593Smuzhiyun vxge_close_vpaths(vdev, 0);
2100*4882a593Smuzhiyun return -EPERM;
2101*4882a593Smuzhiyun }
2102*4882a593Smuzhiyun
2103*4882a593Smuzhiyun vp_id = vpath->handle->vpath->vp_id;
2104*4882a593Smuzhiyun vdev->vpaths_deployed |= vxge_mBIT(vp_id);
2105*4882a593Smuzhiyun }
2106*4882a593Smuzhiyun
2107*4882a593Smuzhiyun return VXGE_HW_OK;
2108*4882a593Smuzhiyun }
2109*4882a593Smuzhiyun
2110*4882a593Smuzhiyun /**
2111*4882a593Smuzhiyun * adaptive_coalesce_tx_interrupts - Changes the interrupt coalescing
2112*4882a593Smuzhiyun * if the interrupts are not within a range
2113*4882a593Smuzhiyun * @fifo: pointer to transmit fifo structure
2114*4882a593Smuzhiyun * Description: The function changes boundary timer and restriction timer
2115*4882a593Smuzhiyun * value depends on the traffic
2116*4882a593Smuzhiyun * Return Value: None
2117*4882a593Smuzhiyun */
adaptive_coalesce_tx_interrupts(struct vxge_fifo * fifo)2118*4882a593Smuzhiyun static void adaptive_coalesce_tx_interrupts(struct vxge_fifo *fifo)
2119*4882a593Smuzhiyun {
2120*4882a593Smuzhiyun fifo->interrupt_count++;
2121*4882a593Smuzhiyun if (time_before(fifo->jiffies + HZ / 100, jiffies)) {
2122*4882a593Smuzhiyun struct __vxge_hw_fifo *hw_fifo = fifo->handle;
2123*4882a593Smuzhiyun
2124*4882a593Smuzhiyun fifo->jiffies = jiffies;
2125*4882a593Smuzhiyun if (fifo->interrupt_count > VXGE_T1A_MAX_TX_INTERRUPT_COUNT &&
2126*4882a593Smuzhiyun hw_fifo->rtimer != VXGE_TTI_RTIMER_ADAPT_VAL) {
2127*4882a593Smuzhiyun hw_fifo->rtimer = VXGE_TTI_RTIMER_ADAPT_VAL;
2128*4882a593Smuzhiyun vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2129*4882a593Smuzhiyun } else if (hw_fifo->rtimer != 0) {
2130*4882a593Smuzhiyun hw_fifo->rtimer = 0;
2131*4882a593Smuzhiyun vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2132*4882a593Smuzhiyun }
2133*4882a593Smuzhiyun fifo->interrupt_count = 0;
2134*4882a593Smuzhiyun }
2135*4882a593Smuzhiyun }
2136*4882a593Smuzhiyun
2137*4882a593Smuzhiyun /**
2138*4882a593Smuzhiyun * adaptive_coalesce_rx_interrupts - Changes the interrupt coalescing
2139*4882a593Smuzhiyun * if the interrupts are not within a range
2140*4882a593Smuzhiyun * @ring: pointer to receive ring structure
2141*4882a593Smuzhiyun * Description: The function increases of decreases the packet counts within
2142*4882a593Smuzhiyun * the ranges of traffic utilization, if the interrupts due to this ring are
2143*4882a593Smuzhiyun * not within a fixed range.
2144*4882a593Smuzhiyun * Return Value: Nothing
2145*4882a593Smuzhiyun */
adaptive_coalesce_rx_interrupts(struct vxge_ring * ring)2146*4882a593Smuzhiyun static void adaptive_coalesce_rx_interrupts(struct vxge_ring *ring)
2147*4882a593Smuzhiyun {
2148*4882a593Smuzhiyun ring->interrupt_count++;
2149*4882a593Smuzhiyun if (time_before(ring->jiffies + HZ / 100, jiffies)) {
2150*4882a593Smuzhiyun struct __vxge_hw_ring *hw_ring = ring->handle;
2151*4882a593Smuzhiyun
2152*4882a593Smuzhiyun ring->jiffies = jiffies;
2153*4882a593Smuzhiyun if (ring->interrupt_count > VXGE_T1A_MAX_INTERRUPT_COUNT &&
2154*4882a593Smuzhiyun hw_ring->rtimer != VXGE_RTI_RTIMER_ADAPT_VAL) {
2155*4882a593Smuzhiyun hw_ring->rtimer = VXGE_RTI_RTIMER_ADAPT_VAL;
2156*4882a593Smuzhiyun vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2157*4882a593Smuzhiyun } else if (hw_ring->rtimer != 0) {
2158*4882a593Smuzhiyun hw_ring->rtimer = 0;
2159*4882a593Smuzhiyun vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2160*4882a593Smuzhiyun }
2161*4882a593Smuzhiyun ring->interrupt_count = 0;
2162*4882a593Smuzhiyun }
2163*4882a593Smuzhiyun }
2164*4882a593Smuzhiyun
2165*4882a593Smuzhiyun /*
2166*4882a593Smuzhiyun * vxge_isr_napi
2167*4882a593Smuzhiyun * @irq: the irq of the device.
2168*4882a593Smuzhiyun * @dev_id: a void pointer to the hldev structure of the Titan device
2169*4882a593Smuzhiyun * @ptregs: pointer to the registers pushed on the stack.
2170*4882a593Smuzhiyun *
2171*4882a593Smuzhiyun * This function is the ISR handler of the device when napi is enabled. It
2172*4882a593Smuzhiyun * identifies the reason for the interrupt and calls the relevant service
2173*4882a593Smuzhiyun * routines.
2174*4882a593Smuzhiyun */
vxge_isr_napi(int irq,void * dev_id)2175*4882a593Smuzhiyun static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
2176*4882a593Smuzhiyun {
2177*4882a593Smuzhiyun struct __vxge_hw_device *hldev;
2178*4882a593Smuzhiyun u64 reason;
2179*4882a593Smuzhiyun enum vxge_hw_status status;
2180*4882a593Smuzhiyun struct vxgedev *vdev = (struct vxgedev *)dev_id;
2181*4882a593Smuzhiyun
2182*4882a593Smuzhiyun vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
2183*4882a593Smuzhiyun
2184*4882a593Smuzhiyun hldev = pci_get_drvdata(vdev->pdev);
2185*4882a593Smuzhiyun
2186*4882a593Smuzhiyun if (pci_channel_offline(vdev->pdev))
2187*4882a593Smuzhiyun return IRQ_NONE;
2188*4882a593Smuzhiyun
2189*4882a593Smuzhiyun if (unlikely(!is_vxge_card_up(vdev)))
2190*4882a593Smuzhiyun return IRQ_HANDLED;
2191*4882a593Smuzhiyun
2192*4882a593Smuzhiyun status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode, &reason);
2193*4882a593Smuzhiyun if (status == VXGE_HW_OK) {
2194*4882a593Smuzhiyun vxge_hw_device_mask_all(hldev);
2195*4882a593Smuzhiyun
2196*4882a593Smuzhiyun if (reason &
2197*4882a593Smuzhiyun VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
2198*4882a593Smuzhiyun vdev->vpaths_deployed >>
2199*4882a593Smuzhiyun (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
2200*4882a593Smuzhiyun
2201*4882a593Smuzhiyun vxge_hw_device_clear_tx_rx(hldev);
2202*4882a593Smuzhiyun napi_schedule(&vdev->napi);
2203*4882a593Smuzhiyun vxge_debug_intr(VXGE_TRACE,
2204*4882a593Smuzhiyun "%s:%d Exiting...", __func__, __LINE__);
2205*4882a593Smuzhiyun return IRQ_HANDLED;
2206*4882a593Smuzhiyun } else
2207*4882a593Smuzhiyun vxge_hw_device_unmask_all(hldev);
2208*4882a593Smuzhiyun } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
2209*4882a593Smuzhiyun (status == VXGE_HW_ERR_CRITICAL) ||
2210*4882a593Smuzhiyun (status == VXGE_HW_ERR_FIFO))) {
2211*4882a593Smuzhiyun vxge_hw_device_mask_all(hldev);
2212*4882a593Smuzhiyun vxge_hw_device_flush_io(hldev);
2213*4882a593Smuzhiyun return IRQ_HANDLED;
2214*4882a593Smuzhiyun } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
2215*4882a593Smuzhiyun return IRQ_HANDLED;
2216*4882a593Smuzhiyun
2217*4882a593Smuzhiyun vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
2218*4882a593Smuzhiyun return IRQ_NONE;
2219*4882a593Smuzhiyun }
2220*4882a593Smuzhiyun
vxge_tx_msix_handle(int irq,void * dev_id)2221*4882a593Smuzhiyun static irqreturn_t vxge_tx_msix_handle(int irq, void *dev_id)
2222*4882a593Smuzhiyun {
2223*4882a593Smuzhiyun struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
2224*4882a593Smuzhiyun
2225*4882a593Smuzhiyun adaptive_coalesce_tx_interrupts(fifo);
2226*4882a593Smuzhiyun
2227*4882a593Smuzhiyun vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)fifo->handle,
2228*4882a593Smuzhiyun fifo->tx_vector_no);
2229*4882a593Smuzhiyun
2230*4882a593Smuzhiyun vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)fifo->handle,
2231*4882a593Smuzhiyun fifo->tx_vector_no);
2232*4882a593Smuzhiyun
2233*4882a593Smuzhiyun VXGE_COMPLETE_VPATH_TX(fifo);
2234*4882a593Smuzhiyun
2235*4882a593Smuzhiyun vxge_hw_channel_msix_unmask((struct __vxge_hw_channel *)fifo->handle,
2236*4882a593Smuzhiyun fifo->tx_vector_no);
2237*4882a593Smuzhiyun
2238*4882a593Smuzhiyun return IRQ_HANDLED;
2239*4882a593Smuzhiyun }
2240*4882a593Smuzhiyun
vxge_rx_msix_napi_handle(int irq,void * dev_id)2241*4882a593Smuzhiyun static irqreturn_t vxge_rx_msix_napi_handle(int irq, void *dev_id)
2242*4882a593Smuzhiyun {
2243*4882a593Smuzhiyun struct vxge_ring *ring = (struct vxge_ring *)dev_id;
2244*4882a593Smuzhiyun
2245*4882a593Smuzhiyun adaptive_coalesce_rx_interrupts(ring);
2246*4882a593Smuzhiyun
2247*4882a593Smuzhiyun vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
2248*4882a593Smuzhiyun ring->rx_vector_no);
2249*4882a593Smuzhiyun
2250*4882a593Smuzhiyun vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)ring->handle,
2251*4882a593Smuzhiyun ring->rx_vector_no);
2252*4882a593Smuzhiyun
2253*4882a593Smuzhiyun napi_schedule(&ring->napi);
2254*4882a593Smuzhiyun return IRQ_HANDLED;
2255*4882a593Smuzhiyun }
2256*4882a593Smuzhiyun
2257*4882a593Smuzhiyun static irqreturn_t
vxge_alarm_msix_handle(int irq,void * dev_id)2258*4882a593Smuzhiyun vxge_alarm_msix_handle(int irq, void *dev_id)
2259*4882a593Smuzhiyun {
2260*4882a593Smuzhiyun int i;
2261*4882a593Smuzhiyun enum vxge_hw_status status;
2262*4882a593Smuzhiyun struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
2263*4882a593Smuzhiyun struct vxgedev *vdev = vpath->vdev;
2264*4882a593Smuzhiyun int msix_id = (vpath->handle->vpath->vp_id *
2265*4882a593Smuzhiyun VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
2266*4882a593Smuzhiyun
2267*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
2268*4882a593Smuzhiyun /* Reduce the chance of losing alarm interrupts by masking
2269*4882a593Smuzhiyun * the vector. A pending bit will be set if an alarm is
2270*4882a593Smuzhiyun * generated and on unmask the interrupt will be fired.
2271*4882a593Smuzhiyun */
2272*4882a593Smuzhiyun vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
2273*4882a593Smuzhiyun vxge_hw_vpath_msix_clear(vdev->vpaths[i].handle, msix_id);
2274*4882a593Smuzhiyun
2275*4882a593Smuzhiyun status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
2276*4882a593Smuzhiyun vdev->exec_mode);
2277*4882a593Smuzhiyun if (status == VXGE_HW_OK) {
2278*4882a593Smuzhiyun vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
2279*4882a593Smuzhiyun msix_id);
2280*4882a593Smuzhiyun continue;
2281*4882a593Smuzhiyun }
2282*4882a593Smuzhiyun vxge_debug_intr(VXGE_ERR,
2283*4882a593Smuzhiyun "%s: vxge_hw_vpath_alarm_process failed %x ",
2284*4882a593Smuzhiyun VXGE_DRIVER_NAME, status);
2285*4882a593Smuzhiyun }
2286*4882a593Smuzhiyun return IRQ_HANDLED;
2287*4882a593Smuzhiyun }
2288*4882a593Smuzhiyun
vxge_alloc_msix(struct vxgedev * vdev)2289*4882a593Smuzhiyun static int vxge_alloc_msix(struct vxgedev *vdev)
2290*4882a593Smuzhiyun {
2291*4882a593Smuzhiyun int j, i, ret = 0;
2292*4882a593Smuzhiyun int msix_intr_vect = 0, temp;
2293*4882a593Smuzhiyun vdev->intr_cnt = 0;
2294*4882a593Smuzhiyun
2295*4882a593Smuzhiyun start:
2296*4882a593Smuzhiyun /* Tx/Rx MSIX Vectors count */
2297*4882a593Smuzhiyun vdev->intr_cnt = vdev->no_of_vpath * 2;
2298*4882a593Smuzhiyun
2299*4882a593Smuzhiyun /* Alarm MSIX Vectors count */
2300*4882a593Smuzhiyun vdev->intr_cnt++;
2301*4882a593Smuzhiyun
2302*4882a593Smuzhiyun vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
2303*4882a593Smuzhiyun GFP_KERNEL);
2304*4882a593Smuzhiyun if (!vdev->entries) {
2305*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2306*4882a593Smuzhiyun "%s: memory allocation failed",
2307*4882a593Smuzhiyun VXGE_DRIVER_NAME);
2308*4882a593Smuzhiyun ret = -ENOMEM;
2309*4882a593Smuzhiyun goto alloc_entries_failed;
2310*4882a593Smuzhiyun }
2311*4882a593Smuzhiyun
2312*4882a593Smuzhiyun vdev->vxge_entries = kcalloc(vdev->intr_cnt,
2313*4882a593Smuzhiyun sizeof(struct vxge_msix_entry),
2314*4882a593Smuzhiyun GFP_KERNEL);
2315*4882a593Smuzhiyun if (!vdev->vxge_entries) {
2316*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
2317*4882a593Smuzhiyun VXGE_DRIVER_NAME);
2318*4882a593Smuzhiyun ret = -ENOMEM;
2319*4882a593Smuzhiyun goto alloc_vxge_entries_failed;
2320*4882a593Smuzhiyun }
2321*4882a593Smuzhiyun
2322*4882a593Smuzhiyun for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
2323*4882a593Smuzhiyun
2324*4882a593Smuzhiyun msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
2325*4882a593Smuzhiyun
2326*4882a593Smuzhiyun /* Initialize the fifo vector */
2327*4882a593Smuzhiyun vdev->entries[j].entry = msix_intr_vect;
2328*4882a593Smuzhiyun vdev->vxge_entries[j].entry = msix_intr_vect;
2329*4882a593Smuzhiyun vdev->vxge_entries[j].in_use = 0;
2330*4882a593Smuzhiyun j++;
2331*4882a593Smuzhiyun
2332*4882a593Smuzhiyun /* Initialize the ring vector */
2333*4882a593Smuzhiyun vdev->entries[j].entry = msix_intr_vect + 1;
2334*4882a593Smuzhiyun vdev->vxge_entries[j].entry = msix_intr_vect + 1;
2335*4882a593Smuzhiyun vdev->vxge_entries[j].in_use = 0;
2336*4882a593Smuzhiyun j++;
2337*4882a593Smuzhiyun }
2338*4882a593Smuzhiyun
2339*4882a593Smuzhiyun /* Initialize the alarm vector */
2340*4882a593Smuzhiyun vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
2341*4882a593Smuzhiyun vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
2342*4882a593Smuzhiyun vdev->vxge_entries[j].in_use = 0;
2343*4882a593Smuzhiyun
2344*4882a593Smuzhiyun ret = pci_enable_msix_range(vdev->pdev,
2345*4882a593Smuzhiyun vdev->entries, 3, vdev->intr_cnt);
2346*4882a593Smuzhiyun if (ret < 0) {
2347*4882a593Smuzhiyun ret = -ENODEV;
2348*4882a593Smuzhiyun goto enable_msix_failed;
2349*4882a593Smuzhiyun } else if (ret < vdev->intr_cnt) {
2350*4882a593Smuzhiyun pci_disable_msix(vdev->pdev);
2351*4882a593Smuzhiyun
2352*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2353*4882a593Smuzhiyun "%s: MSI-X enable failed for %d vectors, ret: %d",
2354*4882a593Smuzhiyun VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
2355*4882a593Smuzhiyun if (max_config_vpath != VXGE_USE_DEFAULT) {
2356*4882a593Smuzhiyun ret = -ENODEV;
2357*4882a593Smuzhiyun goto enable_msix_failed;
2358*4882a593Smuzhiyun }
2359*4882a593Smuzhiyun
2360*4882a593Smuzhiyun kfree(vdev->entries);
2361*4882a593Smuzhiyun kfree(vdev->vxge_entries);
2362*4882a593Smuzhiyun vdev->entries = NULL;
2363*4882a593Smuzhiyun vdev->vxge_entries = NULL;
2364*4882a593Smuzhiyun /* Try with less no of vector by reducing no of vpaths count */
2365*4882a593Smuzhiyun temp = (ret - 1)/2;
2366*4882a593Smuzhiyun vxge_close_vpaths(vdev, temp);
2367*4882a593Smuzhiyun vdev->no_of_vpath = temp;
2368*4882a593Smuzhiyun goto start;
2369*4882a593Smuzhiyun }
2370*4882a593Smuzhiyun return 0;
2371*4882a593Smuzhiyun
2372*4882a593Smuzhiyun enable_msix_failed:
2373*4882a593Smuzhiyun kfree(vdev->vxge_entries);
2374*4882a593Smuzhiyun alloc_vxge_entries_failed:
2375*4882a593Smuzhiyun kfree(vdev->entries);
2376*4882a593Smuzhiyun alloc_entries_failed:
2377*4882a593Smuzhiyun return ret;
2378*4882a593Smuzhiyun }
2379*4882a593Smuzhiyun
vxge_enable_msix(struct vxgedev * vdev)2380*4882a593Smuzhiyun static int vxge_enable_msix(struct vxgedev *vdev)
2381*4882a593Smuzhiyun {
2382*4882a593Smuzhiyun
2383*4882a593Smuzhiyun int i, ret = 0;
2384*4882a593Smuzhiyun /* 0 - Tx, 1 - Rx */
2385*4882a593Smuzhiyun int tim_msix_id[4] = {0, 1, 0, 0};
2386*4882a593Smuzhiyun
2387*4882a593Smuzhiyun vdev->intr_cnt = 0;
2388*4882a593Smuzhiyun
2389*4882a593Smuzhiyun /* allocate msix vectors */
2390*4882a593Smuzhiyun ret = vxge_alloc_msix(vdev);
2391*4882a593Smuzhiyun if (!ret) {
2392*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
2393*4882a593Smuzhiyun struct vxge_vpath *vpath = &vdev->vpaths[i];
2394*4882a593Smuzhiyun
2395*4882a593Smuzhiyun /* If fifo or ring are not enabled, the MSIX vector for
2396*4882a593Smuzhiyun * it should be set to 0.
2397*4882a593Smuzhiyun */
2398*4882a593Smuzhiyun vpath->ring.rx_vector_no = (vpath->device_id *
2399*4882a593Smuzhiyun VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
2400*4882a593Smuzhiyun
2401*4882a593Smuzhiyun vpath->fifo.tx_vector_no = (vpath->device_id *
2402*4882a593Smuzhiyun VXGE_HW_VPATH_MSIX_ACTIVE);
2403*4882a593Smuzhiyun
2404*4882a593Smuzhiyun vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
2405*4882a593Smuzhiyun VXGE_ALARM_MSIX_ID);
2406*4882a593Smuzhiyun }
2407*4882a593Smuzhiyun }
2408*4882a593Smuzhiyun
2409*4882a593Smuzhiyun return ret;
2410*4882a593Smuzhiyun }
2411*4882a593Smuzhiyun
vxge_rem_msix_isr(struct vxgedev * vdev)2412*4882a593Smuzhiyun static void vxge_rem_msix_isr(struct vxgedev *vdev)
2413*4882a593Smuzhiyun {
2414*4882a593Smuzhiyun int intr_cnt;
2415*4882a593Smuzhiyun
2416*4882a593Smuzhiyun for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
2417*4882a593Smuzhiyun intr_cnt++) {
2418*4882a593Smuzhiyun if (vdev->vxge_entries[intr_cnt].in_use) {
2419*4882a593Smuzhiyun synchronize_irq(vdev->entries[intr_cnt].vector);
2420*4882a593Smuzhiyun free_irq(vdev->entries[intr_cnt].vector,
2421*4882a593Smuzhiyun vdev->vxge_entries[intr_cnt].arg);
2422*4882a593Smuzhiyun vdev->vxge_entries[intr_cnt].in_use = 0;
2423*4882a593Smuzhiyun }
2424*4882a593Smuzhiyun }
2425*4882a593Smuzhiyun
2426*4882a593Smuzhiyun kfree(vdev->entries);
2427*4882a593Smuzhiyun kfree(vdev->vxge_entries);
2428*4882a593Smuzhiyun vdev->entries = NULL;
2429*4882a593Smuzhiyun vdev->vxge_entries = NULL;
2430*4882a593Smuzhiyun
2431*4882a593Smuzhiyun if (vdev->config.intr_type == MSI_X)
2432*4882a593Smuzhiyun pci_disable_msix(vdev->pdev);
2433*4882a593Smuzhiyun }
2434*4882a593Smuzhiyun
vxge_rem_isr(struct vxgedev * vdev)2435*4882a593Smuzhiyun static void vxge_rem_isr(struct vxgedev *vdev)
2436*4882a593Smuzhiyun {
2437*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_PCI_MSI) &&
2438*4882a593Smuzhiyun vdev->config.intr_type == MSI_X) {
2439*4882a593Smuzhiyun vxge_rem_msix_isr(vdev);
2440*4882a593Smuzhiyun } else if (vdev->config.intr_type == INTA) {
2441*4882a593Smuzhiyun synchronize_irq(vdev->pdev->irq);
2442*4882a593Smuzhiyun free_irq(vdev->pdev->irq, vdev);
2443*4882a593Smuzhiyun }
2444*4882a593Smuzhiyun }
2445*4882a593Smuzhiyun
vxge_add_isr(struct vxgedev * vdev)2446*4882a593Smuzhiyun static int vxge_add_isr(struct vxgedev *vdev)
2447*4882a593Smuzhiyun {
2448*4882a593Smuzhiyun int ret = 0;
2449*4882a593Smuzhiyun int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
2450*4882a593Smuzhiyun int pci_fun = PCI_FUNC(vdev->pdev->devfn);
2451*4882a593Smuzhiyun
2452*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X)
2453*4882a593Smuzhiyun ret = vxge_enable_msix(vdev);
2454*4882a593Smuzhiyun
2455*4882a593Smuzhiyun if (ret) {
2456*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2457*4882a593Smuzhiyun "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
2458*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2459*4882a593Smuzhiyun "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
2460*4882a593Smuzhiyun vdev->config.intr_type = INTA;
2461*4882a593Smuzhiyun }
2462*4882a593Smuzhiyun
2463*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X) {
2464*4882a593Smuzhiyun for (intr_idx = 0;
2465*4882a593Smuzhiyun intr_idx < (vdev->no_of_vpath *
2466*4882a593Smuzhiyun VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
2467*4882a593Smuzhiyun
2468*4882a593Smuzhiyun msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
2469*4882a593Smuzhiyun irq_req = 0;
2470*4882a593Smuzhiyun
2471*4882a593Smuzhiyun switch (msix_idx) {
2472*4882a593Smuzhiyun case 0:
2473*4882a593Smuzhiyun snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
2474*4882a593Smuzhiyun "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
2475*4882a593Smuzhiyun vdev->ndev->name,
2476*4882a593Smuzhiyun vdev->entries[intr_cnt].entry,
2477*4882a593Smuzhiyun pci_fun, vp_idx);
2478*4882a593Smuzhiyun ret = request_irq(
2479*4882a593Smuzhiyun vdev->entries[intr_cnt].vector,
2480*4882a593Smuzhiyun vxge_tx_msix_handle, 0,
2481*4882a593Smuzhiyun vdev->desc[intr_cnt],
2482*4882a593Smuzhiyun &vdev->vpaths[vp_idx].fifo);
2483*4882a593Smuzhiyun vdev->vxge_entries[intr_cnt].arg =
2484*4882a593Smuzhiyun &vdev->vpaths[vp_idx].fifo;
2485*4882a593Smuzhiyun irq_req = 1;
2486*4882a593Smuzhiyun break;
2487*4882a593Smuzhiyun case 1:
2488*4882a593Smuzhiyun snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
2489*4882a593Smuzhiyun "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
2490*4882a593Smuzhiyun vdev->ndev->name,
2491*4882a593Smuzhiyun vdev->entries[intr_cnt].entry,
2492*4882a593Smuzhiyun pci_fun, vp_idx);
2493*4882a593Smuzhiyun ret = request_irq(
2494*4882a593Smuzhiyun vdev->entries[intr_cnt].vector,
2495*4882a593Smuzhiyun vxge_rx_msix_napi_handle, 0,
2496*4882a593Smuzhiyun vdev->desc[intr_cnt],
2497*4882a593Smuzhiyun &vdev->vpaths[vp_idx].ring);
2498*4882a593Smuzhiyun vdev->vxge_entries[intr_cnt].arg =
2499*4882a593Smuzhiyun &vdev->vpaths[vp_idx].ring;
2500*4882a593Smuzhiyun irq_req = 1;
2501*4882a593Smuzhiyun break;
2502*4882a593Smuzhiyun }
2503*4882a593Smuzhiyun
2504*4882a593Smuzhiyun if (ret) {
2505*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2506*4882a593Smuzhiyun "%s: MSIX - %d Registration failed",
2507*4882a593Smuzhiyun vdev->ndev->name, intr_cnt);
2508*4882a593Smuzhiyun vxge_rem_msix_isr(vdev);
2509*4882a593Smuzhiyun vdev->config.intr_type = INTA;
2510*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2511*4882a593Smuzhiyun "%s: Defaulting to INTA",
2512*4882a593Smuzhiyun vdev->ndev->name);
2513*4882a593Smuzhiyun goto INTA_MODE;
2514*4882a593Smuzhiyun }
2515*4882a593Smuzhiyun
2516*4882a593Smuzhiyun if (irq_req) {
2517*4882a593Smuzhiyun /* We requested for this msix interrupt */
2518*4882a593Smuzhiyun vdev->vxge_entries[intr_cnt].in_use = 1;
2519*4882a593Smuzhiyun msix_idx += vdev->vpaths[vp_idx].device_id *
2520*4882a593Smuzhiyun VXGE_HW_VPATH_MSIX_ACTIVE;
2521*4882a593Smuzhiyun vxge_hw_vpath_msix_unmask(
2522*4882a593Smuzhiyun vdev->vpaths[vp_idx].handle,
2523*4882a593Smuzhiyun msix_idx);
2524*4882a593Smuzhiyun intr_cnt++;
2525*4882a593Smuzhiyun }
2526*4882a593Smuzhiyun
2527*4882a593Smuzhiyun /* Point to next vpath handler */
2528*4882a593Smuzhiyun if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
2529*4882a593Smuzhiyun (vp_idx < (vdev->no_of_vpath - 1)))
2530*4882a593Smuzhiyun vp_idx++;
2531*4882a593Smuzhiyun }
2532*4882a593Smuzhiyun
2533*4882a593Smuzhiyun intr_cnt = vdev->no_of_vpath * 2;
2534*4882a593Smuzhiyun snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
2535*4882a593Smuzhiyun "%s:vxge:MSI-X %d - Alarm - fn:%d",
2536*4882a593Smuzhiyun vdev->ndev->name,
2537*4882a593Smuzhiyun vdev->entries[intr_cnt].entry,
2538*4882a593Smuzhiyun pci_fun);
2539*4882a593Smuzhiyun /* For Alarm interrupts */
2540*4882a593Smuzhiyun ret = request_irq(vdev->entries[intr_cnt].vector,
2541*4882a593Smuzhiyun vxge_alarm_msix_handle, 0,
2542*4882a593Smuzhiyun vdev->desc[intr_cnt],
2543*4882a593Smuzhiyun &vdev->vpaths[0]);
2544*4882a593Smuzhiyun if (ret) {
2545*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2546*4882a593Smuzhiyun "%s: MSIX - %d Registration failed",
2547*4882a593Smuzhiyun vdev->ndev->name, intr_cnt);
2548*4882a593Smuzhiyun vxge_rem_msix_isr(vdev);
2549*4882a593Smuzhiyun vdev->config.intr_type = INTA;
2550*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2551*4882a593Smuzhiyun "%s: Defaulting to INTA",
2552*4882a593Smuzhiyun vdev->ndev->name);
2553*4882a593Smuzhiyun goto INTA_MODE;
2554*4882a593Smuzhiyun }
2555*4882a593Smuzhiyun
2556*4882a593Smuzhiyun msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
2557*4882a593Smuzhiyun VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
2558*4882a593Smuzhiyun vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
2559*4882a593Smuzhiyun msix_idx);
2560*4882a593Smuzhiyun vdev->vxge_entries[intr_cnt].in_use = 1;
2561*4882a593Smuzhiyun vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
2562*4882a593Smuzhiyun }
2563*4882a593Smuzhiyun
2564*4882a593Smuzhiyun INTA_MODE:
2565*4882a593Smuzhiyun if (vdev->config.intr_type == INTA) {
2566*4882a593Smuzhiyun snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
2567*4882a593Smuzhiyun "%s:vxge:INTA", vdev->ndev->name);
2568*4882a593Smuzhiyun vxge_hw_device_set_intr_type(vdev->devh,
2569*4882a593Smuzhiyun VXGE_HW_INTR_MODE_IRQLINE);
2570*4882a593Smuzhiyun
2571*4882a593Smuzhiyun vxge_hw_vpath_tti_ci_set(vdev->vpaths[0].fifo.handle);
2572*4882a593Smuzhiyun
2573*4882a593Smuzhiyun ret = request_irq((int) vdev->pdev->irq,
2574*4882a593Smuzhiyun vxge_isr_napi,
2575*4882a593Smuzhiyun IRQF_SHARED, vdev->desc[0], vdev);
2576*4882a593Smuzhiyun if (ret) {
2577*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2578*4882a593Smuzhiyun "%s %s-%d: ISR registration failed",
2579*4882a593Smuzhiyun VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
2580*4882a593Smuzhiyun return -ENODEV;
2581*4882a593Smuzhiyun }
2582*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
2583*4882a593Smuzhiyun "new %s-%d line allocated",
2584*4882a593Smuzhiyun "IRQ", vdev->pdev->irq);
2585*4882a593Smuzhiyun }
2586*4882a593Smuzhiyun
2587*4882a593Smuzhiyun return VXGE_HW_OK;
2588*4882a593Smuzhiyun }
2589*4882a593Smuzhiyun
vxge_poll_vp_reset(struct timer_list * t)2590*4882a593Smuzhiyun static void vxge_poll_vp_reset(struct timer_list *t)
2591*4882a593Smuzhiyun {
2592*4882a593Smuzhiyun struct vxgedev *vdev = from_timer(vdev, t, vp_reset_timer);
2593*4882a593Smuzhiyun int i, j = 0;
2594*4882a593Smuzhiyun
2595*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
2596*4882a593Smuzhiyun if (test_bit(i, &vdev->vp_reset)) {
2597*4882a593Smuzhiyun vxge_reset_vpath(vdev, i);
2598*4882a593Smuzhiyun j++;
2599*4882a593Smuzhiyun }
2600*4882a593Smuzhiyun }
2601*4882a593Smuzhiyun if (j && (vdev->config.intr_type != MSI_X)) {
2602*4882a593Smuzhiyun vxge_hw_device_unmask_all(vdev->devh);
2603*4882a593Smuzhiyun vxge_hw_device_flush_io(vdev->devh);
2604*4882a593Smuzhiyun }
2605*4882a593Smuzhiyun
2606*4882a593Smuzhiyun mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
2607*4882a593Smuzhiyun }
2608*4882a593Smuzhiyun
vxge_poll_vp_lockup(struct timer_list * t)2609*4882a593Smuzhiyun static void vxge_poll_vp_lockup(struct timer_list *t)
2610*4882a593Smuzhiyun {
2611*4882a593Smuzhiyun struct vxgedev *vdev = from_timer(vdev, t, vp_lockup_timer);
2612*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
2613*4882a593Smuzhiyun struct vxge_vpath *vpath;
2614*4882a593Smuzhiyun struct vxge_ring *ring;
2615*4882a593Smuzhiyun int i;
2616*4882a593Smuzhiyun unsigned long rx_frms;
2617*4882a593Smuzhiyun
2618*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
2619*4882a593Smuzhiyun ring = &vdev->vpaths[i].ring;
2620*4882a593Smuzhiyun
2621*4882a593Smuzhiyun /* Truncated to machine word size number of frames */
2622*4882a593Smuzhiyun rx_frms = READ_ONCE(ring->stats.rx_frms);
2623*4882a593Smuzhiyun
2624*4882a593Smuzhiyun /* Did this vpath received any packets */
2625*4882a593Smuzhiyun if (ring->stats.prev_rx_frms == rx_frms) {
2626*4882a593Smuzhiyun status = vxge_hw_vpath_check_leak(ring->handle);
2627*4882a593Smuzhiyun
2628*4882a593Smuzhiyun /* Did it received any packets last time */
2629*4882a593Smuzhiyun if ((VXGE_HW_FAIL == status) &&
2630*4882a593Smuzhiyun (VXGE_HW_FAIL == ring->last_status)) {
2631*4882a593Smuzhiyun
2632*4882a593Smuzhiyun /* schedule vpath reset */
2633*4882a593Smuzhiyun if (!test_and_set_bit(i, &vdev->vp_reset)) {
2634*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
2635*4882a593Smuzhiyun
2636*4882a593Smuzhiyun /* disable interrupts for this vpath */
2637*4882a593Smuzhiyun vxge_vpath_intr_disable(vdev, i);
2638*4882a593Smuzhiyun
2639*4882a593Smuzhiyun /* stop the queue for this vpath */
2640*4882a593Smuzhiyun netif_tx_stop_queue(vpath->fifo.txq);
2641*4882a593Smuzhiyun continue;
2642*4882a593Smuzhiyun }
2643*4882a593Smuzhiyun }
2644*4882a593Smuzhiyun }
2645*4882a593Smuzhiyun ring->stats.prev_rx_frms = rx_frms;
2646*4882a593Smuzhiyun ring->last_status = status;
2647*4882a593Smuzhiyun }
2648*4882a593Smuzhiyun
2649*4882a593Smuzhiyun /* Check every 1 milli second */
2650*4882a593Smuzhiyun mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
2651*4882a593Smuzhiyun }
2652*4882a593Smuzhiyun
vxge_fix_features(struct net_device * dev,netdev_features_t features)2653*4882a593Smuzhiyun static netdev_features_t vxge_fix_features(struct net_device *dev,
2654*4882a593Smuzhiyun netdev_features_t features)
2655*4882a593Smuzhiyun {
2656*4882a593Smuzhiyun netdev_features_t changed = dev->features ^ features;
2657*4882a593Smuzhiyun
2658*4882a593Smuzhiyun /* Enabling RTH requires some of the logic in vxge_device_register and a
2659*4882a593Smuzhiyun * vpath reset. Due to these restrictions, only allow modification
2660*4882a593Smuzhiyun * while the interface is down.
2661*4882a593Smuzhiyun */
2662*4882a593Smuzhiyun if ((changed & NETIF_F_RXHASH) && netif_running(dev))
2663*4882a593Smuzhiyun features ^= NETIF_F_RXHASH;
2664*4882a593Smuzhiyun
2665*4882a593Smuzhiyun return features;
2666*4882a593Smuzhiyun }
2667*4882a593Smuzhiyun
vxge_set_features(struct net_device * dev,netdev_features_t features)2668*4882a593Smuzhiyun static int vxge_set_features(struct net_device *dev, netdev_features_t features)
2669*4882a593Smuzhiyun {
2670*4882a593Smuzhiyun struct vxgedev *vdev = netdev_priv(dev);
2671*4882a593Smuzhiyun netdev_features_t changed = dev->features ^ features;
2672*4882a593Smuzhiyun
2673*4882a593Smuzhiyun if (!(changed & NETIF_F_RXHASH))
2674*4882a593Smuzhiyun return 0;
2675*4882a593Smuzhiyun
2676*4882a593Smuzhiyun /* !netif_running() ensured by vxge_fix_features() */
2677*4882a593Smuzhiyun
2678*4882a593Smuzhiyun vdev->devh->config.rth_en = !!(features & NETIF_F_RXHASH);
2679*4882a593Smuzhiyun if (vxge_reset_all_vpaths(vdev) != VXGE_HW_OK) {
2680*4882a593Smuzhiyun dev->features = features ^ NETIF_F_RXHASH;
2681*4882a593Smuzhiyun vdev->devh->config.rth_en = !!(dev->features & NETIF_F_RXHASH);
2682*4882a593Smuzhiyun return -EIO;
2683*4882a593Smuzhiyun }
2684*4882a593Smuzhiyun
2685*4882a593Smuzhiyun return 0;
2686*4882a593Smuzhiyun }
2687*4882a593Smuzhiyun
2688*4882a593Smuzhiyun /**
2689*4882a593Smuzhiyun * vxge_open
2690*4882a593Smuzhiyun * @dev: pointer to the device structure.
2691*4882a593Smuzhiyun *
2692*4882a593Smuzhiyun * This function is the open entry point of the driver. It mainly calls a
2693*4882a593Smuzhiyun * function to allocate Rx buffers and inserts them into the buffer
2694*4882a593Smuzhiyun * descriptors and then enables the Rx part of the NIC.
2695*4882a593Smuzhiyun * Return value: '0' on success and an appropriate (-)ve integer as
2696*4882a593Smuzhiyun * defined in errno.h file on failure.
2697*4882a593Smuzhiyun */
vxge_open(struct net_device * dev)2698*4882a593Smuzhiyun static int vxge_open(struct net_device *dev)
2699*4882a593Smuzhiyun {
2700*4882a593Smuzhiyun enum vxge_hw_status status;
2701*4882a593Smuzhiyun struct vxgedev *vdev;
2702*4882a593Smuzhiyun struct __vxge_hw_device *hldev;
2703*4882a593Smuzhiyun struct vxge_vpath *vpath;
2704*4882a593Smuzhiyun int ret = 0;
2705*4882a593Smuzhiyun int i;
2706*4882a593Smuzhiyun u64 val64;
2707*4882a593Smuzhiyun
2708*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
2709*4882a593Smuzhiyun "%s: %s:%d", dev->name, __func__, __LINE__);
2710*4882a593Smuzhiyun
2711*4882a593Smuzhiyun vdev = netdev_priv(dev);
2712*4882a593Smuzhiyun hldev = pci_get_drvdata(vdev->pdev);
2713*4882a593Smuzhiyun
2714*4882a593Smuzhiyun /* make sure you have link off by default every time Nic is
2715*4882a593Smuzhiyun * initialized */
2716*4882a593Smuzhiyun netif_carrier_off(dev);
2717*4882a593Smuzhiyun
2718*4882a593Smuzhiyun /* Open VPATHs */
2719*4882a593Smuzhiyun status = vxge_open_vpaths(vdev);
2720*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
2721*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2722*4882a593Smuzhiyun "%s: fatal: Vpath open failed", vdev->ndev->name);
2723*4882a593Smuzhiyun ret = -EPERM;
2724*4882a593Smuzhiyun goto out0;
2725*4882a593Smuzhiyun }
2726*4882a593Smuzhiyun
2727*4882a593Smuzhiyun vdev->mtu = dev->mtu;
2728*4882a593Smuzhiyun
2729*4882a593Smuzhiyun status = vxge_add_isr(vdev);
2730*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
2731*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2732*4882a593Smuzhiyun "%s: fatal: ISR add failed", dev->name);
2733*4882a593Smuzhiyun ret = -EPERM;
2734*4882a593Smuzhiyun goto out1;
2735*4882a593Smuzhiyun }
2736*4882a593Smuzhiyun
2737*4882a593Smuzhiyun if (vdev->config.intr_type != MSI_X) {
2738*4882a593Smuzhiyun netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
2739*4882a593Smuzhiyun vdev->config.napi_weight);
2740*4882a593Smuzhiyun napi_enable(&vdev->napi);
2741*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
2742*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
2743*4882a593Smuzhiyun vpath->ring.napi_p = &vdev->napi;
2744*4882a593Smuzhiyun }
2745*4882a593Smuzhiyun } else {
2746*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
2747*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
2748*4882a593Smuzhiyun netif_napi_add(dev, &vpath->ring.napi,
2749*4882a593Smuzhiyun vxge_poll_msix, vdev->config.napi_weight);
2750*4882a593Smuzhiyun napi_enable(&vpath->ring.napi);
2751*4882a593Smuzhiyun vpath->ring.napi_p = &vpath->ring.napi;
2752*4882a593Smuzhiyun }
2753*4882a593Smuzhiyun }
2754*4882a593Smuzhiyun
2755*4882a593Smuzhiyun /* configure RTH */
2756*4882a593Smuzhiyun if (vdev->config.rth_steering) {
2757*4882a593Smuzhiyun status = vxge_rth_configure(vdev);
2758*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
2759*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2760*4882a593Smuzhiyun "%s: fatal: RTH configuration failed",
2761*4882a593Smuzhiyun dev->name);
2762*4882a593Smuzhiyun ret = -EPERM;
2763*4882a593Smuzhiyun goto out2;
2764*4882a593Smuzhiyun }
2765*4882a593Smuzhiyun }
2766*4882a593Smuzhiyun printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
2767*4882a593Smuzhiyun hldev->config.rth_en ? "enabled" : "disabled");
2768*4882a593Smuzhiyun
2769*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
2770*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
2771*4882a593Smuzhiyun
2772*4882a593Smuzhiyun /* set initial mtu before enabling the device */
2773*4882a593Smuzhiyun status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
2774*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
2775*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2776*4882a593Smuzhiyun "%s: fatal: can not set new MTU", dev->name);
2777*4882a593Smuzhiyun ret = -EPERM;
2778*4882a593Smuzhiyun goto out2;
2779*4882a593Smuzhiyun }
2780*4882a593Smuzhiyun }
2781*4882a593Smuzhiyun
2782*4882a593Smuzhiyun VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
2783*4882a593Smuzhiyun vxge_debug_init(vdev->level_trace,
2784*4882a593Smuzhiyun "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
2785*4882a593Smuzhiyun VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
2786*4882a593Smuzhiyun
2787*4882a593Smuzhiyun /* Restore the DA, VID table and also multicast and promiscuous mode
2788*4882a593Smuzhiyun * states
2789*4882a593Smuzhiyun */
2790*4882a593Smuzhiyun if (vdev->all_multi_flg) {
2791*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
2792*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
2793*4882a593Smuzhiyun vxge_restore_vpath_mac_addr(vpath);
2794*4882a593Smuzhiyun vxge_restore_vpath_vid_table(vpath);
2795*4882a593Smuzhiyun
2796*4882a593Smuzhiyun status = vxge_hw_vpath_mcast_enable(vpath->handle);
2797*4882a593Smuzhiyun if (status != VXGE_HW_OK)
2798*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2799*4882a593Smuzhiyun "%s:%d Enabling multicast failed",
2800*4882a593Smuzhiyun __func__, __LINE__);
2801*4882a593Smuzhiyun }
2802*4882a593Smuzhiyun }
2803*4882a593Smuzhiyun
2804*4882a593Smuzhiyun /* Enable vpath to sniff all unicast/multicast traffic that not
2805*4882a593Smuzhiyun * addressed to them. We allow promiscuous mode for PF only
2806*4882a593Smuzhiyun */
2807*4882a593Smuzhiyun
2808*4882a593Smuzhiyun val64 = 0;
2809*4882a593Smuzhiyun for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
2810*4882a593Smuzhiyun val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
2811*4882a593Smuzhiyun
2812*4882a593Smuzhiyun vxge_hw_mgmt_reg_write(vdev->devh,
2813*4882a593Smuzhiyun vxge_hw_mgmt_reg_type_mrpcim,
2814*4882a593Smuzhiyun 0,
2815*4882a593Smuzhiyun (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2816*4882a593Smuzhiyun rxmac_authorize_all_addr),
2817*4882a593Smuzhiyun val64);
2818*4882a593Smuzhiyun
2819*4882a593Smuzhiyun vxge_hw_mgmt_reg_write(vdev->devh,
2820*4882a593Smuzhiyun vxge_hw_mgmt_reg_type_mrpcim,
2821*4882a593Smuzhiyun 0,
2822*4882a593Smuzhiyun (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2823*4882a593Smuzhiyun rxmac_authorize_all_vid),
2824*4882a593Smuzhiyun val64);
2825*4882a593Smuzhiyun
2826*4882a593Smuzhiyun vxge_set_multicast(dev);
2827*4882a593Smuzhiyun
2828*4882a593Smuzhiyun /* Enabling Bcast and mcast for all vpath */
2829*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
2830*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
2831*4882a593Smuzhiyun status = vxge_hw_vpath_bcast_enable(vpath->handle);
2832*4882a593Smuzhiyun if (status != VXGE_HW_OK)
2833*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2834*4882a593Smuzhiyun "%s : Can not enable bcast for vpath "
2835*4882a593Smuzhiyun "id %d", dev->name, i);
2836*4882a593Smuzhiyun if (vdev->config.addr_learn_en) {
2837*4882a593Smuzhiyun status = vxge_hw_vpath_mcast_enable(vpath->handle);
2838*4882a593Smuzhiyun if (status != VXGE_HW_OK)
2839*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
2840*4882a593Smuzhiyun "%s : Can not enable mcast for vpath "
2841*4882a593Smuzhiyun "id %d", dev->name, i);
2842*4882a593Smuzhiyun }
2843*4882a593Smuzhiyun }
2844*4882a593Smuzhiyun
2845*4882a593Smuzhiyun vxge_hw_device_setpause_data(vdev->devh, 0,
2846*4882a593Smuzhiyun vdev->config.tx_pause_enable,
2847*4882a593Smuzhiyun vdev->config.rx_pause_enable);
2848*4882a593Smuzhiyun
2849*4882a593Smuzhiyun if (vdev->vp_reset_timer.function == NULL)
2850*4882a593Smuzhiyun vxge_os_timer(&vdev->vp_reset_timer, vxge_poll_vp_reset,
2851*4882a593Smuzhiyun HZ / 2);
2852*4882a593Smuzhiyun
2853*4882a593Smuzhiyun /* There is no need to check for RxD leak and RxD lookup on Titan1A */
2854*4882a593Smuzhiyun if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
2855*4882a593Smuzhiyun vxge_os_timer(&vdev->vp_lockup_timer, vxge_poll_vp_lockup,
2856*4882a593Smuzhiyun HZ / 2);
2857*4882a593Smuzhiyun
2858*4882a593Smuzhiyun set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
2859*4882a593Smuzhiyun
2860*4882a593Smuzhiyun smp_wmb();
2861*4882a593Smuzhiyun
2862*4882a593Smuzhiyun if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
2863*4882a593Smuzhiyun netif_carrier_on(vdev->ndev);
2864*4882a593Smuzhiyun netdev_notice(vdev->ndev, "Link Up\n");
2865*4882a593Smuzhiyun vdev->stats.link_up++;
2866*4882a593Smuzhiyun }
2867*4882a593Smuzhiyun
2868*4882a593Smuzhiyun vxge_hw_device_intr_enable(vdev->devh);
2869*4882a593Smuzhiyun
2870*4882a593Smuzhiyun smp_wmb();
2871*4882a593Smuzhiyun
2872*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
2873*4882a593Smuzhiyun vpath = &vdev->vpaths[i];
2874*4882a593Smuzhiyun
2875*4882a593Smuzhiyun vxge_hw_vpath_enable(vpath->handle);
2876*4882a593Smuzhiyun smp_wmb();
2877*4882a593Smuzhiyun vxge_hw_vpath_rx_doorbell_init(vpath->handle);
2878*4882a593Smuzhiyun }
2879*4882a593Smuzhiyun
2880*4882a593Smuzhiyun netif_tx_start_all_queues(vdev->ndev);
2881*4882a593Smuzhiyun
2882*4882a593Smuzhiyun /* configure CI */
2883*4882a593Smuzhiyun vxge_config_ci_for_tti_rti(vdev);
2884*4882a593Smuzhiyun
2885*4882a593Smuzhiyun goto out0;
2886*4882a593Smuzhiyun
2887*4882a593Smuzhiyun out2:
2888*4882a593Smuzhiyun vxge_rem_isr(vdev);
2889*4882a593Smuzhiyun
2890*4882a593Smuzhiyun /* Disable napi */
2891*4882a593Smuzhiyun if (vdev->config.intr_type != MSI_X)
2892*4882a593Smuzhiyun napi_disable(&vdev->napi);
2893*4882a593Smuzhiyun else {
2894*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++)
2895*4882a593Smuzhiyun napi_disable(&vdev->vpaths[i].ring.napi);
2896*4882a593Smuzhiyun }
2897*4882a593Smuzhiyun
2898*4882a593Smuzhiyun out1:
2899*4882a593Smuzhiyun vxge_close_vpaths(vdev, 0);
2900*4882a593Smuzhiyun out0:
2901*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
2902*4882a593Smuzhiyun "%s: %s:%d Exiting...",
2903*4882a593Smuzhiyun dev->name, __func__, __LINE__);
2904*4882a593Smuzhiyun return ret;
2905*4882a593Smuzhiyun }
2906*4882a593Smuzhiyun
2907*4882a593Smuzhiyun /* Loop through the mac address list and delete all the entries */
vxge_free_mac_add_list(struct vxge_vpath * vpath)2908*4882a593Smuzhiyun static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
2909*4882a593Smuzhiyun {
2910*4882a593Smuzhiyun
2911*4882a593Smuzhiyun struct list_head *entry, *next;
2912*4882a593Smuzhiyun if (list_empty(&vpath->mac_addr_list))
2913*4882a593Smuzhiyun return;
2914*4882a593Smuzhiyun
2915*4882a593Smuzhiyun list_for_each_safe(entry, next, &vpath->mac_addr_list) {
2916*4882a593Smuzhiyun list_del(entry);
2917*4882a593Smuzhiyun kfree(entry);
2918*4882a593Smuzhiyun }
2919*4882a593Smuzhiyun }
2920*4882a593Smuzhiyun
vxge_napi_del_all(struct vxgedev * vdev)2921*4882a593Smuzhiyun static void vxge_napi_del_all(struct vxgedev *vdev)
2922*4882a593Smuzhiyun {
2923*4882a593Smuzhiyun int i;
2924*4882a593Smuzhiyun if (vdev->config.intr_type != MSI_X)
2925*4882a593Smuzhiyun netif_napi_del(&vdev->napi);
2926*4882a593Smuzhiyun else {
2927*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++)
2928*4882a593Smuzhiyun netif_napi_del(&vdev->vpaths[i].ring.napi);
2929*4882a593Smuzhiyun }
2930*4882a593Smuzhiyun }
2931*4882a593Smuzhiyun
do_vxge_close(struct net_device * dev,int do_io)2932*4882a593Smuzhiyun static int do_vxge_close(struct net_device *dev, int do_io)
2933*4882a593Smuzhiyun {
2934*4882a593Smuzhiyun enum vxge_hw_status status;
2935*4882a593Smuzhiyun struct vxgedev *vdev;
2936*4882a593Smuzhiyun struct __vxge_hw_device *hldev;
2937*4882a593Smuzhiyun int i;
2938*4882a593Smuzhiyun u64 val64, vpath_vector;
2939*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
2940*4882a593Smuzhiyun dev->name, __func__, __LINE__);
2941*4882a593Smuzhiyun
2942*4882a593Smuzhiyun vdev = netdev_priv(dev);
2943*4882a593Smuzhiyun hldev = pci_get_drvdata(vdev->pdev);
2944*4882a593Smuzhiyun
2945*4882a593Smuzhiyun if (unlikely(!is_vxge_card_up(vdev)))
2946*4882a593Smuzhiyun return 0;
2947*4882a593Smuzhiyun
2948*4882a593Smuzhiyun /* If vxge_handle_crit_err task is executing,
2949*4882a593Smuzhiyun * wait till it completes. */
2950*4882a593Smuzhiyun while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
2951*4882a593Smuzhiyun msleep(50);
2952*4882a593Smuzhiyun
2953*4882a593Smuzhiyun if (do_io) {
2954*4882a593Smuzhiyun /* Put the vpath back in normal mode */
2955*4882a593Smuzhiyun vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
2956*4882a593Smuzhiyun status = vxge_hw_mgmt_reg_read(vdev->devh,
2957*4882a593Smuzhiyun vxge_hw_mgmt_reg_type_mrpcim,
2958*4882a593Smuzhiyun 0,
2959*4882a593Smuzhiyun (ulong)offsetof(
2960*4882a593Smuzhiyun struct vxge_hw_mrpcim_reg,
2961*4882a593Smuzhiyun rts_mgr_cbasin_cfg),
2962*4882a593Smuzhiyun &val64);
2963*4882a593Smuzhiyun if (status == VXGE_HW_OK) {
2964*4882a593Smuzhiyun val64 &= ~vpath_vector;
2965*4882a593Smuzhiyun status = vxge_hw_mgmt_reg_write(vdev->devh,
2966*4882a593Smuzhiyun vxge_hw_mgmt_reg_type_mrpcim,
2967*4882a593Smuzhiyun 0,
2968*4882a593Smuzhiyun (ulong)offsetof(
2969*4882a593Smuzhiyun struct vxge_hw_mrpcim_reg,
2970*4882a593Smuzhiyun rts_mgr_cbasin_cfg),
2971*4882a593Smuzhiyun val64);
2972*4882a593Smuzhiyun }
2973*4882a593Smuzhiyun
2974*4882a593Smuzhiyun /* Remove the function 0 from promiscuous mode */
2975*4882a593Smuzhiyun vxge_hw_mgmt_reg_write(vdev->devh,
2976*4882a593Smuzhiyun vxge_hw_mgmt_reg_type_mrpcim,
2977*4882a593Smuzhiyun 0,
2978*4882a593Smuzhiyun (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2979*4882a593Smuzhiyun rxmac_authorize_all_addr),
2980*4882a593Smuzhiyun 0);
2981*4882a593Smuzhiyun
2982*4882a593Smuzhiyun vxge_hw_mgmt_reg_write(vdev->devh,
2983*4882a593Smuzhiyun vxge_hw_mgmt_reg_type_mrpcim,
2984*4882a593Smuzhiyun 0,
2985*4882a593Smuzhiyun (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2986*4882a593Smuzhiyun rxmac_authorize_all_vid),
2987*4882a593Smuzhiyun 0);
2988*4882a593Smuzhiyun
2989*4882a593Smuzhiyun smp_wmb();
2990*4882a593Smuzhiyun }
2991*4882a593Smuzhiyun
2992*4882a593Smuzhiyun if (vdev->titan1)
2993*4882a593Smuzhiyun del_timer_sync(&vdev->vp_lockup_timer);
2994*4882a593Smuzhiyun
2995*4882a593Smuzhiyun del_timer_sync(&vdev->vp_reset_timer);
2996*4882a593Smuzhiyun
2997*4882a593Smuzhiyun if (do_io)
2998*4882a593Smuzhiyun vxge_hw_device_wait_receive_idle(hldev);
2999*4882a593Smuzhiyun
3000*4882a593Smuzhiyun clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3001*4882a593Smuzhiyun
3002*4882a593Smuzhiyun /* Disable napi */
3003*4882a593Smuzhiyun if (vdev->config.intr_type != MSI_X)
3004*4882a593Smuzhiyun napi_disable(&vdev->napi);
3005*4882a593Smuzhiyun else {
3006*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++)
3007*4882a593Smuzhiyun napi_disable(&vdev->vpaths[i].ring.napi);
3008*4882a593Smuzhiyun }
3009*4882a593Smuzhiyun
3010*4882a593Smuzhiyun netif_carrier_off(vdev->ndev);
3011*4882a593Smuzhiyun netdev_notice(vdev->ndev, "Link Down\n");
3012*4882a593Smuzhiyun netif_tx_stop_all_queues(vdev->ndev);
3013*4882a593Smuzhiyun
3014*4882a593Smuzhiyun /* Note that at this point xmit() is stopped by upper layer */
3015*4882a593Smuzhiyun if (do_io)
3016*4882a593Smuzhiyun vxge_hw_device_intr_disable(vdev->devh);
3017*4882a593Smuzhiyun
3018*4882a593Smuzhiyun vxge_rem_isr(vdev);
3019*4882a593Smuzhiyun
3020*4882a593Smuzhiyun vxge_napi_del_all(vdev);
3021*4882a593Smuzhiyun
3022*4882a593Smuzhiyun if (do_io)
3023*4882a593Smuzhiyun vxge_reset_all_vpaths(vdev);
3024*4882a593Smuzhiyun
3025*4882a593Smuzhiyun vxge_close_vpaths(vdev, 0);
3026*4882a593Smuzhiyun
3027*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
3028*4882a593Smuzhiyun "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
3029*4882a593Smuzhiyun
3030*4882a593Smuzhiyun clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
3031*4882a593Smuzhiyun
3032*4882a593Smuzhiyun return 0;
3033*4882a593Smuzhiyun }
3034*4882a593Smuzhiyun
3035*4882a593Smuzhiyun /**
3036*4882a593Smuzhiyun * vxge_close
3037*4882a593Smuzhiyun * @dev: device pointer.
3038*4882a593Smuzhiyun *
3039*4882a593Smuzhiyun * This is the stop entry point of the driver. It needs to undo exactly
3040*4882a593Smuzhiyun * whatever was done by the open entry point, thus it's usually referred to
3041*4882a593Smuzhiyun * as the close function.Among other things this function mainly stops the
3042*4882a593Smuzhiyun * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
3043*4882a593Smuzhiyun * Return value: '0' on success and an appropriate (-)ve integer as
3044*4882a593Smuzhiyun * defined in errno.h file on failure.
3045*4882a593Smuzhiyun */
vxge_close(struct net_device * dev)3046*4882a593Smuzhiyun static int vxge_close(struct net_device *dev)
3047*4882a593Smuzhiyun {
3048*4882a593Smuzhiyun do_vxge_close(dev, 1);
3049*4882a593Smuzhiyun return 0;
3050*4882a593Smuzhiyun }
3051*4882a593Smuzhiyun
3052*4882a593Smuzhiyun /**
3053*4882a593Smuzhiyun * vxge_change_mtu
3054*4882a593Smuzhiyun * @dev: net device pointer.
3055*4882a593Smuzhiyun * @new_mtu :the new MTU size for the device.
3056*4882a593Smuzhiyun *
3057*4882a593Smuzhiyun * A driver entry point to change MTU size for the device. Before changing
3058*4882a593Smuzhiyun * the MTU the device must be stopped.
3059*4882a593Smuzhiyun */
vxge_change_mtu(struct net_device * dev,int new_mtu)3060*4882a593Smuzhiyun static int vxge_change_mtu(struct net_device *dev, int new_mtu)
3061*4882a593Smuzhiyun {
3062*4882a593Smuzhiyun struct vxgedev *vdev = netdev_priv(dev);
3063*4882a593Smuzhiyun
3064*4882a593Smuzhiyun vxge_debug_entryexit(vdev->level_trace,
3065*4882a593Smuzhiyun "%s:%d", __func__, __LINE__);
3066*4882a593Smuzhiyun
3067*4882a593Smuzhiyun /* check if device is down already */
3068*4882a593Smuzhiyun if (unlikely(!is_vxge_card_up(vdev))) {
3069*4882a593Smuzhiyun /* just store new value, will use later on open() */
3070*4882a593Smuzhiyun dev->mtu = new_mtu;
3071*4882a593Smuzhiyun vxge_debug_init(vdev->level_err,
3072*4882a593Smuzhiyun "%s", "device is down on MTU change");
3073*4882a593Smuzhiyun return 0;
3074*4882a593Smuzhiyun }
3075*4882a593Smuzhiyun
3076*4882a593Smuzhiyun vxge_debug_init(vdev->level_trace,
3077*4882a593Smuzhiyun "trying to apply new MTU %d", new_mtu);
3078*4882a593Smuzhiyun
3079*4882a593Smuzhiyun if (vxge_close(dev))
3080*4882a593Smuzhiyun return -EIO;
3081*4882a593Smuzhiyun
3082*4882a593Smuzhiyun dev->mtu = new_mtu;
3083*4882a593Smuzhiyun vdev->mtu = new_mtu;
3084*4882a593Smuzhiyun
3085*4882a593Smuzhiyun if (vxge_open(dev))
3086*4882a593Smuzhiyun return -EIO;
3087*4882a593Smuzhiyun
3088*4882a593Smuzhiyun vxge_debug_init(vdev->level_trace,
3089*4882a593Smuzhiyun "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
3090*4882a593Smuzhiyun
3091*4882a593Smuzhiyun vxge_debug_entryexit(vdev->level_trace,
3092*4882a593Smuzhiyun "%s:%d Exiting...", __func__, __LINE__);
3093*4882a593Smuzhiyun
3094*4882a593Smuzhiyun return 0;
3095*4882a593Smuzhiyun }
3096*4882a593Smuzhiyun
3097*4882a593Smuzhiyun /**
3098*4882a593Smuzhiyun * vxge_get_stats64
3099*4882a593Smuzhiyun * @dev: pointer to the device structure
3100*4882a593Smuzhiyun * @net_stats: pointer to struct rtnl_link_stats64
3101*4882a593Smuzhiyun *
3102*4882a593Smuzhiyun */
3103*4882a593Smuzhiyun static void
vxge_get_stats64(struct net_device * dev,struct rtnl_link_stats64 * net_stats)3104*4882a593Smuzhiyun vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
3105*4882a593Smuzhiyun {
3106*4882a593Smuzhiyun struct vxgedev *vdev = netdev_priv(dev);
3107*4882a593Smuzhiyun int k;
3108*4882a593Smuzhiyun
3109*4882a593Smuzhiyun /* net_stats already zeroed by caller */
3110*4882a593Smuzhiyun for (k = 0; k < vdev->no_of_vpath; k++) {
3111*4882a593Smuzhiyun struct vxge_ring_stats *rxstats = &vdev->vpaths[k].ring.stats;
3112*4882a593Smuzhiyun struct vxge_fifo_stats *txstats = &vdev->vpaths[k].fifo.stats;
3113*4882a593Smuzhiyun unsigned int start;
3114*4882a593Smuzhiyun u64 packets, bytes, multicast;
3115*4882a593Smuzhiyun
3116*4882a593Smuzhiyun do {
3117*4882a593Smuzhiyun start = u64_stats_fetch_begin_irq(&rxstats->syncp);
3118*4882a593Smuzhiyun
3119*4882a593Smuzhiyun packets = rxstats->rx_frms;
3120*4882a593Smuzhiyun multicast = rxstats->rx_mcast;
3121*4882a593Smuzhiyun bytes = rxstats->rx_bytes;
3122*4882a593Smuzhiyun } while (u64_stats_fetch_retry_irq(&rxstats->syncp, start));
3123*4882a593Smuzhiyun
3124*4882a593Smuzhiyun net_stats->rx_packets += packets;
3125*4882a593Smuzhiyun net_stats->rx_bytes += bytes;
3126*4882a593Smuzhiyun net_stats->multicast += multicast;
3127*4882a593Smuzhiyun
3128*4882a593Smuzhiyun net_stats->rx_errors += rxstats->rx_errors;
3129*4882a593Smuzhiyun net_stats->rx_dropped += rxstats->rx_dropped;
3130*4882a593Smuzhiyun
3131*4882a593Smuzhiyun do {
3132*4882a593Smuzhiyun start = u64_stats_fetch_begin_irq(&txstats->syncp);
3133*4882a593Smuzhiyun
3134*4882a593Smuzhiyun packets = txstats->tx_frms;
3135*4882a593Smuzhiyun bytes = txstats->tx_bytes;
3136*4882a593Smuzhiyun } while (u64_stats_fetch_retry_irq(&txstats->syncp, start));
3137*4882a593Smuzhiyun
3138*4882a593Smuzhiyun net_stats->tx_packets += packets;
3139*4882a593Smuzhiyun net_stats->tx_bytes += bytes;
3140*4882a593Smuzhiyun net_stats->tx_errors += txstats->tx_errors;
3141*4882a593Smuzhiyun }
3142*4882a593Smuzhiyun }
3143*4882a593Smuzhiyun
vxge_timestamp_config(struct __vxge_hw_device * devh)3144*4882a593Smuzhiyun static enum vxge_hw_status vxge_timestamp_config(struct __vxge_hw_device *devh)
3145*4882a593Smuzhiyun {
3146*4882a593Smuzhiyun enum vxge_hw_status status;
3147*4882a593Smuzhiyun u64 val64;
3148*4882a593Smuzhiyun
3149*4882a593Smuzhiyun /* Timestamp is passed to the driver via the FCS, therefore we
3150*4882a593Smuzhiyun * must disable the FCS stripping by the adapter. Since this is
3151*4882a593Smuzhiyun * required for the driver to load (due to a hardware bug),
3152*4882a593Smuzhiyun * there is no need to do anything special here.
3153*4882a593Smuzhiyun */
3154*4882a593Smuzhiyun val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
3155*4882a593Smuzhiyun VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
3156*4882a593Smuzhiyun VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
3157*4882a593Smuzhiyun
3158*4882a593Smuzhiyun status = vxge_hw_mgmt_reg_write(devh,
3159*4882a593Smuzhiyun vxge_hw_mgmt_reg_type_mrpcim,
3160*4882a593Smuzhiyun 0,
3161*4882a593Smuzhiyun offsetof(struct vxge_hw_mrpcim_reg,
3162*4882a593Smuzhiyun xmac_timestamp),
3163*4882a593Smuzhiyun val64);
3164*4882a593Smuzhiyun vxge_hw_device_flush_io(devh);
3165*4882a593Smuzhiyun devh->config.hwts_en = VXGE_HW_HWTS_ENABLE;
3166*4882a593Smuzhiyun return status;
3167*4882a593Smuzhiyun }
3168*4882a593Smuzhiyun
vxge_hwtstamp_set(struct vxgedev * vdev,void __user * data)3169*4882a593Smuzhiyun static int vxge_hwtstamp_set(struct vxgedev *vdev, void __user *data)
3170*4882a593Smuzhiyun {
3171*4882a593Smuzhiyun struct hwtstamp_config config;
3172*4882a593Smuzhiyun int i;
3173*4882a593Smuzhiyun
3174*4882a593Smuzhiyun if (copy_from_user(&config, data, sizeof(config)))
3175*4882a593Smuzhiyun return -EFAULT;
3176*4882a593Smuzhiyun
3177*4882a593Smuzhiyun /* reserved for future extensions */
3178*4882a593Smuzhiyun if (config.flags)
3179*4882a593Smuzhiyun return -EINVAL;
3180*4882a593Smuzhiyun
3181*4882a593Smuzhiyun /* Transmit HW Timestamp not supported */
3182*4882a593Smuzhiyun switch (config.tx_type) {
3183*4882a593Smuzhiyun case HWTSTAMP_TX_OFF:
3184*4882a593Smuzhiyun break;
3185*4882a593Smuzhiyun case HWTSTAMP_TX_ON:
3186*4882a593Smuzhiyun default:
3187*4882a593Smuzhiyun return -ERANGE;
3188*4882a593Smuzhiyun }
3189*4882a593Smuzhiyun
3190*4882a593Smuzhiyun switch (config.rx_filter) {
3191*4882a593Smuzhiyun case HWTSTAMP_FILTER_NONE:
3192*4882a593Smuzhiyun vdev->rx_hwts = 0;
3193*4882a593Smuzhiyun config.rx_filter = HWTSTAMP_FILTER_NONE;
3194*4882a593Smuzhiyun break;
3195*4882a593Smuzhiyun
3196*4882a593Smuzhiyun case HWTSTAMP_FILTER_ALL:
3197*4882a593Smuzhiyun case HWTSTAMP_FILTER_SOME:
3198*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3199*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3200*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3201*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3202*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3203*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3204*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3205*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3206*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3207*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V2_EVENT:
3208*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V2_SYNC:
3209*4882a593Smuzhiyun case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3210*4882a593Smuzhiyun case HWTSTAMP_FILTER_NTP_ALL:
3211*4882a593Smuzhiyun if (vdev->devh->config.hwts_en != VXGE_HW_HWTS_ENABLE)
3212*4882a593Smuzhiyun return -EFAULT;
3213*4882a593Smuzhiyun
3214*4882a593Smuzhiyun vdev->rx_hwts = 1;
3215*4882a593Smuzhiyun config.rx_filter = HWTSTAMP_FILTER_ALL;
3216*4882a593Smuzhiyun break;
3217*4882a593Smuzhiyun
3218*4882a593Smuzhiyun default:
3219*4882a593Smuzhiyun return -ERANGE;
3220*4882a593Smuzhiyun }
3221*4882a593Smuzhiyun
3222*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++)
3223*4882a593Smuzhiyun vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
3224*4882a593Smuzhiyun
3225*4882a593Smuzhiyun if (copy_to_user(data, &config, sizeof(config)))
3226*4882a593Smuzhiyun return -EFAULT;
3227*4882a593Smuzhiyun
3228*4882a593Smuzhiyun return 0;
3229*4882a593Smuzhiyun }
3230*4882a593Smuzhiyun
vxge_hwtstamp_get(struct vxgedev * vdev,void __user * data)3231*4882a593Smuzhiyun static int vxge_hwtstamp_get(struct vxgedev *vdev, void __user *data)
3232*4882a593Smuzhiyun {
3233*4882a593Smuzhiyun struct hwtstamp_config config;
3234*4882a593Smuzhiyun
3235*4882a593Smuzhiyun config.flags = 0;
3236*4882a593Smuzhiyun config.tx_type = HWTSTAMP_TX_OFF;
3237*4882a593Smuzhiyun config.rx_filter = (vdev->rx_hwts ?
3238*4882a593Smuzhiyun HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE);
3239*4882a593Smuzhiyun
3240*4882a593Smuzhiyun if (copy_to_user(data, &config, sizeof(config)))
3241*4882a593Smuzhiyun return -EFAULT;
3242*4882a593Smuzhiyun
3243*4882a593Smuzhiyun return 0;
3244*4882a593Smuzhiyun }
3245*4882a593Smuzhiyun
3246*4882a593Smuzhiyun /**
3247*4882a593Smuzhiyun * vxge_ioctl
3248*4882a593Smuzhiyun * @dev: Device pointer.
3249*4882a593Smuzhiyun * @rq: An IOCTL specific structure, that can contain a pointer to
3250*4882a593Smuzhiyun * a proprietary structure used to pass information to the driver.
3251*4882a593Smuzhiyun * @cmd: This is used to distinguish between the different commands that
3252*4882a593Smuzhiyun * can be passed to the IOCTL functions.
3253*4882a593Smuzhiyun *
3254*4882a593Smuzhiyun * Entry point for the Ioctl.
3255*4882a593Smuzhiyun */
vxge_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)3256*4882a593Smuzhiyun static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3257*4882a593Smuzhiyun {
3258*4882a593Smuzhiyun struct vxgedev *vdev = netdev_priv(dev);
3259*4882a593Smuzhiyun
3260*4882a593Smuzhiyun switch (cmd) {
3261*4882a593Smuzhiyun case SIOCSHWTSTAMP:
3262*4882a593Smuzhiyun return vxge_hwtstamp_set(vdev, rq->ifr_data);
3263*4882a593Smuzhiyun case SIOCGHWTSTAMP:
3264*4882a593Smuzhiyun return vxge_hwtstamp_get(vdev, rq->ifr_data);
3265*4882a593Smuzhiyun default:
3266*4882a593Smuzhiyun return -EOPNOTSUPP;
3267*4882a593Smuzhiyun }
3268*4882a593Smuzhiyun }
3269*4882a593Smuzhiyun
3270*4882a593Smuzhiyun /**
3271*4882a593Smuzhiyun * vxge_tx_watchdog
3272*4882a593Smuzhiyun * @dev: pointer to net device structure
3273*4882a593Smuzhiyun * @txqueue: index of the hanging queue
3274*4882a593Smuzhiyun *
3275*4882a593Smuzhiyun * Watchdog for transmit side.
3276*4882a593Smuzhiyun * This function is triggered if the Tx Queue is stopped
3277*4882a593Smuzhiyun * for a pre-defined amount of time when the Interface is still up.
3278*4882a593Smuzhiyun */
vxge_tx_watchdog(struct net_device * dev,unsigned int txqueue)3279*4882a593Smuzhiyun static void vxge_tx_watchdog(struct net_device *dev, unsigned int txqueue)
3280*4882a593Smuzhiyun {
3281*4882a593Smuzhiyun struct vxgedev *vdev;
3282*4882a593Smuzhiyun
3283*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3284*4882a593Smuzhiyun
3285*4882a593Smuzhiyun vdev = netdev_priv(dev);
3286*4882a593Smuzhiyun
3287*4882a593Smuzhiyun vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
3288*4882a593Smuzhiyun
3289*4882a593Smuzhiyun schedule_work(&vdev->reset_task);
3290*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
3291*4882a593Smuzhiyun "%s:%d Exiting...", __func__, __LINE__);
3292*4882a593Smuzhiyun }
3293*4882a593Smuzhiyun
3294*4882a593Smuzhiyun /**
3295*4882a593Smuzhiyun * vxge_vlan_rx_add_vid
3296*4882a593Smuzhiyun * @dev: net device pointer.
3297*4882a593Smuzhiyun * @proto: vlan protocol
3298*4882a593Smuzhiyun * @vid: vid
3299*4882a593Smuzhiyun *
3300*4882a593Smuzhiyun * Add the vlan id to the devices vlan id table
3301*4882a593Smuzhiyun */
3302*4882a593Smuzhiyun static int
vxge_vlan_rx_add_vid(struct net_device * dev,__be16 proto,u16 vid)3303*4882a593Smuzhiyun vxge_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
3304*4882a593Smuzhiyun {
3305*4882a593Smuzhiyun struct vxgedev *vdev = netdev_priv(dev);
3306*4882a593Smuzhiyun struct vxge_vpath *vpath;
3307*4882a593Smuzhiyun int vp_id;
3308*4882a593Smuzhiyun
3309*4882a593Smuzhiyun /* Add these vlan to the vid table */
3310*4882a593Smuzhiyun for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3311*4882a593Smuzhiyun vpath = &vdev->vpaths[vp_id];
3312*4882a593Smuzhiyun if (!vpath->is_open)
3313*4882a593Smuzhiyun continue;
3314*4882a593Smuzhiyun vxge_hw_vpath_vid_add(vpath->handle, vid);
3315*4882a593Smuzhiyun }
3316*4882a593Smuzhiyun set_bit(vid, vdev->active_vlans);
3317*4882a593Smuzhiyun return 0;
3318*4882a593Smuzhiyun }
3319*4882a593Smuzhiyun
3320*4882a593Smuzhiyun /**
3321*4882a593Smuzhiyun * vxge_vlan_rx_kill_vid
3322*4882a593Smuzhiyun * @dev: net device pointer.
3323*4882a593Smuzhiyun * @proto: vlan protocol
3324*4882a593Smuzhiyun * @vid: vid
3325*4882a593Smuzhiyun *
3326*4882a593Smuzhiyun * Remove the vlan id from the device's vlan id table
3327*4882a593Smuzhiyun */
3328*4882a593Smuzhiyun static int
vxge_vlan_rx_kill_vid(struct net_device * dev,__be16 proto,u16 vid)3329*4882a593Smuzhiyun vxge_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
3330*4882a593Smuzhiyun {
3331*4882a593Smuzhiyun struct vxgedev *vdev = netdev_priv(dev);
3332*4882a593Smuzhiyun struct vxge_vpath *vpath;
3333*4882a593Smuzhiyun int vp_id;
3334*4882a593Smuzhiyun
3335*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3336*4882a593Smuzhiyun
3337*4882a593Smuzhiyun /* Delete this vlan from the vid table */
3338*4882a593Smuzhiyun for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3339*4882a593Smuzhiyun vpath = &vdev->vpaths[vp_id];
3340*4882a593Smuzhiyun if (!vpath->is_open)
3341*4882a593Smuzhiyun continue;
3342*4882a593Smuzhiyun vxge_hw_vpath_vid_delete(vpath->handle, vid);
3343*4882a593Smuzhiyun }
3344*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE,
3345*4882a593Smuzhiyun "%s:%d Exiting...", __func__, __LINE__);
3346*4882a593Smuzhiyun clear_bit(vid, vdev->active_vlans);
3347*4882a593Smuzhiyun return 0;
3348*4882a593Smuzhiyun }
3349*4882a593Smuzhiyun
3350*4882a593Smuzhiyun static const struct net_device_ops vxge_netdev_ops = {
3351*4882a593Smuzhiyun .ndo_open = vxge_open,
3352*4882a593Smuzhiyun .ndo_stop = vxge_close,
3353*4882a593Smuzhiyun .ndo_get_stats64 = vxge_get_stats64,
3354*4882a593Smuzhiyun .ndo_start_xmit = vxge_xmit,
3355*4882a593Smuzhiyun .ndo_validate_addr = eth_validate_addr,
3356*4882a593Smuzhiyun .ndo_set_rx_mode = vxge_set_multicast,
3357*4882a593Smuzhiyun .ndo_do_ioctl = vxge_ioctl,
3358*4882a593Smuzhiyun .ndo_set_mac_address = vxge_set_mac_addr,
3359*4882a593Smuzhiyun .ndo_change_mtu = vxge_change_mtu,
3360*4882a593Smuzhiyun .ndo_fix_features = vxge_fix_features,
3361*4882a593Smuzhiyun .ndo_set_features = vxge_set_features,
3362*4882a593Smuzhiyun .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
3363*4882a593Smuzhiyun .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
3364*4882a593Smuzhiyun .ndo_tx_timeout = vxge_tx_watchdog,
3365*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
3366*4882a593Smuzhiyun .ndo_poll_controller = vxge_netpoll,
3367*4882a593Smuzhiyun #endif
3368*4882a593Smuzhiyun };
3369*4882a593Smuzhiyun
vxge_device_register(struct __vxge_hw_device * hldev,struct vxge_config * config,int high_dma,int no_of_vpath,struct vxgedev ** vdev_out)3370*4882a593Smuzhiyun static int vxge_device_register(struct __vxge_hw_device *hldev,
3371*4882a593Smuzhiyun struct vxge_config *config, int high_dma,
3372*4882a593Smuzhiyun int no_of_vpath, struct vxgedev **vdev_out)
3373*4882a593Smuzhiyun {
3374*4882a593Smuzhiyun struct net_device *ndev;
3375*4882a593Smuzhiyun enum vxge_hw_status status = VXGE_HW_OK;
3376*4882a593Smuzhiyun struct vxgedev *vdev;
3377*4882a593Smuzhiyun int ret = 0, no_of_queue = 1;
3378*4882a593Smuzhiyun u64 stat;
3379*4882a593Smuzhiyun
3380*4882a593Smuzhiyun *vdev_out = NULL;
3381*4882a593Smuzhiyun if (config->tx_steering_type)
3382*4882a593Smuzhiyun no_of_queue = no_of_vpath;
3383*4882a593Smuzhiyun
3384*4882a593Smuzhiyun ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
3385*4882a593Smuzhiyun no_of_queue);
3386*4882a593Smuzhiyun if (ndev == NULL) {
3387*4882a593Smuzhiyun vxge_debug_init(
3388*4882a593Smuzhiyun vxge_hw_device_trace_level_get(hldev),
3389*4882a593Smuzhiyun "%s : device allocation failed", __func__);
3390*4882a593Smuzhiyun ret = -ENODEV;
3391*4882a593Smuzhiyun goto _out0;
3392*4882a593Smuzhiyun }
3393*4882a593Smuzhiyun
3394*4882a593Smuzhiyun vxge_debug_entryexit(
3395*4882a593Smuzhiyun vxge_hw_device_trace_level_get(hldev),
3396*4882a593Smuzhiyun "%s: %s:%d Entering...",
3397*4882a593Smuzhiyun ndev->name, __func__, __LINE__);
3398*4882a593Smuzhiyun
3399*4882a593Smuzhiyun vdev = netdev_priv(ndev);
3400*4882a593Smuzhiyun memset(vdev, 0, sizeof(struct vxgedev));
3401*4882a593Smuzhiyun
3402*4882a593Smuzhiyun vdev->ndev = ndev;
3403*4882a593Smuzhiyun vdev->devh = hldev;
3404*4882a593Smuzhiyun vdev->pdev = hldev->pdev;
3405*4882a593Smuzhiyun memcpy(&vdev->config, config, sizeof(struct vxge_config));
3406*4882a593Smuzhiyun vdev->rx_hwts = 0;
3407*4882a593Smuzhiyun vdev->titan1 = (vdev->pdev->revision == VXGE_HW_TITAN1_PCI_REVISION);
3408*4882a593Smuzhiyun
3409*4882a593Smuzhiyun SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
3410*4882a593Smuzhiyun
3411*4882a593Smuzhiyun ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_SG |
3412*4882a593Smuzhiyun NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3413*4882a593Smuzhiyun NETIF_F_TSO | NETIF_F_TSO6 |
3414*4882a593Smuzhiyun NETIF_F_HW_VLAN_CTAG_TX;
3415*4882a593Smuzhiyun if (vdev->config.rth_steering != NO_STEERING)
3416*4882a593Smuzhiyun ndev->hw_features |= NETIF_F_RXHASH;
3417*4882a593Smuzhiyun
3418*4882a593Smuzhiyun ndev->features |= ndev->hw_features |
3419*4882a593Smuzhiyun NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_FILTER;
3420*4882a593Smuzhiyun
3421*4882a593Smuzhiyun
3422*4882a593Smuzhiyun ndev->netdev_ops = &vxge_netdev_ops;
3423*4882a593Smuzhiyun
3424*4882a593Smuzhiyun ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
3425*4882a593Smuzhiyun INIT_WORK(&vdev->reset_task, vxge_reset);
3426*4882a593Smuzhiyun
3427*4882a593Smuzhiyun vxge_initialize_ethtool_ops(ndev);
3428*4882a593Smuzhiyun
3429*4882a593Smuzhiyun /* Allocate memory for vpath */
3430*4882a593Smuzhiyun vdev->vpaths = kcalloc(no_of_vpath, sizeof(struct vxge_vpath),
3431*4882a593Smuzhiyun GFP_KERNEL);
3432*4882a593Smuzhiyun if (!vdev->vpaths) {
3433*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
3434*4882a593Smuzhiyun "%s: vpath memory allocation failed",
3435*4882a593Smuzhiyun vdev->ndev->name);
3436*4882a593Smuzhiyun ret = -ENOMEM;
3437*4882a593Smuzhiyun goto _out1;
3438*4882a593Smuzhiyun }
3439*4882a593Smuzhiyun
3440*4882a593Smuzhiyun vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3441*4882a593Smuzhiyun "%s : checksumming enabled", __func__);
3442*4882a593Smuzhiyun
3443*4882a593Smuzhiyun if (high_dma) {
3444*4882a593Smuzhiyun ndev->features |= NETIF_F_HIGHDMA;
3445*4882a593Smuzhiyun vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3446*4882a593Smuzhiyun "%s : using High DMA", __func__);
3447*4882a593Smuzhiyun }
3448*4882a593Smuzhiyun
3449*4882a593Smuzhiyun /* MTU range: 68 - 9600 */
3450*4882a593Smuzhiyun ndev->min_mtu = VXGE_HW_MIN_MTU;
3451*4882a593Smuzhiyun ndev->max_mtu = VXGE_HW_MAX_MTU;
3452*4882a593Smuzhiyun
3453*4882a593Smuzhiyun ret = register_netdev(ndev);
3454*4882a593Smuzhiyun if (ret) {
3455*4882a593Smuzhiyun vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3456*4882a593Smuzhiyun "%s: %s : device registration failed!",
3457*4882a593Smuzhiyun ndev->name, __func__);
3458*4882a593Smuzhiyun goto _out2;
3459*4882a593Smuzhiyun }
3460*4882a593Smuzhiyun
3461*4882a593Smuzhiyun /* Set the factory defined MAC address initially */
3462*4882a593Smuzhiyun ndev->addr_len = ETH_ALEN;
3463*4882a593Smuzhiyun
3464*4882a593Smuzhiyun /* Make Link state as off at this point, when the Link change
3465*4882a593Smuzhiyun * interrupt comes the state will be automatically changed to
3466*4882a593Smuzhiyun * the right state.
3467*4882a593Smuzhiyun */
3468*4882a593Smuzhiyun netif_carrier_off(ndev);
3469*4882a593Smuzhiyun
3470*4882a593Smuzhiyun vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3471*4882a593Smuzhiyun "%s: Ethernet device registered",
3472*4882a593Smuzhiyun ndev->name);
3473*4882a593Smuzhiyun
3474*4882a593Smuzhiyun hldev->ndev = ndev;
3475*4882a593Smuzhiyun *vdev_out = vdev;
3476*4882a593Smuzhiyun
3477*4882a593Smuzhiyun /* Resetting the Device stats */
3478*4882a593Smuzhiyun status = vxge_hw_mrpcim_stats_access(
3479*4882a593Smuzhiyun hldev,
3480*4882a593Smuzhiyun VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
3481*4882a593Smuzhiyun 0,
3482*4882a593Smuzhiyun 0,
3483*4882a593Smuzhiyun &stat);
3484*4882a593Smuzhiyun
3485*4882a593Smuzhiyun if (status == VXGE_HW_ERR_PRIVILEGED_OPERATION)
3486*4882a593Smuzhiyun vxge_debug_init(
3487*4882a593Smuzhiyun vxge_hw_device_trace_level_get(hldev),
3488*4882a593Smuzhiyun "%s: device stats clear returns"
3489*4882a593Smuzhiyun "VXGE_HW_ERR_PRIVILEGED_OPERATION", ndev->name);
3490*4882a593Smuzhiyun
3491*4882a593Smuzhiyun vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
3492*4882a593Smuzhiyun "%s: %s:%d Exiting...",
3493*4882a593Smuzhiyun ndev->name, __func__, __LINE__);
3494*4882a593Smuzhiyun
3495*4882a593Smuzhiyun return ret;
3496*4882a593Smuzhiyun _out2:
3497*4882a593Smuzhiyun kfree(vdev->vpaths);
3498*4882a593Smuzhiyun _out1:
3499*4882a593Smuzhiyun free_netdev(ndev);
3500*4882a593Smuzhiyun _out0:
3501*4882a593Smuzhiyun return ret;
3502*4882a593Smuzhiyun }
3503*4882a593Smuzhiyun
3504*4882a593Smuzhiyun /*
3505*4882a593Smuzhiyun * vxge_device_unregister
3506*4882a593Smuzhiyun *
3507*4882a593Smuzhiyun * This function will unregister and free network device
3508*4882a593Smuzhiyun */
vxge_device_unregister(struct __vxge_hw_device * hldev)3509*4882a593Smuzhiyun static void vxge_device_unregister(struct __vxge_hw_device *hldev)
3510*4882a593Smuzhiyun {
3511*4882a593Smuzhiyun struct vxgedev *vdev;
3512*4882a593Smuzhiyun struct net_device *dev;
3513*4882a593Smuzhiyun char buf[IFNAMSIZ];
3514*4882a593Smuzhiyun
3515*4882a593Smuzhiyun dev = hldev->ndev;
3516*4882a593Smuzhiyun vdev = netdev_priv(dev);
3517*4882a593Smuzhiyun
3518*4882a593Smuzhiyun vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
3519*4882a593Smuzhiyun __func__, __LINE__);
3520*4882a593Smuzhiyun
3521*4882a593Smuzhiyun strlcpy(buf, dev->name, IFNAMSIZ);
3522*4882a593Smuzhiyun
3523*4882a593Smuzhiyun flush_work(&vdev->reset_task);
3524*4882a593Smuzhiyun
3525*4882a593Smuzhiyun /* in 2.6 will call stop() if device is up */
3526*4882a593Smuzhiyun unregister_netdev(dev);
3527*4882a593Smuzhiyun
3528*4882a593Smuzhiyun kfree(vdev->vpaths);
3529*4882a593Smuzhiyun
3530*4882a593Smuzhiyun vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
3531*4882a593Smuzhiyun buf);
3532*4882a593Smuzhiyun vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
3533*4882a593Smuzhiyun __func__, __LINE__);
3534*4882a593Smuzhiyun
3535*4882a593Smuzhiyun /* we are safe to free it now */
3536*4882a593Smuzhiyun free_netdev(dev);
3537*4882a593Smuzhiyun }
3538*4882a593Smuzhiyun
3539*4882a593Smuzhiyun /*
3540*4882a593Smuzhiyun * vxge_callback_crit_err
3541*4882a593Smuzhiyun *
3542*4882a593Smuzhiyun * This function is called by the alarm handler in interrupt context.
3543*4882a593Smuzhiyun * Driver must analyze it based on the event type.
3544*4882a593Smuzhiyun */
3545*4882a593Smuzhiyun static void
vxge_callback_crit_err(struct __vxge_hw_device * hldev,enum vxge_hw_event type,u64 vp_id)3546*4882a593Smuzhiyun vxge_callback_crit_err(struct __vxge_hw_device *hldev,
3547*4882a593Smuzhiyun enum vxge_hw_event type, u64 vp_id)
3548*4882a593Smuzhiyun {
3549*4882a593Smuzhiyun struct net_device *dev = hldev->ndev;
3550*4882a593Smuzhiyun struct vxgedev *vdev = netdev_priv(dev);
3551*4882a593Smuzhiyun struct vxge_vpath *vpath = NULL;
3552*4882a593Smuzhiyun int vpath_idx;
3553*4882a593Smuzhiyun
3554*4882a593Smuzhiyun vxge_debug_entryexit(vdev->level_trace,
3555*4882a593Smuzhiyun "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
3556*4882a593Smuzhiyun
3557*4882a593Smuzhiyun /* Note: This event type should be used for device wide
3558*4882a593Smuzhiyun * indications only - Serious errors, Slot freeze and critical errors
3559*4882a593Smuzhiyun */
3560*4882a593Smuzhiyun vdev->cric_err_event = type;
3561*4882a593Smuzhiyun
3562*4882a593Smuzhiyun for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
3563*4882a593Smuzhiyun vpath = &vdev->vpaths[vpath_idx];
3564*4882a593Smuzhiyun if (vpath->device_id == vp_id)
3565*4882a593Smuzhiyun break;
3566*4882a593Smuzhiyun }
3567*4882a593Smuzhiyun
3568*4882a593Smuzhiyun if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
3569*4882a593Smuzhiyun if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
3570*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
3571*4882a593Smuzhiyun "%s: Slot is frozen", vdev->ndev->name);
3572*4882a593Smuzhiyun } else if (type == VXGE_HW_EVENT_SERR) {
3573*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
3574*4882a593Smuzhiyun "%s: Encountered Serious Error",
3575*4882a593Smuzhiyun vdev->ndev->name);
3576*4882a593Smuzhiyun } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
3577*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
3578*4882a593Smuzhiyun "%s: Encountered Critical Error",
3579*4882a593Smuzhiyun vdev->ndev->name);
3580*4882a593Smuzhiyun }
3581*4882a593Smuzhiyun
3582*4882a593Smuzhiyun if ((type == VXGE_HW_EVENT_SERR) ||
3583*4882a593Smuzhiyun (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
3584*4882a593Smuzhiyun if (unlikely(vdev->exec_mode))
3585*4882a593Smuzhiyun clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3586*4882a593Smuzhiyun } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
3587*4882a593Smuzhiyun vxge_hw_device_mask_all(hldev);
3588*4882a593Smuzhiyun if (unlikely(vdev->exec_mode))
3589*4882a593Smuzhiyun clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3590*4882a593Smuzhiyun } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
3591*4882a593Smuzhiyun (type == VXGE_HW_EVENT_VPATH_ERR)) {
3592*4882a593Smuzhiyun
3593*4882a593Smuzhiyun if (unlikely(vdev->exec_mode))
3594*4882a593Smuzhiyun clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3595*4882a593Smuzhiyun else {
3596*4882a593Smuzhiyun /* check if this vpath is already set for reset */
3597*4882a593Smuzhiyun if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
3598*4882a593Smuzhiyun
3599*4882a593Smuzhiyun /* disable interrupts for this vpath */
3600*4882a593Smuzhiyun vxge_vpath_intr_disable(vdev, vpath_idx);
3601*4882a593Smuzhiyun
3602*4882a593Smuzhiyun /* stop the queue for this vpath */
3603*4882a593Smuzhiyun netif_tx_stop_queue(vpath->fifo.txq);
3604*4882a593Smuzhiyun }
3605*4882a593Smuzhiyun }
3606*4882a593Smuzhiyun }
3607*4882a593Smuzhiyun
3608*4882a593Smuzhiyun vxge_debug_entryexit(vdev->level_trace,
3609*4882a593Smuzhiyun "%s: %s:%d Exiting...",
3610*4882a593Smuzhiyun vdev->ndev->name, __func__, __LINE__);
3611*4882a593Smuzhiyun }
3612*4882a593Smuzhiyun
verify_bandwidth(void)3613*4882a593Smuzhiyun static void verify_bandwidth(void)
3614*4882a593Smuzhiyun {
3615*4882a593Smuzhiyun int i, band_width, total = 0, equal_priority = 0;
3616*4882a593Smuzhiyun
3617*4882a593Smuzhiyun /* 1. If user enters 0 for some fifo, give equal priority to all */
3618*4882a593Smuzhiyun for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3619*4882a593Smuzhiyun if (bw_percentage[i] == 0) {
3620*4882a593Smuzhiyun equal_priority = 1;
3621*4882a593Smuzhiyun break;
3622*4882a593Smuzhiyun }
3623*4882a593Smuzhiyun }
3624*4882a593Smuzhiyun
3625*4882a593Smuzhiyun if (!equal_priority) {
3626*4882a593Smuzhiyun /* 2. If sum exceeds 100, give equal priority to all */
3627*4882a593Smuzhiyun for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3628*4882a593Smuzhiyun if (bw_percentage[i] == 0xFF)
3629*4882a593Smuzhiyun break;
3630*4882a593Smuzhiyun
3631*4882a593Smuzhiyun total += bw_percentage[i];
3632*4882a593Smuzhiyun if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
3633*4882a593Smuzhiyun equal_priority = 1;
3634*4882a593Smuzhiyun break;
3635*4882a593Smuzhiyun }
3636*4882a593Smuzhiyun }
3637*4882a593Smuzhiyun }
3638*4882a593Smuzhiyun
3639*4882a593Smuzhiyun if (!equal_priority) {
3640*4882a593Smuzhiyun /* Is all the bandwidth consumed? */
3641*4882a593Smuzhiyun if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
3642*4882a593Smuzhiyun if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
3643*4882a593Smuzhiyun /* Split rest of bw equally among next VPs*/
3644*4882a593Smuzhiyun band_width =
3645*4882a593Smuzhiyun (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
3646*4882a593Smuzhiyun (VXGE_HW_MAX_VIRTUAL_PATHS - i);
3647*4882a593Smuzhiyun if (band_width < 2) /* min of 2% */
3648*4882a593Smuzhiyun equal_priority = 1;
3649*4882a593Smuzhiyun else {
3650*4882a593Smuzhiyun for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
3651*4882a593Smuzhiyun i++)
3652*4882a593Smuzhiyun bw_percentage[i] =
3653*4882a593Smuzhiyun band_width;
3654*4882a593Smuzhiyun }
3655*4882a593Smuzhiyun }
3656*4882a593Smuzhiyun } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
3657*4882a593Smuzhiyun equal_priority = 1;
3658*4882a593Smuzhiyun }
3659*4882a593Smuzhiyun
3660*4882a593Smuzhiyun if (equal_priority) {
3661*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
3662*4882a593Smuzhiyun "%s: Assigning equal bandwidth to all the vpaths",
3663*4882a593Smuzhiyun VXGE_DRIVER_NAME);
3664*4882a593Smuzhiyun bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
3665*4882a593Smuzhiyun VXGE_HW_MAX_VIRTUAL_PATHS;
3666*4882a593Smuzhiyun for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3667*4882a593Smuzhiyun bw_percentage[i] = bw_percentage[0];
3668*4882a593Smuzhiyun }
3669*4882a593Smuzhiyun }
3670*4882a593Smuzhiyun
3671*4882a593Smuzhiyun /*
3672*4882a593Smuzhiyun * Vpath configuration
3673*4882a593Smuzhiyun */
vxge_config_vpaths(struct vxge_hw_device_config * device_config,u64 vpath_mask,struct vxge_config * config_param)3674*4882a593Smuzhiyun static int vxge_config_vpaths(struct vxge_hw_device_config *device_config,
3675*4882a593Smuzhiyun u64 vpath_mask, struct vxge_config *config_param)
3676*4882a593Smuzhiyun {
3677*4882a593Smuzhiyun int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
3678*4882a593Smuzhiyun u32 txdl_size, txdl_per_memblock;
3679*4882a593Smuzhiyun
3680*4882a593Smuzhiyun temp = driver_config->vpath_per_dev;
3681*4882a593Smuzhiyun if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
3682*4882a593Smuzhiyun (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
3683*4882a593Smuzhiyun /* No more CPU. Return vpath number as zero.*/
3684*4882a593Smuzhiyun if (driver_config->g_no_cpus == -1)
3685*4882a593Smuzhiyun return 0;
3686*4882a593Smuzhiyun
3687*4882a593Smuzhiyun if (!driver_config->g_no_cpus)
3688*4882a593Smuzhiyun driver_config->g_no_cpus =
3689*4882a593Smuzhiyun netif_get_num_default_rss_queues();
3690*4882a593Smuzhiyun
3691*4882a593Smuzhiyun driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
3692*4882a593Smuzhiyun if (!driver_config->vpath_per_dev)
3693*4882a593Smuzhiyun driver_config->vpath_per_dev = 1;
3694*4882a593Smuzhiyun
3695*4882a593Smuzhiyun for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3696*4882a593Smuzhiyun if (!vxge_bVALn(vpath_mask, i, 1))
3697*4882a593Smuzhiyun continue;
3698*4882a593Smuzhiyun else
3699*4882a593Smuzhiyun default_no_vpath++;
3700*4882a593Smuzhiyun if (default_no_vpath < driver_config->vpath_per_dev)
3701*4882a593Smuzhiyun driver_config->vpath_per_dev = default_no_vpath;
3702*4882a593Smuzhiyun
3703*4882a593Smuzhiyun driver_config->g_no_cpus = driver_config->g_no_cpus -
3704*4882a593Smuzhiyun (driver_config->vpath_per_dev * 2);
3705*4882a593Smuzhiyun if (driver_config->g_no_cpus <= 0)
3706*4882a593Smuzhiyun driver_config->g_no_cpus = -1;
3707*4882a593Smuzhiyun }
3708*4882a593Smuzhiyun
3709*4882a593Smuzhiyun if (driver_config->vpath_per_dev == 1) {
3710*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE,
3711*4882a593Smuzhiyun "%s: Disable tx and rx steering, "
3712*4882a593Smuzhiyun "as single vpath is configured", VXGE_DRIVER_NAME);
3713*4882a593Smuzhiyun config_param->rth_steering = NO_STEERING;
3714*4882a593Smuzhiyun config_param->tx_steering_type = NO_STEERING;
3715*4882a593Smuzhiyun device_config->rth_en = 0;
3716*4882a593Smuzhiyun }
3717*4882a593Smuzhiyun
3718*4882a593Smuzhiyun /* configure bandwidth */
3719*4882a593Smuzhiyun for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3720*4882a593Smuzhiyun device_config->vp_config[i].min_bandwidth = bw_percentage[i];
3721*4882a593Smuzhiyun
3722*4882a593Smuzhiyun for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3723*4882a593Smuzhiyun device_config->vp_config[i].vp_id = i;
3724*4882a593Smuzhiyun device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
3725*4882a593Smuzhiyun if (no_of_vpaths < driver_config->vpath_per_dev) {
3726*4882a593Smuzhiyun if (!vxge_bVALn(vpath_mask, i, 1)) {
3727*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE,
3728*4882a593Smuzhiyun "%s: vpath: %d is not available",
3729*4882a593Smuzhiyun VXGE_DRIVER_NAME, i);
3730*4882a593Smuzhiyun continue;
3731*4882a593Smuzhiyun } else {
3732*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE,
3733*4882a593Smuzhiyun "%s: vpath: %d available",
3734*4882a593Smuzhiyun VXGE_DRIVER_NAME, i);
3735*4882a593Smuzhiyun no_of_vpaths++;
3736*4882a593Smuzhiyun }
3737*4882a593Smuzhiyun } else {
3738*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE,
3739*4882a593Smuzhiyun "%s: vpath: %d is not configured, "
3740*4882a593Smuzhiyun "max_config_vpath exceeded",
3741*4882a593Smuzhiyun VXGE_DRIVER_NAME, i);
3742*4882a593Smuzhiyun break;
3743*4882a593Smuzhiyun }
3744*4882a593Smuzhiyun
3745*4882a593Smuzhiyun /* Configure Tx fifo's */
3746*4882a593Smuzhiyun device_config->vp_config[i].fifo.enable =
3747*4882a593Smuzhiyun VXGE_HW_FIFO_ENABLE;
3748*4882a593Smuzhiyun device_config->vp_config[i].fifo.max_frags =
3749*4882a593Smuzhiyun MAX_SKB_FRAGS + 1;
3750*4882a593Smuzhiyun device_config->vp_config[i].fifo.memblock_size =
3751*4882a593Smuzhiyun VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
3752*4882a593Smuzhiyun
3753*4882a593Smuzhiyun txdl_size = device_config->vp_config[i].fifo.max_frags *
3754*4882a593Smuzhiyun sizeof(struct vxge_hw_fifo_txd);
3755*4882a593Smuzhiyun txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
3756*4882a593Smuzhiyun
3757*4882a593Smuzhiyun device_config->vp_config[i].fifo.fifo_blocks =
3758*4882a593Smuzhiyun ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
3759*4882a593Smuzhiyun
3760*4882a593Smuzhiyun device_config->vp_config[i].fifo.intr =
3761*4882a593Smuzhiyun VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
3762*4882a593Smuzhiyun
3763*4882a593Smuzhiyun /* Configure tti properties */
3764*4882a593Smuzhiyun device_config->vp_config[i].tti.intr_enable =
3765*4882a593Smuzhiyun VXGE_HW_TIM_INTR_ENABLE;
3766*4882a593Smuzhiyun
3767*4882a593Smuzhiyun device_config->vp_config[i].tti.btimer_val =
3768*4882a593Smuzhiyun (VXGE_TTI_BTIMER_VAL * 1000) / 272;
3769*4882a593Smuzhiyun
3770*4882a593Smuzhiyun device_config->vp_config[i].tti.timer_ac_en =
3771*4882a593Smuzhiyun VXGE_HW_TIM_TIMER_AC_ENABLE;
3772*4882a593Smuzhiyun
3773*4882a593Smuzhiyun /* For msi-x with napi (each vector has a handler of its own) -
3774*4882a593Smuzhiyun * Set CI to OFF for all vpaths
3775*4882a593Smuzhiyun */
3776*4882a593Smuzhiyun device_config->vp_config[i].tti.timer_ci_en =
3777*4882a593Smuzhiyun VXGE_HW_TIM_TIMER_CI_DISABLE;
3778*4882a593Smuzhiyun
3779*4882a593Smuzhiyun device_config->vp_config[i].tti.timer_ri_en =
3780*4882a593Smuzhiyun VXGE_HW_TIM_TIMER_RI_DISABLE;
3781*4882a593Smuzhiyun
3782*4882a593Smuzhiyun device_config->vp_config[i].tti.util_sel =
3783*4882a593Smuzhiyun VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
3784*4882a593Smuzhiyun
3785*4882a593Smuzhiyun device_config->vp_config[i].tti.ltimer_val =
3786*4882a593Smuzhiyun (VXGE_TTI_LTIMER_VAL * 1000) / 272;
3787*4882a593Smuzhiyun
3788*4882a593Smuzhiyun device_config->vp_config[i].tti.rtimer_val =
3789*4882a593Smuzhiyun (VXGE_TTI_RTIMER_VAL * 1000) / 272;
3790*4882a593Smuzhiyun
3791*4882a593Smuzhiyun device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
3792*4882a593Smuzhiyun device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
3793*4882a593Smuzhiyun device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
3794*4882a593Smuzhiyun device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
3795*4882a593Smuzhiyun device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
3796*4882a593Smuzhiyun device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
3797*4882a593Smuzhiyun device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
3798*4882a593Smuzhiyun
3799*4882a593Smuzhiyun /* Configure Rx rings */
3800*4882a593Smuzhiyun device_config->vp_config[i].ring.enable =
3801*4882a593Smuzhiyun VXGE_HW_RING_ENABLE;
3802*4882a593Smuzhiyun
3803*4882a593Smuzhiyun device_config->vp_config[i].ring.ring_blocks =
3804*4882a593Smuzhiyun VXGE_HW_DEF_RING_BLOCKS;
3805*4882a593Smuzhiyun
3806*4882a593Smuzhiyun device_config->vp_config[i].ring.buffer_mode =
3807*4882a593Smuzhiyun VXGE_HW_RING_RXD_BUFFER_MODE_1;
3808*4882a593Smuzhiyun
3809*4882a593Smuzhiyun device_config->vp_config[i].ring.rxds_limit =
3810*4882a593Smuzhiyun VXGE_HW_DEF_RING_RXDS_LIMIT;
3811*4882a593Smuzhiyun
3812*4882a593Smuzhiyun device_config->vp_config[i].ring.scatter_mode =
3813*4882a593Smuzhiyun VXGE_HW_RING_SCATTER_MODE_A;
3814*4882a593Smuzhiyun
3815*4882a593Smuzhiyun /* Configure rti properties */
3816*4882a593Smuzhiyun device_config->vp_config[i].rti.intr_enable =
3817*4882a593Smuzhiyun VXGE_HW_TIM_INTR_ENABLE;
3818*4882a593Smuzhiyun
3819*4882a593Smuzhiyun device_config->vp_config[i].rti.btimer_val =
3820*4882a593Smuzhiyun (VXGE_RTI_BTIMER_VAL * 1000)/272;
3821*4882a593Smuzhiyun
3822*4882a593Smuzhiyun device_config->vp_config[i].rti.timer_ac_en =
3823*4882a593Smuzhiyun VXGE_HW_TIM_TIMER_AC_ENABLE;
3824*4882a593Smuzhiyun
3825*4882a593Smuzhiyun device_config->vp_config[i].rti.timer_ci_en =
3826*4882a593Smuzhiyun VXGE_HW_TIM_TIMER_CI_DISABLE;
3827*4882a593Smuzhiyun
3828*4882a593Smuzhiyun device_config->vp_config[i].rti.timer_ri_en =
3829*4882a593Smuzhiyun VXGE_HW_TIM_TIMER_RI_DISABLE;
3830*4882a593Smuzhiyun
3831*4882a593Smuzhiyun device_config->vp_config[i].rti.util_sel =
3832*4882a593Smuzhiyun VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
3833*4882a593Smuzhiyun
3834*4882a593Smuzhiyun device_config->vp_config[i].rti.urange_a =
3835*4882a593Smuzhiyun RTI_RX_URANGE_A;
3836*4882a593Smuzhiyun device_config->vp_config[i].rti.urange_b =
3837*4882a593Smuzhiyun RTI_RX_URANGE_B;
3838*4882a593Smuzhiyun device_config->vp_config[i].rti.urange_c =
3839*4882a593Smuzhiyun RTI_RX_URANGE_C;
3840*4882a593Smuzhiyun device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
3841*4882a593Smuzhiyun device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
3842*4882a593Smuzhiyun device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
3843*4882a593Smuzhiyun device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
3844*4882a593Smuzhiyun
3845*4882a593Smuzhiyun device_config->vp_config[i].rti.rtimer_val =
3846*4882a593Smuzhiyun (VXGE_RTI_RTIMER_VAL * 1000) / 272;
3847*4882a593Smuzhiyun
3848*4882a593Smuzhiyun device_config->vp_config[i].rti.ltimer_val =
3849*4882a593Smuzhiyun (VXGE_RTI_LTIMER_VAL * 1000) / 272;
3850*4882a593Smuzhiyun
3851*4882a593Smuzhiyun device_config->vp_config[i].rpa_strip_vlan_tag =
3852*4882a593Smuzhiyun vlan_tag_strip;
3853*4882a593Smuzhiyun }
3854*4882a593Smuzhiyun
3855*4882a593Smuzhiyun driver_config->vpath_per_dev = temp;
3856*4882a593Smuzhiyun return no_of_vpaths;
3857*4882a593Smuzhiyun }
3858*4882a593Smuzhiyun
3859*4882a593Smuzhiyun /* initialize device configuratrions */
vxge_device_config_init(struct vxge_hw_device_config * device_config,int * intr_type)3860*4882a593Smuzhiyun static void vxge_device_config_init(struct vxge_hw_device_config *device_config,
3861*4882a593Smuzhiyun int *intr_type)
3862*4882a593Smuzhiyun {
3863*4882a593Smuzhiyun /* Used for CQRQ/SRQ. */
3864*4882a593Smuzhiyun device_config->dma_blockpool_initial =
3865*4882a593Smuzhiyun VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
3866*4882a593Smuzhiyun
3867*4882a593Smuzhiyun device_config->dma_blockpool_max =
3868*4882a593Smuzhiyun VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
3869*4882a593Smuzhiyun
3870*4882a593Smuzhiyun if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
3871*4882a593Smuzhiyun max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
3872*4882a593Smuzhiyun
3873*4882a593Smuzhiyun if (!IS_ENABLED(CONFIG_PCI_MSI)) {
3874*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
3875*4882a593Smuzhiyun "%s: This Kernel does not support "
3876*4882a593Smuzhiyun "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
3877*4882a593Smuzhiyun *intr_type = INTA;
3878*4882a593Smuzhiyun }
3879*4882a593Smuzhiyun
3880*4882a593Smuzhiyun /* Configure whether MSI-X or IRQL. */
3881*4882a593Smuzhiyun switch (*intr_type) {
3882*4882a593Smuzhiyun case INTA:
3883*4882a593Smuzhiyun device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
3884*4882a593Smuzhiyun break;
3885*4882a593Smuzhiyun
3886*4882a593Smuzhiyun case MSI_X:
3887*4882a593Smuzhiyun device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX_ONE_SHOT;
3888*4882a593Smuzhiyun break;
3889*4882a593Smuzhiyun }
3890*4882a593Smuzhiyun
3891*4882a593Smuzhiyun /* Timer period between device poll */
3892*4882a593Smuzhiyun device_config->device_poll_millis = VXGE_TIMER_DELAY;
3893*4882a593Smuzhiyun
3894*4882a593Smuzhiyun /* Configure mac based steering. */
3895*4882a593Smuzhiyun device_config->rts_mac_en = addr_learn_en;
3896*4882a593Smuzhiyun
3897*4882a593Smuzhiyun /* Configure Vpaths */
3898*4882a593Smuzhiyun device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
3899*4882a593Smuzhiyun
3900*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
3901*4882a593Smuzhiyun __func__);
3902*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
3903*4882a593Smuzhiyun device_config->intr_mode);
3904*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
3905*4882a593Smuzhiyun device_config->device_poll_millis);
3906*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
3907*4882a593Smuzhiyun device_config->rth_en);
3908*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
3909*4882a593Smuzhiyun device_config->rth_it_type);
3910*4882a593Smuzhiyun }
3911*4882a593Smuzhiyun
vxge_print_parm(struct vxgedev * vdev,u64 vpath_mask)3912*4882a593Smuzhiyun static void vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
3913*4882a593Smuzhiyun {
3914*4882a593Smuzhiyun int i;
3915*4882a593Smuzhiyun
3916*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3917*4882a593Smuzhiyun "%s: %d Vpath(s) opened",
3918*4882a593Smuzhiyun vdev->ndev->name, vdev->no_of_vpath);
3919*4882a593Smuzhiyun
3920*4882a593Smuzhiyun switch (vdev->config.intr_type) {
3921*4882a593Smuzhiyun case INTA:
3922*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3923*4882a593Smuzhiyun "%s: Interrupt type INTA", vdev->ndev->name);
3924*4882a593Smuzhiyun break;
3925*4882a593Smuzhiyun
3926*4882a593Smuzhiyun case MSI_X:
3927*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3928*4882a593Smuzhiyun "%s: Interrupt type MSI-X", vdev->ndev->name);
3929*4882a593Smuzhiyun break;
3930*4882a593Smuzhiyun }
3931*4882a593Smuzhiyun
3932*4882a593Smuzhiyun if (vdev->config.rth_steering) {
3933*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3934*4882a593Smuzhiyun "%s: RTH steering enabled for TCP_IPV4",
3935*4882a593Smuzhiyun vdev->ndev->name);
3936*4882a593Smuzhiyun } else {
3937*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3938*4882a593Smuzhiyun "%s: RTH steering disabled", vdev->ndev->name);
3939*4882a593Smuzhiyun }
3940*4882a593Smuzhiyun
3941*4882a593Smuzhiyun switch (vdev->config.tx_steering_type) {
3942*4882a593Smuzhiyun case NO_STEERING:
3943*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3944*4882a593Smuzhiyun "%s: Tx steering disabled", vdev->ndev->name);
3945*4882a593Smuzhiyun break;
3946*4882a593Smuzhiyun case TX_PRIORITY_STEERING:
3947*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3948*4882a593Smuzhiyun "%s: Unsupported tx steering option",
3949*4882a593Smuzhiyun vdev->ndev->name);
3950*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3951*4882a593Smuzhiyun "%s: Tx steering disabled", vdev->ndev->name);
3952*4882a593Smuzhiyun vdev->config.tx_steering_type = 0;
3953*4882a593Smuzhiyun break;
3954*4882a593Smuzhiyun case TX_VLAN_STEERING:
3955*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3956*4882a593Smuzhiyun "%s: Unsupported tx steering option",
3957*4882a593Smuzhiyun vdev->ndev->name);
3958*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3959*4882a593Smuzhiyun "%s: Tx steering disabled", vdev->ndev->name);
3960*4882a593Smuzhiyun vdev->config.tx_steering_type = 0;
3961*4882a593Smuzhiyun break;
3962*4882a593Smuzhiyun case TX_MULTIQ_STEERING:
3963*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3964*4882a593Smuzhiyun "%s: Tx multiqueue steering enabled",
3965*4882a593Smuzhiyun vdev->ndev->name);
3966*4882a593Smuzhiyun break;
3967*4882a593Smuzhiyun case TX_PORT_STEERING:
3968*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3969*4882a593Smuzhiyun "%s: Tx port steering enabled",
3970*4882a593Smuzhiyun vdev->ndev->name);
3971*4882a593Smuzhiyun break;
3972*4882a593Smuzhiyun default:
3973*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
3974*4882a593Smuzhiyun "%s: Unsupported tx steering type",
3975*4882a593Smuzhiyun vdev->ndev->name);
3976*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3977*4882a593Smuzhiyun "%s: Tx steering disabled", vdev->ndev->name);
3978*4882a593Smuzhiyun vdev->config.tx_steering_type = 0;
3979*4882a593Smuzhiyun }
3980*4882a593Smuzhiyun
3981*4882a593Smuzhiyun if (vdev->config.addr_learn_en)
3982*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3983*4882a593Smuzhiyun "%s: MAC Address learning enabled", vdev->ndev->name);
3984*4882a593Smuzhiyun
3985*4882a593Smuzhiyun for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3986*4882a593Smuzhiyun if (!vxge_bVALn(vpath_mask, i, 1))
3987*4882a593Smuzhiyun continue;
3988*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE,
3989*4882a593Smuzhiyun "%s: MTU size - %d", vdev->ndev->name,
3990*4882a593Smuzhiyun ((vdev->devh))->
3991*4882a593Smuzhiyun config.vp_config[i].mtu);
3992*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
3993*4882a593Smuzhiyun "%s: VLAN tag stripping %s", vdev->ndev->name,
3994*4882a593Smuzhiyun ((vdev->devh))->
3995*4882a593Smuzhiyun config.vp_config[i].rpa_strip_vlan_tag
3996*4882a593Smuzhiyun ? "Enabled" : "Disabled");
3997*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE,
3998*4882a593Smuzhiyun "%s: Max frags : %d", vdev->ndev->name,
3999*4882a593Smuzhiyun ((vdev->devh))->
4000*4882a593Smuzhiyun config.vp_config[i].fifo.max_frags);
4001*4882a593Smuzhiyun break;
4002*4882a593Smuzhiyun }
4003*4882a593Smuzhiyun }
4004*4882a593Smuzhiyun
4005*4882a593Smuzhiyun /**
4006*4882a593Smuzhiyun * vxge_pm_suspend - vxge power management suspend entry point
4007*4882a593Smuzhiyun * @dev_d: device pointer
4008*4882a593Smuzhiyun *
4009*4882a593Smuzhiyun */
vxge_pm_suspend(struct device * dev_d)4010*4882a593Smuzhiyun static int __maybe_unused vxge_pm_suspend(struct device *dev_d)
4011*4882a593Smuzhiyun {
4012*4882a593Smuzhiyun return -ENOSYS;
4013*4882a593Smuzhiyun }
4014*4882a593Smuzhiyun /**
4015*4882a593Smuzhiyun * vxge_pm_resume - vxge power management resume entry point
4016*4882a593Smuzhiyun * @dev_d: device pointer
4017*4882a593Smuzhiyun *
4018*4882a593Smuzhiyun */
vxge_pm_resume(struct device * dev_d)4019*4882a593Smuzhiyun static int __maybe_unused vxge_pm_resume(struct device *dev_d)
4020*4882a593Smuzhiyun {
4021*4882a593Smuzhiyun return -ENOSYS;
4022*4882a593Smuzhiyun }
4023*4882a593Smuzhiyun
4024*4882a593Smuzhiyun /**
4025*4882a593Smuzhiyun * vxge_io_error_detected - called when PCI error is detected
4026*4882a593Smuzhiyun * @pdev: Pointer to PCI device
4027*4882a593Smuzhiyun * @state: The current pci connection state
4028*4882a593Smuzhiyun *
4029*4882a593Smuzhiyun * This function is called after a PCI bus error affecting
4030*4882a593Smuzhiyun * this device has been detected.
4031*4882a593Smuzhiyun */
vxge_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)4032*4882a593Smuzhiyun static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
4033*4882a593Smuzhiyun pci_channel_state_t state)
4034*4882a593Smuzhiyun {
4035*4882a593Smuzhiyun struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
4036*4882a593Smuzhiyun struct net_device *netdev = hldev->ndev;
4037*4882a593Smuzhiyun
4038*4882a593Smuzhiyun netif_device_detach(netdev);
4039*4882a593Smuzhiyun
4040*4882a593Smuzhiyun if (state == pci_channel_io_perm_failure)
4041*4882a593Smuzhiyun return PCI_ERS_RESULT_DISCONNECT;
4042*4882a593Smuzhiyun
4043*4882a593Smuzhiyun if (netif_running(netdev)) {
4044*4882a593Smuzhiyun /* Bring down the card, while avoiding PCI I/O */
4045*4882a593Smuzhiyun do_vxge_close(netdev, 0);
4046*4882a593Smuzhiyun }
4047*4882a593Smuzhiyun
4048*4882a593Smuzhiyun pci_disable_device(pdev);
4049*4882a593Smuzhiyun
4050*4882a593Smuzhiyun return PCI_ERS_RESULT_NEED_RESET;
4051*4882a593Smuzhiyun }
4052*4882a593Smuzhiyun
4053*4882a593Smuzhiyun /**
4054*4882a593Smuzhiyun * vxge_io_slot_reset - called after the pci bus has been reset.
4055*4882a593Smuzhiyun * @pdev: Pointer to PCI device
4056*4882a593Smuzhiyun *
4057*4882a593Smuzhiyun * Restart the card from scratch, as if from a cold-boot.
4058*4882a593Smuzhiyun * At this point, the card has exprienced a hard reset,
4059*4882a593Smuzhiyun * followed by fixups by BIOS, and has its config space
4060*4882a593Smuzhiyun * set up identically to what it was at cold boot.
4061*4882a593Smuzhiyun */
vxge_io_slot_reset(struct pci_dev * pdev)4062*4882a593Smuzhiyun static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
4063*4882a593Smuzhiyun {
4064*4882a593Smuzhiyun struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
4065*4882a593Smuzhiyun struct net_device *netdev = hldev->ndev;
4066*4882a593Smuzhiyun
4067*4882a593Smuzhiyun struct vxgedev *vdev = netdev_priv(netdev);
4068*4882a593Smuzhiyun
4069*4882a593Smuzhiyun if (pci_enable_device(pdev)) {
4070*4882a593Smuzhiyun netdev_err(netdev, "Cannot re-enable device after reset\n");
4071*4882a593Smuzhiyun return PCI_ERS_RESULT_DISCONNECT;
4072*4882a593Smuzhiyun }
4073*4882a593Smuzhiyun
4074*4882a593Smuzhiyun pci_set_master(pdev);
4075*4882a593Smuzhiyun do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
4076*4882a593Smuzhiyun
4077*4882a593Smuzhiyun return PCI_ERS_RESULT_RECOVERED;
4078*4882a593Smuzhiyun }
4079*4882a593Smuzhiyun
4080*4882a593Smuzhiyun /**
4081*4882a593Smuzhiyun * vxge_io_resume - called when traffic can start flowing again.
4082*4882a593Smuzhiyun * @pdev: Pointer to PCI device
4083*4882a593Smuzhiyun *
4084*4882a593Smuzhiyun * This callback is called when the error recovery driver tells
4085*4882a593Smuzhiyun * us that its OK to resume normal operation.
4086*4882a593Smuzhiyun */
vxge_io_resume(struct pci_dev * pdev)4087*4882a593Smuzhiyun static void vxge_io_resume(struct pci_dev *pdev)
4088*4882a593Smuzhiyun {
4089*4882a593Smuzhiyun struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
4090*4882a593Smuzhiyun struct net_device *netdev = hldev->ndev;
4091*4882a593Smuzhiyun
4092*4882a593Smuzhiyun if (netif_running(netdev)) {
4093*4882a593Smuzhiyun if (vxge_open(netdev)) {
4094*4882a593Smuzhiyun netdev_err(netdev,
4095*4882a593Smuzhiyun "Can't bring device back up after reset\n");
4096*4882a593Smuzhiyun return;
4097*4882a593Smuzhiyun }
4098*4882a593Smuzhiyun }
4099*4882a593Smuzhiyun
4100*4882a593Smuzhiyun netif_device_attach(netdev);
4101*4882a593Smuzhiyun }
4102*4882a593Smuzhiyun
vxge_get_num_vfs(u64 function_mode)4103*4882a593Smuzhiyun static inline u32 vxge_get_num_vfs(u64 function_mode)
4104*4882a593Smuzhiyun {
4105*4882a593Smuzhiyun u32 num_functions = 0;
4106*4882a593Smuzhiyun
4107*4882a593Smuzhiyun switch (function_mode) {
4108*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4109*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_SRIOV_8:
4110*4882a593Smuzhiyun num_functions = 8;
4111*4882a593Smuzhiyun break;
4112*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4113*4882a593Smuzhiyun num_functions = 1;
4114*4882a593Smuzhiyun break;
4115*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_SRIOV:
4116*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_MRIOV:
4117*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
4118*4882a593Smuzhiyun num_functions = 17;
4119*4882a593Smuzhiyun break;
4120*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_SRIOV_4:
4121*4882a593Smuzhiyun num_functions = 4;
4122*4882a593Smuzhiyun break;
4123*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
4124*4882a593Smuzhiyun num_functions = 2;
4125*4882a593Smuzhiyun break;
4126*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_MRIOV_8:
4127*4882a593Smuzhiyun num_functions = 8; /* TODO */
4128*4882a593Smuzhiyun break;
4129*4882a593Smuzhiyun }
4130*4882a593Smuzhiyun return num_functions;
4131*4882a593Smuzhiyun }
4132*4882a593Smuzhiyun
vxge_fw_upgrade(struct vxgedev * vdev,char * fw_name,int override)4133*4882a593Smuzhiyun int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
4134*4882a593Smuzhiyun {
4135*4882a593Smuzhiyun struct __vxge_hw_device *hldev = vdev->devh;
4136*4882a593Smuzhiyun u32 maj, min, bld, cmaj, cmin, cbld;
4137*4882a593Smuzhiyun enum vxge_hw_status status;
4138*4882a593Smuzhiyun const struct firmware *fw;
4139*4882a593Smuzhiyun int ret;
4140*4882a593Smuzhiyun
4141*4882a593Smuzhiyun ret = request_firmware(&fw, fw_name, &vdev->pdev->dev);
4142*4882a593Smuzhiyun if (ret) {
4143*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
4144*4882a593Smuzhiyun VXGE_DRIVER_NAME, fw_name);
4145*4882a593Smuzhiyun goto out;
4146*4882a593Smuzhiyun }
4147*4882a593Smuzhiyun
4148*4882a593Smuzhiyun /* Load the new firmware onto the adapter */
4149*4882a593Smuzhiyun status = vxge_update_fw_image(hldev, fw->data, fw->size);
4150*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
4151*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4152*4882a593Smuzhiyun "%s: FW image download to adapter failed '%s'.",
4153*4882a593Smuzhiyun VXGE_DRIVER_NAME, fw_name);
4154*4882a593Smuzhiyun ret = -EIO;
4155*4882a593Smuzhiyun goto out;
4156*4882a593Smuzhiyun }
4157*4882a593Smuzhiyun
4158*4882a593Smuzhiyun /* Read the version of the new firmware */
4159*4882a593Smuzhiyun status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
4160*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
4161*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4162*4882a593Smuzhiyun "%s: Upgrade read version failed '%s'.",
4163*4882a593Smuzhiyun VXGE_DRIVER_NAME, fw_name);
4164*4882a593Smuzhiyun ret = -EIO;
4165*4882a593Smuzhiyun goto out;
4166*4882a593Smuzhiyun }
4167*4882a593Smuzhiyun
4168*4882a593Smuzhiyun cmaj = vdev->config.device_hw_info.fw_version.major;
4169*4882a593Smuzhiyun cmin = vdev->config.device_hw_info.fw_version.minor;
4170*4882a593Smuzhiyun cbld = vdev->config.device_hw_info.fw_version.build;
4171*4882a593Smuzhiyun /* It's possible the version in /lib/firmware is not the latest version.
4172*4882a593Smuzhiyun * If so, we could get into a loop of trying to upgrade to the latest
4173*4882a593Smuzhiyun * and flashing the older version.
4174*4882a593Smuzhiyun */
4175*4882a593Smuzhiyun if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
4176*4882a593Smuzhiyun !override) {
4177*4882a593Smuzhiyun ret = -EINVAL;
4178*4882a593Smuzhiyun goto out;
4179*4882a593Smuzhiyun }
4180*4882a593Smuzhiyun
4181*4882a593Smuzhiyun printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
4182*4882a593Smuzhiyun maj, min, bld);
4183*4882a593Smuzhiyun
4184*4882a593Smuzhiyun /* Flash the adapter with the new firmware */
4185*4882a593Smuzhiyun status = vxge_hw_flash_fw(hldev);
4186*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
4187*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
4188*4882a593Smuzhiyun VXGE_DRIVER_NAME, fw_name);
4189*4882a593Smuzhiyun ret = -EIO;
4190*4882a593Smuzhiyun goto out;
4191*4882a593Smuzhiyun }
4192*4882a593Smuzhiyun
4193*4882a593Smuzhiyun printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
4194*4882a593Smuzhiyun "hard reset before using, thus requiring a system reboot or a "
4195*4882a593Smuzhiyun "hotplug event.\n");
4196*4882a593Smuzhiyun
4197*4882a593Smuzhiyun out:
4198*4882a593Smuzhiyun release_firmware(fw);
4199*4882a593Smuzhiyun return ret;
4200*4882a593Smuzhiyun }
4201*4882a593Smuzhiyun
vxge_probe_fw_update(struct vxgedev * vdev)4202*4882a593Smuzhiyun static int vxge_probe_fw_update(struct vxgedev *vdev)
4203*4882a593Smuzhiyun {
4204*4882a593Smuzhiyun u32 maj, min, bld;
4205*4882a593Smuzhiyun int ret, gpxe = 0;
4206*4882a593Smuzhiyun char *fw_name;
4207*4882a593Smuzhiyun
4208*4882a593Smuzhiyun maj = vdev->config.device_hw_info.fw_version.major;
4209*4882a593Smuzhiyun min = vdev->config.device_hw_info.fw_version.minor;
4210*4882a593Smuzhiyun bld = vdev->config.device_hw_info.fw_version.build;
4211*4882a593Smuzhiyun
4212*4882a593Smuzhiyun if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
4213*4882a593Smuzhiyun return 0;
4214*4882a593Smuzhiyun
4215*4882a593Smuzhiyun /* Ignore the build number when determining if the current firmware is
4216*4882a593Smuzhiyun * "too new" to load the driver
4217*4882a593Smuzhiyun */
4218*4882a593Smuzhiyun if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
4219*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
4220*4882a593Smuzhiyun "version, unable to load driver\n",
4221*4882a593Smuzhiyun VXGE_DRIVER_NAME);
4222*4882a593Smuzhiyun return -EINVAL;
4223*4882a593Smuzhiyun }
4224*4882a593Smuzhiyun
4225*4882a593Smuzhiyun /* Firmware 1.4.4 and older cannot be upgraded, and is too ancient to
4226*4882a593Smuzhiyun * work with this driver.
4227*4882a593Smuzhiyun */
4228*4882a593Smuzhiyun if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
4229*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
4230*4882a593Smuzhiyun "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
4231*4882a593Smuzhiyun return -EINVAL;
4232*4882a593Smuzhiyun }
4233*4882a593Smuzhiyun
4234*4882a593Smuzhiyun /* If file not specified, determine gPXE or not */
4235*4882a593Smuzhiyun if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
4236*4882a593Smuzhiyun int i;
4237*4882a593Smuzhiyun for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
4238*4882a593Smuzhiyun if (vdev->devh->eprom_versions[i]) {
4239*4882a593Smuzhiyun gpxe = 1;
4240*4882a593Smuzhiyun break;
4241*4882a593Smuzhiyun }
4242*4882a593Smuzhiyun }
4243*4882a593Smuzhiyun if (gpxe)
4244*4882a593Smuzhiyun fw_name = "vxge/X3fw-pxe.ncf";
4245*4882a593Smuzhiyun else
4246*4882a593Smuzhiyun fw_name = "vxge/X3fw.ncf";
4247*4882a593Smuzhiyun
4248*4882a593Smuzhiyun ret = vxge_fw_upgrade(vdev, fw_name, 0);
4249*4882a593Smuzhiyun /* -EINVAL and -ENOENT are not fatal errors for flashing firmware on
4250*4882a593Smuzhiyun * probe, so ignore them
4251*4882a593Smuzhiyun */
4252*4882a593Smuzhiyun if (ret != -EINVAL && ret != -ENOENT)
4253*4882a593Smuzhiyun return -EIO;
4254*4882a593Smuzhiyun else
4255*4882a593Smuzhiyun ret = 0;
4256*4882a593Smuzhiyun
4257*4882a593Smuzhiyun if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
4258*4882a593Smuzhiyun VXGE_FW_VER(maj, min, 0)) {
4259*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
4260*4882a593Smuzhiyun " be used with this driver.",
4261*4882a593Smuzhiyun VXGE_DRIVER_NAME, maj, min, bld);
4262*4882a593Smuzhiyun return -EINVAL;
4263*4882a593Smuzhiyun }
4264*4882a593Smuzhiyun
4265*4882a593Smuzhiyun return ret;
4266*4882a593Smuzhiyun }
4267*4882a593Smuzhiyun
is_sriov_initialized(struct pci_dev * pdev)4268*4882a593Smuzhiyun static int is_sriov_initialized(struct pci_dev *pdev)
4269*4882a593Smuzhiyun {
4270*4882a593Smuzhiyun int pos;
4271*4882a593Smuzhiyun u16 ctrl;
4272*4882a593Smuzhiyun
4273*4882a593Smuzhiyun pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
4274*4882a593Smuzhiyun if (pos) {
4275*4882a593Smuzhiyun pci_read_config_word(pdev, pos + PCI_SRIOV_CTRL, &ctrl);
4276*4882a593Smuzhiyun if (ctrl & PCI_SRIOV_CTRL_VFE)
4277*4882a593Smuzhiyun return 1;
4278*4882a593Smuzhiyun }
4279*4882a593Smuzhiyun return 0;
4280*4882a593Smuzhiyun }
4281*4882a593Smuzhiyun
4282*4882a593Smuzhiyun static const struct vxge_hw_uld_cbs vxge_callbacks = {
4283*4882a593Smuzhiyun .link_up = vxge_callback_link_up,
4284*4882a593Smuzhiyun .link_down = vxge_callback_link_down,
4285*4882a593Smuzhiyun .crit_err = vxge_callback_crit_err,
4286*4882a593Smuzhiyun };
4287*4882a593Smuzhiyun
4288*4882a593Smuzhiyun /**
4289*4882a593Smuzhiyun * vxge_probe
4290*4882a593Smuzhiyun * @pdev : structure containing the PCI related information of the device.
4291*4882a593Smuzhiyun * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
4292*4882a593Smuzhiyun * Description:
4293*4882a593Smuzhiyun * This function is called when a new PCI device gets detected and initializes
4294*4882a593Smuzhiyun * it.
4295*4882a593Smuzhiyun * Return value:
4296*4882a593Smuzhiyun * returns 0 on success and negative on failure.
4297*4882a593Smuzhiyun *
4298*4882a593Smuzhiyun */
4299*4882a593Smuzhiyun static int
vxge_probe(struct pci_dev * pdev,const struct pci_device_id * pre)4300*4882a593Smuzhiyun vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4301*4882a593Smuzhiyun {
4302*4882a593Smuzhiyun struct __vxge_hw_device *hldev;
4303*4882a593Smuzhiyun enum vxge_hw_status status;
4304*4882a593Smuzhiyun int ret;
4305*4882a593Smuzhiyun int high_dma = 0;
4306*4882a593Smuzhiyun u64 vpath_mask = 0;
4307*4882a593Smuzhiyun struct vxgedev *vdev;
4308*4882a593Smuzhiyun struct vxge_config *ll_config = NULL;
4309*4882a593Smuzhiyun struct vxge_hw_device_config *device_config = NULL;
4310*4882a593Smuzhiyun struct vxge_hw_device_attr attr;
4311*4882a593Smuzhiyun int i, j, no_of_vpath = 0, max_vpath_supported = 0;
4312*4882a593Smuzhiyun u8 *macaddr;
4313*4882a593Smuzhiyun struct vxge_mac_addrs *entry;
4314*4882a593Smuzhiyun static int bus = -1, device = -1;
4315*4882a593Smuzhiyun u32 host_type;
4316*4882a593Smuzhiyun u8 new_device = 0;
4317*4882a593Smuzhiyun enum vxge_hw_status is_privileged;
4318*4882a593Smuzhiyun u32 function_mode;
4319*4882a593Smuzhiyun u32 num_vfs = 0;
4320*4882a593Smuzhiyun
4321*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
4322*4882a593Smuzhiyun attr.pdev = pdev;
4323*4882a593Smuzhiyun
4324*4882a593Smuzhiyun /* In SRIOV-17 mode, functions of the same adapter
4325*4882a593Smuzhiyun * can be deployed on different buses
4326*4882a593Smuzhiyun */
4327*4882a593Smuzhiyun if (((bus != pdev->bus->number) || (device != PCI_SLOT(pdev->devfn))) &&
4328*4882a593Smuzhiyun !pdev->is_virtfn)
4329*4882a593Smuzhiyun new_device = 1;
4330*4882a593Smuzhiyun
4331*4882a593Smuzhiyun bus = pdev->bus->number;
4332*4882a593Smuzhiyun device = PCI_SLOT(pdev->devfn);
4333*4882a593Smuzhiyun
4334*4882a593Smuzhiyun if (new_device) {
4335*4882a593Smuzhiyun if (driver_config->config_dev_cnt &&
4336*4882a593Smuzhiyun (driver_config->config_dev_cnt !=
4337*4882a593Smuzhiyun driver_config->total_dev_cnt))
4338*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4339*4882a593Smuzhiyun "%s: Configured %d of %d devices",
4340*4882a593Smuzhiyun VXGE_DRIVER_NAME,
4341*4882a593Smuzhiyun driver_config->config_dev_cnt,
4342*4882a593Smuzhiyun driver_config->total_dev_cnt);
4343*4882a593Smuzhiyun driver_config->config_dev_cnt = 0;
4344*4882a593Smuzhiyun driver_config->total_dev_cnt = 0;
4345*4882a593Smuzhiyun }
4346*4882a593Smuzhiyun
4347*4882a593Smuzhiyun /* Now making the CPU based no of vpath calculation
4348*4882a593Smuzhiyun * applicable for individual functions as well.
4349*4882a593Smuzhiyun */
4350*4882a593Smuzhiyun driver_config->g_no_cpus = 0;
4351*4882a593Smuzhiyun driver_config->vpath_per_dev = max_config_vpath;
4352*4882a593Smuzhiyun
4353*4882a593Smuzhiyun driver_config->total_dev_cnt++;
4354*4882a593Smuzhiyun if (++driver_config->config_dev_cnt > max_config_dev) {
4355*4882a593Smuzhiyun ret = 0;
4356*4882a593Smuzhiyun goto _exit0;
4357*4882a593Smuzhiyun }
4358*4882a593Smuzhiyun
4359*4882a593Smuzhiyun device_config = kzalloc(sizeof(struct vxge_hw_device_config),
4360*4882a593Smuzhiyun GFP_KERNEL);
4361*4882a593Smuzhiyun if (!device_config) {
4362*4882a593Smuzhiyun ret = -ENOMEM;
4363*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4364*4882a593Smuzhiyun "device_config : malloc failed %s %d",
4365*4882a593Smuzhiyun __FILE__, __LINE__);
4366*4882a593Smuzhiyun goto _exit0;
4367*4882a593Smuzhiyun }
4368*4882a593Smuzhiyun
4369*4882a593Smuzhiyun ll_config = kzalloc(sizeof(struct vxge_config), GFP_KERNEL);
4370*4882a593Smuzhiyun if (!ll_config) {
4371*4882a593Smuzhiyun ret = -ENOMEM;
4372*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4373*4882a593Smuzhiyun "device_config : malloc failed %s %d",
4374*4882a593Smuzhiyun __FILE__, __LINE__);
4375*4882a593Smuzhiyun goto _exit0;
4376*4882a593Smuzhiyun }
4377*4882a593Smuzhiyun ll_config->tx_steering_type = TX_MULTIQ_STEERING;
4378*4882a593Smuzhiyun ll_config->intr_type = MSI_X;
4379*4882a593Smuzhiyun ll_config->napi_weight = NEW_NAPI_WEIGHT;
4380*4882a593Smuzhiyun ll_config->rth_steering = RTH_STEERING;
4381*4882a593Smuzhiyun
4382*4882a593Smuzhiyun /* get the default configuration parameters */
4383*4882a593Smuzhiyun vxge_hw_device_config_default_get(device_config);
4384*4882a593Smuzhiyun
4385*4882a593Smuzhiyun /* initialize configuration parameters */
4386*4882a593Smuzhiyun vxge_device_config_init(device_config, &ll_config->intr_type);
4387*4882a593Smuzhiyun
4388*4882a593Smuzhiyun ret = pci_enable_device(pdev);
4389*4882a593Smuzhiyun if (ret) {
4390*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4391*4882a593Smuzhiyun "%s : can not enable PCI device", __func__);
4392*4882a593Smuzhiyun goto _exit0;
4393*4882a593Smuzhiyun }
4394*4882a593Smuzhiyun
4395*4882a593Smuzhiyun if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
4396*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE,
4397*4882a593Smuzhiyun "%s : using 64bit DMA", __func__);
4398*4882a593Smuzhiyun
4399*4882a593Smuzhiyun high_dma = 1;
4400*4882a593Smuzhiyun
4401*4882a593Smuzhiyun if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
4402*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4403*4882a593Smuzhiyun "%s : unable to obtain 64bit DMA for "
4404*4882a593Smuzhiyun "consistent allocations", __func__);
4405*4882a593Smuzhiyun ret = -ENOMEM;
4406*4882a593Smuzhiyun goto _exit1;
4407*4882a593Smuzhiyun }
4408*4882a593Smuzhiyun } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
4409*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE,
4410*4882a593Smuzhiyun "%s : using 32bit DMA", __func__);
4411*4882a593Smuzhiyun } else {
4412*4882a593Smuzhiyun ret = -ENOMEM;
4413*4882a593Smuzhiyun goto _exit1;
4414*4882a593Smuzhiyun }
4415*4882a593Smuzhiyun
4416*4882a593Smuzhiyun ret = pci_request_region(pdev, 0, VXGE_DRIVER_NAME);
4417*4882a593Smuzhiyun if (ret) {
4418*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4419*4882a593Smuzhiyun "%s : request regions failed", __func__);
4420*4882a593Smuzhiyun goto _exit1;
4421*4882a593Smuzhiyun }
4422*4882a593Smuzhiyun
4423*4882a593Smuzhiyun pci_set_master(pdev);
4424*4882a593Smuzhiyun
4425*4882a593Smuzhiyun attr.bar0 = pci_ioremap_bar(pdev, 0);
4426*4882a593Smuzhiyun if (!attr.bar0) {
4427*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4428*4882a593Smuzhiyun "%s : cannot remap io memory bar0", __func__);
4429*4882a593Smuzhiyun ret = -ENODEV;
4430*4882a593Smuzhiyun goto _exit2;
4431*4882a593Smuzhiyun }
4432*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE,
4433*4882a593Smuzhiyun "pci ioremap bar0: %p:0x%llx",
4434*4882a593Smuzhiyun attr.bar0,
4435*4882a593Smuzhiyun (unsigned long long)pci_resource_start(pdev, 0));
4436*4882a593Smuzhiyun
4437*4882a593Smuzhiyun status = vxge_hw_device_hw_info_get(attr.bar0,
4438*4882a593Smuzhiyun &ll_config->device_hw_info);
4439*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
4440*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4441*4882a593Smuzhiyun "%s: Reading of hardware info failed."
4442*4882a593Smuzhiyun "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
4443*4882a593Smuzhiyun ret = -EINVAL;
4444*4882a593Smuzhiyun goto _exit3;
4445*4882a593Smuzhiyun }
4446*4882a593Smuzhiyun
4447*4882a593Smuzhiyun vpath_mask = ll_config->device_hw_info.vpath_mask;
4448*4882a593Smuzhiyun if (vpath_mask == 0) {
4449*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE,
4450*4882a593Smuzhiyun "%s: No vpaths available in device", VXGE_DRIVER_NAME);
4451*4882a593Smuzhiyun ret = -EINVAL;
4452*4882a593Smuzhiyun goto _exit3;
4453*4882a593Smuzhiyun }
4454*4882a593Smuzhiyun
4455*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_TRACE,
4456*4882a593Smuzhiyun "%s:%d Vpath mask = %llx", __func__, __LINE__,
4457*4882a593Smuzhiyun (unsigned long long)vpath_mask);
4458*4882a593Smuzhiyun
4459*4882a593Smuzhiyun function_mode = ll_config->device_hw_info.function_mode;
4460*4882a593Smuzhiyun host_type = ll_config->device_hw_info.host_type;
4461*4882a593Smuzhiyun is_privileged = __vxge_hw_device_is_privilaged(host_type,
4462*4882a593Smuzhiyun ll_config->device_hw_info.func_id);
4463*4882a593Smuzhiyun
4464*4882a593Smuzhiyun /* Check how many vpaths are available */
4465*4882a593Smuzhiyun for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4466*4882a593Smuzhiyun if (!((vpath_mask) & vxge_mBIT(i)))
4467*4882a593Smuzhiyun continue;
4468*4882a593Smuzhiyun max_vpath_supported++;
4469*4882a593Smuzhiyun }
4470*4882a593Smuzhiyun
4471*4882a593Smuzhiyun if (new_device)
4472*4882a593Smuzhiyun num_vfs = vxge_get_num_vfs(function_mode) - 1;
4473*4882a593Smuzhiyun
4474*4882a593Smuzhiyun /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
4475*4882a593Smuzhiyun if (is_sriov(function_mode) && !is_sriov_initialized(pdev) &&
4476*4882a593Smuzhiyun (ll_config->intr_type != INTA)) {
4477*4882a593Smuzhiyun ret = pci_enable_sriov(pdev, num_vfs);
4478*4882a593Smuzhiyun if (ret)
4479*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_ERR,
4480*4882a593Smuzhiyun "Failed in enabling SRIOV mode: %d\n", ret);
4481*4882a593Smuzhiyun /* No need to fail out, as an error here is non-fatal */
4482*4882a593Smuzhiyun }
4483*4882a593Smuzhiyun
4484*4882a593Smuzhiyun /*
4485*4882a593Smuzhiyun * Configure vpaths and get driver configured number of vpaths
4486*4882a593Smuzhiyun * which is less than or equal to the maximum vpaths per function.
4487*4882a593Smuzhiyun */
4488*4882a593Smuzhiyun no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
4489*4882a593Smuzhiyun if (!no_of_vpath) {
4490*4882a593Smuzhiyun vxge_debug_ll_config(VXGE_ERR,
4491*4882a593Smuzhiyun "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
4492*4882a593Smuzhiyun ret = 0;
4493*4882a593Smuzhiyun goto _exit3;
4494*4882a593Smuzhiyun }
4495*4882a593Smuzhiyun
4496*4882a593Smuzhiyun /* Setting driver callbacks */
4497*4882a593Smuzhiyun attr.uld_callbacks = &vxge_callbacks;
4498*4882a593Smuzhiyun
4499*4882a593Smuzhiyun status = vxge_hw_device_initialize(&hldev, &attr, device_config);
4500*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
4501*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4502*4882a593Smuzhiyun "Failed to initialize device (%d)", status);
4503*4882a593Smuzhiyun ret = -EINVAL;
4504*4882a593Smuzhiyun goto _exit3;
4505*4882a593Smuzhiyun }
4506*4882a593Smuzhiyun
4507*4882a593Smuzhiyun if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
4508*4882a593Smuzhiyun ll_config->device_hw_info.fw_version.minor,
4509*4882a593Smuzhiyun ll_config->device_hw_info.fw_version.build) >=
4510*4882a593Smuzhiyun VXGE_EPROM_FW_VER) {
4511*4882a593Smuzhiyun struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
4512*4882a593Smuzhiyun
4513*4882a593Smuzhiyun status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
4514*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
4515*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
4516*4882a593Smuzhiyun VXGE_DRIVER_NAME);
4517*4882a593Smuzhiyun /* This is a non-fatal error, continue */
4518*4882a593Smuzhiyun }
4519*4882a593Smuzhiyun
4520*4882a593Smuzhiyun for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
4521*4882a593Smuzhiyun hldev->eprom_versions[i] = img[i].version;
4522*4882a593Smuzhiyun if (!img[i].is_valid)
4523*4882a593Smuzhiyun break;
4524*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
4525*4882a593Smuzhiyun "%d.%d.%d.%d", VXGE_DRIVER_NAME, i,
4526*4882a593Smuzhiyun VXGE_EPROM_IMG_MAJOR(img[i].version),
4527*4882a593Smuzhiyun VXGE_EPROM_IMG_MINOR(img[i].version),
4528*4882a593Smuzhiyun VXGE_EPROM_IMG_FIX(img[i].version),
4529*4882a593Smuzhiyun VXGE_EPROM_IMG_BUILD(img[i].version));
4530*4882a593Smuzhiyun }
4531*4882a593Smuzhiyun }
4532*4882a593Smuzhiyun
4533*4882a593Smuzhiyun /* if FCS stripping is not disabled in MAC fail driver load */
4534*4882a593Smuzhiyun status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
4535*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
4536*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
4537*4882a593Smuzhiyun " failing driver load", VXGE_DRIVER_NAME);
4538*4882a593Smuzhiyun ret = -EINVAL;
4539*4882a593Smuzhiyun goto _exit4;
4540*4882a593Smuzhiyun }
4541*4882a593Smuzhiyun
4542*4882a593Smuzhiyun /* Always enable HWTS. This will always cause the FCS to be invalid,
4543*4882a593Smuzhiyun * due to the fact that HWTS is using the FCS as the location of the
4544*4882a593Smuzhiyun * timestamp. The HW FCS checking will still correctly determine if
4545*4882a593Smuzhiyun * there is a valid checksum, and the FCS is being removed by the driver
4546*4882a593Smuzhiyun * anyway. So no functionality is being lost. Since it is always
4547*4882a593Smuzhiyun * enabled, we now simply use the ioctl call to set whether or not the
4548*4882a593Smuzhiyun * driver should be paying attention to the HWTS.
4549*4882a593Smuzhiyun */
4550*4882a593Smuzhiyun if (is_privileged == VXGE_HW_OK) {
4551*4882a593Smuzhiyun status = vxge_timestamp_config(hldev);
4552*4882a593Smuzhiyun if (status != VXGE_HW_OK) {
4553*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR, "%s: HWTS enable failed",
4554*4882a593Smuzhiyun VXGE_DRIVER_NAME);
4555*4882a593Smuzhiyun ret = -EFAULT;
4556*4882a593Smuzhiyun goto _exit4;
4557*4882a593Smuzhiyun }
4558*4882a593Smuzhiyun }
4559*4882a593Smuzhiyun
4560*4882a593Smuzhiyun vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4561*4882a593Smuzhiyun
4562*4882a593Smuzhiyun /* set private device info */
4563*4882a593Smuzhiyun pci_set_drvdata(pdev, hldev);
4564*4882a593Smuzhiyun
4565*4882a593Smuzhiyun ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
4566*4882a593Smuzhiyun ll_config->addr_learn_en = addr_learn_en;
4567*4882a593Smuzhiyun ll_config->rth_algorithm = RTH_ALG_JENKINS;
4568*4882a593Smuzhiyun ll_config->rth_hash_type_tcpipv4 = 1;
4569*4882a593Smuzhiyun ll_config->rth_hash_type_ipv4 = 0;
4570*4882a593Smuzhiyun ll_config->rth_hash_type_tcpipv6 = 0;
4571*4882a593Smuzhiyun ll_config->rth_hash_type_ipv6 = 0;
4572*4882a593Smuzhiyun ll_config->rth_hash_type_tcpipv6ex = 0;
4573*4882a593Smuzhiyun ll_config->rth_hash_type_ipv6ex = 0;
4574*4882a593Smuzhiyun ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
4575*4882a593Smuzhiyun ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4576*4882a593Smuzhiyun ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4577*4882a593Smuzhiyun
4578*4882a593Smuzhiyun ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
4579*4882a593Smuzhiyun &vdev);
4580*4882a593Smuzhiyun if (ret) {
4581*4882a593Smuzhiyun ret = -EINVAL;
4582*4882a593Smuzhiyun goto _exit4;
4583*4882a593Smuzhiyun }
4584*4882a593Smuzhiyun
4585*4882a593Smuzhiyun ret = vxge_probe_fw_update(vdev);
4586*4882a593Smuzhiyun if (ret)
4587*4882a593Smuzhiyun goto _exit5;
4588*4882a593Smuzhiyun
4589*4882a593Smuzhiyun vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
4590*4882a593Smuzhiyun VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4591*4882a593Smuzhiyun vxge_hw_device_trace_level_get(hldev));
4592*4882a593Smuzhiyun
4593*4882a593Smuzhiyun /* set private HW device info */
4594*4882a593Smuzhiyun vdev->mtu = VXGE_HW_DEFAULT_MTU;
4595*4882a593Smuzhiyun vdev->bar0 = attr.bar0;
4596*4882a593Smuzhiyun vdev->max_vpath_supported = max_vpath_supported;
4597*4882a593Smuzhiyun vdev->no_of_vpath = no_of_vpath;
4598*4882a593Smuzhiyun
4599*4882a593Smuzhiyun /* Virtual Path count */
4600*4882a593Smuzhiyun for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4601*4882a593Smuzhiyun if (!vxge_bVALn(vpath_mask, i, 1))
4602*4882a593Smuzhiyun continue;
4603*4882a593Smuzhiyun if (j >= vdev->no_of_vpath)
4604*4882a593Smuzhiyun break;
4605*4882a593Smuzhiyun
4606*4882a593Smuzhiyun vdev->vpaths[j].is_configured = 1;
4607*4882a593Smuzhiyun vdev->vpaths[j].device_id = i;
4608*4882a593Smuzhiyun vdev->vpaths[j].ring.driver_id = j;
4609*4882a593Smuzhiyun vdev->vpaths[j].vdev = vdev;
4610*4882a593Smuzhiyun vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
4611*4882a593Smuzhiyun memcpy((u8 *)vdev->vpaths[j].macaddr,
4612*4882a593Smuzhiyun ll_config->device_hw_info.mac_addrs[i],
4613*4882a593Smuzhiyun ETH_ALEN);
4614*4882a593Smuzhiyun
4615*4882a593Smuzhiyun /* Initialize the mac address list header */
4616*4882a593Smuzhiyun INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
4617*4882a593Smuzhiyun
4618*4882a593Smuzhiyun vdev->vpaths[j].mac_addr_cnt = 0;
4619*4882a593Smuzhiyun vdev->vpaths[j].mcast_addr_cnt = 0;
4620*4882a593Smuzhiyun j++;
4621*4882a593Smuzhiyun }
4622*4882a593Smuzhiyun vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
4623*4882a593Smuzhiyun vdev->max_config_port = max_config_port;
4624*4882a593Smuzhiyun
4625*4882a593Smuzhiyun vdev->vlan_tag_strip = vlan_tag_strip;
4626*4882a593Smuzhiyun
4627*4882a593Smuzhiyun /* map the hashing selector table to the configured vpaths */
4628*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++)
4629*4882a593Smuzhiyun vdev->vpath_selector[i] = vpath_selector[i];
4630*4882a593Smuzhiyun
4631*4882a593Smuzhiyun macaddr = (u8 *)vdev->vpaths[0].macaddr;
4632*4882a593Smuzhiyun
4633*4882a593Smuzhiyun ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
4634*4882a593Smuzhiyun ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
4635*4882a593Smuzhiyun ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
4636*4882a593Smuzhiyun
4637*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
4638*4882a593Smuzhiyun vdev->ndev->name, ll_config->device_hw_info.serial_number);
4639*4882a593Smuzhiyun
4640*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
4641*4882a593Smuzhiyun vdev->ndev->name, ll_config->device_hw_info.part_number);
4642*4882a593Smuzhiyun
4643*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
4644*4882a593Smuzhiyun vdev->ndev->name, ll_config->device_hw_info.product_desc);
4645*4882a593Smuzhiyun
4646*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
4647*4882a593Smuzhiyun vdev->ndev->name, macaddr);
4648*4882a593Smuzhiyun
4649*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
4650*4882a593Smuzhiyun vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
4651*4882a593Smuzhiyun
4652*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
4653*4882a593Smuzhiyun "%s: Firmware version : %s Date : %s", vdev->ndev->name,
4654*4882a593Smuzhiyun ll_config->device_hw_info.fw_version.version,
4655*4882a593Smuzhiyun ll_config->device_hw_info.fw_date.date);
4656*4882a593Smuzhiyun
4657*4882a593Smuzhiyun if (new_device) {
4658*4882a593Smuzhiyun switch (ll_config->device_hw_info.function_mode) {
4659*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4660*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
4661*4882a593Smuzhiyun "%s: Single Function Mode Enabled", vdev->ndev->name);
4662*4882a593Smuzhiyun break;
4663*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4664*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
4665*4882a593Smuzhiyun "%s: Multi Function Mode Enabled", vdev->ndev->name);
4666*4882a593Smuzhiyun break;
4667*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_SRIOV:
4668*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
4669*4882a593Smuzhiyun "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
4670*4882a593Smuzhiyun break;
4671*4882a593Smuzhiyun case VXGE_HW_FUNCTION_MODE_MRIOV:
4672*4882a593Smuzhiyun vxge_debug_init(VXGE_TRACE,
4673*4882a593Smuzhiyun "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
4674*4882a593Smuzhiyun break;
4675*4882a593Smuzhiyun }
4676*4882a593Smuzhiyun }
4677*4882a593Smuzhiyun
4678*4882a593Smuzhiyun vxge_print_parm(vdev, vpath_mask);
4679*4882a593Smuzhiyun
4680*4882a593Smuzhiyun /* Store the fw version for ethttool option */
4681*4882a593Smuzhiyun strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
4682*4882a593Smuzhiyun memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
4683*4882a593Smuzhiyun
4684*4882a593Smuzhiyun /* Copy the station mac address to the list */
4685*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++) {
4686*4882a593Smuzhiyun entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_KERNEL);
4687*4882a593Smuzhiyun if (NULL == entry) {
4688*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4689*4882a593Smuzhiyun "%s: mac_addr_list : memory allocation failed",
4690*4882a593Smuzhiyun vdev->ndev->name);
4691*4882a593Smuzhiyun ret = -EPERM;
4692*4882a593Smuzhiyun goto _exit6;
4693*4882a593Smuzhiyun }
4694*4882a593Smuzhiyun macaddr = (u8 *)&entry->macaddr;
4695*4882a593Smuzhiyun memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
4696*4882a593Smuzhiyun list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
4697*4882a593Smuzhiyun vdev->vpaths[i].mac_addr_cnt = 1;
4698*4882a593Smuzhiyun }
4699*4882a593Smuzhiyun
4700*4882a593Smuzhiyun kfree(device_config);
4701*4882a593Smuzhiyun
4702*4882a593Smuzhiyun /*
4703*4882a593Smuzhiyun * INTA is shared in multi-function mode. This is unlike the INTA
4704*4882a593Smuzhiyun * implementation in MR mode, where each VH has its own INTA message.
4705*4882a593Smuzhiyun * - INTA is masked (disabled) as long as at least one function sets
4706*4882a593Smuzhiyun * its TITAN_MASK_ALL_INT.ALARM bit.
4707*4882a593Smuzhiyun * - INTA is unmasked (enabled) when all enabled functions have cleared
4708*4882a593Smuzhiyun * their own TITAN_MASK_ALL_INT.ALARM bit.
4709*4882a593Smuzhiyun * The TITAN_MASK_ALL_INT ALARM & TRAFFIC bits are cleared on power up.
4710*4882a593Smuzhiyun * Though this driver leaves the top level interrupts unmasked while
4711*4882a593Smuzhiyun * leaving the required module interrupt bits masked on exit, there
4712*4882a593Smuzhiyun * could be a rougue driver around that does not follow this procedure
4713*4882a593Smuzhiyun * resulting in a failure to generate interrupts. The following code is
4714*4882a593Smuzhiyun * present to prevent such a failure.
4715*4882a593Smuzhiyun */
4716*4882a593Smuzhiyun
4717*4882a593Smuzhiyun if (ll_config->device_hw_info.function_mode ==
4718*4882a593Smuzhiyun VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
4719*4882a593Smuzhiyun if (vdev->config.intr_type == INTA)
4720*4882a593Smuzhiyun vxge_hw_device_unmask_all(hldev);
4721*4882a593Smuzhiyun
4722*4882a593Smuzhiyun vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
4723*4882a593Smuzhiyun vdev->ndev->name, __func__, __LINE__);
4724*4882a593Smuzhiyun
4725*4882a593Smuzhiyun vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4726*4882a593Smuzhiyun VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4727*4882a593Smuzhiyun vxge_hw_device_trace_level_get(hldev));
4728*4882a593Smuzhiyun
4729*4882a593Smuzhiyun kfree(ll_config);
4730*4882a593Smuzhiyun return 0;
4731*4882a593Smuzhiyun
4732*4882a593Smuzhiyun _exit6:
4733*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++)
4734*4882a593Smuzhiyun vxge_free_mac_add_list(&vdev->vpaths[i]);
4735*4882a593Smuzhiyun _exit5:
4736*4882a593Smuzhiyun vxge_device_unregister(hldev);
4737*4882a593Smuzhiyun _exit4:
4738*4882a593Smuzhiyun vxge_hw_device_terminate(hldev);
4739*4882a593Smuzhiyun pci_disable_sriov(pdev);
4740*4882a593Smuzhiyun _exit3:
4741*4882a593Smuzhiyun iounmap(attr.bar0);
4742*4882a593Smuzhiyun _exit2:
4743*4882a593Smuzhiyun pci_release_region(pdev, 0);
4744*4882a593Smuzhiyun _exit1:
4745*4882a593Smuzhiyun pci_disable_device(pdev);
4746*4882a593Smuzhiyun _exit0:
4747*4882a593Smuzhiyun kfree(ll_config);
4748*4882a593Smuzhiyun kfree(device_config);
4749*4882a593Smuzhiyun driver_config->config_dev_cnt--;
4750*4882a593Smuzhiyun driver_config->total_dev_cnt--;
4751*4882a593Smuzhiyun return ret;
4752*4882a593Smuzhiyun }
4753*4882a593Smuzhiyun
4754*4882a593Smuzhiyun /**
4755*4882a593Smuzhiyun * vxge_rem_nic - Free the PCI device
4756*4882a593Smuzhiyun * @pdev: structure containing the PCI related information of the device.
4757*4882a593Smuzhiyun * Description: This function is called by the Pci subsystem to release a
4758*4882a593Smuzhiyun * PCI device and free up all resource held up by the device.
4759*4882a593Smuzhiyun */
vxge_remove(struct pci_dev * pdev)4760*4882a593Smuzhiyun static void vxge_remove(struct pci_dev *pdev)
4761*4882a593Smuzhiyun {
4762*4882a593Smuzhiyun struct __vxge_hw_device *hldev;
4763*4882a593Smuzhiyun struct vxgedev *vdev;
4764*4882a593Smuzhiyun int i;
4765*4882a593Smuzhiyun
4766*4882a593Smuzhiyun hldev = pci_get_drvdata(pdev);
4767*4882a593Smuzhiyun if (hldev == NULL)
4768*4882a593Smuzhiyun return;
4769*4882a593Smuzhiyun
4770*4882a593Smuzhiyun vdev = netdev_priv(hldev->ndev);
4771*4882a593Smuzhiyun
4772*4882a593Smuzhiyun vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
4773*4882a593Smuzhiyun vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
4774*4882a593Smuzhiyun __func__);
4775*4882a593Smuzhiyun
4776*4882a593Smuzhiyun for (i = 0; i < vdev->no_of_vpath; i++)
4777*4882a593Smuzhiyun vxge_free_mac_add_list(&vdev->vpaths[i]);
4778*4882a593Smuzhiyun
4779*4882a593Smuzhiyun vxge_device_unregister(hldev);
4780*4882a593Smuzhiyun /* Do not call pci_disable_sriov here, as it will break child devices */
4781*4882a593Smuzhiyun vxge_hw_device_terminate(hldev);
4782*4882a593Smuzhiyun iounmap(vdev->bar0);
4783*4882a593Smuzhiyun pci_release_region(pdev, 0);
4784*4882a593Smuzhiyun pci_disable_device(pdev);
4785*4882a593Smuzhiyun driver_config->config_dev_cnt--;
4786*4882a593Smuzhiyun driver_config->total_dev_cnt--;
4787*4882a593Smuzhiyun
4788*4882a593Smuzhiyun vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
4789*4882a593Smuzhiyun __func__, __LINE__);
4790*4882a593Smuzhiyun vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
4791*4882a593Smuzhiyun __LINE__);
4792*4882a593Smuzhiyun }
4793*4882a593Smuzhiyun
4794*4882a593Smuzhiyun static const struct pci_error_handlers vxge_err_handler = {
4795*4882a593Smuzhiyun .error_detected = vxge_io_error_detected,
4796*4882a593Smuzhiyun .slot_reset = vxge_io_slot_reset,
4797*4882a593Smuzhiyun .resume = vxge_io_resume,
4798*4882a593Smuzhiyun };
4799*4882a593Smuzhiyun
4800*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(vxge_pm_ops, vxge_pm_suspend, vxge_pm_resume);
4801*4882a593Smuzhiyun
4802*4882a593Smuzhiyun static struct pci_driver vxge_driver = {
4803*4882a593Smuzhiyun .name = VXGE_DRIVER_NAME,
4804*4882a593Smuzhiyun .id_table = vxge_id_table,
4805*4882a593Smuzhiyun .probe = vxge_probe,
4806*4882a593Smuzhiyun .remove = vxge_remove,
4807*4882a593Smuzhiyun .driver.pm = &vxge_pm_ops,
4808*4882a593Smuzhiyun .err_handler = &vxge_err_handler,
4809*4882a593Smuzhiyun };
4810*4882a593Smuzhiyun
4811*4882a593Smuzhiyun static int __init
vxge_starter(void)4812*4882a593Smuzhiyun vxge_starter(void)
4813*4882a593Smuzhiyun {
4814*4882a593Smuzhiyun int ret = 0;
4815*4882a593Smuzhiyun
4816*4882a593Smuzhiyun pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
4817*4882a593Smuzhiyun pr_info("Driver version: %s\n", DRV_VERSION);
4818*4882a593Smuzhiyun
4819*4882a593Smuzhiyun verify_bandwidth();
4820*4882a593Smuzhiyun
4821*4882a593Smuzhiyun driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
4822*4882a593Smuzhiyun if (!driver_config)
4823*4882a593Smuzhiyun return -ENOMEM;
4824*4882a593Smuzhiyun
4825*4882a593Smuzhiyun ret = pci_register_driver(&vxge_driver);
4826*4882a593Smuzhiyun if (ret) {
4827*4882a593Smuzhiyun kfree(driver_config);
4828*4882a593Smuzhiyun goto err;
4829*4882a593Smuzhiyun }
4830*4882a593Smuzhiyun
4831*4882a593Smuzhiyun if (driver_config->config_dev_cnt &&
4832*4882a593Smuzhiyun (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
4833*4882a593Smuzhiyun vxge_debug_init(VXGE_ERR,
4834*4882a593Smuzhiyun "%s: Configured %d of %d devices",
4835*4882a593Smuzhiyun VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
4836*4882a593Smuzhiyun driver_config->total_dev_cnt);
4837*4882a593Smuzhiyun err:
4838*4882a593Smuzhiyun return ret;
4839*4882a593Smuzhiyun }
4840*4882a593Smuzhiyun
4841*4882a593Smuzhiyun static void __exit
vxge_closer(void)4842*4882a593Smuzhiyun vxge_closer(void)
4843*4882a593Smuzhiyun {
4844*4882a593Smuzhiyun pci_unregister_driver(&vxge_driver);
4845*4882a593Smuzhiyun kfree(driver_config);
4846*4882a593Smuzhiyun }
4847*4882a593Smuzhiyun module_init(vxge_starter);
4848*4882a593Smuzhiyun module_exit(vxge_closer);
4849