1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Microsemi Ocelot Switch driver 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2017 Microsemi Corporation 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _MSCC_OCELOT_H_ 9*4882a593Smuzhiyun #define _MSCC_OCELOT_H_ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <linux/bitops.h> 12*4882a593Smuzhiyun #include <linux/etherdevice.h> 13*4882a593Smuzhiyun #include <linux/if_vlan.h> 14*4882a593Smuzhiyun #include <linux/net_tstamp.h> 15*4882a593Smuzhiyun #include <linux/phy.h> 16*4882a593Smuzhiyun #include <linux/phy/phy.h> 17*4882a593Smuzhiyun #include <linux/platform_device.h> 18*4882a593Smuzhiyun #include <linux/regmap.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include <soc/mscc/ocelot_qsys.h> 21*4882a593Smuzhiyun #include <soc/mscc/ocelot_sys.h> 22*4882a593Smuzhiyun #include <soc/mscc/ocelot_dev.h> 23*4882a593Smuzhiyun #include <soc/mscc/ocelot_ana.h> 24*4882a593Smuzhiyun #include <soc/mscc/ocelot_ptp.h> 25*4882a593Smuzhiyun #include <soc/mscc/ocelot.h> 26*4882a593Smuzhiyun #include "ocelot_rew.h" 27*4882a593Smuzhiyun #include "ocelot_qs.h" 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define OCELOT_BUFFER_CELL_SZ 60 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define OCELOT_STATS_CHECK_DELAY (2 * HZ) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define OCELOT_PTP_QUEUE_SZ 128 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun struct frame_info { 36*4882a593Smuzhiyun u32 len; 37*4882a593Smuzhiyun u16 port; 38*4882a593Smuzhiyun u16 vid; 39*4882a593Smuzhiyun u8 tag_type; 40*4882a593Smuzhiyun u16 rew_op; 41*4882a593Smuzhiyun u32 timestamp; /* rew_val */ 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun struct ocelot_multicast { 45*4882a593Smuzhiyun struct list_head list; 46*4882a593Smuzhiyun unsigned char addr[ETH_ALEN]; 47*4882a593Smuzhiyun u16 vid; 48*4882a593Smuzhiyun u16 ports; 49*4882a593Smuzhiyun int pgid; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun struct ocelot_port_tc { 53*4882a593Smuzhiyun bool block_shared; 54*4882a593Smuzhiyun unsigned long offload_cnt; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun unsigned long police_id; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun struct ocelot_port_private { 60*4882a593Smuzhiyun struct ocelot_port port; 61*4882a593Smuzhiyun struct net_device *dev; 62*4882a593Smuzhiyun struct phy_device *phy; 63*4882a593Smuzhiyun u8 chip_port; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun struct phy *serdes; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun struct ocelot_port_tc tc; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun struct ocelot_dump_ctx { 71*4882a593Smuzhiyun struct net_device *dev; 72*4882a593Smuzhiyun struct sk_buff *skb; 73*4882a593Smuzhiyun struct netlink_callback *cb; 74*4882a593Smuzhiyun int idx; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* MAC table entry types. 78*4882a593Smuzhiyun * ENTRYTYPE_NORMAL is subject to aging. 79*4882a593Smuzhiyun * ENTRYTYPE_LOCKED is not subject to aging. 80*4882a593Smuzhiyun * ENTRYTYPE_MACv4 is not subject to aging. For IPv4 multicast. 81*4882a593Smuzhiyun * ENTRYTYPE_MACv6 is not subject to aging. For IPv6 multicast. 82*4882a593Smuzhiyun */ 83*4882a593Smuzhiyun enum macaccess_entry_type { 84*4882a593Smuzhiyun ENTRYTYPE_NORMAL = 0, 85*4882a593Smuzhiyun ENTRYTYPE_LOCKED, 86*4882a593Smuzhiyun ENTRYTYPE_MACv4, 87*4882a593Smuzhiyun ENTRYTYPE_MACv6, 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun int ocelot_port_fdb_do_dump(const unsigned char *addr, u16 vid, 91*4882a593Smuzhiyun bool is_static, void *data); 92*4882a593Smuzhiyun int ocelot_mact_learn(struct ocelot *ocelot, int port, 93*4882a593Smuzhiyun const unsigned char mac[ETH_ALEN], 94*4882a593Smuzhiyun unsigned int vid, enum macaccess_entry_type type); 95*4882a593Smuzhiyun int ocelot_mact_forget(struct ocelot *ocelot, 96*4882a593Smuzhiyun const unsigned char mac[ETH_ALEN], unsigned int vid); 97*4882a593Smuzhiyun int ocelot_port_lag_join(struct ocelot *ocelot, int port, 98*4882a593Smuzhiyun struct net_device *bond); 99*4882a593Smuzhiyun void ocelot_port_lag_leave(struct ocelot *ocelot, int port, 100*4882a593Smuzhiyun struct net_device *bond); 101*4882a593Smuzhiyun struct net_device *ocelot_port_to_netdev(struct ocelot *ocelot, int port); 102*4882a593Smuzhiyun int ocelot_netdev_to_port(struct net_device *dev); 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun u32 ocelot_port_readl(struct ocelot_port *port, u32 reg); 105*4882a593Smuzhiyun void ocelot_port_writel(struct ocelot_port *port, u32 val, u32 reg); 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun int ocelot_probe_port(struct ocelot *ocelot, int port, struct regmap *target, 108*4882a593Smuzhiyun struct phy_device *phy); 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun void ocelot_set_cpu_port(struct ocelot *ocelot, int cpu, 111*4882a593Smuzhiyun enum ocelot_tag_prefix injection, 112*4882a593Smuzhiyun enum ocelot_tag_prefix extraction); 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun extern struct notifier_block ocelot_netdevice_nb; 115*4882a593Smuzhiyun extern struct notifier_block ocelot_switchdev_nb; 116*4882a593Smuzhiyun extern struct notifier_block ocelot_switchdev_blocking_nb; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun #endif 119