1*4882a593Smuzhiyun /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef _MLXSW_TXHEADER_H 5*4882a593Smuzhiyun #define _MLXSW_TXHEADER_H 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define MLXSW_TXHDR_LEN 0x10 8*4882a593Smuzhiyun #define MLXSW_TXHDR_VERSION_0 0 9*4882a593Smuzhiyun #define MLXSW_TXHDR_VERSION_1 1 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun enum { 12*4882a593Smuzhiyun MLXSW_TXHDR_ETH_CTL, 13*4882a593Smuzhiyun MLXSW_TXHDR_ETH_DATA, 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define MLXSW_TXHDR_PROTO_ETH 1 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun enum { 19*4882a593Smuzhiyun MLXSW_TXHDR_ETCLASS_0, 20*4882a593Smuzhiyun MLXSW_TXHDR_ETCLASS_1, 21*4882a593Smuzhiyun MLXSW_TXHDR_ETCLASS_2, 22*4882a593Smuzhiyun MLXSW_TXHDR_ETCLASS_3, 23*4882a593Smuzhiyun MLXSW_TXHDR_ETCLASS_4, 24*4882a593Smuzhiyun MLXSW_TXHDR_ETCLASS_5, 25*4882a593Smuzhiyun MLXSW_TXHDR_ETCLASS_6, 26*4882a593Smuzhiyun MLXSW_TXHDR_ETCLASS_7, 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun enum { 30*4882a593Smuzhiyun MLXSW_TXHDR_RDQ_OTHER, 31*4882a593Smuzhiyun MLXSW_TXHDR_RDQ_EMAD = 0x1f, 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define MLXSW_TXHDR_CTCLASS3 0 35*4882a593Smuzhiyun #define MLXSW_TXHDR_CPU_SIG 0 36*4882a593Smuzhiyun #define MLXSW_TXHDR_SIG 0xE0E0 37*4882a593Smuzhiyun #define MLXSW_TXHDR_STCLASS_NONE 0 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun enum { 40*4882a593Smuzhiyun MLXSW_TXHDR_NOT_EMAD, 41*4882a593Smuzhiyun MLXSW_TXHDR_EMAD, 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun enum { 45*4882a593Smuzhiyun MLXSW_TXHDR_TYPE_DATA, 46*4882a593Smuzhiyun MLXSW_TXHDR_TYPE_CONTROL = 6, 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #endif 50