1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2004 Topspin Communications. All rights reserved.
3*4882a593Smuzhiyun * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
4*4882a593Smuzhiyun * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This software is available to you under a choice of one of two
7*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU
8*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file
9*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the
10*4882a593Smuzhiyun * OpenIB.org BSD license below:
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or
13*4882a593Smuzhiyun * without modification, are permitted provided that the following
14*4882a593Smuzhiyun * conditions are met:
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * - Redistributions of source code must retain the above
17*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
18*4882a593Smuzhiyun * disclaimer.
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above
21*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
22*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials
23*4882a593Smuzhiyun * provided with the distribution.
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32*4882a593Smuzhiyun * SOFTWARE.
33*4882a593Smuzhiyun */
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #include <linux/errno.h>
36*4882a593Smuzhiyun #include <linux/export.h>
37*4882a593Smuzhiyun #include <linux/slab.h>
38*4882a593Smuzhiyun #include <linux/kernel.h>
39*4882a593Smuzhiyun #include <linux/vmalloc.h>
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #include <linux/mlx4/cmd.h>
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #include "mlx4.h"
44*4882a593Smuzhiyun #include "icm.h"
45*4882a593Smuzhiyun
mlx4_buddy_alloc(struct mlx4_buddy * buddy,int order)46*4882a593Smuzhiyun static u32 mlx4_buddy_alloc(struct mlx4_buddy *buddy, int order)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun int o;
49*4882a593Smuzhiyun int m;
50*4882a593Smuzhiyun u32 seg;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun spin_lock(&buddy->lock);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun for (o = order; o <= buddy->max_order; ++o)
55*4882a593Smuzhiyun if (buddy->num_free[o]) {
56*4882a593Smuzhiyun m = 1 << (buddy->max_order - o);
57*4882a593Smuzhiyun seg = find_first_bit(buddy->bits[o], m);
58*4882a593Smuzhiyun if (seg < m)
59*4882a593Smuzhiyun goto found;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun spin_unlock(&buddy->lock);
63*4882a593Smuzhiyun return -1;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun found:
66*4882a593Smuzhiyun clear_bit(seg, buddy->bits[o]);
67*4882a593Smuzhiyun --buddy->num_free[o];
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun while (o > order) {
70*4882a593Smuzhiyun --o;
71*4882a593Smuzhiyun seg <<= 1;
72*4882a593Smuzhiyun set_bit(seg ^ 1, buddy->bits[o]);
73*4882a593Smuzhiyun ++buddy->num_free[o];
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun spin_unlock(&buddy->lock);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun seg <<= order;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun return seg;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
mlx4_buddy_free(struct mlx4_buddy * buddy,u32 seg,int order)83*4882a593Smuzhiyun static void mlx4_buddy_free(struct mlx4_buddy *buddy, u32 seg, int order)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun seg >>= order;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun spin_lock(&buddy->lock);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun while (test_bit(seg ^ 1, buddy->bits[order])) {
90*4882a593Smuzhiyun clear_bit(seg ^ 1, buddy->bits[order]);
91*4882a593Smuzhiyun --buddy->num_free[order];
92*4882a593Smuzhiyun seg >>= 1;
93*4882a593Smuzhiyun ++order;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun set_bit(seg, buddy->bits[order]);
97*4882a593Smuzhiyun ++buddy->num_free[order];
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun spin_unlock(&buddy->lock);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
mlx4_buddy_init(struct mlx4_buddy * buddy,int max_order)102*4882a593Smuzhiyun static int mlx4_buddy_init(struct mlx4_buddy *buddy, int max_order)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun int i, s;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun buddy->max_order = max_order;
107*4882a593Smuzhiyun spin_lock_init(&buddy->lock);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun buddy->bits = kcalloc(buddy->max_order + 1, sizeof(long *),
110*4882a593Smuzhiyun GFP_KERNEL);
111*4882a593Smuzhiyun buddy->num_free = kcalloc(buddy->max_order + 1, sizeof(*buddy->num_free),
112*4882a593Smuzhiyun GFP_KERNEL);
113*4882a593Smuzhiyun if (!buddy->bits || !buddy->num_free)
114*4882a593Smuzhiyun goto err_out;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun for (i = 0; i <= buddy->max_order; ++i) {
117*4882a593Smuzhiyun s = BITS_TO_LONGS(1UL << (buddy->max_order - i));
118*4882a593Smuzhiyun buddy->bits[i] = kvmalloc_array(s, sizeof(long), GFP_KERNEL | __GFP_ZERO);
119*4882a593Smuzhiyun if (!buddy->bits[i])
120*4882a593Smuzhiyun goto err_out_free;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun set_bit(0, buddy->bits[buddy->max_order]);
124*4882a593Smuzhiyun buddy->num_free[buddy->max_order] = 1;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun return 0;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun err_out_free:
129*4882a593Smuzhiyun for (i = 0; i <= buddy->max_order; ++i)
130*4882a593Smuzhiyun kvfree(buddy->bits[i]);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun err_out:
133*4882a593Smuzhiyun kfree(buddy->bits);
134*4882a593Smuzhiyun kfree(buddy->num_free);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun return -ENOMEM;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
mlx4_buddy_cleanup(struct mlx4_buddy * buddy)139*4882a593Smuzhiyun static void mlx4_buddy_cleanup(struct mlx4_buddy *buddy)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun int i;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun for (i = 0; i <= buddy->max_order; ++i)
144*4882a593Smuzhiyun kvfree(buddy->bits[i]);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun kfree(buddy->bits);
147*4882a593Smuzhiyun kfree(buddy->num_free);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
__mlx4_alloc_mtt_range(struct mlx4_dev * dev,int order)150*4882a593Smuzhiyun u32 __mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table;
153*4882a593Smuzhiyun u32 seg;
154*4882a593Smuzhiyun int seg_order;
155*4882a593Smuzhiyun u32 offset;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun seg_order = max_t(int, order - log_mtts_per_seg, 0);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun seg = mlx4_buddy_alloc(&mr_table->mtt_buddy, seg_order);
160*4882a593Smuzhiyun if (seg == -1)
161*4882a593Smuzhiyun return -1;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun offset = seg * (1 << log_mtts_per_seg);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun if (mlx4_table_get_range(dev, &mr_table->mtt_table, offset,
166*4882a593Smuzhiyun offset + (1 << order) - 1)) {
167*4882a593Smuzhiyun mlx4_buddy_free(&mr_table->mtt_buddy, seg, seg_order);
168*4882a593Smuzhiyun return -1;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun return offset;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
mlx4_alloc_mtt_range(struct mlx4_dev * dev,int order)174*4882a593Smuzhiyun static u32 mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun u64 in_param = 0;
177*4882a593Smuzhiyun u64 out_param;
178*4882a593Smuzhiyun int err;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun if (mlx4_is_mfunc(dev)) {
181*4882a593Smuzhiyun set_param_l(&in_param, order);
182*4882a593Smuzhiyun err = mlx4_cmd_imm(dev, in_param, &out_param, RES_MTT,
183*4882a593Smuzhiyun RES_OP_RESERVE_AND_MAP,
184*4882a593Smuzhiyun MLX4_CMD_ALLOC_RES,
185*4882a593Smuzhiyun MLX4_CMD_TIME_CLASS_A,
186*4882a593Smuzhiyun MLX4_CMD_WRAPPED);
187*4882a593Smuzhiyun if (err)
188*4882a593Smuzhiyun return -1;
189*4882a593Smuzhiyun return get_param_l(&out_param);
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun return __mlx4_alloc_mtt_range(dev, order);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
mlx4_mtt_init(struct mlx4_dev * dev,int npages,int page_shift,struct mlx4_mtt * mtt)194*4882a593Smuzhiyun int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift,
195*4882a593Smuzhiyun struct mlx4_mtt *mtt)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun int i;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun if (!npages) {
200*4882a593Smuzhiyun mtt->order = -1;
201*4882a593Smuzhiyun mtt->page_shift = MLX4_ICM_PAGE_SHIFT;
202*4882a593Smuzhiyun return 0;
203*4882a593Smuzhiyun } else
204*4882a593Smuzhiyun mtt->page_shift = page_shift;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun for (mtt->order = 0, i = 1; i < npages; i <<= 1)
207*4882a593Smuzhiyun ++mtt->order;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun mtt->offset = mlx4_alloc_mtt_range(dev, mtt->order);
210*4882a593Smuzhiyun if (mtt->offset == -1)
211*4882a593Smuzhiyun return -ENOMEM;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun return 0;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mtt_init);
216*4882a593Smuzhiyun
__mlx4_free_mtt_range(struct mlx4_dev * dev,u32 offset,int order)217*4882a593Smuzhiyun void __mlx4_free_mtt_range(struct mlx4_dev *dev, u32 offset, int order)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun u32 first_seg;
220*4882a593Smuzhiyun int seg_order;
221*4882a593Smuzhiyun struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun seg_order = max_t(int, order - log_mtts_per_seg, 0);
224*4882a593Smuzhiyun first_seg = offset / (1 << log_mtts_per_seg);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun mlx4_buddy_free(&mr_table->mtt_buddy, first_seg, seg_order);
227*4882a593Smuzhiyun mlx4_table_put_range(dev, &mr_table->mtt_table, offset,
228*4882a593Smuzhiyun offset + (1 << order) - 1);
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
mlx4_free_mtt_range(struct mlx4_dev * dev,u32 offset,int order)231*4882a593Smuzhiyun static void mlx4_free_mtt_range(struct mlx4_dev *dev, u32 offset, int order)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun u64 in_param = 0;
234*4882a593Smuzhiyun int err;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun if (mlx4_is_mfunc(dev)) {
237*4882a593Smuzhiyun set_param_l(&in_param, offset);
238*4882a593Smuzhiyun set_param_h(&in_param, order);
239*4882a593Smuzhiyun err = mlx4_cmd(dev, in_param, RES_MTT, RES_OP_RESERVE_AND_MAP,
240*4882a593Smuzhiyun MLX4_CMD_FREE_RES,
241*4882a593Smuzhiyun MLX4_CMD_TIME_CLASS_A,
242*4882a593Smuzhiyun MLX4_CMD_WRAPPED);
243*4882a593Smuzhiyun if (err)
244*4882a593Smuzhiyun mlx4_warn(dev, "Failed to free mtt range at:%d order:%d\n",
245*4882a593Smuzhiyun offset, order);
246*4882a593Smuzhiyun return;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun __mlx4_free_mtt_range(dev, offset, order);
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
mlx4_mtt_cleanup(struct mlx4_dev * dev,struct mlx4_mtt * mtt)251*4882a593Smuzhiyun void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun if (mtt->order < 0)
254*4882a593Smuzhiyun return;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun mlx4_free_mtt_range(dev, mtt->offset, mtt->order);
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mtt_cleanup);
259*4882a593Smuzhiyun
mlx4_mtt_addr(struct mlx4_dev * dev,struct mlx4_mtt * mtt)260*4882a593Smuzhiyun u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun return (u64) mtt->offset * dev->caps.mtt_entry_sz;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mtt_addr);
265*4882a593Smuzhiyun
hw_index_to_key(u32 ind)266*4882a593Smuzhiyun static u32 hw_index_to_key(u32 ind)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun return (ind >> 24) | (ind << 8);
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
key_to_hw_index(u32 key)271*4882a593Smuzhiyun static u32 key_to_hw_index(u32 key)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun return (key << 24) | (key >> 8);
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
mlx4_SW2HW_MPT(struct mlx4_dev * dev,struct mlx4_cmd_mailbox * mailbox,int mpt_index)276*4882a593Smuzhiyun static int mlx4_SW2HW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
277*4882a593Smuzhiyun int mpt_index)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun return mlx4_cmd(dev, mailbox->dma, mpt_index,
280*4882a593Smuzhiyun 0, MLX4_CMD_SW2HW_MPT, MLX4_CMD_TIME_CLASS_B,
281*4882a593Smuzhiyun MLX4_CMD_WRAPPED);
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
mlx4_HW2SW_MPT(struct mlx4_dev * dev,struct mlx4_cmd_mailbox * mailbox,int mpt_index)284*4882a593Smuzhiyun static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
285*4882a593Smuzhiyun int mpt_index)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index,
288*4882a593Smuzhiyun !mailbox, MLX4_CMD_HW2SW_MPT,
289*4882a593Smuzhiyun MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun /* Must protect against concurrent access */
mlx4_mr_hw_get_mpt(struct mlx4_dev * dev,struct mlx4_mr * mmr,struct mlx4_mpt_entry *** mpt_entry)293*4882a593Smuzhiyun int mlx4_mr_hw_get_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr,
294*4882a593Smuzhiyun struct mlx4_mpt_entry ***mpt_entry)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun int err;
297*4882a593Smuzhiyun int key = key_to_hw_index(mmr->key) & (dev->caps.num_mpts - 1);
298*4882a593Smuzhiyun struct mlx4_cmd_mailbox *mailbox = NULL;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun if (mmr->enabled != MLX4_MPT_EN_HW)
301*4882a593Smuzhiyun return -EINVAL;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun err = mlx4_HW2SW_MPT(dev, NULL, key);
304*4882a593Smuzhiyun if (err) {
305*4882a593Smuzhiyun mlx4_warn(dev, "HW2SW_MPT failed (%d).", err);
306*4882a593Smuzhiyun mlx4_warn(dev, "Most likely the MR has MWs bound to it.\n");
307*4882a593Smuzhiyun return err;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun mmr->enabled = MLX4_MPT_EN_SW;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun if (!mlx4_is_mfunc(dev)) {
313*4882a593Smuzhiyun **mpt_entry = mlx4_table_find(
314*4882a593Smuzhiyun &mlx4_priv(dev)->mr_table.dmpt_table,
315*4882a593Smuzhiyun key, NULL);
316*4882a593Smuzhiyun } else {
317*4882a593Smuzhiyun mailbox = mlx4_alloc_cmd_mailbox(dev);
318*4882a593Smuzhiyun if (IS_ERR(mailbox))
319*4882a593Smuzhiyun return PTR_ERR(mailbox);
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun err = mlx4_cmd_box(dev, 0, mailbox->dma, key,
322*4882a593Smuzhiyun 0, MLX4_CMD_QUERY_MPT,
323*4882a593Smuzhiyun MLX4_CMD_TIME_CLASS_B,
324*4882a593Smuzhiyun MLX4_CMD_WRAPPED);
325*4882a593Smuzhiyun if (err)
326*4882a593Smuzhiyun goto free_mailbox;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun *mpt_entry = (struct mlx4_mpt_entry **)&mailbox->buf;
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun if (!(*mpt_entry) || !(**mpt_entry)) {
332*4882a593Smuzhiyun err = -ENOMEM;
333*4882a593Smuzhiyun goto free_mailbox;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun return 0;
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun free_mailbox:
339*4882a593Smuzhiyun mlx4_free_cmd_mailbox(dev, mailbox);
340*4882a593Smuzhiyun return err;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mr_hw_get_mpt);
343*4882a593Smuzhiyun
mlx4_mr_hw_write_mpt(struct mlx4_dev * dev,struct mlx4_mr * mmr,struct mlx4_mpt_entry ** mpt_entry)344*4882a593Smuzhiyun int mlx4_mr_hw_write_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr,
345*4882a593Smuzhiyun struct mlx4_mpt_entry **mpt_entry)
346*4882a593Smuzhiyun {
347*4882a593Smuzhiyun int err;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun if (!mlx4_is_mfunc(dev)) {
350*4882a593Smuzhiyun /* Make sure any changes to this entry are flushed */
351*4882a593Smuzhiyun wmb();
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun *(u8 *)(*mpt_entry) = MLX4_MPT_STATUS_HW;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun /* Make sure the new status is written */
356*4882a593Smuzhiyun wmb();
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun err = mlx4_SYNC_TPT(dev);
359*4882a593Smuzhiyun } else {
360*4882a593Smuzhiyun int key = key_to_hw_index(mmr->key) & (dev->caps.num_mpts - 1);
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun struct mlx4_cmd_mailbox *mailbox =
363*4882a593Smuzhiyun container_of((void *)mpt_entry, struct mlx4_cmd_mailbox,
364*4882a593Smuzhiyun buf);
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun (*mpt_entry)->lkey = 0;
367*4882a593Smuzhiyun err = mlx4_SW2HW_MPT(dev, mailbox, key);
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun if (!err) {
371*4882a593Smuzhiyun mmr->pd = be32_to_cpu((*mpt_entry)->pd_flags) & MLX4_MPT_PD_MASK;
372*4882a593Smuzhiyun mmr->enabled = MLX4_MPT_EN_HW;
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun return err;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mr_hw_write_mpt);
377*4882a593Smuzhiyun
mlx4_mr_hw_put_mpt(struct mlx4_dev * dev,struct mlx4_mpt_entry ** mpt_entry)378*4882a593Smuzhiyun void mlx4_mr_hw_put_mpt(struct mlx4_dev *dev,
379*4882a593Smuzhiyun struct mlx4_mpt_entry **mpt_entry)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun if (mlx4_is_mfunc(dev)) {
382*4882a593Smuzhiyun struct mlx4_cmd_mailbox *mailbox =
383*4882a593Smuzhiyun container_of((void *)mpt_entry, struct mlx4_cmd_mailbox,
384*4882a593Smuzhiyun buf);
385*4882a593Smuzhiyun mlx4_free_cmd_mailbox(dev, mailbox);
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mr_hw_put_mpt);
389*4882a593Smuzhiyun
mlx4_mr_hw_change_pd(struct mlx4_dev * dev,struct mlx4_mpt_entry * mpt_entry,u32 pdn)390*4882a593Smuzhiyun int mlx4_mr_hw_change_pd(struct mlx4_dev *dev, struct mlx4_mpt_entry *mpt_entry,
391*4882a593Smuzhiyun u32 pdn)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun u32 pd_flags = be32_to_cpu(mpt_entry->pd_flags) & ~MLX4_MPT_PD_MASK;
394*4882a593Smuzhiyun /* The wrapper function will put the slave's id here */
395*4882a593Smuzhiyun if (mlx4_is_mfunc(dev))
396*4882a593Smuzhiyun pd_flags &= ~MLX4_MPT_PD_VF_MASK;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun mpt_entry->pd_flags = cpu_to_be32(pd_flags |
399*4882a593Smuzhiyun (pdn & MLX4_MPT_PD_MASK)
400*4882a593Smuzhiyun | MLX4_MPT_PD_FLAG_EN_INV);
401*4882a593Smuzhiyun return 0;
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mr_hw_change_pd);
404*4882a593Smuzhiyun
mlx4_mr_hw_change_access(struct mlx4_dev * dev,struct mlx4_mpt_entry * mpt_entry,u32 access)405*4882a593Smuzhiyun int mlx4_mr_hw_change_access(struct mlx4_dev *dev,
406*4882a593Smuzhiyun struct mlx4_mpt_entry *mpt_entry,
407*4882a593Smuzhiyun u32 access)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun u32 flags = (be32_to_cpu(mpt_entry->flags) & ~MLX4_PERM_MASK) |
410*4882a593Smuzhiyun (access & MLX4_PERM_MASK);
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun mpt_entry->flags = cpu_to_be32(flags);
413*4882a593Smuzhiyun return 0;
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mr_hw_change_access);
416*4882a593Smuzhiyun
mlx4_mr_alloc_reserved(struct mlx4_dev * dev,u32 mridx,u32 pd,u64 iova,u64 size,u32 access,int npages,int page_shift,struct mlx4_mr * mr)417*4882a593Smuzhiyun static int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd,
418*4882a593Smuzhiyun u64 iova, u64 size, u32 access, int npages,
419*4882a593Smuzhiyun int page_shift, struct mlx4_mr *mr)
420*4882a593Smuzhiyun {
421*4882a593Smuzhiyun mr->iova = iova;
422*4882a593Smuzhiyun mr->size = size;
423*4882a593Smuzhiyun mr->pd = pd;
424*4882a593Smuzhiyun mr->access = access;
425*4882a593Smuzhiyun mr->enabled = MLX4_MPT_DISABLED;
426*4882a593Smuzhiyun mr->key = hw_index_to_key(mridx);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun return mlx4_mtt_init(dev, npages, page_shift, &mr->mtt);
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun
mlx4_WRITE_MTT(struct mlx4_dev * dev,struct mlx4_cmd_mailbox * mailbox,int num_entries)431*4882a593Smuzhiyun static int mlx4_WRITE_MTT(struct mlx4_dev *dev,
432*4882a593Smuzhiyun struct mlx4_cmd_mailbox *mailbox,
433*4882a593Smuzhiyun int num_entries)
434*4882a593Smuzhiyun {
435*4882a593Smuzhiyun return mlx4_cmd(dev, mailbox->dma, num_entries, 0, MLX4_CMD_WRITE_MTT,
436*4882a593Smuzhiyun MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun
__mlx4_mpt_reserve(struct mlx4_dev * dev)439*4882a593Smuzhiyun int __mlx4_mpt_reserve(struct mlx4_dev *dev)
440*4882a593Smuzhiyun {
441*4882a593Smuzhiyun struct mlx4_priv *priv = mlx4_priv(dev);
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun return mlx4_bitmap_alloc(&priv->mr_table.mpt_bitmap);
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun
mlx4_mpt_reserve(struct mlx4_dev * dev)446*4882a593Smuzhiyun static int mlx4_mpt_reserve(struct mlx4_dev *dev)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun u64 out_param;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun if (mlx4_is_mfunc(dev)) {
451*4882a593Smuzhiyun if (mlx4_cmd_imm(dev, 0, &out_param, RES_MPT, RES_OP_RESERVE,
452*4882a593Smuzhiyun MLX4_CMD_ALLOC_RES,
453*4882a593Smuzhiyun MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED))
454*4882a593Smuzhiyun return -1;
455*4882a593Smuzhiyun return get_param_l(&out_param);
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun return __mlx4_mpt_reserve(dev);
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun
__mlx4_mpt_release(struct mlx4_dev * dev,u32 index)460*4882a593Smuzhiyun void __mlx4_mpt_release(struct mlx4_dev *dev, u32 index)
461*4882a593Smuzhiyun {
462*4882a593Smuzhiyun struct mlx4_priv *priv = mlx4_priv(dev);
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun mlx4_bitmap_free(&priv->mr_table.mpt_bitmap, index, MLX4_NO_RR);
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun
mlx4_mpt_release(struct mlx4_dev * dev,u32 index)467*4882a593Smuzhiyun static void mlx4_mpt_release(struct mlx4_dev *dev, u32 index)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun u64 in_param = 0;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun if (mlx4_is_mfunc(dev)) {
472*4882a593Smuzhiyun set_param_l(&in_param, index);
473*4882a593Smuzhiyun if (mlx4_cmd(dev, in_param, RES_MPT, RES_OP_RESERVE,
474*4882a593Smuzhiyun MLX4_CMD_FREE_RES,
475*4882a593Smuzhiyun MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED))
476*4882a593Smuzhiyun mlx4_warn(dev, "Failed to release mr index:%d\n",
477*4882a593Smuzhiyun index);
478*4882a593Smuzhiyun return;
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun __mlx4_mpt_release(dev, index);
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
__mlx4_mpt_alloc_icm(struct mlx4_dev * dev,u32 index)483*4882a593Smuzhiyun int __mlx4_mpt_alloc_icm(struct mlx4_dev *dev, u32 index)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table;
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun return mlx4_table_get(dev, &mr_table->dmpt_table, index);
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun
mlx4_mpt_alloc_icm(struct mlx4_dev * dev,u32 index)490*4882a593Smuzhiyun static int mlx4_mpt_alloc_icm(struct mlx4_dev *dev, u32 index)
491*4882a593Smuzhiyun {
492*4882a593Smuzhiyun u64 param = 0;
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun if (mlx4_is_mfunc(dev)) {
495*4882a593Smuzhiyun set_param_l(¶m, index);
496*4882a593Smuzhiyun return mlx4_cmd_imm(dev, param, ¶m, RES_MPT, RES_OP_MAP_ICM,
497*4882a593Smuzhiyun MLX4_CMD_ALLOC_RES,
498*4882a593Smuzhiyun MLX4_CMD_TIME_CLASS_A,
499*4882a593Smuzhiyun MLX4_CMD_WRAPPED);
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun return __mlx4_mpt_alloc_icm(dev, index);
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun
__mlx4_mpt_free_icm(struct mlx4_dev * dev,u32 index)504*4882a593Smuzhiyun void __mlx4_mpt_free_icm(struct mlx4_dev *dev, u32 index)
505*4882a593Smuzhiyun {
506*4882a593Smuzhiyun struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table;
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun mlx4_table_put(dev, &mr_table->dmpt_table, index);
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
mlx4_mpt_free_icm(struct mlx4_dev * dev,u32 index)511*4882a593Smuzhiyun static void mlx4_mpt_free_icm(struct mlx4_dev *dev, u32 index)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun u64 in_param = 0;
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun if (mlx4_is_mfunc(dev)) {
516*4882a593Smuzhiyun set_param_l(&in_param, index);
517*4882a593Smuzhiyun if (mlx4_cmd(dev, in_param, RES_MPT, RES_OP_MAP_ICM,
518*4882a593Smuzhiyun MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A,
519*4882a593Smuzhiyun MLX4_CMD_WRAPPED))
520*4882a593Smuzhiyun mlx4_warn(dev, "Failed to free icm of mr index:%d\n",
521*4882a593Smuzhiyun index);
522*4882a593Smuzhiyun return;
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun return __mlx4_mpt_free_icm(dev, index);
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun
mlx4_mr_alloc(struct mlx4_dev * dev,u32 pd,u64 iova,u64 size,u32 access,int npages,int page_shift,struct mlx4_mr * mr)527*4882a593Smuzhiyun int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access,
528*4882a593Smuzhiyun int npages, int page_shift, struct mlx4_mr *mr)
529*4882a593Smuzhiyun {
530*4882a593Smuzhiyun u32 index;
531*4882a593Smuzhiyun int err;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun index = mlx4_mpt_reserve(dev);
534*4882a593Smuzhiyun if (index == -1)
535*4882a593Smuzhiyun return -ENOMEM;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun err = mlx4_mr_alloc_reserved(dev, index, pd, iova, size,
538*4882a593Smuzhiyun access, npages, page_shift, mr);
539*4882a593Smuzhiyun if (err)
540*4882a593Smuzhiyun mlx4_mpt_release(dev, index);
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun return err;
543*4882a593Smuzhiyun }
544*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mr_alloc);
545*4882a593Smuzhiyun
mlx4_mr_free_reserved(struct mlx4_dev * dev,struct mlx4_mr * mr)546*4882a593Smuzhiyun static int mlx4_mr_free_reserved(struct mlx4_dev *dev, struct mlx4_mr *mr)
547*4882a593Smuzhiyun {
548*4882a593Smuzhiyun int err;
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun if (mr->enabled == MLX4_MPT_EN_HW) {
551*4882a593Smuzhiyun err = mlx4_HW2SW_MPT(dev, NULL,
552*4882a593Smuzhiyun key_to_hw_index(mr->key) &
553*4882a593Smuzhiyun (dev->caps.num_mpts - 1));
554*4882a593Smuzhiyun if (err) {
555*4882a593Smuzhiyun mlx4_warn(dev, "HW2SW_MPT failed (%d), MR has MWs bound to it\n",
556*4882a593Smuzhiyun err);
557*4882a593Smuzhiyun return err;
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun mr->enabled = MLX4_MPT_EN_SW;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun mlx4_mtt_cleanup(dev, &mr->mtt);
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun return 0;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun
mlx4_mr_free(struct mlx4_dev * dev,struct mlx4_mr * mr)567*4882a593Smuzhiyun int mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr *mr)
568*4882a593Smuzhiyun {
569*4882a593Smuzhiyun int ret;
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun ret = mlx4_mr_free_reserved(dev, mr);
572*4882a593Smuzhiyun if (ret)
573*4882a593Smuzhiyun return ret;
574*4882a593Smuzhiyun if (mr->enabled)
575*4882a593Smuzhiyun mlx4_mpt_free_icm(dev, key_to_hw_index(mr->key));
576*4882a593Smuzhiyun mlx4_mpt_release(dev, key_to_hw_index(mr->key));
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun return 0;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mr_free);
581*4882a593Smuzhiyun
mlx4_mr_rereg_mem_cleanup(struct mlx4_dev * dev,struct mlx4_mr * mr)582*4882a593Smuzhiyun void mlx4_mr_rereg_mem_cleanup(struct mlx4_dev *dev, struct mlx4_mr *mr)
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun mlx4_mtt_cleanup(dev, &mr->mtt);
585*4882a593Smuzhiyun mr->mtt.order = -1;
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mr_rereg_mem_cleanup);
588*4882a593Smuzhiyun
mlx4_mr_rereg_mem_write(struct mlx4_dev * dev,struct mlx4_mr * mr,u64 iova,u64 size,int npages,int page_shift,struct mlx4_mpt_entry * mpt_entry)589*4882a593Smuzhiyun int mlx4_mr_rereg_mem_write(struct mlx4_dev *dev, struct mlx4_mr *mr,
590*4882a593Smuzhiyun u64 iova, u64 size, int npages,
591*4882a593Smuzhiyun int page_shift, struct mlx4_mpt_entry *mpt_entry)
592*4882a593Smuzhiyun {
593*4882a593Smuzhiyun int err;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun err = mlx4_mtt_init(dev, npages, page_shift, &mr->mtt);
596*4882a593Smuzhiyun if (err)
597*4882a593Smuzhiyun return err;
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun mpt_entry->start = cpu_to_be64(iova);
600*4882a593Smuzhiyun mpt_entry->length = cpu_to_be64(size);
601*4882a593Smuzhiyun mpt_entry->entity_size = cpu_to_be32(page_shift);
602*4882a593Smuzhiyun mpt_entry->flags &= ~(cpu_to_be32(MLX4_MPT_FLAG_FREE |
603*4882a593Smuzhiyun MLX4_MPT_FLAG_SW_OWNS));
604*4882a593Smuzhiyun if (mr->mtt.order < 0) {
605*4882a593Smuzhiyun mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_PHYSICAL);
606*4882a593Smuzhiyun mpt_entry->mtt_addr = 0;
607*4882a593Smuzhiyun } else {
608*4882a593Smuzhiyun mpt_entry->mtt_addr = cpu_to_be64(mlx4_mtt_addr(dev,
609*4882a593Smuzhiyun &mr->mtt));
610*4882a593Smuzhiyun if (mr->mtt.page_shift == 0)
611*4882a593Smuzhiyun mpt_entry->mtt_sz = cpu_to_be32(1 << mr->mtt.order);
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun if (mr->mtt.order >= 0 && mr->mtt.page_shift == 0) {
614*4882a593Smuzhiyun /* fast register MR in free state */
615*4882a593Smuzhiyun mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_FREE);
616*4882a593Smuzhiyun mpt_entry->pd_flags |= cpu_to_be32(MLX4_MPT_PD_FLAG_FAST_REG |
617*4882a593Smuzhiyun MLX4_MPT_PD_FLAG_RAE);
618*4882a593Smuzhiyun } else {
619*4882a593Smuzhiyun mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_SW_OWNS);
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun mr->enabled = MLX4_MPT_EN_SW;
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun return 0;
624*4882a593Smuzhiyun }
625*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mr_rereg_mem_write);
626*4882a593Smuzhiyun
mlx4_mr_enable(struct mlx4_dev * dev,struct mlx4_mr * mr)627*4882a593Smuzhiyun int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun struct mlx4_cmd_mailbox *mailbox;
630*4882a593Smuzhiyun struct mlx4_mpt_entry *mpt_entry;
631*4882a593Smuzhiyun int err;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun err = mlx4_mpt_alloc_icm(dev, key_to_hw_index(mr->key));
634*4882a593Smuzhiyun if (err)
635*4882a593Smuzhiyun return err;
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun mailbox = mlx4_alloc_cmd_mailbox(dev);
638*4882a593Smuzhiyun if (IS_ERR(mailbox)) {
639*4882a593Smuzhiyun err = PTR_ERR(mailbox);
640*4882a593Smuzhiyun goto err_table;
641*4882a593Smuzhiyun }
642*4882a593Smuzhiyun mpt_entry = mailbox->buf;
643*4882a593Smuzhiyun mpt_entry->flags = cpu_to_be32(MLX4_MPT_FLAG_MIO |
644*4882a593Smuzhiyun MLX4_MPT_FLAG_REGION |
645*4882a593Smuzhiyun mr->access);
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun mpt_entry->key = cpu_to_be32(key_to_hw_index(mr->key));
648*4882a593Smuzhiyun mpt_entry->pd_flags = cpu_to_be32(mr->pd | MLX4_MPT_PD_FLAG_EN_INV);
649*4882a593Smuzhiyun mpt_entry->start = cpu_to_be64(mr->iova);
650*4882a593Smuzhiyun mpt_entry->length = cpu_to_be64(mr->size);
651*4882a593Smuzhiyun mpt_entry->entity_size = cpu_to_be32(mr->mtt.page_shift);
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun if (mr->mtt.order < 0) {
654*4882a593Smuzhiyun mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_PHYSICAL);
655*4882a593Smuzhiyun mpt_entry->mtt_addr = 0;
656*4882a593Smuzhiyun } else {
657*4882a593Smuzhiyun mpt_entry->mtt_addr = cpu_to_be64(mlx4_mtt_addr(dev,
658*4882a593Smuzhiyun &mr->mtt));
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun if (mr->mtt.order >= 0 && mr->mtt.page_shift == 0) {
662*4882a593Smuzhiyun /* fast register MR in free state */
663*4882a593Smuzhiyun mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_FREE);
664*4882a593Smuzhiyun mpt_entry->pd_flags |= cpu_to_be32(MLX4_MPT_PD_FLAG_FAST_REG |
665*4882a593Smuzhiyun MLX4_MPT_PD_FLAG_RAE);
666*4882a593Smuzhiyun mpt_entry->mtt_sz = cpu_to_be32(1 << mr->mtt.order);
667*4882a593Smuzhiyun } else {
668*4882a593Smuzhiyun mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_SW_OWNS);
669*4882a593Smuzhiyun }
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun err = mlx4_SW2HW_MPT(dev, mailbox,
672*4882a593Smuzhiyun key_to_hw_index(mr->key) & (dev->caps.num_mpts - 1));
673*4882a593Smuzhiyun if (err) {
674*4882a593Smuzhiyun mlx4_warn(dev, "SW2HW_MPT failed (%d)\n", err);
675*4882a593Smuzhiyun goto err_cmd;
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun mr->enabled = MLX4_MPT_EN_HW;
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun mlx4_free_cmd_mailbox(dev, mailbox);
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun return 0;
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun err_cmd:
684*4882a593Smuzhiyun mlx4_free_cmd_mailbox(dev, mailbox);
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun err_table:
687*4882a593Smuzhiyun mlx4_mpt_free_icm(dev, key_to_hw_index(mr->key));
688*4882a593Smuzhiyun return err;
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mr_enable);
691*4882a593Smuzhiyun
mlx4_write_mtt_chunk(struct mlx4_dev * dev,struct mlx4_mtt * mtt,int start_index,int npages,u64 * page_list)692*4882a593Smuzhiyun static int mlx4_write_mtt_chunk(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
693*4882a593Smuzhiyun int start_index, int npages, u64 *page_list)
694*4882a593Smuzhiyun {
695*4882a593Smuzhiyun struct mlx4_priv *priv = mlx4_priv(dev);
696*4882a593Smuzhiyun __be64 *mtts;
697*4882a593Smuzhiyun dma_addr_t dma_handle;
698*4882a593Smuzhiyun int i;
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun mtts = mlx4_table_find(&priv->mr_table.mtt_table, mtt->offset +
701*4882a593Smuzhiyun start_index, &dma_handle);
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun if (!mtts)
704*4882a593Smuzhiyun return -ENOMEM;
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun dma_sync_single_for_cpu(&dev->persist->pdev->dev, dma_handle,
707*4882a593Smuzhiyun npages * sizeof(u64), DMA_TO_DEVICE);
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun for (i = 0; i < npages; ++i)
710*4882a593Smuzhiyun mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT);
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun dma_sync_single_for_device(&dev->persist->pdev->dev, dma_handle,
713*4882a593Smuzhiyun npages * sizeof(u64), DMA_TO_DEVICE);
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun return 0;
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun
__mlx4_write_mtt(struct mlx4_dev * dev,struct mlx4_mtt * mtt,int start_index,int npages,u64 * page_list)718*4882a593Smuzhiyun int __mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
719*4882a593Smuzhiyun int start_index, int npages, u64 *page_list)
720*4882a593Smuzhiyun {
721*4882a593Smuzhiyun int err = 0;
722*4882a593Smuzhiyun int chunk;
723*4882a593Smuzhiyun int mtts_per_page;
724*4882a593Smuzhiyun int max_mtts_first_page;
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun /* compute how may mtts fit in the first page */
727*4882a593Smuzhiyun mtts_per_page = PAGE_SIZE / sizeof(u64);
728*4882a593Smuzhiyun max_mtts_first_page = mtts_per_page - (mtt->offset + start_index)
729*4882a593Smuzhiyun % mtts_per_page;
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun chunk = min_t(int, max_mtts_first_page, npages);
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun while (npages > 0) {
734*4882a593Smuzhiyun err = mlx4_write_mtt_chunk(dev, mtt, start_index, chunk, page_list);
735*4882a593Smuzhiyun if (err)
736*4882a593Smuzhiyun return err;
737*4882a593Smuzhiyun npages -= chunk;
738*4882a593Smuzhiyun start_index += chunk;
739*4882a593Smuzhiyun page_list += chunk;
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun chunk = min_t(int, mtts_per_page, npages);
742*4882a593Smuzhiyun }
743*4882a593Smuzhiyun return err;
744*4882a593Smuzhiyun }
745*4882a593Smuzhiyun
mlx4_write_mtt(struct mlx4_dev * dev,struct mlx4_mtt * mtt,int start_index,int npages,u64 * page_list)746*4882a593Smuzhiyun int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
747*4882a593Smuzhiyun int start_index, int npages, u64 *page_list)
748*4882a593Smuzhiyun {
749*4882a593Smuzhiyun struct mlx4_cmd_mailbox *mailbox = NULL;
750*4882a593Smuzhiyun __be64 *inbox = NULL;
751*4882a593Smuzhiyun int chunk;
752*4882a593Smuzhiyun int err = 0;
753*4882a593Smuzhiyun int i;
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun if (mtt->order < 0)
756*4882a593Smuzhiyun return -EINVAL;
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun if (mlx4_is_mfunc(dev)) {
759*4882a593Smuzhiyun mailbox = mlx4_alloc_cmd_mailbox(dev);
760*4882a593Smuzhiyun if (IS_ERR(mailbox))
761*4882a593Smuzhiyun return PTR_ERR(mailbox);
762*4882a593Smuzhiyun inbox = mailbox->buf;
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun while (npages > 0) {
765*4882a593Smuzhiyun chunk = min_t(int, MLX4_MAILBOX_SIZE / sizeof(u64) - 2,
766*4882a593Smuzhiyun npages);
767*4882a593Smuzhiyun inbox[0] = cpu_to_be64(mtt->offset + start_index);
768*4882a593Smuzhiyun inbox[1] = 0;
769*4882a593Smuzhiyun for (i = 0; i < chunk; ++i)
770*4882a593Smuzhiyun inbox[i + 2] = cpu_to_be64(page_list[i] |
771*4882a593Smuzhiyun MLX4_MTT_FLAG_PRESENT);
772*4882a593Smuzhiyun err = mlx4_WRITE_MTT(dev, mailbox, chunk);
773*4882a593Smuzhiyun if (err) {
774*4882a593Smuzhiyun mlx4_free_cmd_mailbox(dev, mailbox);
775*4882a593Smuzhiyun return err;
776*4882a593Smuzhiyun }
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun npages -= chunk;
779*4882a593Smuzhiyun start_index += chunk;
780*4882a593Smuzhiyun page_list += chunk;
781*4882a593Smuzhiyun }
782*4882a593Smuzhiyun mlx4_free_cmd_mailbox(dev, mailbox);
783*4882a593Smuzhiyun return err;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun return __mlx4_write_mtt(dev, mtt, start_index, npages, page_list);
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_write_mtt);
789*4882a593Smuzhiyun
mlx4_buf_write_mtt(struct mlx4_dev * dev,struct mlx4_mtt * mtt,struct mlx4_buf * buf)790*4882a593Smuzhiyun int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
791*4882a593Smuzhiyun struct mlx4_buf *buf)
792*4882a593Smuzhiyun {
793*4882a593Smuzhiyun u64 *page_list;
794*4882a593Smuzhiyun int err;
795*4882a593Smuzhiyun int i;
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun page_list = kcalloc(buf->npages, sizeof(*page_list), GFP_KERNEL);
798*4882a593Smuzhiyun if (!page_list)
799*4882a593Smuzhiyun return -ENOMEM;
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun for (i = 0; i < buf->npages; ++i)
802*4882a593Smuzhiyun if (buf->nbufs == 1)
803*4882a593Smuzhiyun page_list[i] = buf->direct.map + (i << buf->page_shift);
804*4882a593Smuzhiyun else
805*4882a593Smuzhiyun page_list[i] = buf->page_list[i].map;
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun err = mlx4_write_mtt(dev, mtt, 0, buf->npages, page_list);
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun kfree(page_list);
810*4882a593Smuzhiyun return err;
811*4882a593Smuzhiyun }
812*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_buf_write_mtt);
813*4882a593Smuzhiyun
mlx4_mw_alloc(struct mlx4_dev * dev,u32 pd,enum mlx4_mw_type type,struct mlx4_mw * mw)814*4882a593Smuzhiyun int mlx4_mw_alloc(struct mlx4_dev *dev, u32 pd, enum mlx4_mw_type type,
815*4882a593Smuzhiyun struct mlx4_mw *mw)
816*4882a593Smuzhiyun {
817*4882a593Smuzhiyun u32 index;
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun if ((type == MLX4_MW_TYPE_1 &&
820*4882a593Smuzhiyun !(dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)) ||
821*4882a593Smuzhiyun (type == MLX4_MW_TYPE_2 &&
822*4882a593Smuzhiyun !(dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN)))
823*4882a593Smuzhiyun return -EOPNOTSUPP;
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun index = mlx4_mpt_reserve(dev);
826*4882a593Smuzhiyun if (index == -1)
827*4882a593Smuzhiyun return -ENOMEM;
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun mw->key = hw_index_to_key(index);
830*4882a593Smuzhiyun mw->pd = pd;
831*4882a593Smuzhiyun mw->type = type;
832*4882a593Smuzhiyun mw->enabled = MLX4_MPT_DISABLED;
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun return 0;
835*4882a593Smuzhiyun }
836*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mw_alloc);
837*4882a593Smuzhiyun
mlx4_mw_enable(struct mlx4_dev * dev,struct mlx4_mw * mw)838*4882a593Smuzhiyun int mlx4_mw_enable(struct mlx4_dev *dev, struct mlx4_mw *mw)
839*4882a593Smuzhiyun {
840*4882a593Smuzhiyun struct mlx4_cmd_mailbox *mailbox;
841*4882a593Smuzhiyun struct mlx4_mpt_entry *mpt_entry;
842*4882a593Smuzhiyun int err;
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun err = mlx4_mpt_alloc_icm(dev, key_to_hw_index(mw->key));
845*4882a593Smuzhiyun if (err)
846*4882a593Smuzhiyun return err;
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun mailbox = mlx4_alloc_cmd_mailbox(dev);
849*4882a593Smuzhiyun if (IS_ERR(mailbox)) {
850*4882a593Smuzhiyun err = PTR_ERR(mailbox);
851*4882a593Smuzhiyun goto err_table;
852*4882a593Smuzhiyun }
853*4882a593Smuzhiyun mpt_entry = mailbox->buf;
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun /* Note that the MLX4_MPT_FLAG_REGION bit in mpt_entry->flags is turned
856*4882a593Smuzhiyun * off, thus creating a memory window and not a memory region.
857*4882a593Smuzhiyun */
858*4882a593Smuzhiyun mpt_entry->key = cpu_to_be32(key_to_hw_index(mw->key));
859*4882a593Smuzhiyun mpt_entry->pd_flags = cpu_to_be32(mw->pd);
860*4882a593Smuzhiyun if (mw->type == MLX4_MW_TYPE_2) {
861*4882a593Smuzhiyun mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_FREE);
862*4882a593Smuzhiyun mpt_entry->qpn = cpu_to_be32(MLX4_MPT_QP_FLAG_BOUND_QP);
863*4882a593Smuzhiyun mpt_entry->pd_flags |= cpu_to_be32(MLX4_MPT_PD_FLAG_EN_INV);
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun err = mlx4_SW2HW_MPT(dev, mailbox,
867*4882a593Smuzhiyun key_to_hw_index(mw->key) &
868*4882a593Smuzhiyun (dev->caps.num_mpts - 1));
869*4882a593Smuzhiyun if (err) {
870*4882a593Smuzhiyun mlx4_warn(dev, "SW2HW_MPT failed (%d)\n", err);
871*4882a593Smuzhiyun goto err_cmd;
872*4882a593Smuzhiyun }
873*4882a593Smuzhiyun mw->enabled = MLX4_MPT_EN_HW;
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun mlx4_free_cmd_mailbox(dev, mailbox);
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun return 0;
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun err_cmd:
880*4882a593Smuzhiyun mlx4_free_cmd_mailbox(dev, mailbox);
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun err_table:
883*4882a593Smuzhiyun mlx4_mpt_free_icm(dev, key_to_hw_index(mw->key));
884*4882a593Smuzhiyun return err;
885*4882a593Smuzhiyun }
886*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mw_enable);
887*4882a593Smuzhiyun
mlx4_mw_free(struct mlx4_dev * dev,struct mlx4_mw * mw)888*4882a593Smuzhiyun void mlx4_mw_free(struct mlx4_dev *dev, struct mlx4_mw *mw)
889*4882a593Smuzhiyun {
890*4882a593Smuzhiyun int err;
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun if (mw->enabled == MLX4_MPT_EN_HW) {
893*4882a593Smuzhiyun err = mlx4_HW2SW_MPT(dev, NULL,
894*4882a593Smuzhiyun key_to_hw_index(mw->key) &
895*4882a593Smuzhiyun (dev->caps.num_mpts - 1));
896*4882a593Smuzhiyun if (err)
897*4882a593Smuzhiyun mlx4_warn(dev, "xxx HW2SW_MPT failed (%d)\n", err);
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun mw->enabled = MLX4_MPT_EN_SW;
900*4882a593Smuzhiyun }
901*4882a593Smuzhiyun if (mw->enabled)
902*4882a593Smuzhiyun mlx4_mpt_free_icm(dev, key_to_hw_index(mw->key));
903*4882a593Smuzhiyun mlx4_mpt_release(dev, key_to_hw_index(mw->key));
904*4882a593Smuzhiyun }
905*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_mw_free);
906*4882a593Smuzhiyun
mlx4_init_mr_table(struct mlx4_dev * dev)907*4882a593Smuzhiyun int mlx4_init_mr_table(struct mlx4_dev *dev)
908*4882a593Smuzhiyun {
909*4882a593Smuzhiyun struct mlx4_priv *priv = mlx4_priv(dev);
910*4882a593Smuzhiyun struct mlx4_mr_table *mr_table = &priv->mr_table;
911*4882a593Smuzhiyun int err;
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun /* Nothing to do for slaves - all MR handling is forwarded
914*4882a593Smuzhiyun * to the master */
915*4882a593Smuzhiyun if (mlx4_is_slave(dev))
916*4882a593Smuzhiyun return 0;
917*4882a593Smuzhiyun
918*4882a593Smuzhiyun if (!is_power_of_2(dev->caps.num_mpts))
919*4882a593Smuzhiyun return -EINVAL;
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun err = mlx4_bitmap_init(&mr_table->mpt_bitmap, dev->caps.num_mpts,
922*4882a593Smuzhiyun ~0, dev->caps.reserved_mrws, 0);
923*4882a593Smuzhiyun if (err)
924*4882a593Smuzhiyun return err;
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun err = mlx4_buddy_init(&mr_table->mtt_buddy,
927*4882a593Smuzhiyun ilog2((u32)dev->caps.num_mtts /
928*4882a593Smuzhiyun (1 << log_mtts_per_seg)));
929*4882a593Smuzhiyun if (err)
930*4882a593Smuzhiyun goto err_buddy;
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun if (dev->caps.reserved_mtts) {
933*4882a593Smuzhiyun priv->reserved_mtts =
934*4882a593Smuzhiyun mlx4_alloc_mtt_range(dev,
935*4882a593Smuzhiyun fls(dev->caps.reserved_mtts - 1));
936*4882a593Smuzhiyun if (priv->reserved_mtts < 0) {
937*4882a593Smuzhiyun mlx4_warn(dev, "MTT table of order %u is too small\n",
938*4882a593Smuzhiyun mr_table->mtt_buddy.max_order);
939*4882a593Smuzhiyun err = -ENOMEM;
940*4882a593Smuzhiyun goto err_reserve_mtts;
941*4882a593Smuzhiyun }
942*4882a593Smuzhiyun }
943*4882a593Smuzhiyun
944*4882a593Smuzhiyun return 0;
945*4882a593Smuzhiyun
946*4882a593Smuzhiyun err_reserve_mtts:
947*4882a593Smuzhiyun mlx4_buddy_cleanup(&mr_table->mtt_buddy);
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun err_buddy:
950*4882a593Smuzhiyun mlx4_bitmap_cleanup(&mr_table->mpt_bitmap);
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun return err;
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun
mlx4_cleanup_mr_table(struct mlx4_dev * dev)955*4882a593Smuzhiyun void mlx4_cleanup_mr_table(struct mlx4_dev *dev)
956*4882a593Smuzhiyun {
957*4882a593Smuzhiyun struct mlx4_priv *priv = mlx4_priv(dev);
958*4882a593Smuzhiyun struct mlx4_mr_table *mr_table = &priv->mr_table;
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun if (mlx4_is_slave(dev))
961*4882a593Smuzhiyun return;
962*4882a593Smuzhiyun if (priv->reserved_mtts >= 0)
963*4882a593Smuzhiyun mlx4_free_mtt_range(dev, priv->reserved_mtts,
964*4882a593Smuzhiyun fls(dev->caps.reserved_mtts - 1));
965*4882a593Smuzhiyun mlx4_buddy_cleanup(&mr_table->mtt_buddy);
966*4882a593Smuzhiyun mlx4_bitmap_cleanup(&mr_table->mpt_bitmap);
967*4882a593Smuzhiyun }
968*4882a593Smuzhiyun
mlx4_SYNC_TPT(struct mlx4_dev * dev)969*4882a593Smuzhiyun int mlx4_SYNC_TPT(struct mlx4_dev *dev)
970*4882a593Smuzhiyun {
971*4882a593Smuzhiyun return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_SYNC_TPT,
972*4882a593Smuzhiyun MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
973*4882a593Smuzhiyun }
974*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mlx4_SYNC_TPT);
975