1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This software is available to you under a choice of one of two
5*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU
6*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file
7*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the
8*4882a593Smuzhiyun * OpenIB.org BSD license below:
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or
11*4882a593Smuzhiyun * without modification, are permitted provided that the following
12*4882a593Smuzhiyun * conditions are met:
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * - Redistributions of source code must retain the above
15*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
16*4882a593Smuzhiyun * disclaimer.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above
19*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
20*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials
21*4882a593Smuzhiyun * provided with the distribution.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30*4882a593Smuzhiyun * SOFTWARE.
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include <linux/kernel.h>
35*4882a593Smuzhiyun #include <linux/ethtool.h>
36*4882a593Smuzhiyun #include <linux/netdevice.h>
37*4882a593Smuzhiyun #include <linux/delay.h>
38*4882a593Smuzhiyun #include <linux/mlx4/driver.h>
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #include "mlx4_en.h"
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun
mlx4_en_test_registers(struct mlx4_en_priv * priv)43*4882a593Smuzhiyun static int mlx4_en_test_registers(struct mlx4_en_priv *priv)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun return mlx4_cmd(priv->mdev->dev, 0, 0, 0, MLX4_CMD_HW_HEALTH_CHECK,
46*4882a593Smuzhiyun MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
mlx4_en_test_loopback_xmit(struct mlx4_en_priv * priv)49*4882a593Smuzhiyun static int mlx4_en_test_loopback_xmit(struct mlx4_en_priv *priv)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun struct sk_buff *skb;
52*4882a593Smuzhiyun struct ethhdr *ethh;
53*4882a593Smuzhiyun unsigned char *packet;
54*4882a593Smuzhiyun unsigned int packet_size = MLX4_LOOPBACK_TEST_PAYLOAD;
55*4882a593Smuzhiyun unsigned int i;
56*4882a593Smuzhiyun int err;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /* build the pkt before xmit */
60*4882a593Smuzhiyun skb = netdev_alloc_skb(priv->dev, MLX4_LOOPBACK_TEST_PAYLOAD + ETH_HLEN + NET_IP_ALIGN);
61*4882a593Smuzhiyun if (!skb)
62*4882a593Smuzhiyun return -ENOMEM;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun skb_reserve(skb, NET_IP_ALIGN);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun ethh = skb_put(skb, sizeof(struct ethhdr));
67*4882a593Smuzhiyun packet = skb_put(skb, packet_size);
68*4882a593Smuzhiyun memcpy(ethh->h_dest, priv->dev->dev_addr, ETH_ALEN);
69*4882a593Smuzhiyun eth_zero_addr(ethh->h_source);
70*4882a593Smuzhiyun ethh->h_proto = htons(ETH_P_ARP);
71*4882a593Smuzhiyun skb_reset_mac_header(skb);
72*4882a593Smuzhiyun for (i = 0; i < packet_size; ++i) /* fill our packet */
73*4882a593Smuzhiyun packet[i] = (unsigned char)(i & 0xff);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /* xmit the pkt */
76*4882a593Smuzhiyun err = mlx4_en_xmit(skb, priv->dev);
77*4882a593Smuzhiyun return err;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
mlx4_en_test_loopback(struct mlx4_en_priv * priv)80*4882a593Smuzhiyun static int mlx4_en_test_loopback(struct mlx4_en_priv *priv)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun u32 loopback_ok = 0;
83*4882a593Smuzhiyun int i;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun priv->loopback_ok = 0;
86*4882a593Smuzhiyun priv->validate_loopback = 1;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun /* xmit */
91*4882a593Smuzhiyun if (mlx4_en_test_loopback_xmit(priv)) {
92*4882a593Smuzhiyun en_err(priv, "Transmitting loopback packet failed\n");
93*4882a593Smuzhiyun goto mlx4_en_test_loopback_exit;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun /* polling for result */
97*4882a593Smuzhiyun for (i = 0; i < MLX4_EN_LOOPBACK_RETRIES; ++i) {
98*4882a593Smuzhiyun msleep(MLX4_EN_LOOPBACK_TIMEOUT);
99*4882a593Smuzhiyun if (priv->loopback_ok) {
100*4882a593Smuzhiyun loopback_ok = 1;
101*4882a593Smuzhiyun break;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun if (!loopback_ok)
105*4882a593Smuzhiyun en_err(priv, "Loopback packet didn't arrive\n");
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun mlx4_en_test_loopback_exit:
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun priv->validate_loopback = 0;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
112*4882a593Smuzhiyun return !loopback_ok;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
mlx4_en_test_interrupts(struct mlx4_en_priv * priv)115*4882a593Smuzhiyun static int mlx4_en_test_interrupts(struct mlx4_en_priv *priv)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun struct mlx4_en_dev *mdev = priv->mdev;
118*4882a593Smuzhiyun int err = 0;
119*4882a593Smuzhiyun int i = 0;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun err = mlx4_test_async(mdev->dev);
122*4882a593Smuzhiyun /* When not in MSI_X or slave, test only async */
123*4882a593Smuzhiyun if (!(mdev->dev->flags & MLX4_FLAG_MSI_X) || mlx4_is_slave(mdev->dev))
124*4882a593Smuzhiyun return err;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun /* A loop over all completion vectors of current port,
127*4882a593Smuzhiyun * for each vector check whether it works by mapping command
128*4882a593Smuzhiyun * completions to that vector and performing a NOP command
129*4882a593Smuzhiyun */
130*4882a593Smuzhiyun for (i = 0; i < priv->rx_ring_num; i++) {
131*4882a593Smuzhiyun err = mlx4_test_interrupt(mdev->dev, priv->rx_cq[i]->vector);
132*4882a593Smuzhiyun if (err)
133*4882a593Smuzhiyun break;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun return err;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
mlx4_en_test_link(struct mlx4_en_priv * priv)139*4882a593Smuzhiyun static int mlx4_en_test_link(struct mlx4_en_priv *priv)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
142*4882a593Smuzhiyun return -ENOMEM;
143*4882a593Smuzhiyun if (priv->port_state.link_state == 1)
144*4882a593Smuzhiyun return 0;
145*4882a593Smuzhiyun else
146*4882a593Smuzhiyun return 1;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
mlx4_en_test_speed(struct mlx4_en_priv * priv)149*4882a593Smuzhiyun static int mlx4_en_test_speed(struct mlx4_en_priv *priv)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
153*4882a593Smuzhiyun return -ENOMEM;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /* The device supports 100M, 1G, 10G, 20G, 40G and 56G speed */
156*4882a593Smuzhiyun if (priv->port_state.link_speed != SPEED_100 &&
157*4882a593Smuzhiyun priv->port_state.link_speed != SPEED_1000 &&
158*4882a593Smuzhiyun priv->port_state.link_speed != SPEED_10000 &&
159*4882a593Smuzhiyun priv->port_state.link_speed != SPEED_20000 &&
160*4882a593Smuzhiyun priv->port_state.link_speed != SPEED_40000 &&
161*4882a593Smuzhiyun priv->port_state.link_speed != SPEED_56000)
162*4882a593Smuzhiyun return priv->port_state.link_speed;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun return 0;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun
mlx4_en_ex_selftest(struct net_device * dev,u32 * flags,u64 * buf)168*4882a593Smuzhiyun void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct mlx4_en_priv *priv = netdev_priv(dev);
171*4882a593Smuzhiyun int i, carrier_ok;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun memset(buf, 0, sizeof(u64) * MLX4_EN_NUM_SELF_TEST);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun if (*flags & ETH_TEST_FL_OFFLINE) {
176*4882a593Smuzhiyun /* disable the interface */
177*4882a593Smuzhiyun carrier_ok = netif_carrier_ok(dev);
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun netif_carrier_off(dev);
180*4882a593Smuzhiyun /* Wait until all tx queues are empty.
181*4882a593Smuzhiyun * there should not be any additional incoming traffic
182*4882a593Smuzhiyun * since we turned the carrier off */
183*4882a593Smuzhiyun msleep(200);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun if (priv->mdev->dev->caps.flags &
186*4882a593Smuzhiyun MLX4_DEV_CAP_FLAG_UC_LOOPBACK) {
187*4882a593Smuzhiyun buf[3] = mlx4_en_test_registers(priv);
188*4882a593Smuzhiyun if (priv->port_up && dev->mtu >= MLX4_SELFTEST_LB_MIN_MTU)
189*4882a593Smuzhiyun buf[4] = mlx4_en_test_loopback(priv);
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun if (carrier_ok)
193*4882a593Smuzhiyun netif_carrier_on(dev);
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun buf[0] = mlx4_en_test_interrupts(priv);
197*4882a593Smuzhiyun buf[1] = mlx4_en_test_link(priv);
198*4882a593Smuzhiyun buf[2] = mlx4_en_test_speed(priv);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun for (i = 0; i < MLX4_EN_NUM_SELF_TEST; i++) {
201*4882a593Smuzhiyun if (buf[i])
202*4882a593Smuzhiyun *flags |= ETH_TEST_FL_FAILED;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun }
205