1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2018, Mellanox Technologies. All rights reserved.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This software is available to you under a choice of one of two
5*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU
6*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file
7*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the
8*4882a593Smuzhiyun * OpenIB.org BSD license below:
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or
11*4882a593Smuzhiyun * without modification, are permitted provided that the following
12*4882a593Smuzhiyun * conditions are met:
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * - Redistributions of source code must retain the above
15*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
16*4882a593Smuzhiyun * disclaimer.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above
19*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
20*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials
21*4882a593Smuzhiyun * provided with the distribution.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30*4882a593Smuzhiyun * SOFTWARE.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include "mlx4.h"
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define BAD_ACCESS 0xBADACCE5
36*4882a593Smuzhiyun #define HEALTH_BUFFER_SIZE 0x40
37*4882a593Smuzhiyun #define CR_ENABLE_BIT swab32(BIT(6))
38*4882a593Smuzhiyun #define CR_ENABLE_BIT_OFFSET 0xF3F04
39*4882a593Smuzhiyun #define MAX_NUM_OF_DUMPS_TO_STORE (8)
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define REGION_CR_SPACE "cr-space"
42*4882a593Smuzhiyun #define REGION_FW_HEALTH "fw-health"
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun static const char * const region_cr_space_str = REGION_CR_SPACE;
45*4882a593Smuzhiyun static const char * const region_fw_health_str = REGION_FW_HEALTH;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun static const struct devlink_region_ops region_cr_space_ops = {
48*4882a593Smuzhiyun .name = REGION_CR_SPACE,
49*4882a593Smuzhiyun .destructor = &kvfree,
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun static const struct devlink_region_ops region_fw_health_ops = {
53*4882a593Smuzhiyun .name = REGION_FW_HEALTH,
54*4882a593Smuzhiyun .destructor = &kvfree,
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* Set to true in case cr enable bit was set to true before crdump */
58*4882a593Smuzhiyun static bool crdump_enbale_bit_set;
59*4882a593Smuzhiyun
crdump_enable_crspace_access(struct mlx4_dev * dev,u8 __iomem * cr_space)60*4882a593Smuzhiyun static void crdump_enable_crspace_access(struct mlx4_dev *dev,
61*4882a593Smuzhiyun u8 __iomem *cr_space)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun /* Get current enable bit value */
64*4882a593Smuzhiyun crdump_enbale_bit_set =
65*4882a593Smuzhiyun readl(cr_space + CR_ENABLE_BIT_OFFSET) & CR_ENABLE_BIT;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* Enable FW CR filter (set bit6 to 0) */
68*4882a593Smuzhiyun if (crdump_enbale_bit_set)
69*4882a593Smuzhiyun writel(readl(cr_space + CR_ENABLE_BIT_OFFSET) & ~CR_ENABLE_BIT,
70*4882a593Smuzhiyun cr_space + CR_ENABLE_BIT_OFFSET);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* Enable block volatile crspace accesses */
73*4882a593Smuzhiyun writel(swab32(1), cr_space + dev->caps.health_buffer_addrs +
74*4882a593Smuzhiyun HEALTH_BUFFER_SIZE);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
crdump_disable_crspace_access(struct mlx4_dev * dev,u8 __iomem * cr_space)77*4882a593Smuzhiyun static void crdump_disable_crspace_access(struct mlx4_dev *dev,
78*4882a593Smuzhiyun u8 __iomem *cr_space)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun /* Disable block volatile crspace accesses */
81*4882a593Smuzhiyun writel(0, cr_space + dev->caps.health_buffer_addrs +
82*4882a593Smuzhiyun HEALTH_BUFFER_SIZE);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* Restore FW CR filter value (set bit6 to original value) */
85*4882a593Smuzhiyun if (crdump_enbale_bit_set)
86*4882a593Smuzhiyun writel(readl(cr_space + CR_ENABLE_BIT_OFFSET) | CR_ENABLE_BIT,
87*4882a593Smuzhiyun cr_space + CR_ENABLE_BIT_OFFSET);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
mlx4_crdump_collect_crspace(struct mlx4_dev * dev,u8 __iomem * cr_space,u32 id)90*4882a593Smuzhiyun static void mlx4_crdump_collect_crspace(struct mlx4_dev *dev,
91*4882a593Smuzhiyun u8 __iomem *cr_space,
92*4882a593Smuzhiyun u32 id)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun struct mlx4_fw_crdump *crdump = &dev->persist->crdump;
95*4882a593Smuzhiyun struct pci_dev *pdev = dev->persist->pdev;
96*4882a593Smuzhiyun unsigned long cr_res_size;
97*4882a593Smuzhiyun u8 *crspace_data;
98*4882a593Smuzhiyun int offset;
99*4882a593Smuzhiyun int err;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun if (!crdump->region_crspace) {
102*4882a593Smuzhiyun mlx4_err(dev, "crdump: cr-space region is NULL\n");
103*4882a593Smuzhiyun return;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* Try to collect CR space */
107*4882a593Smuzhiyun cr_res_size = pci_resource_len(pdev, 0);
108*4882a593Smuzhiyun crspace_data = kvmalloc(cr_res_size, GFP_KERNEL);
109*4882a593Smuzhiyun if (crspace_data) {
110*4882a593Smuzhiyun for (offset = 0; offset < cr_res_size; offset += 4)
111*4882a593Smuzhiyun *(u32 *)(crspace_data + offset) =
112*4882a593Smuzhiyun readl(cr_space + offset);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun err = devlink_region_snapshot_create(crdump->region_crspace,
115*4882a593Smuzhiyun crspace_data, id);
116*4882a593Smuzhiyun if (err) {
117*4882a593Smuzhiyun kvfree(crspace_data);
118*4882a593Smuzhiyun mlx4_warn(dev, "crdump: devlink create %s snapshot id %d err %d\n",
119*4882a593Smuzhiyun region_cr_space_str, id, err);
120*4882a593Smuzhiyun } else {
121*4882a593Smuzhiyun mlx4_info(dev, "crdump: added snapshot %d to devlink region %s\n",
122*4882a593Smuzhiyun id, region_cr_space_str);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun } else {
125*4882a593Smuzhiyun mlx4_err(dev, "crdump: Failed to allocate crspace buffer\n");
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
mlx4_crdump_collect_fw_health(struct mlx4_dev * dev,u8 __iomem * cr_space,u32 id)129*4882a593Smuzhiyun static void mlx4_crdump_collect_fw_health(struct mlx4_dev *dev,
130*4882a593Smuzhiyun u8 __iomem *cr_space,
131*4882a593Smuzhiyun u32 id)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun struct mlx4_fw_crdump *crdump = &dev->persist->crdump;
134*4882a593Smuzhiyun u8 *health_data;
135*4882a593Smuzhiyun int offset;
136*4882a593Smuzhiyun int err;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun if (!crdump->region_fw_health) {
139*4882a593Smuzhiyun mlx4_err(dev, "crdump: fw-health region is NULL\n");
140*4882a593Smuzhiyun return;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /* Try to collect health buffer */
144*4882a593Smuzhiyun health_data = kvmalloc(HEALTH_BUFFER_SIZE, GFP_KERNEL);
145*4882a593Smuzhiyun if (health_data) {
146*4882a593Smuzhiyun u8 __iomem *health_buf_start =
147*4882a593Smuzhiyun cr_space + dev->caps.health_buffer_addrs;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun for (offset = 0; offset < HEALTH_BUFFER_SIZE; offset += 4)
150*4882a593Smuzhiyun *(u32 *)(health_data + offset) =
151*4882a593Smuzhiyun readl(health_buf_start + offset);
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun err = devlink_region_snapshot_create(crdump->region_fw_health,
154*4882a593Smuzhiyun health_data, id);
155*4882a593Smuzhiyun if (err) {
156*4882a593Smuzhiyun kvfree(health_data);
157*4882a593Smuzhiyun mlx4_warn(dev, "crdump: devlink create %s snapshot id %d err %d\n",
158*4882a593Smuzhiyun region_fw_health_str, id, err);
159*4882a593Smuzhiyun } else {
160*4882a593Smuzhiyun mlx4_info(dev, "crdump: added snapshot %d to devlink region %s\n",
161*4882a593Smuzhiyun id, region_fw_health_str);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun } else {
164*4882a593Smuzhiyun mlx4_err(dev, "crdump: Failed to allocate health buffer\n");
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
mlx4_crdump_collect(struct mlx4_dev * dev)168*4882a593Smuzhiyun int mlx4_crdump_collect(struct mlx4_dev *dev)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct devlink *devlink = priv_to_devlink(mlx4_priv(dev));
171*4882a593Smuzhiyun struct mlx4_fw_crdump *crdump = &dev->persist->crdump;
172*4882a593Smuzhiyun struct pci_dev *pdev = dev->persist->pdev;
173*4882a593Smuzhiyun unsigned long cr_res_size;
174*4882a593Smuzhiyun u8 __iomem *cr_space;
175*4882a593Smuzhiyun int err;
176*4882a593Smuzhiyun u32 id;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun if (!dev->caps.health_buffer_addrs) {
179*4882a593Smuzhiyun mlx4_info(dev, "crdump: FW doesn't support health buffer access, skipping\n");
180*4882a593Smuzhiyun return 0;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun if (!crdump->snapshot_enable) {
184*4882a593Smuzhiyun mlx4_info(dev, "crdump: devlink snapshot disabled, skipping\n");
185*4882a593Smuzhiyun return 0;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun cr_res_size = pci_resource_len(pdev, 0);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun cr_space = ioremap(pci_resource_start(pdev, 0), cr_res_size);
191*4882a593Smuzhiyun if (!cr_space) {
192*4882a593Smuzhiyun mlx4_err(dev, "crdump: Failed to map pci cr region\n");
193*4882a593Smuzhiyun return -ENODEV;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /* Get the available snapshot ID for the dumps */
197*4882a593Smuzhiyun err = devlink_region_snapshot_id_get(devlink, &id);
198*4882a593Smuzhiyun if (err) {
199*4882a593Smuzhiyun mlx4_err(dev, "crdump: devlink get snapshot id err %d\n", err);
200*4882a593Smuzhiyun iounmap(cr_space);
201*4882a593Smuzhiyun return err;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun crdump_enable_crspace_access(dev, cr_space);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /* Try to capture dumps */
207*4882a593Smuzhiyun mlx4_crdump_collect_crspace(dev, cr_space, id);
208*4882a593Smuzhiyun mlx4_crdump_collect_fw_health(dev, cr_space, id);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun /* Release reference on the snapshot id */
211*4882a593Smuzhiyun devlink_region_snapshot_id_put(devlink, id);
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun crdump_disable_crspace_access(dev, cr_space);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun iounmap(cr_space);
216*4882a593Smuzhiyun return 0;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun
mlx4_crdump_init(struct mlx4_dev * dev)219*4882a593Smuzhiyun int mlx4_crdump_init(struct mlx4_dev *dev)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun struct devlink *devlink = priv_to_devlink(mlx4_priv(dev));
222*4882a593Smuzhiyun struct mlx4_fw_crdump *crdump = &dev->persist->crdump;
223*4882a593Smuzhiyun struct pci_dev *pdev = dev->persist->pdev;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun crdump->snapshot_enable = false;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun /* Create cr-space region */
228*4882a593Smuzhiyun crdump->region_crspace =
229*4882a593Smuzhiyun devlink_region_create(devlink,
230*4882a593Smuzhiyun ®ion_cr_space_ops,
231*4882a593Smuzhiyun MAX_NUM_OF_DUMPS_TO_STORE,
232*4882a593Smuzhiyun pci_resource_len(pdev, 0));
233*4882a593Smuzhiyun if (IS_ERR(crdump->region_crspace))
234*4882a593Smuzhiyun mlx4_warn(dev, "crdump: create devlink region %s err %ld\n",
235*4882a593Smuzhiyun region_cr_space_str,
236*4882a593Smuzhiyun PTR_ERR(crdump->region_crspace));
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun /* Create fw-health region */
239*4882a593Smuzhiyun crdump->region_fw_health =
240*4882a593Smuzhiyun devlink_region_create(devlink,
241*4882a593Smuzhiyun ®ion_fw_health_ops,
242*4882a593Smuzhiyun MAX_NUM_OF_DUMPS_TO_STORE,
243*4882a593Smuzhiyun HEALTH_BUFFER_SIZE);
244*4882a593Smuzhiyun if (IS_ERR(crdump->region_fw_health))
245*4882a593Smuzhiyun mlx4_warn(dev, "crdump: create devlink region %s err %ld\n",
246*4882a593Smuzhiyun region_fw_health_str,
247*4882a593Smuzhiyun PTR_ERR(crdump->region_fw_health));
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun return 0;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
mlx4_crdump_end(struct mlx4_dev * dev)252*4882a593Smuzhiyun void mlx4_crdump_end(struct mlx4_dev *dev)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun struct mlx4_fw_crdump *crdump = &dev->persist->crdump;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun devlink_region_destroy(crdump->region_fw_health);
257*4882a593Smuzhiyun devlink_region_destroy(crdump->region_crspace);
258*4882a593Smuzhiyun }
259