1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun# 3*4882a593Smuzhiyun# Marvell OcteonTX2 drivers configuration 4*4882a593Smuzhiyun# 5*4882a593Smuzhiyun 6*4882a593Smuzhiyunconfig OCTEONTX2_MBOX 7*4882a593Smuzhiyun tristate 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunconfig OCTEONTX2_AF 10*4882a593Smuzhiyun tristate "Marvell OcteonTX2 RVU Admin Function driver" 11*4882a593Smuzhiyun select OCTEONTX2_MBOX 12*4882a593Smuzhiyun depends on (64BIT && COMPILE_TEST) || ARM64 13*4882a593Smuzhiyun depends on PCI 14*4882a593Smuzhiyun help 15*4882a593Smuzhiyun This driver supports Marvell's OcteonTX2 Resource Virtualization 16*4882a593Smuzhiyun Unit's admin function manager which manages all RVU HW resources 17*4882a593Smuzhiyun and provides a medium to other PF/VFs to configure HW. Should be 18*4882a593Smuzhiyun enabled for other RVU device drivers to work. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunconfig NDC_DIS_DYNAMIC_CACHING 21*4882a593Smuzhiyun bool "Disable caching of dynamic entries in NDC" 22*4882a593Smuzhiyun depends on OCTEONTX2_AF 23*4882a593Smuzhiyun default n 24*4882a593Smuzhiyun help 25*4882a593Smuzhiyun This config option disables caching of dynamic entries such as NIX SQEs 26*4882a593Smuzhiyun , NPA stack pages etc in NDC. Also locks down NIX SQ/CQ/RQ/RSS and 27*4882a593Smuzhiyun NPA Aura/Pool contexts. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyunconfig OCTEONTX2_PF 30*4882a593Smuzhiyun tristate "Marvell OcteonTX2 NIC Physical Function driver" 31*4882a593Smuzhiyun select OCTEONTX2_MBOX 32*4882a593Smuzhiyun depends on (64BIT && COMPILE_TEST) || ARM64 33*4882a593Smuzhiyun depends on PCI 34*4882a593Smuzhiyun help 35*4882a593Smuzhiyun This driver supports Marvell's OcteonTX2 NIC physical function. 36*4882a593Smuzhiyun 37*4882a593Smuzhiyunconfig OCTEONTX2_VF 38*4882a593Smuzhiyun tristate "Marvell OcteonTX2 NIC Virtual Function driver" 39*4882a593Smuzhiyun depends on OCTEONTX2_PF 40*4882a593Smuzhiyun help 41*4882a593Smuzhiyun This driver supports Marvell's OcteonTX2 NIC virtual function. 42