xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* Copyright(c) 1999 - 2018 Intel Corporation. */
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun /******************************************************************************
5*4882a593Smuzhiyun  Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
6*4882a593Smuzhiyun ******************************************************************************/
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/types.h>
11*4882a593Smuzhiyun #include <linux/bitops.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/pci.h>
14*4882a593Smuzhiyun #include <linux/netdevice.h>
15*4882a593Smuzhiyun #include <linux/vmalloc.h>
16*4882a593Smuzhiyun #include <linux/string.h>
17*4882a593Smuzhiyun #include <linux/in.h>
18*4882a593Smuzhiyun #include <linux/ip.h>
19*4882a593Smuzhiyun #include <linux/tcp.h>
20*4882a593Smuzhiyun #include <linux/sctp.h>
21*4882a593Smuzhiyun #include <linux/ipv6.h>
22*4882a593Smuzhiyun #include <linux/slab.h>
23*4882a593Smuzhiyun #include <net/checksum.h>
24*4882a593Smuzhiyun #include <net/ip6_checksum.h>
25*4882a593Smuzhiyun #include <linux/ethtool.h>
26*4882a593Smuzhiyun #include <linux/if.h>
27*4882a593Smuzhiyun #include <linux/if_vlan.h>
28*4882a593Smuzhiyun #include <linux/prefetch.h>
29*4882a593Smuzhiyun #include <net/mpls.h>
30*4882a593Smuzhiyun #include <linux/bpf.h>
31*4882a593Smuzhiyun #include <linux/bpf_trace.h>
32*4882a593Smuzhiyun #include <linux/atomic.h>
33*4882a593Smuzhiyun #include <net/xfrm.h>
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #include "ixgbevf.h"
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun const char ixgbevf_driver_name[] = "ixgbevf";
38*4882a593Smuzhiyun static const char ixgbevf_driver_string[] =
39*4882a593Smuzhiyun 	"Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun static char ixgbevf_copyright[] =
42*4882a593Smuzhiyun 	"Copyright (c) 2009 - 2018 Intel Corporation.";
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
45*4882a593Smuzhiyun 	[board_82599_vf]	= &ixgbevf_82599_vf_info,
46*4882a593Smuzhiyun 	[board_82599_vf_hv]	= &ixgbevf_82599_vf_hv_info,
47*4882a593Smuzhiyun 	[board_X540_vf]		= &ixgbevf_X540_vf_info,
48*4882a593Smuzhiyun 	[board_X540_vf_hv]	= &ixgbevf_X540_vf_hv_info,
49*4882a593Smuzhiyun 	[board_X550_vf]		= &ixgbevf_X550_vf_info,
50*4882a593Smuzhiyun 	[board_X550_vf_hv]	= &ixgbevf_X550_vf_hv_info,
51*4882a593Smuzhiyun 	[board_X550EM_x_vf]	= &ixgbevf_X550EM_x_vf_info,
52*4882a593Smuzhiyun 	[board_X550EM_x_vf_hv]	= &ixgbevf_X550EM_x_vf_hv_info,
53*4882a593Smuzhiyun 	[board_x550em_a_vf]	= &ixgbevf_x550em_a_vf_info,
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /* ixgbevf_pci_tbl - PCI Device ID Table
57*4882a593Smuzhiyun  *
58*4882a593Smuzhiyun  * Wildcard entries (PCI_ANY_ID) should come last
59*4882a593Smuzhiyun  * Last entry must be all 0s
60*4882a593Smuzhiyun  *
61*4882a593Smuzhiyun  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
62*4882a593Smuzhiyun  *   Class, Class Mask, private data (not used) }
63*4882a593Smuzhiyun  */
64*4882a593Smuzhiyun static const struct pci_device_id ixgbevf_pci_tbl[] = {
65*4882a593Smuzhiyun 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
66*4882a593Smuzhiyun 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF_HV), board_82599_vf_hv },
67*4882a593Smuzhiyun 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
68*4882a593Smuzhiyun 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF_HV), board_X540_vf_hv },
69*4882a593Smuzhiyun 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
70*4882a593Smuzhiyun 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF_HV), board_X550_vf_hv },
71*4882a593Smuzhiyun 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
72*4882a593Smuzhiyun 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv},
73*4882a593Smuzhiyun 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf },
74*4882a593Smuzhiyun 	/* required last entry */
75*4882a593Smuzhiyun 	{0, }
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
80*4882a593Smuzhiyun MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
81*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
84*4882a593Smuzhiyun static int debug = -1;
85*4882a593Smuzhiyun module_param(debug, int, 0);
86*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun static struct workqueue_struct *ixgbevf_wq;
89*4882a593Smuzhiyun 
ixgbevf_service_event_schedule(struct ixgbevf_adapter * adapter)90*4882a593Smuzhiyun static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun 	if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
93*4882a593Smuzhiyun 	    !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
94*4882a593Smuzhiyun 	    !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
95*4882a593Smuzhiyun 		queue_work(ixgbevf_wq, &adapter->service_task);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
ixgbevf_service_event_complete(struct ixgbevf_adapter * adapter)98*4882a593Smuzhiyun static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	/* flush memory to make sure state is correct before next watchdog */
103*4882a593Smuzhiyun 	smp_mb__before_atomic();
104*4882a593Smuzhiyun 	clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun /* forward decls */
108*4882a593Smuzhiyun static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
109*4882a593Smuzhiyun static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
110*4882a593Smuzhiyun static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
111*4882a593Smuzhiyun static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer);
112*4882a593Smuzhiyun static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
113*4882a593Smuzhiyun 				  struct ixgbevf_rx_buffer *old_buff);
114*4882a593Smuzhiyun 
ixgbevf_remove_adapter(struct ixgbe_hw * hw)115*4882a593Smuzhiyun static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = hw->back;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	if (!hw->hw_addr)
120*4882a593Smuzhiyun 		return;
121*4882a593Smuzhiyun 	hw->hw_addr = NULL;
122*4882a593Smuzhiyun 	dev_err(&adapter->pdev->dev, "Adapter removed\n");
123*4882a593Smuzhiyun 	if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
124*4882a593Smuzhiyun 		ixgbevf_service_event_schedule(adapter);
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun 
ixgbevf_check_remove(struct ixgbe_hw * hw,u32 reg)127*4882a593Smuzhiyun static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun 	u32 value;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	/* The following check not only optimizes a bit by not
132*4882a593Smuzhiyun 	 * performing a read on the status register when the
133*4882a593Smuzhiyun 	 * register just read was a status register read that
134*4882a593Smuzhiyun 	 * returned IXGBE_FAILED_READ_REG. It also blocks any
135*4882a593Smuzhiyun 	 * potential recursion.
136*4882a593Smuzhiyun 	 */
137*4882a593Smuzhiyun 	if (reg == IXGBE_VFSTATUS) {
138*4882a593Smuzhiyun 		ixgbevf_remove_adapter(hw);
139*4882a593Smuzhiyun 		return;
140*4882a593Smuzhiyun 	}
141*4882a593Smuzhiyun 	value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
142*4882a593Smuzhiyun 	if (value == IXGBE_FAILED_READ_REG)
143*4882a593Smuzhiyun 		ixgbevf_remove_adapter(hw);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun 
ixgbevf_read_reg(struct ixgbe_hw * hw,u32 reg)146*4882a593Smuzhiyun u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
149*4882a593Smuzhiyun 	u32 value;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	if (IXGBE_REMOVED(reg_addr))
152*4882a593Smuzhiyun 		return IXGBE_FAILED_READ_REG;
153*4882a593Smuzhiyun 	value = readl(reg_addr + reg);
154*4882a593Smuzhiyun 	if (unlikely(value == IXGBE_FAILED_READ_REG))
155*4882a593Smuzhiyun 		ixgbevf_check_remove(hw, reg);
156*4882a593Smuzhiyun 	return value;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun /**
160*4882a593Smuzhiyun  * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
161*4882a593Smuzhiyun  * @adapter: pointer to adapter struct
162*4882a593Smuzhiyun  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
163*4882a593Smuzhiyun  * @queue: queue to map the corresponding interrupt to
164*4882a593Smuzhiyun  * @msix_vector: the vector to map to the corresponding queue
165*4882a593Smuzhiyun  **/
ixgbevf_set_ivar(struct ixgbevf_adapter * adapter,s8 direction,u8 queue,u8 msix_vector)166*4882a593Smuzhiyun static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
167*4882a593Smuzhiyun 			     u8 queue, u8 msix_vector)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun 	u32 ivar, index;
170*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	if (direction == -1) {
173*4882a593Smuzhiyun 		/* other causes */
174*4882a593Smuzhiyun 		msix_vector |= IXGBE_IVAR_ALLOC_VAL;
175*4882a593Smuzhiyun 		ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
176*4882a593Smuzhiyun 		ivar &= ~0xFF;
177*4882a593Smuzhiyun 		ivar |= msix_vector;
178*4882a593Smuzhiyun 		IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
179*4882a593Smuzhiyun 	} else {
180*4882a593Smuzhiyun 		/* Tx or Rx causes */
181*4882a593Smuzhiyun 		msix_vector |= IXGBE_IVAR_ALLOC_VAL;
182*4882a593Smuzhiyun 		index = ((16 * (queue & 1)) + (8 * direction));
183*4882a593Smuzhiyun 		ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
184*4882a593Smuzhiyun 		ivar &= ~(0xFF << index);
185*4882a593Smuzhiyun 		ivar |= (msix_vector << index);
186*4882a593Smuzhiyun 		IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
187*4882a593Smuzhiyun 	}
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun 
ixgbevf_get_tx_completed(struct ixgbevf_ring * ring)190*4882a593Smuzhiyun static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	return ring->stats.packets;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun 
ixgbevf_get_tx_pending(struct ixgbevf_ring * ring)195*4882a593Smuzhiyun static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
198*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
201*4882a593Smuzhiyun 	u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	if (head != tail)
204*4882a593Smuzhiyun 		return (head < tail) ?
205*4882a593Smuzhiyun 			tail - head : (tail + ring->count - head);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return 0;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
ixgbevf_check_tx_hang(struct ixgbevf_ring * tx_ring)210*4882a593Smuzhiyun static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
213*4882a593Smuzhiyun 	u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
214*4882a593Smuzhiyun 	u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	clear_check_for_tx_hang(tx_ring);
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	/* Check for a hung queue, but be thorough. This verifies
219*4882a593Smuzhiyun 	 * that a transmit has been completed since the previous
220*4882a593Smuzhiyun 	 * check AND there is at least one packet pending. The
221*4882a593Smuzhiyun 	 * ARMED bit is set to indicate a potential hang.
222*4882a593Smuzhiyun 	 */
223*4882a593Smuzhiyun 	if ((tx_done_old == tx_done) && tx_pending) {
224*4882a593Smuzhiyun 		/* make sure it is true for two checks in a row */
225*4882a593Smuzhiyun 		return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
226*4882a593Smuzhiyun 					&tx_ring->state);
227*4882a593Smuzhiyun 	}
228*4882a593Smuzhiyun 	/* reset the countdown */
229*4882a593Smuzhiyun 	clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	/* update completed stats and continue */
232*4882a593Smuzhiyun 	tx_ring->tx_stats.tx_done_old = tx_done;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	return false;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun 
ixgbevf_tx_timeout_reset(struct ixgbevf_adapter * adapter)237*4882a593Smuzhiyun static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun 	/* Do the reset outside of interrupt context */
240*4882a593Smuzhiyun 	if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
241*4882a593Smuzhiyun 		set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
242*4882a593Smuzhiyun 		ixgbevf_service_event_schedule(adapter);
243*4882a593Smuzhiyun 	}
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun /**
247*4882a593Smuzhiyun  * ixgbevf_tx_timeout - Respond to a Tx Hang
248*4882a593Smuzhiyun  * @netdev: network interface device structure
249*4882a593Smuzhiyun  * @txqueue: transmit queue hanging (unused)
250*4882a593Smuzhiyun  **/
ixgbevf_tx_timeout(struct net_device * netdev,unsigned int __always_unused txqueue)251*4882a593Smuzhiyun static void ixgbevf_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	ixgbevf_tx_timeout_reset(adapter);
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun /**
259*4882a593Smuzhiyun  * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
260*4882a593Smuzhiyun  * @q_vector: board private structure
261*4882a593Smuzhiyun  * @tx_ring: tx ring to clean
262*4882a593Smuzhiyun  * @napi_budget: Used to determine if we are in netpoll
263*4882a593Smuzhiyun  **/
ixgbevf_clean_tx_irq(struct ixgbevf_q_vector * q_vector,struct ixgbevf_ring * tx_ring,int napi_budget)264*4882a593Smuzhiyun static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
265*4882a593Smuzhiyun 				 struct ixgbevf_ring *tx_ring, int napi_budget)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = q_vector->adapter;
268*4882a593Smuzhiyun 	struct ixgbevf_tx_buffer *tx_buffer;
269*4882a593Smuzhiyun 	union ixgbe_adv_tx_desc *tx_desc;
270*4882a593Smuzhiyun 	unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
271*4882a593Smuzhiyun 	unsigned int budget = tx_ring->count / 2;
272*4882a593Smuzhiyun 	unsigned int i = tx_ring->next_to_clean;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	if (test_bit(__IXGBEVF_DOWN, &adapter->state))
275*4882a593Smuzhiyun 		return true;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	tx_buffer = &tx_ring->tx_buffer_info[i];
278*4882a593Smuzhiyun 	tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
279*4882a593Smuzhiyun 	i -= tx_ring->count;
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	do {
282*4882a593Smuzhiyun 		union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 		/* if next_to_watch is not set then there is no work pending */
285*4882a593Smuzhiyun 		if (!eop_desc)
286*4882a593Smuzhiyun 			break;
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 		/* prevent any other reads prior to eop_desc */
289*4882a593Smuzhiyun 		smp_rmb();
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 		/* if DD is not set pending work has not been completed */
292*4882a593Smuzhiyun 		if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
293*4882a593Smuzhiyun 			break;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 		/* clear next_to_watch to prevent false hangs */
296*4882a593Smuzhiyun 		tx_buffer->next_to_watch = NULL;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 		/* update the statistics for this packet */
299*4882a593Smuzhiyun 		total_bytes += tx_buffer->bytecount;
300*4882a593Smuzhiyun 		total_packets += tx_buffer->gso_segs;
301*4882a593Smuzhiyun 		if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
302*4882a593Smuzhiyun 			total_ipsec++;
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 		/* free the skb */
305*4882a593Smuzhiyun 		if (ring_is_xdp(tx_ring))
306*4882a593Smuzhiyun 			page_frag_free(tx_buffer->data);
307*4882a593Smuzhiyun 		else
308*4882a593Smuzhiyun 			napi_consume_skb(tx_buffer->skb, napi_budget);
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 		/* unmap skb header data */
311*4882a593Smuzhiyun 		dma_unmap_single(tx_ring->dev,
312*4882a593Smuzhiyun 				 dma_unmap_addr(tx_buffer, dma),
313*4882a593Smuzhiyun 				 dma_unmap_len(tx_buffer, len),
314*4882a593Smuzhiyun 				 DMA_TO_DEVICE);
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 		/* clear tx_buffer data */
317*4882a593Smuzhiyun 		dma_unmap_len_set(tx_buffer, len, 0);
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 		/* unmap remaining buffers */
320*4882a593Smuzhiyun 		while (tx_desc != eop_desc) {
321*4882a593Smuzhiyun 			tx_buffer++;
322*4882a593Smuzhiyun 			tx_desc++;
323*4882a593Smuzhiyun 			i++;
324*4882a593Smuzhiyun 			if (unlikely(!i)) {
325*4882a593Smuzhiyun 				i -= tx_ring->count;
326*4882a593Smuzhiyun 				tx_buffer = tx_ring->tx_buffer_info;
327*4882a593Smuzhiyun 				tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
328*4882a593Smuzhiyun 			}
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 			/* unmap any remaining paged data */
331*4882a593Smuzhiyun 			if (dma_unmap_len(tx_buffer, len)) {
332*4882a593Smuzhiyun 				dma_unmap_page(tx_ring->dev,
333*4882a593Smuzhiyun 					       dma_unmap_addr(tx_buffer, dma),
334*4882a593Smuzhiyun 					       dma_unmap_len(tx_buffer, len),
335*4882a593Smuzhiyun 					       DMA_TO_DEVICE);
336*4882a593Smuzhiyun 				dma_unmap_len_set(tx_buffer, len, 0);
337*4882a593Smuzhiyun 			}
338*4882a593Smuzhiyun 		}
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 		/* move us one more past the eop_desc for start of next pkt */
341*4882a593Smuzhiyun 		tx_buffer++;
342*4882a593Smuzhiyun 		tx_desc++;
343*4882a593Smuzhiyun 		i++;
344*4882a593Smuzhiyun 		if (unlikely(!i)) {
345*4882a593Smuzhiyun 			i -= tx_ring->count;
346*4882a593Smuzhiyun 			tx_buffer = tx_ring->tx_buffer_info;
347*4882a593Smuzhiyun 			tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
348*4882a593Smuzhiyun 		}
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 		/* issue prefetch for next Tx descriptor */
351*4882a593Smuzhiyun 		prefetch(tx_desc);
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 		/* update budget accounting */
354*4882a593Smuzhiyun 		budget--;
355*4882a593Smuzhiyun 	} while (likely(budget));
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	i += tx_ring->count;
358*4882a593Smuzhiyun 	tx_ring->next_to_clean = i;
359*4882a593Smuzhiyun 	u64_stats_update_begin(&tx_ring->syncp);
360*4882a593Smuzhiyun 	tx_ring->stats.bytes += total_bytes;
361*4882a593Smuzhiyun 	tx_ring->stats.packets += total_packets;
362*4882a593Smuzhiyun 	u64_stats_update_end(&tx_ring->syncp);
363*4882a593Smuzhiyun 	q_vector->tx.total_bytes += total_bytes;
364*4882a593Smuzhiyun 	q_vector->tx.total_packets += total_packets;
365*4882a593Smuzhiyun 	adapter->tx_ipsec += total_ipsec;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
368*4882a593Smuzhiyun 		struct ixgbe_hw *hw = &adapter->hw;
369*4882a593Smuzhiyun 		union ixgbe_adv_tx_desc *eop_desc;
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 		eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 		pr_err("Detected Tx Unit Hang%s\n"
374*4882a593Smuzhiyun 		       "  Tx Queue             <%d>\n"
375*4882a593Smuzhiyun 		       "  TDH, TDT             <%x>, <%x>\n"
376*4882a593Smuzhiyun 		       "  next_to_use          <%x>\n"
377*4882a593Smuzhiyun 		       "  next_to_clean        <%x>\n"
378*4882a593Smuzhiyun 		       "tx_buffer_info[next_to_clean]\n"
379*4882a593Smuzhiyun 		       "  next_to_watch        <%p>\n"
380*4882a593Smuzhiyun 		       "  eop_desc->wb.status  <%x>\n"
381*4882a593Smuzhiyun 		       "  time_stamp           <%lx>\n"
382*4882a593Smuzhiyun 		       "  jiffies              <%lx>\n",
383*4882a593Smuzhiyun 		       ring_is_xdp(tx_ring) ? " XDP" : "",
384*4882a593Smuzhiyun 		       tx_ring->queue_index,
385*4882a593Smuzhiyun 		       IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
386*4882a593Smuzhiyun 		       IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
387*4882a593Smuzhiyun 		       tx_ring->next_to_use, i,
388*4882a593Smuzhiyun 		       eop_desc, (eop_desc ? eop_desc->wb.status : 0),
389*4882a593Smuzhiyun 		       tx_ring->tx_buffer_info[i].time_stamp, jiffies);
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 		if (!ring_is_xdp(tx_ring))
392*4882a593Smuzhiyun 			netif_stop_subqueue(tx_ring->netdev,
393*4882a593Smuzhiyun 					    tx_ring->queue_index);
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 		/* schedule immediate reset if we believe we hung */
396*4882a593Smuzhiyun 		ixgbevf_tx_timeout_reset(adapter);
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 		return true;
399*4882a593Smuzhiyun 	}
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	if (ring_is_xdp(tx_ring))
402*4882a593Smuzhiyun 		return !!budget;
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
405*4882a593Smuzhiyun 	if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
406*4882a593Smuzhiyun 		     (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
407*4882a593Smuzhiyun 		/* Make sure that anybody stopping the queue after this
408*4882a593Smuzhiyun 		 * sees the new next_to_clean.
409*4882a593Smuzhiyun 		 */
410*4882a593Smuzhiyun 		smp_mb();
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 		if (__netif_subqueue_stopped(tx_ring->netdev,
413*4882a593Smuzhiyun 					     tx_ring->queue_index) &&
414*4882a593Smuzhiyun 		    !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
415*4882a593Smuzhiyun 			netif_wake_subqueue(tx_ring->netdev,
416*4882a593Smuzhiyun 					    tx_ring->queue_index);
417*4882a593Smuzhiyun 			++tx_ring->tx_stats.restart_queue;
418*4882a593Smuzhiyun 		}
419*4882a593Smuzhiyun 	}
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	return !!budget;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun /**
425*4882a593Smuzhiyun  * ixgbevf_rx_skb - Helper function to determine proper Rx method
426*4882a593Smuzhiyun  * @q_vector: structure containing interrupt and ring information
427*4882a593Smuzhiyun  * @skb: packet to send up
428*4882a593Smuzhiyun  **/
ixgbevf_rx_skb(struct ixgbevf_q_vector * q_vector,struct sk_buff * skb)429*4882a593Smuzhiyun static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
430*4882a593Smuzhiyun 			   struct sk_buff *skb)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun 	napi_gro_receive(&q_vector->napi, skb);
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun #define IXGBE_RSS_L4_TYPES_MASK \
436*4882a593Smuzhiyun 	((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
437*4882a593Smuzhiyun 	 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
438*4882a593Smuzhiyun 	 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
439*4882a593Smuzhiyun 	 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
440*4882a593Smuzhiyun 
ixgbevf_rx_hash(struct ixgbevf_ring * ring,union ixgbe_adv_rx_desc * rx_desc,struct sk_buff * skb)441*4882a593Smuzhiyun static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
442*4882a593Smuzhiyun 				   union ixgbe_adv_rx_desc *rx_desc,
443*4882a593Smuzhiyun 				   struct sk_buff *skb)
444*4882a593Smuzhiyun {
445*4882a593Smuzhiyun 	u16 rss_type;
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun 	if (!(ring->netdev->features & NETIF_F_RXHASH))
448*4882a593Smuzhiyun 		return;
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
451*4882a593Smuzhiyun 		   IXGBE_RXDADV_RSSTYPE_MASK;
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 	if (!rss_type)
454*4882a593Smuzhiyun 		return;
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
457*4882a593Smuzhiyun 		     (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
458*4882a593Smuzhiyun 		     PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun /**
462*4882a593Smuzhiyun  * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
463*4882a593Smuzhiyun  * @ring: structure containig ring specific data
464*4882a593Smuzhiyun  * @rx_desc: current Rx descriptor being processed
465*4882a593Smuzhiyun  * @skb: skb currently being received and modified
466*4882a593Smuzhiyun  **/
ixgbevf_rx_checksum(struct ixgbevf_ring * ring,union ixgbe_adv_rx_desc * rx_desc,struct sk_buff * skb)467*4882a593Smuzhiyun static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
468*4882a593Smuzhiyun 				       union ixgbe_adv_rx_desc *rx_desc,
469*4882a593Smuzhiyun 				       struct sk_buff *skb)
470*4882a593Smuzhiyun {
471*4882a593Smuzhiyun 	skb_checksum_none_assert(skb);
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	/* Rx csum disabled */
474*4882a593Smuzhiyun 	if (!(ring->netdev->features & NETIF_F_RXCSUM))
475*4882a593Smuzhiyun 		return;
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	/* if IP and error */
478*4882a593Smuzhiyun 	if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
479*4882a593Smuzhiyun 	    ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
480*4882a593Smuzhiyun 		ring->rx_stats.csum_err++;
481*4882a593Smuzhiyun 		return;
482*4882a593Smuzhiyun 	}
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
485*4882a593Smuzhiyun 		return;
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
488*4882a593Smuzhiyun 		ring->rx_stats.csum_err++;
489*4882a593Smuzhiyun 		return;
490*4882a593Smuzhiyun 	}
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	/* It must be a TCP or UDP packet with a valid checksum */
493*4882a593Smuzhiyun 	skb->ip_summed = CHECKSUM_UNNECESSARY;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun /**
497*4882a593Smuzhiyun  * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
498*4882a593Smuzhiyun  * @rx_ring: rx descriptor ring packet is being transacted on
499*4882a593Smuzhiyun  * @rx_desc: pointer to the EOP Rx descriptor
500*4882a593Smuzhiyun  * @skb: pointer to current skb being populated
501*4882a593Smuzhiyun  *
502*4882a593Smuzhiyun  * This function checks the ring, descriptor, and packet information in
503*4882a593Smuzhiyun  * order to populate the checksum, VLAN, protocol, and other fields within
504*4882a593Smuzhiyun  * the skb.
505*4882a593Smuzhiyun  **/
ixgbevf_process_skb_fields(struct ixgbevf_ring * rx_ring,union ixgbe_adv_rx_desc * rx_desc,struct sk_buff * skb)506*4882a593Smuzhiyun static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
507*4882a593Smuzhiyun 				       union ixgbe_adv_rx_desc *rx_desc,
508*4882a593Smuzhiyun 				       struct sk_buff *skb)
509*4882a593Smuzhiyun {
510*4882a593Smuzhiyun 	ixgbevf_rx_hash(rx_ring, rx_desc, skb);
511*4882a593Smuzhiyun 	ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
514*4882a593Smuzhiyun 		u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
515*4882a593Smuzhiyun 		unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 		if (test_bit(vid & VLAN_VID_MASK, active_vlans))
518*4882a593Smuzhiyun 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
519*4882a593Smuzhiyun 	}
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
522*4882a593Smuzhiyun 		ixgbevf_ipsec_rx(rx_ring, rx_desc, skb);
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	skb->protocol = eth_type_trans(skb, rx_ring->netdev);
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun static
ixgbevf_get_rx_buffer(struct ixgbevf_ring * rx_ring,const unsigned int size)528*4882a593Smuzhiyun struct ixgbevf_rx_buffer *ixgbevf_get_rx_buffer(struct ixgbevf_ring *rx_ring,
529*4882a593Smuzhiyun 						const unsigned int size)
530*4882a593Smuzhiyun {
531*4882a593Smuzhiyun 	struct ixgbevf_rx_buffer *rx_buffer;
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
534*4882a593Smuzhiyun 	prefetchw(rx_buffer->page);
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	/* we are reusing so sync this buffer for CPU use */
537*4882a593Smuzhiyun 	dma_sync_single_range_for_cpu(rx_ring->dev,
538*4882a593Smuzhiyun 				      rx_buffer->dma,
539*4882a593Smuzhiyun 				      rx_buffer->page_offset,
540*4882a593Smuzhiyun 				      size,
541*4882a593Smuzhiyun 				      DMA_FROM_DEVICE);
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 	rx_buffer->pagecnt_bias--;
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	return rx_buffer;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun 
ixgbevf_put_rx_buffer(struct ixgbevf_ring * rx_ring,struct ixgbevf_rx_buffer * rx_buffer,struct sk_buff * skb)548*4882a593Smuzhiyun static void ixgbevf_put_rx_buffer(struct ixgbevf_ring *rx_ring,
549*4882a593Smuzhiyun 				  struct ixgbevf_rx_buffer *rx_buffer,
550*4882a593Smuzhiyun 				  struct sk_buff *skb)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun 	if (ixgbevf_can_reuse_rx_page(rx_buffer)) {
553*4882a593Smuzhiyun 		/* hand second half of page back to the ring */
554*4882a593Smuzhiyun 		ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
555*4882a593Smuzhiyun 	} else {
556*4882a593Smuzhiyun 		if (IS_ERR(skb))
557*4882a593Smuzhiyun 			/* We are not reusing the buffer so unmap it and free
558*4882a593Smuzhiyun 			 * any references we are holding to it
559*4882a593Smuzhiyun 			 */
560*4882a593Smuzhiyun 			dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
561*4882a593Smuzhiyun 					     ixgbevf_rx_pg_size(rx_ring),
562*4882a593Smuzhiyun 					     DMA_FROM_DEVICE,
563*4882a593Smuzhiyun 					     IXGBEVF_RX_DMA_ATTR);
564*4882a593Smuzhiyun 		__page_frag_cache_drain(rx_buffer->page,
565*4882a593Smuzhiyun 					rx_buffer->pagecnt_bias);
566*4882a593Smuzhiyun 	}
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 	/* clear contents of rx_buffer */
569*4882a593Smuzhiyun 	rx_buffer->page = NULL;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun /**
573*4882a593Smuzhiyun  * ixgbevf_is_non_eop - process handling of non-EOP buffers
574*4882a593Smuzhiyun  * @rx_ring: Rx ring being processed
575*4882a593Smuzhiyun  * @rx_desc: Rx descriptor for current buffer
576*4882a593Smuzhiyun  *
577*4882a593Smuzhiyun  * This function updates next to clean.  If the buffer is an EOP buffer
578*4882a593Smuzhiyun  * this function exits returning false, otherwise it will place the
579*4882a593Smuzhiyun  * sk_buff in the next buffer to be chained and return true indicating
580*4882a593Smuzhiyun  * that this is in fact a non-EOP buffer.
581*4882a593Smuzhiyun  **/
ixgbevf_is_non_eop(struct ixgbevf_ring * rx_ring,union ixgbe_adv_rx_desc * rx_desc)582*4882a593Smuzhiyun static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
583*4882a593Smuzhiyun 			       union ixgbe_adv_rx_desc *rx_desc)
584*4882a593Smuzhiyun {
585*4882a593Smuzhiyun 	u32 ntc = rx_ring->next_to_clean + 1;
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 	/* fetch, update, and store next to clean */
588*4882a593Smuzhiyun 	ntc = (ntc < rx_ring->count) ? ntc : 0;
589*4882a593Smuzhiyun 	rx_ring->next_to_clean = ntc;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
594*4882a593Smuzhiyun 		return false;
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 	return true;
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun 
ixgbevf_rx_offset(struct ixgbevf_ring * rx_ring)599*4882a593Smuzhiyun static inline unsigned int ixgbevf_rx_offset(struct ixgbevf_ring *rx_ring)
600*4882a593Smuzhiyun {
601*4882a593Smuzhiyun 	return ring_uses_build_skb(rx_ring) ? IXGBEVF_SKB_PAD : 0;
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun 
ixgbevf_alloc_mapped_page(struct ixgbevf_ring * rx_ring,struct ixgbevf_rx_buffer * bi)604*4882a593Smuzhiyun static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
605*4882a593Smuzhiyun 				      struct ixgbevf_rx_buffer *bi)
606*4882a593Smuzhiyun {
607*4882a593Smuzhiyun 	struct page *page = bi->page;
608*4882a593Smuzhiyun 	dma_addr_t dma;
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun 	/* since we are recycling buffers we should seldom need to alloc */
611*4882a593Smuzhiyun 	if (likely(page))
612*4882a593Smuzhiyun 		return true;
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	/* alloc new page for storage */
615*4882a593Smuzhiyun 	page = dev_alloc_pages(ixgbevf_rx_pg_order(rx_ring));
616*4882a593Smuzhiyun 	if (unlikely(!page)) {
617*4882a593Smuzhiyun 		rx_ring->rx_stats.alloc_rx_page_failed++;
618*4882a593Smuzhiyun 		return false;
619*4882a593Smuzhiyun 	}
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun 	/* map page for use */
622*4882a593Smuzhiyun 	dma = dma_map_page_attrs(rx_ring->dev, page, 0,
623*4882a593Smuzhiyun 				 ixgbevf_rx_pg_size(rx_ring),
624*4882a593Smuzhiyun 				 DMA_FROM_DEVICE, IXGBEVF_RX_DMA_ATTR);
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	/* if mapping failed free memory back to system since
627*4882a593Smuzhiyun 	 * there isn't much point in holding memory we can't use
628*4882a593Smuzhiyun 	 */
629*4882a593Smuzhiyun 	if (dma_mapping_error(rx_ring->dev, dma)) {
630*4882a593Smuzhiyun 		__free_pages(page, ixgbevf_rx_pg_order(rx_ring));
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 		rx_ring->rx_stats.alloc_rx_page_failed++;
633*4882a593Smuzhiyun 		return false;
634*4882a593Smuzhiyun 	}
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun 	bi->dma = dma;
637*4882a593Smuzhiyun 	bi->page = page;
638*4882a593Smuzhiyun 	bi->page_offset = ixgbevf_rx_offset(rx_ring);
639*4882a593Smuzhiyun 	bi->pagecnt_bias = 1;
640*4882a593Smuzhiyun 	rx_ring->rx_stats.alloc_rx_page++;
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 	return true;
643*4882a593Smuzhiyun }
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun /**
646*4882a593Smuzhiyun  * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
647*4882a593Smuzhiyun  * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
648*4882a593Smuzhiyun  * @cleaned_count: number of buffers to replace
649*4882a593Smuzhiyun  **/
ixgbevf_alloc_rx_buffers(struct ixgbevf_ring * rx_ring,u16 cleaned_count)650*4882a593Smuzhiyun static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
651*4882a593Smuzhiyun 				     u16 cleaned_count)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun 	union ixgbe_adv_rx_desc *rx_desc;
654*4882a593Smuzhiyun 	struct ixgbevf_rx_buffer *bi;
655*4882a593Smuzhiyun 	unsigned int i = rx_ring->next_to_use;
656*4882a593Smuzhiyun 
657*4882a593Smuzhiyun 	/* nothing to do or no valid netdev defined */
658*4882a593Smuzhiyun 	if (!cleaned_count || !rx_ring->netdev)
659*4882a593Smuzhiyun 		return;
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
662*4882a593Smuzhiyun 	bi = &rx_ring->rx_buffer_info[i];
663*4882a593Smuzhiyun 	i -= rx_ring->count;
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 	do {
666*4882a593Smuzhiyun 		if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
667*4882a593Smuzhiyun 			break;
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun 		/* sync the buffer for use by the device */
670*4882a593Smuzhiyun 		dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
671*4882a593Smuzhiyun 						 bi->page_offset,
672*4882a593Smuzhiyun 						 ixgbevf_rx_bufsz(rx_ring),
673*4882a593Smuzhiyun 						 DMA_FROM_DEVICE);
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 		/* Refresh the desc even if pkt_addr didn't change
676*4882a593Smuzhiyun 		 * because each write-back erases this info.
677*4882a593Smuzhiyun 		 */
678*4882a593Smuzhiyun 		rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun 		rx_desc++;
681*4882a593Smuzhiyun 		bi++;
682*4882a593Smuzhiyun 		i++;
683*4882a593Smuzhiyun 		if (unlikely(!i)) {
684*4882a593Smuzhiyun 			rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
685*4882a593Smuzhiyun 			bi = rx_ring->rx_buffer_info;
686*4882a593Smuzhiyun 			i -= rx_ring->count;
687*4882a593Smuzhiyun 		}
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 		/* clear the length for the next_to_use descriptor */
690*4882a593Smuzhiyun 		rx_desc->wb.upper.length = 0;
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun 		cleaned_count--;
693*4882a593Smuzhiyun 	} while (cleaned_count);
694*4882a593Smuzhiyun 
695*4882a593Smuzhiyun 	i += rx_ring->count;
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	if (rx_ring->next_to_use != i) {
698*4882a593Smuzhiyun 		/* record the next descriptor to use */
699*4882a593Smuzhiyun 		rx_ring->next_to_use = i;
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun 		/* update next to alloc since we have filled the ring */
702*4882a593Smuzhiyun 		rx_ring->next_to_alloc = i;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 		/* Force memory writes to complete before letting h/w
705*4882a593Smuzhiyun 		 * know there are new descriptors to fetch.  (Only
706*4882a593Smuzhiyun 		 * applicable for weak-ordered memory model archs,
707*4882a593Smuzhiyun 		 * such as IA-64).
708*4882a593Smuzhiyun 		 */
709*4882a593Smuzhiyun 		wmb();
710*4882a593Smuzhiyun 		ixgbevf_write_tail(rx_ring, i);
711*4882a593Smuzhiyun 	}
712*4882a593Smuzhiyun }
713*4882a593Smuzhiyun 
714*4882a593Smuzhiyun /**
715*4882a593Smuzhiyun  * ixgbevf_cleanup_headers - Correct corrupted or empty headers
716*4882a593Smuzhiyun  * @rx_ring: rx descriptor ring packet is being transacted on
717*4882a593Smuzhiyun  * @rx_desc: pointer to the EOP Rx descriptor
718*4882a593Smuzhiyun  * @skb: pointer to current skb being fixed
719*4882a593Smuzhiyun  *
720*4882a593Smuzhiyun  * Check for corrupted packet headers caused by senders on the local L2
721*4882a593Smuzhiyun  * embedded NIC switch not setting up their Tx Descriptors right.  These
722*4882a593Smuzhiyun  * should be very rare.
723*4882a593Smuzhiyun  *
724*4882a593Smuzhiyun  * Also address the case where we are pulling data in on pages only
725*4882a593Smuzhiyun  * and as such no data is present in the skb header.
726*4882a593Smuzhiyun  *
727*4882a593Smuzhiyun  * In addition if skb is not at least 60 bytes we need to pad it so that
728*4882a593Smuzhiyun  * it is large enough to qualify as a valid Ethernet frame.
729*4882a593Smuzhiyun  *
730*4882a593Smuzhiyun  * Returns true if an error was encountered and skb was freed.
731*4882a593Smuzhiyun  **/
ixgbevf_cleanup_headers(struct ixgbevf_ring * rx_ring,union ixgbe_adv_rx_desc * rx_desc,struct sk_buff * skb)732*4882a593Smuzhiyun static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
733*4882a593Smuzhiyun 				    union ixgbe_adv_rx_desc *rx_desc,
734*4882a593Smuzhiyun 				    struct sk_buff *skb)
735*4882a593Smuzhiyun {
736*4882a593Smuzhiyun 	/* XDP packets use error pointer so abort at this point */
737*4882a593Smuzhiyun 	if (IS_ERR(skb))
738*4882a593Smuzhiyun 		return true;
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 	/* verify that the packet does not have any known errors */
741*4882a593Smuzhiyun 	if (unlikely(ixgbevf_test_staterr(rx_desc,
742*4882a593Smuzhiyun 					  IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
743*4882a593Smuzhiyun 		struct net_device *netdev = rx_ring->netdev;
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun 		if (!(netdev->features & NETIF_F_RXALL)) {
746*4882a593Smuzhiyun 			dev_kfree_skb_any(skb);
747*4882a593Smuzhiyun 			return true;
748*4882a593Smuzhiyun 		}
749*4882a593Smuzhiyun 	}
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	/* if eth_skb_pad returns an error the skb was freed */
752*4882a593Smuzhiyun 	if (eth_skb_pad(skb))
753*4882a593Smuzhiyun 		return true;
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun 	return false;
756*4882a593Smuzhiyun }
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun /**
759*4882a593Smuzhiyun  * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
760*4882a593Smuzhiyun  * @rx_ring: rx descriptor ring to store buffers on
761*4882a593Smuzhiyun  * @old_buff: donor buffer to have page reused
762*4882a593Smuzhiyun  *
763*4882a593Smuzhiyun  * Synchronizes page for reuse by the adapter
764*4882a593Smuzhiyun  **/
ixgbevf_reuse_rx_page(struct ixgbevf_ring * rx_ring,struct ixgbevf_rx_buffer * old_buff)765*4882a593Smuzhiyun static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
766*4882a593Smuzhiyun 				  struct ixgbevf_rx_buffer *old_buff)
767*4882a593Smuzhiyun {
768*4882a593Smuzhiyun 	struct ixgbevf_rx_buffer *new_buff;
769*4882a593Smuzhiyun 	u16 nta = rx_ring->next_to_alloc;
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun 	new_buff = &rx_ring->rx_buffer_info[nta];
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun 	/* update, and store next to alloc */
774*4882a593Smuzhiyun 	nta++;
775*4882a593Smuzhiyun 	rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 	/* transfer page from old buffer to new buffer */
778*4882a593Smuzhiyun 	new_buff->page = old_buff->page;
779*4882a593Smuzhiyun 	new_buff->dma = old_buff->dma;
780*4882a593Smuzhiyun 	new_buff->page_offset = old_buff->page_offset;
781*4882a593Smuzhiyun 	new_buff->pagecnt_bias = old_buff->pagecnt_bias;
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun 
ixgbevf_page_is_reserved(struct page * page)784*4882a593Smuzhiyun static inline bool ixgbevf_page_is_reserved(struct page *page)
785*4882a593Smuzhiyun {
786*4882a593Smuzhiyun 	return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun 
ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer * rx_buffer)789*4882a593Smuzhiyun static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer)
790*4882a593Smuzhiyun {
791*4882a593Smuzhiyun 	unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
792*4882a593Smuzhiyun 	struct page *page = rx_buffer->page;
793*4882a593Smuzhiyun 
794*4882a593Smuzhiyun 	/* avoid re-using remote pages */
795*4882a593Smuzhiyun 	if (unlikely(ixgbevf_page_is_reserved(page)))
796*4882a593Smuzhiyun 		return false;
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun #if (PAGE_SIZE < 8192)
799*4882a593Smuzhiyun 	/* if we are only owner of page we can reuse it */
800*4882a593Smuzhiyun 	if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
801*4882a593Smuzhiyun 		return false;
802*4882a593Smuzhiyun #else
803*4882a593Smuzhiyun #define IXGBEVF_LAST_OFFSET \
804*4882a593Smuzhiyun 	(SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBEVF_RXBUFFER_2048)
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun 	if (rx_buffer->page_offset > IXGBEVF_LAST_OFFSET)
807*4882a593Smuzhiyun 		return false;
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun #endif
810*4882a593Smuzhiyun 
811*4882a593Smuzhiyun 	/* If we have drained the page fragment pool we need to update
812*4882a593Smuzhiyun 	 * the pagecnt_bias and page count so that we fully restock the
813*4882a593Smuzhiyun 	 * number of references the driver holds.
814*4882a593Smuzhiyun 	 */
815*4882a593Smuzhiyun 	if (unlikely(!pagecnt_bias)) {
816*4882a593Smuzhiyun 		page_ref_add(page, USHRT_MAX);
817*4882a593Smuzhiyun 		rx_buffer->pagecnt_bias = USHRT_MAX;
818*4882a593Smuzhiyun 	}
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun 	return true;
821*4882a593Smuzhiyun }
822*4882a593Smuzhiyun 
823*4882a593Smuzhiyun /**
824*4882a593Smuzhiyun  * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
825*4882a593Smuzhiyun  * @rx_ring: rx descriptor ring to transact packets on
826*4882a593Smuzhiyun  * @rx_buffer: buffer containing page to add
827*4882a593Smuzhiyun  * @skb: sk_buff to place the data into
828*4882a593Smuzhiyun  * @size: size of buffer to be added
829*4882a593Smuzhiyun  *
830*4882a593Smuzhiyun  * This function will add the data contained in rx_buffer->page to the skb.
831*4882a593Smuzhiyun  **/
ixgbevf_add_rx_frag(struct ixgbevf_ring * rx_ring,struct ixgbevf_rx_buffer * rx_buffer,struct sk_buff * skb,unsigned int size)832*4882a593Smuzhiyun static void ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
833*4882a593Smuzhiyun 				struct ixgbevf_rx_buffer *rx_buffer,
834*4882a593Smuzhiyun 				struct sk_buff *skb,
835*4882a593Smuzhiyun 				unsigned int size)
836*4882a593Smuzhiyun {
837*4882a593Smuzhiyun #if (PAGE_SIZE < 8192)
838*4882a593Smuzhiyun 	unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
839*4882a593Smuzhiyun #else
840*4882a593Smuzhiyun 	unsigned int truesize = ring_uses_build_skb(rx_ring) ?
841*4882a593Smuzhiyun 				SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) :
842*4882a593Smuzhiyun 				SKB_DATA_ALIGN(size);
843*4882a593Smuzhiyun #endif
844*4882a593Smuzhiyun 	skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
845*4882a593Smuzhiyun 			rx_buffer->page_offset, size, truesize);
846*4882a593Smuzhiyun #if (PAGE_SIZE < 8192)
847*4882a593Smuzhiyun 	rx_buffer->page_offset ^= truesize;
848*4882a593Smuzhiyun #else
849*4882a593Smuzhiyun 	rx_buffer->page_offset += truesize;
850*4882a593Smuzhiyun #endif
851*4882a593Smuzhiyun }
852*4882a593Smuzhiyun 
853*4882a593Smuzhiyun static
ixgbevf_construct_skb(struct ixgbevf_ring * rx_ring,struct ixgbevf_rx_buffer * rx_buffer,struct xdp_buff * xdp,union ixgbe_adv_rx_desc * rx_desc)854*4882a593Smuzhiyun struct sk_buff *ixgbevf_construct_skb(struct ixgbevf_ring *rx_ring,
855*4882a593Smuzhiyun 				      struct ixgbevf_rx_buffer *rx_buffer,
856*4882a593Smuzhiyun 				      struct xdp_buff *xdp,
857*4882a593Smuzhiyun 				      union ixgbe_adv_rx_desc *rx_desc)
858*4882a593Smuzhiyun {
859*4882a593Smuzhiyun 	unsigned int size = xdp->data_end - xdp->data;
860*4882a593Smuzhiyun #if (PAGE_SIZE < 8192)
861*4882a593Smuzhiyun 	unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
862*4882a593Smuzhiyun #else
863*4882a593Smuzhiyun 	unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
864*4882a593Smuzhiyun 					       xdp->data_hard_start);
865*4882a593Smuzhiyun #endif
866*4882a593Smuzhiyun 	unsigned int headlen;
867*4882a593Smuzhiyun 	struct sk_buff *skb;
868*4882a593Smuzhiyun 
869*4882a593Smuzhiyun 	/* prefetch first cache line of first page */
870*4882a593Smuzhiyun 	net_prefetch(xdp->data);
871*4882a593Smuzhiyun 
872*4882a593Smuzhiyun 	/* Note, we get here by enabling legacy-rx via:
873*4882a593Smuzhiyun 	 *
874*4882a593Smuzhiyun 	 *    ethtool --set-priv-flags <dev> legacy-rx on
875*4882a593Smuzhiyun 	 *
876*4882a593Smuzhiyun 	 * In this mode, we currently get 0 extra XDP headroom as
877*4882a593Smuzhiyun 	 * opposed to having legacy-rx off, where we process XDP
878*4882a593Smuzhiyun 	 * packets going to stack via ixgbevf_build_skb().
879*4882a593Smuzhiyun 	 *
880*4882a593Smuzhiyun 	 * For ixgbevf_construct_skb() mode it means that the
881*4882a593Smuzhiyun 	 * xdp->data_meta will always point to xdp->data, since
882*4882a593Smuzhiyun 	 * the helper cannot expand the head. Should this ever
883*4882a593Smuzhiyun 	 * changed in future for legacy-rx mode on, then lets also
884*4882a593Smuzhiyun 	 * add xdp->data_meta handling here.
885*4882a593Smuzhiyun 	 */
886*4882a593Smuzhiyun 
887*4882a593Smuzhiyun 	/* allocate a skb to store the frags */
888*4882a593Smuzhiyun 	skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBEVF_RX_HDR_SIZE);
889*4882a593Smuzhiyun 	if (unlikely(!skb))
890*4882a593Smuzhiyun 		return NULL;
891*4882a593Smuzhiyun 
892*4882a593Smuzhiyun 	/* Determine available headroom for copy */
893*4882a593Smuzhiyun 	headlen = size;
894*4882a593Smuzhiyun 	if (headlen > IXGBEVF_RX_HDR_SIZE)
895*4882a593Smuzhiyun 		headlen = eth_get_headlen(skb->dev, xdp->data,
896*4882a593Smuzhiyun 					  IXGBEVF_RX_HDR_SIZE);
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun 	/* align pull length to size of long to optimize memcpy performance */
899*4882a593Smuzhiyun 	memcpy(__skb_put(skb, headlen), xdp->data,
900*4882a593Smuzhiyun 	       ALIGN(headlen, sizeof(long)));
901*4882a593Smuzhiyun 
902*4882a593Smuzhiyun 	/* update all of the pointers */
903*4882a593Smuzhiyun 	size -= headlen;
904*4882a593Smuzhiyun 	if (size) {
905*4882a593Smuzhiyun 		skb_add_rx_frag(skb, 0, rx_buffer->page,
906*4882a593Smuzhiyun 				(xdp->data + headlen) -
907*4882a593Smuzhiyun 					page_address(rx_buffer->page),
908*4882a593Smuzhiyun 				size, truesize);
909*4882a593Smuzhiyun #if (PAGE_SIZE < 8192)
910*4882a593Smuzhiyun 		rx_buffer->page_offset ^= truesize;
911*4882a593Smuzhiyun #else
912*4882a593Smuzhiyun 		rx_buffer->page_offset += truesize;
913*4882a593Smuzhiyun #endif
914*4882a593Smuzhiyun 	} else {
915*4882a593Smuzhiyun 		rx_buffer->pagecnt_bias++;
916*4882a593Smuzhiyun 	}
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 	return skb;
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun 
ixgbevf_irq_enable_queues(struct ixgbevf_adapter * adapter,u32 qmask)921*4882a593Smuzhiyun static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
922*4882a593Smuzhiyun 					     u32 qmask)
923*4882a593Smuzhiyun {
924*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
925*4882a593Smuzhiyun 
926*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
927*4882a593Smuzhiyun }
928*4882a593Smuzhiyun 
ixgbevf_build_skb(struct ixgbevf_ring * rx_ring,struct ixgbevf_rx_buffer * rx_buffer,struct xdp_buff * xdp,union ixgbe_adv_rx_desc * rx_desc)929*4882a593Smuzhiyun static struct sk_buff *ixgbevf_build_skb(struct ixgbevf_ring *rx_ring,
930*4882a593Smuzhiyun 					 struct ixgbevf_rx_buffer *rx_buffer,
931*4882a593Smuzhiyun 					 struct xdp_buff *xdp,
932*4882a593Smuzhiyun 					 union ixgbe_adv_rx_desc *rx_desc)
933*4882a593Smuzhiyun {
934*4882a593Smuzhiyun 	unsigned int metasize = xdp->data - xdp->data_meta;
935*4882a593Smuzhiyun #if (PAGE_SIZE < 8192)
936*4882a593Smuzhiyun 	unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
937*4882a593Smuzhiyun #else
938*4882a593Smuzhiyun 	unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
939*4882a593Smuzhiyun 				SKB_DATA_ALIGN(xdp->data_end -
940*4882a593Smuzhiyun 					       xdp->data_hard_start);
941*4882a593Smuzhiyun #endif
942*4882a593Smuzhiyun 	struct sk_buff *skb;
943*4882a593Smuzhiyun 
944*4882a593Smuzhiyun 	/* Prefetch first cache line of first page. If xdp->data_meta
945*4882a593Smuzhiyun 	 * is unused, this points to xdp->data, otherwise, we likely
946*4882a593Smuzhiyun 	 * have a consumer accessing first few bytes of meta data,
947*4882a593Smuzhiyun 	 * and then actual data.
948*4882a593Smuzhiyun 	 */
949*4882a593Smuzhiyun 	net_prefetch(xdp->data_meta);
950*4882a593Smuzhiyun 
951*4882a593Smuzhiyun 	/* build an skb around the page buffer */
952*4882a593Smuzhiyun 	skb = build_skb(xdp->data_hard_start, truesize);
953*4882a593Smuzhiyun 	if (unlikely(!skb))
954*4882a593Smuzhiyun 		return NULL;
955*4882a593Smuzhiyun 
956*4882a593Smuzhiyun 	/* update pointers within the skb to store the data */
957*4882a593Smuzhiyun 	skb_reserve(skb, xdp->data - xdp->data_hard_start);
958*4882a593Smuzhiyun 	__skb_put(skb, xdp->data_end - xdp->data);
959*4882a593Smuzhiyun 	if (metasize)
960*4882a593Smuzhiyun 		skb_metadata_set(skb, metasize);
961*4882a593Smuzhiyun 
962*4882a593Smuzhiyun 	/* update buffer offset */
963*4882a593Smuzhiyun #if (PAGE_SIZE < 8192)
964*4882a593Smuzhiyun 	rx_buffer->page_offset ^= truesize;
965*4882a593Smuzhiyun #else
966*4882a593Smuzhiyun 	rx_buffer->page_offset += truesize;
967*4882a593Smuzhiyun #endif
968*4882a593Smuzhiyun 
969*4882a593Smuzhiyun 	return skb;
970*4882a593Smuzhiyun }
971*4882a593Smuzhiyun 
972*4882a593Smuzhiyun #define IXGBEVF_XDP_PASS 0
973*4882a593Smuzhiyun #define IXGBEVF_XDP_CONSUMED 1
974*4882a593Smuzhiyun #define IXGBEVF_XDP_TX 2
975*4882a593Smuzhiyun 
ixgbevf_xmit_xdp_ring(struct ixgbevf_ring * ring,struct xdp_buff * xdp)976*4882a593Smuzhiyun static int ixgbevf_xmit_xdp_ring(struct ixgbevf_ring *ring,
977*4882a593Smuzhiyun 				 struct xdp_buff *xdp)
978*4882a593Smuzhiyun {
979*4882a593Smuzhiyun 	struct ixgbevf_tx_buffer *tx_buffer;
980*4882a593Smuzhiyun 	union ixgbe_adv_tx_desc *tx_desc;
981*4882a593Smuzhiyun 	u32 len, cmd_type;
982*4882a593Smuzhiyun 	dma_addr_t dma;
983*4882a593Smuzhiyun 	u16 i;
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun 	len = xdp->data_end - xdp->data;
986*4882a593Smuzhiyun 
987*4882a593Smuzhiyun 	if (unlikely(!ixgbevf_desc_unused(ring)))
988*4882a593Smuzhiyun 		return IXGBEVF_XDP_CONSUMED;
989*4882a593Smuzhiyun 
990*4882a593Smuzhiyun 	dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
991*4882a593Smuzhiyun 	if (dma_mapping_error(ring->dev, dma))
992*4882a593Smuzhiyun 		return IXGBEVF_XDP_CONSUMED;
993*4882a593Smuzhiyun 
994*4882a593Smuzhiyun 	/* record the location of the first descriptor for this packet */
995*4882a593Smuzhiyun 	i = ring->next_to_use;
996*4882a593Smuzhiyun 	tx_buffer = &ring->tx_buffer_info[i];
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun 	dma_unmap_len_set(tx_buffer, len, len);
999*4882a593Smuzhiyun 	dma_unmap_addr_set(tx_buffer, dma, dma);
1000*4882a593Smuzhiyun 	tx_buffer->data = xdp->data;
1001*4882a593Smuzhiyun 	tx_buffer->bytecount = len;
1002*4882a593Smuzhiyun 	tx_buffer->gso_segs = 1;
1003*4882a593Smuzhiyun 	tx_buffer->protocol = 0;
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 	/* Populate minimal context descriptor that will provide for the
1006*4882a593Smuzhiyun 	 * fact that we are expected to process Ethernet frames.
1007*4882a593Smuzhiyun 	 */
1008*4882a593Smuzhiyun 	if (!test_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state)) {
1009*4882a593Smuzhiyun 		struct ixgbe_adv_tx_context_desc *context_desc;
1010*4882a593Smuzhiyun 
1011*4882a593Smuzhiyun 		set_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
1012*4882a593Smuzhiyun 
1013*4882a593Smuzhiyun 		context_desc = IXGBEVF_TX_CTXTDESC(ring, 0);
1014*4882a593Smuzhiyun 		context_desc->vlan_macip_lens	=
1015*4882a593Smuzhiyun 			cpu_to_le32(ETH_HLEN << IXGBE_ADVTXD_MACLEN_SHIFT);
1016*4882a593Smuzhiyun 		context_desc->fceof_saidx	= 0;
1017*4882a593Smuzhiyun 		context_desc->type_tucmd_mlhl	=
1018*4882a593Smuzhiyun 			cpu_to_le32(IXGBE_TXD_CMD_DEXT |
1019*4882a593Smuzhiyun 				    IXGBE_ADVTXD_DTYP_CTXT);
1020*4882a593Smuzhiyun 		context_desc->mss_l4len_idx	= 0;
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun 		i = 1;
1023*4882a593Smuzhiyun 	}
1024*4882a593Smuzhiyun 
1025*4882a593Smuzhiyun 	/* put descriptor type bits */
1026*4882a593Smuzhiyun 	cmd_type = IXGBE_ADVTXD_DTYP_DATA |
1027*4882a593Smuzhiyun 		   IXGBE_ADVTXD_DCMD_DEXT |
1028*4882a593Smuzhiyun 		   IXGBE_ADVTXD_DCMD_IFCS;
1029*4882a593Smuzhiyun 	cmd_type |= len | IXGBE_TXD_CMD;
1030*4882a593Smuzhiyun 
1031*4882a593Smuzhiyun 	tx_desc = IXGBEVF_TX_DESC(ring, i);
1032*4882a593Smuzhiyun 	tx_desc->read.buffer_addr = cpu_to_le64(dma);
1033*4882a593Smuzhiyun 
1034*4882a593Smuzhiyun 	tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
1035*4882a593Smuzhiyun 	tx_desc->read.olinfo_status =
1036*4882a593Smuzhiyun 			cpu_to_le32((len << IXGBE_ADVTXD_PAYLEN_SHIFT) |
1037*4882a593Smuzhiyun 				    IXGBE_ADVTXD_CC);
1038*4882a593Smuzhiyun 
1039*4882a593Smuzhiyun 	/* Avoid any potential race with cleanup */
1040*4882a593Smuzhiyun 	smp_wmb();
1041*4882a593Smuzhiyun 
1042*4882a593Smuzhiyun 	/* set next_to_watch value indicating a packet is present */
1043*4882a593Smuzhiyun 	i++;
1044*4882a593Smuzhiyun 	if (i == ring->count)
1045*4882a593Smuzhiyun 		i = 0;
1046*4882a593Smuzhiyun 
1047*4882a593Smuzhiyun 	tx_buffer->next_to_watch = tx_desc;
1048*4882a593Smuzhiyun 	ring->next_to_use = i;
1049*4882a593Smuzhiyun 
1050*4882a593Smuzhiyun 	return IXGBEVF_XDP_TX;
1051*4882a593Smuzhiyun }
1052*4882a593Smuzhiyun 
ixgbevf_run_xdp(struct ixgbevf_adapter * adapter,struct ixgbevf_ring * rx_ring,struct xdp_buff * xdp)1053*4882a593Smuzhiyun static struct sk_buff *ixgbevf_run_xdp(struct ixgbevf_adapter *adapter,
1054*4882a593Smuzhiyun 				       struct ixgbevf_ring  *rx_ring,
1055*4882a593Smuzhiyun 				       struct xdp_buff *xdp)
1056*4882a593Smuzhiyun {
1057*4882a593Smuzhiyun 	int result = IXGBEVF_XDP_PASS;
1058*4882a593Smuzhiyun 	struct ixgbevf_ring *xdp_ring;
1059*4882a593Smuzhiyun 	struct bpf_prog *xdp_prog;
1060*4882a593Smuzhiyun 	u32 act;
1061*4882a593Smuzhiyun 
1062*4882a593Smuzhiyun 	rcu_read_lock();
1063*4882a593Smuzhiyun 	xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun 	if (!xdp_prog)
1066*4882a593Smuzhiyun 		goto xdp_out;
1067*4882a593Smuzhiyun 
1068*4882a593Smuzhiyun 	act = bpf_prog_run_xdp(xdp_prog, xdp);
1069*4882a593Smuzhiyun 	switch (act) {
1070*4882a593Smuzhiyun 	case XDP_PASS:
1071*4882a593Smuzhiyun 		break;
1072*4882a593Smuzhiyun 	case XDP_TX:
1073*4882a593Smuzhiyun 		xdp_ring = adapter->xdp_ring[rx_ring->queue_index];
1074*4882a593Smuzhiyun 		result = ixgbevf_xmit_xdp_ring(xdp_ring, xdp);
1075*4882a593Smuzhiyun 		if (result == IXGBEVF_XDP_CONSUMED)
1076*4882a593Smuzhiyun 			goto out_failure;
1077*4882a593Smuzhiyun 		break;
1078*4882a593Smuzhiyun 	default:
1079*4882a593Smuzhiyun 		bpf_warn_invalid_xdp_action(act);
1080*4882a593Smuzhiyun 		fallthrough;
1081*4882a593Smuzhiyun 	case XDP_ABORTED:
1082*4882a593Smuzhiyun out_failure:
1083*4882a593Smuzhiyun 		trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
1084*4882a593Smuzhiyun 		fallthrough; /* handle aborts by dropping packet */
1085*4882a593Smuzhiyun 	case XDP_DROP:
1086*4882a593Smuzhiyun 		result = IXGBEVF_XDP_CONSUMED;
1087*4882a593Smuzhiyun 		break;
1088*4882a593Smuzhiyun 	}
1089*4882a593Smuzhiyun xdp_out:
1090*4882a593Smuzhiyun 	rcu_read_unlock();
1091*4882a593Smuzhiyun 	return ERR_PTR(-result);
1092*4882a593Smuzhiyun }
1093*4882a593Smuzhiyun 
ixgbevf_rx_frame_truesize(struct ixgbevf_ring * rx_ring,unsigned int size)1094*4882a593Smuzhiyun static unsigned int ixgbevf_rx_frame_truesize(struct ixgbevf_ring *rx_ring,
1095*4882a593Smuzhiyun 					      unsigned int size)
1096*4882a593Smuzhiyun {
1097*4882a593Smuzhiyun 	unsigned int truesize;
1098*4882a593Smuzhiyun 
1099*4882a593Smuzhiyun #if (PAGE_SIZE < 8192)
1100*4882a593Smuzhiyun 	truesize = ixgbevf_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
1101*4882a593Smuzhiyun #else
1102*4882a593Smuzhiyun 	truesize = ring_uses_build_skb(rx_ring) ?
1103*4882a593Smuzhiyun 		SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) +
1104*4882a593Smuzhiyun 		SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
1105*4882a593Smuzhiyun 		SKB_DATA_ALIGN(size);
1106*4882a593Smuzhiyun #endif
1107*4882a593Smuzhiyun 	return truesize;
1108*4882a593Smuzhiyun }
1109*4882a593Smuzhiyun 
ixgbevf_rx_buffer_flip(struct ixgbevf_ring * rx_ring,struct ixgbevf_rx_buffer * rx_buffer,unsigned int size)1110*4882a593Smuzhiyun static void ixgbevf_rx_buffer_flip(struct ixgbevf_ring *rx_ring,
1111*4882a593Smuzhiyun 				   struct ixgbevf_rx_buffer *rx_buffer,
1112*4882a593Smuzhiyun 				   unsigned int size)
1113*4882a593Smuzhiyun {
1114*4882a593Smuzhiyun 	unsigned int truesize = ixgbevf_rx_frame_truesize(rx_ring, size);
1115*4882a593Smuzhiyun 
1116*4882a593Smuzhiyun #if (PAGE_SIZE < 8192)
1117*4882a593Smuzhiyun 	rx_buffer->page_offset ^= truesize;
1118*4882a593Smuzhiyun #else
1119*4882a593Smuzhiyun 	rx_buffer->page_offset += truesize;
1120*4882a593Smuzhiyun #endif
1121*4882a593Smuzhiyun }
1122*4882a593Smuzhiyun 
ixgbevf_clean_rx_irq(struct ixgbevf_q_vector * q_vector,struct ixgbevf_ring * rx_ring,int budget)1123*4882a593Smuzhiyun static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
1124*4882a593Smuzhiyun 				struct ixgbevf_ring *rx_ring,
1125*4882a593Smuzhiyun 				int budget)
1126*4882a593Smuzhiyun {
1127*4882a593Smuzhiyun 	unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1128*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = q_vector->adapter;
1129*4882a593Smuzhiyun 	u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
1130*4882a593Smuzhiyun 	struct sk_buff *skb = rx_ring->skb;
1131*4882a593Smuzhiyun 	bool xdp_xmit = false;
1132*4882a593Smuzhiyun 	struct xdp_buff xdp;
1133*4882a593Smuzhiyun 
1134*4882a593Smuzhiyun 	xdp.rxq = &rx_ring->xdp_rxq;
1135*4882a593Smuzhiyun 
1136*4882a593Smuzhiyun 	/* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1137*4882a593Smuzhiyun #if (PAGE_SIZE < 8192)
1138*4882a593Smuzhiyun 	xdp.frame_sz = ixgbevf_rx_frame_truesize(rx_ring, 0);
1139*4882a593Smuzhiyun #endif
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun 	while (likely(total_rx_packets < budget)) {
1142*4882a593Smuzhiyun 		struct ixgbevf_rx_buffer *rx_buffer;
1143*4882a593Smuzhiyun 		union ixgbe_adv_rx_desc *rx_desc;
1144*4882a593Smuzhiyun 		unsigned int size;
1145*4882a593Smuzhiyun 
1146*4882a593Smuzhiyun 		/* return some buffers to hardware, one at a time is too slow */
1147*4882a593Smuzhiyun 		if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
1148*4882a593Smuzhiyun 			ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
1149*4882a593Smuzhiyun 			cleaned_count = 0;
1150*4882a593Smuzhiyun 		}
1151*4882a593Smuzhiyun 
1152*4882a593Smuzhiyun 		rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
1153*4882a593Smuzhiyun 		size = le16_to_cpu(rx_desc->wb.upper.length);
1154*4882a593Smuzhiyun 		if (!size)
1155*4882a593Smuzhiyun 			break;
1156*4882a593Smuzhiyun 
1157*4882a593Smuzhiyun 		/* This memory barrier is needed to keep us from reading
1158*4882a593Smuzhiyun 		 * any other fields out of the rx_desc until we know the
1159*4882a593Smuzhiyun 		 * RXD_STAT_DD bit is set
1160*4882a593Smuzhiyun 		 */
1161*4882a593Smuzhiyun 		rmb();
1162*4882a593Smuzhiyun 
1163*4882a593Smuzhiyun 		rx_buffer = ixgbevf_get_rx_buffer(rx_ring, size);
1164*4882a593Smuzhiyun 
1165*4882a593Smuzhiyun 		/* retrieve a buffer from the ring */
1166*4882a593Smuzhiyun 		if (!skb) {
1167*4882a593Smuzhiyun 			xdp.data = page_address(rx_buffer->page) +
1168*4882a593Smuzhiyun 				   rx_buffer->page_offset;
1169*4882a593Smuzhiyun 			xdp.data_meta = xdp.data;
1170*4882a593Smuzhiyun 			xdp.data_hard_start = xdp.data -
1171*4882a593Smuzhiyun 					      ixgbevf_rx_offset(rx_ring);
1172*4882a593Smuzhiyun 			xdp.data_end = xdp.data + size;
1173*4882a593Smuzhiyun #if (PAGE_SIZE > 4096)
1174*4882a593Smuzhiyun 			/* At larger PAGE_SIZE, frame_sz depend on len size */
1175*4882a593Smuzhiyun 			xdp.frame_sz = ixgbevf_rx_frame_truesize(rx_ring, size);
1176*4882a593Smuzhiyun #endif
1177*4882a593Smuzhiyun 			skb = ixgbevf_run_xdp(adapter, rx_ring, &xdp);
1178*4882a593Smuzhiyun 		}
1179*4882a593Smuzhiyun 
1180*4882a593Smuzhiyun 		if (IS_ERR(skb)) {
1181*4882a593Smuzhiyun 			if (PTR_ERR(skb) == -IXGBEVF_XDP_TX) {
1182*4882a593Smuzhiyun 				xdp_xmit = true;
1183*4882a593Smuzhiyun 				ixgbevf_rx_buffer_flip(rx_ring, rx_buffer,
1184*4882a593Smuzhiyun 						       size);
1185*4882a593Smuzhiyun 			} else {
1186*4882a593Smuzhiyun 				rx_buffer->pagecnt_bias++;
1187*4882a593Smuzhiyun 			}
1188*4882a593Smuzhiyun 			total_rx_packets++;
1189*4882a593Smuzhiyun 			total_rx_bytes += size;
1190*4882a593Smuzhiyun 		} else if (skb) {
1191*4882a593Smuzhiyun 			ixgbevf_add_rx_frag(rx_ring, rx_buffer, skb, size);
1192*4882a593Smuzhiyun 		} else if (ring_uses_build_skb(rx_ring)) {
1193*4882a593Smuzhiyun 			skb = ixgbevf_build_skb(rx_ring, rx_buffer,
1194*4882a593Smuzhiyun 						&xdp, rx_desc);
1195*4882a593Smuzhiyun 		} else {
1196*4882a593Smuzhiyun 			skb = ixgbevf_construct_skb(rx_ring, rx_buffer,
1197*4882a593Smuzhiyun 						    &xdp, rx_desc);
1198*4882a593Smuzhiyun 		}
1199*4882a593Smuzhiyun 
1200*4882a593Smuzhiyun 		/* exit if we failed to retrieve a buffer */
1201*4882a593Smuzhiyun 		if (!skb) {
1202*4882a593Smuzhiyun 			rx_ring->rx_stats.alloc_rx_buff_failed++;
1203*4882a593Smuzhiyun 			rx_buffer->pagecnt_bias++;
1204*4882a593Smuzhiyun 			break;
1205*4882a593Smuzhiyun 		}
1206*4882a593Smuzhiyun 
1207*4882a593Smuzhiyun 		ixgbevf_put_rx_buffer(rx_ring, rx_buffer, skb);
1208*4882a593Smuzhiyun 		cleaned_count++;
1209*4882a593Smuzhiyun 
1210*4882a593Smuzhiyun 		/* fetch next buffer in frame if non-eop */
1211*4882a593Smuzhiyun 		if (ixgbevf_is_non_eop(rx_ring, rx_desc))
1212*4882a593Smuzhiyun 			continue;
1213*4882a593Smuzhiyun 
1214*4882a593Smuzhiyun 		/* verify the packet layout is correct */
1215*4882a593Smuzhiyun 		if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
1216*4882a593Smuzhiyun 			skb = NULL;
1217*4882a593Smuzhiyun 			continue;
1218*4882a593Smuzhiyun 		}
1219*4882a593Smuzhiyun 
1220*4882a593Smuzhiyun 		/* probably a little skewed due to removing CRC */
1221*4882a593Smuzhiyun 		total_rx_bytes += skb->len;
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun 		/* Workaround hardware that can't do proper VEPA multicast
1224*4882a593Smuzhiyun 		 * source pruning.
1225*4882a593Smuzhiyun 		 */
1226*4882a593Smuzhiyun 		if ((skb->pkt_type == PACKET_BROADCAST ||
1227*4882a593Smuzhiyun 		     skb->pkt_type == PACKET_MULTICAST) &&
1228*4882a593Smuzhiyun 		    ether_addr_equal(rx_ring->netdev->dev_addr,
1229*4882a593Smuzhiyun 				     eth_hdr(skb)->h_source)) {
1230*4882a593Smuzhiyun 			dev_kfree_skb_irq(skb);
1231*4882a593Smuzhiyun 			continue;
1232*4882a593Smuzhiyun 		}
1233*4882a593Smuzhiyun 
1234*4882a593Smuzhiyun 		/* populate checksum, VLAN, and protocol */
1235*4882a593Smuzhiyun 		ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
1236*4882a593Smuzhiyun 
1237*4882a593Smuzhiyun 		ixgbevf_rx_skb(q_vector, skb);
1238*4882a593Smuzhiyun 
1239*4882a593Smuzhiyun 		/* reset skb pointer */
1240*4882a593Smuzhiyun 		skb = NULL;
1241*4882a593Smuzhiyun 
1242*4882a593Smuzhiyun 		/* update budget accounting */
1243*4882a593Smuzhiyun 		total_rx_packets++;
1244*4882a593Smuzhiyun 	}
1245*4882a593Smuzhiyun 
1246*4882a593Smuzhiyun 	/* place incomplete frames back on ring for completion */
1247*4882a593Smuzhiyun 	rx_ring->skb = skb;
1248*4882a593Smuzhiyun 
1249*4882a593Smuzhiyun 	if (xdp_xmit) {
1250*4882a593Smuzhiyun 		struct ixgbevf_ring *xdp_ring =
1251*4882a593Smuzhiyun 			adapter->xdp_ring[rx_ring->queue_index];
1252*4882a593Smuzhiyun 
1253*4882a593Smuzhiyun 		/* Force memory writes to complete before letting h/w
1254*4882a593Smuzhiyun 		 * know there are new descriptors to fetch.
1255*4882a593Smuzhiyun 		 */
1256*4882a593Smuzhiyun 		wmb();
1257*4882a593Smuzhiyun 		ixgbevf_write_tail(xdp_ring, xdp_ring->next_to_use);
1258*4882a593Smuzhiyun 	}
1259*4882a593Smuzhiyun 
1260*4882a593Smuzhiyun 	u64_stats_update_begin(&rx_ring->syncp);
1261*4882a593Smuzhiyun 	rx_ring->stats.packets += total_rx_packets;
1262*4882a593Smuzhiyun 	rx_ring->stats.bytes += total_rx_bytes;
1263*4882a593Smuzhiyun 	u64_stats_update_end(&rx_ring->syncp);
1264*4882a593Smuzhiyun 	q_vector->rx.total_packets += total_rx_packets;
1265*4882a593Smuzhiyun 	q_vector->rx.total_bytes += total_rx_bytes;
1266*4882a593Smuzhiyun 
1267*4882a593Smuzhiyun 	return total_rx_packets;
1268*4882a593Smuzhiyun }
1269*4882a593Smuzhiyun 
1270*4882a593Smuzhiyun /**
1271*4882a593Smuzhiyun  * ixgbevf_poll - NAPI polling calback
1272*4882a593Smuzhiyun  * @napi: napi struct with our devices info in it
1273*4882a593Smuzhiyun  * @budget: amount of work driver is allowed to do this pass, in packets
1274*4882a593Smuzhiyun  *
1275*4882a593Smuzhiyun  * This function will clean more than one or more rings associated with a
1276*4882a593Smuzhiyun  * q_vector.
1277*4882a593Smuzhiyun  **/
ixgbevf_poll(struct napi_struct * napi,int budget)1278*4882a593Smuzhiyun static int ixgbevf_poll(struct napi_struct *napi, int budget)
1279*4882a593Smuzhiyun {
1280*4882a593Smuzhiyun 	struct ixgbevf_q_vector *q_vector =
1281*4882a593Smuzhiyun 		container_of(napi, struct ixgbevf_q_vector, napi);
1282*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = q_vector->adapter;
1283*4882a593Smuzhiyun 	struct ixgbevf_ring *ring;
1284*4882a593Smuzhiyun 	int per_ring_budget, work_done = 0;
1285*4882a593Smuzhiyun 	bool clean_complete = true;
1286*4882a593Smuzhiyun 
1287*4882a593Smuzhiyun 	ixgbevf_for_each_ring(ring, q_vector->tx) {
1288*4882a593Smuzhiyun 		if (!ixgbevf_clean_tx_irq(q_vector, ring, budget))
1289*4882a593Smuzhiyun 			clean_complete = false;
1290*4882a593Smuzhiyun 	}
1291*4882a593Smuzhiyun 
1292*4882a593Smuzhiyun 	if (budget <= 0)
1293*4882a593Smuzhiyun 		return budget;
1294*4882a593Smuzhiyun 
1295*4882a593Smuzhiyun 	/* attempt to distribute budget to each queue fairly, but don't allow
1296*4882a593Smuzhiyun 	 * the budget to go below 1 because we'll exit polling
1297*4882a593Smuzhiyun 	 */
1298*4882a593Smuzhiyun 	if (q_vector->rx.count > 1)
1299*4882a593Smuzhiyun 		per_ring_budget = max(budget/q_vector->rx.count, 1);
1300*4882a593Smuzhiyun 	else
1301*4882a593Smuzhiyun 		per_ring_budget = budget;
1302*4882a593Smuzhiyun 
1303*4882a593Smuzhiyun 	ixgbevf_for_each_ring(ring, q_vector->rx) {
1304*4882a593Smuzhiyun 		int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
1305*4882a593Smuzhiyun 						   per_ring_budget);
1306*4882a593Smuzhiyun 		work_done += cleaned;
1307*4882a593Smuzhiyun 		if (cleaned >= per_ring_budget)
1308*4882a593Smuzhiyun 			clean_complete = false;
1309*4882a593Smuzhiyun 	}
1310*4882a593Smuzhiyun 
1311*4882a593Smuzhiyun 	/* If all work not completed, return budget and keep polling */
1312*4882a593Smuzhiyun 	if (!clean_complete)
1313*4882a593Smuzhiyun 		return budget;
1314*4882a593Smuzhiyun 
1315*4882a593Smuzhiyun 	/* Exit the polling mode, but don't re-enable interrupts if stack might
1316*4882a593Smuzhiyun 	 * poll us due to busy-polling
1317*4882a593Smuzhiyun 	 */
1318*4882a593Smuzhiyun 	if (likely(napi_complete_done(napi, work_done))) {
1319*4882a593Smuzhiyun 		if (adapter->rx_itr_setting == 1)
1320*4882a593Smuzhiyun 			ixgbevf_set_itr(q_vector);
1321*4882a593Smuzhiyun 		if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1322*4882a593Smuzhiyun 		    !test_bit(__IXGBEVF_REMOVING, &adapter->state))
1323*4882a593Smuzhiyun 			ixgbevf_irq_enable_queues(adapter,
1324*4882a593Smuzhiyun 						  BIT(q_vector->v_idx));
1325*4882a593Smuzhiyun 	}
1326*4882a593Smuzhiyun 
1327*4882a593Smuzhiyun 	return min(work_done, budget - 1);
1328*4882a593Smuzhiyun }
1329*4882a593Smuzhiyun 
1330*4882a593Smuzhiyun /**
1331*4882a593Smuzhiyun  * ixgbevf_write_eitr - write VTEITR register in hardware specific way
1332*4882a593Smuzhiyun  * @q_vector: structure containing interrupt and ring information
1333*4882a593Smuzhiyun  **/
ixgbevf_write_eitr(struct ixgbevf_q_vector * q_vector)1334*4882a593Smuzhiyun void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
1335*4882a593Smuzhiyun {
1336*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = q_vector->adapter;
1337*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
1338*4882a593Smuzhiyun 	int v_idx = q_vector->v_idx;
1339*4882a593Smuzhiyun 	u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1340*4882a593Smuzhiyun 
1341*4882a593Smuzhiyun 	/* set the WDIS bit to not clear the timer bits and cause an
1342*4882a593Smuzhiyun 	 * immediate assertion of the interrupt
1343*4882a593Smuzhiyun 	 */
1344*4882a593Smuzhiyun 	itr_reg |= IXGBE_EITR_CNT_WDIS;
1345*4882a593Smuzhiyun 
1346*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
1347*4882a593Smuzhiyun }
1348*4882a593Smuzhiyun 
1349*4882a593Smuzhiyun /**
1350*4882a593Smuzhiyun  * ixgbevf_configure_msix - Configure MSI-X hardware
1351*4882a593Smuzhiyun  * @adapter: board private structure
1352*4882a593Smuzhiyun  *
1353*4882a593Smuzhiyun  * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
1354*4882a593Smuzhiyun  * interrupts.
1355*4882a593Smuzhiyun  **/
ixgbevf_configure_msix(struct ixgbevf_adapter * adapter)1356*4882a593Smuzhiyun static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1357*4882a593Smuzhiyun {
1358*4882a593Smuzhiyun 	struct ixgbevf_q_vector *q_vector;
1359*4882a593Smuzhiyun 	int q_vectors, v_idx;
1360*4882a593Smuzhiyun 
1361*4882a593Smuzhiyun 	q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1362*4882a593Smuzhiyun 	adapter->eims_enable_mask = 0;
1363*4882a593Smuzhiyun 
1364*4882a593Smuzhiyun 	/* Populate the IVAR table and set the ITR values to the
1365*4882a593Smuzhiyun 	 * corresponding register.
1366*4882a593Smuzhiyun 	 */
1367*4882a593Smuzhiyun 	for (v_idx = 0; v_idx < q_vectors; v_idx++) {
1368*4882a593Smuzhiyun 		struct ixgbevf_ring *ring;
1369*4882a593Smuzhiyun 
1370*4882a593Smuzhiyun 		q_vector = adapter->q_vector[v_idx];
1371*4882a593Smuzhiyun 
1372*4882a593Smuzhiyun 		ixgbevf_for_each_ring(ring, q_vector->rx)
1373*4882a593Smuzhiyun 			ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1374*4882a593Smuzhiyun 
1375*4882a593Smuzhiyun 		ixgbevf_for_each_ring(ring, q_vector->tx)
1376*4882a593Smuzhiyun 			ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
1377*4882a593Smuzhiyun 
1378*4882a593Smuzhiyun 		if (q_vector->tx.ring && !q_vector->rx.ring) {
1379*4882a593Smuzhiyun 			/* Tx only vector */
1380*4882a593Smuzhiyun 			if (adapter->tx_itr_setting == 1)
1381*4882a593Smuzhiyun 				q_vector->itr = IXGBE_12K_ITR;
1382*4882a593Smuzhiyun 			else
1383*4882a593Smuzhiyun 				q_vector->itr = adapter->tx_itr_setting;
1384*4882a593Smuzhiyun 		} else {
1385*4882a593Smuzhiyun 			/* Rx or Rx/Tx vector */
1386*4882a593Smuzhiyun 			if (adapter->rx_itr_setting == 1)
1387*4882a593Smuzhiyun 				q_vector->itr = IXGBE_20K_ITR;
1388*4882a593Smuzhiyun 			else
1389*4882a593Smuzhiyun 				q_vector->itr = adapter->rx_itr_setting;
1390*4882a593Smuzhiyun 		}
1391*4882a593Smuzhiyun 
1392*4882a593Smuzhiyun 		/* add q_vector eims value to global eims_enable_mask */
1393*4882a593Smuzhiyun 		adapter->eims_enable_mask |= BIT(v_idx);
1394*4882a593Smuzhiyun 
1395*4882a593Smuzhiyun 		ixgbevf_write_eitr(q_vector);
1396*4882a593Smuzhiyun 	}
1397*4882a593Smuzhiyun 
1398*4882a593Smuzhiyun 	ixgbevf_set_ivar(adapter, -1, 1, v_idx);
1399*4882a593Smuzhiyun 	/* setup eims_other and add value to global eims_enable_mask */
1400*4882a593Smuzhiyun 	adapter->eims_other = BIT(v_idx);
1401*4882a593Smuzhiyun 	adapter->eims_enable_mask |= adapter->eims_other;
1402*4882a593Smuzhiyun }
1403*4882a593Smuzhiyun 
1404*4882a593Smuzhiyun enum latency_range {
1405*4882a593Smuzhiyun 	lowest_latency = 0,
1406*4882a593Smuzhiyun 	low_latency = 1,
1407*4882a593Smuzhiyun 	bulk_latency = 2,
1408*4882a593Smuzhiyun 	latency_invalid = 255
1409*4882a593Smuzhiyun };
1410*4882a593Smuzhiyun 
1411*4882a593Smuzhiyun /**
1412*4882a593Smuzhiyun  * ixgbevf_update_itr - update the dynamic ITR value based on statistics
1413*4882a593Smuzhiyun  * @q_vector: structure containing interrupt and ring information
1414*4882a593Smuzhiyun  * @ring_container: structure containing ring performance data
1415*4882a593Smuzhiyun  *
1416*4882a593Smuzhiyun  * Stores a new ITR value based on packets and byte
1417*4882a593Smuzhiyun  * counts during the last interrupt.  The advantage of per interrupt
1418*4882a593Smuzhiyun  * computation is faster updates and more accurate ITR for the current
1419*4882a593Smuzhiyun  * traffic pattern.  Constants in this function were computed
1420*4882a593Smuzhiyun  * based on theoretical maximum wire speed and thresholds were set based
1421*4882a593Smuzhiyun  * on testing data as well as attempting to minimize response time
1422*4882a593Smuzhiyun  * while increasing bulk throughput.
1423*4882a593Smuzhiyun  **/
ixgbevf_update_itr(struct ixgbevf_q_vector * q_vector,struct ixgbevf_ring_container * ring_container)1424*4882a593Smuzhiyun static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1425*4882a593Smuzhiyun 			       struct ixgbevf_ring_container *ring_container)
1426*4882a593Smuzhiyun {
1427*4882a593Smuzhiyun 	int bytes = ring_container->total_bytes;
1428*4882a593Smuzhiyun 	int packets = ring_container->total_packets;
1429*4882a593Smuzhiyun 	u32 timepassed_us;
1430*4882a593Smuzhiyun 	u64 bytes_perint;
1431*4882a593Smuzhiyun 	u8 itr_setting = ring_container->itr;
1432*4882a593Smuzhiyun 
1433*4882a593Smuzhiyun 	if (packets == 0)
1434*4882a593Smuzhiyun 		return;
1435*4882a593Smuzhiyun 
1436*4882a593Smuzhiyun 	/* simple throttle rate management
1437*4882a593Smuzhiyun 	 *    0-20MB/s lowest (100000 ints/s)
1438*4882a593Smuzhiyun 	 *   20-100MB/s low   (20000 ints/s)
1439*4882a593Smuzhiyun 	 *  100-1249MB/s bulk (12000 ints/s)
1440*4882a593Smuzhiyun 	 */
1441*4882a593Smuzhiyun 	/* what was last interrupt timeslice? */
1442*4882a593Smuzhiyun 	timepassed_us = q_vector->itr >> 2;
1443*4882a593Smuzhiyun 	if (timepassed_us == 0)
1444*4882a593Smuzhiyun 		return;
1445*4882a593Smuzhiyun 
1446*4882a593Smuzhiyun 	bytes_perint = bytes / timepassed_us; /* bytes/usec */
1447*4882a593Smuzhiyun 
1448*4882a593Smuzhiyun 	switch (itr_setting) {
1449*4882a593Smuzhiyun 	case lowest_latency:
1450*4882a593Smuzhiyun 		if (bytes_perint > 10)
1451*4882a593Smuzhiyun 			itr_setting = low_latency;
1452*4882a593Smuzhiyun 		break;
1453*4882a593Smuzhiyun 	case low_latency:
1454*4882a593Smuzhiyun 		if (bytes_perint > 20)
1455*4882a593Smuzhiyun 			itr_setting = bulk_latency;
1456*4882a593Smuzhiyun 		else if (bytes_perint <= 10)
1457*4882a593Smuzhiyun 			itr_setting = lowest_latency;
1458*4882a593Smuzhiyun 		break;
1459*4882a593Smuzhiyun 	case bulk_latency:
1460*4882a593Smuzhiyun 		if (bytes_perint <= 20)
1461*4882a593Smuzhiyun 			itr_setting = low_latency;
1462*4882a593Smuzhiyun 		break;
1463*4882a593Smuzhiyun 	}
1464*4882a593Smuzhiyun 
1465*4882a593Smuzhiyun 	/* clear work counters since we have the values we need */
1466*4882a593Smuzhiyun 	ring_container->total_bytes = 0;
1467*4882a593Smuzhiyun 	ring_container->total_packets = 0;
1468*4882a593Smuzhiyun 
1469*4882a593Smuzhiyun 	/* write updated itr to ring container */
1470*4882a593Smuzhiyun 	ring_container->itr = itr_setting;
1471*4882a593Smuzhiyun }
1472*4882a593Smuzhiyun 
ixgbevf_set_itr(struct ixgbevf_q_vector * q_vector)1473*4882a593Smuzhiyun static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
1474*4882a593Smuzhiyun {
1475*4882a593Smuzhiyun 	u32 new_itr = q_vector->itr;
1476*4882a593Smuzhiyun 	u8 current_itr;
1477*4882a593Smuzhiyun 
1478*4882a593Smuzhiyun 	ixgbevf_update_itr(q_vector, &q_vector->tx);
1479*4882a593Smuzhiyun 	ixgbevf_update_itr(q_vector, &q_vector->rx);
1480*4882a593Smuzhiyun 
1481*4882a593Smuzhiyun 	current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
1482*4882a593Smuzhiyun 
1483*4882a593Smuzhiyun 	switch (current_itr) {
1484*4882a593Smuzhiyun 	/* counts and packets in update_itr are dependent on these numbers */
1485*4882a593Smuzhiyun 	case lowest_latency:
1486*4882a593Smuzhiyun 		new_itr = IXGBE_100K_ITR;
1487*4882a593Smuzhiyun 		break;
1488*4882a593Smuzhiyun 	case low_latency:
1489*4882a593Smuzhiyun 		new_itr = IXGBE_20K_ITR;
1490*4882a593Smuzhiyun 		break;
1491*4882a593Smuzhiyun 	case bulk_latency:
1492*4882a593Smuzhiyun 		new_itr = IXGBE_12K_ITR;
1493*4882a593Smuzhiyun 		break;
1494*4882a593Smuzhiyun 	default:
1495*4882a593Smuzhiyun 		break;
1496*4882a593Smuzhiyun 	}
1497*4882a593Smuzhiyun 
1498*4882a593Smuzhiyun 	if (new_itr != q_vector->itr) {
1499*4882a593Smuzhiyun 		/* do an exponential smoothing */
1500*4882a593Smuzhiyun 		new_itr = (10 * new_itr * q_vector->itr) /
1501*4882a593Smuzhiyun 			  ((9 * new_itr) + q_vector->itr);
1502*4882a593Smuzhiyun 
1503*4882a593Smuzhiyun 		/* save the algorithm value here */
1504*4882a593Smuzhiyun 		q_vector->itr = new_itr;
1505*4882a593Smuzhiyun 
1506*4882a593Smuzhiyun 		ixgbevf_write_eitr(q_vector);
1507*4882a593Smuzhiyun 	}
1508*4882a593Smuzhiyun }
1509*4882a593Smuzhiyun 
ixgbevf_msix_other(int irq,void * data)1510*4882a593Smuzhiyun static irqreturn_t ixgbevf_msix_other(int irq, void *data)
1511*4882a593Smuzhiyun {
1512*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = data;
1513*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
1514*4882a593Smuzhiyun 
1515*4882a593Smuzhiyun 	hw->mac.get_link_status = 1;
1516*4882a593Smuzhiyun 
1517*4882a593Smuzhiyun 	ixgbevf_service_event_schedule(adapter);
1518*4882a593Smuzhiyun 
1519*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1520*4882a593Smuzhiyun 
1521*4882a593Smuzhiyun 	return IRQ_HANDLED;
1522*4882a593Smuzhiyun }
1523*4882a593Smuzhiyun 
1524*4882a593Smuzhiyun /**
1525*4882a593Smuzhiyun  * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
1526*4882a593Smuzhiyun  * @irq: unused
1527*4882a593Smuzhiyun  * @data: pointer to our q_vector struct for this interrupt vector
1528*4882a593Smuzhiyun  **/
ixgbevf_msix_clean_rings(int irq,void * data)1529*4882a593Smuzhiyun static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
1530*4882a593Smuzhiyun {
1531*4882a593Smuzhiyun 	struct ixgbevf_q_vector *q_vector = data;
1532*4882a593Smuzhiyun 
1533*4882a593Smuzhiyun 	/* EIAM disabled interrupts (on this vector) for us */
1534*4882a593Smuzhiyun 	if (q_vector->rx.ring || q_vector->tx.ring)
1535*4882a593Smuzhiyun 		napi_schedule_irqoff(&q_vector->napi);
1536*4882a593Smuzhiyun 
1537*4882a593Smuzhiyun 	return IRQ_HANDLED;
1538*4882a593Smuzhiyun }
1539*4882a593Smuzhiyun 
1540*4882a593Smuzhiyun /**
1541*4882a593Smuzhiyun  * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1542*4882a593Smuzhiyun  * @adapter: board private structure
1543*4882a593Smuzhiyun  *
1544*4882a593Smuzhiyun  * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1545*4882a593Smuzhiyun  * interrupts from the kernel.
1546*4882a593Smuzhiyun  **/
ixgbevf_request_msix_irqs(struct ixgbevf_adapter * adapter)1547*4882a593Smuzhiyun static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1548*4882a593Smuzhiyun {
1549*4882a593Smuzhiyun 	struct net_device *netdev = adapter->netdev;
1550*4882a593Smuzhiyun 	int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1551*4882a593Smuzhiyun 	unsigned int ri = 0, ti = 0;
1552*4882a593Smuzhiyun 	int vector, err;
1553*4882a593Smuzhiyun 
1554*4882a593Smuzhiyun 	for (vector = 0; vector < q_vectors; vector++) {
1555*4882a593Smuzhiyun 		struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1556*4882a593Smuzhiyun 		struct msix_entry *entry = &adapter->msix_entries[vector];
1557*4882a593Smuzhiyun 
1558*4882a593Smuzhiyun 		if (q_vector->tx.ring && q_vector->rx.ring) {
1559*4882a593Smuzhiyun 			snprintf(q_vector->name, sizeof(q_vector->name),
1560*4882a593Smuzhiyun 				 "%s-TxRx-%u", netdev->name, ri++);
1561*4882a593Smuzhiyun 			ti++;
1562*4882a593Smuzhiyun 		} else if (q_vector->rx.ring) {
1563*4882a593Smuzhiyun 			snprintf(q_vector->name, sizeof(q_vector->name),
1564*4882a593Smuzhiyun 				 "%s-rx-%u", netdev->name, ri++);
1565*4882a593Smuzhiyun 		} else if (q_vector->tx.ring) {
1566*4882a593Smuzhiyun 			snprintf(q_vector->name, sizeof(q_vector->name),
1567*4882a593Smuzhiyun 				 "%s-tx-%u", netdev->name, ti++);
1568*4882a593Smuzhiyun 		} else {
1569*4882a593Smuzhiyun 			/* skip this unused q_vector */
1570*4882a593Smuzhiyun 			continue;
1571*4882a593Smuzhiyun 		}
1572*4882a593Smuzhiyun 		err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1573*4882a593Smuzhiyun 				  q_vector->name, q_vector);
1574*4882a593Smuzhiyun 		if (err) {
1575*4882a593Smuzhiyun 			hw_dbg(&adapter->hw,
1576*4882a593Smuzhiyun 			       "request_irq failed for MSIX interrupt Error: %d\n",
1577*4882a593Smuzhiyun 			       err);
1578*4882a593Smuzhiyun 			goto free_queue_irqs;
1579*4882a593Smuzhiyun 		}
1580*4882a593Smuzhiyun 	}
1581*4882a593Smuzhiyun 
1582*4882a593Smuzhiyun 	err = request_irq(adapter->msix_entries[vector].vector,
1583*4882a593Smuzhiyun 			  &ixgbevf_msix_other, 0, netdev->name, adapter);
1584*4882a593Smuzhiyun 	if (err) {
1585*4882a593Smuzhiyun 		hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
1586*4882a593Smuzhiyun 		       err);
1587*4882a593Smuzhiyun 		goto free_queue_irqs;
1588*4882a593Smuzhiyun 	}
1589*4882a593Smuzhiyun 
1590*4882a593Smuzhiyun 	return 0;
1591*4882a593Smuzhiyun 
1592*4882a593Smuzhiyun free_queue_irqs:
1593*4882a593Smuzhiyun 	while (vector) {
1594*4882a593Smuzhiyun 		vector--;
1595*4882a593Smuzhiyun 		free_irq(adapter->msix_entries[vector].vector,
1596*4882a593Smuzhiyun 			 adapter->q_vector[vector]);
1597*4882a593Smuzhiyun 	}
1598*4882a593Smuzhiyun 	/* This failure is non-recoverable - it indicates the system is
1599*4882a593Smuzhiyun 	 * out of MSIX vector resources and the VF driver cannot run
1600*4882a593Smuzhiyun 	 * without them.  Set the number of msix vectors to zero
1601*4882a593Smuzhiyun 	 * indicating that not enough can be allocated.  The error
1602*4882a593Smuzhiyun 	 * will be returned to the user indicating device open failed.
1603*4882a593Smuzhiyun 	 * Any further attempts to force the driver to open will also
1604*4882a593Smuzhiyun 	 * fail.  The only way to recover is to unload the driver and
1605*4882a593Smuzhiyun 	 * reload it again.  If the system has recovered some MSIX
1606*4882a593Smuzhiyun 	 * vectors then it may succeed.
1607*4882a593Smuzhiyun 	 */
1608*4882a593Smuzhiyun 	adapter->num_msix_vectors = 0;
1609*4882a593Smuzhiyun 	return err;
1610*4882a593Smuzhiyun }
1611*4882a593Smuzhiyun 
1612*4882a593Smuzhiyun /**
1613*4882a593Smuzhiyun  * ixgbevf_request_irq - initialize interrupts
1614*4882a593Smuzhiyun  * @adapter: board private structure
1615*4882a593Smuzhiyun  *
1616*4882a593Smuzhiyun  * Attempts to configure interrupts using the best available
1617*4882a593Smuzhiyun  * capabilities of the hardware and kernel.
1618*4882a593Smuzhiyun  **/
ixgbevf_request_irq(struct ixgbevf_adapter * adapter)1619*4882a593Smuzhiyun static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1620*4882a593Smuzhiyun {
1621*4882a593Smuzhiyun 	int err = ixgbevf_request_msix_irqs(adapter);
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun 	if (err)
1624*4882a593Smuzhiyun 		hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
1625*4882a593Smuzhiyun 
1626*4882a593Smuzhiyun 	return err;
1627*4882a593Smuzhiyun }
1628*4882a593Smuzhiyun 
ixgbevf_free_irq(struct ixgbevf_adapter * adapter)1629*4882a593Smuzhiyun static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1630*4882a593Smuzhiyun {
1631*4882a593Smuzhiyun 	int i, q_vectors;
1632*4882a593Smuzhiyun 
1633*4882a593Smuzhiyun 	if (!adapter->msix_entries)
1634*4882a593Smuzhiyun 		return;
1635*4882a593Smuzhiyun 
1636*4882a593Smuzhiyun 	q_vectors = adapter->num_msix_vectors;
1637*4882a593Smuzhiyun 	i = q_vectors - 1;
1638*4882a593Smuzhiyun 
1639*4882a593Smuzhiyun 	free_irq(adapter->msix_entries[i].vector, adapter);
1640*4882a593Smuzhiyun 	i--;
1641*4882a593Smuzhiyun 
1642*4882a593Smuzhiyun 	for (; i >= 0; i--) {
1643*4882a593Smuzhiyun 		/* free only the irqs that were actually requested */
1644*4882a593Smuzhiyun 		if (!adapter->q_vector[i]->rx.ring &&
1645*4882a593Smuzhiyun 		    !adapter->q_vector[i]->tx.ring)
1646*4882a593Smuzhiyun 			continue;
1647*4882a593Smuzhiyun 
1648*4882a593Smuzhiyun 		free_irq(adapter->msix_entries[i].vector,
1649*4882a593Smuzhiyun 			 adapter->q_vector[i]);
1650*4882a593Smuzhiyun 	}
1651*4882a593Smuzhiyun }
1652*4882a593Smuzhiyun 
1653*4882a593Smuzhiyun /**
1654*4882a593Smuzhiyun  * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1655*4882a593Smuzhiyun  * @adapter: board private structure
1656*4882a593Smuzhiyun  **/
ixgbevf_irq_disable(struct ixgbevf_adapter * adapter)1657*4882a593Smuzhiyun static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1658*4882a593Smuzhiyun {
1659*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
1660*4882a593Smuzhiyun 	int i;
1661*4882a593Smuzhiyun 
1662*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
1663*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1664*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
1665*4882a593Smuzhiyun 
1666*4882a593Smuzhiyun 	IXGBE_WRITE_FLUSH(hw);
1667*4882a593Smuzhiyun 
1668*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_msix_vectors; i++)
1669*4882a593Smuzhiyun 		synchronize_irq(adapter->msix_entries[i].vector);
1670*4882a593Smuzhiyun }
1671*4882a593Smuzhiyun 
1672*4882a593Smuzhiyun /**
1673*4882a593Smuzhiyun  * ixgbevf_irq_enable - Enable default interrupt generation settings
1674*4882a593Smuzhiyun  * @adapter: board private structure
1675*4882a593Smuzhiyun  **/
ixgbevf_irq_enable(struct ixgbevf_adapter * adapter)1676*4882a593Smuzhiyun static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
1677*4882a593Smuzhiyun {
1678*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
1679*4882a593Smuzhiyun 
1680*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1681*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1682*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
1683*4882a593Smuzhiyun }
1684*4882a593Smuzhiyun 
1685*4882a593Smuzhiyun /**
1686*4882a593Smuzhiyun  * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1687*4882a593Smuzhiyun  * @adapter: board private structure
1688*4882a593Smuzhiyun  * @ring: structure containing ring specific data
1689*4882a593Smuzhiyun  *
1690*4882a593Smuzhiyun  * Configure the Tx descriptor ring after a reset.
1691*4882a593Smuzhiyun  **/
ixgbevf_configure_tx_ring(struct ixgbevf_adapter * adapter,struct ixgbevf_ring * ring)1692*4882a593Smuzhiyun static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1693*4882a593Smuzhiyun 				      struct ixgbevf_ring *ring)
1694*4882a593Smuzhiyun {
1695*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
1696*4882a593Smuzhiyun 	u64 tdba = ring->dma;
1697*4882a593Smuzhiyun 	int wait_loop = 10;
1698*4882a593Smuzhiyun 	u32 txdctl = IXGBE_TXDCTL_ENABLE;
1699*4882a593Smuzhiyun 	u8 reg_idx = ring->reg_idx;
1700*4882a593Smuzhiyun 
1701*4882a593Smuzhiyun 	/* disable queue to avoid issues while updating state */
1702*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1703*4882a593Smuzhiyun 	IXGBE_WRITE_FLUSH(hw);
1704*4882a593Smuzhiyun 
1705*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1706*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1707*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1708*4882a593Smuzhiyun 			ring->count * sizeof(union ixgbe_adv_tx_desc));
1709*4882a593Smuzhiyun 
1710*4882a593Smuzhiyun 	/* disable head writeback */
1711*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1712*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1713*4882a593Smuzhiyun 
1714*4882a593Smuzhiyun 	/* enable relaxed ordering */
1715*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1716*4882a593Smuzhiyun 			(IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1717*4882a593Smuzhiyun 			 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1718*4882a593Smuzhiyun 
1719*4882a593Smuzhiyun 	/* reset head and tail pointers */
1720*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1721*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
1722*4882a593Smuzhiyun 	ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
1723*4882a593Smuzhiyun 
1724*4882a593Smuzhiyun 	/* reset ntu and ntc to place SW in sync with hardwdare */
1725*4882a593Smuzhiyun 	ring->next_to_clean = 0;
1726*4882a593Smuzhiyun 	ring->next_to_use = 0;
1727*4882a593Smuzhiyun 
1728*4882a593Smuzhiyun 	/* In order to avoid issues WTHRESH + PTHRESH should always be equal
1729*4882a593Smuzhiyun 	 * to or less than the number of on chip descriptors, which is
1730*4882a593Smuzhiyun 	 * currently 40.
1731*4882a593Smuzhiyun 	 */
1732*4882a593Smuzhiyun 	txdctl |= (8 << 16);    /* WTHRESH = 8 */
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun 	/* Setting PTHRESH to 32 both improves performance */
1735*4882a593Smuzhiyun 	txdctl |= (1u << 8) |    /* HTHRESH = 1 */
1736*4882a593Smuzhiyun 		   32;           /* PTHRESH = 32 */
1737*4882a593Smuzhiyun 
1738*4882a593Smuzhiyun 	/* reinitialize tx_buffer_info */
1739*4882a593Smuzhiyun 	memset(ring->tx_buffer_info, 0,
1740*4882a593Smuzhiyun 	       sizeof(struct ixgbevf_tx_buffer) * ring->count);
1741*4882a593Smuzhiyun 
1742*4882a593Smuzhiyun 	clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
1743*4882a593Smuzhiyun 	clear_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
1744*4882a593Smuzhiyun 
1745*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1746*4882a593Smuzhiyun 
1747*4882a593Smuzhiyun 	/* poll to verify queue is enabled */
1748*4882a593Smuzhiyun 	do {
1749*4882a593Smuzhiyun 		usleep_range(1000, 2000);
1750*4882a593Smuzhiyun 		txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1751*4882a593Smuzhiyun 	}  while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1752*4882a593Smuzhiyun 	if (!wait_loop)
1753*4882a593Smuzhiyun 		hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
1754*4882a593Smuzhiyun }
1755*4882a593Smuzhiyun 
1756*4882a593Smuzhiyun /**
1757*4882a593Smuzhiyun  * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1758*4882a593Smuzhiyun  * @adapter: board private structure
1759*4882a593Smuzhiyun  *
1760*4882a593Smuzhiyun  * Configure the Tx unit of the MAC after a reset.
1761*4882a593Smuzhiyun  **/
ixgbevf_configure_tx(struct ixgbevf_adapter * adapter)1762*4882a593Smuzhiyun static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1763*4882a593Smuzhiyun {
1764*4882a593Smuzhiyun 	u32 i;
1765*4882a593Smuzhiyun 
1766*4882a593Smuzhiyun 	/* Setup the HW Tx Head and Tail descriptor pointers */
1767*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_tx_queues; i++)
1768*4882a593Smuzhiyun 		ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
1769*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_xdp_queues; i++)
1770*4882a593Smuzhiyun 		ixgbevf_configure_tx_ring(adapter, adapter->xdp_ring[i]);
1771*4882a593Smuzhiyun }
1772*4882a593Smuzhiyun 
1773*4882a593Smuzhiyun #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT	2
1774*4882a593Smuzhiyun 
ixgbevf_configure_srrctl(struct ixgbevf_adapter * adapter,struct ixgbevf_ring * ring,int index)1775*4882a593Smuzhiyun static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter,
1776*4882a593Smuzhiyun 				     struct ixgbevf_ring *ring, int index)
1777*4882a593Smuzhiyun {
1778*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
1779*4882a593Smuzhiyun 	u32 srrctl;
1780*4882a593Smuzhiyun 
1781*4882a593Smuzhiyun 	srrctl = IXGBE_SRRCTL_DROP_EN;
1782*4882a593Smuzhiyun 
1783*4882a593Smuzhiyun 	srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
1784*4882a593Smuzhiyun 	if (ring_uses_large_buffer(ring))
1785*4882a593Smuzhiyun 		srrctl |= IXGBEVF_RXBUFFER_3072 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1786*4882a593Smuzhiyun 	else
1787*4882a593Smuzhiyun 		srrctl |= IXGBEVF_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1788*4882a593Smuzhiyun 	srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1789*4882a593Smuzhiyun 
1790*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1791*4882a593Smuzhiyun }
1792*4882a593Smuzhiyun 
ixgbevf_setup_psrtype(struct ixgbevf_adapter * adapter)1793*4882a593Smuzhiyun static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1794*4882a593Smuzhiyun {
1795*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
1796*4882a593Smuzhiyun 
1797*4882a593Smuzhiyun 	/* PSRTYPE must be initialized in 82599 */
1798*4882a593Smuzhiyun 	u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1799*4882a593Smuzhiyun 		      IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1800*4882a593Smuzhiyun 		      IXGBE_PSRTYPE_L2HDR;
1801*4882a593Smuzhiyun 
1802*4882a593Smuzhiyun 	if (adapter->num_rx_queues > 1)
1803*4882a593Smuzhiyun 		psrtype |= BIT(29);
1804*4882a593Smuzhiyun 
1805*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1806*4882a593Smuzhiyun }
1807*4882a593Smuzhiyun 
1808*4882a593Smuzhiyun #define IXGBEVF_MAX_RX_DESC_POLL 10
ixgbevf_disable_rx_queue(struct ixgbevf_adapter * adapter,struct ixgbevf_ring * ring)1809*4882a593Smuzhiyun static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1810*4882a593Smuzhiyun 				     struct ixgbevf_ring *ring)
1811*4882a593Smuzhiyun {
1812*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
1813*4882a593Smuzhiyun 	int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1814*4882a593Smuzhiyun 	u32 rxdctl;
1815*4882a593Smuzhiyun 	u8 reg_idx = ring->reg_idx;
1816*4882a593Smuzhiyun 
1817*4882a593Smuzhiyun 	if (IXGBE_REMOVED(hw->hw_addr))
1818*4882a593Smuzhiyun 		return;
1819*4882a593Smuzhiyun 	rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1820*4882a593Smuzhiyun 	rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1821*4882a593Smuzhiyun 
1822*4882a593Smuzhiyun 	/* write value back with RXDCTL.ENABLE bit cleared */
1823*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1824*4882a593Smuzhiyun 
1825*4882a593Smuzhiyun 	/* the hardware may take up to 100us to really disable the Rx queue */
1826*4882a593Smuzhiyun 	do {
1827*4882a593Smuzhiyun 		udelay(10);
1828*4882a593Smuzhiyun 		rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1829*4882a593Smuzhiyun 	} while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1830*4882a593Smuzhiyun 
1831*4882a593Smuzhiyun 	if (!wait_loop)
1832*4882a593Smuzhiyun 		pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1833*4882a593Smuzhiyun 		       reg_idx);
1834*4882a593Smuzhiyun }
1835*4882a593Smuzhiyun 
ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter * adapter,struct ixgbevf_ring * ring)1836*4882a593Smuzhiyun static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1837*4882a593Smuzhiyun 					 struct ixgbevf_ring *ring)
1838*4882a593Smuzhiyun {
1839*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
1840*4882a593Smuzhiyun 	int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1841*4882a593Smuzhiyun 	u32 rxdctl;
1842*4882a593Smuzhiyun 	u8 reg_idx = ring->reg_idx;
1843*4882a593Smuzhiyun 
1844*4882a593Smuzhiyun 	if (IXGBE_REMOVED(hw->hw_addr))
1845*4882a593Smuzhiyun 		return;
1846*4882a593Smuzhiyun 	do {
1847*4882a593Smuzhiyun 		usleep_range(1000, 2000);
1848*4882a593Smuzhiyun 		rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1849*4882a593Smuzhiyun 	} while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1850*4882a593Smuzhiyun 
1851*4882a593Smuzhiyun 	if (!wait_loop)
1852*4882a593Smuzhiyun 		pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1853*4882a593Smuzhiyun 		       reg_idx);
1854*4882a593Smuzhiyun }
1855*4882a593Smuzhiyun 
1856*4882a593Smuzhiyun /**
1857*4882a593Smuzhiyun  * ixgbevf_init_rss_key - Initialize adapter RSS key
1858*4882a593Smuzhiyun  * @adapter: device handle
1859*4882a593Smuzhiyun  *
1860*4882a593Smuzhiyun  * Allocates and initializes the RSS key if it is not allocated.
1861*4882a593Smuzhiyun  **/
ixgbevf_init_rss_key(struct ixgbevf_adapter * adapter)1862*4882a593Smuzhiyun static inline int ixgbevf_init_rss_key(struct ixgbevf_adapter *adapter)
1863*4882a593Smuzhiyun {
1864*4882a593Smuzhiyun 	u32 *rss_key;
1865*4882a593Smuzhiyun 
1866*4882a593Smuzhiyun 	if (!adapter->rss_key) {
1867*4882a593Smuzhiyun 		rss_key = kzalloc(IXGBEVF_RSS_HASH_KEY_SIZE, GFP_KERNEL);
1868*4882a593Smuzhiyun 		if (unlikely(!rss_key))
1869*4882a593Smuzhiyun 			return -ENOMEM;
1870*4882a593Smuzhiyun 
1871*4882a593Smuzhiyun 		netdev_rss_key_fill(rss_key, IXGBEVF_RSS_HASH_KEY_SIZE);
1872*4882a593Smuzhiyun 		adapter->rss_key = rss_key;
1873*4882a593Smuzhiyun 	}
1874*4882a593Smuzhiyun 
1875*4882a593Smuzhiyun 	return 0;
1876*4882a593Smuzhiyun }
1877*4882a593Smuzhiyun 
ixgbevf_setup_vfmrqc(struct ixgbevf_adapter * adapter)1878*4882a593Smuzhiyun static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
1879*4882a593Smuzhiyun {
1880*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
1881*4882a593Smuzhiyun 	u32 vfmrqc = 0, vfreta = 0;
1882*4882a593Smuzhiyun 	u16 rss_i = adapter->num_rx_queues;
1883*4882a593Smuzhiyun 	u8 i, j;
1884*4882a593Smuzhiyun 
1885*4882a593Smuzhiyun 	/* Fill out hash function seeds */
1886*4882a593Smuzhiyun 	for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
1887*4882a593Smuzhiyun 		IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), *(adapter->rss_key + i));
1888*4882a593Smuzhiyun 
1889*4882a593Smuzhiyun 	for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
1890*4882a593Smuzhiyun 		if (j == rss_i)
1891*4882a593Smuzhiyun 			j = 0;
1892*4882a593Smuzhiyun 
1893*4882a593Smuzhiyun 		adapter->rss_indir_tbl[i] = j;
1894*4882a593Smuzhiyun 
1895*4882a593Smuzhiyun 		vfreta |= j << (i & 0x3) * 8;
1896*4882a593Smuzhiyun 		if ((i & 3) == 3) {
1897*4882a593Smuzhiyun 			IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
1898*4882a593Smuzhiyun 			vfreta = 0;
1899*4882a593Smuzhiyun 		}
1900*4882a593Smuzhiyun 	}
1901*4882a593Smuzhiyun 
1902*4882a593Smuzhiyun 	/* Perform hash on these packet types */
1903*4882a593Smuzhiyun 	vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
1904*4882a593Smuzhiyun 		IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
1905*4882a593Smuzhiyun 		IXGBE_VFMRQC_RSS_FIELD_IPV6 |
1906*4882a593Smuzhiyun 		IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
1907*4882a593Smuzhiyun 
1908*4882a593Smuzhiyun 	vfmrqc |= IXGBE_VFMRQC_RSSEN;
1909*4882a593Smuzhiyun 
1910*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
1911*4882a593Smuzhiyun }
1912*4882a593Smuzhiyun 
ixgbevf_configure_rx_ring(struct ixgbevf_adapter * adapter,struct ixgbevf_ring * ring)1913*4882a593Smuzhiyun static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1914*4882a593Smuzhiyun 				      struct ixgbevf_ring *ring)
1915*4882a593Smuzhiyun {
1916*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
1917*4882a593Smuzhiyun 	union ixgbe_adv_rx_desc *rx_desc;
1918*4882a593Smuzhiyun 	u64 rdba = ring->dma;
1919*4882a593Smuzhiyun 	u32 rxdctl;
1920*4882a593Smuzhiyun 	u8 reg_idx = ring->reg_idx;
1921*4882a593Smuzhiyun 
1922*4882a593Smuzhiyun 	/* disable queue to avoid issues while updating state */
1923*4882a593Smuzhiyun 	rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1924*4882a593Smuzhiyun 	ixgbevf_disable_rx_queue(adapter, ring);
1925*4882a593Smuzhiyun 
1926*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1927*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1928*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1929*4882a593Smuzhiyun 			ring->count * sizeof(union ixgbe_adv_rx_desc));
1930*4882a593Smuzhiyun 
1931*4882a593Smuzhiyun #ifndef CONFIG_SPARC
1932*4882a593Smuzhiyun 	/* enable relaxed ordering */
1933*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1934*4882a593Smuzhiyun 			IXGBE_DCA_RXCTRL_DESC_RRO_EN);
1935*4882a593Smuzhiyun #else
1936*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1937*4882a593Smuzhiyun 			IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1938*4882a593Smuzhiyun 			IXGBE_DCA_RXCTRL_DATA_WRO_EN);
1939*4882a593Smuzhiyun #endif
1940*4882a593Smuzhiyun 
1941*4882a593Smuzhiyun 	/* reset head and tail pointers */
1942*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1943*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
1944*4882a593Smuzhiyun 	ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
1945*4882a593Smuzhiyun 
1946*4882a593Smuzhiyun 	/* initialize rx_buffer_info */
1947*4882a593Smuzhiyun 	memset(ring->rx_buffer_info, 0,
1948*4882a593Smuzhiyun 	       sizeof(struct ixgbevf_rx_buffer) * ring->count);
1949*4882a593Smuzhiyun 
1950*4882a593Smuzhiyun 	/* initialize Rx descriptor 0 */
1951*4882a593Smuzhiyun 	rx_desc = IXGBEVF_RX_DESC(ring, 0);
1952*4882a593Smuzhiyun 	rx_desc->wb.upper.length = 0;
1953*4882a593Smuzhiyun 
1954*4882a593Smuzhiyun 	/* reset ntu and ntc to place SW in sync with hardwdare */
1955*4882a593Smuzhiyun 	ring->next_to_clean = 0;
1956*4882a593Smuzhiyun 	ring->next_to_use = 0;
1957*4882a593Smuzhiyun 	ring->next_to_alloc = 0;
1958*4882a593Smuzhiyun 
1959*4882a593Smuzhiyun 	ixgbevf_configure_srrctl(adapter, ring, reg_idx);
1960*4882a593Smuzhiyun 
1961*4882a593Smuzhiyun 	/* RXDCTL.RLPML does not work on 82599 */
1962*4882a593Smuzhiyun 	if (adapter->hw.mac.type != ixgbe_mac_82599_vf) {
1963*4882a593Smuzhiyun 		rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
1964*4882a593Smuzhiyun 			    IXGBE_RXDCTL_RLPML_EN);
1965*4882a593Smuzhiyun 
1966*4882a593Smuzhiyun #if (PAGE_SIZE < 8192)
1967*4882a593Smuzhiyun 		/* Limit the maximum frame size so we don't overrun the skb */
1968*4882a593Smuzhiyun 		if (ring_uses_build_skb(ring) &&
1969*4882a593Smuzhiyun 		    !ring_uses_large_buffer(ring))
1970*4882a593Smuzhiyun 			rxdctl |= IXGBEVF_MAX_FRAME_BUILD_SKB |
1971*4882a593Smuzhiyun 				  IXGBE_RXDCTL_RLPML_EN;
1972*4882a593Smuzhiyun #endif
1973*4882a593Smuzhiyun 	}
1974*4882a593Smuzhiyun 
1975*4882a593Smuzhiyun 	rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1976*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1977*4882a593Smuzhiyun 
1978*4882a593Smuzhiyun 	ixgbevf_rx_desc_queue_enable(adapter, ring);
1979*4882a593Smuzhiyun 	ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
1980*4882a593Smuzhiyun }
1981*4882a593Smuzhiyun 
ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter * adapter,struct ixgbevf_ring * rx_ring)1982*4882a593Smuzhiyun static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter,
1983*4882a593Smuzhiyun 				      struct ixgbevf_ring *rx_ring)
1984*4882a593Smuzhiyun {
1985*4882a593Smuzhiyun 	struct net_device *netdev = adapter->netdev;
1986*4882a593Smuzhiyun 	unsigned int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1987*4882a593Smuzhiyun 
1988*4882a593Smuzhiyun 	/* set build_skb and buffer size flags */
1989*4882a593Smuzhiyun 	clear_ring_build_skb_enabled(rx_ring);
1990*4882a593Smuzhiyun 	clear_ring_uses_large_buffer(rx_ring);
1991*4882a593Smuzhiyun 
1992*4882a593Smuzhiyun 	if (adapter->flags & IXGBEVF_FLAGS_LEGACY_RX)
1993*4882a593Smuzhiyun 		return;
1994*4882a593Smuzhiyun 
1995*4882a593Smuzhiyun 	if (PAGE_SIZE < 8192)
1996*4882a593Smuzhiyun 		if (max_frame > IXGBEVF_MAX_FRAME_BUILD_SKB)
1997*4882a593Smuzhiyun 			set_ring_uses_large_buffer(rx_ring);
1998*4882a593Smuzhiyun 
1999*4882a593Smuzhiyun 	/* 82599 can't rely on RXDCTL.RLPML to restrict the size of the frame */
2000*4882a593Smuzhiyun 	if (adapter->hw.mac.type == ixgbe_mac_82599_vf && !ring_uses_large_buffer(rx_ring))
2001*4882a593Smuzhiyun 		return;
2002*4882a593Smuzhiyun 
2003*4882a593Smuzhiyun 	set_ring_build_skb_enabled(rx_ring);
2004*4882a593Smuzhiyun }
2005*4882a593Smuzhiyun 
2006*4882a593Smuzhiyun /**
2007*4882a593Smuzhiyun  * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
2008*4882a593Smuzhiyun  * @adapter: board private structure
2009*4882a593Smuzhiyun  *
2010*4882a593Smuzhiyun  * Configure the Rx unit of the MAC after a reset.
2011*4882a593Smuzhiyun  **/
ixgbevf_configure_rx(struct ixgbevf_adapter * adapter)2012*4882a593Smuzhiyun static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
2013*4882a593Smuzhiyun {
2014*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2015*4882a593Smuzhiyun 	struct net_device *netdev = adapter->netdev;
2016*4882a593Smuzhiyun 	int i, ret;
2017*4882a593Smuzhiyun 
2018*4882a593Smuzhiyun 	ixgbevf_setup_psrtype(adapter);
2019*4882a593Smuzhiyun 	if (hw->mac.type >= ixgbe_mac_X550_vf)
2020*4882a593Smuzhiyun 		ixgbevf_setup_vfmrqc(adapter);
2021*4882a593Smuzhiyun 
2022*4882a593Smuzhiyun 	spin_lock_bh(&adapter->mbx_lock);
2023*4882a593Smuzhiyun 	/* notify the PF of our intent to use this size of frame */
2024*4882a593Smuzhiyun 	ret = hw->mac.ops.set_rlpml(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
2025*4882a593Smuzhiyun 	spin_unlock_bh(&adapter->mbx_lock);
2026*4882a593Smuzhiyun 	if (ret)
2027*4882a593Smuzhiyun 		dev_err(&adapter->pdev->dev,
2028*4882a593Smuzhiyun 			"Failed to set MTU at %d\n", netdev->mtu);
2029*4882a593Smuzhiyun 
2030*4882a593Smuzhiyun 	/* Setup the HW Rx Head and Tail Descriptor Pointers and
2031*4882a593Smuzhiyun 	 * the Base and Length of the Rx Descriptor Ring
2032*4882a593Smuzhiyun 	 */
2033*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_rx_queues; i++) {
2034*4882a593Smuzhiyun 		struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
2035*4882a593Smuzhiyun 
2036*4882a593Smuzhiyun 		ixgbevf_set_rx_buffer_len(adapter, rx_ring);
2037*4882a593Smuzhiyun 		ixgbevf_configure_rx_ring(adapter, rx_ring);
2038*4882a593Smuzhiyun 	}
2039*4882a593Smuzhiyun }
2040*4882a593Smuzhiyun 
ixgbevf_vlan_rx_add_vid(struct net_device * netdev,__be16 proto,u16 vid)2041*4882a593Smuzhiyun static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
2042*4882a593Smuzhiyun 				   __be16 proto, u16 vid)
2043*4882a593Smuzhiyun {
2044*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2045*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2046*4882a593Smuzhiyun 	int err;
2047*4882a593Smuzhiyun 
2048*4882a593Smuzhiyun 	spin_lock_bh(&adapter->mbx_lock);
2049*4882a593Smuzhiyun 
2050*4882a593Smuzhiyun 	/* add VID to filter table */
2051*4882a593Smuzhiyun 	err = hw->mac.ops.set_vfta(hw, vid, 0, true);
2052*4882a593Smuzhiyun 
2053*4882a593Smuzhiyun 	spin_unlock_bh(&adapter->mbx_lock);
2054*4882a593Smuzhiyun 
2055*4882a593Smuzhiyun 	/* translate error return types so error makes sense */
2056*4882a593Smuzhiyun 	if (err == IXGBE_ERR_MBX)
2057*4882a593Smuzhiyun 		return -EIO;
2058*4882a593Smuzhiyun 
2059*4882a593Smuzhiyun 	if (err == IXGBE_ERR_INVALID_ARGUMENT)
2060*4882a593Smuzhiyun 		return -EACCES;
2061*4882a593Smuzhiyun 
2062*4882a593Smuzhiyun 	set_bit(vid, adapter->active_vlans);
2063*4882a593Smuzhiyun 
2064*4882a593Smuzhiyun 	return err;
2065*4882a593Smuzhiyun }
2066*4882a593Smuzhiyun 
ixgbevf_vlan_rx_kill_vid(struct net_device * netdev,__be16 proto,u16 vid)2067*4882a593Smuzhiyun static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
2068*4882a593Smuzhiyun 				    __be16 proto, u16 vid)
2069*4882a593Smuzhiyun {
2070*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2071*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2072*4882a593Smuzhiyun 	int err;
2073*4882a593Smuzhiyun 
2074*4882a593Smuzhiyun 	spin_lock_bh(&adapter->mbx_lock);
2075*4882a593Smuzhiyun 
2076*4882a593Smuzhiyun 	/* remove VID from filter table */
2077*4882a593Smuzhiyun 	err = hw->mac.ops.set_vfta(hw, vid, 0, false);
2078*4882a593Smuzhiyun 
2079*4882a593Smuzhiyun 	spin_unlock_bh(&adapter->mbx_lock);
2080*4882a593Smuzhiyun 
2081*4882a593Smuzhiyun 	clear_bit(vid, adapter->active_vlans);
2082*4882a593Smuzhiyun 
2083*4882a593Smuzhiyun 	return err;
2084*4882a593Smuzhiyun }
2085*4882a593Smuzhiyun 
ixgbevf_restore_vlan(struct ixgbevf_adapter * adapter)2086*4882a593Smuzhiyun static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
2087*4882a593Smuzhiyun {
2088*4882a593Smuzhiyun 	u16 vid;
2089*4882a593Smuzhiyun 
2090*4882a593Smuzhiyun 	for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2091*4882a593Smuzhiyun 		ixgbevf_vlan_rx_add_vid(adapter->netdev,
2092*4882a593Smuzhiyun 					htons(ETH_P_8021Q), vid);
2093*4882a593Smuzhiyun }
2094*4882a593Smuzhiyun 
ixgbevf_write_uc_addr_list(struct net_device * netdev)2095*4882a593Smuzhiyun static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
2096*4882a593Smuzhiyun {
2097*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2098*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2099*4882a593Smuzhiyun 	int count = 0;
2100*4882a593Smuzhiyun 
2101*4882a593Smuzhiyun 	if (!netdev_uc_empty(netdev)) {
2102*4882a593Smuzhiyun 		struct netdev_hw_addr *ha;
2103*4882a593Smuzhiyun 
2104*4882a593Smuzhiyun 		netdev_for_each_uc_addr(ha, netdev) {
2105*4882a593Smuzhiyun 			hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
2106*4882a593Smuzhiyun 			udelay(200);
2107*4882a593Smuzhiyun 		}
2108*4882a593Smuzhiyun 	} else {
2109*4882a593Smuzhiyun 		/* If the list is empty then send message to PF driver to
2110*4882a593Smuzhiyun 		 * clear all MAC VLANs on this VF.
2111*4882a593Smuzhiyun 		 */
2112*4882a593Smuzhiyun 		hw->mac.ops.set_uc_addr(hw, 0, NULL);
2113*4882a593Smuzhiyun 	}
2114*4882a593Smuzhiyun 
2115*4882a593Smuzhiyun 	return count;
2116*4882a593Smuzhiyun }
2117*4882a593Smuzhiyun 
2118*4882a593Smuzhiyun /**
2119*4882a593Smuzhiyun  * ixgbevf_set_rx_mode - Multicast and unicast set
2120*4882a593Smuzhiyun  * @netdev: network interface device structure
2121*4882a593Smuzhiyun  *
2122*4882a593Smuzhiyun  * The set_rx_method entry point is called whenever the multicast address
2123*4882a593Smuzhiyun  * list, unicast address list or the network interface flags are updated.
2124*4882a593Smuzhiyun  * This routine is responsible for configuring the hardware for proper
2125*4882a593Smuzhiyun  * multicast mode and configuring requested unicast filters.
2126*4882a593Smuzhiyun  **/
ixgbevf_set_rx_mode(struct net_device * netdev)2127*4882a593Smuzhiyun static void ixgbevf_set_rx_mode(struct net_device *netdev)
2128*4882a593Smuzhiyun {
2129*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2130*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2131*4882a593Smuzhiyun 	unsigned int flags = netdev->flags;
2132*4882a593Smuzhiyun 	int xcast_mode;
2133*4882a593Smuzhiyun 
2134*4882a593Smuzhiyun 	/* request the most inclusive mode we need */
2135*4882a593Smuzhiyun 	if (flags & IFF_PROMISC)
2136*4882a593Smuzhiyun 		xcast_mode = IXGBEVF_XCAST_MODE_PROMISC;
2137*4882a593Smuzhiyun 	else if (flags & IFF_ALLMULTI)
2138*4882a593Smuzhiyun 		xcast_mode = IXGBEVF_XCAST_MODE_ALLMULTI;
2139*4882a593Smuzhiyun 	else if (flags & (IFF_BROADCAST | IFF_MULTICAST))
2140*4882a593Smuzhiyun 		xcast_mode = IXGBEVF_XCAST_MODE_MULTI;
2141*4882a593Smuzhiyun 	else
2142*4882a593Smuzhiyun 		xcast_mode = IXGBEVF_XCAST_MODE_NONE;
2143*4882a593Smuzhiyun 
2144*4882a593Smuzhiyun 	spin_lock_bh(&adapter->mbx_lock);
2145*4882a593Smuzhiyun 
2146*4882a593Smuzhiyun 	hw->mac.ops.update_xcast_mode(hw, xcast_mode);
2147*4882a593Smuzhiyun 
2148*4882a593Smuzhiyun 	/* reprogram multicast list */
2149*4882a593Smuzhiyun 	hw->mac.ops.update_mc_addr_list(hw, netdev);
2150*4882a593Smuzhiyun 
2151*4882a593Smuzhiyun 	ixgbevf_write_uc_addr_list(netdev);
2152*4882a593Smuzhiyun 
2153*4882a593Smuzhiyun 	spin_unlock_bh(&adapter->mbx_lock);
2154*4882a593Smuzhiyun }
2155*4882a593Smuzhiyun 
ixgbevf_napi_enable_all(struct ixgbevf_adapter * adapter)2156*4882a593Smuzhiyun static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
2157*4882a593Smuzhiyun {
2158*4882a593Smuzhiyun 	int q_idx;
2159*4882a593Smuzhiyun 	struct ixgbevf_q_vector *q_vector;
2160*4882a593Smuzhiyun 	int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2161*4882a593Smuzhiyun 
2162*4882a593Smuzhiyun 	for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2163*4882a593Smuzhiyun 		q_vector = adapter->q_vector[q_idx];
2164*4882a593Smuzhiyun 		napi_enable(&q_vector->napi);
2165*4882a593Smuzhiyun 	}
2166*4882a593Smuzhiyun }
2167*4882a593Smuzhiyun 
ixgbevf_napi_disable_all(struct ixgbevf_adapter * adapter)2168*4882a593Smuzhiyun static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
2169*4882a593Smuzhiyun {
2170*4882a593Smuzhiyun 	int q_idx;
2171*4882a593Smuzhiyun 	struct ixgbevf_q_vector *q_vector;
2172*4882a593Smuzhiyun 	int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2173*4882a593Smuzhiyun 
2174*4882a593Smuzhiyun 	for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2175*4882a593Smuzhiyun 		q_vector = adapter->q_vector[q_idx];
2176*4882a593Smuzhiyun 		napi_disable(&q_vector->napi);
2177*4882a593Smuzhiyun 	}
2178*4882a593Smuzhiyun }
2179*4882a593Smuzhiyun 
ixgbevf_configure_dcb(struct ixgbevf_adapter * adapter)2180*4882a593Smuzhiyun static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
2181*4882a593Smuzhiyun {
2182*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2183*4882a593Smuzhiyun 	unsigned int def_q = 0;
2184*4882a593Smuzhiyun 	unsigned int num_tcs = 0;
2185*4882a593Smuzhiyun 	unsigned int num_rx_queues = adapter->num_rx_queues;
2186*4882a593Smuzhiyun 	unsigned int num_tx_queues = adapter->num_tx_queues;
2187*4882a593Smuzhiyun 	int err;
2188*4882a593Smuzhiyun 
2189*4882a593Smuzhiyun 	spin_lock_bh(&adapter->mbx_lock);
2190*4882a593Smuzhiyun 
2191*4882a593Smuzhiyun 	/* fetch queue configuration from the PF */
2192*4882a593Smuzhiyun 	err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2193*4882a593Smuzhiyun 
2194*4882a593Smuzhiyun 	spin_unlock_bh(&adapter->mbx_lock);
2195*4882a593Smuzhiyun 
2196*4882a593Smuzhiyun 	if (err)
2197*4882a593Smuzhiyun 		return err;
2198*4882a593Smuzhiyun 
2199*4882a593Smuzhiyun 	if (num_tcs > 1) {
2200*4882a593Smuzhiyun 		/* we need only one Tx queue */
2201*4882a593Smuzhiyun 		num_tx_queues = 1;
2202*4882a593Smuzhiyun 
2203*4882a593Smuzhiyun 		/* update default Tx ring register index */
2204*4882a593Smuzhiyun 		adapter->tx_ring[0]->reg_idx = def_q;
2205*4882a593Smuzhiyun 
2206*4882a593Smuzhiyun 		/* we need as many queues as traffic classes */
2207*4882a593Smuzhiyun 		num_rx_queues = num_tcs;
2208*4882a593Smuzhiyun 	}
2209*4882a593Smuzhiyun 
2210*4882a593Smuzhiyun 	/* if we have a bad config abort request queue reset */
2211*4882a593Smuzhiyun 	if ((adapter->num_rx_queues != num_rx_queues) ||
2212*4882a593Smuzhiyun 	    (adapter->num_tx_queues != num_tx_queues)) {
2213*4882a593Smuzhiyun 		/* force mailbox timeout to prevent further messages */
2214*4882a593Smuzhiyun 		hw->mbx.timeout = 0;
2215*4882a593Smuzhiyun 
2216*4882a593Smuzhiyun 		/* wait for watchdog to come around and bail us out */
2217*4882a593Smuzhiyun 		set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state);
2218*4882a593Smuzhiyun 	}
2219*4882a593Smuzhiyun 
2220*4882a593Smuzhiyun 	return 0;
2221*4882a593Smuzhiyun }
2222*4882a593Smuzhiyun 
ixgbevf_configure(struct ixgbevf_adapter * adapter)2223*4882a593Smuzhiyun static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
2224*4882a593Smuzhiyun {
2225*4882a593Smuzhiyun 	ixgbevf_configure_dcb(adapter);
2226*4882a593Smuzhiyun 
2227*4882a593Smuzhiyun 	ixgbevf_set_rx_mode(adapter->netdev);
2228*4882a593Smuzhiyun 
2229*4882a593Smuzhiyun 	ixgbevf_restore_vlan(adapter);
2230*4882a593Smuzhiyun 	ixgbevf_ipsec_restore(adapter);
2231*4882a593Smuzhiyun 
2232*4882a593Smuzhiyun 	ixgbevf_configure_tx(adapter);
2233*4882a593Smuzhiyun 	ixgbevf_configure_rx(adapter);
2234*4882a593Smuzhiyun }
2235*4882a593Smuzhiyun 
ixgbevf_save_reset_stats(struct ixgbevf_adapter * adapter)2236*4882a593Smuzhiyun static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
2237*4882a593Smuzhiyun {
2238*4882a593Smuzhiyun 	/* Only save pre-reset stats if there are some */
2239*4882a593Smuzhiyun 	if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
2240*4882a593Smuzhiyun 		adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
2241*4882a593Smuzhiyun 			adapter->stats.base_vfgprc;
2242*4882a593Smuzhiyun 		adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
2243*4882a593Smuzhiyun 			adapter->stats.base_vfgptc;
2244*4882a593Smuzhiyun 		adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
2245*4882a593Smuzhiyun 			adapter->stats.base_vfgorc;
2246*4882a593Smuzhiyun 		adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
2247*4882a593Smuzhiyun 			adapter->stats.base_vfgotc;
2248*4882a593Smuzhiyun 		adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
2249*4882a593Smuzhiyun 			adapter->stats.base_vfmprc;
2250*4882a593Smuzhiyun 	}
2251*4882a593Smuzhiyun }
2252*4882a593Smuzhiyun 
ixgbevf_init_last_counter_stats(struct ixgbevf_adapter * adapter)2253*4882a593Smuzhiyun static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2254*4882a593Smuzhiyun {
2255*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2256*4882a593Smuzhiyun 
2257*4882a593Smuzhiyun 	adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2258*4882a593Smuzhiyun 	adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2259*4882a593Smuzhiyun 	adapter->stats.last_vfgorc |=
2260*4882a593Smuzhiyun 		(((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2261*4882a593Smuzhiyun 	adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2262*4882a593Smuzhiyun 	adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2263*4882a593Smuzhiyun 	adapter->stats.last_vfgotc |=
2264*4882a593Smuzhiyun 		(((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2265*4882a593Smuzhiyun 	adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2266*4882a593Smuzhiyun 
2267*4882a593Smuzhiyun 	adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2268*4882a593Smuzhiyun 	adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2269*4882a593Smuzhiyun 	adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2270*4882a593Smuzhiyun 	adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2271*4882a593Smuzhiyun 	adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2272*4882a593Smuzhiyun }
2273*4882a593Smuzhiyun 
ixgbevf_negotiate_api(struct ixgbevf_adapter * adapter)2274*4882a593Smuzhiyun static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
2275*4882a593Smuzhiyun {
2276*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2277*4882a593Smuzhiyun 	static const int api[] = {
2278*4882a593Smuzhiyun 		ixgbe_mbox_api_14,
2279*4882a593Smuzhiyun 		ixgbe_mbox_api_13,
2280*4882a593Smuzhiyun 		ixgbe_mbox_api_12,
2281*4882a593Smuzhiyun 		ixgbe_mbox_api_11,
2282*4882a593Smuzhiyun 		ixgbe_mbox_api_10,
2283*4882a593Smuzhiyun 		ixgbe_mbox_api_unknown
2284*4882a593Smuzhiyun 	};
2285*4882a593Smuzhiyun 	int err, idx = 0;
2286*4882a593Smuzhiyun 
2287*4882a593Smuzhiyun 	spin_lock_bh(&adapter->mbx_lock);
2288*4882a593Smuzhiyun 
2289*4882a593Smuzhiyun 	while (api[idx] != ixgbe_mbox_api_unknown) {
2290*4882a593Smuzhiyun 		err = hw->mac.ops.negotiate_api_version(hw, api[idx]);
2291*4882a593Smuzhiyun 		if (!err)
2292*4882a593Smuzhiyun 			break;
2293*4882a593Smuzhiyun 		idx++;
2294*4882a593Smuzhiyun 	}
2295*4882a593Smuzhiyun 
2296*4882a593Smuzhiyun 	spin_unlock_bh(&adapter->mbx_lock);
2297*4882a593Smuzhiyun }
2298*4882a593Smuzhiyun 
ixgbevf_up_complete(struct ixgbevf_adapter * adapter)2299*4882a593Smuzhiyun static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
2300*4882a593Smuzhiyun {
2301*4882a593Smuzhiyun 	struct net_device *netdev = adapter->netdev;
2302*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2303*4882a593Smuzhiyun 
2304*4882a593Smuzhiyun 	ixgbevf_configure_msix(adapter);
2305*4882a593Smuzhiyun 
2306*4882a593Smuzhiyun 	spin_lock_bh(&adapter->mbx_lock);
2307*4882a593Smuzhiyun 
2308*4882a593Smuzhiyun 	if (is_valid_ether_addr(hw->mac.addr))
2309*4882a593Smuzhiyun 		hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2310*4882a593Smuzhiyun 	else
2311*4882a593Smuzhiyun 		hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
2312*4882a593Smuzhiyun 
2313*4882a593Smuzhiyun 	spin_unlock_bh(&adapter->mbx_lock);
2314*4882a593Smuzhiyun 
2315*4882a593Smuzhiyun 	smp_mb__before_atomic();
2316*4882a593Smuzhiyun 	clear_bit(__IXGBEVF_DOWN, &adapter->state);
2317*4882a593Smuzhiyun 	ixgbevf_napi_enable_all(adapter);
2318*4882a593Smuzhiyun 
2319*4882a593Smuzhiyun 	/* clear any pending interrupts, may auto mask */
2320*4882a593Smuzhiyun 	IXGBE_READ_REG(hw, IXGBE_VTEICR);
2321*4882a593Smuzhiyun 	ixgbevf_irq_enable(adapter);
2322*4882a593Smuzhiyun 
2323*4882a593Smuzhiyun 	/* enable transmits */
2324*4882a593Smuzhiyun 	netif_tx_start_all_queues(netdev);
2325*4882a593Smuzhiyun 
2326*4882a593Smuzhiyun 	ixgbevf_save_reset_stats(adapter);
2327*4882a593Smuzhiyun 	ixgbevf_init_last_counter_stats(adapter);
2328*4882a593Smuzhiyun 
2329*4882a593Smuzhiyun 	hw->mac.get_link_status = 1;
2330*4882a593Smuzhiyun 	mod_timer(&adapter->service_timer, jiffies);
2331*4882a593Smuzhiyun }
2332*4882a593Smuzhiyun 
ixgbevf_up(struct ixgbevf_adapter * adapter)2333*4882a593Smuzhiyun void ixgbevf_up(struct ixgbevf_adapter *adapter)
2334*4882a593Smuzhiyun {
2335*4882a593Smuzhiyun 	ixgbevf_configure(adapter);
2336*4882a593Smuzhiyun 
2337*4882a593Smuzhiyun 	ixgbevf_up_complete(adapter);
2338*4882a593Smuzhiyun }
2339*4882a593Smuzhiyun 
2340*4882a593Smuzhiyun /**
2341*4882a593Smuzhiyun  * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
2342*4882a593Smuzhiyun  * @rx_ring: ring to free buffers from
2343*4882a593Smuzhiyun  **/
ixgbevf_clean_rx_ring(struct ixgbevf_ring * rx_ring)2344*4882a593Smuzhiyun static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
2345*4882a593Smuzhiyun {
2346*4882a593Smuzhiyun 	u16 i = rx_ring->next_to_clean;
2347*4882a593Smuzhiyun 
2348*4882a593Smuzhiyun 	/* Free Rx ring sk_buff */
2349*4882a593Smuzhiyun 	if (rx_ring->skb) {
2350*4882a593Smuzhiyun 		dev_kfree_skb(rx_ring->skb);
2351*4882a593Smuzhiyun 		rx_ring->skb = NULL;
2352*4882a593Smuzhiyun 	}
2353*4882a593Smuzhiyun 
2354*4882a593Smuzhiyun 	/* Free all the Rx ring pages */
2355*4882a593Smuzhiyun 	while (i != rx_ring->next_to_alloc) {
2356*4882a593Smuzhiyun 		struct ixgbevf_rx_buffer *rx_buffer;
2357*4882a593Smuzhiyun 
2358*4882a593Smuzhiyun 		rx_buffer = &rx_ring->rx_buffer_info[i];
2359*4882a593Smuzhiyun 
2360*4882a593Smuzhiyun 		/* Invalidate cache lines that may have been written to by
2361*4882a593Smuzhiyun 		 * device so that we avoid corrupting memory.
2362*4882a593Smuzhiyun 		 */
2363*4882a593Smuzhiyun 		dma_sync_single_range_for_cpu(rx_ring->dev,
2364*4882a593Smuzhiyun 					      rx_buffer->dma,
2365*4882a593Smuzhiyun 					      rx_buffer->page_offset,
2366*4882a593Smuzhiyun 					      ixgbevf_rx_bufsz(rx_ring),
2367*4882a593Smuzhiyun 					      DMA_FROM_DEVICE);
2368*4882a593Smuzhiyun 
2369*4882a593Smuzhiyun 		/* free resources associated with mapping */
2370*4882a593Smuzhiyun 		dma_unmap_page_attrs(rx_ring->dev,
2371*4882a593Smuzhiyun 				     rx_buffer->dma,
2372*4882a593Smuzhiyun 				     ixgbevf_rx_pg_size(rx_ring),
2373*4882a593Smuzhiyun 				     DMA_FROM_DEVICE,
2374*4882a593Smuzhiyun 				     IXGBEVF_RX_DMA_ATTR);
2375*4882a593Smuzhiyun 
2376*4882a593Smuzhiyun 		__page_frag_cache_drain(rx_buffer->page,
2377*4882a593Smuzhiyun 					rx_buffer->pagecnt_bias);
2378*4882a593Smuzhiyun 
2379*4882a593Smuzhiyun 		i++;
2380*4882a593Smuzhiyun 		if (i == rx_ring->count)
2381*4882a593Smuzhiyun 			i = 0;
2382*4882a593Smuzhiyun 	}
2383*4882a593Smuzhiyun 
2384*4882a593Smuzhiyun 	rx_ring->next_to_alloc = 0;
2385*4882a593Smuzhiyun 	rx_ring->next_to_clean = 0;
2386*4882a593Smuzhiyun 	rx_ring->next_to_use = 0;
2387*4882a593Smuzhiyun }
2388*4882a593Smuzhiyun 
2389*4882a593Smuzhiyun /**
2390*4882a593Smuzhiyun  * ixgbevf_clean_tx_ring - Free Tx Buffers
2391*4882a593Smuzhiyun  * @tx_ring: ring to be cleaned
2392*4882a593Smuzhiyun  **/
ixgbevf_clean_tx_ring(struct ixgbevf_ring * tx_ring)2393*4882a593Smuzhiyun static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
2394*4882a593Smuzhiyun {
2395*4882a593Smuzhiyun 	u16 i = tx_ring->next_to_clean;
2396*4882a593Smuzhiyun 	struct ixgbevf_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
2397*4882a593Smuzhiyun 
2398*4882a593Smuzhiyun 	while (i != tx_ring->next_to_use) {
2399*4882a593Smuzhiyun 		union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
2400*4882a593Smuzhiyun 
2401*4882a593Smuzhiyun 		/* Free all the Tx ring sk_buffs */
2402*4882a593Smuzhiyun 		if (ring_is_xdp(tx_ring))
2403*4882a593Smuzhiyun 			page_frag_free(tx_buffer->data);
2404*4882a593Smuzhiyun 		else
2405*4882a593Smuzhiyun 			dev_kfree_skb_any(tx_buffer->skb);
2406*4882a593Smuzhiyun 
2407*4882a593Smuzhiyun 		/* unmap skb header data */
2408*4882a593Smuzhiyun 		dma_unmap_single(tx_ring->dev,
2409*4882a593Smuzhiyun 				 dma_unmap_addr(tx_buffer, dma),
2410*4882a593Smuzhiyun 				 dma_unmap_len(tx_buffer, len),
2411*4882a593Smuzhiyun 				 DMA_TO_DEVICE);
2412*4882a593Smuzhiyun 
2413*4882a593Smuzhiyun 		/* check for eop_desc to determine the end of the packet */
2414*4882a593Smuzhiyun 		eop_desc = tx_buffer->next_to_watch;
2415*4882a593Smuzhiyun 		tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
2416*4882a593Smuzhiyun 
2417*4882a593Smuzhiyun 		/* unmap remaining buffers */
2418*4882a593Smuzhiyun 		while (tx_desc != eop_desc) {
2419*4882a593Smuzhiyun 			tx_buffer++;
2420*4882a593Smuzhiyun 			tx_desc++;
2421*4882a593Smuzhiyun 			i++;
2422*4882a593Smuzhiyun 			if (unlikely(i == tx_ring->count)) {
2423*4882a593Smuzhiyun 				i = 0;
2424*4882a593Smuzhiyun 				tx_buffer = tx_ring->tx_buffer_info;
2425*4882a593Smuzhiyun 				tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
2426*4882a593Smuzhiyun 			}
2427*4882a593Smuzhiyun 
2428*4882a593Smuzhiyun 			/* unmap any remaining paged data */
2429*4882a593Smuzhiyun 			if (dma_unmap_len(tx_buffer, len))
2430*4882a593Smuzhiyun 				dma_unmap_page(tx_ring->dev,
2431*4882a593Smuzhiyun 					       dma_unmap_addr(tx_buffer, dma),
2432*4882a593Smuzhiyun 					       dma_unmap_len(tx_buffer, len),
2433*4882a593Smuzhiyun 					       DMA_TO_DEVICE);
2434*4882a593Smuzhiyun 		}
2435*4882a593Smuzhiyun 
2436*4882a593Smuzhiyun 		/* move us one more past the eop_desc for start of next pkt */
2437*4882a593Smuzhiyun 		tx_buffer++;
2438*4882a593Smuzhiyun 		i++;
2439*4882a593Smuzhiyun 		if (unlikely(i == tx_ring->count)) {
2440*4882a593Smuzhiyun 			i = 0;
2441*4882a593Smuzhiyun 			tx_buffer = tx_ring->tx_buffer_info;
2442*4882a593Smuzhiyun 		}
2443*4882a593Smuzhiyun 	}
2444*4882a593Smuzhiyun 
2445*4882a593Smuzhiyun 	/* reset next_to_use and next_to_clean */
2446*4882a593Smuzhiyun 	tx_ring->next_to_use = 0;
2447*4882a593Smuzhiyun 	tx_ring->next_to_clean = 0;
2448*4882a593Smuzhiyun 
2449*4882a593Smuzhiyun }
2450*4882a593Smuzhiyun 
2451*4882a593Smuzhiyun /**
2452*4882a593Smuzhiyun  * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
2453*4882a593Smuzhiyun  * @adapter: board private structure
2454*4882a593Smuzhiyun  **/
ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter * adapter)2455*4882a593Smuzhiyun static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2456*4882a593Smuzhiyun {
2457*4882a593Smuzhiyun 	int i;
2458*4882a593Smuzhiyun 
2459*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_rx_queues; i++)
2460*4882a593Smuzhiyun 		ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
2461*4882a593Smuzhiyun }
2462*4882a593Smuzhiyun 
2463*4882a593Smuzhiyun /**
2464*4882a593Smuzhiyun  * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
2465*4882a593Smuzhiyun  * @adapter: board private structure
2466*4882a593Smuzhiyun  **/
ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter * adapter)2467*4882a593Smuzhiyun static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2468*4882a593Smuzhiyun {
2469*4882a593Smuzhiyun 	int i;
2470*4882a593Smuzhiyun 
2471*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_tx_queues; i++)
2472*4882a593Smuzhiyun 		ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
2473*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_xdp_queues; i++)
2474*4882a593Smuzhiyun 		ixgbevf_clean_tx_ring(adapter->xdp_ring[i]);
2475*4882a593Smuzhiyun }
2476*4882a593Smuzhiyun 
ixgbevf_down(struct ixgbevf_adapter * adapter)2477*4882a593Smuzhiyun void ixgbevf_down(struct ixgbevf_adapter *adapter)
2478*4882a593Smuzhiyun {
2479*4882a593Smuzhiyun 	struct net_device *netdev = adapter->netdev;
2480*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2481*4882a593Smuzhiyun 	int i;
2482*4882a593Smuzhiyun 
2483*4882a593Smuzhiyun 	/* signal that we are down to the interrupt handler */
2484*4882a593Smuzhiyun 	if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2485*4882a593Smuzhiyun 		return; /* do nothing if already down */
2486*4882a593Smuzhiyun 
2487*4882a593Smuzhiyun 	/* disable all enabled Rx queues */
2488*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_rx_queues; i++)
2489*4882a593Smuzhiyun 		ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
2490*4882a593Smuzhiyun 
2491*4882a593Smuzhiyun 	usleep_range(10000, 20000);
2492*4882a593Smuzhiyun 
2493*4882a593Smuzhiyun 	netif_tx_stop_all_queues(netdev);
2494*4882a593Smuzhiyun 
2495*4882a593Smuzhiyun 	/* call carrier off first to avoid false dev_watchdog timeouts */
2496*4882a593Smuzhiyun 	netif_carrier_off(netdev);
2497*4882a593Smuzhiyun 	netif_tx_disable(netdev);
2498*4882a593Smuzhiyun 
2499*4882a593Smuzhiyun 	ixgbevf_irq_disable(adapter);
2500*4882a593Smuzhiyun 
2501*4882a593Smuzhiyun 	ixgbevf_napi_disable_all(adapter);
2502*4882a593Smuzhiyun 
2503*4882a593Smuzhiyun 	del_timer_sync(&adapter->service_timer);
2504*4882a593Smuzhiyun 
2505*4882a593Smuzhiyun 	/* disable transmits in the hardware now that interrupts are off */
2506*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_tx_queues; i++) {
2507*4882a593Smuzhiyun 		u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2508*4882a593Smuzhiyun 
2509*4882a593Smuzhiyun 		IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2510*4882a593Smuzhiyun 				IXGBE_TXDCTL_SWFLSH);
2511*4882a593Smuzhiyun 	}
2512*4882a593Smuzhiyun 
2513*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_xdp_queues; i++) {
2514*4882a593Smuzhiyun 		u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
2515*4882a593Smuzhiyun 
2516*4882a593Smuzhiyun 		IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2517*4882a593Smuzhiyun 				IXGBE_TXDCTL_SWFLSH);
2518*4882a593Smuzhiyun 	}
2519*4882a593Smuzhiyun 
2520*4882a593Smuzhiyun 	if (!pci_channel_offline(adapter->pdev))
2521*4882a593Smuzhiyun 		ixgbevf_reset(adapter);
2522*4882a593Smuzhiyun 
2523*4882a593Smuzhiyun 	ixgbevf_clean_all_tx_rings(adapter);
2524*4882a593Smuzhiyun 	ixgbevf_clean_all_rx_rings(adapter);
2525*4882a593Smuzhiyun }
2526*4882a593Smuzhiyun 
ixgbevf_reinit_locked(struct ixgbevf_adapter * adapter)2527*4882a593Smuzhiyun void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2528*4882a593Smuzhiyun {
2529*4882a593Smuzhiyun 	while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2530*4882a593Smuzhiyun 		msleep(1);
2531*4882a593Smuzhiyun 
2532*4882a593Smuzhiyun 	ixgbevf_down(adapter);
2533*4882a593Smuzhiyun 	pci_set_master(adapter->pdev);
2534*4882a593Smuzhiyun 	ixgbevf_up(adapter);
2535*4882a593Smuzhiyun 
2536*4882a593Smuzhiyun 	clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2537*4882a593Smuzhiyun }
2538*4882a593Smuzhiyun 
ixgbevf_reset(struct ixgbevf_adapter * adapter)2539*4882a593Smuzhiyun void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2540*4882a593Smuzhiyun {
2541*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2542*4882a593Smuzhiyun 	struct net_device *netdev = adapter->netdev;
2543*4882a593Smuzhiyun 
2544*4882a593Smuzhiyun 	if (hw->mac.ops.reset_hw(hw)) {
2545*4882a593Smuzhiyun 		hw_dbg(hw, "PF still resetting\n");
2546*4882a593Smuzhiyun 	} else {
2547*4882a593Smuzhiyun 		hw->mac.ops.init_hw(hw);
2548*4882a593Smuzhiyun 		ixgbevf_negotiate_api(adapter);
2549*4882a593Smuzhiyun 	}
2550*4882a593Smuzhiyun 
2551*4882a593Smuzhiyun 	if (is_valid_ether_addr(adapter->hw.mac.addr)) {
2552*4882a593Smuzhiyun 		ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
2553*4882a593Smuzhiyun 		ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
2554*4882a593Smuzhiyun 	}
2555*4882a593Smuzhiyun 
2556*4882a593Smuzhiyun 	adapter->last_reset = jiffies;
2557*4882a593Smuzhiyun }
2558*4882a593Smuzhiyun 
ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter * adapter,int vectors)2559*4882a593Smuzhiyun static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2560*4882a593Smuzhiyun 					int vectors)
2561*4882a593Smuzhiyun {
2562*4882a593Smuzhiyun 	int vector_threshold;
2563*4882a593Smuzhiyun 
2564*4882a593Smuzhiyun 	/* We'll want at least 2 (vector_threshold):
2565*4882a593Smuzhiyun 	 * 1) TxQ[0] + RxQ[0] handler
2566*4882a593Smuzhiyun 	 * 2) Other (Link Status Change, etc.)
2567*4882a593Smuzhiyun 	 */
2568*4882a593Smuzhiyun 	vector_threshold = MIN_MSIX_COUNT;
2569*4882a593Smuzhiyun 
2570*4882a593Smuzhiyun 	/* The more we get, the more we will assign to Tx/Rx Cleanup
2571*4882a593Smuzhiyun 	 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2572*4882a593Smuzhiyun 	 * Right now, we simply care about how many we'll get; we'll
2573*4882a593Smuzhiyun 	 * set them up later while requesting irq's.
2574*4882a593Smuzhiyun 	 */
2575*4882a593Smuzhiyun 	vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2576*4882a593Smuzhiyun 					vector_threshold, vectors);
2577*4882a593Smuzhiyun 
2578*4882a593Smuzhiyun 	if (vectors < 0) {
2579*4882a593Smuzhiyun 		dev_err(&adapter->pdev->dev,
2580*4882a593Smuzhiyun 			"Unable to allocate MSI-X interrupts\n");
2581*4882a593Smuzhiyun 		kfree(adapter->msix_entries);
2582*4882a593Smuzhiyun 		adapter->msix_entries = NULL;
2583*4882a593Smuzhiyun 		return vectors;
2584*4882a593Smuzhiyun 	}
2585*4882a593Smuzhiyun 
2586*4882a593Smuzhiyun 	/* Adjust for only the vectors we'll use, which is minimum
2587*4882a593Smuzhiyun 	 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2588*4882a593Smuzhiyun 	 * vectors we were allocated.
2589*4882a593Smuzhiyun 	 */
2590*4882a593Smuzhiyun 	adapter->num_msix_vectors = vectors;
2591*4882a593Smuzhiyun 
2592*4882a593Smuzhiyun 	return 0;
2593*4882a593Smuzhiyun }
2594*4882a593Smuzhiyun 
2595*4882a593Smuzhiyun /**
2596*4882a593Smuzhiyun  * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
2597*4882a593Smuzhiyun  * @adapter: board private structure to initialize
2598*4882a593Smuzhiyun  *
2599*4882a593Smuzhiyun  * This is the top level queue allocation routine.  The order here is very
2600*4882a593Smuzhiyun  * important, starting with the "most" number of features turned on at once,
2601*4882a593Smuzhiyun  * and ending with the smallest set of features.  This way large combinations
2602*4882a593Smuzhiyun  * can be allocated if they're turned on, and smaller combinations are the
2603*4882a593Smuzhiyun  * fall through conditions.
2604*4882a593Smuzhiyun  *
2605*4882a593Smuzhiyun  **/
ixgbevf_set_num_queues(struct ixgbevf_adapter * adapter)2606*4882a593Smuzhiyun static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2607*4882a593Smuzhiyun {
2608*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
2609*4882a593Smuzhiyun 	unsigned int def_q = 0;
2610*4882a593Smuzhiyun 	unsigned int num_tcs = 0;
2611*4882a593Smuzhiyun 	int err;
2612*4882a593Smuzhiyun 
2613*4882a593Smuzhiyun 	/* Start with base case */
2614*4882a593Smuzhiyun 	adapter->num_rx_queues = 1;
2615*4882a593Smuzhiyun 	adapter->num_tx_queues = 1;
2616*4882a593Smuzhiyun 	adapter->num_xdp_queues = 0;
2617*4882a593Smuzhiyun 
2618*4882a593Smuzhiyun 	spin_lock_bh(&adapter->mbx_lock);
2619*4882a593Smuzhiyun 
2620*4882a593Smuzhiyun 	/* fetch queue configuration from the PF */
2621*4882a593Smuzhiyun 	err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2622*4882a593Smuzhiyun 
2623*4882a593Smuzhiyun 	spin_unlock_bh(&adapter->mbx_lock);
2624*4882a593Smuzhiyun 
2625*4882a593Smuzhiyun 	if (err)
2626*4882a593Smuzhiyun 		return;
2627*4882a593Smuzhiyun 
2628*4882a593Smuzhiyun 	/* we need as many queues as traffic classes */
2629*4882a593Smuzhiyun 	if (num_tcs > 1) {
2630*4882a593Smuzhiyun 		adapter->num_rx_queues = num_tcs;
2631*4882a593Smuzhiyun 	} else {
2632*4882a593Smuzhiyun 		u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
2633*4882a593Smuzhiyun 
2634*4882a593Smuzhiyun 		switch (hw->api_version) {
2635*4882a593Smuzhiyun 		case ixgbe_mbox_api_11:
2636*4882a593Smuzhiyun 		case ixgbe_mbox_api_12:
2637*4882a593Smuzhiyun 		case ixgbe_mbox_api_13:
2638*4882a593Smuzhiyun 		case ixgbe_mbox_api_14:
2639*4882a593Smuzhiyun 			if (adapter->xdp_prog &&
2640*4882a593Smuzhiyun 			    hw->mac.max_tx_queues == rss)
2641*4882a593Smuzhiyun 				rss = rss > 3 ? 2 : 1;
2642*4882a593Smuzhiyun 
2643*4882a593Smuzhiyun 			adapter->num_rx_queues = rss;
2644*4882a593Smuzhiyun 			adapter->num_tx_queues = rss;
2645*4882a593Smuzhiyun 			adapter->num_xdp_queues = adapter->xdp_prog ? rss : 0;
2646*4882a593Smuzhiyun 		default:
2647*4882a593Smuzhiyun 			break;
2648*4882a593Smuzhiyun 		}
2649*4882a593Smuzhiyun 	}
2650*4882a593Smuzhiyun }
2651*4882a593Smuzhiyun 
2652*4882a593Smuzhiyun /**
2653*4882a593Smuzhiyun  * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2654*4882a593Smuzhiyun  * @adapter: board private structure to initialize
2655*4882a593Smuzhiyun  *
2656*4882a593Smuzhiyun  * Attempt to configure the interrupts using the best available
2657*4882a593Smuzhiyun  * capabilities of the hardware and the kernel.
2658*4882a593Smuzhiyun  **/
ixgbevf_set_interrupt_capability(struct ixgbevf_adapter * adapter)2659*4882a593Smuzhiyun static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2660*4882a593Smuzhiyun {
2661*4882a593Smuzhiyun 	int vector, v_budget;
2662*4882a593Smuzhiyun 
2663*4882a593Smuzhiyun 	/* It's easy to be greedy for MSI-X vectors, but it really
2664*4882a593Smuzhiyun 	 * doesn't do us much good if we have a lot more vectors
2665*4882a593Smuzhiyun 	 * than CPU's.  So let's be conservative and only ask for
2666*4882a593Smuzhiyun 	 * (roughly) the same number of vectors as there are CPU's.
2667*4882a593Smuzhiyun 	 * The default is to use pairs of vectors.
2668*4882a593Smuzhiyun 	 */
2669*4882a593Smuzhiyun 	v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2670*4882a593Smuzhiyun 	v_budget = min_t(int, v_budget, num_online_cpus());
2671*4882a593Smuzhiyun 	v_budget += NON_Q_VECTORS;
2672*4882a593Smuzhiyun 
2673*4882a593Smuzhiyun 	adapter->msix_entries = kcalloc(v_budget,
2674*4882a593Smuzhiyun 					sizeof(struct msix_entry), GFP_KERNEL);
2675*4882a593Smuzhiyun 	if (!adapter->msix_entries)
2676*4882a593Smuzhiyun 		return -ENOMEM;
2677*4882a593Smuzhiyun 
2678*4882a593Smuzhiyun 	for (vector = 0; vector < v_budget; vector++)
2679*4882a593Smuzhiyun 		adapter->msix_entries[vector].entry = vector;
2680*4882a593Smuzhiyun 
2681*4882a593Smuzhiyun 	/* A failure in MSI-X entry allocation isn't fatal, but the VF driver
2682*4882a593Smuzhiyun 	 * does not support any other modes, so we will simply fail here. Note
2683*4882a593Smuzhiyun 	 * that we clean up the msix_entries pointer else-where.
2684*4882a593Smuzhiyun 	 */
2685*4882a593Smuzhiyun 	return ixgbevf_acquire_msix_vectors(adapter, v_budget);
2686*4882a593Smuzhiyun }
2687*4882a593Smuzhiyun 
ixgbevf_add_ring(struct ixgbevf_ring * ring,struct ixgbevf_ring_container * head)2688*4882a593Smuzhiyun static void ixgbevf_add_ring(struct ixgbevf_ring *ring,
2689*4882a593Smuzhiyun 			     struct ixgbevf_ring_container *head)
2690*4882a593Smuzhiyun {
2691*4882a593Smuzhiyun 	ring->next = head->ring;
2692*4882a593Smuzhiyun 	head->ring = ring;
2693*4882a593Smuzhiyun 	head->count++;
2694*4882a593Smuzhiyun }
2695*4882a593Smuzhiyun 
2696*4882a593Smuzhiyun /**
2697*4882a593Smuzhiyun  * ixgbevf_alloc_q_vector - Allocate memory for a single interrupt vector
2698*4882a593Smuzhiyun  * @adapter: board private structure to initialize
2699*4882a593Smuzhiyun  * @v_idx: index of vector in adapter struct
2700*4882a593Smuzhiyun  * @txr_count: number of Tx rings for q vector
2701*4882a593Smuzhiyun  * @txr_idx: index of first Tx ring to assign
2702*4882a593Smuzhiyun  * @xdp_count: total number of XDP rings to allocate
2703*4882a593Smuzhiyun  * @xdp_idx: index of first XDP ring to allocate
2704*4882a593Smuzhiyun  * @rxr_count: number of Rx rings for q vector
2705*4882a593Smuzhiyun  * @rxr_idx: index of first Rx ring to assign
2706*4882a593Smuzhiyun  *
2707*4882a593Smuzhiyun  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
2708*4882a593Smuzhiyun  **/
ixgbevf_alloc_q_vector(struct ixgbevf_adapter * adapter,int v_idx,int txr_count,int txr_idx,int xdp_count,int xdp_idx,int rxr_count,int rxr_idx)2709*4882a593Smuzhiyun static int ixgbevf_alloc_q_vector(struct ixgbevf_adapter *adapter, int v_idx,
2710*4882a593Smuzhiyun 				  int txr_count, int txr_idx,
2711*4882a593Smuzhiyun 				  int xdp_count, int xdp_idx,
2712*4882a593Smuzhiyun 				  int rxr_count, int rxr_idx)
2713*4882a593Smuzhiyun {
2714*4882a593Smuzhiyun 	struct ixgbevf_q_vector *q_vector;
2715*4882a593Smuzhiyun 	int reg_idx = txr_idx + xdp_idx;
2716*4882a593Smuzhiyun 	struct ixgbevf_ring *ring;
2717*4882a593Smuzhiyun 	int ring_count, size;
2718*4882a593Smuzhiyun 
2719*4882a593Smuzhiyun 	ring_count = txr_count + xdp_count + rxr_count;
2720*4882a593Smuzhiyun 	size = sizeof(*q_vector) + (sizeof(*ring) * ring_count);
2721*4882a593Smuzhiyun 
2722*4882a593Smuzhiyun 	/* allocate q_vector and rings */
2723*4882a593Smuzhiyun 	q_vector = kzalloc(size, GFP_KERNEL);
2724*4882a593Smuzhiyun 	if (!q_vector)
2725*4882a593Smuzhiyun 		return -ENOMEM;
2726*4882a593Smuzhiyun 
2727*4882a593Smuzhiyun 	/* initialize NAPI */
2728*4882a593Smuzhiyun 	netif_napi_add(adapter->netdev, &q_vector->napi, ixgbevf_poll, 64);
2729*4882a593Smuzhiyun 
2730*4882a593Smuzhiyun 	/* tie q_vector and adapter together */
2731*4882a593Smuzhiyun 	adapter->q_vector[v_idx] = q_vector;
2732*4882a593Smuzhiyun 	q_vector->adapter = adapter;
2733*4882a593Smuzhiyun 	q_vector->v_idx = v_idx;
2734*4882a593Smuzhiyun 
2735*4882a593Smuzhiyun 	/* initialize pointer to rings */
2736*4882a593Smuzhiyun 	ring = q_vector->ring;
2737*4882a593Smuzhiyun 
2738*4882a593Smuzhiyun 	while (txr_count) {
2739*4882a593Smuzhiyun 		/* assign generic ring traits */
2740*4882a593Smuzhiyun 		ring->dev = &adapter->pdev->dev;
2741*4882a593Smuzhiyun 		ring->netdev = adapter->netdev;
2742*4882a593Smuzhiyun 
2743*4882a593Smuzhiyun 		/* configure backlink on ring */
2744*4882a593Smuzhiyun 		ring->q_vector = q_vector;
2745*4882a593Smuzhiyun 
2746*4882a593Smuzhiyun 		/* update q_vector Tx values */
2747*4882a593Smuzhiyun 		ixgbevf_add_ring(ring, &q_vector->tx);
2748*4882a593Smuzhiyun 
2749*4882a593Smuzhiyun 		/* apply Tx specific ring traits */
2750*4882a593Smuzhiyun 		ring->count = adapter->tx_ring_count;
2751*4882a593Smuzhiyun 		ring->queue_index = txr_idx;
2752*4882a593Smuzhiyun 		ring->reg_idx = reg_idx;
2753*4882a593Smuzhiyun 
2754*4882a593Smuzhiyun 		/* assign ring to adapter */
2755*4882a593Smuzhiyun 		 adapter->tx_ring[txr_idx] = ring;
2756*4882a593Smuzhiyun 
2757*4882a593Smuzhiyun 		/* update count and index */
2758*4882a593Smuzhiyun 		txr_count--;
2759*4882a593Smuzhiyun 		txr_idx++;
2760*4882a593Smuzhiyun 		reg_idx++;
2761*4882a593Smuzhiyun 
2762*4882a593Smuzhiyun 		/* push pointer to next ring */
2763*4882a593Smuzhiyun 		ring++;
2764*4882a593Smuzhiyun 	}
2765*4882a593Smuzhiyun 
2766*4882a593Smuzhiyun 	while (xdp_count) {
2767*4882a593Smuzhiyun 		/* assign generic ring traits */
2768*4882a593Smuzhiyun 		ring->dev = &adapter->pdev->dev;
2769*4882a593Smuzhiyun 		ring->netdev = adapter->netdev;
2770*4882a593Smuzhiyun 
2771*4882a593Smuzhiyun 		/* configure backlink on ring */
2772*4882a593Smuzhiyun 		ring->q_vector = q_vector;
2773*4882a593Smuzhiyun 
2774*4882a593Smuzhiyun 		/* update q_vector Tx values */
2775*4882a593Smuzhiyun 		ixgbevf_add_ring(ring, &q_vector->tx);
2776*4882a593Smuzhiyun 
2777*4882a593Smuzhiyun 		/* apply Tx specific ring traits */
2778*4882a593Smuzhiyun 		ring->count = adapter->tx_ring_count;
2779*4882a593Smuzhiyun 		ring->queue_index = xdp_idx;
2780*4882a593Smuzhiyun 		ring->reg_idx = reg_idx;
2781*4882a593Smuzhiyun 		set_ring_xdp(ring);
2782*4882a593Smuzhiyun 
2783*4882a593Smuzhiyun 		/* assign ring to adapter */
2784*4882a593Smuzhiyun 		adapter->xdp_ring[xdp_idx] = ring;
2785*4882a593Smuzhiyun 
2786*4882a593Smuzhiyun 		/* update count and index */
2787*4882a593Smuzhiyun 		xdp_count--;
2788*4882a593Smuzhiyun 		xdp_idx++;
2789*4882a593Smuzhiyun 		reg_idx++;
2790*4882a593Smuzhiyun 
2791*4882a593Smuzhiyun 		/* push pointer to next ring */
2792*4882a593Smuzhiyun 		ring++;
2793*4882a593Smuzhiyun 	}
2794*4882a593Smuzhiyun 
2795*4882a593Smuzhiyun 	while (rxr_count) {
2796*4882a593Smuzhiyun 		/* assign generic ring traits */
2797*4882a593Smuzhiyun 		ring->dev = &adapter->pdev->dev;
2798*4882a593Smuzhiyun 		ring->netdev = adapter->netdev;
2799*4882a593Smuzhiyun 
2800*4882a593Smuzhiyun 		/* configure backlink on ring */
2801*4882a593Smuzhiyun 		ring->q_vector = q_vector;
2802*4882a593Smuzhiyun 
2803*4882a593Smuzhiyun 		/* update q_vector Rx values */
2804*4882a593Smuzhiyun 		ixgbevf_add_ring(ring, &q_vector->rx);
2805*4882a593Smuzhiyun 
2806*4882a593Smuzhiyun 		/* apply Rx specific ring traits */
2807*4882a593Smuzhiyun 		ring->count = adapter->rx_ring_count;
2808*4882a593Smuzhiyun 		ring->queue_index = rxr_idx;
2809*4882a593Smuzhiyun 		ring->reg_idx = rxr_idx;
2810*4882a593Smuzhiyun 
2811*4882a593Smuzhiyun 		/* assign ring to adapter */
2812*4882a593Smuzhiyun 		adapter->rx_ring[rxr_idx] = ring;
2813*4882a593Smuzhiyun 
2814*4882a593Smuzhiyun 		/* update count and index */
2815*4882a593Smuzhiyun 		rxr_count--;
2816*4882a593Smuzhiyun 		rxr_idx++;
2817*4882a593Smuzhiyun 
2818*4882a593Smuzhiyun 		/* push pointer to next ring */
2819*4882a593Smuzhiyun 		ring++;
2820*4882a593Smuzhiyun 	}
2821*4882a593Smuzhiyun 
2822*4882a593Smuzhiyun 	return 0;
2823*4882a593Smuzhiyun }
2824*4882a593Smuzhiyun 
2825*4882a593Smuzhiyun /**
2826*4882a593Smuzhiyun  * ixgbevf_free_q_vector - Free memory allocated for specific interrupt vector
2827*4882a593Smuzhiyun  * @adapter: board private structure to initialize
2828*4882a593Smuzhiyun  * @v_idx: index of vector in adapter struct
2829*4882a593Smuzhiyun  *
2830*4882a593Smuzhiyun  * This function frees the memory allocated to the q_vector.  In addition if
2831*4882a593Smuzhiyun  * NAPI is enabled it will delete any references to the NAPI struct prior
2832*4882a593Smuzhiyun  * to freeing the q_vector.
2833*4882a593Smuzhiyun  **/
ixgbevf_free_q_vector(struct ixgbevf_adapter * adapter,int v_idx)2834*4882a593Smuzhiyun static void ixgbevf_free_q_vector(struct ixgbevf_adapter *adapter, int v_idx)
2835*4882a593Smuzhiyun {
2836*4882a593Smuzhiyun 	struct ixgbevf_q_vector *q_vector = adapter->q_vector[v_idx];
2837*4882a593Smuzhiyun 	struct ixgbevf_ring *ring;
2838*4882a593Smuzhiyun 
2839*4882a593Smuzhiyun 	ixgbevf_for_each_ring(ring, q_vector->tx) {
2840*4882a593Smuzhiyun 		if (ring_is_xdp(ring))
2841*4882a593Smuzhiyun 			adapter->xdp_ring[ring->queue_index] = NULL;
2842*4882a593Smuzhiyun 		else
2843*4882a593Smuzhiyun 			adapter->tx_ring[ring->queue_index] = NULL;
2844*4882a593Smuzhiyun 	}
2845*4882a593Smuzhiyun 
2846*4882a593Smuzhiyun 	ixgbevf_for_each_ring(ring, q_vector->rx)
2847*4882a593Smuzhiyun 		adapter->rx_ring[ring->queue_index] = NULL;
2848*4882a593Smuzhiyun 
2849*4882a593Smuzhiyun 	adapter->q_vector[v_idx] = NULL;
2850*4882a593Smuzhiyun 	netif_napi_del(&q_vector->napi);
2851*4882a593Smuzhiyun 
2852*4882a593Smuzhiyun 	/* ixgbevf_get_stats() might access the rings on this vector,
2853*4882a593Smuzhiyun 	 * we must wait a grace period before freeing it.
2854*4882a593Smuzhiyun 	 */
2855*4882a593Smuzhiyun 	kfree_rcu(q_vector, rcu);
2856*4882a593Smuzhiyun }
2857*4882a593Smuzhiyun 
2858*4882a593Smuzhiyun /**
2859*4882a593Smuzhiyun  * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2860*4882a593Smuzhiyun  * @adapter: board private structure to initialize
2861*4882a593Smuzhiyun  *
2862*4882a593Smuzhiyun  * We allocate one q_vector per queue interrupt.  If allocation fails we
2863*4882a593Smuzhiyun  * return -ENOMEM.
2864*4882a593Smuzhiyun  **/
ixgbevf_alloc_q_vectors(struct ixgbevf_adapter * adapter)2865*4882a593Smuzhiyun static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2866*4882a593Smuzhiyun {
2867*4882a593Smuzhiyun 	int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2868*4882a593Smuzhiyun 	int rxr_remaining = adapter->num_rx_queues;
2869*4882a593Smuzhiyun 	int txr_remaining = adapter->num_tx_queues;
2870*4882a593Smuzhiyun 	int xdp_remaining = adapter->num_xdp_queues;
2871*4882a593Smuzhiyun 	int rxr_idx = 0, txr_idx = 0, xdp_idx = 0, v_idx = 0;
2872*4882a593Smuzhiyun 	int err;
2873*4882a593Smuzhiyun 
2874*4882a593Smuzhiyun 	if (q_vectors >= (rxr_remaining + txr_remaining + xdp_remaining)) {
2875*4882a593Smuzhiyun 		for (; rxr_remaining; v_idx++, q_vectors--) {
2876*4882a593Smuzhiyun 			int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
2877*4882a593Smuzhiyun 
2878*4882a593Smuzhiyun 			err = ixgbevf_alloc_q_vector(adapter, v_idx,
2879*4882a593Smuzhiyun 						     0, 0, 0, 0, rqpv, rxr_idx);
2880*4882a593Smuzhiyun 			if (err)
2881*4882a593Smuzhiyun 				goto err_out;
2882*4882a593Smuzhiyun 
2883*4882a593Smuzhiyun 			/* update counts and index */
2884*4882a593Smuzhiyun 			rxr_remaining -= rqpv;
2885*4882a593Smuzhiyun 			rxr_idx += rqpv;
2886*4882a593Smuzhiyun 		}
2887*4882a593Smuzhiyun 	}
2888*4882a593Smuzhiyun 
2889*4882a593Smuzhiyun 	for (; q_vectors; v_idx++, q_vectors--) {
2890*4882a593Smuzhiyun 		int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
2891*4882a593Smuzhiyun 		int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors);
2892*4882a593Smuzhiyun 		int xqpv = DIV_ROUND_UP(xdp_remaining, q_vectors);
2893*4882a593Smuzhiyun 
2894*4882a593Smuzhiyun 		err = ixgbevf_alloc_q_vector(adapter, v_idx,
2895*4882a593Smuzhiyun 					     tqpv, txr_idx,
2896*4882a593Smuzhiyun 					     xqpv, xdp_idx,
2897*4882a593Smuzhiyun 					     rqpv, rxr_idx);
2898*4882a593Smuzhiyun 
2899*4882a593Smuzhiyun 		if (err)
2900*4882a593Smuzhiyun 			goto err_out;
2901*4882a593Smuzhiyun 
2902*4882a593Smuzhiyun 		/* update counts and index */
2903*4882a593Smuzhiyun 		rxr_remaining -= rqpv;
2904*4882a593Smuzhiyun 		rxr_idx += rqpv;
2905*4882a593Smuzhiyun 		txr_remaining -= tqpv;
2906*4882a593Smuzhiyun 		txr_idx += tqpv;
2907*4882a593Smuzhiyun 		xdp_remaining -= xqpv;
2908*4882a593Smuzhiyun 		xdp_idx += xqpv;
2909*4882a593Smuzhiyun 	}
2910*4882a593Smuzhiyun 
2911*4882a593Smuzhiyun 	return 0;
2912*4882a593Smuzhiyun 
2913*4882a593Smuzhiyun err_out:
2914*4882a593Smuzhiyun 	while (v_idx) {
2915*4882a593Smuzhiyun 		v_idx--;
2916*4882a593Smuzhiyun 		ixgbevf_free_q_vector(adapter, v_idx);
2917*4882a593Smuzhiyun 	}
2918*4882a593Smuzhiyun 
2919*4882a593Smuzhiyun 	return -ENOMEM;
2920*4882a593Smuzhiyun }
2921*4882a593Smuzhiyun 
2922*4882a593Smuzhiyun /**
2923*4882a593Smuzhiyun  * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2924*4882a593Smuzhiyun  * @adapter: board private structure to initialize
2925*4882a593Smuzhiyun  *
2926*4882a593Smuzhiyun  * This function frees the memory allocated to the q_vectors.  In addition if
2927*4882a593Smuzhiyun  * NAPI is enabled it will delete any references to the NAPI struct prior
2928*4882a593Smuzhiyun  * to freeing the q_vector.
2929*4882a593Smuzhiyun  **/
ixgbevf_free_q_vectors(struct ixgbevf_adapter * adapter)2930*4882a593Smuzhiyun static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2931*4882a593Smuzhiyun {
2932*4882a593Smuzhiyun 	int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2933*4882a593Smuzhiyun 
2934*4882a593Smuzhiyun 	while (q_vectors) {
2935*4882a593Smuzhiyun 		q_vectors--;
2936*4882a593Smuzhiyun 		ixgbevf_free_q_vector(adapter, q_vectors);
2937*4882a593Smuzhiyun 	}
2938*4882a593Smuzhiyun }
2939*4882a593Smuzhiyun 
2940*4882a593Smuzhiyun /**
2941*4882a593Smuzhiyun  * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2942*4882a593Smuzhiyun  * @adapter: board private structure
2943*4882a593Smuzhiyun  *
2944*4882a593Smuzhiyun  **/
ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter * adapter)2945*4882a593Smuzhiyun static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2946*4882a593Smuzhiyun {
2947*4882a593Smuzhiyun 	if (!adapter->msix_entries)
2948*4882a593Smuzhiyun 		return;
2949*4882a593Smuzhiyun 
2950*4882a593Smuzhiyun 	pci_disable_msix(adapter->pdev);
2951*4882a593Smuzhiyun 	kfree(adapter->msix_entries);
2952*4882a593Smuzhiyun 	adapter->msix_entries = NULL;
2953*4882a593Smuzhiyun }
2954*4882a593Smuzhiyun 
2955*4882a593Smuzhiyun /**
2956*4882a593Smuzhiyun  * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2957*4882a593Smuzhiyun  * @adapter: board private structure to initialize
2958*4882a593Smuzhiyun  *
2959*4882a593Smuzhiyun  **/
ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter * adapter)2960*4882a593Smuzhiyun static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2961*4882a593Smuzhiyun {
2962*4882a593Smuzhiyun 	int err;
2963*4882a593Smuzhiyun 
2964*4882a593Smuzhiyun 	/* Number of supported queues */
2965*4882a593Smuzhiyun 	ixgbevf_set_num_queues(adapter);
2966*4882a593Smuzhiyun 
2967*4882a593Smuzhiyun 	err = ixgbevf_set_interrupt_capability(adapter);
2968*4882a593Smuzhiyun 	if (err) {
2969*4882a593Smuzhiyun 		hw_dbg(&adapter->hw,
2970*4882a593Smuzhiyun 		       "Unable to setup interrupt capabilities\n");
2971*4882a593Smuzhiyun 		goto err_set_interrupt;
2972*4882a593Smuzhiyun 	}
2973*4882a593Smuzhiyun 
2974*4882a593Smuzhiyun 	err = ixgbevf_alloc_q_vectors(adapter);
2975*4882a593Smuzhiyun 	if (err) {
2976*4882a593Smuzhiyun 		hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
2977*4882a593Smuzhiyun 		goto err_alloc_q_vectors;
2978*4882a593Smuzhiyun 	}
2979*4882a593Smuzhiyun 
2980*4882a593Smuzhiyun 	hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u XDP Queue count %u\n",
2981*4882a593Smuzhiyun 	       (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled",
2982*4882a593Smuzhiyun 	       adapter->num_rx_queues, adapter->num_tx_queues,
2983*4882a593Smuzhiyun 	       adapter->num_xdp_queues);
2984*4882a593Smuzhiyun 
2985*4882a593Smuzhiyun 	set_bit(__IXGBEVF_DOWN, &adapter->state);
2986*4882a593Smuzhiyun 
2987*4882a593Smuzhiyun 	return 0;
2988*4882a593Smuzhiyun err_alloc_q_vectors:
2989*4882a593Smuzhiyun 	ixgbevf_reset_interrupt_capability(adapter);
2990*4882a593Smuzhiyun err_set_interrupt:
2991*4882a593Smuzhiyun 	return err;
2992*4882a593Smuzhiyun }
2993*4882a593Smuzhiyun 
2994*4882a593Smuzhiyun /**
2995*4882a593Smuzhiyun  * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2996*4882a593Smuzhiyun  * @adapter: board private structure to clear interrupt scheme on
2997*4882a593Smuzhiyun  *
2998*4882a593Smuzhiyun  * We go through and clear interrupt specific resources and reset the structure
2999*4882a593Smuzhiyun  * to pre-load conditions
3000*4882a593Smuzhiyun  **/
ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter * adapter)3001*4882a593Smuzhiyun static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
3002*4882a593Smuzhiyun {
3003*4882a593Smuzhiyun 	adapter->num_tx_queues = 0;
3004*4882a593Smuzhiyun 	adapter->num_xdp_queues = 0;
3005*4882a593Smuzhiyun 	adapter->num_rx_queues = 0;
3006*4882a593Smuzhiyun 
3007*4882a593Smuzhiyun 	ixgbevf_free_q_vectors(adapter);
3008*4882a593Smuzhiyun 	ixgbevf_reset_interrupt_capability(adapter);
3009*4882a593Smuzhiyun }
3010*4882a593Smuzhiyun 
3011*4882a593Smuzhiyun /**
3012*4882a593Smuzhiyun  * ixgbevf_sw_init - Initialize general software structures
3013*4882a593Smuzhiyun  * @adapter: board private structure to initialize
3014*4882a593Smuzhiyun  *
3015*4882a593Smuzhiyun  * ixgbevf_sw_init initializes the Adapter private data structure.
3016*4882a593Smuzhiyun  * Fields are initialized based on PCI device information and
3017*4882a593Smuzhiyun  * OS network device settings (MTU size).
3018*4882a593Smuzhiyun  **/
ixgbevf_sw_init(struct ixgbevf_adapter * adapter)3019*4882a593Smuzhiyun static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
3020*4882a593Smuzhiyun {
3021*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
3022*4882a593Smuzhiyun 	struct pci_dev *pdev = adapter->pdev;
3023*4882a593Smuzhiyun 	struct net_device *netdev = adapter->netdev;
3024*4882a593Smuzhiyun 	int err;
3025*4882a593Smuzhiyun 
3026*4882a593Smuzhiyun 	/* PCI config space info */
3027*4882a593Smuzhiyun 	hw->vendor_id = pdev->vendor;
3028*4882a593Smuzhiyun 	hw->device_id = pdev->device;
3029*4882a593Smuzhiyun 	hw->revision_id = pdev->revision;
3030*4882a593Smuzhiyun 	hw->subsystem_vendor_id = pdev->subsystem_vendor;
3031*4882a593Smuzhiyun 	hw->subsystem_device_id = pdev->subsystem_device;
3032*4882a593Smuzhiyun 
3033*4882a593Smuzhiyun 	hw->mbx.ops.init_params(hw);
3034*4882a593Smuzhiyun 
3035*4882a593Smuzhiyun 	if (hw->mac.type >= ixgbe_mac_X550_vf) {
3036*4882a593Smuzhiyun 		err = ixgbevf_init_rss_key(adapter);
3037*4882a593Smuzhiyun 		if (err)
3038*4882a593Smuzhiyun 			goto out;
3039*4882a593Smuzhiyun 	}
3040*4882a593Smuzhiyun 
3041*4882a593Smuzhiyun 	/* assume legacy case in which PF would only give VF 2 queues */
3042*4882a593Smuzhiyun 	hw->mac.max_tx_queues = 2;
3043*4882a593Smuzhiyun 	hw->mac.max_rx_queues = 2;
3044*4882a593Smuzhiyun 
3045*4882a593Smuzhiyun 	/* lock to protect mailbox accesses */
3046*4882a593Smuzhiyun 	spin_lock_init(&adapter->mbx_lock);
3047*4882a593Smuzhiyun 
3048*4882a593Smuzhiyun 	err = hw->mac.ops.reset_hw(hw);
3049*4882a593Smuzhiyun 	if (err) {
3050*4882a593Smuzhiyun 		dev_info(&pdev->dev,
3051*4882a593Smuzhiyun 			 "PF still in reset state.  Is the PF interface up?\n");
3052*4882a593Smuzhiyun 	} else {
3053*4882a593Smuzhiyun 		err = hw->mac.ops.init_hw(hw);
3054*4882a593Smuzhiyun 		if (err) {
3055*4882a593Smuzhiyun 			pr_err("init_shared_code failed: %d\n", err);
3056*4882a593Smuzhiyun 			goto out;
3057*4882a593Smuzhiyun 		}
3058*4882a593Smuzhiyun 		ixgbevf_negotiate_api(adapter);
3059*4882a593Smuzhiyun 		err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
3060*4882a593Smuzhiyun 		if (err)
3061*4882a593Smuzhiyun 			dev_info(&pdev->dev, "Error reading MAC address\n");
3062*4882a593Smuzhiyun 		else if (is_zero_ether_addr(adapter->hw.mac.addr))
3063*4882a593Smuzhiyun 			dev_info(&pdev->dev,
3064*4882a593Smuzhiyun 				 "MAC address not assigned by administrator.\n");
3065*4882a593Smuzhiyun 		ether_addr_copy(netdev->dev_addr, hw->mac.addr);
3066*4882a593Smuzhiyun 	}
3067*4882a593Smuzhiyun 
3068*4882a593Smuzhiyun 	if (!is_valid_ether_addr(netdev->dev_addr)) {
3069*4882a593Smuzhiyun 		dev_info(&pdev->dev, "Assigning random MAC address\n");
3070*4882a593Smuzhiyun 		eth_hw_addr_random(netdev);
3071*4882a593Smuzhiyun 		ether_addr_copy(hw->mac.addr, netdev->dev_addr);
3072*4882a593Smuzhiyun 		ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
3073*4882a593Smuzhiyun 	}
3074*4882a593Smuzhiyun 
3075*4882a593Smuzhiyun 	/* Enable dynamic interrupt throttling rates */
3076*4882a593Smuzhiyun 	adapter->rx_itr_setting = 1;
3077*4882a593Smuzhiyun 	adapter->tx_itr_setting = 1;
3078*4882a593Smuzhiyun 
3079*4882a593Smuzhiyun 	/* set default ring sizes */
3080*4882a593Smuzhiyun 	adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
3081*4882a593Smuzhiyun 	adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
3082*4882a593Smuzhiyun 
3083*4882a593Smuzhiyun 	set_bit(__IXGBEVF_DOWN, &adapter->state);
3084*4882a593Smuzhiyun 	return 0;
3085*4882a593Smuzhiyun 
3086*4882a593Smuzhiyun out:
3087*4882a593Smuzhiyun 	return err;
3088*4882a593Smuzhiyun }
3089*4882a593Smuzhiyun 
3090*4882a593Smuzhiyun #define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter)	\
3091*4882a593Smuzhiyun 	{							\
3092*4882a593Smuzhiyun 		u32 current_counter = IXGBE_READ_REG(hw, reg);	\
3093*4882a593Smuzhiyun 		if (current_counter < last_counter)		\
3094*4882a593Smuzhiyun 			counter += 0x100000000LL;		\
3095*4882a593Smuzhiyun 		last_counter = current_counter;			\
3096*4882a593Smuzhiyun 		counter &= 0xFFFFFFFF00000000LL;		\
3097*4882a593Smuzhiyun 		counter |= current_counter;			\
3098*4882a593Smuzhiyun 	}
3099*4882a593Smuzhiyun 
3100*4882a593Smuzhiyun #define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
3101*4882a593Smuzhiyun 	{								 \
3102*4882a593Smuzhiyun 		u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb);	 \
3103*4882a593Smuzhiyun 		u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb);	 \
3104*4882a593Smuzhiyun 		u64 current_counter = (current_counter_msb << 32) |	 \
3105*4882a593Smuzhiyun 			current_counter_lsb;				 \
3106*4882a593Smuzhiyun 		if (current_counter < last_counter)			 \
3107*4882a593Smuzhiyun 			counter += 0x1000000000LL;			 \
3108*4882a593Smuzhiyun 		last_counter = current_counter;				 \
3109*4882a593Smuzhiyun 		counter &= 0xFFFFFFF000000000LL;			 \
3110*4882a593Smuzhiyun 		counter |= current_counter;				 \
3111*4882a593Smuzhiyun 	}
3112*4882a593Smuzhiyun /**
3113*4882a593Smuzhiyun  * ixgbevf_update_stats - Update the board statistics counters.
3114*4882a593Smuzhiyun  * @adapter: board private structure
3115*4882a593Smuzhiyun  **/
ixgbevf_update_stats(struct ixgbevf_adapter * adapter)3116*4882a593Smuzhiyun void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
3117*4882a593Smuzhiyun {
3118*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
3119*4882a593Smuzhiyun 	u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
3120*4882a593Smuzhiyun 	u64 alloc_rx_page = 0, hw_csum_rx_error = 0;
3121*4882a593Smuzhiyun 	int i;
3122*4882a593Smuzhiyun 
3123*4882a593Smuzhiyun 	if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3124*4882a593Smuzhiyun 	    test_bit(__IXGBEVF_RESETTING, &adapter->state))
3125*4882a593Smuzhiyun 		return;
3126*4882a593Smuzhiyun 
3127*4882a593Smuzhiyun 	UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
3128*4882a593Smuzhiyun 				adapter->stats.vfgprc);
3129*4882a593Smuzhiyun 	UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
3130*4882a593Smuzhiyun 				adapter->stats.vfgptc);
3131*4882a593Smuzhiyun 	UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
3132*4882a593Smuzhiyun 				adapter->stats.last_vfgorc,
3133*4882a593Smuzhiyun 				adapter->stats.vfgorc);
3134*4882a593Smuzhiyun 	UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
3135*4882a593Smuzhiyun 				adapter->stats.last_vfgotc,
3136*4882a593Smuzhiyun 				adapter->stats.vfgotc);
3137*4882a593Smuzhiyun 	UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
3138*4882a593Smuzhiyun 				adapter->stats.vfmprc);
3139*4882a593Smuzhiyun 
3140*4882a593Smuzhiyun 	for (i = 0;  i  < adapter->num_rx_queues;  i++) {
3141*4882a593Smuzhiyun 		struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
3142*4882a593Smuzhiyun 
3143*4882a593Smuzhiyun 		hw_csum_rx_error += rx_ring->rx_stats.csum_err;
3144*4882a593Smuzhiyun 		alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
3145*4882a593Smuzhiyun 		alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
3146*4882a593Smuzhiyun 		alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
3147*4882a593Smuzhiyun 	}
3148*4882a593Smuzhiyun 
3149*4882a593Smuzhiyun 	adapter->hw_csum_rx_error = hw_csum_rx_error;
3150*4882a593Smuzhiyun 	adapter->alloc_rx_page_failed = alloc_rx_page_failed;
3151*4882a593Smuzhiyun 	adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
3152*4882a593Smuzhiyun 	adapter->alloc_rx_page = alloc_rx_page;
3153*4882a593Smuzhiyun }
3154*4882a593Smuzhiyun 
3155*4882a593Smuzhiyun /**
3156*4882a593Smuzhiyun  * ixgbevf_service_timer - Timer Call-back
3157*4882a593Smuzhiyun  * @t: pointer to timer_list struct
3158*4882a593Smuzhiyun  **/
ixgbevf_service_timer(struct timer_list * t)3159*4882a593Smuzhiyun static void ixgbevf_service_timer(struct timer_list *t)
3160*4882a593Smuzhiyun {
3161*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = from_timer(adapter, t,
3162*4882a593Smuzhiyun 						     service_timer);
3163*4882a593Smuzhiyun 
3164*4882a593Smuzhiyun 	/* Reset the timer */
3165*4882a593Smuzhiyun 	mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
3166*4882a593Smuzhiyun 
3167*4882a593Smuzhiyun 	ixgbevf_service_event_schedule(adapter);
3168*4882a593Smuzhiyun }
3169*4882a593Smuzhiyun 
ixgbevf_reset_subtask(struct ixgbevf_adapter * adapter)3170*4882a593Smuzhiyun static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
3171*4882a593Smuzhiyun {
3172*4882a593Smuzhiyun 	if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state))
3173*4882a593Smuzhiyun 		return;
3174*4882a593Smuzhiyun 
3175*4882a593Smuzhiyun 	rtnl_lock();
3176*4882a593Smuzhiyun 	/* If we're already down or resetting, just bail */
3177*4882a593Smuzhiyun 	if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3178*4882a593Smuzhiyun 	    test_bit(__IXGBEVF_REMOVING, &adapter->state) ||
3179*4882a593Smuzhiyun 	    test_bit(__IXGBEVF_RESETTING, &adapter->state)) {
3180*4882a593Smuzhiyun 		rtnl_unlock();
3181*4882a593Smuzhiyun 		return;
3182*4882a593Smuzhiyun 	}
3183*4882a593Smuzhiyun 
3184*4882a593Smuzhiyun 	adapter->tx_timeout_count++;
3185*4882a593Smuzhiyun 
3186*4882a593Smuzhiyun 	ixgbevf_reinit_locked(adapter);
3187*4882a593Smuzhiyun 	rtnl_unlock();
3188*4882a593Smuzhiyun }
3189*4882a593Smuzhiyun 
3190*4882a593Smuzhiyun /**
3191*4882a593Smuzhiyun  * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
3192*4882a593Smuzhiyun  * @adapter: pointer to the device adapter structure
3193*4882a593Smuzhiyun  *
3194*4882a593Smuzhiyun  * This function serves two purposes.  First it strobes the interrupt lines
3195*4882a593Smuzhiyun  * in order to make certain interrupts are occurring.  Secondly it sets the
3196*4882a593Smuzhiyun  * bits needed to check for TX hangs.  As a result we should immediately
3197*4882a593Smuzhiyun  * determine if a hang has occurred.
3198*4882a593Smuzhiyun  **/
ixgbevf_check_hang_subtask(struct ixgbevf_adapter * adapter)3199*4882a593Smuzhiyun static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
3200*4882a593Smuzhiyun {
3201*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
3202*4882a593Smuzhiyun 	u32 eics = 0;
3203*4882a593Smuzhiyun 	int i;
3204*4882a593Smuzhiyun 
3205*4882a593Smuzhiyun 	/* If we're down or resetting, just bail */
3206*4882a593Smuzhiyun 	if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3207*4882a593Smuzhiyun 	    test_bit(__IXGBEVF_RESETTING, &adapter->state))
3208*4882a593Smuzhiyun 		return;
3209*4882a593Smuzhiyun 
3210*4882a593Smuzhiyun 	/* Force detection of hung controller */
3211*4882a593Smuzhiyun 	if (netif_carrier_ok(adapter->netdev)) {
3212*4882a593Smuzhiyun 		for (i = 0; i < adapter->num_tx_queues; i++)
3213*4882a593Smuzhiyun 			set_check_for_tx_hang(adapter->tx_ring[i]);
3214*4882a593Smuzhiyun 		for (i = 0; i < adapter->num_xdp_queues; i++)
3215*4882a593Smuzhiyun 			set_check_for_tx_hang(adapter->xdp_ring[i]);
3216*4882a593Smuzhiyun 	}
3217*4882a593Smuzhiyun 
3218*4882a593Smuzhiyun 	/* get one bit for every active Tx/Rx interrupt vector */
3219*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
3220*4882a593Smuzhiyun 		struct ixgbevf_q_vector *qv = adapter->q_vector[i];
3221*4882a593Smuzhiyun 
3222*4882a593Smuzhiyun 		if (qv->rx.ring || qv->tx.ring)
3223*4882a593Smuzhiyun 			eics |= BIT(i);
3224*4882a593Smuzhiyun 	}
3225*4882a593Smuzhiyun 
3226*4882a593Smuzhiyun 	/* Cause software interrupt to ensure rings are cleaned */
3227*4882a593Smuzhiyun 	IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
3228*4882a593Smuzhiyun }
3229*4882a593Smuzhiyun 
3230*4882a593Smuzhiyun /**
3231*4882a593Smuzhiyun  * ixgbevf_watchdog_update_link - update the link status
3232*4882a593Smuzhiyun  * @adapter: pointer to the device adapter structure
3233*4882a593Smuzhiyun  **/
ixgbevf_watchdog_update_link(struct ixgbevf_adapter * adapter)3234*4882a593Smuzhiyun static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
3235*4882a593Smuzhiyun {
3236*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
3237*4882a593Smuzhiyun 	u32 link_speed = adapter->link_speed;
3238*4882a593Smuzhiyun 	bool link_up = adapter->link_up;
3239*4882a593Smuzhiyun 	s32 err;
3240*4882a593Smuzhiyun 
3241*4882a593Smuzhiyun 	spin_lock_bh(&adapter->mbx_lock);
3242*4882a593Smuzhiyun 
3243*4882a593Smuzhiyun 	err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3244*4882a593Smuzhiyun 
3245*4882a593Smuzhiyun 	spin_unlock_bh(&adapter->mbx_lock);
3246*4882a593Smuzhiyun 
3247*4882a593Smuzhiyun 	/* if check for link returns error we will need to reset */
3248*4882a593Smuzhiyun 	if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
3249*4882a593Smuzhiyun 		set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
3250*4882a593Smuzhiyun 		link_up = false;
3251*4882a593Smuzhiyun 	}
3252*4882a593Smuzhiyun 
3253*4882a593Smuzhiyun 	adapter->link_up = link_up;
3254*4882a593Smuzhiyun 	adapter->link_speed = link_speed;
3255*4882a593Smuzhiyun }
3256*4882a593Smuzhiyun 
3257*4882a593Smuzhiyun /**
3258*4882a593Smuzhiyun  * ixgbevf_watchdog_link_is_up - update netif_carrier status and
3259*4882a593Smuzhiyun  *				 print link up message
3260*4882a593Smuzhiyun  * @adapter: pointer to the device adapter structure
3261*4882a593Smuzhiyun  **/
ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter * adapter)3262*4882a593Smuzhiyun static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
3263*4882a593Smuzhiyun {
3264*4882a593Smuzhiyun 	struct net_device *netdev = adapter->netdev;
3265*4882a593Smuzhiyun 
3266*4882a593Smuzhiyun 	/* only continue if link was previously down */
3267*4882a593Smuzhiyun 	if (netif_carrier_ok(netdev))
3268*4882a593Smuzhiyun 		return;
3269*4882a593Smuzhiyun 
3270*4882a593Smuzhiyun 	dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
3271*4882a593Smuzhiyun 		 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
3272*4882a593Smuzhiyun 		 "10 Gbps" :
3273*4882a593Smuzhiyun 		 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
3274*4882a593Smuzhiyun 		 "1 Gbps" :
3275*4882a593Smuzhiyun 		 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
3276*4882a593Smuzhiyun 		 "100 Mbps" :
3277*4882a593Smuzhiyun 		 "unknown speed");
3278*4882a593Smuzhiyun 
3279*4882a593Smuzhiyun 	netif_carrier_on(netdev);
3280*4882a593Smuzhiyun }
3281*4882a593Smuzhiyun 
3282*4882a593Smuzhiyun /**
3283*4882a593Smuzhiyun  * ixgbevf_watchdog_link_is_down - update netif_carrier status and
3284*4882a593Smuzhiyun  *				   print link down message
3285*4882a593Smuzhiyun  * @adapter: pointer to the adapter structure
3286*4882a593Smuzhiyun  **/
ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter * adapter)3287*4882a593Smuzhiyun static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
3288*4882a593Smuzhiyun {
3289*4882a593Smuzhiyun 	struct net_device *netdev = adapter->netdev;
3290*4882a593Smuzhiyun 
3291*4882a593Smuzhiyun 	adapter->link_speed = 0;
3292*4882a593Smuzhiyun 
3293*4882a593Smuzhiyun 	/* only continue if link was up previously */
3294*4882a593Smuzhiyun 	if (!netif_carrier_ok(netdev))
3295*4882a593Smuzhiyun 		return;
3296*4882a593Smuzhiyun 
3297*4882a593Smuzhiyun 	dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
3298*4882a593Smuzhiyun 
3299*4882a593Smuzhiyun 	netif_carrier_off(netdev);
3300*4882a593Smuzhiyun }
3301*4882a593Smuzhiyun 
3302*4882a593Smuzhiyun /**
3303*4882a593Smuzhiyun  * ixgbevf_watchdog_subtask - worker thread to bring link up
3304*4882a593Smuzhiyun  * @adapter: board private structure
3305*4882a593Smuzhiyun  **/
ixgbevf_watchdog_subtask(struct ixgbevf_adapter * adapter)3306*4882a593Smuzhiyun static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
3307*4882a593Smuzhiyun {
3308*4882a593Smuzhiyun 	/* if interface is down do nothing */
3309*4882a593Smuzhiyun 	if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3310*4882a593Smuzhiyun 	    test_bit(__IXGBEVF_RESETTING, &adapter->state))
3311*4882a593Smuzhiyun 		return;
3312*4882a593Smuzhiyun 
3313*4882a593Smuzhiyun 	ixgbevf_watchdog_update_link(adapter);
3314*4882a593Smuzhiyun 
3315*4882a593Smuzhiyun 	if (adapter->link_up)
3316*4882a593Smuzhiyun 		ixgbevf_watchdog_link_is_up(adapter);
3317*4882a593Smuzhiyun 	else
3318*4882a593Smuzhiyun 		ixgbevf_watchdog_link_is_down(adapter);
3319*4882a593Smuzhiyun 
3320*4882a593Smuzhiyun 	ixgbevf_update_stats(adapter);
3321*4882a593Smuzhiyun }
3322*4882a593Smuzhiyun 
3323*4882a593Smuzhiyun /**
3324*4882a593Smuzhiyun  * ixgbevf_service_task - manages and runs subtasks
3325*4882a593Smuzhiyun  * @work: pointer to work_struct containing our data
3326*4882a593Smuzhiyun  **/
ixgbevf_service_task(struct work_struct * work)3327*4882a593Smuzhiyun static void ixgbevf_service_task(struct work_struct *work)
3328*4882a593Smuzhiyun {
3329*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = container_of(work,
3330*4882a593Smuzhiyun 						       struct ixgbevf_adapter,
3331*4882a593Smuzhiyun 						       service_task);
3332*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
3333*4882a593Smuzhiyun 
3334*4882a593Smuzhiyun 	if (IXGBE_REMOVED(hw->hw_addr)) {
3335*4882a593Smuzhiyun 		if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
3336*4882a593Smuzhiyun 			rtnl_lock();
3337*4882a593Smuzhiyun 			ixgbevf_down(adapter);
3338*4882a593Smuzhiyun 			rtnl_unlock();
3339*4882a593Smuzhiyun 		}
3340*4882a593Smuzhiyun 		return;
3341*4882a593Smuzhiyun 	}
3342*4882a593Smuzhiyun 
3343*4882a593Smuzhiyun 	ixgbevf_queue_reset_subtask(adapter);
3344*4882a593Smuzhiyun 	ixgbevf_reset_subtask(adapter);
3345*4882a593Smuzhiyun 	ixgbevf_watchdog_subtask(adapter);
3346*4882a593Smuzhiyun 	ixgbevf_check_hang_subtask(adapter);
3347*4882a593Smuzhiyun 
3348*4882a593Smuzhiyun 	ixgbevf_service_event_complete(adapter);
3349*4882a593Smuzhiyun }
3350*4882a593Smuzhiyun 
3351*4882a593Smuzhiyun /**
3352*4882a593Smuzhiyun  * ixgbevf_free_tx_resources - Free Tx Resources per Queue
3353*4882a593Smuzhiyun  * @tx_ring: Tx descriptor ring for a specific queue
3354*4882a593Smuzhiyun  *
3355*4882a593Smuzhiyun  * Free all transmit software resources
3356*4882a593Smuzhiyun  **/
ixgbevf_free_tx_resources(struct ixgbevf_ring * tx_ring)3357*4882a593Smuzhiyun void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
3358*4882a593Smuzhiyun {
3359*4882a593Smuzhiyun 	ixgbevf_clean_tx_ring(tx_ring);
3360*4882a593Smuzhiyun 
3361*4882a593Smuzhiyun 	vfree(tx_ring->tx_buffer_info);
3362*4882a593Smuzhiyun 	tx_ring->tx_buffer_info = NULL;
3363*4882a593Smuzhiyun 
3364*4882a593Smuzhiyun 	/* if not set, then don't free */
3365*4882a593Smuzhiyun 	if (!tx_ring->desc)
3366*4882a593Smuzhiyun 		return;
3367*4882a593Smuzhiyun 
3368*4882a593Smuzhiyun 	dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
3369*4882a593Smuzhiyun 			  tx_ring->dma);
3370*4882a593Smuzhiyun 
3371*4882a593Smuzhiyun 	tx_ring->desc = NULL;
3372*4882a593Smuzhiyun }
3373*4882a593Smuzhiyun 
3374*4882a593Smuzhiyun /**
3375*4882a593Smuzhiyun  * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
3376*4882a593Smuzhiyun  * @adapter: board private structure
3377*4882a593Smuzhiyun  *
3378*4882a593Smuzhiyun  * Free all transmit software resources
3379*4882a593Smuzhiyun  **/
ixgbevf_free_all_tx_resources(struct ixgbevf_adapter * adapter)3380*4882a593Smuzhiyun static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
3381*4882a593Smuzhiyun {
3382*4882a593Smuzhiyun 	int i;
3383*4882a593Smuzhiyun 
3384*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_tx_queues; i++)
3385*4882a593Smuzhiyun 		if (adapter->tx_ring[i]->desc)
3386*4882a593Smuzhiyun 			ixgbevf_free_tx_resources(adapter->tx_ring[i]);
3387*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_xdp_queues; i++)
3388*4882a593Smuzhiyun 		if (adapter->xdp_ring[i]->desc)
3389*4882a593Smuzhiyun 			ixgbevf_free_tx_resources(adapter->xdp_ring[i]);
3390*4882a593Smuzhiyun }
3391*4882a593Smuzhiyun 
3392*4882a593Smuzhiyun /**
3393*4882a593Smuzhiyun  * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
3394*4882a593Smuzhiyun  * @tx_ring: Tx descriptor ring (for a specific queue) to setup
3395*4882a593Smuzhiyun  *
3396*4882a593Smuzhiyun  * Return 0 on success, negative on failure
3397*4882a593Smuzhiyun  **/
ixgbevf_setup_tx_resources(struct ixgbevf_ring * tx_ring)3398*4882a593Smuzhiyun int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
3399*4882a593Smuzhiyun {
3400*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
3401*4882a593Smuzhiyun 	int size;
3402*4882a593Smuzhiyun 
3403*4882a593Smuzhiyun 	size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
3404*4882a593Smuzhiyun 	tx_ring->tx_buffer_info = vmalloc(size);
3405*4882a593Smuzhiyun 	if (!tx_ring->tx_buffer_info)
3406*4882a593Smuzhiyun 		goto err;
3407*4882a593Smuzhiyun 
3408*4882a593Smuzhiyun 	u64_stats_init(&tx_ring->syncp);
3409*4882a593Smuzhiyun 
3410*4882a593Smuzhiyun 	/* round up to nearest 4K */
3411*4882a593Smuzhiyun 	tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
3412*4882a593Smuzhiyun 	tx_ring->size = ALIGN(tx_ring->size, 4096);
3413*4882a593Smuzhiyun 
3414*4882a593Smuzhiyun 	tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
3415*4882a593Smuzhiyun 					   &tx_ring->dma, GFP_KERNEL);
3416*4882a593Smuzhiyun 	if (!tx_ring->desc)
3417*4882a593Smuzhiyun 		goto err;
3418*4882a593Smuzhiyun 
3419*4882a593Smuzhiyun 	return 0;
3420*4882a593Smuzhiyun 
3421*4882a593Smuzhiyun err:
3422*4882a593Smuzhiyun 	vfree(tx_ring->tx_buffer_info);
3423*4882a593Smuzhiyun 	tx_ring->tx_buffer_info = NULL;
3424*4882a593Smuzhiyun 	hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
3425*4882a593Smuzhiyun 	return -ENOMEM;
3426*4882a593Smuzhiyun }
3427*4882a593Smuzhiyun 
3428*4882a593Smuzhiyun /**
3429*4882a593Smuzhiyun  * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
3430*4882a593Smuzhiyun  * @adapter: board private structure
3431*4882a593Smuzhiyun  *
3432*4882a593Smuzhiyun  * If this function returns with an error, then it's possible one or
3433*4882a593Smuzhiyun  * more of the rings is populated (while the rest are not).  It is the
3434*4882a593Smuzhiyun  * callers duty to clean those orphaned rings.
3435*4882a593Smuzhiyun  *
3436*4882a593Smuzhiyun  * Return 0 on success, negative on failure
3437*4882a593Smuzhiyun  **/
ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter * adapter)3438*4882a593Smuzhiyun static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
3439*4882a593Smuzhiyun {
3440*4882a593Smuzhiyun 	int i, j = 0, err = 0;
3441*4882a593Smuzhiyun 
3442*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_tx_queues; i++) {
3443*4882a593Smuzhiyun 		err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
3444*4882a593Smuzhiyun 		if (!err)
3445*4882a593Smuzhiyun 			continue;
3446*4882a593Smuzhiyun 		hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
3447*4882a593Smuzhiyun 		goto err_setup_tx;
3448*4882a593Smuzhiyun 	}
3449*4882a593Smuzhiyun 
3450*4882a593Smuzhiyun 	for (j = 0; j < adapter->num_xdp_queues; j++) {
3451*4882a593Smuzhiyun 		err = ixgbevf_setup_tx_resources(adapter->xdp_ring[j]);
3452*4882a593Smuzhiyun 		if (!err)
3453*4882a593Smuzhiyun 			continue;
3454*4882a593Smuzhiyun 		hw_dbg(&adapter->hw, "Allocation for XDP Queue %u failed\n", j);
3455*4882a593Smuzhiyun 		goto err_setup_tx;
3456*4882a593Smuzhiyun 	}
3457*4882a593Smuzhiyun 
3458*4882a593Smuzhiyun 	return 0;
3459*4882a593Smuzhiyun err_setup_tx:
3460*4882a593Smuzhiyun 	/* rewind the index freeing the rings as we go */
3461*4882a593Smuzhiyun 	while (j--)
3462*4882a593Smuzhiyun 		ixgbevf_free_tx_resources(adapter->xdp_ring[j]);
3463*4882a593Smuzhiyun 	while (i--)
3464*4882a593Smuzhiyun 		ixgbevf_free_tx_resources(adapter->tx_ring[i]);
3465*4882a593Smuzhiyun 
3466*4882a593Smuzhiyun 	return err;
3467*4882a593Smuzhiyun }
3468*4882a593Smuzhiyun 
3469*4882a593Smuzhiyun /**
3470*4882a593Smuzhiyun  * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
3471*4882a593Smuzhiyun  * @adapter: board private structure
3472*4882a593Smuzhiyun  * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3473*4882a593Smuzhiyun  *
3474*4882a593Smuzhiyun  * Returns 0 on success, negative on failure
3475*4882a593Smuzhiyun  **/
ixgbevf_setup_rx_resources(struct ixgbevf_adapter * adapter,struct ixgbevf_ring * rx_ring)3476*4882a593Smuzhiyun int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
3477*4882a593Smuzhiyun 			       struct ixgbevf_ring *rx_ring)
3478*4882a593Smuzhiyun {
3479*4882a593Smuzhiyun 	int size;
3480*4882a593Smuzhiyun 
3481*4882a593Smuzhiyun 	size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
3482*4882a593Smuzhiyun 	rx_ring->rx_buffer_info = vmalloc(size);
3483*4882a593Smuzhiyun 	if (!rx_ring->rx_buffer_info)
3484*4882a593Smuzhiyun 		goto err;
3485*4882a593Smuzhiyun 
3486*4882a593Smuzhiyun 	u64_stats_init(&rx_ring->syncp);
3487*4882a593Smuzhiyun 
3488*4882a593Smuzhiyun 	/* Round up to nearest 4K */
3489*4882a593Smuzhiyun 	rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3490*4882a593Smuzhiyun 	rx_ring->size = ALIGN(rx_ring->size, 4096);
3491*4882a593Smuzhiyun 
3492*4882a593Smuzhiyun 	rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
3493*4882a593Smuzhiyun 					   &rx_ring->dma, GFP_KERNEL);
3494*4882a593Smuzhiyun 
3495*4882a593Smuzhiyun 	if (!rx_ring->desc)
3496*4882a593Smuzhiyun 		goto err;
3497*4882a593Smuzhiyun 
3498*4882a593Smuzhiyun 	/* XDP RX-queue info */
3499*4882a593Smuzhiyun 	if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
3500*4882a593Smuzhiyun 			     rx_ring->queue_index) < 0)
3501*4882a593Smuzhiyun 		goto err;
3502*4882a593Smuzhiyun 
3503*4882a593Smuzhiyun 	rx_ring->xdp_prog = adapter->xdp_prog;
3504*4882a593Smuzhiyun 
3505*4882a593Smuzhiyun 	return 0;
3506*4882a593Smuzhiyun err:
3507*4882a593Smuzhiyun 	vfree(rx_ring->rx_buffer_info);
3508*4882a593Smuzhiyun 	rx_ring->rx_buffer_info = NULL;
3509*4882a593Smuzhiyun 	dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
3510*4882a593Smuzhiyun 	return -ENOMEM;
3511*4882a593Smuzhiyun }
3512*4882a593Smuzhiyun 
3513*4882a593Smuzhiyun /**
3514*4882a593Smuzhiyun  * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
3515*4882a593Smuzhiyun  * @adapter: board private structure
3516*4882a593Smuzhiyun  *
3517*4882a593Smuzhiyun  * If this function returns with an error, then it's possible one or
3518*4882a593Smuzhiyun  * more of the rings is populated (while the rest are not).  It is the
3519*4882a593Smuzhiyun  * callers duty to clean those orphaned rings.
3520*4882a593Smuzhiyun  *
3521*4882a593Smuzhiyun  * Return 0 on success, negative on failure
3522*4882a593Smuzhiyun  **/
ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter * adapter)3523*4882a593Smuzhiyun static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
3524*4882a593Smuzhiyun {
3525*4882a593Smuzhiyun 	int i, err = 0;
3526*4882a593Smuzhiyun 
3527*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_rx_queues; i++) {
3528*4882a593Smuzhiyun 		err = ixgbevf_setup_rx_resources(adapter, adapter->rx_ring[i]);
3529*4882a593Smuzhiyun 		if (!err)
3530*4882a593Smuzhiyun 			continue;
3531*4882a593Smuzhiyun 		hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
3532*4882a593Smuzhiyun 		goto err_setup_rx;
3533*4882a593Smuzhiyun 	}
3534*4882a593Smuzhiyun 
3535*4882a593Smuzhiyun 	return 0;
3536*4882a593Smuzhiyun err_setup_rx:
3537*4882a593Smuzhiyun 	/* rewind the index freeing the rings as we go */
3538*4882a593Smuzhiyun 	while (i--)
3539*4882a593Smuzhiyun 		ixgbevf_free_rx_resources(adapter->rx_ring[i]);
3540*4882a593Smuzhiyun 	return err;
3541*4882a593Smuzhiyun }
3542*4882a593Smuzhiyun 
3543*4882a593Smuzhiyun /**
3544*4882a593Smuzhiyun  * ixgbevf_free_rx_resources - Free Rx Resources
3545*4882a593Smuzhiyun  * @rx_ring: ring to clean the resources from
3546*4882a593Smuzhiyun  *
3547*4882a593Smuzhiyun  * Free all receive software resources
3548*4882a593Smuzhiyun  **/
ixgbevf_free_rx_resources(struct ixgbevf_ring * rx_ring)3549*4882a593Smuzhiyun void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
3550*4882a593Smuzhiyun {
3551*4882a593Smuzhiyun 	ixgbevf_clean_rx_ring(rx_ring);
3552*4882a593Smuzhiyun 
3553*4882a593Smuzhiyun 	rx_ring->xdp_prog = NULL;
3554*4882a593Smuzhiyun 	xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
3555*4882a593Smuzhiyun 	vfree(rx_ring->rx_buffer_info);
3556*4882a593Smuzhiyun 	rx_ring->rx_buffer_info = NULL;
3557*4882a593Smuzhiyun 
3558*4882a593Smuzhiyun 	dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
3559*4882a593Smuzhiyun 			  rx_ring->dma);
3560*4882a593Smuzhiyun 
3561*4882a593Smuzhiyun 	rx_ring->desc = NULL;
3562*4882a593Smuzhiyun }
3563*4882a593Smuzhiyun 
3564*4882a593Smuzhiyun /**
3565*4882a593Smuzhiyun  * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
3566*4882a593Smuzhiyun  * @adapter: board private structure
3567*4882a593Smuzhiyun  *
3568*4882a593Smuzhiyun  * Free all receive software resources
3569*4882a593Smuzhiyun  **/
ixgbevf_free_all_rx_resources(struct ixgbevf_adapter * adapter)3570*4882a593Smuzhiyun static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
3571*4882a593Smuzhiyun {
3572*4882a593Smuzhiyun 	int i;
3573*4882a593Smuzhiyun 
3574*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_rx_queues; i++)
3575*4882a593Smuzhiyun 		if (adapter->rx_ring[i]->desc)
3576*4882a593Smuzhiyun 			ixgbevf_free_rx_resources(adapter->rx_ring[i]);
3577*4882a593Smuzhiyun }
3578*4882a593Smuzhiyun 
3579*4882a593Smuzhiyun /**
3580*4882a593Smuzhiyun  * ixgbevf_open - Called when a network interface is made active
3581*4882a593Smuzhiyun  * @netdev: network interface device structure
3582*4882a593Smuzhiyun  *
3583*4882a593Smuzhiyun  * Returns 0 on success, negative value on failure
3584*4882a593Smuzhiyun  *
3585*4882a593Smuzhiyun  * The open entry point is called when a network interface is made
3586*4882a593Smuzhiyun  * active by the system (IFF_UP).  At this point all resources needed
3587*4882a593Smuzhiyun  * for transmit and receive operations are allocated, the interrupt
3588*4882a593Smuzhiyun  * handler is registered with the OS, the watchdog timer is started,
3589*4882a593Smuzhiyun  * and the stack is notified that the interface is ready.
3590*4882a593Smuzhiyun  **/
ixgbevf_open(struct net_device * netdev)3591*4882a593Smuzhiyun int ixgbevf_open(struct net_device *netdev)
3592*4882a593Smuzhiyun {
3593*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3594*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
3595*4882a593Smuzhiyun 	int err;
3596*4882a593Smuzhiyun 
3597*4882a593Smuzhiyun 	/* A previous failure to open the device because of a lack of
3598*4882a593Smuzhiyun 	 * available MSIX vector resources may have reset the number
3599*4882a593Smuzhiyun 	 * of msix vectors variable to zero.  The only way to recover
3600*4882a593Smuzhiyun 	 * is to unload/reload the driver and hope that the system has
3601*4882a593Smuzhiyun 	 * been able to recover some MSIX vector resources.
3602*4882a593Smuzhiyun 	 */
3603*4882a593Smuzhiyun 	if (!adapter->num_msix_vectors)
3604*4882a593Smuzhiyun 		return -ENOMEM;
3605*4882a593Smuzhiyun 
3606*4882a593Smuzhiyun 	if (hw->adapter_stopped) {
3607*4882a593Smuzhiyun 		ixgbevf_reset(adapter);
3608*4882a593Smuzhiyun 		/* if adapter is still stopped then PF isn't up and
3609*4882a593Smuzhiyun 		 * the VF can't start.
3610*4882a593Smuzhiyun 		 */
3611*4882a593Smuzhiyun 		if (hw->adapter_stopped) {
3612*4882a593Smuzhiyun 			err = IXGBE_ERR_MBX;
3613*4882a593Smuzhiyun 			pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
3614*4882a593Smuzhiyun 			goto err_setup_reset;
3615*4882a593Smuzhiyun 		}
3616*4882a593Smuzhiyun 	}
3617*4882a593Smuzhiyun 
3618*4882a593Smuzhiyun 	/* disallow open during test */
3619*4882a593Smuzhiyun 	if (test_bit(__IXGBEVF_TESTING, &adapter->state))
3620*4882a593Smuzhiyun 		return -EBUSY;
3621*4882a593Smuzhiyun 
3622*4882a593Smuzhiyun 	netif_carrier_off(netdev);
3623*4882a593Smuzhiyun 
3624*4882a593Smuzhiyun 	/* allocate transmit descriptors */
3625*4882a593Smuzhiyun 	err = ixgbevf_setup_all_tx_resources(adapter);
3626*4882a593Smuzhiyun 	if (err)
3627*4882a593Smuzhiyun 		goto err_setup_tx;
3628*4882a593Smuzhiyun 
3629*4882a593Smuzhiyun 	/* allocate receive descriptors */
3630*4882a593Smuzhiyun 	err = ixgbevf_setup_all_rx_resources(adapter);
3631*4882a593Smuzhiyun 	if (err)
3632*4882a593Smuzhiyun 		goto err_setup_rx;
3633*4882a593Smuzhiyun 
3634*4882a593Smuzhiyun 	ixgbevf_configure(adapter);
3635*4882a593Smuzhiyun 
3636*4882a593Smuzhiyun 	err = ixgbevf_request_irq(adapter);
3637*4882a593Smuzhiyun 	if (err)
3638*4882a593Smuzhiyun 		goto err_req_irq;
3639*4882a593Smuzhiyun 
3640*4882a593Smuzhiyun 	/* Notify the stack of the actual queue counts. */
3641*4882a593Smuzhiyun 	err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
3642*4882a593Smuzhiyun 	if (err)
3643*4882a593Smuzhiyun 		goto err_set_queues;
3644*4882a593Smuzhiyun 
3645*4882a593Smuzhiyun 	err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
3646*4882a593Smuzhiyun 	if (err)
3647*4882a593Smuzhiyun 		goto err_set_queues;
3648*4882a593Smuzhiyun 
3649*4882a593Smuzhiyun 	ixgbevf_up_complete(adapter);
3650*4882a593Smuzhiyun 
3651*4882a593Smuzhiyun 	return 0;
3652*4882a593Smuzhiyun 
3653*4882a593Smuzhiyun err_set_queues:
3654*4882a593Smuzhiyun 	ixgbevf_free_irq(adapter);
3655*4882a593Smuzhiyun err_req_irq:
3656*4882a593Smuzhiyun 	ixgbevf_free_all_rx_resources(adapter);
3657*4882a593Smuzhiyun err_setup_rx:
3658*4882a593Smuzhiyun 	ixgbevf_free_all_tx_resources(adapter);
3659*4882a593Smuzhiyun err_setup_tx:
3660*4882a593Smuzhiyun 	ixgbevf_reset(adapter);
3661*4882a593Smuzhiyun err_setup_reset:
3662*4882a593Smuzhiyun 
3663*4882a593Smuzhiyun 	return err;
3664*4882a593Smuzhiyun }
3665*4882a593Smuzhiyun 
3666*4882a593Smuzhiyun /**
3667*4882a593Smuzhiyun  * ixgbevf_close_suspend - actions necessary to both suspend and close flows
3668*4882a593Smuzhiyun  * @adapter: the private adapter struct
3669*4882a593Smuzhiyun  *
3670*4882a593Smuzhiyun  * This function should contain the necessary work common to both suspending
3671*4882a593Smuzhiyun  * and closing of the device.
3672*4882a593Smuzhiyun  */
ixgbevf_close_suspend(struct ixgbevf_adapter * adapter)3673*4882a593Smuzhiyun static void ixgbevf_close_suspend(struct ixgbevf_adapter *adapter)
3674*4882a593Smuzhiyun {
3675*4882a593Smuzhiyun 	ixgbevf_down(adapter);
3676*4882a593Smuzhiyun 	ixgbevf_free_irq(adapter);
3677*4882a593Smuzhiyun 	ixgbevf_free_all_tx_resources(adapter);
3678*4882a593Smuzhiyun 	ixgbevf_free_all_rx_resources(adapter);
3679*4882a593Smuzhiyun }
3680*4882a593Smuzhiyun 
3681*4882a593Smuzhiyun /**
3682*4882a593Smuzhiyun  * ixgbevf_close - Disables a network interface
3683*4882a593Smuzhiyun  * @netdev: network interface device structure
3684*4882a593Smuzhiyun  *
3685*4882a593Smuzhiyun  * Returns 0, this is not allowed to fail
3686*4882a593Smuzhiyun  *
3687*4882a593Smuzhiyun  * The close entry point is called when an interface is de-activated
3688*4882a593Smuzhiyun  * by the OS.  The hardware is still under the drivers control, but
3689*4882a593Smuzhiyun  * needs to be disabled.  A global MAC reset is issued to stop the
3690*4882a593Smuzhiyun  * hardware, and all transmit and receive resources are freed.
3691*4882a593Smuzhiyun  **/
ixgbevf_close(struct net_device * netdev)3692*4882a593Smuzhiyun int ixgbevf_close(struct net_device *netdev)
3693*4882a593Smuzhiyun {
3694*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3695*4882a593Smuzhiyun 
3696*4882a593Smuzhiyun 	if (netif_device_present(netdev))
3697*4882a593Smuzhiyun 		ixgbevf_close_suspend(adapter);
3698*4882a593Smuzhiyun 
3699*4882a593Smuzhiyun 	return 0;
3700*4882a593Smuzhiyun }
3701*4882a593Smuzhiyun 
ixgbevf_queue_reset_subtask(struct ixgbevf_adapter * adapter)3702*4882a593Smuzhiyun static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3703*4882a593Smuzhiyun {
3704*4882a593Smuzhiyun 	struct net_device *dev = adapter->netdev;
3705*4882a593Smuzhiyun 
3706*4882a593Smuzhiyun 	if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED,
3707*4882a593Smuzhiyun 				&adapter->state))
3708*4882a593Smuzhiyun 		return;
3709*4882a593Smuzhiyun 
3710*4882a593Smuzhiyun 	/* if interface is down do nothing */
3711*4882a593Smuzhiyun 	if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3712*4882a593Smuzhiyun 	    test_bit(__IXGBEVF_RESETTING, &adapter->state))
3713*4882a593Smuzhiyun 		return;
3714*4882a593Smuzhiyun 
3715*4882a593Smuzhiyun 	/* Hardware has to reinitialize queues and interrupts to
3716*4882a593Smuzhiyun 	 * match packet buffer alignment. Unfortunately, the
3717*4882a593Smuzhiyun 	 * hardware is not flexible enough to do this dynamically.
3718*4882a593Smuzhiyun 	 */
3719*4882a593Smuzhiyun 	rtnl_lock();
3720*4882a593Smuzhiyun 
3721*4882a593Smuzhiyun 	if (netif_running(dev))
3722*4882a593Smuzhiyun 		ixgbevf_close(dev);
3723*4882a593Smuzhiyun 
3724*4882a593Smuzhiyun 	ixgbevf_clear_interrupt_scheme(adapter);
3725*4882a593Smuzhiyun 	ixgbevf_init_interrupt_scheme(adapter);
3726*4882a593Smuzhiyun 
3727*4882a593Smuzhiyun 	if (netif_running(dev))
3728*4882a593Smuzhiyun 		ixgbevf_open(dev);
3729*4882a593Smuzhiyun 
3730*4882a593Smuzhiyun 	rtnl_unlock();
3731*4882a593Smuzhiyun }
3732*4882a593Smuzhiyun 
ixgbevf_tx_ctxtdesc(struct ixgbevf_ring * tx_ring,u32 vlan_macip_lens,u32 fceof_saidx,u32 type_tucmd,u32 mss_l4len_idx)3733*4882a593Smuzhiyun static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
3734*4882a593Smuzhiyun 				u32 vlan_macip_lens, u32 fceof_saidx,
3735*4882a593Smuzhiyun 				u32 type_tucmd, u32 mss_l4len_idx)
3736*4882a593Smuzhiyun {
3737*4882a593Smuzhiyun 	struct ixgbe_adv_tx_context_desc *context_desc;
3738*4882a593Smuzhiyun 	u16 i = tx_ring->next_to_use;
3739*4882a593Smuzhiyun 
3740*4882a593Smuzhiyun 	context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
3741*4882a593Smuzhiyun 
3742*4882a593Smuzhiyun 	i++;
3743*4882a593Smuzhiyun 	tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
3744*4882a593Smuzhiyun 
3745*4882a593Smuzhiyun 	/* set bits to identify this as an advanced context descriptor */
3746*4882a593Smuzhiyun 	type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
3747*4882a593Smuzhiyun 
3748*4882a593Smuzhiyun 	context_desc->vlan_macip_lens	= cpu_to_le32(vlan_macip_lens);
3749*4882a593Smuzhiyun 	context_desc->fceof_saidx	= cpu_to_le32(fceof_saidx);
3750*4882a593Smuzhiyun 	context_desc->type_tucmd_mlhl	= cpu_to_le32(type_tucmd);
3751*4882a593Smuzhiyun 	context_desc->mss_l4len_idx	= cpu_to_le32(mss_l4len_idx);
3752*4882a593Smuzhiyun }
3753*4882a593Smuzhiyun 
ixgbevf_tso(struct ixgbevf_ring * tx_ring,struct ixgbevf_tx_buffer * first,u8 * hdr_len,struct ixgbevf_ipsec_tx_data * itd)3754*4882a593Smuzhiyun static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
3755*4882a593Smuzhiyun 		       struct ixgbevf_tx_buffer *first,
3756*4882a593Smuzhiyun 		       u8 *hdr_len,
3757*4882a593Smuzhiyun 		       struct ixgbevf_ipsec_tx_data *itd)
3758*4882a593Smuzhiyun {
3759*4882a593Smuzhiyun 	u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
3760*4882a593Smuzhiyun 	struct sk_buff *skb = first->skb;
3761*4882a593Smuzhiyun 	union {
3762*4882a593Smuzhiyun 		struct iphdr *v4;
3763*4882a593Smuzhiyun 		struct ipv6hdr *v6;
3764*4882a593Smuzhiyun 		unsigned char *hdr;
3765*4882a593Smuzhiyun 	} ip;
3766*4882a593Smuzhiyun 	union {
3767*4882a593Smuzhiyun 		struct tcphdr *tcp;
3768*4882a593Smuzhiyun 		unsigned char *hdr;
3769*4882a593Smuzhiyun 	} l4;
3770*4882a593Smuzhiyun 	u32 paylen, l4_offset;
3771*4882a593Smuzhiyun 	u32 fceof_saidx = 0;
3772*4882a593Smuzhiyun 	int err;
3773*4882a593Smuzhiyun 
3774*4882a593Smuzhiyun 	if (skb->ip_summed != CHECKSUM_PARTIAL)
3775*4882a593Smuzhiyun 		return 0;
3776*4882a593Smuzhiyun 
3777*4882a593Smuzhiyun 	if (!skb_is_gso(skb))
3778*4882a593Smuzhiyun 		return 0;
3779*4882a593Smuzhiyun 
3780*4882a593Smuzhiyun 	err = skb_cow_head(skb, 0);
3781*4882a593Smuzhiyun 	if (err < 0)
3782*4882a593Smuzhiyun 		return err;
3783*4882a593Smuzhiyun 
3784*4882a593Smuzhiyun 	if (eth_p_mpls(first->protocol))
3785*4882a593Smuzhiyun 		ip.hdr = skb_inner_network_header(skb);
3786*4882a593Smuzhiyun 	else
3787*4882a593Smuzhiyun 		ip.hdr = skb_network_header(skb);
3788*4882a593Smuzhiyun 	l4.hdr = skb_checksum_start(skb);
3789*4882a593Smuzhiyun 
3790*4882a593Smuzhiyun 	/* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3791*4882a593Smuzhiyun 	type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3792*4882a593Smuzhiyun 
3793*4882a593Smuzhiyun 	/* initialize outer IP header fields */
3794*4882a593Smuzhiyun 	if (ip.v4->version == 4) {
3795*4882a593Smuzhiyun 		unsigned char *csum_start = skb_checksum_start(skb);
3796*4882a593Smuzhiyun 		unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
3797*4882a593Smuzhiyun 		int len = csum_start - trans_start;
3798*4882a593Smuzhiyun 
3799*4882a593Smuzhiyun 		/* IP header will have to cancel out any data that
3800*4882a593Smuzhiyun 		 * is not a part of the outer IP header, so set to
3801*4882a593Smuzhiyun 		 * a reverse csum if needed, else init check to 0.
3802*4882a593Smuzhiyun 		 */
3803*4882a593Smuzhiyun 		ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
3804*4882a593Smuzhiyun 					   csum_fold(csum_partial(trans_start,
3805*4882a593Smuzhiyun 								  len, 0)) : 0;
3806*4882a593Smuzhiyun 		type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3807*4882a593Smuzhiyun 
3808*4882a593Smuzhiyun 		ip.v4->tot_len = 0;
3809*4882a593Smuzhiyun 		first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3810*4882a593Smuzhiyun 				   IXGBE_TX_FLAGS_CSUM |
3811*4882a593Smuzhiyun 				   IXGBE_TX_FLAGS_IPV4;
3812*4882a593Smuzhiyun 	} else {
3813*4882a593Smuzhiyun 		ip.v6->payload_len = 0;
3814*4882a593Smuzhiyun 		first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3815*4882a593Smuzhiyun 				   IXGBE_TX_FLAGS_CSUM;
3816*4882a593Smuzhiyun 	}
3817*4882a593Smuzhiyun 
3818*4882a593Smuzhiyun 	/* determine offset of inner transport header */
3819*4882a593Smuzhiyun 	l4_offset = l4.hdr - skb->data;
3820*4882a593Smuzhiyun 
3821*4882a593Smuzhiyun 	/* compute length of segmentation header */
3822*4882a593Smuzhiyun 	*hdr_len = (l4.tcp->doff * 4) + l4_offset;
3823*4882a593Smuzhiyun 
3824*4882a593Smuzhiyun 	/* remove payload length from inner checksum */
3825*4882a593Smuzhiyun 	paylen = skb->len - l4_offset;
3826*4882a593Smuzhiyun 	csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
3827*4882a593Smuzhiyun 
3828*4882a593Smuzhiyun 	/* update gso size and bytecount with header size */
3829*4882a593Smuzhiyun 	first->gso_segs = skb_shinfo(skb)->gso_segs;
3830*4882a593Smuzhiyun 	first->bytecount += (first->gso_segs - 1) * *hdr_len;
3831*4882a593Smuzhiyun 
3832*4882a593Smuzhiyun 	/* mss_l4len_id: use 1 as index for TSO */
3833*4882a593Smuzhiyun 	mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
3834*4882a593Smuzhiyun 	mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
3835*4882a593Smuzhiyun 	mss_l4len_idx |= (1u << IXGBE_ADVTXD_IDX_SHIFT);
3836*4882a593Smuzhiyun 
3837*4882a593Smuzhiyun 	fceof_saidx |= itd->pfsa;
3838*4882a593Smuzhiyun 	type_tucmd |= itd->flags | itd->trailer_len;
3839*4882a593Smuzhiyun 
3840*4882a593Smuzhiyun 	/* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
3841*4882a593Smuzhiyun 	vlan_macip_lens = l4.hdr - ip.hdr;
3842*4882a593Smuzhiyun 	vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
3843*4882a593Smuzhiyun 	vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
3844*4882a593Smuzhiyun 
3845*4882a593Smuzhiyun 	ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
3846*4882a593Smuzhiyun 			    mss_l4len_idx);
3847*4882a593Smuzhiyun 
3848*4882a593Smuzhiyun 	return 1;
3849*4882a593Smuzhiyun }
3850*4882a593Smuzhiyun 
ixgbevf_ipv6_csum_is_sctp(struct sk_buff * skb)3851*4882a593Smuzhiyun static inline bool ixgbevf_ipv6_csum_is_sctp(struct sk_buff *skb)
3852*4882a593Smuzhiyun {
3853*4882a593Smuzhiyun 	unsigned int offset = 0;
3854*4882a593Smuzhiyun 
3855*4882a593Smuzhiyun 	ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
3856*4882a593Smuzhiyun 
3857*4882a593Smuzhiyun 	return offset == skb_checksum_start_offset(skb);
3858*4882a593Smuzhiyun }
3859*4882a593Smuzhiyun 
ixgbevf_tx_csum(struct ixgbevf_ring * tx_ring,struct ixgbevf_tx_buffer * first,struct ixgbevf_ipsec_tx_data * itd)3860*4882a593Smuzhiyun static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
3861*4882a593Smuzhiyun 			    struct ixgbevf_tx_buffer *first,
3862*4882a593Smuzhiyun 			    struct ixgbevf_ipsec_tx_data *itd)
3863*4882a593Smuzhiyun {
3864*4882a593Smuzhiyun 	struct sk_buff *skb = first->skb;
3865*4882a593Smuzhiyun 	u32 vlan_macip_lens = 0;
3866*4882a593Smuzhiyun 	u32 fceof_saidx = 0;
3867*4882a593Smuzhiyun 	u32 type_tucmd = 0;
3868*4882a593Smuzhiyun 
3869*4882a593Smuzhiyun 	if (skb->ip_summed != CHECKSUM_PARTIAL)
3870*4882a593Smuzhiyun 		goto no_csum;
3871*4882a593Smuzhiyun 
3872*4882a593Smuzhiyun 	switch (skb->csum_offset) {
3873*4882a593Smuzhiyun 	case offsetof(struct tcphdr, check):
3874*4882a593Smuzhiyun 		type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3875*4882a593Smuzhiyun 		fallthrough;
3876*4882a593Smuzhiyun 	case offsetof(struct udphdr, check):
3877*4882a593Smuzhiyun 		break;
3878*4882a593Smuzhiyun 	case offsetof(struct sctphdr, checksum):
3879*4882a593Smuzhiyun 		/* validate that this is actually an SCTP request */
3880*4882a593Smuzhiyun 		if (((first->protocol == htons(ETH_P_IP)) &&
3881*4882a593Smuzhiyun 		     (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
3882*4882a593Smuzhiyun 		    ((first->protocol == htons(ETH_P_IPV6)) &&
3883*4882a593Smuzhiyun 		     ixgbevf_ipv6_csum_is_sctp(skb))) {
3884*4882a593Smuzhiyun 			type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
3885*4882a593Smuzhiyun 			break;
3886*4882a593Smuzhiyun 		}
3887*4882a593Smuzhiyun 		fallthrough;
3888*4882a593Smuzhiyun 	default:
3889*4882a593Smuzhiyun 		skb_checksum_help(skb);
3890*4882a593Smuzhiyun 		goto no_csum;
3891*4882a593Smuzhiyun 	}
3892*4882a593Smuzhiyun 
3893*4882a593Smuzhiyun 	if (first->protocol == htons(ETH_P_IP))
3894*4882a593Smuzhiyun 		type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3895*4882a593Smuzhiyun 
3896*4882a593Smuzhiyun 	/* update TX checksum flag */
3897*4882a593Smuzhiyun 	first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
3898*4882a593Smuzhiyun 	vlan_macip_lens = skb_checksum_start_offset(skb) -
3899*4882a593Smuzhiyun 			  skb_network_offset(skb);
3900*4882a593Smuzhiyun no_csum:
3901*4882a593Smuzhiyun 	/* vlan_macip_lens: MACLEN, VLAN tag */
3902*4882a593Smuzhiyun 	vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
3903*4882a593Smuzhiyun 	vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
3904*4882a593Smuzhiyun 
3905*4882a593Smuzhiyun 	fceof_saidx |= itd->pfsa;
3906*4882a593Smuzhiyun 	type_tucmd |= itd->flags | itd->trailer_len;
3907*4882a593Smuzhiyun 
3908*4882a593Smuzhiyun 	ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3909*4882a593Smuzhiyun 			    fceof_saidx, type_tucmd, 0);
3910*4882a593Smuzhiyun }
3911*4882a593Smuzhiyun 
ixgbevf_tx_cmd_type(u32 tx_flags)3912*4882a593Smuzhiyun static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
3913*4882a593Smuzhiyun {
3914*4882a593Smuzhiyun 	/* set type for advanced descriptor with frame checksum insertion */
3915*4882a593Smuzhiyun 	__le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3916*4882a593Smuzhiyun 				      IXGBE_ADVTXD_DCMD_IFCS |
3917*4882a593Smuzhiyun 				      IXGBE_ADVTXD_DCMD_DEXT);
3918*4882a593Smuzhiyun 
3919*4882a593Smuzhiyun 	/* set HW VLAN bit if VLAN is present */
3920*4882a593Smuzhiyun 	if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3921*4882a593Smuzhiyun 		cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
3922*4882a593Smuzhiyun 
3923*4882a593Smuzhiyun 	/* set segmentation enable bits for TSO/FSO */
3924*4882a593Smuzhiyun 	if (tx_flags & IXGBE_TX_FLAGS_TSO)
3925*4882a593Smuzhiyun 		cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
3926*4882a593Smuzhiyun 
3927*4882a593Smuzhiyun 	return cmd_type;
3928*4882a593Smuzhiyun }
3929*4882a593Smuzhiyun 
ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc * tx_desc,u32 tx_flags,unsigned int paylen)3930*4882a593Smuzhiyun static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3931*4882a593Smuzhiyun 				     u32 tx_flags, unsigned int paylen)
3932*4882a593Smuzhiyun {
3933*4882a593Smuzhiyun 	__le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
3934*4882a593Smuzhiyun 
3935*4882a593Smuzhiyun 	/* enable L4 checksum for TSO and TX checksum offload */
3936*4882a593Smuzhiyun 	if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3937*4882a593Smuzhiyun 		olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
3938*4882a593Smuzhiyun 
3939*4882a593Smuzhiyun 	/* enble IPv4 checksum for TSO */
3940*4882a593Smuzhiyun 	if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3941*4882a593Smuzhiyun 		olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
3942*4882a593Smuzhiyun 
3943*4882a593Smuzhiyun 	/* enable IPsec */
3944*4882a593Smuzhiyun 	if (tx_flags & IXGBE_TX_FLAGS_IPSEC)
3945*4882a593Smuzhiyun 		olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IPSEC);
3946*4882a593Smuzhiyun 
3947*4882a593Smuzhiyun 	/* use index 1 context for TSO/FSO/FCOE/IPSEC */
3948*4882a593Smuzhiyun 	if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_IPSEC))
3949*4882a593Smuzhiyun 		olinfo_status |= cpu_to_le32(1u << IXGBE_ADVTXD_IDX_SHIFT);
3950*4882a593Smuzhiyun 
3951*4882a593Smuzhiyun 	/* Check Context must be set if Tx switch is enabled, which it
3952*4882a593Smuzhiyun 	 * always is for case where virtual functions are running
3953*4882a593Smuzhiyun 	 */
3954*4882a593Smuzhiyun 	olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
3955*4882a593Smuzhiyun 
3956*4882a593Smuzhiyun 	tx_desc->read.olinfo_status = olinfo_status;
3957*4882a593Smuzhiyun }
3958*4882a593Smuzhiyun 
ixgbevf_tx_map(struct ixgbevf_ring * tx_ring,struct ixgbevf_tx_buffer * first,const u8 hdr_len)3959*4882a593Smuzhiyun static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3960*4882a593Smuzhiyun 			   struct ixgbevf_tx_buffer *first,
3961*4882a593Smuzhiyun 			   const u8 hdr_len)
3962*4882a593Smuzhiyun {
3963*4882a593Smuzhiyun 	struct sk_buff *skb = first->skb;
3964*4882a593Smuzhiyun 	struct ixgbevf_tx_buffer *tx_buffer;
3965*4882a593Smuzhiyun 	union ixgbe_adv_tx_desc *tx_desc;
3966*4882a593Smuzhiyun 	skb_frag_t *frag;
3967*4882a593Smuzhiyun 	dma_addr_t dma;
3968*4882a593Smuzhiyun 	unsigned int data_len, size;
3969*4882a593Smuzhiyun 	u32 tx_flags = first->tx_flags;
3970*4882a593Smuzhiyun 	__le32 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
3971*4882a593Smuzhiyun 	u16 i = tx_ring->next_to_use;
3972*4882a593Smuzhiyun 
3973*4882a593Smuzhiyun 	tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
3974*4882a593Smuzhiyun 
3975*4882a593Smuzhiyun 	ixgbevf_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
3976*4882a593Smuzhiyun 
3977*4882a593Smuzhiyun 	size = skb_headlen(skb);
3978*4882a593Smuzhiyun 	data_len = skb->data_len;
3979*4882a593Smuzhiyun 
3980*4882a593Smuzhiyun 	dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
3981*4882a593Smuzhiyun 
3982*4882a593Smuzhiyun 	tx_buffer = first;
3983*4882a593Smuzhiyun 
3984*4882a593Smuzhiyun 	for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
3985*4882a593Smuzhiyun 		if (dma_mapping_error(tx_ring->dev, dma))
3986*4882a593Smuzhiyun 			goto dma_error;
3987*4882a593Smuzhiyun 
3988*4882a593Smuzhiyun 		/* record length, and DMA address */
3989*4882a593Smuzhiyun 		dma_unmap_len_set(tx_buffer, len, size);
3990*4882a593Smuzhiyun 		dma_unmap_addr_set(tx_buffer, dma, dma);
3991*4882a593Smuzhiyun 
3992*4882a593Smuzhiyun 		tx_desc->read.buffer_addr = cpu_to_le64(dma);
3993*4882a593Smuzhiyun 
3994*4882a593Smuzhiyun 		while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3995*4882a593Smuzhiyun 			tx_desc->read.cmd_type_len =
3996*4882a593Smuzhiyun 				cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
3997*4882a593Smuzhiyun 
3998*4882a593Smuzhiyun 			i++;
3999*4882a593Smuzhiyun 			tx_desc++;
4000*4882a593Smuzhiyun 			if (i == tx_ring->count) {
4001*4882a593Smuzhiyun 				tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
4002*4882a593Smuzhiyun 				i = 0;
4003*4882a593Smuzhiyun 			}
4004*4882a593Smuzhiyun 			tx_desc->read.olinfo_status = 0;
4005*4882a593Smuzhiyun 
4006*4882a593Smuzhiyun 			dma += IXGBE_MAX_DATA_PER_TXD;
4007*4882a593Smuzhiyun 			size -= IXGBE_MAX_DATA_PER_TXD;
4008*4882a593Smuzhiyun 
4009*4882a593Smuzhiyun 			tx_desc->read.buffer_addr = cpu_to_le64(dma);
4010*4882a593Smuzhiyun 		}
4011*4882a593Smuzhiyun 
4012*4882a593Smuzhiyun 		if (likely(!data_len))
4013*4882a593Smuzhiyun 			break;
4014*4882a593Smuzhiyun 
4015*4882a593Smuzhiyun 		tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
4016*4882a593Smuzhiyun 
4017*4882a593Smuzhiyun 		i++;
4018*4882a593Smuzhiyun 		tx_desc++;
4019*4882a593Smuzhiyun 		if (i == tx_ring->count) {
4020*4882a593Smuzhiyun 			tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
4021*4882a593Smuzhiyun 			i = 0;
4022*4882a593Smuzhiyun 		}
4023*4882a593Smuzhiyun 		tx_desc->read.olinfo_status = 0;
4024*4882a593Smuzhiyun 
4025*4882a593Smuzhiyun 		size = skb_frag_size(frag);
4026*4882a593Smuzhiyun 		data_len -= size;
4027*4882a593Smuzhiyun 
4028*4882a593Smuzhiyun 		dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
4029*4882a593Smuzhiyun 				       DMA_TO_DEVICE);
4030*4882a593Smuzhiyun 
4031*4882a593Smuzhiyun 		tx_buffer = &tx_ring->tx_buffer_info[i];
4032*4882a593Smuzhiyun 	}
4033*4882a593Smuzhiyun 
4034*4882a593Smuzhiyun 	/* write last descriptor with RS and EOP bits */
4035*4882a593Smuzhiyun 	cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
4036*4882a593Smuzhiyun 	tx_desc->read.cmd_type_len = cmd_type;
4037*4882a593Smuzhiyun 
4038*4882a593Smuzhiyun 	/* set the timestamp */
4039*4882a593Smuzhiyun 	first->time_stamp = jiffies;
4040*4882a593Smuzhiyun 
4041*4882a593Smuzhiyun 	skb_tx_timestamp(skb);
4042*4882a593Smuzhiyun 
4043*4882a593Smuzhiyun 	/* Force memory writes to complete before letting h/w know there
4044*4882a593Smuzhiyun 	 * are new descriptors to fetch.  (Only applicable for weak-ordered
4045*4882a593Smuzhiyun 	 * memory model archs, such as IA-64).
4046*4882a593Smuzhiyun 	 *
4047*4882a593Smuzhiyun 	 * We also need this memory barrier (wmb) to make certain all of the
4048*4882a593Smuzhiyun 	 * status bits have been updated before next_to_watch is written.
4049*4882a593Smuzhiyun 	 */
4050*4882a593Smuzhiyun 	wmb();
4051*4882a593Smuzhiyun 
4052*4882a593Smuzhiyun 	/* set next_to_watch value indicating a packet is present */
4053*4882a593Smuzhiyun 	first->next_to_watch = tx_desc;
4054*4882a593Smuzhiyun 
4055*4882a593Smuzhiyun 	i++;
4056*4882a593Smuzhiyun 	if (i == tx_ring->count)
4057*4882a593Smuzhiyun 		i = 0;
4058*4882a593Smuzhiyun 
4059*4882a593Smuzhiyun 	tx_ring->next_to_use = i;
4060*4882a593Smuzhiyun 
4061*4882a593Smuzhiyun 	/* notify HW of packet */
4062*4882a593Smuzhiyun 	ixgbevf_write_tail(tx_ring, i);
4063*4882a593Smuzhiyun 
4064*4882a593Smuzhiyun 	return;
4065*4882a593Smuzhiyun dma_error:
4066*4882a593Smuzhiyun 	dev_err(tx_ring->dev, "TX DMA map failed\n");
4067*4882a593Smuzhiyun 	tx_buffer = &tx_ring->tx_buffer_info[i];
4068*4882a593Smuzhiyun 
4069*4882a593Smuzhiyun 	/* clear dma mappings for failed tx_buffer_info map */
4070*4882a593Smuzhiyun 	while (tx_buffer != first) {
4071*4882a593Smuzhiyun 		if (dma_unmap_len(tx_buffer, len))
4072*4882a593Smuzhiyun 			dma_unmap_page(tx_ring->dev,
4073*4882a593Smuzhiyun 				       dma_unmap_addr(tx_buffer, dma),
4074*4882a593Smuzhiyun 				       dma_unmap_len(tx_buffer, len),
4075*4882a593Smuzhiyun 				       DMA_TO_DEVICE);
4076*4882a593Smuzhiyun 		dma_unmap_len_set(tx_buffer, len, 0);
4077*4882a593Smuzhiyun 
4078*4882a593Smuzhiyun 		if (i-- == 0)
4079*4882a593Smuzhiyun 			i += tx_ring->count;
4080*4882a593Smuzhiyun 		tx_buffer = &tx_ring->tx_buffer_info[i];
4081*4882a593Smuzhiyun 	}
4082*4882a593Smuzhiyun 
4083*4882a593Smuzhiyun 	if (dma_unmap_len(tx_buffer, len))
4084*4882a593Smuzhiyun 		dma_unmap_single(tx_ring->dev,
4085*4882a593Smuzhiyun 				 dma_unmap_addr(tx_buffer, dma),
4086*4882a593Smuzhiyun 				 dma_unmap_len(tx_buffer, len),
4087*4882a593Smuzhiyun 				 DMA_TO_DEVICE);
4088*4882a593Smuzhiyun 	dma_unmap_len_set(tx_buffer, len, 0);
4089*4882a593Smuzhiyun 
4090*4882a593Smuzhiyun 	dev_kfree_skb_any(tx_buffer->skb);
4091*4882a593Smuzhiyun 	tx_buffer->skb = NULL;
4092*4882a593Smuzhiyun 
4093*4882a593Smuzhiyun 	tx_ring->next_to_use = i;
4094*4882a593Smuzhiyun }
4095*4882a593Smuzhiyun 
__ixgbevf_maybe_stop_tx(struct ixgbevf_ring * tx_ring,int size)4096*4882a593Smuzhiyun static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
4097*4882a593Smuzhiyun {
4098*4882a593Smuzhiyun 	netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
4099*4882a593Smuzhiyun 	/* Herbert's original patch had:
4100*4882a593Smuzhiyun 	 *  smp_mb__after_netif_stop_queue();
4101*4882a593Smuzhiyun 	 * but since that doesn't exist yet, just open code it.
4102*4882a593Smuzhiyun 	 */
4103*4882a593Smuzhiyun 	smp_mb();
4104*4882a593Smuzhiyun 
4105*4882a593Smuzhiyun 	/* We need to check again in a case another CPU has just
4106*4882a593Smuzhiyun 	 * made room available.
4107*4882a593Smuzhiyun 	 */
4108*4882a593Smuzhiyun 	if (likely(ixgbevf_desc_unused(tx_ring) < size))
4109*4882a593Smuzhiyun 		return -EBUSY;
4110*4882a593Smuzhiyun 
4111*4882a593Smuzhiyun 	/* A reprieve! - use start_queue because it doesn't call schedule */
4112*4882a593Smuzhiyun 	netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
4113*4882a593Smuzhiyun 	++tx_ring->tx_stats.restart_queue;
4114*4882a593Smuzhiyun 
4115*4882a593Smuzhiyun 	return 0;
4116*4882a593Smuzhiyun }
4117*4882a593Smuzhiyun 
ixgbevf_maybe_stop_tx(struct ixgbevf_ring * tx_ring,int size)4118*4882a593Smuzhiyun static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
4119*4882a593Smuzhiyun {
4120*4882a593Smuzhiyun 	if (likely(ixgbevf_desc_unused(tx_ring) >= size))
4121*4882a593Smuzhiyun 		return 0;
4122*4882a593Smuzhiyun 	return __ixgbevf_maybe_stop_tx(tx_ring, size);
4123*4882a593Smuzhiyun }
4124*4882a593Smuzhiyun 
ixgbevf_xmit_frame_ring(struct sk_buff * skb,struct ixgbevf_ring * tx_ring)4125*4882a593Smuzhiyun static int ixgbevf_xmit_frame_ring(struct sk_buff *skb,
4126*4882a593Smuzhiyun 				   struct ixgbevf_ring *tx_ring)
4127*4882a593Smuzhiyun {
4128*4882a593Smuzhiyun 	struct ixgbevf_tx_buffer *first;
4129*4882a593Smuzhiyun 	int tso;
4130*4882a593Smuzhiyun 	u32 tx_flags = 0;
4131*4882a593Smuzhiyun 	u16 count = TXD_USE_COUNT(skb_headlen(skb));
4132*4882a593Smuzhiyun 	struct ixgbevf_ipsec_tx_data ipsec_tx = { 0 };
4133*4882a593Smuzhiyun #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
4134*4882a593Smuzhiyun 	unsigned short f;
4135*4882a593Smuzhiyun #endif
4136*4882a593Smuzhiyun 	u8 hdr_len = 0;
4137*4882a593Smuzhiyun 	u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
4138*4882a593Smuzhiyun 
4139*4882a593Smuzhiyun 	if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
4140*4882a593Smuzhiyun 		dev_kfree_skb_any(skb);
4141*4882a593Smuzhiyun 		return NETDEV_TX_OK;
4142*4882a593Smuzhiyun 	}
4143*4882a593Smuzhiyun 
4144*4882a593Smuzhiyun 	/* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
4145*4882a593Smuzhiyun 	 *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
4146*4882a593Smuzhiyun 	 *       + 2 desc gap to keep tail from touching head,
4147*4882a593Smuzhiyun 	 *       + 1 desc for context descriptor,
4148*4882a593Smuzhiyun 	 * otherwise try next time
4149*4882a593Smuzhiyun 	 */
4150*4882a593Smuzhiyun #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
4151*4882a593Smuzhiyun 	for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
4152*4882a593Smuzhiyun 		skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
4153*4882a593Smuzhiyun 
4154*4882a593Smuzhiyun 		count += TXD_USE_COUNT(skb_frag_size(frag));
4155*4882a593Smuzhiyun 	}
4156*4882a593Smuzhiyun #else
4157*4882a593Smuzhiyun 	count += skb_shinfo(skb)->nr_frags;
4158*4882a593Smuzhiyun #endif
4159*4882a593Smuzhiyun 	if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
4160*4882a593Smuzhiyun 		tx_ring->tx_stats.tx_busy++;
4161*4882a593Smuzhiyun 		return NETDEV_TX_BUSY;
4162*4882a593Smuzhiyun 	}
4163*4882a593Smuzhiyun 
4164*4882a593Smuzhiyun 	/* record the location of the first descriptor for this packet */
4165*4882a593Smuzhiyun 	first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4166*4882a593Smuzhiyun 	first->skb = skb;
4167*4882a593Smuzhiyun 	first->bytecount = skb->len;
4168*4882a593Smuzhiyun 	first->gso_segs = 1;
4169*4882a593Smuzhiyun 
4170*4882a593Smuzhiyun 	if (skb_vlan_tag_present(skb)) {
4171*4882a593Smuzhiyun 		tx_flags |= skb_vlan_tag_get(skb);
4172*4882a593Smuzhiyun 		tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
4173*4882a593Smuzhiyun 		tx_flags |= IXGBE_TX_FLAGS_VLAN;
4174*4882a593Smuzhiyun 	}
4175*4882a593Smuzhiyun 
4176*4882a593Smuzhiyun 	/* record initial flags and protocol */
4177*4882a593Smuzhiyun 	first->tx_flags = tx_flags;
4178*4882a593Smuzhiyun 	first->protocol = vlan_get_protocol(skb);
4179*4882a593Smuzhiyun 
4180*4882a593Smuzhiyun #ifdef CONFIG_IXGBEVF_IPSEC
4181*4882a593Smuzhiyun 	if (xfrm_offload(skb) && !ixgbevf_ipsec_tx(tx_ring, first, &ipsec_tx))
4182*4882a593Smuzhiyun 		goto out_drop;
4183*4882a593Smuzhiyun #endif
4184*4882a593Smuzhiyun 	tso = ixgbevf_tso(tx_ring, first, &hdr_len, &ipsec_tx);
4185*4882a593Smuzhiyun 	if (tso < 0)
4186*4882a593Smuzhiyun 		goto out_drop;
4187*4882a593Smuzhiyun 	else if (!tso)
4188*4882a593Smuzhiyun 		ixgbevf_tx_csum(tx_ring, first, &ipsec_tx);
4189*4882a593Smuzhiyun 
4190*4882a593Smuzhiyun 	ixgbevf_tx_map(tx_ring, first, hdr_len);
4191*4882a593Smuzhiyun 
4192*4882a593Smuzhiyun 	ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
4193*4882a593Smuzhiyun 
4194*4882a593Smuzhiyun 	return NETDEV_TX_OK;
4195*4882a593Smuzhiyun 
4196*4882a593Smuzhiyun out_drop:
4197*4882a593Smuzhiyun 	dev_kfree_skb_any(first->skb);
4198*4882a593Smuzhiyun 	first->skb = NULL;
4199*4882a593Smuzhiyun 
4200*4882a593Smuzhiyun 	return NETDEV_TX_OK;
4201*4882a593Smuzhiyun }
4202*4882a593Smuzhiyun 
ixgbevf_xmit_frame(struct sk_buff * skb,struct net_device * netdev)4203*4882a593Smuzhiyun static netdev_tx_t ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
4204*4882a593Smuzhiyun {
4205*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4206*4882a593Smuzhiyun 	struct ixgbevf_ring *tx_ring;
4207*4882a593Smuzhiyun 
4208*4882a593Smuzhiyun 	if (skb->len <= 0) {
4209*4882a593Smuzhiyun 		dev_kfree_skb_any(skb);
4210*4882a593Smuzhiyun 		return NETDEV_TX_OK;
4211*4882a593Smuzhiyun 	}
4212*4882a593Smuzhiyun 
4213*4882a593Smuzhiyun 	/* The minimum packet size for olinfo paylen is 17 so pad the skb
4214*4882a593Smuzhiyun 	 * in order to meet this minimum size requirement.
4215*4882a593Smuzhiyun 	 */
4216*4882a593Smuzhiyun 	if (skb->len < 17) {
4217*4882a593Smuzhiyun 		if (skb_padto(skb, 17))
4218*4882a593Smuzhiyun 			return NETDEV_TX_OK;
4219*4882a593Smuzhiyun 		skb->len = 17;
4220*4882a593Smuzhiyun 	}
4221*4882a593Smuzhiyun 
4222*4882a593Smuzhiyun 	tx_ring = adapter->tx_ring[skb->queue_mapping];
4223*4882a593Smuzhiyun 	return ixgbevf_xmit_frame_ring(skb, tx_ring);
4224*4882a593Smuzhiyun }
4225*4882a593Smuzhiyun 
4226*4882a593Smuzhiyun /**
4227*4882a593Smuzhiyun  * ixgbevf_set_mac - Change the Ethernet Address of the NIC
4228*4882a593Smuzhiyun  * @netdev: network interface device structure
4229*4882a593Smuzhiyun  * @p: pointer to an address structure
4230*4882a593Smuzhiyun  *
4231*4882a593Smuzhiyun  * Returns 0 on success, negative on failure
4232*4882a593Smuzhiyun  **/
ixgbevf_set_mac(struct net_device * netdev,void * p)4233*4882a593Smuzhiyun static int ixgbevf_set_mac(struct net_device *netdev, void *p)
4234*4882a593Smuzhiyun {
4235*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4236*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
4237*4882a593Smuzhiyun 	struct sockaddr *addr = p;
4238*4882a593Smuzhiyun 	int err;
4239*4882a593Smuzhiyun 
4240*4882a593Smuzhiyun 	if (!is_valid_ether_addr(addr->sa_data))
4241*4882a593Smuzhiyun 		return -EADDRNOTAVAIL;
4242*4882a593Smuzhiyun 
4243*4882a593Smuzhiyun 	spin_lock_bh(&adapter->mbx_lock);
4244*4882a593Smuzhiyun 
4245*4882a593Smuzhiyun 	err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
4246*4882a593Smuzhiyun 
4247*4882a593Smuzhiyun 	spin_unlock_bh(&adapter->mbx_lock);
4248*4882a593Smuzhiyun 
4249*4882a593Smuzhiyun 	if (err)
4250*4882a593Smuzhiyun 		return -EPERM;
4251*4882a593Smuzhiyun 
4252*4882a593Smuzhiyun 	ether_addr_copy(hw->mac.addr, addr->sa_data);
4253*4882a593Smuzhiyun 	ether_addr_copy(hw->mac.perm_addr, addr->sa_data);
4254*4882a593Smuzhiyun 	ether_addr_copy(netdev->dev_addr, addr->sa_data);
4255*4882a593Smuzhiyun 
4256*4882a593Smuzhiyun 	return 0;
4257*4882a593Smuzhiyun }
4258*4882a593Smuzhiyun 
4259*4882a593Smuzhiyun /**
4260*4882a593Smuzhiyun  * ixgbevf_change_mtu - Change the Maximum Transfer Unit
4261*4882a593Smuzhiyun  * @netdev: network interface device structure
4262*4882a593Smuzhiyun  * @new_mtu: new value for maximum frame size
4263*4882a593Smuzhiyun  *
4264*4882a593Smuzhiyun  * Returns 0 on success, negative on failure
4265*4882a593Smuzhiyun  **/
ixgbevf_change_mtu(struct net_device * netdev,int new_mtu)4266*4882a593Smuzhiyun static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
4267*4882a593Smuzhiyun {
4268*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4269*4882a593Smuzhiyun 	struct ixgbe_hw *hw = &adapter->hw;
4270*4882a593Smuzhiyun 	int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4271*4882a593Smuzhiyun 	int ret;
4272*4882a593Smuzhiyun 
4273*4882a593Smuzhiyun 	/* prevent MTU being changed to a size unsupported by XDP */
4274*4882a593Smuzhiyun 	if (adapter->xdp_prog) {
4275*4882a593Smuzhiyun 		dev_warn(&adapter->pdev->dev, "MTU cannot be changed while XDP program is loaded\n");
4276*4882a593Smuzhiyun 		return -EPERM;
4277*4882a593Smuzhiyun 	}
4278*4882a593Smuzhiyun 
4279*4882a593Smuzhiyun 	spin_lock_bh(&adapter->mbx_lock);
4280*4882a593Smuzhiyun 	/* notify the PF of our intent to use this size of frame */
4281*4882a593Smuzhiyun 	ret = hw->mac.ops.set_rlpml(hw, max_frame);
4282*4882a593Smuzhiyun 	spin_unlock_bh(&adapter->mbx_lock);
4283*4882a593Smuzhiyun 	if (ret)
4284*4882a593Smuzhiyun 		return -EINVAL;
4285*4882a593Smuzhiyun 
4286*4882a593Smuzhiyun 	hw_dbg(hw, "changing MTU from %d to %d\n",
4287*4882a593Smuzhiyun 	       netdev->mtu, new_mtu);
4288*4882a593Smuzhiyun 
4289*4882a593Smuzhiyun 	/* must set new MTU before calling down or up */
4290*4882a593Smuzhiyun 	netdev->mtu = new_mtu;
4291*4882a593Smuzhiyun 
4292*4882a593Smuzhiyun 	if (netif_running(netdev))
4293*4882a593Smuzhiyun 		ixgbevf_reinit_locked(adapter);
4294*4882a593Smuzhiyun 
4295*4882a593Smuzhiyun 	return 0;
4296*4882a593Smuzhiyun }
4297*4882a593Smuzhiyun 
ixgbevf_suspend(struct device * dev_d)4298*4882a593Smuzhiyun static int __maybe_unused ixgbevf_suspend(struct device *dev_d)
4299*4882a593Smuzhiyun {
4300*4882a593Smuzhiyun 	struct net_device *netdev = dev_get_drvdata(dev_d);
4301*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4302*4882a593Smuzhiyun 
4303*4882a593Smuzhiyun 	rtnl_lock();
4304*4882a593Smuzhiyun 	netif_device_detach(netdev);
4305*4882a593Smuzhiyun 
4306*4882a593Smuzhiyun 	if (netif_running(netdev))
4307*4882a593Smuzhiyun 		ixgbevf_close_suspend(adapter);
4308*4882a593Smuzhiyun 
4309*4882a593Smuzhiyun 	ixgbevf_clear_interrupt_scheme(adapter);
4310*4882a593Smuzhiyun 	rtnl_unlock();
4311*4882a593Smuzhiyun 
4312*4882a593Smuzhiyun 	return 0;
4313*4882a593Smuzhiyun }
4314*4882a593Smuzhiyun 
ixgbevf_resume(struct device * dev_d)4315*4882a593Smuzhiyun static int __maybe_unused ixgbevf_resume(struct device *dev_d)
4316*4882a593Smuzhiyun {
4317*4882a593Smuzhiyun 	struct pci_dev *pdev = to_pci_dev(dev_d);
4318*4882a593Smuzhiyun 	struct net_device *netdev = pci_get_drvdata(pdev);
4319*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4320*4882a593Smuzhiyun 	u32 err;
4321*4882a593Smuzhiyun 
4322*4882a593Smuzhiyun 	adapter->hw.hw_addr = adapter->io_addr;
4323*4882a593Smuzhiyun 	smp_mb__before_atomic();
4324*4882a593Smuzhiyun 	clear_bit(__IXGBEVF_DISABLED, &adapter->state);
4325*4882a593Smuzhiyun 	pci_set_master(pdev);
4326*4882a593Smuzhiyun 
4327*4882a593Smuzhiyun 	ixgbevf_reset(adapter);
4328*4882a593Smuzhiyun 
4329*4882a593Smuzhiyun 	rtnl_lock();
4330*4882a593Smuzhiyun 	err = ixgbevf_init_interrupt_scheme(adapter);
4331*4882a593Smuzhiyun 	if (!err && netif_running(netdev))
4332*4882a593Smuzhiyun 		err = ixgbevf_open(netdev);
4333*4882a593Smuzhiyun 	rtnl_unlock();
4334*4882a593Smuzhiyun 	if (err)
4335*4882a593Smuzhiyun 		return err;
4336*4882a593Smuzhiyun 
4337*4882a593Smuzhiyun 	netif_device_attach(netdev);
4338*4882a593Smuzhiyun 
4339*4882a593Smuzhiyun 	return err;
4340*4882a593Smuzhiyun }
4341*4882a593Smuzhiyun 
ixgbevf_shutdown(struct pci_dev * pdev)4342*4882a593Smuzhiyun static void ixgbevf_shutdown(struct pci_dev *pdev)
4343*4882a593Smuzhiyun {
4344*4882a593Smuzhiyun 	ixgbevf_suspend(&pdev->dev);
4345*4882a593Smuzhiyun }
4346*4882a593Smuzhiyun 
ixgbevf_get_tx_ring_stats(struct rtnl_link_stats64 * stats,const struct ixgbevf_ring * ring)4347*4882a593Smuzhiyun static void ixgbevf_get_tx_ring_stats(struct rtnl_link_stats64 *stats,
4348*4882a593Smuzhiyun 				      const struct ixgbevf_ring *ring)
4349*4882a593Smuzhiyun {
4350*4882a593Smuzhiyun 	u64 bytes, packets;
4351*4882a593Smuzhiyun 	unsigned int start;
4352*4882a593Smuzhiyun 
4353*4882a593Smuzhiyun 	if (ring) {
4354*4882a593Smuzhiyun 		do {
4355*4882a593Smuzhiyun 			start = u64_stats_fetch_begin_irq(&ring->syncp);
4356*4882a593Smuzhiyun 			bytes = ring->stats.bytes;
4357*4882a593Smuzhiyun 			packets = ring->stats.packets;
4358*4882a593Smuzhiyun 		} while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4359*4882a593Smuzhiyun 		stats->tx_bytes += bytes;
4360*4882a593Smuzhiyun 		stats->tx_packets += packets;
4361*4882a593Smuzhiyun 	}
4362*4882a593Smuzhiyun }
4363*4882a593Smuzhiyun 
ixgbevf_get_stats(struct net_device * netdev,struct rtnl_link_stats64 * stats)4364*4882a593Smuzhiyun static void ixgbevf_get_stats(struct net_device *netdev,
4365*4882a593Smuzhiyun 			      struct rtnl_link_stats64 *stats)
4366*4882a593Smuzhiyun {
4367*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4368*4882a593Smuzhiyun 	unsigned int start;
4369*4882a593Smuzhiyun 	u64 bytes, packets;
4370*4882a593Smuzhiyun 	const struct ixgbevf_ring *ring;
4371*4882a593Smuzhiyun 	int i;
4372*4882a593Smuzhiyun 
4373*4882a593Smuzhiyun 	ixgbevf_update_stats(adapter);
4374*4882a593Smuzhiyun 
4375*4882a593Smuzhiyun 	stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
4376*4882a593Smuzhiyun 
4377*4882a593Smuzhiyun 	rcu_read_lock();
4378*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_rx_queues; i++) {
4379*4882a593Smuzhiyun 		ring = adapter->rx_ring[i];
4380*4882a593Smuzhiyun 		do {
4381*4882a593Smuzhiyun 			start = u64_stats_fetch_begin_irq(&ring->syncp);
4382*4882a593Smuzhiyun 			bytes = ring->stats.bytes;
4383*4882a593Smuzhiyun 			packets = ring->stats.packets;
4384*4882a593Smuzhiyun 		} while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4385*4882a593Smuzhiyun 		stats->rx_bytes += bytes;
4386*4882a593Smuzhiyun 		stats->rx_packets += packets;
4387*4882a593Smuzhiyun 	}
4388*4882a593Smuzhiyun 
4389*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_tx_queues; i++) {
4390*4882a593Smuzhiyun 		ring = adapter->tx_ring[i];
4391*4882a593Smuzhiyun 		ixgbevf_get_tx_ring_stats(stats, ring);
4392*4882a593Smuzhiyun 	}
4393*4882a593Smuzhiyun 
4394*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_xdp_queues; i++) {
4395*4882a593Smuzhiyun 		ring = adapter->xdp_ring[i];
4396*4882a593Smuzhiyun 		ixgbevf_get_tx_ring_stats(stats, ring);
4397*4882a593Smuzhiyun 	}
4398*4882a593Smuzhiyun 	rcu_read_unlock();
4399*4882a593Smuzhiyun }
4400*4882a593Smuzhiyun 
4401*4882a593Smuzhiyun #define IXGBEVF_MAX_MAC_HDR_LEN		127
4402*4882a593Smuzhiyun #define IXGBEVF_MAX_NETWORK_HDR_LEN	511
4403*4882a593Smuzhiyun 
4404*4882a593Smuzhiyun static netdev_features_t
ixgbevf_features_check(struct sk_buff * skb,struct net_device * dev,netdev_features_t features)4405*4882a593Smuzhiyun ixgbevf_features_check(struct sk_buff *skb, struct net_device *dev,
4406*4882a593Smuzhiyun 		       netdev_features_t features)
4407*4882a593Smuzhiyun {
4408*4882a593Smuzhiyun 	unsigned int network_hdr_len, mac_hdr_len;
4409*4882a593Smuzhiyun 
4410*4882a593Smuzhiyun 	/* Make certain the headers can be described by a context descriptor */
4411*4882a593Smuzhiyun 	mac_hdr_len = skb_network_header(skb) - skb->data;
4412*4882a593Smuzhiyun 	if (unlikely(mac_hdr_len > IXGBEVF_MAX_MAC_HDR_LEN))
4413*4882a593Smuzhiyun 		return features & ~(NETIF_F_HW_CSUM |
4414*4882a593Smuzhiyun 				    NETIF_F_SCTP_CRC |
4415*4882a593Smuzhiyun 				    NETIF_F_HW_VLAN_CTAG_TX |
4416*4882a593Smuzhiyun 				    NETIF_F_TSO |
4417*4882a593Smuzhiyun 				    NETIF_F_TSO6);
4418*4882a593Smuzhiyun 
4419*4882a593Smuzhiyun 	network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
4420*4882a593Smuzhiyun 	if (unlikely(network_hdr_len >  IXGBEVF_MAX_NETWORK_HDR_LEN))
4421*4882a593Smuzhiyun 		return features & ~(NETIF_F_HW_CSUM |
4422*4882a593Smuzhiyun 				    NETIF_F_SCTP_CRC |
4423*4882a593Smuzhiyun 				    NETIF_F_TSO |
4424*4882a593Smuzhiyun 				    NETIF_F_TSO6);
4425*4882a593Smuzhiyun 
4426*4882a593Smuzhiyun 	/* We can only support IPV4 TSO in tunnels if we can mangle the
4427*4882a593Smuzhiyun 	 * inner IP ID field, so strip TSO if MANGLEID is not supported.
4428*4882a593Smuzhiyun 	 */
4429*4882a593Smuzhiyun 	if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
4430*4882a593Smuzhiyun 		features &= ~NETIF_F_TSO;
4431*4882a593Smuzhiyun 
4432*4882a593Smuzhiyun 	return features;
4433*4882a593Smuzhiyun }
4434*4882a593Smuzhiyun 
ixgbevf_xdp_setup(struct net_device * dev,struct bpf_prog * prog)4435*4882a593Smuzhiyun static int ixgbevf_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
4436*4882a593Smuzhiyun {
4437*4882a593Smuzhiyun 	int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4438*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(dev);
4439*4882a593Smuzhiyun 	struct bpf_prog *old_prog;
4440*4882a593Smuzhiyun 
4441*4882a593Smuzhiyun 	/* verify ixgbevf ring attributes are sufficient for XDP */
4442*4882a593Smuzhiyun 	for (i = 0; i < adapter->num_rx_queues; i++) {
4443*4882a593Smuzhiyun 		struct ixgbevf_ring *ring = adapter->rx_ring[i];
4444*4882a593Smuzhiyun 
4445*4882a593Smuzhiyun 		if (frame_size > ixgbevf_rx_bufsz(ring))
4446*4882a593Smuzhiyun 			return -EINVAL;
4447*4882a593Smuzhiyun 	}
4448*4882a593Smuzhiyun 
4449*4882a593Smuzhiyun 	old_prog = xchg(&adapter->xdp_prog, prog);
4450*4882a593Smuzhiyun 
4451*4882a593Smuzhiyun 	/* If transitioning XDP modes reconfigure rings */
4452*4882a593Smuzhiyun 	if (!!prog != !!old_prog) {
4453*4882a593Smuzhiyun 		/* Hardware has to reinitialize queues and interrupts to
4454*4882a593Smuzhiyun 		 * match packet buffer alignment. Unfortunately, the
4455*4882a593Smuzhiyun 		 * hardware is not flexible enough to do this dynamically.
4456*4882a593Smuzhiyun 		 */
4457*4882a593Smuzhiyun 		if (netif_running(dev))
4458*4882a593Smuzhiyun 			ixgbevf_close(dev);
4459*4882a593Smuzhiyun 
4460*4882a593Smuzhiyun 		ixgbevf_clear_interrupt_scheme(adapter);
4461*4882a593Smuzhiyun 		ixgbevf_init_interrupt_scheme(adapter);
4462*4882a593Smuzhiyun 
4463*4882a593Smuzhiyun 		if (netif_running(dev))
4464*4882a593Smuzhiyun 			ixgbevf_open(dev);
4465*4882a593Smuzhiyun 	} else {
4466*4882a593Smuzhiyun 		for (i = 0; i < adapter->num_rx_queues; i++)
4467*4882a593Smuzhiyun 			xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
4468*4882a593Smuzhiyun 	}
4469*4882a593Smuzhiyun 
4470*4882a593Smuzhiyun 	if (old_prog)
4471*4882a593Smuzhiyun 		bpf_prog_put(old_prog);
4472*4882a593Smuzhiyun 
4473*4882a593Smuzhiyun 	return 0;
4474*4882a593Smuzhiyun }
4475*4882a593Smuzhiyun 
ixgbevf_xdp(struct net_device * dev,struct netdev_bpf * xdp)4476*4882a593Smuzhiyun static int ixgbevf_xdp(struct net_device *dev, struct netdev_bpf *xdp)
4477*4882a593Smuzhiyun {
4478*4882a593Smuzhiyun 	switch (xdp->command) {
4479*4882a593Smuzhiyun 	case XDP_SETUP_PROG:
4480*4882a593Smuzhiyun 		return ixgbevf_xdp_setup(dev, xdp->prog);
4481*4882a593Smuzhiyun 	default:
4482*4882a593Smuzhiyun 		return -EINVAL;
4483*4882a593Smuzhiyun 	}
4484*4882a593Smuzhiyun }
4485*4882a593Smuzhiyun 
4486*4882a593Smuzhiyun static const struct net_device_ops ixgbevf_netdev_ops = {
4487*4882a593Smuzhiyun 	.ndo_open		= ixgbevf_open,
4488*4882a593Smuzhiyun 	.ndo_stop		= ixgbevf_close,
4489*4882a593Smuzhiyun 	.ndo_start_xmit		= ixgbevf_xmit_frame,
4490*4882a593Smuzhiyun 	.ndo_set_rx_mode	= ixgbevf_set_rx_mode,
4491*4882a593Smuzhiyun 	.ndo_get_stats64	= ixgbevf_get_stats,
4492*4882a593Smuzhiyun 	.ndo_validate_addr	= eth_validate_addr,
4493*4882a593Smuzhiyun 	.ndo_set_mac_address	= ixgbevf_set_mac,
4494*4882a593Smuzhiyun 	.ndo_change_mtu		= ixgbevf_change_mtu,
4495*4882a593Smuzhiyun 	.ndo_tx_timeout		= ixgbevf_tx_timeout,
4496*4882a593Smuzhiyun 	.ndo_vlan_rx_add_vid	= ixgbevf_vlan_rx_add_vid,
4497*4882a593Smuzhiyun 	.ndo_vlan_rx_kill_vid	= ixgbevf_vlan_rx_kill_vid,
4498*4882a593Smuzhiyun 	.ndo_features_check	= ixgbevf_features_check,
4499*4882a593Smuzhiyun 	.ndo_bpf		= ixgbevf_xdp,
4500*4882a593Smuzhiyun };
4501*4882a593Smuzhiyun 
ixgbevf_assign_netdev_ops(struct net_device * dev)4502*4882a593Smuzhiyun static void ixgbevf_assign_netdev_ops(struct net_device *dev)
4503*4882a593Smuzhiyun {
4504*4882a593Smuzhiyun 	dev->netdev_ops = &ixgbevf_netdev_ops;
4505*4882a593Smuzhiyun 	ixgbevf_set_ethtool_ops(dev);
4506*4882a593Smuzhiyun 	dev->watchdog_timeo = 5 * HZ;
4507*4882a593Smuzhiyun }
4508*4882a593Smuzhiyun 
4509*4882a593Smuzhiyun /**
4510*4882a593Smuzhiyun  * ixgbevf_probe - Device Initialization Routine
4511*4882a593Smuzhiyun  * @pdev: PCI device information struct
4512*4882a593Smuzhiyun  * @ent: entry in ixgbevf_pci_tbl
4513*4882a593Smuzhiyun  *
4514*4882a593Smuzhiyun  * Returns 0 on success, negative on failure
4515*4882a593Smuzhiyun  *
4516*4882a593Smuzhiyun  * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
4517*4882a593Smuzhiyun  * The OS initialization, configuring of the adapter private structure,
4518*4882a593Smuzhiyun  * and a hardware reset occur.
4519*4882a593Smuzhiyun  **/
ixgbevf_probe(struct pci_dev * pdev,const struct pci_device_id * ent)4520*4882a593Smuzhiyun static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4521*4882a593Smuzhiyun {
4522*4882a593Smuzhiyun 	struct net_device *netdev;
4523*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = NULL;
4524*4882a593Smuzhiyun 	struct ixgbe_hw *hw = NULL;
4525*4882a593Smuzhiyun 	const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
4526*4882a593Smuzhiyun 	int err, pci_using_dac;
4527*4882a593Smuzhiyun 	bool disable_dev = false;
4528*4882a593Smuzhiyun 
4529*4882a593Smuzhiyun 	err = pci_enable_device(pdev);
4530*4882a593Smuzhiyun 	if (err)
4531*4882a593Smuzhiyun 		return err;
4532*4882a593Smuzhiyun 
4533*4882a593Smuzhiyun 	if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
4534*4882a593Smuzhiyun 		pci_using_dac = 1;
4535*4882a593Smuzhiyun 	} else {
4536*4882a593Smuzhiyun 		err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
4537*4882a593Smuzhiyun 		if (err) {
4538*4882a593Smuzhiyun 			dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
4539*4882a593Smuzhiyun 			goto err_dma;
4540*4882a593Smuzhiyun 		}
4541*4882a593Smuzhiyun 		pci_using_dac = 0;
4542*4882a593Smuzhiyun 	}
4543*4882a593Smuzhiyun 
4544*4882a593Smuzhiyun 	err = pci_request_regions(pdev, ixgbevf_driver_name);
4545*4882a593Smuzhiyun 	if (err) {
4546*4882a593Smuzhiyun 		dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4547*4882a593Smuzhiyun 		goto err_pci_reg;
4548*4882a593Smuzhiyun 	}
4549*4882a593Smuzhiyun 
4550*4882a593Smuzhiyun 	pci_set_master(pdev);
4551*4882a593Smuzhiyun 
4552*4882a593Smuzhiyun 	netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
4553*4882a593Smuzhiyun 				   MAX_TX_QUEUES);
4554*4882a593Smuzhiyun 	if (!netdev) {
4555*4882a593Smuzhiyun 		err = -ENOMEM;
4556*4882a593Smuzhiyun 		goto err_alloc_etherdev;
4557*4882a593Smuzhiyun 	}
4558*4882a593Smuzhiyun 
4559*4882a593Smuzhiyun 	SET_NETDEV_DEV(netdev, &pdev->dev);
4560*4882a593Smuzhiyun 
4561*4882a593Smuzhiyun 	adapter = netdev_priv(netdev);
4562*4882a593Smuzhiyun 
4563*4882a593Smuzhiyun 	adapter->netdev = netdev;
4564*4882a593Smuzhiyun 	adapter->pdev = pdev;
4565*4882a593Smuzhiyun 	hw = &adapter->hw;
4566*4882a593Smuzhiyun 	hw->back = adapter;
4567*4882a593Smuzhiyun 	adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
4568*4882a593Smuzhiyun 
4569*4882a593Smuzhiyun 	/* call save state here in standalone driver because it relies on
4570*4882a593Smuzhiyun 	 * adapter struct to exist, and needs to call netdev_priv
4571*4882a593Smuzhiyun 	 */
4572*4882a593Smuzhiyun 	pci_save_state(pdev);
4573*4882a593Smuzhiyun 
4574*4882a593Smuzhiyun 	hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4575*4882a593Smuzhiyun 			      pci_resource_len(pdev, 0));
4576*4882a593Smuzhiyun 	adapter->io_addr = hw->hw_addr;
4577*4882a593Smuzhiyun 	if (!hw->hw_addr) {
4578*4882a593Smuzhiyun 		err = -EIO;
4579*4882a593Smuzhiyun 		goto err_ioremap;
4580*4882a593Smuzhiyun 	}
4581*4882a593Smuzhiyun 
4582*4882a593Smuzhiyun 	ixgbevf_assign_netdev_ops(netdev);
4583*4882a593Smuzhiyun 
4584*4882a593Smuzhiyun 	/* Setup HW API */
4585*4882a593Smuzhiyun 	memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4586*4882a593Smuzhiyun 	hw->mac.type  = ii->mac;
4587*4882a593Smuzhiyun 
4588*4882a593Smuzhiyun 	memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
4589*4882a593Smuzhiyun 	       sizeof(struct ixgbe_mbx_operations));
4590*4882a593Smuzhiyun 
4591*4882a593Smuzhiyun 	/* setup the private structure */
4592*4882a593Smuzhiyun 	err = ixgbevf_sw_init(adapter);
4593*4882a593Smuzhiyun 	if (err)
4594*4882a593Smuzhiyun 		goto err_sw_init;
4595*4882a593Smuzhiyun 
4596*4882a593Smuzhiyun 	/* The HW MAC address was set and/or determined in sw_init */
4597*4882a593Smuzhiyun 	if (!is_valid_ether_addr(netdev->dev_addr)) {
4598*4882a593Smuzhiyun 		pr_err("invalid MAC address\n");
4599*4882a593Smuzhiyun 		err = -EIO;
4600*4882a593Smuzhiyun 		goto err_sw_init;
4601*4882a593Smuzhiyun 	}
4602*4882a593Smuzhiyun 
4603*4882a593Smuzhiyun 	netdev->hw_features = NETIF_F_SG |
4604*4882a593Smuzhiyun 			      NETIF_F_TSO |
4605*4882a593Smuzhiyun 			      NETIF_F_TSO6 |
4606*4882a593Smuzhiyun 			      NETIF_F_RXCSUM |
4607*4882a593Smuzhiyun 			      NETIF_F_HW_CSUM |
4608*4882a593Smuzhiyun 			      NETIF_F_SCTP_CRC;
4609*4882a593Smuzhiyun 
4610*4882a593Smuzhiyun #define IXGBEVF_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
4611*4882a593Smuzhiyun 				      NETIF_F_GSO_GRE_CSUM | \
4612*4882a593Smuzhiyun 				      NETIF_F_GSO_IPXIP4 | \
4613*4882a593Smuzhiyun 				      NETIF_F_GSO_IPXIP6 | \
4614*4882a593Smuzhiyun 				      NETIF_F_GSO_UDP_TUNNEL | \
4615*4882a593Smuzhiyun 				      NETIF_F_GSO_UDP_TUNNEL_CSUM)
4616*4882a593Smuzhiyun 
4617*4882a593Smuzhiyun 	netdev->gso_partial_features = IXGBEVF_GSO_PARTIAL_FEATURES;
4618*4882a593Smuzhiyun 	netdev->hw_features |= NETIF_F_GSO_PARTIAL |
4619*4882a593Smuzhiyun 			       IXGBEVF_GSO_PARTIAL_FEATURES;
4620*4882a593Smuzhiyun 
4621*4882a593Smuzhiyun 	netdev->features = netdev->hw_features;
4622*4882a593Smuzhiyun 
4623*4882a593Smuzhiyun 	if (pci_using_dac)
4624*4882a593Smuzhiyun 		netdev->features |= NETIF_F_HIGHDMA;
4625*4882a593Smuzhiyun 
4626*4882a593Smuzhiyun 	netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
4627*4882a593Smuzhiyun 	netdev->mpls_features |= NETIF_F_SG |
4628*4882a593Smuzhiyun 				 NETIF_F_TSO |
4629*4882a593Smuzhiyun 				 NETIF_F_TSO6 |
4630*4882a593Smuzhiyun 				 NETIF_F_HW_CSUM;
4631*4882a593Smuzhiyun 	netdev->mpls_features |= IXGBEVF_GSO_PARTIAL_FEATURES;
4632*4882a593Smuzhiyun 	netdev->hw_enc_features |= netdev->vlan_features;
4633*4882a593Smuzhiyun 
4634*4882a593Smuzhiyun 	/* set this bit last since it cannot be part of vlan_features */
4635*4882a593Smuzhiyun 	netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
4636*4882a593Smuzhiyun 			    NETIF_F_HW_VLAN_CTAG_RX |
4637*4882a593Smuzhiyun 			    NETIF_F_HW_VLAN_CTAG_TX;
4638*4882a593Smuzhiyun 
4639*4882a593Smuzhiyun 	netdev->priv_flags |= IFF_UNICAST_FLT;
4640*4882a593Smuzhiyun 
4641*4882a593Smuzhiyun 	/* MTU range: 68 - 1504 or 9710 */
4642*4882a593Smuzhiyun 	netdev->min_mtu = ETH_MIN_MTU;
4643*4882a593Smuzhiyun 	switch (adapter->hw.api_version) {
4644*4882a593Smuzhiyun 	case ixgbe_mbox_api_11:
4645*4882a593Smuzhiyun 	case ixgbe_mbox_api_12:
4646*4882a593Smuzhiyun 	case ixgbe_mbox_api_13:
4647*4882a593Smuzhiyun 	case ixgbe_mbox_api_14:
4648*4882a593Smuzhiyun 		netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4649*4882a593Smuzhiyun 				  (ETH_HLEN + ETH_FCS_LEN);
4650*4882a593Smuzhiyun 		break;
4651*4882a593Smuzhiyun 	default:
4652*4882a593Smuzhiyun 		if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
4653*4882a593Smuzhiyun 			netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4654*4882a593Smuzhiyun 					  (ETH_HLEN + ETH_FCS_LEN);
4655*4882a593Smuzhiyun 		else
4656*4882a593Smuzhiyun 			netdev->max_mtu = ETH_DATA_LEN + ETH_FCS_LEN;
4657*4882a593Smuzhiyun 		break;
4658*4882a593Smuzhiyun 	}
4659*4882a593Smuzhiyun 
4660*4882a593Smuzhiyun 	if (IXGBE_REMOVED(hw->hw_addr)) {
4661*4882a593Smuzhiyun 		err = -EIO;
4662*4882a593Smuzhiyun 		goto err_sw_init;
4663*4882a593Smuzhiyun 	}
4664*4882a593Smuzhiyun 
4665*4882a593Smuzhiyun 	timer_setup(&adapter->service_timer, ixgbevf_service_timer, 0);
4666*4882a593Smuzhiyun 
4667*4882a593Smuzhiyun 	INIT_WORK(&adapter->service_task, ixgbevf_service_task);
4668*4882a593Smuzhiyun 	set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
4669*4882a593Smuzhiyun 	clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
4670*4882a593Smuzhiyun 
4671*4882a593Smuzhiyun 	err = ixgbevf_init_interrupt_scheme(adapter);
4672*4882a593Smuzhiyun 	if (err)
4673*4882a593Smuzhiyun 		goto err_sw_init;
4674*4882a593Smuzhiyun 
4675*4882a593Smuzhiyun 	strcpy(netdev->name, "eth%d");
4676*4882a593Smuzhiyun 
4677*4882a593Smuzhiyun 	err = register_netdev(netdev);
4678*4882a593Smuzhiyun 	if (err)
4679*4882a593Smuzhiyun 		goto err_register;
4680*4882a593Smuzhiyun 
4681*4882a593Smuzhiyun 	pci_set_drvdata(pdev, netdev);
4682*4882a593Smuzhiyun 	netif_carrier_off(netdev);
4683*4882a593Smuzhiyun 	ixgbevf_init_ipsec_offload(adapter);
4684*4882a593Smuzhiyun 
4685*4882a593Smuzhiyun 	ixgbevf_init_last_counter_stats(adapter);
4686*4882a593Smuzhiyun 
4687*4882a593Smuzhiyun 	/* print the VF info */
4688*4882a593Smuzhiyun 	dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
4689*4882a593Smuzhiyun 	dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
4690*4882a593Smuzhiyun 
4691*4882a593Smuzhiyun 	switch (hw->mac.type) {
4692*4882a593Smuzhiyun 	case ixgbe_mac_X550_vf:
4693*4882a593Smuzhiyun 		dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
4694*4882a593Smuzhiyun 		break;
4695*4882a593Smuzhiyun 	case ixgbe_mac_X540_vf:
4696*4882a593Smuzhiyun 		dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
4697*4882a593Smuzhiyun 		break;
4698*4882a593Smuzhiyun 	case ixgbe_mac_82599_vf:
4699*4882a593Smuzhiyun 	default:
4700*4882a593Smuzhiyun 		dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
4701*4882a593Smuzhiyun 		break;
4702*4882a593Smuzhiyun 	}
4703*4882a593Smuzhiyun 
4704*4882a593Smuzhiyun 	return 0;
4705*4882a593Smuzhiyun 
4706*4882a593Smuzhiyun err_register:
4707*4882a593Smuzhiyun 	ixgbevf_clear_interrupt_scheme(adapter);
4708*4882a593Smuzhiyun err_sw_init:
4709*4882a593Smuzhiyun 	ixgbevf_reset_interrupt_capability(adapter);
4710*4882a593Smuzhiyun 	iounmap(adapter->io_addr);
4711*4882a593Smuzhiyun 	kfree(adapter->rss_key);
4712*4882a593Smuzhiyun err_ioremap:
4713*4882a593Smuzhiyun 	disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
4714*4882a593Smuzhiyun 	free_netdev(netdev);
4715*4882a593Smuzhiyun err_alloc_etherdev:
4716*4882a593Smuzhiyun 	pci_release_regions(pdev);
4717*4882a593Smuzhiyun err_pci_reg:
4718*4882a593Smuzhiyun err_dma:
4719*4882a593Smuzhiyun 	if (!adapter || disable_dev)
4720*4882a593Smuzhiyun 		pci_disable_device(pdev);
4721*4882a593Smuzhiyun 	return err;
4722*4882a593Smuzhiyun }
4723*4882a593Smuzhiyun 
4724*4882a593Smuzhiyun /**
4725*4882a593Smuzhiyun  * ixgbevf_remove - Device Removal Routine
4726*4882a593Smuzhiyun  * @pdev: PCI device information struct
4727*4882a593Smuzhiyun  *
4728*4882a593Smuzhiyun  * ixgbevf_remove is called by the PCI subsystem to alert the driver
4729*4882a593Smuzhiyun  * that it should release a PCI device.  The could be caused by a
4730*4882a593Smuzhiyun  * Hot-Plug event, or because the driver is going to be removed from
4731*4882a593Smuzhiyun  * memory.
4732*4882a593Smuzhiyun  **/
ixgbevf_remove(struct pci_dev * pdev)4733*4882a593Smuzhiyun static void ixgbevf_remove(struct pci_dev *pdev)
4734*4882a593Smuzhiyun {
4735*4882a593Smuzhiyun 	struct net_device *netdev = pci_get_drvdata(pdev);
4736*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter;
4737*4882a593Smuzhiyun 	bool disable_dev;
4738*4882a593Smuzhiyun 
4739*4882a593Smuzhiyun 	if (!netdev)
4740*4882a593Smuzhiyun 		return;
4741*4882a593Smuzhiyun 
4742*4882a593Smuzhiyun 	adapter = netdev_priv(netdev);
4743*4882a593Smuzhiyun 
4744*4882a593Smuzhiyun 	set_bit(__IXGBEVF_REMOVING, &adapter->state);
4745*4882a593Smuzhiyun 	cancel_work_sync(&adapter->service_task);
4746*4882a593Smuzhiyun 
4747*4882a593Smuzhiyun 	if (netdev->reg_state == NETREG_REGISTERED)
4748*4882a593Smuzhiyun 		unregister_netdev(netdev);
4749*4882a593Smuzhiyun 
4750*4882a593Smuzhiyun 	ixgbevf_stop_ipsec_offload(adapter);
4751*4882a593Smuzhiyun 	ixgbevf_clear_interrupt_scheme(adapter);
4752*4882a593Smuzhiyun 	ixgbevf_reset_interrupt_capability(adapter);
4753*4882a593Smuzhiyun 
4754*4882a593Smuzhiyun 	iounmap(adapter->io_addr);
4755*4882a593Smuzhiyun 	pci_release_regions(pdev);
4756*4882a593Smuzhiyun 
4757*4882a593Smuzhiyun 	hw_dbg(&adapter->hw, "Remove complete\n");
4758*4882a593Smuzhiyun 
4759*4882a593Smuzhiyun 	kfree(adapter->rss_key);
4760*4882a593Smuzhiyun 	disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
4761*4882a593Smuzhiyun 	free_netdev(netdev);
4762*4882a593Smuzhiyun 
4763*4882a593Smuzhiyun 	if (disable_dev)
4764*4882a593Smuzhiyun 		pci_disable_device(pdev);
4765*4882a593Smuzhiyun }
4766*4882a593Smuzhiyun 
4767*4882a593Smuzhiyun /**
4768*4882a593Smuzhiyun  * ixgbevf_io_error_detected - called when PCI error is detected
4769*4882a593Smuzhiyun  * @pdev: Pointer to PCI device
4770*4882a593Smuzhiyun  * @state: The current pci connection state
4771*4882a593Smuzhiyun  *
4772*4882a593Smuzhiyun  * This function is called after a PCI bus error affecting
4773*4882a593Smuzhiyun  * this device has been detected.
4774*4882a593Smuzhiyun  **/
ixgbevf_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)4775*4882a593Smuzhiyun static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
4776*4882a593Smuzhiyun 						  pci_channel_state_t state)
4777*4882a593Smuzhiyun {
4778*4882a593Smuzhiyun 	struct net_device *netdev = pci_get_drvdata(pdev);
4779*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4780*4882a593Smuzhiyun 
4781*4882a593Smuzhiyun 	if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
4782*4882a593Smuzhiyun 		return PCI_ERS_RESULT_DISCONNECT;
4783*4882a593Smuzhiyun 
4784*4882a593Smuzhiyun 	rtnl_lock();
4785*4882a593Smuzhiyun 	netif_device_detach(netdev);
4786*4882a593Smuzhiyun 
4787*4882a593Smuzhiyun 	if (netif_running(netdev))
4788*4882a593Smuzhiyun 		ixgbevf_close_suspend(adapter);
4789*4882a593Smuzhiyun 
4790*4882a593Smuzhiyun 	if (state == pci_channel_io_perm_failure) {
4791*4882a593Smuzhiyun 		rtnl_unlock();
4792*4882a593Smuzhiyun 		return PCI_ERS_RESULT_DISCONNECT;
4793*4882a593Smuzhiyun 	}
4794*4882a593Smuzhiyun 
4795*4882a593Smuzhiyun 	if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4796*4882a593Smuzhiyun 		pci_disable_device(pdev);
4797*4882a593Smuzhiyun 	rtnl_unlock();
4798*4882a593Smuzhiyun 
4799*4882a593Smuzhiyun 	/* Request a slot slot reset. */
4800*4882a593Smuzhiyun 	return PCI_ERS_RESULT_NEED_RESET;
4801*4882a593Smuzhiyun }
4802*4882a593Smuzhiyun 
4803*4882a593Smuzhiyun /**
4804*4882a593Smuzhiyun  * ixgbevf_io_slot_reset - called after the pci bus has been reset.
4805*4882a593Smuzhiyun  * @pdev: Pointer to PCI device
4806*4882a593Smuzhiyun  *
4807*4882a593Smuzhiyun  * Restart the card from scratch, as if from a cold-boot. Implementation
4808*4882a593Smuzhiyun  * resembles the first-half of the ixgbevf_resume routine.
4809*4882a593Smuzhiyun  **/
ixgbevf_io_slot_reset(struct pci_dev * pdev)4810*4882a593Smuzhiyun static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
4811*4882a593Smuzhiyun {
4812*4882a593Smuzhiyun 	struct net_device *netdev = pci_get_drvdata(pdev);
4813*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4814*4882a593Smuzhiyun 
4815*4882a593Smuzhiyun 	if (pci_enable_device_mem(pdev)) {
4816*4882a593Smuzhiyun 		dev_err(&pdev->dev,
4817*4882a593Smuzhiyun 			"Cannot re-enable PCI device after reset.\n");
4818*4882a593Smuzhiyun 		return PCI_ERS_RESULT_DISCONNECT;
4819*4882a593Smuzhiyun 	}
4820*4882a593Smuzhiyun 
4821*4882a593Smuzhiyun 	adapter->hw.hw_addr = adapter->io_addr;
4822*4882a593Smuzhiyun 	smp_mb__before_atomic();
4823*4882a593Smuzhiyun 	clear_bit(__IXGBEVF_DISABLED, &adapter->state);
4824*4882a593Smuzhiyun 	pci_set_master(pdev);
4825*4882a593Smuzhiyun 
4826*4882a593Smuzhiyun 	ixgbevf_reset(adapter);
4827*4882a593Smuzhiyun 
4828*4882a593Smuzhiyun 	return PCI_ERS_RESULT_RECOVERED;
4829*4882a593Smuzhiyun }
4830*4882a593Smuzhiyun 
4831*4882a593Smuzhiyun /**
4832*4882a593Smuzhiyun  * ixgbevf_io_resume - called when traffic can start flowing again.
4833*4882a593Smuzhiyun  * @pdev: Pointer to PCI device
4834*4882a593Smuzhiyun  *
4835*4882a593Smuzhiyun  * This callback is called when the error recovery driver tells us that
4836*4882a593Smuzhiyun  * its OK to resume normal operation. Implementation resembles the
4837*4882a593Smuzhiyun  * second-half of the ixgbevf_resume routine.
4838*4882a593Smuzhiyun  **/
ixgbevf_io_resume(struct pci_dev * pdev)4839*4882a593Smuzhiyun static void ixgbevf_io_resume(struct pci_dev *pdev)
4840*4882a593Smuzhiyun {
4841*4882a593Smuzhiyun 	struct net_device *netdev = pci_get_drvdata(pdev);
4842*4882a593Smuzhiyun 
4843*4882a593Smuzhiyun 	rtnl_lock();
4844*4882a593Smuzhiyun 	if (netif_running(netdev))
4845*4882a593Smuzhiyun 		ixgbevf_open(netdev);
4846*4882a593Smuzhiyun 
4847*4882a593Smuzhiyun 	netif_device_attach(netdev);
4848*4882a593Smuzhiyun 	rtnl_unlock();
4849*4882a593Smuzhiyun }
4850*4882a593Smuzhiyun 
4851*4882a593Smuzhiyun /* PCI Error Recovery (ERS) */
4852*4882a593Smuzhiyun static const struct pci_error_handlers ixgbevf_err_handler = {
4853*4882a593Smuzhiyun 	.error_detected = ixgbevf_io_error_detected,
4854*4882a593Smuzhiyun 	.slot_reset = ixgbevf_io_slot_reset,
4855*4882a593Smuzhiyun 	.resume = ixgbevf_io_resume,
4856*4882a593Smuzhiyun };
4857*4882a593Smuzhiyun 
4858*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(ixgbevf_pm_ops, ixgbevf_suspend, ixgbevf_resume);
4859*4882a593Smuzhiyun 
4860*4882a593Smuzhiyun static struct pci_driver ixgbevf_driver = {
4861*4882a593Smuzhiyun 	.name		= ixgbevf_driver_name,
4862*4882a593Smuzhiyun 	.id_table	= ixgbevf_pci_tbl,
4863*4882a593Smuzhiyun 	.probe		= ixgbevf_probe,
4864*4882a593Smuzhiyun 	.remove		= ixgbevf_remove,
4865*4882a593Smuzhiyun 
4866*4882a593Smuzhiyun 	/* Power Management Hooks */
4867*4882a593Smuzhiyun 	.driver.pm	= &ixgbevf_pm_ops,
4868*4882a593Smuzhiyun 
4869*4882a593Smuzhiyun 	.shutdown	= ixgbevf_shutdown,
4870*4882a593Smuzhiyun 	.err_handler	= &ixgbevf_err_handler
4871*4882a593Smuzhiyun };
4872*4882a593Smuzhiyun 
4873*4882a593Smuzhiyun /**
4874*4882a593Smuzhiyun  * ixgbevf_init_module - Driver Registration Routine
4875*4882a593Smuzhiyun  *
4876*4882a593Smuzhiyun  * ixgbevf_init_module is the first routine called when the driver is
4877*4882a593Smuzhiyun  * loaded. All it does is register with the PCI subsystem.
4878*4882a593Smuzhiyun  **/
ixgbevf_init_module(void)4879*4882a593Smuzhiyun static int __init ixgbevf_init_module(void)
4880*4882a593Smuzhiyun {
4881*4882a593Smuzhiyun 	int err;
4882*4882a593Smuzhiyun 
4883*4882a593Smuzhiyun 	pr_info("%s\n", ixgbevf_driver_string);
4884*4882a593Smuzhiyun 	pr_info("%s\n", ixgbevf_copyright);
4885*4882a593Smuzhiyun 	ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
4886*4882a593Smuzhiyun 	if (!ixgbevf_wq) {
4887*4882a593Smuzhiyun 		pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
4888*4882a593Smuzhiyun 		return -ENOMEM;
4889*4882a593Smuzhiyun 	}
4890*4882a593Smuzhiyun 
4891*4882a593Smuzhiyun 	err = pci_register_driver(&ixgbevf_driver);
4892*4882a593Smuzhiyun 	if (err) {
4893*4882a593Smuzhiyun 		destroy_workqueue(ixgbevf_wq);
4894*4882a593Smuzhiyun 		return err;
4895*4882a593Smuzhiyun 	}
4896*4882a593Smuzhiyun 
4897*4882a593Smuzhiyun 	return 0;
4898*4882a593Smuzhiyun }
4899*4882a593Smuzhiyun 
4900*4882a593Smuzhiyun module_init(ixgbevf_init_module);
4901*4882a593Smuzhiyun 
4902*4882a593Smuzhiyun /**
4903*4882a593Smuzhiyun  * ixgbevf_exit_module - Driver Exit Cleanup Routine
4904*4882a593Smuzhiyun  *
4905*4882a593Smuzhiyun  * ixgbevf_exit_module is called just before the driver is removed
4906*4882a593Smuzhiyun  * from memory.
4907*4882a593Smuzhiyun  **/
ixgbevf_exit_module(void)4908*4882a593Smuzhiyun static void __exit ixgbevf_exit_module(void)
4909*4882a593Smuzhiyun {
4910*4882a593Smuzhiyun 	pci_unregister_driver(&ixgbevf_driver);
4911*4882a593Smuzhiyun 	if (ixgbevf_wq) {
4912*4882a593Smuzhiyun 		destroy_workqueue(ixgbevf_wq);
4913*4882a593Smuzhiyun 		ixgbevf_wq = NULL;
4914*4882a593Smuzhiyun 	}
4915*4882a593Smuzhiyun }
4916*4882a593Smuzhiyun 
4917*4882a593Smuzhiyun #ifdef DEBUG
4918*4882a593Smuzhiyun /**
4919*4882a593Smuzhiyun  * ixgbevf_get_hw_dev_name - return device name string
4920*4882a593Smuzhiyun  * used by hardware layer to print debugging information
4921*4882a593Smuzhiyun  * @hw: pointer to private hardware struct
4922*4882a593Smuzhiyun  **/
ixgbevf_get_hw_dev_name(struct ixgbe_hw * hw)4923*4882a593Smuzhiyun char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4924*4882a593Smuzhiyun {
4925*4882a593Smuzhiyun 	struct ixgbevf_adapter *adapter = hw->back;
4926*4882a593Smuzhiyun 
4927*4882a593Smuzhiyun 	return adapter->netdev->name;
4928*4882a593Smuzhiyun }
4929*4882a593Smuzhiyun 
4930*4882a593Smuzhiyun #endif
4931*4882a593Smuzhiyun module_exit(ixgbevf_exit_module);
4932*4882a593Smuzhiyun 
4933*4882a593Smuzhiyun /* ixgbevf_main.c */
4934