1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* Copyright(c) 1999 - 2008 Intel Corporation. */
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/prefetch.h>
7*4882a593Smuzhiyun #include "ixgb.h"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun char ixgb_driver_name[] = "ixgb";
10*4882a593Smuzhiyun static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun static const char ixgb_copyright[] = "Copyright (c) 1999-2008 Intel Corporation.";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define IXGB_CB_LENGTH 256
15*4882a593Smuzhiyun static unsigned int copybreak __read_mostly = IXGB_CB_LENGTH;
16*4882a593Smuzhiyun module_param(copybreak, uint, 0644);
17*4882a593Smuzhiyun MODULE_PARM_DESC(copybreak,
18*4882a593Smuzhiyun "Maximum size of packet that is copied to a new buffer on receive");
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /* ixgb_pci_tbl - PCI Device ID Table
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * Wildcard entries (PCI_ANY_ID) should come last
23*4882a593Smuzhiyun * Last entry must be all 0s
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
26*4882a593Smuzhiyun * Class, Class Mask, private data (not used) }
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun static const struct pci_device_id ixgb_pci_tbl[] = {
29*4882a593Smuzhiyun {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX,
30*4882a593Smuzhiyun PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
31*4882a593Smuzhiyun {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX_CX4,
32*4882a593Smuzhiyun PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
33*4882a593Smuzhiyun {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX_SR,
34*4882a593Smuzhiyun PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
35*4882a593Smuzhiyun {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX_LR,
36*4882a593Smuzhiyun PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun /* required last entry */
39*4882a593Smuzhiyun {0,}
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /* Local Function Prototypes */
45*4882a593Smuzhiyun static int ixgb_init_module(void);
46*4882a593Smuzhiyun static void ixgb_exit_module(void);
47*4882a593Smuzhiyun static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
48*4882a593Smuzhiyun static void ixgb_remove(struct pci_dev *pdev);
49*4882a593Smuzhiyun static int ixgb_sw_init(struct ixgb_adapter *adapter);
50*4882a593Smuzhiyun static int ixgb_open(struct net_device *netdev);
51*4882a593Smuzhiyun static int ixgb_close(struct net_device *netdev);
52*4882a593Smuzhiyun static void ixgb_configure_tx(struct ixgb_adapter *adapter);
53*4882a593Smuzhiyun static void ixgb_configure_rx(struct ixgb_adapter *adapter);
54*4882a593Smuzhiyun static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
55*4882a593Smuzhiyun static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
56*4882a593Smuzhiyun static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
57*4882a593Smuzhiyun static void ixgb_set_multi(struct net_device *netdev);
58*4882a593Smuzhiyun static void ixgb_watchdog(struct timer_list *t);
59*4882a593Smuzhiyun static netdev_tx_t ixgb_xmit_frame(struct sk_buff *skb,
60*4882a593Smuzhiyun struct net_device *netdev);
61*4882a593Smuzhiyun static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
62*4882a593Smuzhiyun static int ixgb_set_mac(struct net_device *netdev, void *p);
63*4882a593Smuzhiyun static irqreturn_t ixgb_intr(int irq, void *data);
64*4882a593Smuzhiyun static bool ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun static int ixgb_clean(struct napi_struct *, int);
67*4882a593Smuzhiyun static bool ixgb_clean_rx_irq(struct ixgb_adapter *, int *, int);
68*4882a593Smuzhiyun static void ixgb_alloc_rx_buffers(struct ixgb_adapter *, int);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun static void ixgb_tx_timeout(struct net_device *dev, unsigned int txqueue);
71*4882a593Smuzhiyun static void ixgb_tx_timeout_task(struct work_struct *work);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun static void ixgb_vlan_strip_enable(struct ixgb_adapter *adapter);
74*4882a593Smuzhiyun static void ixgb_vlan_strip_disable(struct ixgb_adapter *adapter);
75*4882a593Smuzhiyun static int ixgb_vlan_rx_add_vid(struct net_device *netdev,
76*4882a593Smuzhiyun __be16 proto, u16 vid);
77*4882a593Smuzhiyun static int ixgb_vlan_rx_kill_vid(struct net_device *netdev,
78*4882a593Smuzhiyun __be16 proto, u16 vid);
79*4882a593Smuzhiyun static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
82*4882a593Smuzhiyun pci_channel_state_t state);
83*4882a593Smuzhiyun static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
84*4882a593Smuzhiyun static void ixgb_io_resume (struct pci_dev *pdev);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun static const struct pci_error_handlers ixgb_err_handler = {
87*4882a593Smuzhiyun .error_detected = ixgb_io_error_detected,
88*4882a593Smuzhiyun .slot_reset = ixgb_io_slot_reset,
89*4882a593Smuzhiyun .resume = ixgb_io_resume,
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun static struct pci_driver ixgb_driver = {
93*4882a593Smuzhiyun .name = ixgb_driver_name,
94*4882a593Smuzhiyun .id_table = ixgb_pci_tbl,
95*4882a593Smuzhiyun .probe = ixgb_probe,
96*4882a593Smuzhiyun .remove = ixgb_remove,
97*4882a593Smuzhiyun .err_handler = &ixgb_err_handler
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
101*4882a593Smuzhiyun MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
102*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
105*4882a593Smuzhiyun static int debug = -1;
106*4882a593Smuzhiyun module_param(debug, int, 0);
107*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun /**
110*4882a593Smuzhiyun * ixgb_init_module - Driver Registration Routine
111*4882a593Smuzhiyun *
112*4882a593Smuzhiyun * ixgb_init_module is the first routine called when the driver is
113*4882a593Smuzhiyun * loaded. All it does is register with the PCI subsystem.
114*4882a593Smuzhiyun **/
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun static int __init
ixgb_init_module(void)117*4882a593Smuzhiyun ixgb_init_module(void)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun pr_info("%s\n", ixgb_driver_string);
120*4882a593Smuzhiyun pr_info("%s\n", ixgb_copyright);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun return pci_register_driver(&ixgb_driver);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun module_init(ixgb_init_module);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /**
128*4882a593Smuzhiyun * ixgb_exit_module - Driver Exit Cleanup Routine
129*4882a593Smuzhiyun *
130*4882a593Smuzhiyun * ixgb_exit_module is called just before the driver is removed
131*4882a593Smuzhiyun * from memory.
132*4882a593Smuzhiyun **/
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun static void __exit
ixgb_exit_module(void)135*4882a593Smuzhiyun ixgb_exit_module(void)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun pci_unregister_driver(&ixgb_driver);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun module_exit(ixgb_exit_module);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun /**
143*4882a593Smuzhiyun * ixgb_irq_disable - Mask off interrupt generation on the NIC
144*4882a593Smuzhiyun * @adapter: board private structure
145*4882a593Smuzhiyun **/
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun static void
ixgb_irq_disable(struct ixgb_adapter * adapter)148*4882a593Smuzhiyun ixgb_irq_disable(struct ixgb_adapter *adapter)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
151*4882a593Smuzhiyun IXGB_WRITE_FLUSH(&adapter->hw);
152*4882a593Smuzhiyun synchronize_irq(adapter->pdev->irq);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /**
156*4882a593Smuzhiyun * ixgb_irq_enable - Enable default interrupt generation settings
157*4882a593Smuzhiyun * @adapter: board private structure
158*4882a593Smuzhiyun **/
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun static void
ixgb_irq_enable(struct ixgb_adapter * adapter)161*4882a593Smuzhiyun ixgb_irq_enable(struct ixgb_adapter *adapter)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun u32 val = IXGB_INT_RXT0 | IXGB_INT_RXDMT0 |
164*4882a593Smuzhiyun IXGB_INT_TXDW | IXGB_INT_LSC;
165*4882a593Smuzhiyun if (adapter->hw.subsystem_vendor_id == PCI_VENDOR_ID_SUN)
166*4882a593Smuzhiyun val |= IXGB_INT_GPI0;
167*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, IMS, val);
168*4882a593Smuzhiyun IXGB_WRITE_FLUSH(&adapter->hw);
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun int
ixgb_up(struct ixgb_adapter * adapter)172*4882a593Smuzhiyun ixgb_up(struct ixgb_adapter *adapter)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun struct net_device *netdev = adapter->netdev;
175*4882a593Smuzhiyun int err, irq_flags = IRQF_SHARED;
176*4882a593Smuzhiyun int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
177*4882a593Smuzhiyun struct ixgb_hw *hw = &adapter->hw;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /* hardware has been reset, we need to reload some things */
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun ixgb_rar_set(hw, netdev->dev_addr, 0);
182*4882a593Smuzhiyun ixgb_set_multi(netdev);
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun ixgb_restore_vlan(adapter);
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun ixgb_configure_tx(adapter);
187*4882a593Smuzhiyun ixgb_setup_rctl(adapter);
188*4882a593Smuzhiyun ixgb_configure_rx(adapter);
189*4882a593Smuzhiyun ixgb_alloc_rx_buffers(adapter, IXGB_DESC_UNUSED(&adapter->rx_ring));
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /* disable interrupts and get the hardware into a known state */
192*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun /* only enable MSI if bus is in PCI-X mode */
195*4882a593Smuzhiyun if (IXGB_READ_REG(&adapter->hw, STATUS) & IXGB_STATUS_PCIX_MODE) {
196*4882a593Smuzhiyun err = pci_enable_msi(adapter->pdev);
197*4882a593Smuzhiyun if (!err) {
198*4882a593Smuzhiyun adapter->have_msi = true;
199*4882a593Smuzhiyun irq_flags = 0;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun /* proceed to try to request regular interrupt */
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun err = request_irq(adapter->pdev->irq, ixgb_intr, irq_flags,
205*4882a593Smuzhiyun netdev->name, netdev);
206*4882a593Smuzhiyun if (err) {
207*4882a593Smuzhiyun if (adapter->have_msi)
208*4882a593Smuzhiyun pci_disable_msi(adapter->pdev);
209*4882a593Smuzhiyun netif_err(adapter, probe, adapter->netdev,
210*4882a593Smuzhiyun "Unable to allocate interrupt Error: %d\n", err);
211*4882a593Smuzhiyun return err;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun if ((hw->max_frame_size != max_frame) ||
215*4882a593Smuzhiyun (hw->max_frame_size !=
216*4882a593Smuzhiyun (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun hw->max_frame_size = max_frame;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun if (hw->max_frame_size >
223*4882a593Smuzhiyun IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
224*4882a593Smuzhiyun u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun if (!(ctrl0 & IXGB_CTRL0_JFE)) {
227*4882a593Smuzhiyun ctrl0 |= IXGB_CTRL0_JFE;
228*4882a593Smuzhiyun IXGB_WRITE_REG(hw, CTRL0, ctrl0);
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun clear_bit(__IXGB_DOWN, &adapter->flags);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun napi_enable(&adapter->napi);
236*4882a593Smuzhiyun ixgb_irq_enable(adapter);
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun netif_wake_queue(netdev);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun mod_timer(&adapter->watchdog_timer, jiffies);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun return 0;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun void
ixgb_down(struct ixgb_adapter * adapter,bool kill_watchdog)246*4882a593Smuzhiyun ixgb_down(struct ixgb_adapter *adapter, bool kill_watchdog)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun struct net_device *netdev = adapter->netdev;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun /* prevent the interrupt handler from restarting watchdog */
251*4882a593Smuzhiyun set_bit(__IXGB_DOWN, &adapter->flags);
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun netif_carrier_off(netdev);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun napi_disable(&adapter->napi);
256*4882a593Smuzhiyun /* waiting for NAPI to complete can re-enable interrupts */
257*4882a593Smuzhiyun ixgb_irq_disable(adapter);
258*4882a593Smuzhiyun free_irq(adapter->pdev->irq, netdev);
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun if (adapter->have_msi)
261*4882a593Smuzhiyun pci_disable_msi(adapter->pdev);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (kill_watchdog)
264*4882a593Smuzhiyun del_timer_sync(&adapter->watchdog_timer);
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun adapter->link_speed = 0;
267*4882a593Smuzhiyun adapter->link_duplex = 0;
268*4882a593Smuzhiyun netif_stop_queue(netdev);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun ixgb_reset(adapter);
271*4882a593Smuzhiyun ixgb_clean_tx_ring(adapter);
272*4882a593Smuzhiyun ixgb_clean_rx_ring(adapter);
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun void
ixgb_reset(struct ixgb_adapter * adapter)276*4882a593Smuzhiyun ixgb_reset(struct ixgb_adapter *adapter)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun struct ixgb_hw *hw = &adapter->hw;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun ixgb_adapter_stop(hw);
281*4882a593Smuzhiyun if (!ixgb_init_hw(hw))
282*4882a593Smuzhiyun netif_err(adapter, probe, adapter->netdev, "ixgb_init_hw failed\n");
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun /* restore frame size information */
285*4882a593Smuzhiyun IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
286*4882a593Smuzhiyun if (hw->max_frame_size >
287*4882a593Smuzhiyun IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
288*4882a593Smuzhiyun u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
289*4882a593Smuzhiyun if (!(ctrl0 & IXGB_CTRL0_JFE)) {
290*4882a593Smuzhiyun ctrl0 |= IXGB_CTRL0_JFE;
291*4882a593Smuzhiyun IXGB_WRITE_REG(hw, CTRL0, ctrl0);
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun static netdev_features_t
ixgb_fix_features(struct net_device * netdev,netdev_features_t features)297*4882a593Smuzhiyun ixgb_fix_features(struct net_device *netdev, netdev_features_t features)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun /*
300*4882a593Smuzhiyun * Tx VLAN insertion does not work per HW design when Rx stripping is
301*4882a593Smuzhiyun * disabled.
302*4882a593Smuzhiyun */
303*4882a593Smuzhiyun if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
304*4882a593Smuzhiyun features &= ~NETIF_F_HW_VLAN_CTAG_TX;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun return features;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun static int
ixgb_set_features(struct net_device * netdev,netdev_features_t features)310*4882a593Smuzhiyun ixgb_set_features(struct net_device *netdev, netdev_features_t features)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
313*4882a593Smuzhiyun netdev_features_t changed = features ^ netdev->features;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun if (!(changed & (NETIF_F_RXCSUM|NETIF_F_HW_VLAN_CTAG_RX)))
316*4882a593Smuzhiyun return 0;
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun if (netif_running(netdev)) {
321*4882a593Smuzhiyun ixgb_down(adapter, true);
322*4882a593Smuzhiyun ixgb_up(adapter);
323*4882a593Smuzhiyun ixgb_set_speed_duplex(netdev);
324*4882a593Smuzhiyun } else
325*4882a593Smuzhiyun ixgb_reset(adapter);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun return 0;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun static const struct net_device_ops ixgb_netdev_ops = {
332*4882a593Smuzhiyun .ndo_open = ixgb_open,
333*4882a593Smuzhiyun .ndo_stop = ixgb_close,
334*4882a593Smuzhiyun .ndo_start_xmit = ixgb_xmit_frame,
335*4882a593Smuzhiyun .ndo_set_rx_mode = ixgb_set_multi,
336*4882a593Smuzhiyun .ndo_validate_addr = eth_validate_addr,
337*4882a593Smuzhiyun .ndo_set_mac_address = ixgb_set_mac,
338*4882a593Smuzhiyun .ndo_change_mtu = ixgb_change_mtu,
339*4882a593Smuzhiyun .ndo_tx_timeout = ixgb_tx_timeout,
340*4882a593Smuzhiyun .ndo_vlan_rx_add_vid = ixgb_vlan_rx_add_vid,
341*4882a593Smuzhiyun .ndo_vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid,
342*4882a593Smuzhiyun .ndo_fix_features = ixgb_fix_features,
343*4882a593Smuzhiyun .ndo_set_features = ixgb_set_features,
344*4882a593Smuzhiyun };
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /**
347*4882a593Smuzhiyun * ixgb_probe - Device Initialization Routine
348*4882a593Smuzhiyun * @pdev: PCI device information struct
349*4882a593Smuzhiyun * @ent: entry in ixgb_pci_tbl
350*4882a593Smuzhiyun *
351*4882a593Smuzhiyun * Returns 0 on success, negative on failure
352*4882a593Smuzhiyun *
353*4882a593Smuzhiyun * ixgb_probe initializes an adapter identified by a pci_dev structure.
354*4882a593Smuzhiyun * The OS initialization, configuring of the adapter private structure,
355*4882a593Smuzhiyun * and a hardware reset occur.
356*4882a593Smuzhiyun **/
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun static int
ixgb_probe(struct pci_dev * pdev,const struct pci_device_id * ent)359*4882a593Smuzhiyun ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
360*4882a593Smuzhiyun {
361*4882a593Smuzhiyun struct net_device *netdev = NULL;
362*4882a593Smuzhiyun struct ixgb_adapter *adapter;
363*4882a593Smuzhiyun static int cards_found = 0;
364*4882a593Smuzhiyun int pci_using_dac;
365*4882a593Smuzhiyun int i;
366*4882a593Smuzhiyun int err;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun err = pci_enable_device(pdev);
369*4882a593Smuzhiyun if (err)
370*4882a593Smuzhiyun return err;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun pci_using_dac = 0;
373*4882a593Smuzhiyun err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
374*4882a593Smuzhiyun if (!err) {
375*4882a593Smuzhiyun pci_using_dac = 1;
376*4882a593Smuzhiyun } else {
377*4882a593Smuzhiyun err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
378*4882a593Smuzhiyun if (err) {
379*4882a593Smuzhiyun pr_err("No usable DMA configuration, aborting\n");
380*4882a593Smuzhiyun goto err_dma_mask;
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun err = pci_request_regions(pdev, ixgb_driver_name);
385*4882a593Smuzhiyun if (err)
386*4882a593Smuzhiyun goto err_request_regions;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun pci_set_master(pdev);
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
391*4882a593Smuzhiyun if (!netdev) {
392*4882a593Smuzhiyun err = -ENOMEM;
393*4882a593Smuzhiyun goto err_alloc_etherdev;
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun SET_NETDEV_DEV(netdev, &pdev->dev);
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun pci_set_drvdata(pdev, netdev);
399*4882a593Smuzhiyun adapter = netdev_priv(netdev);
400*4882a593Smuzhiyun adapter->netdev = netdev;
401*4882a593Smuzhiyun adapter->pdev = pdev;
402*4882a593Smuzhiyun adapter->hw.back = adapter;
403*4882a593Smuzhiyun adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun adapter->hw.hw_addr = pci_ioremap_bar(pdev, BAR_0);
406*4882a593Smuzhiyun if (!adapter->hw.hw_addr) {
407*4882a593Smuzhiyun err = -EIO;
408*4882a593Smuzhiyun goto err_ioremap;
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun for (i = BAR_1; i < PCI_STD_NUM_BARS; i++) {
412*4882a593Smuzhiyun if (pci_resource_len(pdev, i) == 0)
413*4882a593Smuzhiyun continue;
414*4882a593Smuzhiyun if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
415*4882a593Smuzhiyun adapter->hw.io_base = pci_resource_start(pdev, i);
416*4882a593Smuzhiyun break;
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun netdev->netdev_ops = &ixgb_netdev_ops;
421*4882a593Smuzhiyun ixgb_set_ethtool_ops(netdev);
422*4882a593Smuzhiyun netdev->watchdog_timeo = 5 * HZ;
423*4882a593Smuzhiyun netif_napi_add(netdev, &adapter->napi, ixgb_clean, 64);
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun adapter->bd_number = cards_found;
428*4882a593Smuzhiyun adapter->link_speed = 0;
429*4882a593Smuzhiyun adapter->link_duplex = 0;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun /* setup the private structure */
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun err = ixgb_sw_init(adapter);
434*4882a593Smuzhiyun if (err)
435*4882a593Smuzhiyun goto err_sw_init;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun netdev->hw_features = NETIF_F_SG |
438*4882a593Smuzhiyun NETIF_F_TSO |
439*4882a593Smuzhiyun NETIF_F_HW_CSUM |
440*4882a593Smuzhiyun NETIF_F_HW_VLAN_CTAG_TX |
441*4882a593Smuzhiyun NETIF_F_HW_VLAN_CTAG_RX;
442*4882a593Smuzhiyun netdev->features = netdev->hw_features |
443*4882a593Smuzhiyun NETIF_F_HW_VLAN_CTAG_FILTER;
444*4882a593Smuzhiyun netdev->hw_features |= NETIF_F_RXCSUM;
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun if (pci_using_dac) {
447*4882a593Smuzhiyun netdev->features |= NETIF_F_HIGHDMA;
448*4882a593Smuzhiyun netdev->vlan_features |= NETIF_F_HIGHDMA;
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun /* MTU range: 68 - 16114 */
452*4882a593Smuzhiyun netdev->min_mtu = ETH_MIN_MTU;
453*4882a593Smuzhiyun netdev->max_mtu = IXGB_MAX_JUMBO_FRAME_SIZE - ETH_HLEN;
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun /* make sure the EEPROM is good */
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun if (!ixgb_validate_eeprom_checksum(&adapter->hw)) {
458*4882a593Smuzhiyun netif_err(adapter, probe, adapter->netdev,
459*4882a593Smuzhiyun "The EEPROM Checksum Is Not Valid\n");
460*4882a593Smuzhiyun err = -EIO;
461*4882a593Smuzhiyun goto err_eeprom;
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun if (!is_valid_ether_addr(netdev->dev_addr)) {
467*4882a593Smuzhiyun netif_err(adapter, probe, adapter->netdev, "Invalid MAC Address\n");
468*4882a593Smuzhiyun err = -EIO;
469*4882a593Smuzhiyun goto err_eeprom;
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun timer_setup(&adapter->watchdog_timer, ixgb_watchdog, 0);
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun strcpy(netdev->name, "eth%d");
479*4882a593Smuzhiyun err = register_netdev(netdev);
480*4882a593Smuzhiyun if (err)
481*4882a593Smuzhiyun goto err_register;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun /* carrier off reporting is important to ethtool even BEFORE open */
484*4882a593Smuzhiyun netif_carrier_off(netdev);
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun netif_info(adapter, probe, adapter->netdev,
487*4882a593Smuzhiyun "Intel(R) PRO/10GbE Network Connection\n");
488*4882a593Smuzhiyun ixgb_check_options(adapter);
489*4882a593Smuzhiyun /* reset the hardware with the new settings */
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun ixgb_reset(adapter);
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun cards_found++;
494*4882a593Smuzhiyun return 0;
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun err_register:
497*4882a593Smuzhiyun err_sw_init:
498*4882a593Smuzhiyun err_eeprom:
499*4882a593Smuzhiyun iounmap(adapter->hw.hw_addr);
500*4882a593Smuzhiyun err_ioremap:
501*4882a593Smuzhiyun free_netdev(netdev);
502*4882a593Smuzhiyun err_alloc_etherdev:
503*4882a593Smuzhiyun pci_release_regions(pdev);
504*4882a593Smuzhiyun err_request_regions:
505*4882a593Smuzhiyun err_dma_mask:
506*4882a593Smuzhiyun pci_disable_device(pdev);
507*4882a593Smuzhiyun return err;
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun /**
511*4882a593Smuzhiyun * ixgb_remove - Device Removal Routine
512*4882a593Smuzhiyun * @pdev: PCI device information struct
513*4882a593Smuzhiyun *
514*4882a593Smuzhiyun * ixgb_remove is called by the PCI subsystem to alert the driver
515*4882a593Smuzhiyun * that it should release a PCI device. The could be caused by a
516*4882a593Smuzhiyun * Hot-Plug event, or because the driver is going to be removed from
517*4882a593Smuzhiyun * memory.
518*4882a593Smuzhiyun **/
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun static void
ixgb_remove(struct pci_dev * pdev)521*4882a593Smuzhiyun ixgb_remove(struct pci_dev *pdev)
522*4882a593Smuzhiyun {
523*4882a593Smuzhiyun struct net_device *netdev = pci_get_drvdata(pdev);
524*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun cancel_work_sync(&adapter->tx_timeout_task);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun unregister_netdev(netdev);
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun iounmap(adapter->hw.hw_addr);
531*4882a593Smuzhiyun pci_release_regions(pdev);
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun free_netdev(netdev);
534*4882a593Smuzhiyun pci_disable_device(pdev);
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun /**
538*4882a593Smuzhiyun * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
539*4882a593Smuzhiyun * @adapter: board private structure to initialize
540*4882a593Smuzhiyun *
541*4882a593Smuzhiyun * ixgb_sw_init initializes the Adapter private data structure.
542*4882a593Smuzhiyun * Fields are initialized based on PCI device information and
543*4882a593Smuzhiyun * OS network device settings (MTU size).
544*4882a593Smuzhiyun **/
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun static int
ixgb_sw_init(struct ixgb_adapter * adapter)547*4882a593Smuzhiyun ixgb_sw_init(struct ixgb_adapter *adapter)
548*4882a593Smuzhiyun {
549*4882a593Smuzhiyun struct ixgb_hw *hw = &adapter->hw;
550*4882a593Smuzhiyun struct net_device *netdev = adapter->netdev;
551*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun /* PCI config space info */
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun hw->vendor_id = pdev->vendor;
556*4882a593Smuzhiyun hw->device_id = pdev->device;
557*4882a593Smuzhiyun hw->subsystem_vendor_id = pdev->subsystem_vendor;
558*4882a593Smuzhiyun hw->subsystem_id = pdev->subsystem_device;
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
561*4882a593Smuzhiyun adapter->rx_buffer_len = hw->max_frame_size + 8; /* + 8 for errata */
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun if ((hw->device_id == IXGB_DEVICE_ID_82597EX) ||
564*4882a593Smuzhiyun (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4) ||
565*4882a593Smuzhiyun (hw->device_id == IXGB_DEVICE_ID_82597EX_LR) ||
566*4882a593Smuzhiyun (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
567*4882a593Smuzhiyun hw->mac_type = ixgb_82597;
568*4882a593Smuzhiyun else {
569*4882a593Smuzhiyun /* should never have loaded on this device */
570*4882a593Smuzhiyun netif_err(adapter, probe, adapter->netdev, "unsupported device id\n");
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun /* enable flow control to be programmed */
574*4882a593Smuzhiyun hw->fc.send_xon = 1;
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun set_bit(__IXGB_DOWN, &adapter->flags);
577*4882a593Smuzhiyun return 0;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun /**
581*4882a593Smuzhiyun * ixgb_open - Called when a network interface is made active
582*4882a593Smuzhiyun * @netdev: network interface device structure
583*4882a593Smuzhiyun *
584*4882a593Smuzhiyun * Returns 0 on success, negative value on failure
585*4882a593Smuzhiyun *
586*4882a593Smuzhiyun * The open entry point is called when a network interface is made
587*4882a593Smuzhiyun * active by the system (IFF_UP). At this point all resources needed
588*4882a593Smuzhiyun * for transmit and receive operations are allocated, the interrupt
589*4882a593Smuzhiyun * handler is registered with the OS, the watchdog timer is started,
590*4882a593Smuzhiyun * and the stack is notified that the interface is ready.
591*4882a593Smuzhiyun **/
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun static int
ixgb_open(struct net_device * netdev)594*4882a593Smuzhiyun ixgb_open(struct net_device *netdev)
595*4882a593Smuzhiyun {
596*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
597*4882a593Smuzhiyun int err;
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun /* allocate transmit descriptors */
600*4882a593Smuzhiyun err = ixgb_setup_tx_resources(adapter);
601*4882a593Smuzhiyun if (err)
602*4882a593Smuzhiyun goto err_setup_tx;
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun netif_carrier_off(netdev);
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun /* allocate receive descriptors */
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun err = ixgb_setup_rx_resources(adapter);
609*4882a593Smuzhiyun if (err)
610*4882a593Smuzhiyun goto err_setup_rx;
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun err = ixgb_up(adapter);
613*4882a593Smuzhiyun if (err)
614*4882a593Smuzhiyun goto err_up;
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun netif_start_queue(netdev);
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun return 0;
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun err_up:
621*4882a593Smuzhiyun ixgb_free_rx_resources(adapter);
622*4882a593Smuzhiyun err_setup_rx:
623*4882a593Smuzhiyun ixgb_free_tx_resources(adapter);
624*4882a593Smuzhiyun err_setup_tx:
625*4882a593Smuzhiyun ixgb_reset(adapter);
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun return err;
628*4882a593Smuzhiyun }
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun /**
631*4882a593Smuzhiyun * ixgb_close - Disables a network interface
632*4882a593Smuzhiyun * @netdev: network interface device structure
633*4882a593Smuzhiyun *
634*4882a593Smuzhiyun * Returns 0, this is not allowed to fail
635*4882a593Smuzhiyun *
636*4882a593Smuzhiyun * The close entry point is called when an interface is de-activated
637*4882a593Smuzhiyun * by the OS. The hardware is still under the drivers control, but
638*4882a593Smuzhiyun * needs to be disabled. A global MAC reset is issued to stop the
639*4882a593Smuzhiyun * hardware, and all transmit and receive resources are freed.
640*4882a593Smuzhiyun **/
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun static int
ixgb_close(struct net_device * netdev)643*4882a593Smuzhiyun ixgb_close(struct net_device *netdev)
644*4882a593Smuzhiyun {
645*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun ixgb_down(adapter, true);
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun ixgb_free_tx_resources(adapter);
650*4882a593Smuzhiyun ixgb_free_rx_resources(adapter);
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun return 0;
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun /**
656*4882a593Smuzhiyun * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
657*4882a593Smuzhiyun * @adapter: board private structure
658*4882a593Smuzhiyun *
659*4882a593Smuzhiyun * Return 0 on success, negative on failure
660*4882a593Smuzhiyun **/
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun int
ixgb_setup_tx_resources(struct ixgb_adapter * adapter)663*4882a593Smuzhiyun ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
664*4882a593Smuzhiyun {
665*4882a593Smuzhiyun struct ixgb_desc_ring *txdr = &adapter->tx_ring;
666*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
667*4882a593Smuzhiyun int size;
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun size = sizeof(struct ixgb_buffer) * txdr->count;
670*4882a593Smuzhiyun txdr->buffer_info = vzalloc(size);
671*4882a593Smuzhiyun if (!txdr->buffer_info)
672*4882a593Smuzhiyun return -ENOMEM;
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun /* round up to nearest 4K */
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
677*4882a593Smuzhiyun txdr->size = ALIGN(txdr->size, 4096);
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
680*4882a593Smuzhiyun GFP_KERNEL);
681*4882a593Smuzhiyun if (!txdr->desc) {
682*4882a593Smuzhiyun vfree(txdr->buffer_info);
683*4882a593Smuzhiyun return -ENOMEM;
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun txdr->next_to_use = 0;
687*4882a593Smuzhiyun txdr->next_to_clean = 0;
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun return 0;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun /**
693*4882a593Smuzhiyun * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
694*4882a593Smuzhiyun * @adapter: board private structure
695*4882a593Smuzhiyun *
696*4882a593Smuzhiyun * Configure the Tx unit of the MAC after a reset.
697*4882a593Smuzhiyun **/
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun static void
ixgb_configure_tx(struct ixgb_adapter * adapter)700*4882a593Smuzhiyun ixgb_configure_tx(struct ixgb_adapter *adapter)
701*4882a593Smuzhiyun {
702*4882a593Smuzhiyun u64 tdba = adapter->tx_ring.dma;
703*4882a593Smuzhiyun u32 tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
704*4882a593Smuzhiyun u32 tctl;
705*4882a593Smuzhiyun struct ixgb_hw *hw = &adapter->hw;
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun /* Setup the Base and Length of the Tx Descriptor Ring
708*4882a593Smuzhiyun * tx_ring.dma can be either a 32 or 64 bit value
709*4882a593Smuzhiyun */
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
712*4882a593Smuzhiyun IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun IXGB_WRITE_REG(hw, TDLEN, tdlen);
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun /* Setup the HW Tx Head and Tail descriptor pointers */
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun IXGB_WRITE_REG(hw, TDH, 0);
719*4882a593Smuzhiyun IXGB_WRITE_REG(hw, TDT, 0);
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun /* don't set up txdctl, it induces performance problems if configured
722*4882a593Smuzhiyun * incorrectly */
723*4882a593Smuzhiyun /* Set the Tx Interrupt Delay register */
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun /* Program the Transmit Control Register */
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
730*4882a593Smuzhiyun IXGB_WRITE_REG(hw, TCTL, tctl);
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun /* Setup Transmit Descriptor Settings for this adapter */
733*4882a593Smuzhiyun adapter->tx_cmd_type =
734*4882a593Smuzhiyun IXGB_TX_DESC_TYPE |
735*4882a593Smuzhiyun (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun /**
739*4882a593Smuzhiyun * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
740*4882a593Smuzhiyun * @adapter: board private structure
741*4882a593Smuzhiyun *
742*4882a593Smuzhiyun * Returns 0 on success, negative on failure
743*4882a593Smuzhiyun **/
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun int
ixgb_setup_rx_resources(struct ixgb_adapter * adapter)746*4882a593Smuzhiyun ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
747*4882a593Smuzhiyun {
748*4882a593Smuzhiyun struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
749*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
750*4882a593Smuzhiyun int size;
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun size = sizeof(struct ixgb_buffer) * rxdr->count;
753*4882a593Smuzhiyun rxdr->buffer_info = vzalloc(size);
754*4882a593Smuzhiyun if (!rxdr->buffer_info)
755*4882a593Smuzhiyun return -ENOMEM;
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun /* Round up to nearest 4K */
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
760*4882a593Smuzhiyun rxdr->size = ALIGN(rxdr->size, 4096);
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
763*4882a593Smuzhiyun GFP_KERNEL);
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun if (!rxdr->desc) {
766*4882a593Smuzhiyun vfree(rxdr->buffer_info);
767*4882a593Smuzhiyun return -ENOMEM;
768*4882a593Smuzhiyun }
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun rxdr->next_to_clean = 0;
771*4882a593Smuzhiyun rxdr->next_to_use = 0;
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun return 0;
774*4882a593Smuzhiyun }
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun /**
777*4882a593Smuzhiyun * ixgb_setup_rctl - configure the receive control register
778*4882a593Smuzhiyun * @adapter: Board private structure
779*4882a593Smuzhiyun **/
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun static void
ixgb_setup_rctl(struct ixgb_adapter * adapter)782*4882a593Smuzhiyun ixgb_setup_rctl(struct ixgb_adapter *adapter)
783*4882a593Smuzhiyun {
784*4882a593Smuzhiyun u32 rctl;
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun rctl = IXGB_READ_REG(&adapter->hw, RCTL);
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
789*4882a593Smuzhiyun
790*4882a593Smuzhiyun rctl |=
791*4882a593Smuzhiyun IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
792*4882a593Smuzhiyun IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
793*4882a593Smuzhiyun (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
794*4882a593Smuzhiyun
795*4882a593Smuzhiyun rctl |= IXGB_RCTL_SECRC;
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
798*4882a593Smuzhiyun rctl |= IXGB_RCTL_BSIZE_2048;
799*4882a593Smuzhiyun else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
800*4882a593Smuzhiyun rctl |= IXGB_RCTL_BSIZE_4096;
801*4882a593Smuzhiyun else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
802*4882a593Smuzhiyun rctl |= IXGB_RCTL_BSIZE_8192;
803*4882a593Smuzhiyun else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
804*4882a593Smuzhiyun rctl |= IXGB_RCTL_BSIZE_16384;
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
807*4882a593Smuzhiyun }
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun /**
810*4882a593Smuzhiyun * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
811*4882a593Smuzhiyun * @adapter: board private structure
812*4882a593Smuzhiyun *
813*4882a593Smuzhiyun * Configure the Rx unit of the MAC after a reset.
814*4882a593Smuzhiyun **/
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun static void
ixgb_configure_rx(struct ixgb_adapter * adapter)817*4882a593Smuzhiyun ixgb_configure_rx(struct ixgb_adapter *adapter)
818*4882a593Smuzhiyun {
819*4882a593Smuzhiyun u64 rdba = adapter->rx_ring.dma;
820*4882a593Smuzhiyun u32 rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
821*4882a593Smuzhiyun struct ixgb_hw *hw = &adapter->hw;
822*4882a593Smuzhiyun u32 rctl;
823*4882a593Smuzhiyun u32 rxcsum;
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun /* make sure receives are disabled while setting up the descriptors */
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun rctl = IXGB_READ_REG(hw, RCTL);
828*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun /* set the Receive Delay Timer Register */
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun /* Setup the Base and Length of the Rx Descriptor Ring */
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
837*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RDLEN, rdlen);
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun /* Setup the HW Rx Head and Tail Descriptor Pointers */
842*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RDH, 0);
843*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RDT, 0);
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun /* due to the hardware errata with RXDCTL, we are unable to use any of
846*4882a593Smuzhiyun * the performance enhancing features of it without causing other
847*4882a593Smuzhiyun * subtle bugs, some of the bugs could include receive length
848*4882a593Smuzhiyun * corruption at high data rates (WTHRESH > 0) and/or receive
849*4882a593Smuzhiyun * descriptor ring irregularites (particularly in hardware cache) */
850*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RXDCTL, 0);
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun /* Enable Receive Checksum Offload for TCP and UDP */
853*4882a593Smuzhiyun if (adapter->rx_csum) {
854*4882a593Smuzhiyun rxcsum = IXGB_READ_REG(hw, RXCSUM);
855*4882a593Smuzhiyun rxcsum |= IXGB_RXCSUM_TUOFL;
856*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
857*4882a593Smuzhiyun }
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun /* Enable Receives */
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RCTL, rctl);
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun /**
865*4882a593Smuzhiyun * ixgb_free_tx_resources - Free Tx Resources
866*4882a593Smuzhiyun * @adapter: board private structure
867*4882a593Smuzhiyun *
868*4882a593Smuzhiyun * Free all transmit software resources
869*4882a593Smuzhiyun **/
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun void
ixgb_free_tx_resources(struct ixgb_adapter * adapter)872*4882a593Smuzhiyun ixgb_free_tx_resources(struct ixgb_adapter *adapter)
873*4882a593Smuzhiyun {
874*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun ixgb_clean_tx_ring(adapter);
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun vfree(adapter->tx_ring.buffer_info);
879*4882a593Smuzhiyun adapter->tx_ring.buffer_info = NULL;
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun dma_free_coherent(&pdev->dev, adapter->tx_ring.size,
882*4882a593Smuzhiyun adapter->tx_ring.desc, adapter->tx_ring.dma);
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun adapter->tx_ring.desc = NULL;
885*4882a593Smuzhiyun }
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun static void
ixgb_unmap_and_free_tx_resource(struct ixgb_adapter * adapter,struct ixgb_buffer * buffer_info)888*4882a593Smuzhiyun ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
889*4882a593Smuzhiyun struct ixgb_buffer *buffer_info)
890*4882a593Smuzhiyun {
891*4882a593Smuzhiyun if (buffer_info->dma) {
892*4882a593Smuzhiyun if (buffer_info->mapped_as_page)
893*4882a593Smuzhiyun dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
894*4882a593Smuzhiyun buffer_info->length, DMA_TO_DEVICE);
895*4882a593Smuzhiyun else
896*4882a593Smuzhiyun dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
897*4882a593Smuzhiyun buffer_info->length, DMA_TO_DEVICE);
898*4882a593Smuzhiyun buffer_info->dma = 0;
899*4882a593Smuzhiyun }
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun if (buffer_info->skb) {
902*4882a593Smuzhiyun dev_kfree_skb_any(buffer_info->skb);
903*4882a593Smuzhiyun buffer_info->skb = NULL;
904*4882a593Smuzhiyun }
905*4882a593Smuzhiyun buffer_info->time_stamp = 0;
906*4882a593Smuzhiyun /* these fields must always be initialized in tx
907*4882a593Smuzhiyun * buffer_info->length = 0;
908*4882a593Smuzhiyun * buffer_info->next_to_watch = 0; */
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun /**
912*4882a593Smuzhiyun * ixgb_clean_tx_ring - Free Tx Buffers
913*4882a593Smuzhiyun * @adapter: board private structure
914*4882a593Smuzhiyun **/
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun static void
ixgb_clean_tx_ring(struct ixgb_adapter * adapter)917*4882a593Smuzhiyun ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
918*4882a593Smuzhiyun {
919*4882a593Smuzhiyun struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
920*4882a593Smuzhiyun struct ixgb_buffer *buffer_info;
921*4882a593Smuzhiyun unsigned long size;
922*4882a593Smuzhiyun unsigned int i;
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun /* Free all the Tx ring sk_buffs */
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun for (i = 0; i < tx_ring->count; i++) {
927*4882a593Smuzhiyun buffer_info = &tx_ring->buffer_info[i];
928*4882a593Smuzhiyun ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
929*4882a593Smuzhiyun }
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun size = sizeof(struct ixgb_buffer) * tx_ring->count;
932*4882a593Smuzhiyun memset(tx_ring->buffer_info, 0, size);
933*4882a593Smuzhiyun
934*4882a593Smuzhiyun /* Zero out the descriptor ring */
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun memset(tx_ring->desc, 0, tx_ring->size);
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun tx_ring->next_to_use = 0;
939*4882a593Smuzhiyun tx_ring->next_to_clean = 0;
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, TDH, 0);
942*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, TDT, 0);
943*4882a593Smuzhiyun }
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun /**
946*4882a593Smuzhiyun * ixgb_free_rx_resources - Free Rx Resources
947*4882a593Smuzhiyun * @adapter: board private structure
948*4882a593Smuzhiyun *
949*4882a593Smuzhiyun * Free all receive software resources
950*4882a593Smuzhiyun **/
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun void
ixgb_free_rx_resources(struct ixgb_adapter * adapter)953*4882a593Smuzhiyun ixgb_free_rx_resources(struct ixgb_adapter *adapter)
954*4882a593Smuzhiyun {
955*4882a593Smuzhiyun struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
956*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun ixgb_clean_rx_ring(adapter);
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun vfree(rx_ring->buffer_info);
961*4882a593Smuzhiyun rx_ring->buffer_info = NULL;
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
964*4882a593Smuzhiyun rx_ring->dma);
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun rx_ring->desc = NULL;
967*4882a593Smuzhiyun }
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun /**
970*4882a593Smuzhiyun * ixgb_clean_rx_ring - Free Rx Buffers
971*4882a593Smuzhiyun * @adapter: board private structure
972*4882a593Smuzhiyun **/
973*4882a593Smuzhiyun
974*4882a593Smuzhiyun static void
ixgb_clean_rx_ring(struct ixgb_adapter * adapter)975*4882a593Smuzhiyun ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
976*4882a593Smuzhiyun {
977*4882a593Smuzhiyun struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
978*4882a593Smuzhiyun struct ixgb_buffer *buffer_info;
979*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
980*4882a593Smuzhiyun unsigned long size;
981*4882a593Smuzhiyun unsigned int i;
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun /* Free all the Rx ring sk_buffs */
984*4882a593Smuzhiyun
985*4882a593Smuzhiyun for (i = 0; i < rx_ring->count; i++) {
986*4882a593Smuzhiyun buffer_info = &rx_ring->buffer_info[i];
987*4882a593Smuzhiyun if (buffer_info->dma) {
988*4882a593Smuzhiyun dma_unmap_single(&pdev->dev,
989*4882a593Smuzhiyun buffer_info->dma,
990*4882a593Smuzhiyun buffer_info->length,
991*4882a593Smuzhiyun DMA_FROM_DEVICE);
992*4882a593Smuzhiyun buffer_info->dma = 0;
993*4882a593Smuzhiyun buffer_info->length = 0;
994*4882a593Smuzhiyun }
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun if (buffer_info->skb) {
997*4882a593Smuzhiyun dev_kfree_skb(buffer_info->skb);
998*4882a593Smuzhiyun buffer_info->skb = NULL;
999*4882a593Smuzhiyun }
1000*4882a593Smuzhiyun }
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun size = sizeof(struct ixgb_buffer) * rx_ring->count;
1003*4882a593Smuzhiyun memset(rx_ring->buffer_info, 0, size);
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun /* Zero out the descriptor ring */
1006*4882a593Smuzhiyun
1007*4882a593Smuzhiyun memset(rx_ring->desc, 0, rx_ring->size);
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun rx_ring->next_to_clean = 0;
1010*4882a593Smuzhiyun rx_ring->next_to_use = 0;
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1013*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1014*4882a593Smuzhiyun }
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun /**
1017*4882a593Smuzhiyun * ixgb_set_mac - Change the Ethernet Address of the NIC
1018*4882a593Smuzhiyun * @netdev: network interface device structure
1019*4882a593Smuzhiyun * @p: pointer to an address structure
1020*4882a593Smuzhiyun *
1021*4882a593Smuzhiyun * Returns 0 on success, negative on failure
1022*4882a593Smuzhiyun **/
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun static int
ixgb_set_mac(struct net_device * netdev,void * p)1025*4882a593Smuzhiyun ixgb_set_mac(struct net_device *netdev, void *p)
1026*4882a593Smuzhiyun {
1027*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
1028*4882a593Smuzhiyun struct sockaddr *addr = p;
1029*4882a593Smuzhiyun
1030*4882a593Smuzhiyun if (!is_valid_ether_addr(addr->sa_data))
1031*4882a593Smuzhiyun return -EADDRNOTAVAIL;
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1034*4882a593Smuzhiyun
1035*4882a593Smuzhiyun ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun return 0;
1038*4882a593Smuzhiyun }
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun /**
1041*4882a593Smuzhiyun * ixgb_set_multi - Multicast and Promiscuous mode set
1042*4882a593Smuzhiyun * @netdev: network interface device structure
1043*4882a593Smuzhiyun *
1044*4882a593Smuzhiyun * The set_multi entry point is called whenever the multicast address
1045*4882a593Smuzhiyun * list or the network interface flags are updated. This routine is
1046*4882a593Smuzhiyun * responsible for configuring the hardware for proper multicast,
1047*4882a593Smuzhiyun * promiscuous mode, and all-multi behavior.
1048*4882a593Smuzhiyun **/
1049*4882a593Smuzhiyun
1050*4882a593Smuzhiyun static void
ixgb_set_multi(struct net_device * netdev)1051*4882a593Smuzhiyun ixgb_set_multi(struct net_device *netdev)
1052*4882a593Smuzhiyun {
1053*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
1054*4882a593Smuzhiyun struct ixgb_hw *hw = &adapter->hw;
1055*4882a593Smuzhiyun struct netdev_hw_addr *ha;
1056*4882a593Smuzhiyun u32 rctl;
1057*4882a593Smuzhiyun
1058*4882a593Smuzhiyun /* Check for Promiscuous and All Multicast modes */
1059*4882a593Smuzhiyun
1060*4882a593Smuzhiyun rctl = IXGB_READ_REG(hw, RCTL);
1061*4882a593Smuzhiyun
1062*4882a593Smuzhiyun if (netdev->flags & IFF_PROMISC) {
1063*4882a593Smuzhiyun rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1064*4882a593Smuzhiyun /* disable VLAN filtering */
1065*4882a593Smuzhiyun rctl &= ~IXGB_RCTL_CFIEN;
1066*4882a593Smuzhiyun rctl &= ~IXGB_RCTL_VFE;
1067*4882a593Smuzhiyun } else {
1068*4882a593Smuzhiyun if (netdev->flags & IFF_ALLMULTI) {
1069*4882a593Smuzhiyun rctl |= IXGB_RCTL_MPE;
1070*4882a593Smuzhiyun rctl &= ~IXGB_RCTL_UPE;
1071*4882a593Smuzhiyun } else {
1072*4882a593Smuzhiyun rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1073*4882a593Smuzhiyun }
1074*4882a593Smuzhiyun /* enable VLAN filtering */
1075*4882a593Smuzhiyun rctl |= IXGB_RCTL_VFE;
1076*4882a593Smuzhiyun rctl &= ~IXGB_RCTL_CFIEN;
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun if (netdev_mc_count(netdev) > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1080*4882a593Smuzhiyun rctl |= IXGB_RCTL_MPE;
1081*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RCTL, rctl);
1082*4882a593Smuzhiyun } else {
1083*4882a593Smuzhiyun u8 *mta = kmalloc_array(ETH_ALEN,
1084*4882a593Smuzhiyun IXGB_MAX_NUM_MULTICAST_ADDRESSES,
1085*4882a593Smuzhiyun GFP_ATOMIC);
1086*4882a593Smuzhiyun u8 *addr;
1087*4882a593Smuzhiyun if (!mta)
1088*4882a593Smuzhiyun goto alloc_failed;
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun IXGB_WRITE_REG(hw, RCTL, rctl);
1091*4882a593Smuzhiyun
1092*4882a593Smuzhiyun addr = mta;
1093*4882a593Smuzhiyun netdev_for_each_mc_addr(ha, netdev) {
1094*4882a593Smuzhiyun memcpy(addr, ha->addr, ETH_ALEN);
1095*4882a593Smuzhiyun addr += ETH_ALEN;
1096*4882a593Smuzhiyun }
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun ixgb_mc_addr_list_update(hw, mta, netdev_mc_count(netdev), 0);
1099*4882a593Smuzhiyun kfree(mta);
1100*4882a593Smuzhiyun }
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun alloc_failed:
1103*4882a593Smuzhiyun if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
1104*4882a593Smuzhiyun ixgb_vlan_strip_enable(adapter);
1105*4882a593Smuzhiyun else
1106*4882a593Smuzhiyun ixgb_vlan_strip_disable(adapter);
1107*4882a593Smuzhiyun
1108*4882a593Smuzhiyun }
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun /**
1111*4882a593Smuzhiyun * ixgb_watchdog - Timer Call-back
1112*4882a593Smuzhiyun * @t: pointer to timer_list containing our private info pointer
1113*4882a593Smuzhiyun **/
1114*4882a593Smuzhiyun
1115*4882a593Smuzhiyun static void
ixgb_watchdog(struct timer_list * t)1116*4882a593Smuzhiyun ixgb_watchdog(struct timer_list *t)
1117*4882a593Smuzhiyun {
1118*4882a593Smuzhiyun struct ixgb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
1119*4882a593Smuzhiyun struct net_device *netdev = adapter->netdev;
1120*4882a593Smuzhiyun struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun ixgb_check_for_link(&adapter->hw);
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun if (ixgb_check_for_bad_link(&adapter->hw)) {
1125*4882a593Smuzhiyun /* force the reset path */
1126*4882a593Smuzhiyun netif_stop_queue(netdev);
1127*4882a593Smuzhiyun }
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun if (adapter->hw.link_up) {
1130*4882a593Smuzhiyun if (!netif_carrier_ok(netdev)) {
1131*4882a593Smuzhiyun netdev_info(netdev,
1132*4882a593Smuzhiyun "NIC Link is Up 10 Gbps Full Duplex, Flow Control: %s\n",
1133*4882a593Smuzhiyun (adapter->hw.fc.type == ixgb_fc_full) ?
1134*4882a593Smuzhiyun "RX/TX" :
1135*4882a593Smuzhiyun (adapter->hw.fc.type == ixgb_fc_rx_pause) ?
1136*4882a593Smuzhiyun "RX" :
1137*4882a593Smuzhiyun (adapter->hw.fc.type == ixgb_fc_tx_pause) ?
1138*4882a593Smuzhiyun "TX" : "None");
1139*4882a593Smuzhiyun adapter->link_speed = 10000;
1140*4882a593Smuzhiyun adapter->link_duplex = FULL_DUPLEX;
1141*4882a593Smuzhiyun netif_carrier_on(netdev);
1142*4882a593Smuzhiyun }
1143*4882a593Smuzhiyun } else {
1144*4882a593Smuzhiyun if (netif_carrier_ok(netdev)) {
1145*4882a593Smuzhiyun adapter->link_speed = 0;
1146*4882a593Smuzhiyun adapter->link_duplex = 0;
1147*4882a593Smuzhiyun netdev_info(netdev, "NIC Link is Down\n");
1148*4882a593Smuzhiyun netif_carrier_off(netdev);
1149*4882a593Smuzhiyun }
1150*4882a593Smuzhiyun }
1151*4882a593Smuzhiyun
1152*4882a593Smuzhiyun ixgb_update_stats(adapter);
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun if (!netif_carrier_ok(netdev)) {
1155*4882a593Smuzhiyun if (IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1156*4882a593Smuzhiyun /* We've lost link, so the controller stops DMA,
1157*4882a593Smuzhiyun * but we've got queued Tx work that's never going
1158*4882a593Smuzhiyun * to get done, so reset controller to flush Tx.
1159*4882a593Smuzhiyun * (Do the reset outside of interrupt context). */
1160*4882a593Smuzhiyun schedule_work(&adapter->tx_timeout_task);
1161*4882a593Smuzhiyun /* return immediately since reset is imminent */
1162*4882a593Smuzhiyun return;
1163*4882a593Smuzhiyun }
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun /* Force detection of hung controller every watchdog period */
1167*4882a593Smuzhiyun adapter->detect_tx_hung = true;
1168*4882a593Smuzhiyun
1169*4882a593Smuzhiyun /* generate an interrupt to force clean up of any stragglers */
1170*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1171*4882a593Smuzhiyun
1172*4882a593Smuzhiyun /* Reset the timer */
1173*4882a593Smuzhiyun mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1174*4882a593Smuzhiyun }
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun #define IXGB_TX_FLAGS_CSUM 0x00000001
1177*4882a593Smuzhiyun #define IXGB_TX_FLAGS_VLAN 0x00000002
1178*4882a593Smuzhiyun #define IXGB_TX_FLAGS_TSO 0x00000004
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun static int
ixgb_tso(struct ixgb_adapter * adapter,struct sk_buff * skb)1181*4882a593Smuzhiyun ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1182*4882a593Smuzhiyun {
1183*4882a593Smuzhiyun struct ixgb_context_desc *context_desc;
1184*4882a593Smuzhiyun unsigned int i;
1185*4882a593Smuzhiyun u8 ipcss, ipcso, tucss, tucso, hdr_len;
1186*4882a593Smuzhiyun u16 ipcse, tucse, mss;
1187*4882a593Smuzhiyun
1188*4882a593Smuzhiyun if (likely(skb_is_gso(skb))) {
1189*4882a593Smuzhiyun struct ixgb_buffer *buffer_info;
1190*4882a593Smuzhiyun struct iphdr *iph;
1191*4882a593Smuzhiyun int err;
1192*4882a593Smuzhiyun
1193*4882a593Smuzhiyun err = skb_cow_head(skb, 0);
1194*4882a593Smuzhiyun if (err < 0)
1195*4882a593Smuzhiyun return err;
1196*4882a593Smuzhiyun
1197*4882a593Smuzhiyun hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1198*4882a593Smuzhiyun mss = skb_shinfo(skb)->gso_size;
1199*4882a593Smuzhiyun iph = ip_hdr(skb);
1200*4882a593Smuzhiyun iph->tot_len = 0;
1201*4882a593Smuzhiyun iph->check = 0;
1202*4882a593Smuzhiyun tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1203*4882a593Smuzhiyun iph->daddr, 0,
1204*4882a593Smuzhiyun IPPROTO_TCP, 0);
1205*4882a593Smuzhiyun ipcss = skb_network_offset(skb);
1206*4882a593Smuzhiyun ipcso = (void *)&(iph->check) - (void *)skb->data;
1207*4882a593Smuzhiyun ipcse = skb_transport_offset(skb) - 1;
1208*4882a593Smuzhiyun tucss = skb_transport_offset(skb);
1209*4882a593Smuzhiyun tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1210*4882a593Smuzhiyun tucse = 0;
1211*4882a593Smuzhiyun
1212*4882a593Smuzhiyun i = adapter->tx_ring.next_to_use;
1213*4882a593Smuzhiyun context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1214*4882a593Smuzhiyun buffer_info = &adapter->tx_ring.buffer_info[i];
1215*4882a593Smuzhiyun WARN_ON(buffer_info->dma != 0);
1216*4882a593Smuzhiyun
1217*4882a593Smuzhiyun context_desc->ipcss = ipcss;
1218*4882a593Smuzhiyun context_desc->ipcso = ipcso;
1219*4882a593Smuzhiyun context_desc->ipcse = cpu_to_le16(ipcse);
1220*4882a593Smuzhiyun context_desc->tucss = tucss;
1221*4882a593Smuzhiyun context_desc->tucso = tucso;
1222*4882a593Smuzhiyun context_desc->tucse = cpu_to_le16(tucse);
1223*4882a593Smuzhiyun context_desc->mss = cpu_to_le16(mss);
1224*4882a593Smuzhiyun context_desc->hdr_len = hdr_len;
1225*4882a593Smuzhiyun context_desc->status = 0;
1226*4882a593Smuzhiyun context_desc->cmd_type_len = cpu_to_le32(
1227*4882a593Smuzhiyun IXGB_CONTEXT_DESC_TYPE
1228*4882a593Smuzhiyun | IXGB_CONTEXT_DESC_CMD_TSE
1229*4882a593Smuzhiyun | IXGB_CONTEXT_DESC_CMD_IP
1230*4882a593Smuzhiyun | IXGB_CONTEXT_DESC_CMD_TCP
1231*4882a593Smuzhiyun | IXGB_CONTEXT_DESC_CMD_IDE
1232*4882a593Smuzhiyun | (skb->len - (hdr_len)));
1233*4882a593Smuzhiyun
1234*4882a593Smuzhiyun
1235*4882a593Smuzhiyun if (++i == adapter->tx_ring.count) i = 0;
1236*4882a593Smuzhiyun adapter->tx_ring.next_to_use = i;
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun return 1;
1239*4882a593Smuzhiyun }
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun return 0;
1242*4882a593Smuzhiyun }
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun static bool
ixgb_tx_csum(struct ixgb_adapter * adapter,struct sk_buff * skb)1245*4882a593Smuzhiyun ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1246*4882a593Smuzhiyun {
1247*4882a593Smuzhiyun struct ixgb_context_desc *context_desc;
1248*4882a593Smuzhiyun unsigned int i;
1249*4882a593Smuzhiyun u8 css, cso;
1250*4882a593Smuzhiyun
1251*4882a593Smuzhiyun if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1252*4882a593Smuzhiyun struct ixgb_buffer *buffer_info;
1253*4882a593Smuzhiyun css = skb_checksum_start_offset(skb);
1254*4882a593Smuzhiyun cso = css + skb->csum_offset;
1255*4882a593Smuzhiyun
1256*4882a593Smuzhiyun i = adapter->tx_ring.next_to_use;
1257*4882a593Smuzhiyun context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1258*4882a593Smuzhiyun buffer_info = &adapter->tx_ring.buffer_info[i];
1259*4882a593Smuzhiyun WARN_ON(buffer_info->dma != 0);
1260*4882a593Smuzhiyun
1261*4882a593Smuzhiyun context_desc->tucss = css;
1262*4882a593Smuzhiyun context_desc->tucso = cso;
1263*4882a593Smuzhiyun context_desc->tucse = 0;
1264*4882a593Smuzhiyun /* zero out any previously existing data in one instruction */
1265*4882a593Smuzhiyun *(u32 *)&(context_desc->ipcss) = 0;
1266*4882a593Smuzhiyun context_desc->status = 0;
1267*4882a593Smuzhiyun context_desc->hdr_len = 0;
1268*4882a593Smuzhiyun context_desc->mss = 0;
1269*4882a593Smuzhiyun context_desc->cmd_type_len =
1270*4882a593Smuzhiyun cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
1271*4882a593Smuzhiyun | IXGB_TX_DESC_CMD_IDE);
1272*4882a593Smuzhiyun
1273*4882a593Smuzhiyun if (++i == adapter->tx_ring.count) i = 0;
1274*4882a593Smuzhiyun adapter->tx_ring.next_to_use = i;
1275*4882a593Smuzhiyun
1276*4882a593Smuzhiyun return true;
1277*4882a593Smuzhiyun }
1278*4882a593Smuzhiyun
1279*4882a593Smuzhiyun return false;
1280*4882a593Smuzhiyun }
1281*4882a593Smuzhiyun
1282*4882a593Smuzhiyun #define IXGB_MAX_TXD_PWR 14
1283*4882a593Smuzhiyun #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1284*4882a593Smuzhiyun
1285*4882a593Smuzhiyun static int
ixgb_tx_map(struct ixgb_adapter * adapter,struct sk_buff * skb,unsigned int first)1286*4882a593Smuzhiyun ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1287*4882a593Smuzhiyun unsigned int first)
1288*4882a593Smuzhiyun {
1289*4882a593Smuzhiyun struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1290*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
1291*4882a593Smuzhiyun struct ixgb_buffer *buffer_info;
1292*4882a593Smuzhiyun int len = skb_headlen(skb);
1293*4882a593Smuzhiyun unsigned int offset = 0, size, count = 0, i;
1294*4882a593Smuzhiyun unsigned int mss = skb_shinfo(skb)->gso_size;
1295*4882a593Smuzhiyun unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1296*4882a593Smuzhiyun unsigned int f;
1297*4882a593Smuzhiyun
1298*4882a593Smuzhiyun i = tx_ring->next_to_use;
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun while (len) {
1301*4882a593Smuzhiyun buffer_info = &tx_ring->buffer_info[i];
1302*4882a593Smuzhiyun size = min(len, IXGB_MAX_DATA_PER_TXD);
1303*4882a593Smuzhiyun /* Workaround for premature desc write-backs
1304*4882a593Smuzhiyun * in TSO mode. Append 4-byte sentinel desc */
1305*4882a593Smuzhiyun if (unlikely(mss && !nr_frags && size == len && size > 8))
1306*4882a593Smuzhiyun size -= 4;
1307*4882a593Smuzhiyun
1308*4882a593Smuzhiyun buffer_info->length = size;
1309*4882a593Smuzhiyun WARN_ON(buffer_info->dma != 0);
1310*4882a593Smuzhiyun buffer_info->time_stamp = jiffies;
1311*4882a593Smuzhiyun buffer_info->mapped_as_page = false;
1312*4882a593Smuzhiyun buffer_info->dma = dma_map_single(&pdev->dev,
1313*4882a593Smuzhiyun skb->data + offset,
1314*4882a593Smuzhiyun size, DMA_TO_DEVICE);
1315*4882a593Smuzhiyun if (dma_mapping_error(&pdev->dev, buffer_info->dma))
1316*4882a593Smuzhiyun goto dma_error;
1317*4882a593Smuzhiyun buffer_info->next_to_watch = 0;
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun len -= size;
1320*4882a593Smuzhiyun offset += size;
1321*4882a593Smuzhiyun count++;
1322*4882a593Smuzhiyun if (len) {
1323*4882a593Smuzhiyun i++;
1324*4882a593Smuzhiyun if (i == tx_ring->count)
1325*4882a593Smuzhiyun i = 0;
1326*4882a593Smuzhiyun }
1327*4882a593Smuzhiyun }
1328*4882a593Smuzhiyun
1329*4882a593Smuzhiyun for (f = 0; f < nr_frags; f++) {
1330*4882a593Smuzhiyun const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
1331*4882a593Smuzhiyun len = skb_frag_size(frag);
1332*4882a593Smuzhiyun offset = 0;
1333*4882a593Smuzhiyun
1334*4882a593Smuzhiyun while (len) {
1335*4882a593Smuzhiyun i++;
1336*4882a593Smuzhiyun if (i == tx_ring->count)
1337*4882a593Smuzhiyun i = 0;
1338*4882a593Smuzhiyun
1339*4882a593Smuzhiyun buffer_info = &tx_ring->buffer_info[i];
1340*4882a593Smuzhiyun size = min(len, IXGB_MAX_DATA_PER_TXD);
1341*4882a593Smuzhiyun
1342*4882a593Smuzhiyun /* Workaround for premature desc write-backs
1343*4882a593Smuzhiyun * in TSO mode. Append 4-byte sentinel desc */
1344*4882a593Smuzhiyun if (unlikely(mss && (f == (nr_frags - 1))
1345*4882a593Smuzhiyun && size == len && size > 8))
1346*4882a593Smuzhiyun size -= 4;
1347*4882a593Smuzhiyun
1348*4882a593Smuzhiyun buffer_info->length = size;
1349*4882a593Smuzhiyun buffer_info->time_stamp = jiffies;
1350*4882a593Smuzhiyun buffer_info->mapped_as_page = true;
1351*4882a593Smuzhiyun buffer_info->dma =
1352*4882a593Smuzhiyun skb_frag_dma_map(&pdev->dev, frag, offset, size,
1353*4882a593Smuzhiyun DMA_TO_DEVICE);
1354*4882a593Smuzhiyun if (dma_mapping_error(&pdev->dev, buffer_info->dma))
1355*4882a593Smuzhiyun goto dma_error;
1356*4882a593Smuzhiyun buffer_info->next_to_watch = 0;
1357*4882a593Smuzhiyun
1358*4882a593Smuzhiyun len -= size;
1359*4882a593Smuzhiyun offset += size;
1360*4882a593Smuzhiyun count++;
1361*4882a593Smuzhiyun }
1362*4882a593Smuzhiyun }
1363*4882a593Smuzhiyun tx_ring->buffer_info[i].skb = skb;
1364*4882a593Smuzhiyun tx_ring->buffer_info[first].next_to_watch = i;
1365*4882a593Smuzhiyun
1366*4882a593Smuzhiyun return count;
1367*4882a593Smuzhiyun
1368*4882a593Smuzhiyun dma_error:
1369*4882a593Smuzhiyun dev_err(&pdev->dev, "TX DMA map failed\n");
1370*4882a593Smuzhiyun buffer_info->dma = 0;
1371*4882a593Smuzhiyun if (count)
1372*4882a593Smuzhiyun count--;
1373*4882a593Smuzhiyun
1374*4882a593Smuzhiyun while (count--) {
1375*4882a593Smuzhiyun if (i==0)
1376*4882a593Smuzhiyun i += tx_ring->count;
1377*4882a593Smuzhiyun i--;
1378*4882a593Smuzhiyun buffer_info = &tx_ring->buffer_info[i];
1379*4882a593Smuzhiyun ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1380*4882a593Smuzhiyun }
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun return 0;
1383*4882a593Smuzhiyun }
1384*4882a593Smuzhiyun
1385*4882a593Smuzhiyun static void
ixgb_tx_queue(struct ixgb_adapter * adapter,int count,int vlan_id,int tx_flags)1386*4882a593Smuzhiyun ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1387*4882a593Smuzhiyun {
1388*4882a593Smuzhiyun struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1389*4882a593Smuzhiyun struct ixgb_tx_desc *tx_desc = NULL;
1390*4882a593Smuzhiyun struct ixgb_buffer *buffer_info;
1391*4882a593Smuzhiyun u32 cmd_type_len = adapter->tx_cmd_type;
1392*4882a593Smuzhiyun u8 status = 0;
1393*4882a593Smuzhiyun u8 popts = 0;
1394*4882a593Smuzhiyun unsigned int i;
1395*4882a593Smuzhiyun
1396*4882a593Smuzhiyun if (tx_flags & IXGB_TX_FLAGS_TSO) {
1397*4882a593Smuzhiyun cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1398*4882a593Smuzhiyun popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1399*4882a593Smuzhiyun }
1400*4882a593Smuzhiyun
1401*4882a593Smuzhiyun if (tx_flags & IXGB_TX_FLAGS_CSUM)
1402*4882a593Smuzhiyun popts |= IXGB_TX_DESC_POPTS_TXSM;
1403*4882a593Smuzhiyun
1404*4882a593Smuzhiyun if (tx_flags & IXGB_TX_FLAGS_VLAN)
1405*4882a593Smuzhiyun cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1406*4882a593Smuzhiyun
1407*4882a593Smuzhiyun i = tx_ring->next_to_use;
1408*4882a593Smuzhiyun
1409*4882a593Smuzhiyun while (count--) {
1410*4882a593Smuzhiyun buffer_info = &tx_ring->buffer_info[i];
1411*4882a593Smuzhiyun tx_desc = IXGB_TX_DESC(*tx_ring, i);
1412*4882a593Smuzhiyun tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1413*4882a593Smuzhiyun tx_desc->cmd_type_len =
1414*4882a593Smuzhiyun cpu_to_le32(cmd_type_len | buffer_info->length);
1415*4882a593Smuzhiyun tx_desc->status = status;
1416*4882a593Smuzhiyun tx_desc->popts = popts;
1417*4882a593Smuzhiyun tx_desc->vlan = cpu_to_le16(vlan_id);
1418*4882a593Smuzhiyun
1419*4882a593Smuzhiyun if (++i == tx_ring->count) i = 0;
1420*4882a593Smuzhiyun }
1421*4882a593Smuzhiyun
1422*4882a593Smuzhiyun tx_desc->cmd_type_len |=
1423*4882a593Smuzhiyun cpu_to_le32(IXGB_TX_DESC_CMD_EOP | IXGB_TX_DESC_CMD_RS);
1424*4882a593Smuzhiyun
1425*4882a593Smuzhiyun /* Force memory writes to complete before letting h/w
1426*4882a593Smuzhiyun * know there are new descriptors to fetch. (Only
1427*4882a593Smuzhiyun * applicable for weak-ordered memory model archs,
1428*4882a593Smuzhiyun * such as IA-64). */
1429*4882a593Smuzhiyun wmb();
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun tx_ring->next_to_use = i;
1432*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, TDT, i);
1433*4882a593Smuzhiyun }
1434*4882a593Smuzhiyun
__ixgb_maybe_stop_tx(struct net_device * netdev,int size)1435*4882a593Smuzhiyun static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
1436*4882a593Smuzhiyun {
1437*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
1438*4882a593Smuzhiyun struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1439*4882a593Smuzhiyun
1440*4882a593Smuzhiyun netif_stop_queue(netdev);
1441*4882a593Smuzhiyun /* Herbert's original patch had:
1442*4882a593Smuzhiyun * smp_mb__after_netif_stop_queue();
1443*4882a593Smuzhiyun * but since that doesn't exist yet, just open code it. */
1444*4882a593Smuzhiyun smp_mb();
1445*4882a593Smuzhiyun
1446*4882a593Smuzhiyun /* We need to check again in a case another CPU has just
1447*4882a593Smuzhiyun * made room available. */
1448*4882a593Smuzhiyun if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
1449*4882a593Smuzhiyun return -EBUSY;
1450*4882a593Smuzhiyun
1451*4882a593Smuzhiyun /* A reprieve! */
1452*4882a593Smuzhiyun netif_start_queue(netdev);
1453*4882a593Smuzhiyun ++adapter->restart_queue;
1454*4882a593Smuzhiyun return 0;
1455*4882a593Smuzhiyun }
1456*4882a593Smuzhiyun
ixgb_maybe_stop_tx(struct net_device * netdev,struct ixgb_desc_ring * tx_ring,int size)1457*4882a593Smuzhiyun static int ixgb_maybe_stop_tx(struct net_device *netdev,
1458*4882a593Smuzhiyun struct ixgb_desc_ring *tx_ring, int size)
1459*4882a593Smuzhiyun {
1460*4882a593Smuzhiyun if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
1461*4882a593Smuzhiyun return 0;
1462*4882a593Smuzhiyun return __ixgb_maybe_stop_tx(netdev, size);
1463*4882a593Smuzhiyun }
1464*4882a593Smuzhiyun
1465*4882a593Smuzhiyun
1466*4882a593Smuzhiyun /* Tx Descriptors needed, worst case */
1467*4882a593Smuzhiyun #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1468*4882a593Smuzhiyun (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1469*4882a593Smuzhiyun #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
1470*4882a593Smuzhiyun MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
1471*4882a593Smuzhiyun + 1 /* one more needed for sentinel TSO workaround */
1472*4882a593Smuzhiyun
1473*4882a593Smuzhiyun static netdev_tx_t
ixgb_xmit_frame(struct sk_buff * skb,struct net_device * netdev)1474*4882a593Smuzhiyun ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1475*4882a593Smuzhiyun {
1476*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
1477*4882a593Smuzhiyun unsigned int first;
1478*4882a593Smuzhiyun unsigned int tx_flags = 0;
1479*4882a593Smuzhiyun int vlan_id = 0;
1480*4882a593Smuzhiyun int count = 0;
1481*4882a593Smuzhiyun int tso;
1482*4882a593Smuzhiyun
1483*4882a593Smuzhiyun if (test_bit(__IXGB_DOWN, &adapter->flags)) {
1484*4882a593Smuzhiyun dev_kfree_skb_any(skb);
1485*4882a593Smuzhiyun return NETDEV_TX_OK;
1486*4882a593Smuzhiyun }
1487*4882a593Smuzhiyun
1488*4882a593Smuzhiyun if (skb->len <= 0) {
1489*4882a593Smuzhiyun dev_kfree_skb_any(skb);
1490*4882a593Smuzhiyun return NETDEV_TX_OK;
1491*4882a593Smuzhiyun }
1492*4882a593Smuzhiyun
1493*4882a593Smuzhiyun if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
1494*4882a593Smuzhiyun DESC_NEEDED)))
1495*4882a593Smuzhiyun return NETDEV_TX_BUSY;
1496*4882a593Smuzhiyun
1497*4882a593Smuzhiyun if (skb_vlan_tag_present(skb)) {
1498*4882a593Smuzhiyun tx_flags |= IXGB_TX_FLAGS_VLAN;
1499*4882a593Smuzhiyun vlan_id = skb_vlan_tag_get(skb);
1500*4882a593Smuzhiyun }
1501*4882a593Smuzhiyun
1502*4882a593Smuzhiyun first = adapter->tx_ring.next_to_use;
1503*4882a593Smuzhiyun
1504*4882a593Smuzhiyun tso = ixgb_tso(adapter, skb);
1505*4882a593Smuzhiyun if (tso < 0) {
1506*4882a593Smuzhiyun dev_kfree_skb_any(skb);
1507*4882a593Smuzhiyun return NETDEV_TX_OK;
1508*4882a593Smuzhiyun }
1509*4882a593Smuzhiyun
1510*4882a593Smuzhiyun if (likely(tso))
1511*4882a593Smuzhiyun tx_flags |= IXGB_TX_FLAGS_TSO;
1512*4882a593Smuzhiyun else if (ixgb_tx_csum(adapter, skb))
1513*4882a593Smuzhiyun tx_flags |= IXGB_TX_FLAGS_CSUM;
1514*4882a593Smuzhiyun
1515*4882a593Smuzhiyun count = ixgb_tx_map(adapter, skb, first);
1516*4882a593Smuzhiyun
1517*4882a593Smuzhiyun if (count) {
1518*4882a593Smuzhiyun ixgb_tx_queue(adapter, count, vlan_id, tx_flags);
1519*4882a593Smuzhiyun /* Make sure there is space in the ring for the next send. */
1520*4882a593Smuzhiyun ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
1521*4882a593Smuzhiyun
1522*4882a593Smuzhiyun } else {
1523*4882a593Smuzhiyun dev_kfree_skb_any(skb);
1524*4882a593Smuzhiyun adapter->tx_ring.buffer_info[first].time_stamp = 0;
1525*4882a593Smuzhiyun adapter->tx_ring.next_to_use = first;
1526*4882a593Smuzhiyun }
1527*4882a593Smuzhiyun
1528*4882a593Smuzhiyun return NETDEV_TX_OK;
1529*4882a593Smuzhiyun }
1530*4882a593Smuzhiyun
1531*4882a593Smuzhiyun /**
1532*4882a593Smuzhiyun * ixgb_tx_timeout - Respond to a Tx Hang
1533*4882a593Smuzhiyun * @netdev: network interface device structure
1534*4882a593Smuzhiyun * @txqueue: queue hanging (unused)
1535*4882a593Smuzhiyun **/
1536*4882a593Smuzhiyun
1537*4882a593Smuzhiyun static void
ixgb_tx_timeout(struct net_device * netdev,unsigned int __always_unused txqueue)1538*4882a593Smuzhiyun ixgb_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
1539*4882a593Smuzhiyun {
1540*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
1541*4882a593Smuzhiyun
1542*4882a593Smuzhiyun /* Do the reset outside of interrupt context */
1543*4882a593Smuzhiyun schedule_work(&adapter->tx_timeout_task);
1544*4882a593Smuzhiyun }
1545*4882a593Smuzhiyun
1546*4882a593Smuzhiyun static void
ixgb_tx_timeout_task(struct work_struct * work)1547*4882a593Smuzhiyun ixgb_tx_timeout_task(struct work_struct *work)
1548*4882a593Smuzhiyun {
1549*4882a593Smuzhiyun struct ixgb_adapter *adapter =
1550*4882a593Smuzhiyun container_of(work, struct ixgb_adapter, tx_timeout_task);
1551*4882a593Smuzhiyun
1552*4882a593Smuzhiyun adapter->tx_timeout_count++;
1553*4882a593Smuzhiyun ixgb_down(adapter, true);
1554*4882a593Smuzhiyun ixgb_up(adapter);
1555*4882a593Smuzhiyun }
1556*4882a593Smuzhiyun
1557*4882a593Smuzhiyun /**
1558*4882a593Smuzhiyun * ixgb_change_mtu - Change the Maximum Transfer Unit
1559*4882a593Smuzhiyun * @netdev: network interface device structure
1560*4882a593Smuzhiyun * @new_mtu: new value for maximum frame size
1561*4882a593Smuzhiyun *
1562*4882a593Smuzhiyun * Returns 0 on success, negative on failure
1563*4882a593Smuzhiyun **/
1564*4882a593Smuzhiyun
1565*4882a593Smuzhiyun static int
ixgb_change_mtu(struct net_device * netdev,int new_mtu)1566*4882a593Smuzhiyun ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1567*4882a593Smuzhiyun {
1568*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
1569*4882a593Smuzhiyun int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1570*4882a593Smuzhiyun
1571*4882a593Smuzhiyun if (netif_running(netdev))
1572*4882a593Smuzhiyun ixgb_down(adapter, true);
1573*4882a593Smuzhiyun
1574*4882a593Smuzhiyun adapter->rx_buffer_len = max_frame + 8; /* + 8 for errata */
1575*4882a593Smuzhiyun
1576*4882a593Smuzhiyun netdev->mtu = new_mtu;
1577*4882a593Smuzhiyun
1578*4882a593Smuzhiyun if (netif_running(netdev))
1579*4882a593Smuzhiyun ixgb_up(adapter);
1580*4882a593Smuzhiyun
1581*4882a593Smuzhiyun return 0;
1582*4882a593Smuzhiyun }
1583*4882a593Smuzhiyun
1584*4882a593Smuzhiyun /**
1585*4882a593Smuzhiyun * ixgb_update_stats - Update the board statistics counters.
1586*4882a593Smuzhiyun * @adapter: board private structure
1587*4882a593Smuzhiyun **/
1588*4882a593Smuzhiyun
1589*4882a593Smuzhiyun void
ixgb_update_stats(struct ixgb_adapter * adapter)1590*4882a593Smuzhiyun ixgb_update_stats(struct ixgb_adapter *adapter)
1591*4882a593Smuzhiyun {
1592*4882a593Smuzhiyun struct net_device *netdev = adapter->netdev;
1593*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
1594*4882a593Smuzhiyun
1595*4882a593Smuzhiyun /* Prevent stats update while adapter is being reset */
1596*4882a593Smuzhiyun if (pci_channel_offline(pdev))
1597*4882a593Smuzhiyun return;
1598*4882a593Smuzhiyun
1599*4882a593Smuzhiyun if ((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1600*4882a593Smuzhiyun (netdev_mc_count(netdev) > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1601*4882a593Smuzhiyun u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1602*4882a593Smuzhiyun u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1603*4882a593Smuzhiyun u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1604*4882a593Smuzhiyun u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1605*4882a593Smuzhiyun
1606*4882a593Smuzhiyun multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1607*4882a593Smuzhiyun /* fix up multicast stats by removing broadcasts */
1608*4882a593Smuzhiyun if (multi >= bcast)
1609*4882a593Smuzhiyun multi -= bcast;
1610*4882a593Smuzhiyun
1611*4882a593Smuzhiyun adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1612*4882a593Smuzhiyun adapter->stats.mprch += (multi >> 32);
1613*4882a593Smuzhiyun adapter->stats.bprcl += bcast_l;
1614*4882a593Smuzhiyun adapter->stats.bprch += bcast_h;
1615*4882a593Smuzhiyun } else {
1616*4882a593Smuzhiyun adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1617*4882a593Smuzhiyun adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1618*4882a593Smuzhiyun adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1619*4882a593Smuzhiyun adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1620*4882a593Smuzhiyun }
1621*4882a593Smuzhiyun adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1622*4882a593Smuzhiyun adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1623*4882a593Smuzhiyun adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1624*4882a593Smuzhiyun adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1625*4882a593Smuzhiyun adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1626*4882a593Smuzhiyun adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1627*4882a593Smuzhiyun adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1628*4882a593Smuzhiyun adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1629*4882a593Smuzhiyun adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1630*4882a593Smuzhiyun adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1631*4882a593Smuzhiyun adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1632*4882a593Smuzhiyun adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1633*4882a593Smuzhiyun adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1634*4882a593Smuzhiyun adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1635*4882a593Smuzhiyun adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1636*4882a593Smuzhiyun adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1637*4882a593Smuzhiyun adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1638*4882a593Smuzhiyun adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1639*4882a593Smuzhiyun adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1640*4882a593Smuzhiyun adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1641*4882a593Smuzhiyun adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1642*4882a593Smuzhiyun adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1643*4882a593Smuzhiyun adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1644*4882a593Smuzhiyun adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1645*4882a593Smuzhiyun adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1646*4882a593Smuzhiyun adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1647*4882a593Smuzhiyun adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1648*4882a593Smuzhiyun adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1649*4882a593Smuzhiyun adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1650*4882a593Smuzhiyun adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1651*4882a593Smuzhiyun adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1652*4882a593Smuzhiyun adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1653*4882a593Smuzhiyun adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1654*4882a593Smuzhiyun adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1655*4882a593Smuzhiyun adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1656*4882a593Smuzhiyun adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1657*4882a593Smuzhiyun adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1658*4882a593Smuzhiyun adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1659*4882a593Smuzhiyun adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1660*4882a593Smuzhiyun adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1661*4882a593Smuzhiyun adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1662*4882a593Smuzhiyun adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1663*4882a593Smuzhiyun adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1664*4882a593Smuzhiyun adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1665*4882a593Smuzhiyun adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1666*4882a593Smuzhiyun adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1667*4882a593Smuzhiyun adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1668*4882a593Smuzhiyun adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1669*4882a593Smuzhiyun adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1670*4882a593Smuzhiyun adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1671*4882a593Smuzhiyun adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1672*4882a593Smuzhiyun adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1673*4882a593Smuzhiyun adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1674*4882a593Smuzhiyun adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1675*4882a593Smuzhiyun adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1676*4882a593Smuzhiyun adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1677*4882a593Smuzhiyun
1678*4882a593Smuzhiyun /* Fill out the OS statistics structure */
1679*4882a593Smuzhiyun
1680*4882a593Smuzhiyun netdev->stats.rx_packets = adapter->stats.gprcl;
1681*4882a593Smuzhiyun netdev->stats.tx_packets = adapter->stats.gptcl;
1682*4882a593Smuzhiyun netdev->stats.rx_bytes = adapter->stats.gorcl;
1683*4882a593Smuzhiyun netdev->stats.tx_bytes = adapter->stats.gotcl;
1684*4882a593Smuzhiyun netdev->stats.multicast = adapter->stats.mprcl;
1685*4882a593Smuzhiyun netdev->stats.collisions = 0;
1686*4882a593Smuzhiyun
1687*4882a593Smuzhiyun /* ignore RLEC as it reports errors for padded (<64bytes) frames
1688*4882a593Smuzhiyun * with a length in the type/len field */
1689*4882a593Smuzhiyun netdev->stats.rx_errors =
1690*4882a593Smuzhiyun /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1691*4882a593Smuzhiyun adapter->stats.ruc +
1692*4882a593Smuzhiyun adapter->stats.roc /*+ adapter->stats.rlec */ +
1693*4882a593Smuzhiyun adapter->stats.icbc +
1694*4882a593Smuzhiyun adapter->stats.ecbc + adapter->stats.mpc;
1695*4882a593Smuzhiyun
1696*4882a593Smuzhiyun /* see above
1697*4882a593Smuzhiyun * netdev->stats.rx_length_errors = adapter->stats.rlec;
1698*4882a593Smuzhiyun */
1699*4882a593Smuzhiyun
1700*4882a593Smuzhiyun netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
1701*4882a593Smuzhiyun netdev->stats.rx_fifo_errors = adapter->stats.mpc;
1702*4882a593Smuzhiyun netdev->stats.rx_missed_errors = adapter->stats.mpc;
1703*4882a593Smuzhiyun netdev->stats.rx_over_errors = adapter->stats.mpc;
1704*4882a593Smuzhiyun
1705*4882a593Smuzhiyun netdev->stats.tx_errors = 0;
1706*4882a593Smuzhiyun netdev->stats.rx_frame_errors = 0;
1707*4882a593Smuzhiyun netdev->stats.tx_aborted_errors = 0;
1708*4882a593Smuzhiyun netdev->stats.tx_carrier_errors = 0;
1709*4882a593Smuzhiyun netdev->stats.tx_fifo_errors = 0;
1710*4882a593Smuzhiyun netdev->stats.tx_heartbeat_errors = 0;
1711*4882a593Smuzhiyun netdev->stats.tx_window_errors = 0;
1712*4882a593Smuzhiyun }
1713*4882a593Smuzhiyun
1714*4882a593Smuzhiyun #define IXGB_MAX_INTR 10
1715*4882a593Smuzhiyun /**
1716*4882a593Smuzhiyun * ixgb_intr - Interrupt Handler
1717*4882a593Smuzhiyun * @irq: interrupt number
1718*4882a593Smuzhiyun * @data: pointer to a network interface device structure
1719*4882a593Smuzhiyun **/
1720*4882a593Smuzhiyun
1721*4882a593Smuzhiyun static irqreturn_t
ixgb_intr(int irq,void * data)1722*4882a593Smuzhiyun ixgb_intr(int irq, void *data)
1723*4882a593Smuzhiyun {
1724*4882a593Smuzhiyun struct net_device *netdev = data;
1725*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
1726*4882a593Smuzhiyun struct ixgb_hw *hw = &adapter->hw;
1727*4882a593Smuzhiyun u32 icr = IXGB_READ_REG(hw, ICR);
1728*4882a593Smuzhiyun
1729*4882a593Smuzhiyun if (unlikely(!icr))
1730*4882a593Smuzhiyun return IRQ_NONE; /* Not our interrupt */
1731*4882a593Smuzhiyun
1732*4882a593Smuzhiyun if (unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC)))
1733*4882a593Smuzhiyun if (!test_bit(__IXGB_DOWN, &adapter->flags))
1734*4882a593Smuzhiyun mod_timer(&adapter->watchdog_timer, jiffies);
1735*4882a593Smuzhiyun
1736*4882a593Smuzhiyun if (napi_schedule_prep(&adapter->napi)) {
1737*4882a593Smuzhiyun
1738*4882a593Smuzhiyun /* Disable interrupts and register for poll. The flush
1739*4882a593Smuzhiyun of the posted write is intentionally left out.
1740*4882a593Smuzhiyun */
1741*4882a593Smuzhiyun
1742*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1743*4882a593Smuzhiyun __napi_schedule(&adapter->napi);
1744*4882a593Smuzhiyun }
1745*4882a593Smuzhiyun return IRQ_HANDLED;
1746*4882a593Smuzhiyun }
1747*4882a593Smuzhiyun
1748*4882a593Smuzhiyun /**
1749*4882a593Smuzhiyun * ixgb_clean - NAPI Rx polling callback
1750*4882a593Smuzhiyun * @napi: napi struct pointer
1751*4882a593Smuzhiyun * @budget: max number of receives to clean
1752*4882a593Smuzhiyun **/
1753*4882a593Smuzhiyun
1754*4882a593Smuzhiyun static int
ixgb_clean(struct napi_struct * napi,int budget)1755*4882a593Smuzhiyun ixgb_clean(struct napi_struct *napi, int budget)
1756*4882a593Smuzhiyun {
1757*4882a593Smuzhiyun struct ixgb_adapter *adapter = container_of(napi, struct ixgb_adapter, napi);
1758*4882a593Smuzhiyun int work_done = 0;
1759*4882a593Smuzhiyun
1760*4882a593Smuzhiyun ixgb_clean_tx_irq(adapter);
1761*4882a593Smuzhiyun ixgb_clean_rx_irq(adapter, &work_done, budget);
1762*4882a593Smuzhiyun
1763*4882a593Smuzhiyun /* If budget not fully consumed, exit the polling mode */
1764*4882a593Smuzhiyun if (work_done < budget) {
1765*4882a593Smuzhiyun napi_complete_done(napi, work_done);
1766*4882a593Smuzhiyun if (!test_bit(__IXGB_DOWN, &adapter->flags))
1767*4882a593Smuzhiyun ixgb_irq_enable(adapter);
1768*4882a593Smuzhiyun }
1769*4882a593Smuzhiyun
1770*4882a593Smuzhiyun return work_done;
1771*4882a593Smuzhiyun }
1772*4882a593Smuzhiyun
1773*4882a593Smuzhiyun /**
1774*4882a593Smuzhiyun * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1775*4882a593Smuzhiyun * @adapter: board private structure
1776*4882a593Smuzhiyun **/
1777*4882a593Smuzhiyun
1778*4882a593Smuzhiyun static bool
ixgb_clean_tx_irq(struct ixgb_adapter * adapter)1779*4882a593Smuzhiyun ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1780*4882a593Smuzhiyun {
1781*4882a593Smuzhiyun struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1782*4882a593Smuzhiyun struct net_device *netdev = adapter->netdev;
1783*4882a593Smuzhiyun struct ixgb_tx_desc *tx_desc, *eop_desc;
1784*4882a593Smuzhiyun struct ixgb_buffer *buffer_info;
1785*4882a593Smuzhiyun unsigned int i, eop;
1786*4882a593Smuzhiyun bool cleaned = false;
1787*4882a593Smuzhiyun
1788*4882a593Smuzhiyun i = tx_ring->next_to_clean;
1789*4882a593Smuzhiyun eop = tx_ring->buffer_info[i].next_to_watch;
1790*4882a593Smuzhiyun eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1791*4882a593Smuzhiyun
1792*4882a593Smuzhiyun while (eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1793*4882a593Smuzhiyun
1794*4882a593Smuzhiyun rmb(); /* read buffer_info after eop_desc */
1795*4882a593Smuzhiyun for (cleaned = false; !cleaned; ) {
1796*4882a593Smuzhiyun tx_desc = IXGB_TX_DESC(*tx_ring, i);
1797*4882a593Smuzhiyun buffer_info = &tx_ring->buffer_info[i];
1798*4882a593Smuzhiyun
1799*4882a593Smuzhiyun if (tx_desc->popts &
1800*4882a593Smuzhiyun (IXGB_TX_DESC_POPTS_TXSM |
1801*4882a593Smuzhiyun IXGB_TX_DESC_POPTS_IXSM))
1802*4882a593Smuzhiyun adapter->hw_csum_tx_good++;
1803*4882a593Smuzhiyun
1804*4882a593Smuzhiyun ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1805*4882a593Smuzhiyun
1806*4882a593Smuzhiyun *(u32 *)&(tx_desc->status) = 0;
1807*4882a593Smuzhiyun
1808*4882a593Smuzhiyun cleaned = (i == eop);
1809*4882a593Smuzhiyun if (++i == tx_ring->count) i = 0;
1810*4882a593Smuzhiyun }
1811*4882a593Smuzhiyun
1812*4882a593Smuzhiyun eop = tx_ring->buffer_info[i].next_to_watch;
1813*4882a593Smuzhiyun eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1814*4882a593Smuzhiyun }
1815*4882a593Smuzhiyun
1816*4882a593Smuzhiyun tx_ring->next_to_clean = i;
1817*4882a593Smuzhiyun
1818*4882a593Smuzhiyun if (unlikely(cleaned && netif_carrier_ok(netdev) &&
1819*4882a593Smuzhiyun IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED)) {
1820*4882a593Smuzhiyun /* Make sure that anybody stopping the queue after this
1821*4882a593Smuzhiyun * sees the new next_to_clean. */
1822*4882a593Smuzhiyun smp_mb();
1823*4882a593Smuzhiyun
1824*4882a593Smuzhiyun if (netif_queue_stopped(netdev) &&
1825*4882a593Smuzhiyun !(test_bit(__IXGB_DOWN, &adapter->flags))) {
1826*4882a593Smuzhiyun netif_wake_queue(netdev);
1827*4882a593Smuzhiyun ++adapter->restart_queue;
1828*4882a593Smuzhiyun }
1829*4882a593Smuzhiyun }
1830*4882a593Smuzhiyun
1831*4882a593Smuzhiyun if (adapter->detect_tx_hung) {
1832*4882a593Smuzhiyun /* detect a transmit hang in hardware, this serializes the
1833*4882a593Smuzhiyun * check with the clearing of time_stamp and movement of i */
1834*4882a593Smuzhiyun adapter->detect_tx_hung = false;
1835*4882a593Smuzhiyun if (tx_ring->buffer_info[eop].time_stamp &&
1836*4882a593Smuzhiyun time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1837*4882a593Smuzhiyun && !(IXGB_READ_REG(&adapter->hw, STATUS) &
1838*4882a593Smuzhiyun IXGB_STATUS_TXOFF)) {
1839*4882a593Smuzhiyun /* detected Tx unit hang */
1840*4882a593Smuzhiyun netif_err(adapter, drv, adapter->netdev,
1841*4882a593Smuzhiyun "Detected Tx Unit Hang\n"
1842*4882a593Smuzhiyun " TDH <%x>\n"
1843*4882a593Smuzhiyun " TDT <%x>\n"
1844*4882a593Smuzhiyun " next_to_use <%x>\n"
1845*4882a593Smuzhiyun " next_to_clean <%x>\n"
1846*4882a593Smuzhiyun "buffer_info[next_to_clean]\n"
1847*4882a593Smuzhiyun " time_stamp <%lx>\n"
1848*4882a593Smuzhiyun " next_to_watch <%x>\n"
1849*4882a593Smuzhiyun " jiffies <%lx>\n"
1850*4882a593Smuzhiyun " next_to_watch.status <%x>\n",
1851*4882a593Smuzhiyun IXGB_READ_REG(&adapter->hw, TDH),
1852*4882a593Smuzhiyun IXGB_READ_REG(&adapter->hw, TDT),
1853*4882a593Smuzhiyun tx_ring->next_to_use,
1854*4882a593Smuzhiyun tx_ring->next_to_clean,
1855*4882a593Smuzhiyun tx_ring->buffer_info[eop].time_stamp,
1856*4882a593Smuzhiyun eop,
1857*4882a593Smuzhiyun jiffies,
1858*4882a593Smuzhiyun eop_desc->status);
1859*4882a593Smuzhiyun netif_stop_queue(netdev);
1860*4882a593Smuzhiyun }
1861*4882a593Smuzhiyun }
1862*4882a593Smuzhiyun
1863*4882a593Smuzhiyun return cleaned;
1864*4882a593Smuzhiyun }
1865*4882a593Smuzhiyun
1866*4882a593Smuzhiyun /**
1867*4882a593Smuzhiyun * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1868*4882a593Smuzhiyun * @adapter: board private structure
1869*4882a593Smuzhiyun * @rx_desc: receive descriptor
1870*4882a593Smuzhiyun * @skb: socket buffer with received data
1871*4882a593Smuzhiyun **/
1872*4882a593Smuzhiyun
1873*4882a593Smuzhiyun static void
ixgb_rx_checksum(struct ixgb_adapter * adapter,struct ixgb_rx_desc * rx_desc,struct sk_buff * skb)1874*4882a593Smuzhiyun ixgb_rx_checksum(struct ixgb_adapter *adapter,
1875*4882a593Smuzhiyun struct ixgb_rx_desc *rx_desc,
1876*4882a593Smuzhiyun struct sk_buff *skb)
1877*4882a593Smuzhiyun {
1878*4882a593Smuzhiyun /* Ignore Checksum bit is set OR
1879*4882a593Smuzhiyun * TCP Checksum has not been calculated
1880*4882a593Smuzhiyun */
1881*4882a593Smuzhiyun if ((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1882*4882a593Smuzhiyun (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1883*4882a593Smuzhiyun skb_checksum_none_assert(skb);
1884*4882a593Smuzhiyun return;
1885*4882a593Smuzhiyun }
1886*4882a593Smuzhiyun
1887*4882a593Smuzhiyun /* At this point we know the hardware did the TCP checksum */
1888*4882a593Smuzhiyun /* now look at the TCP checksum error bit */
1889*4882a593Smuzhiyun if (rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1890*4882a593Smuzhiyun /* let the stack verify checksum errors */
1891*4882a593Smuzhiyun skb_checksum_none_assert(skb);
1892*4882a593Smuzhiyun adapter->hw_csum_rx_error++;
1893*4882a593Smuzhiyun } else {
1894*4882a593Smuzhiyun /* TCP checksum is good */
1895*4882a593Smuzhiyun skb->ip_summed = CHECKSUM_UNNECESSARY;
1896*4882a593Smuzhiyun adapter->hw_csum_rx_good++;
1897*4882a593Smuzhiyun }
1898*4882a593Smuzhiyun }
1899*4882a593Smuzhiyun
1900*4882a593Smuzhiyun /*
1901*4882a593Smuzhiyun * this should improve performance for small packets with large amounts
1902*4882a593Smuzhiyun * of reassembly being done in the stack
1903*4882a593Smuzhiyun */
ixgb_check_copybreak(struct napi_struct * napi,struct ixgb_buffer * buffer_info,u32 length,struct sk_buff ** skb)1904*4882a593Smuzhiyun static void ixgb_check_copybreak(struct napi_struct *napi,
1905*4882a593Smuzhiyun struct ixgb_buffer *buffer_info,
1906*4882a593Smuzhiyun u32 length, struct sk_buff **skb)
1907*4882a593Smuzhiyun {
1908*4882a593Smuzhiyun struct sk_buff *new_skb;
1909*4882a593Smuzhiyun
1910*4882a593Smuzhiyun if (length > copybreak)
1911*4882a593Smuzhiyun return;
1912*4882a593Smuzhiyun
1913*4882a593Smuzhiyun new_skb = napi_alloc_skb(napi, length);
1914*4882a593Smuzhiyun if (!new_skb)
1915*4882a593Smuzhiyun return;
1916*4882a593Smuzhiyun
1917*4882a593Smuzhiyun skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN,
1918*4882a593Smuzhiyun (*skb)->data - NET_IP_ALIGN,
1919*4882a593Smuzhiyun length + NET_IP_ALIGN);
1920*4882a593Smuzhiyun /* save the skb in buffer_info as good */
1921*4882a593Smuzhiyun buffer_info->skb = *skb;
1922*4882a593Smuzhiyun *skb = new_skb;
1923*4882a593Smuzhiyun }
1924*4882a593Smuzhiyun
1925*4882a593Smuzhiyun /**
1926*4882a593Smuzhiyun * ixgb_clean_rx_irq - Send received data up the network stack,
1927*4882a593Smuzhiyun * @adapter: board private structure
1928*4882a593Smuzhiyun * @work_done: output pointer to amount of packets cleaned
1929*4882a593Smuzhiyun * @work_to_do: how much work we can complete
1930*4882a593Smuzhiyun **/
1931*4882a593Smuzhiyun
1932*4882a593Smuzhiyun static bool
ixgb_clean_rx_irq(struct ixgb_adapter * adapter,int * work_done,int work_to_do)1933*4882a593Smuzhiyun ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1934*4882a593Smuzhiyun {
1935*4882a593Smuzhiyun struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1936*4882a593Smuzhiyun struct net_device *netdev = adapter->netdev;
1937*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
1938*4882a593Smuzhiyun struct ixgb_rx_desc *rx_desc, *next_rxd;
1939*4882a593Smuzhiyun struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1940*4882a593Smuzhiyun u32 length;
1941*4882a593Smuzhiyun unsigned int i, j;
1942*4882a593Smuzhiyun int cleaned_count = 0;
1943*4882a593Smuzhiyun bool cleaned = false;
1944*4882a593Smuzhiyun
1945*4882a593Smuzhiyun i = rx_ring->next_to_clean;
1946*4882a593Smuzhiyun rx_desc = IXGB_RX_DESC(*rx_ring, i);
1947*4882a593Smuzhiyun buffer_info = &rx_ring->buffer_info[i];
1948*4882a593Smuzhiyun
1949*4882a593Smuzhiyun while (rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
1950*4882a593Smuzhiyun struct sk_buff *skb;
1951*4882a593Smuzhiyun u8 status;
1952*4882a593Smuzhiyun
1953*4882a593Smuzhiyun if (*work_done >= work_to_do)
1954*4882a593Smuzhiyun break;
1955*4882a593Smuzhiyun
1956*4882a593Smuzhiyun (*work_done)++;
1957*4882a593Smuzhiyun rmb(); /* read descriptor and rx_buffer_info after status DD */
1958*4882a593Smuzhiyun status = rx_desc->status;
1959*4882a593Smuzhiyun skb = buffer_info->skb;
1960*4882a593Smuzhiyun buffer_info->skb = NULL;
1961*4882a593Smuzhiyun
1962*4882a593Smuzhiyun prefetch(skb->data - NET_IP_ALIGN);
1963*4882a593Smuzhiyun
1964*4882a593Smuzhiyun if (++i == rx_ring->count)
1965*4882a593Smuzhiyun i = 0;
1966*4882a593Smuzhiyun next_rxd = IXGB_RX_DESC(*rx_ring, i);
1967*4882a593Smuzhiyun prefetch(next_rxd);
1968*4882a593Smuzhiyun
1969*4882a593Smuzhiyun j = i + 1;
1970*4882a593Smuzhiyun if (j == rx_ring->count)
1971*4882a593Smuzhiyun j = 0;
1972*4882a593Smuzhiyun next2_buffer = &rx_ring->buffer_info[j];
1973*4882a593Smuzhiyun prefetch(next2_buffer);
1974*4882a593Smuzhiyun
1975*4882a593Smuzhiyun next_buffer = &rx_ring->buffer_info[i];
1976*4882a593Smuzhiyun
1977*4882a593Smuzhiyun cleaned = true;
1978*4882a593Smuzhiyun cleaned_count++;
1979*4882a593Smuzhiyun
1980*4882a593Smuzhiyun dma_unmap_single(&pdev->dev,
1981*4882a593Smuzhiyun buffer_info->dma,
1982*4882a593Smuzhiyun buffer_info->length,
1983*4882a593Smuzhiyun DMA_FROM_DEVICE);
1984*4882a593Smuzhiyun buffer_info->dma = 0;
1985*4882a593Smuzhiyun
1986*4882a593Smuzhiyun length = le16_to_cpu(rx_desc->length);
1987*4882a593Smuzhiyun rx_desc->length = 0;
1988*4882a593Smuzhiyun
1989*4882a593Smuzhiyun if (unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1990*4882a593Smuzhiyun
1991*4882a593Smuzhiyun /* All receives must fit into a single buffer */
1992*4882a593Smuzhiyun
1993*4882a593Smuzhiyun pr_debug("Receive packet consumed multiple buffers length<%x>\n",
1994*4882a593Smuzhiyun length);
1995*4882a593Smuzhiyun
1996*4882a593Smuzhiyun dev_kfree_skb_irq(skb);
1997*4882a593Smuzhiyun goto rxdesc_done;
1998*4882a593Smuzhiyun }
1999*4882a593Smuzhiyun
2000*4882a593Smuzhiyun if (unlikely(rx_desc->errors &
2001*4882a593Smuzhiyun (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE |
2002*4882a593Smuzhiyun IXGB_RX_DESC_ERRORS_P | IXGB_RX_DESC_ERRORS_RXE))) {
2003*4882a593Smuzhiyun dev_kfree_skb_irq(skb);
2004*4882a593Smuzhiyun goto rxdesc_done;
2005*4882a593Smuzhiyun }
2006*4882a593Smuzhiyun
2007*4882a593Smuzhiyun ixgb_check_copybreak(&adapter->napi, buffer_info, length, &skb);
2008*4882a593Smuzhiyun
2009*4882a593Smuzhiyun /* Good Receive */
2010*4882a593Smuzhiyun skb_put(skb, length);
2011*4882a593Smuzhiyun
2012*4882a593Smuzhiyun /* Receive Checksum Offload */
2013*4882a593Smuzhiyun ixgb_rx_checksum(adapter, rx_desc, skb);
2014*4882a593Smuzhiyun
2015*4882a593Smuzhiyun skb->protocol = eth_type_trans(skb, netdev);
2016*4882a593Smuzhiyun if (status & IXGB_RX_DESC_STATUS_VP)
2017*4882a593Smuzhiyun __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2018*4882a593Smuzhiyun le16_to_cpu(rx_desc->special));
2019*4882a593Smuzhiyun
2020*4882a593Smuzhiyun netif_receive_skb(skb);
2021*4882a593Smuzhiyun
2022*4882a593Smuzhiyun rxdesc_done:
2023*4882a593Smuzhiyun /* clean up descriptor, might be written over by hw */
2024*4882a593Smuzhiyun rx_desc->status = 0;
2025*4882a593Smuzhiyun
2026*4882a593Smuzhiyun /* return some buffers to hardware, one at a time is too slow */
2027*4882a593Smuzhiyun if (unlikely(cleaned_count >= IXGB_RX_BUFFER_WRITE)) {
2028*4882a593Smuzhiyun ixgb_alloc_rx_buffers(adapter, cleaned_count);
2029*4882a593Smuzhiyun cleaned_count = 0;
2030*4882a593Smuzhiyun }
2031*4882a593Smuzhiyun
2032*4882a593Smuzhiyun /* use prefetched values */
2033*4882a593Smuzhiyun rx_desc = next_rxd;
2034*4882a593Smuzhiyun buffer_info = next_buffer;
2035*4882a593Smuzhiyun }
2036*4882a593Smuzhiyun
2037*4882a593Smuzhiyun rx_ring->next_to_clean = i;
2038*4882a593Smuzhiyun
2039*4882a593Smuzhiyun cleaned_count = IXGB_DESC_UNUSED(rx_ring);
2040*4882a593Smuzhiyun if (cleaned_count)
2041*4882a593Smuzhiyun ixgb_alloc_rx_buffers(adapter, cleaned_count);
2042*4882a593Smuzhiyun
2043*4882a593Smuzhiyun return cleaned;
2044*4882a593Smuzhiyun }
2045*4882a593Smuzhiyun
2046*4882a593Smuzhiyun /**
2047*4882a593Smuzhiyun * ixgb_alloc_rx_buffers - Replace used receive buffers
2048*4882a593Smuzhiyun * @adapter: address of board private structure
2049*4882a593Smuzhiyun * @cleaned_count: how many buffers to allocate
2050*4882a593Smuzhiyun **/
2051*4882a593Smuzhiyun
2052*4882a593Smuzhiyun static void
ixgb_alloc_rx_buffers(struct ixgb_adapter * adapter,int cleaned_count)2053*4882a593Smuzhiyun ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter, int cleaned_count)
2054*4882a593Smuzhiyun {
2055*4882a593Smuzhiyun struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2056*4882a593Smuzhiyun struct net_device *netdev = adapter->netdev;
2057*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
2058*4882a593Smuzhiyun struct ixgb_rx_desc *rx_desc;
2059*4882a593Smuzhiyun struct ixgb_buffer *buffer_info;
2060*4882a593Smuzhiyun struct sk_buff *skb;
2061*4882a593Smuzhiyun unsigned int i;
2062*4882a593Smuzhiyun long cleancount;
2063*4882a593Smuzhiyun
2064*4882a593Smuzhiyun i = rx_ring->next_to_use;
2065*4882a593Smuzhiyun buffer_info = &rx_ring->buffer_info[i];
2066*4882a593Smuzhiyun cleancount = IXGB_DESC_UNUSED(rx_ring);
2067*4882a593Smuzhiyun
2068*4882a593Smuzhiyun
2069*4882a593Smuzhiyun /* leave three descriptors unused */
2070*4882a593Smuzhiyun while (--cleancount > 2 && cleaned_count--) {
2071*4882a593Smuzhiyun /* recycle! its good for you */
2072*4882a593Smuzhiyun skb = buffer_info->skb;
2073*4882a593Smuzhiyun if (skb) {
2074*4882a593Smuzhiyun skb_trim(skb, 0);
2075*4882a593Smuzhiyun goto map_skb;
2076*4882a593Smuzhiyun }
2077*4882a593Smuzhiyun
2078*4882a593Smuzhiyun skb = netdev_alloc_skb_ip_align(netdev, adapter->rx_buffer_len);
2079*4882a593Smuzhiyun if (unlikely(!skb)) {
2080*4882a593Smuzhiyun /* Better luck next round */
2081*4882a593Smuzhiyun adapter->alloc_rx_buff_failed++;
2082*4882a593Smuzhiyun break;
2083*4882a593Smuzhiyun }
2084*4882a593Smuzhiyun
2085*4882a593Smuzhiyun buffer_info->skb = skb;
2086*4882a593Smuzhiyun buffer_info->length = adapter->rx_buffer_len;
2087*4882a593Smuzhiyun map_skb:
2088*4882a593Smuzhiyun buffer_info->dma = dma_map_single(&pdev->dev,
2089*4882a593Smuzhiyun skb->data,
2090*4882a593Smuzhiyun adapter->rx_buffer_len,
2091*4882a593Smuzhiyun DMA_FROM_DEVICE);
2092*4882a593Smuzhiyun if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
2093*4882a593Smuzhiyun adapter->alloc_rx_buff_failed++;
2094*4882a593Smuzhiyun break;
2095*4882a593Smuzhiyun }
2096*4882a593Smuzhiyun
2097*4882a593Smuzhiyun rx_desc = IXGB_RX_DESC(*rx_ring, i);
2098*4882a593Smuzhiyun rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
2099*4882a593Smuzhiyun /* guarantee DD bit not set now before h/w gets descriptor
2100*4882a593Smuzhiyun * this is the rest of the workaround for h/w double
2101*4882a593Smuzhiyun * writeback. */
2102*4882a593Smuzhiyun rx_desc->status = 0;
2103*4882a593Smuzhiyun
2104*4882a593Smuzhiyun
2105*4882a593Smuzhiyun if (++i == rx_ring->count)
2106*4882a593Smuzhiyun i = 0;
2107*4882a593Smuzhiyun buffer_info = &rx_ring->buffer_info[i];
2108*4882a593Smuzhiyun }
2109*4882a593Smuzhiyun
2110*4882a593Smuzhiyun if (likely(rx_ring->next_to_use != i)) {
2111*4882a593Smuzhiyun rx_ring->next_to_use = i;
2112*4882a593Smuzhiyun if (unlikely(i-- == 0))
2113*4882a593Smuzhiyun i = (rx_ring->count - 1);
2114*4882a593Smuzhiyun
2115*4882a593Smuzhiyun /* Force memory writes to complete before letting h/w
2116*4882a593Smuzhiyun * know there are new descriptors to fetch. (Only
2117*4882a593Smuzhiyun * applicable for weak-ordered memory model archs, such
2118*4882a593Smuzhiyun * as IA-64). */
2119*4882a593Smuzhiyun wmb();
2120*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, RDT, i);
2121*4882a593Smuzhiyun }
2122*4882a593Smuzhiyun }
2123*4882a593Smuzhiyun
2124*4882a593Smuzhiyun static void
ixgb_vlan_strip_enable(struct ixgb_adapter * adapter)2125*4882a593Smuzhiyun ixgb_vlan_strip_enable(struct ixgb_adapter *adapter)
2126*4882a593Smuzhiyun {
2127*4882a593Smuzhiyun u32 ctrl;
2128*4882a593Smuzhiyun
2129*4882a593Smuzhiyun /* enable VLAN tag insert/strip */
2130*4882a593Smuzhiyun ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2131*4882a593Smuzhiyun ctrl |= IXGB_CTRL0_VME;
2132*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2133*4882a593Smuzhiyun }
2134*4882a593Smuzhiyun
2135*4882a593Smuzhiyun static void
ixgb_vlan_strip_disable(struct ixgb_adapter * adapter)2136*4882a593Smuzhiyun ixgb_vlan_strip_disable(struct ixgb_adapter *adapter)
2137*4882a593Smuzhiyun {
2138*4882a593Smuzhiyun u32 ctrl;
2139*4882a593Smuzhiyun
2140*4882a593Smuzhiyun /* disable VLAN tag insert/strip */
2141*4882a593Smuzhiyun ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2142*4882a593Smuzhiyun ctrl &= ~IXGB_CTRL0_VME;
2143*4882a593Smuzhiyun IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2144*4882a593Smuzhiyun }
2145*4882a593Smuzhiyun
2146*4882a593Smuzhiyun static int
ixgb_vlan_rx_add_vid(struct net_device * netdev,__be16 proto,u16 vid)2147*4882a593Smuzhiyun ixgb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
2148*4882a593Smuzhiyun {
2149*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
2150*4882a593Smuzhiyun u32 vfta, index;
2151*4882a593Smuzhiyun
2152*4882a593Smuzhiyun /* add VID to filter table */
2153*4882a593Smuzhiyun
2154*4882a593Smuzhiyun index = (vid >> 5) & 0x7F;
2155*4882a593Smuzhiyun vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2156*4882a593Smuzhiyun vfta |= (1 << (vid & 0x1F));
2157*4882a593Smuzhiyun ixgb_write_vfta(&adapter->hw, index, vfta);
2158*4882a593Smuzhiyun set_bit(vid, adapter->active_vlans);
2159*4882a593Smuzhiyun
2160*4882a593Smuzhiyun return 0;
2161*4882a593Smuzhiyun }
2162*4882a593Smuzhiyun
2163*4882a593Smuzhiyun static int
ixgb_vlan_rx_kill_vid(struct net_device * netdev,__be16 proto,u16 vid)2164*4882a593Smuzhiyun ixgb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
2165*4882a593Smuzhiyun {
2166*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
2167*4882a593Smuzhiyun u32 vfta, index;
2168*4882a593Smuzhiyun
2169*4882a593Smuzhiyun /* remove VID from filter table */
2170*4882a593Smuzhiyun
2171*4882a593Smuzhiyun index = (vid >> 5) & 0x7F;
2172*4882a593Smuzhiyun vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2173*4882a593Smuzhiyun vfta &= ~(1 << (vid & 0x1F));
2174*4882a593Smuzhiyun ixgb_write_vfta(&adapter->hw, index, vfta);
2175*4882a593Smuzhiyun clear_bit(vid, adapter->active_vlans);
2176*4882a593Smuzhiyun
2177*4882a593Smuzhiyun return 0;
2178*4882a593Smuzhiyun }
2179*4882a593Smuzhiyun
2180*4882a593Smuzhiyun static void
ixgb_restore_vlan(struct ixgb_adapter * adapter)2181*4882a593Smuzhiyun ixgb_restore_vlan(struct ixgb_adapter *adapter)
2182*4882a593Smuzhiyun {
2183*4882a593Smuzhiyun u16 vid;
2184*4882a593Smuzhiyun
2185*4882a593Smuzhiyun for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2186*4882a593Smuzhiyun ixgb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2187*4882a593Smuzhiyun }
2188*4882a593Smuzhiyun
2189*4882a593Smuzhiyun /**
2190*4882a593Smuzhiyun * ixgb_io_error_detected - called when PCI error is detected
2191*4882a593Smuzhiyun * @pdev: pointer to pci device with error
2192*4882a593Smuzhiyun * @state: pci channel state after error
2193*4882a593Smuzhiyun *
2194*4882a593Smuzhiyun * This callback is called by the PCI subsystem whenever
2195*4882a593Smuzhiyun * a PCI bus error is detected.
2196*4882a593Smuzhiyun */
ixgb_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)2197*4882a593Smuzhiyun static pci_ers_result_t ixgb_io_error_detected(struct pci_dev *pdev,
2198*4882a593Smuzhiyun pci_channel_state_t state)
2199*4882a593Smuzhiyun {
2200*4882a593Smuzhiyun struct net_device *netdev = pci_get_drvdata(pdev);
2201*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
2202*4882a593Smuzhiyun
2203*4882a593Smuzhiyun netif_device_detach(netdev);
2204*4882a593Smuzhiyun
2205*4882a593Smuzhiyun if (state == pci_channel_io_perm_failure)
2206*4882a593Smuzhiyun return PCI_ERS_RESULT_DISCONNECT;
2207*4882a593Smuzhiyun
2208*4882a593Smuzhiyun if (netif_running(netdev))
2209*4882a593Smuzhiyun ixgb_down(adapter, true);
2210*4882a593Smuzhiyun
2211*4882a593Smuzhiyun pci_disable_device(pdev);
2212*4882a593Smuzhiyun
2213*4882a593Smuzhiyun /* Request a slot reset. */
2214*4882a593Smuzhiyun return PCI_ERS_RESULT_NEED_RESET;
2215*4882a593Smuzhiyun }
2216*4882a593Smuzhiyun
2217*4882a593Smuzhiyun /**
2218*4882a593Smuzhiyun * ixgb_io_slot_reset - called after the pci bus has been reset.
2219*4882a593Smuzhiyun * @pdev: pointer to pci device with error
2220*4882a593Smuzhiyun *
2221*4882a593Smuzhiyun * This callback is called after the PCI bus has been reset.
2222*4882a593Smuzhiyun * Basically, this tries to restart the card from scratch.
2223*4882a593Smuzhiyun * This is a shortened version of the device probe/discovery code,
2224*4882a593Smuzhiyun * it resembles the first-half of the ixgb_probe() routine.
2225*4882a593Smuzhiyun */
ixgb_io_slot_reset(struct pci_dev * pdev)2226*4882a593Smuzhiyun static pci_ers_result_t ixgb_io_slot_reset(struct pci_dev *pdev)
2227*4882a593Smuzhiyun {
2228*4882a593Smuzhiyun struct net_device *netdev = pci_get_drvdata(pdev);
2229*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
2230*4882a593Smuzhiyun
2231*4882a593Smuzhiyun if (pci_enable_device(pdev)) {
2232*4882a593Smuzhiyun netif_err(adapter, probe, adapter->netdev,
2233*4882a593Smuzhiyun "Cannot re-enable PCI device after reset\n");
2234*4882a593Smuzhiyun return PCI_ERS_RESULT_DISCONNECT;
2235*4882a593Smuzhiyun }
2236*4882a593Smuzhiyun
2237*4882a593Smuzhiyun /* Perform card reset only on one instance of the card */
2238*4882a593Smuzhiyun if (0 != PCI_FUNC (pdev->devfn))
2239*4882a593Smuzhiyun return PCI_ERS_RESULT_RECOVERED;
2240*4882a593Smuzhiyun
2241*4882a593Smuzhiyun pci_set_master(pdev);
2242*4882a593Smuzhiyun
2243*4882a593Smuzhiyun netif_carrier_off(netdev);
2244*4882a593Smuzhiyun netif_stop_queue(netdev);
2245*4882a593Smuzhiyun ixgb_reset(adapter);
2246*4882a593Smuzhiyun
2247*4882a593Smuzhiyun /* Make sure the EEPROM is good */
2248*4882a593Smuzhiyun if (!ixgb_validate_eeprom_checksum(&adapter->hw)) {
2249*4882a593Smuzhiyun netif_err(adapter, probe, adapter->netdev,
2250*4882a593Smuzhiyun "After reset, the EEPROM checksum is not valid\n");
2251*4882a593Smuzhiyun return PCI_ERS_RESULT_DISCONNECT;
2252*4882a593Smuzhiyun }
2253*4882a593Smuzhiyun ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
2254*4882a593Smuzhiyun memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
2255*4882a593Smuzhiyun
2256*4882a593Smuzhiyun if (!is_valid_ether_addr(netdev->perm_addr)) {
2257*4882a593Smuzhiyun netif_err(adapter, probe, adapter->netdev,
2258*4882a593Smuzhiyun "After reset, invalid MAC address\n");
2259*4882a593Smuzhiyun return PCI_ERS_RESULT_DISCONNECT;
2260*4882a593Smuzhiyun }
2261*4882a593Smuzhiyun
2262*4882a593Smuzhiyun return PCI_ERS_RESULT_RECOVERED;
2263*4882a593Smuzhiyun }
2264*4882a593Smuzhiyun
2265*4882a593Smuzhiyun /**
2266*4882a593Smuzhiyun * ixgb_io_resume - called when its OK to resume normal operations
2267*4882a593Smuzhiyun * @pdev: pointer to pci device with error
2268*4882a593Smuzhiyun *
2269*4882a593Smuzhiyun * The error recovery driver tells us that its OK to resume
2270*4882a593Smuzhiyun * normal operation. Implementation resembles the second-half
2271*4882a593Smuzhiyun * of the ixgb_probe() routine.
2272*4882a593Smuzhiyun */
ixgb_io_resume(struct pci_dev * pdev)2273*4882a593Smuzhiyun static void ixgb_io_resume(struct pci_dev *pdev)
2274*4882a593Smuzhiyun {
2275*4882a593Smuzhiyun struct net_device *netdev = pci_get_drvdata(pdev);
2276*4882a593Smuzhiyun struct ixgb_adapter *adapter = netdev_priv(netdev);
2277*4882a593Smuzhiyun
2278*4882a593Smuzhiyun pci_set_master(pdev);
2279*4882a593Smuzhiyun
2280*4882a593Smuzhiyun if (netif_running(netdev)) {
2281*4882a593Smuzhiyun if (ixgb_up(adapter)) {
2282*4882a593Smuzhiyun pr_err("can't bring device back up after reset\n");
2283*4882a593Smuzhiyun return;
2284*4882a593Smuzhiyun }
2285*4882a593Smuzhiyun }
2286*4882a593Smuzhiyun
2287*4882a593Smuzhiyun netif_device_attach(netdev);
2288*4882a593Smuzhiyun mod_timer(&adapter->watchdog_timer, jiffies);
2289*4882a593Smuzhiyun }
2290*4882a593Smuzhiyun
2291*4882a593Smuzhiyun /* ixgb_main.c */
2292