xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/intel/ixgb/ixgb_ee.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* Copyright(c) 1999 - 2008 Intel Corporation. */
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include "ixgb_hw.h"
7*4882a593Smuzhiyun #include "ixgb_ee.h"
8*4882a593Smuzhiyun /* Local prototypes */
9*4882a593Smuzhiyun static u16 ixgb_shift_in_bits(struct ixgb_hw *hw);
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun static void ixgb_shift_out_bits(struct ixgb_hw *hw,
12*4882a593Smuzhiyun 				u16 data,
13*4882a593Smuzhiyun 				u16 count);
14*4882a593Smuzhiyun static void ixgb_standby_eeprom(struct ixgb_hw *hw);
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun static bool ixgb_wait_eeprom_command(struct ixgb_hw *hw);
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun static void ixgb_cleanup_eeprom(struct ixgb_hw *hw);
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /******************************************************************************
21*4882a593Smuzhiyun  * Raises the EEPROM's clock input.
22*4882a593Smuzhiyun  *
23*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
24*4882a593Smuzhiyun  * eecd_reg - EECD's current value
25*4882a593Smuzhiyun  *****************************************************************************/
26*4882a593Smuzhiyun static void
ixgb_raise_clock(struct ixgb_hw * hw,u32 * eecd_reg)27*4882a593Smuzhiyun ixgb_raise_clock(struct ixgb_hw *hw,
28*4882a593Smuzhiyun 		  u32 *eecd_reg)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	/* Raise the clock input to the EEPROM (by setting the SK bit), and then
31*4882a593Smuzhiyun 	 *  wait 50 microseconds.
32*4882a593Smuzhiyun 	 */
33*4882a593Smuzhiyun 	*eecd_reg = *eecd_reg | IXGB_EECD_SK;
34*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, *eecd_reg);
35*4882a593Smuzhiyun 	IXGB_WRITE_FLUSH(hw);
36*4882a593Smuzhiyun 	udelay(50);
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /******************************************************************************
40*4882a593Smuzhiyun  * Lowers the EEPROM's clock input.
41*4882a593Smuzhiyun  *
42*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
43*4882a593Smuzhiyun  * eecd_reg - EECD's current value
44*4882a593Smuzhiyun  *****************************************************************************/
45*4882a593Smuzhiyun static void
ixgb_lower_clock(struct ixgb_hw * hw,u32 * eecd_reg)46*4882a593Smuzhiyun ixgb_lower_clock(struct ixgb_hw *hw,
47*4882a593Smuzhiyun 		  u32 *eecd_reg)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	/* Lower the clock input to the EEPROM (by clearing the SK bit), and then
50*4882a593Smuzhiyun 	 * wait 50 microseconds.
51*4882a593Smuzhiyun 	 */
52*4882a593Smuzhiyun 	*eecd_reg = *eecd_reg & ~IXGB_EECD_SK;
53*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, *eecd_reg);
54*4882a593Smuzhiyun 	IXGB_WRITE_FLUSH(hw);
55*4882a593Smuzhiyun 	udelay(50);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /******************************************************************************
59*4882a593Smuzhiyun  * Shift data bits out to the EEPROM.
60*4882a593Smuzhiyun  *
61*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
62*4882a593Smuzhiyun  * data - data to send to the EEPROM
63*4882a593Smuzhiyun  * count - number of bits to shift out
64*4882a593Smuzhiyun  *****************************************************************************/
65*4882a593Smuzhiyun static void
ixgb_shift_out_bits(struct ixgb_hw * hw,u16 data,u16 count)66*4882a593Smuzhiyun ixgb_shift_out_bits(struct ixgb_hw *hw,
67*4882a593Smuzhiyun 					 u16 data,
68*4882a593Smuzhiyun 					 u16 count)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	u32 eecd_reg;
71*4882a593Smuzhiyun 	u32 mask;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	/* We need to shift "count" bits out to the EEPROM. So, value in the
74*4882a593Smuzhiyun 	 * "data" parameter will be shifted out to the EEPROM one bit at a time.
75*4882a593Smuzhiyun 	 * In order to do this, "data" must be broken down into bits.
76*4882a593Smuzhiyun 	 */
77*4882a593Smuzhiyun 	mask = 0x01 << (count - 1);
78*4882a593Smuzhiyun 	eecd_reg = IXGB_READ_REG(hw, EECD);
79*4882a593Smuzhiyun 	eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
80*4882a593Smuzhiyun 	do {
81*4882a593Smuzhiyun 		/* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1",
82*4882a593Smuzhiyun 		 * and then raising and then lowering the clock (the SK bit controls
83*4882a593Smuzhiyun 		 * the clock input to the EEPROM).  A "0" is shifted out to the EEPROM
84*4882a593Smuzhiyun 		 * by setting "DI" to "0" and then raising and then lowering the clock.
85*4882a593Smuzhiyun 		 */
86*4882a593Smuzhiyun 		eecd_reg &= ~IXGB_EECD_DI;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 		if (data & mask)
89*4882a593Smuzhiyun 			eecd_reg |= IXGB_EECD_DI;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 		IXGB_WRITE_REG(hw, EECD, eecd_reg);
92*4882a593Smuzhiyun 		IXGB_WRITE_FLUSH(hw);
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 		udelay(50);
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 		ixgb_raise_clock(hw, &eecd_reg);
97*4882a593Smuzhiyun 		ixgb_lower_clock(hw, &eecd_reg);
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 		mask = mask >> 1;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	} while (mask);
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	/* We leave the "DI" bit set to "0" when we leave this routine. */
104*4882a593Smuzhiyun 	eecd_reg &= ~IXGB_EECD_DI;
105*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, eecd_reg);
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun /******************************************************************************
109*4882a593Smuzhiyun  * Shift data bits in from the EEPROM
110*4882a593Smuzhiyun  *
111*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
112*4882a593Smuzhiyun  *****************************************************************************/
113*4882a593Smuzhiyun static u16
ixgb_shift_in_bits(struct ixgb_hw * hw)114*4882a593Smuzhiyun ixgb_shift_in_bits(struct ixgb_hw *hw)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	u32 eecd_reg;
117*4882a593Smuzhiyun 	u32 i;
118*4882a593Smuzhiyun 	u16 data;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	/* In order to read a register from the EEPROM, we need to shift 16 bits
121*4882a593Smuzhiyun 	 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
122*4882a593Smuzhiyun 	 * the EEPROM (setting the SK bit), and then reading the value of the "DO"
123*4882a593Smuzhiyun 	 * bit.  During this "shifting in" process the "DI" bit should always be
124*4882a593Smuzhiyun 	 * clear..
125*4882a593Smuzhiyun 	 */
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	eecd_reg = IXGB_READ_REG(hw, EECD);
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
130*4882a593Smuzhiyun 	data = 0;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	for (i = 0; i < 16; i++) {
133*4882a593Smuzhiyun 		data = data << 1;
134*4882a593Smuzhiyun 		ixgb_raise_clock(hw, &eecd_reg);
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 		eecd_reg = IXGB_READ_REG(hw, EECD);
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 		eecd_reg &= ~(IXGB_EECD_DI);
139*4882a593Smuzhiyun 		if (eecd_reg & IXGB_EECD_DO)
140*4882a593Smuzhiyun 			data |= 1;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 		ixgb_lower_clock(hw, &eecd_reg);
143*4882a593Smuzhiyun 	}
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	return data;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun /******************************************************************************
149*4882a593Smuzhiyun  * Prepares EEPROM for access
150*4882a593Smuzhiyun  *
151*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
152*4882a593Smuzhiyun  *
153*4882a593Smuzhiyun  * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This
154*4882a593Smuzhiyun  * function should be called before issuing a command to the EEPROM.
155*4882a593Smuzhiyun  *****************************************************************************/
156*4882a593Smuzhiyun static void
ixgb_setup_eeprom(struct ixgb_hw * hw)157*4882a593Smuzhiyun ixgb_setup_eeprom(struct ixgb_hw *hw)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	u32 eecd_reg;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	eecd_reg = IXGB_READ_REG(hw, EECD);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	/*  Clear SK and DI  */
164*4882a593Smuzhiyun 	eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI);
165*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, eecd_reg);
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	/*  Set CS  */
168*4882a593Smuzhiyun 	eecd_reg |= IXGB_EECD_CS;
169*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, eecd_reg);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun /******************************************************************************
173*4882a593Smuzhiyun  * Returns EEPROM to a "standby" state
174*4882a593Smuzhiyun  *
175*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
176*4882a593Smuzhiyun  *****************************************************************************/
177*4882a593Smuzhiyun static void
ixgb_standby_eeprom(struct ixgb_hw * hw)178*4882a593Smuzhiyun ixgb_standby_eeprom(struct ixgb_hw *hw)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun 	u32 eecd_reg;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	eecd_reg = IXGB_READ_REG(hw, EECD);
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	/*  Deselect EEPROM  */
185*4882a593Smuzhiyun 	eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK);
186*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, eecd_reg);
187*4882a593Smuzhiyun 	IXGB_WRITE_FLUSH(hw);
188*4882a593Smuzhiyun 	udelay(50);
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	/*  Clock high  */
191*4882a593Smuzhiyun 	eecd_reg |= IXGB_EECD_SK;
192*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, eecd_reg);
193*4882a593Smuzhiyun 	IXGB_WRITE_FLUSH(hw);
194*4882a593Smuzhiyun 	udelay(50);
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	/*  Select EEPROM  */
197*4882a593Smuzhiyun 	eecd_reg |= IXGB_EECD_CS;
198*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, eecd_reg);
199*4882a593Smuzhiyun 	IXGB_WRITE_FLUSH(hw);
200*4882a593Smuzhiyun 	udelay(50);
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	/*  Clock low  */
203*4882a593Smuzhiyun 	eecd_reg &= ~IXGB_EECD_SK;
204*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, eecd_reg);
205*4882a593Smuzhiyun 	IXGB_WRITE_FLUSH(hw);
206*4882a593Smuzhiyun 	udelay(50);
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun /******************************************************************************
210*4882a593Smuzhiyun  * Raises then lowers the EEPROM's clock pin
211*4882a593Smuzhiyun  *
212*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
213*4882a593Smuzhiyun  *****************************************************************************/
214*4882a593Smuzhiyun static void
ixgb_clock_eeprom(struct ixgb_hw * hw)215*4882a593Smuzhiyun ixgb_clock_eeprom(struct ixgb_hw *hw)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun 	u32 eecd_reg;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	eecd_reg = IXGB_READ_REG(hw, EECD);
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	/*  Rising edge of clock  */
222*4882a593Smuzhiyun 	eecd_reg |= IXGB_EECD_SK;
223*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, eecd_reg);
224*4882a593Smuzhiyun 	IXGB_WRITE_FLUSH(hw);
225*4882a593Smuzhiyun 	udelay(50);
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	/*  Falling edge of clock  */
228*4882a593Smuzhiyun 	eecd_reg &= ~IXGB_EECD_SK;
229*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, eecd_reg);
230*4882a593Smuzhiyun 	IXGB_WRITE_FLUSH(hw);
231*4882a593Smuzhiyun 	udelay(50);
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun /******************************************************************************
235*4882a593Smuzhiyun  * Terminates a command by lowering the EEPROM's chip select pin
236*4882a593Smuzhiyun  *
237*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
238*4882a593Smuzhiyun  *****************************************************************************/
239*4882a593Smuzhiyun static void
ixgb_cleanup_eeprom(struct ixgb_hw * hw)240*4882a593Smuzhiyun ixgb_cleanup_eeprom(struct ixgb_hw *hw)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun 	u32 eecd_reg;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	eecd_reg = IXGB_READ_REG(hw, EECD);
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI);
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	IXGB_WRITE_REG(hw, EECD, eecd_reg);
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	ixgb_clock_eeprom(hw);
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun /******************************************************************************
254*4882a593Smuzhiyun  * Waits for the EEPROM to finish the current command.
255*4882a593Smuzhiyun  *
256*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
257*4882a593Smuzhiyun  *
258*4882a593Smuzhiyun  * The command is done when the EEPROM's data out pin goes high.
259*4882a593Smuzhiyun  *
260*4882a593Smuzhiyun  * Returns:
261*4882a593Smuzhiyun  *      true: EEPROM data pin is high before timeout.
262*4882a593Smuzhiyun  *      false:  Time expired.
263*4882a593Smuzhiyun  *****************************************************************************/
264*4882a593Smuzhiyun static bool
ixgb_wait_eeprom_command(struct ixgb_hw * hw)265*4882a593Smuzhiyun ixgb_wait_eeprom_command(struct ixgb_hw *hw)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun 	u32 eecd_reg;
268*4882a593Smuzhiyun 	u32 i;
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	/* Toggle the CS line.  This in effect tells to EEPROM to actually execute
271*4882a593Smuzhiyun 	 * the command in question.
272*4882a593Smuzhiyun 	 */
273*4882a593Smuzhiyun 	ixgb_standby_eeprom(hw);
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	/* Now read DO repeatedly until is high (equal to '1').  The EEPROM will
276*4882a593Smuzhiyun 	 * signal that the command has been completed by raising the DO signal.
277*4882a593Smuzhiyun 	 * If DO does not go high in 10 milliseconds, then error out.
278*4882a593Smuzhiyun 	 */
279*4882a593Smuzhiyun 	for (i = 0; i < 200; i++) {
280*4882a593Smuzhiyun 		eecd_reg = IXGB_READ_REG(hw, EECD);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 		if (eecd_reg & IXGB_EECD_DO)
283*4882a593Smuzhiyun 			return true;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 		udelay(50);
286*4882a593Smuzhiyun 	}
287*4882a593Smuzhiyun 	ASSERT(0);
288*4882a593Smuzhiyun 	return false;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun /******************************************************************************
292*4882a593Smuzhiyun  * Verifies that the EEPROM has a valid checksum
293*4882a593Smuzhiyun  *
294*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
295*4882a593Smuzhiyun  *
296*4882a593Smuzhiyun  * Reads the first 64 16 bit words of the EEPROM and sums the values read.
297*4882a593Smuzhiyun  * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
298*4882a593Smuzhiyun  * valid.
299*4882a593Smuzhiyun  *
300*4882a593Smuzhiyun  * Returns:
301*4882a593Smuzhiyun  *  true: Checksum is valid
302*4882a593Smuzhiyun  *  false: Checksum is not valid.
303*4882a593Smuzhiyun  *****************************************************************************/
304*4882a593Smuzhiyun bool
ixgb_validate_eeprom_checksum(struct ixgb_hw * hw)305*4882a593Smuzhiyun ixgb_validate_eeprom_checksum(struct ixgb_hw *hw)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun 	u16 checksum = 0;
308*4882a593Smuzhiyun 	u16 i;
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++)
311*4882a593Smuzhiyun 		checksum += ixgb_read_eeprom(hw, i);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	if (checksum == (u16) EEPROM_SUM)
314*4882a593Smuzhiyun 		return true;
315*4882a593Smuzhiyun 	else
316*4882a593Smuzhiyun 		return false;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun /******************************************************************************
320*4882a593Smuzhiyun  * Calculates the EEPROM checksum and writes it to the EEPROM
321*4882a593Smuzhiyun  *
322*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
323*4882a593Smuzhiyun  *
324*4882a593Smuzhiyun  * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA.
325*4882a593Smuzhiyun  * Writes the difference to word offset 63 of the EEPROM.
326*4882a593Smuzhiyun  *****************************************************************************/
327*4882a593Smuzhiyun void
ixgb_update_eeprom_checksum(struct ixgb_hw * hw)328*4882a593Smuzhiyun ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun 	u16 checksum = 0;
331*4882a593Smuzhiyun 	u16 i;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	for (i = 0; i < EEPROM_CHECKSUM_REG; i++)
334*4882a593Smuzhiyun 		checksum += ixgb_read_eeprom(hw, i);
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	checksum = (u16) EEPROM_SUM - checksum;
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun /******************************************************************************
342*4882a593Smuzhiyun  * Writes a 16 bit word to a given offset in the EEPROM.
343*4882a593Smuzhiyun  *
344*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
345*4882a593Smuzhiyun  * reg - offset within the EEPROM to be written to
346*4882a593Smuzhiyun  * data - 16 bit word to be written to the EEPROM
347*4882a593Smuzhiyun  *
348*4882a593Smuzhiyun  * If ixgb_update_eeprom_checksum is not called after this function, the
349*4882a593Smuzhiyun  * EEPROM will most likely contain an invalid checksum.
350*4882a593Smuzhiyun  *
351*4882a593Smuzhiyun  *****************************************************************************/
352*4882a593Smuzhiyun void
ixgb_write_eeprom(struct ixgb_hw * hw,u16 offset,u16 data)353*4882a593Smuzhiyun ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data)
354*4882a593Smuzhiyun {
355*4882a593Smuzhiyun 	struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	/* Prepare the EEPROM for writing */
358*4882a593Smuzhiyun 	ixgb_setup_eeprom(hw);
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	/*  Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode
361*4882a593Smuzhiyun 	 *  plus 4-bit dummy).  This puts the EEPROM into write/erase mode.
362*4882a593Smuzhiyun 	 */
363*4882a593Smuzhiyun 	ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5);
364*4882a593Smuzhiyun 	ixgb_shift_out_bits(hw, 0, 4);
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	/*  Prepare the EEPROM  */
367*4882a593Smuzhiyun 	ixgb_standby_eeprom(hw);
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	/*  Send the Write command (3-bit opcode + 6-bit addr)  */
370*4882a593Smuzhiyun 	ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3);
371*4882a593Smuzhiyun 	ixgb_shift_out_bits(hw, offset, 6);
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	/*  Send the data  */
374*4882a593Smuzhiyun 	ixgb_shift_out_bits(hw, data, 16);
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	ixgb_wait_eeprom_command(hw);
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	/*  Recover from write  */
379*4882a593Smuzhiyun 	ixgb_standby_eeprom(hw);
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	/* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit
382*4882a593Smuzhiyun 	 * opcode plus 4-bit dummy).  This takes the EEPROM out of write/erase
383*4882a593Smuzhiyun 	 * mode.
384*4882a593Smuzhiyun 	 */
385*4882a593Smuzhiyun 	ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5);
386*4882a593Smuzhiyun 	ixgb_shift_out_bits(hw, 0, 4);
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	/*  Done with writing  */
389*4882a593Smuzhiyun 	ixgb_cleanup_eeprom(hw);
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	/* clear the init_ctrl_reg_1 to signify that the cache is invalidated */
392*4882a593Smuzhiyun 	ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun /******************************************************************************
396*4882a593Smuzhiyun  * Reads a 16 bit word from the EEPROM.
397*4882a593Smuzhiyun  *
398*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
399*4882a593Smuzhiyun  * offset - offset of 16 bit word in the EEPROM to read
400*4882a593Smuzhiyun  *
401*4882a593Smuzhiyun  * Returns:
402*4882a593Smuzhiyun  *  The 16-bit value read from the eeprom
403*4882a593Smuzhiyun  *****************************************************************************/
404*4882a593Smuzhiyun u16
ixgb_read_eeprom(struct ixgb_hw * hw,u16 offset)405*4882a593Smuzhiyun ixgb_read_eeprom(struct ixgb_hw *hw,
406*4882a593Smuzhiyun 		  u16 offset)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun 	u16 data;
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	/*  Prepare the EEPROM for reading  */
411*4882a593Smuzhiyun 	ixgb_setup_eeprom(hw);
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	/*  Send the READ command (opcode + addr)  */
414*4882a593Smuzhiyun 	ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3);
415*4882a593Smuzhiyun 	/*
416*4882a593Smuzhiyun 	 * We have a 64 word EEPROM, there are 6 address bits
417*4882a593Smuzhiyun 	 */
418*4882a593Smuzhiyun 	ixgb_shift_out_bits(hw, offset, 6);
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	/*  Read the data  */
421*4882a593Smuzhiyun 	data = ixgb_shift_in_bits(hw);
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun 	/*  End this read operation  */
424*4882a593Smuzhiyun 	ixgb_standby_eeprom(hw);
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	return data;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun /******************************************************************************
430*4882a593Smuzhiyun  * Reads eeprom and stores data in shared structure.
431*4882a593Smuzhiyun  * Validates eeprom checksum and eeprom signature.
432*4882a593Smuzhiyun  *
433*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
434*4882a593Smuzhiyun  *
435*4882a593Smuzhiyun  * Returns:
436*4882a593Smuzhiyun  *      true: if eeprom read is successful
437*4882a593Smuzhiyun  *      false: otherwise.
438*4882a593Smuzhiyun  *****************************************************************************/
439*4882a593Smuzhiyun bool
ixgb_get_eeprom_data(struct ixgb_hw * hw)440*4882a593Smuzhiyun ixgb_get_eeprom_data(struct ixgb_hw *hw)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun 	u16 i;
443*4882a593Smuzhiyun 	u16 checksum = 0;
444*4882a593Smuzhiyun 	struct ixgb_ee_map_type *ee_map;
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	ENTER();
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	pr_debug("Reading eeprom data\n");
451*4882a593Smuzhiyun 	for (i = 0; i < IXGB_EEPROM_SIZE ; i++) {
452*4882a593Smuzhiyun 		u16 ee_data;
453*4882a593Smuzhiyun 		ee_data = ixgb_read_eeprom(hw, i);
454*4882a593Smuzhiyun 		checksum += ee_data;
455*4882a593Smuzhiyun 		hw->eeprom[i] = cpu_to_le16(ee_data);
456*4882a593Smuzhiyun 	}
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun 	if (checksum != (u16) EEPROM_SUM) {
459*4882a593Smuzhiyun 		pr_debug("Checksum invalid\n");
460*4882a593Smuzhiyun 		/* clear the init_ctrl_reg_1 to signify that the cache is
461*4882a593Smuzhiyun 		 * invalidated */
462*4882a593Smuzhiyun 		ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
463*4882a593Smuzhiyun 		return false;
464*4882a593Smuzhiyun 	}
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
467*4882a593Smuzhiyun 		 != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
468*4882a593Smuzhiyun 		pr_debug("Signature invalid\n");
469*4882a593Smuzhiyun 		return false;
470*4882a593Smuzhiyun 	}
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun 	return true;
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun /******************************************************************************
476*4882a593Smuzhiyun  * Local function to check if the eeprom signature is good
477*4882a593Smuzhiyun  * If the eeprom signature is good, calls ixgb)get_eeprom_data.
478*4882a593Smuzhiyun  *
479*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
480*4882a593Smuzhiyun  *
481*4882a593Smuzhiyun  * Returns:
482*4882a593Smuzhiyun  *      true: eeprom signature was good and the eeprom read was successful
483*4882a593Smuzhiyun  *      false: otherwise.
484*4882a593Smuzhiyun  ******************************************************************************/
485*4882a593Smuzhiyun static bool
ixgb_check_and_get_eeprom_data(struct ixgb_hw * hw)486*4882a593Smuzhiyun ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun 	struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
491*4882a593Smuzhiyun 	    == cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
492*4882a593Smuzhiyun 		return true;
493*4882a593Smuzhiyun 	} else {
494*4882a593Smuzhiyun 		return ixgb_get_eeprom_data(hw);
495*4882a593Smuzhiyun 	}
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun /******************************************************************************
499*4882a593Smuzhiyun  * return a word from the eeprom
500*4882a593Smuzhiyun  *
501*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
502*4882a593Smuzhiyun  * index - Offset of eeprom word
503*4882a593Smuzhiyun  *
504*4882a593Smuzhiyun  * Returns:
505*4882a593Smuzhiyun  *          Word at indexed offset in eeprom, if valid, 0 otherwise.
506*4882a593Smuzhiyun  ******************************************************************************/
507*4882a593Smuzhiyun __le16
ixgb_get_eeprom_word(struct ixgb_hw * hw,u16 index)508*4882a593Smuzhiyun ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index)
509*4882a593Smuzhiyun {
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun 	if (index < IXGB_EEPROM_SIZE && ixgb_check_and_get_eeprom_data(hw))
512*4882a593Smuzhiyun 		return hw->eeprom[index];
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	return 0;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun /******************************************************************************
518*4882a593Smuzhiyun  * return the mac address from EEPROM
519*4882a593Smuzhiyun  *
520*4882a593Smuzhiyun  * hw       - Struct containing variables accessed by shared code
521*4882a593Smuzhiyun  * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise
522*4882a593Smuzhiyun  *
523*4882a593Smuzhiyun  * Returns: None.
524*4882a593Smuzhiyun  ******************************************************************************/
525*4882a593Smuzhiyun void
ixgb_get_ee_mac_addr(struct ixgb_hw * hw,u8 * mac_addr)526*4882a593Smuzhiyun ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
527*4882a593Smuzhiyun 			u8 *mac_addr)
528*4882a593Smuzhiyun {
529*4882a593Smuzhiyun 	int i;
530*4882a593Smuzhiyun 	struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	ENTER();
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 	if (ixgb_check_and_get_eeprom_data(hw)) {
535*4882a593Smuzhiyun 		for (i = 0; i < ETH_ALEN; i++) {
536*4882a593Smuzhiyun 			mac_addr[i] = ee_map->mac_addr[i];
537*4882a593Smuzhiyun 		}
538*4882a593Smuzhiyun 		pr_debug("eeprom mac address = %pM\n", mac_addr);
539*4882a593Smuzhiyun 	}
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun /******************************************************************************
544*4882a593Smuzhiyun  * return the Printed Board Assembly number from EEPROM
545*4882a593Smuzhiyun  *
546*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
547*4882a593Smuzhiyun  *
548*4882a593Smuzhiyun  * Returns:
549*4882a593Smuzhiyun  *          PBA number if EEPROM contents are valid, 0 otherwise
550*4882a593Smuzhiyun  ******************************************************************************/
551*4882a593Smuzhiyun u32
ixgb_get_ee_pba_number(struct ixgb_hw * hw)552*4882a593Smuzhiyun ixgb_get_ee_pba_number(struct ixgb_hw *hw)
553*4882a593Smuzhiyun {
554*4882a593Smuzhiyun 	if (ixgb_check_and_get_eeprom_data(hw))
555*4882a593Smuzhiyun 		return le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG])
556*4882a593Smuzhiyun 			| (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16);
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun 	return 0;
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun /******************************************************************************
563*4882a593Smuzhiyun  * return the Device Id from EEPROM
564*4882a593Smuzhiyun  *
565*4882a593Smuzhiyun  * hw - Struct containing variables accessed by shared code
566*4882a593Smuzhiyun  *
567*4882a593Smuzhiyun  * Returns:
568*4882a593Smuzhiyun  *          Device Id if EEPROM contents are valid, 0 otherwise
569*4882a593Smuzhiyun  ******************************************************************************/
570*4882a593Smuzhiyun u16
ixgb_get_ee_device_id(struct ixgb_hw * hw)571*4882a593Smuzhiyun ixgb_get_ee_device_id(struct ixgb_hw *hw)
572*4882a593Smuzhiyun {
573*4882a593Smuzhiyun 	struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun 	if (ixgb_check_and_get_eeprom_data(hw))
576*4882a593Smuzhiyun 		return le16_to_cpu(ee_map->device_id);
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	return 0;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun 
581