1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright (c) 2018 Intel Corporation */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef _IGC_PHY_H_ 5*4882a593Smuzhiyun #define _IGC_PHY_H_ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include "igc_mac.h" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun s32 igc_check_reset_block(struct igc_hw *hw); 10*4882a593Smuzhiyun s32 igc_phy_hw_reset(struct igc_hw *hw); 11*4882a593Smuzhiyun s32 igc_get_phy_id(struct igc_hw *hw); 12*4882a593Smuzhiyun s32 igc_phy_has_link(struct igc_hw *hw, u32 iterations, 13*4882a593Smuzhiyun u32 usec_interval, bool *success); 14*4882a593Smuzhiyun s32 igc_check_downshift(struct igc_hw *hw); 15*4882a593Smuzhiyun s32 igc_setup_copper_link(struct igc_hw *hw); 16*4882a593Smuzhiyun void igc_power_up_phy_copper(struct igc_hw *hw); 17*4882a593Smuzhiyun void igc_power_down_phy_copper(struct igc_hw *hw); 18*4882a593Smuzhiyun s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data); 19*4882a593Smuzhiyun s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data); 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #endif 22