1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright(c) 2007 - 2018 Intel Corporation. */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef _E1000_I210_H_ 5*4882a593Smuzhiyun #define _E1000_I210_H_ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask); 8*4882a593Smuzhiyun void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask); 9*4882a593Smuzhiyun s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data); 10*4882a593Smuzhiyun s32 igb_read_invm_version(struct e1000_hw *hw, 11*4882a593Smuzhiyun struct e1000_fw_version *invm_ver); 12*4882a593Smuzhiyun s32 igb_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data); 13*4882a593Smuzhiyun s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data); 14*4882a593Smuzhiyun s32 igb_init_nvm_params_i210(struct e1000_hw *hw); 15*4882a593Smuzhiyun bool igb_get_flash_presence_i210(struct e1000_hw *hw); 16*4882a593Smuzhiyun s32 igb_pll_workaround_i210(struct e1000_hw *hw); 17*4882a593Smuzhiyun s32 igb_get_cfg_done_i210(struct e1000_hw *hw); 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define E1000_STM_OPCODE 0xDB00 20*4882a593Smuzhiyun #define E1000_EEPROM_FLASH_SIZE_WORD 0x11 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \ 23*4882a593Smuzhiyun (u8)((invm_dword) & 0x7) 24*4882a593Smuzhiyun #define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \ 25*4882a593Smuzhiyun (u8)(((invm_dword) & 0x0000FE00) >> 9) 26*4882a593Smuzhiyun #define INVM_DWORD_TO_WORD_DATA(invm_dword) \ 27*4882a593Smuzhiyun (u16)(((invm_dword) & 0xFFFF0000) >> 16) 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun enum E1000_INVM_STRUCTURE_TYPE { 30*4882a593Smuzhiyun E1000_INVM_UNINITIALIZED_STRUCTURE = 0x00, 31*4882a593Smuzhiyun E1000_INVM_WORD_AUTOLOAD_STRUCTURE = 0x01, 32*4882a593Smuzhiyun E1000_INVM_CSR_AUTOLOAD_STRUCTURE = 0x02, 33*4882a593Smuzhiyun E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE = 0x03, 34*4882a593Smuzhiyun E1000_INVM_RSA_KEY_SHA256_STRUCTURE = 0x04, 35*4882a593Smuzhiyun E1000_INVM_INVALIDATED_STRUCTURE = 0x0F, 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS 8 39*4882a593Smuzhiyun #define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS 1 40*4882a593Smuzhiyun #define E1000_INVM_ULT_BYTES_SIZE 8 41*4882a593Smuzhiyun #define E1000_INVM_RECORD_SIZE_IN_BYTES 4 42*4882a593Smuzhiyun #define E1000_INVM_VER_FIELD_ONE 0x1FF8 43*4882a593Smuzhiyun #define E1000_INVM_VER_FIELD_TWO 0x7FE000 44*4882a593Smuzhiyun #define E1000_INVM_IMGTYPE_FIELD 0x1F800000 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #define E1000_INVM_MAJOR_MASK 0x3F0 47*4882a593Smuzhiyun #define E1000_INVM_MINOR_MASK 0xF 48*4882a593Smuzhiyun #define E1000_INVM_MAJOR_SHIFT 4 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define ID_LED_DEFAULT_I210 ((ID_LED_OFF1_ON2 << 8) | \ 51*4882a593Smuzhiyun (ID_LED_DEF1_DEF2 << 4) | \ 52*4882a593Smuzhiyun (ID_LED_OFF1_OFF2)) 53*4882a593Smuzhiyun #define ID_LED_DEFAULT_I210_SERDES ((ID_LED_DEF1_DEF2 << 8) | \ 54*4882a593Smuzhiyun (ID_LED_DEF1_DEF2 << 4) | \ 55*4882a593Smuzhiyun (ID_LED_OFF1_ON2)) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* NVM offset defaults for i211 device */ 58*4882a593Smuzhiyun #define NVM_INIT_CTRL_2_DEFAULT_I211 0X7243 59*4882a593Smuzhiyun #define NVM_INIT_CTRL_4_DEFAULT_I211 0x00C1 60*4882a593Smuzhiyun #define NVM_LED_1_CFG_DEFAULT_I211 0x0184 61*4882a593Smuzhiyun #define NVM_LED_0_2_CFG_DEFAULT_I211 0x200C 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* PLL Defines */ 64*4882a593Smuzhiyun #define E1000_PCI_PMCSR 0x44 65*4882a593Smuzhiyun #define E1000_PCI_PMCSR_D3 0x03 66*4882a593Smuzhiyun #define E1000_MAX_PLL_TRIES 5 67*4882a593Smuzhiyun #define E1000_PHY_PLL_UNCONF 0xFF 68*4882a593Smuzhiyun #define E1000_PHY_PLL_FREQ_PAGE 0xFC 69*4882a593Smuzhiyun #define E1000_PHY_PLL_FREQ_REG 0x000E 70*4882a593Smuzhiyun #define E1000_INVM_DEFAULT_AL 0x202F 71*4882a593Smuzhiyun #define E1000_INVM_AUTOLOAD 0x0A 72*4882a593Smuzhiyun #define E1000_INVM_PLL_WO_VAL 0x0010 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #endif 75