1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright (c) 2019, Intel Corporation. */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef _ICE_FLOW_H_ 5*4882a593Smuzhiyun #define _ICE_FLOW_H_ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define ICE_FLOW_ENTRY_HANDLE_INVAL 0 8*4882a593Smuzhiyun #define ICE_FLOW_FLD_OFF_INVAL 0xffff 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* Generate flow hash field from flow field type(s) */ 11*4882a593Smuzhiyun #define ICE_FLOW_HASH_IPV4 \ 12*4882a593Smuzhiyun (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) | \ 13*4882a593Smuzhiyun BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA)) 14*4882a593Smuzhiyun #define ICE_FLOW_HASH_IPV6 \ 15*4882a593Smuzhiyun (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \ 16*4882a593Smuzhiyun BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA)) 17*4882a593Smuzhiyun #define ICE_FLOW_HASH_TCP_PORT \ 18*4882a593Smuzhiyun (BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \ 19*4882a593Smuzhiyun BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)) 20*4882a593Smuzhiyun #define ICE_FLOW_HASH_UDP_PORT \ 21*4882a593Smuzhiyun (BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT) | \ 22*4882a593Smuzhiyun BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)) 23*4882a593Smuzhiyun #define ICE_FLOW_HASH_SCTP_PORT \ 24*4882a593Smuzhiyun (BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT) | \ 25*4882a593Smuzhiyun BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)) 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define ICE_HASH_INVALID 0 28*4882a593Smuzhiyun #define ICE_HASH_TCP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_TCP_PORT) 29*4882a593Smuzhiyun #define ICE_HASH_TCP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_TCP_PORT) 30*4882a593Smuzhiyun #define ICE_HASH_UDP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_UDP_PORT) 31*4882a593Smuzhiyun #define ICE_HASH_UDP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_UDP_PORT) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* Protocol header fields within a packet segment. A segment consists of one or 34*4882a593Smuzhiyun * more protocol headers that make up a logical group of protocol headers. Each 35*4882a593Smuzhiyun * logical group of protocol headers encapsulates or is encapsulated using/by 36*4882a593Smuzhiyun * tunneling or encapsulation protocols for network virtualization such as GRE, 37*4882a593Smuzhiyun * VxLAN, etc. 38*4882a593Smuzhiyun */ 39*4882a593Smuzhiyun enum ice_flow_seg_hdr { 40*4882a593Smuzhiyun ICE_FLOW_SEG_HDR_NONE = 0x00000000, 41*4882a593Smuzhiyun ICE_FLOW_SEG_HDR_IPV4 = 0x00000004, 42*4882a593Smuzhiyun ICE_FLOW_SEG_HDR_IPV6 = 0x00000008, 43*4882a593Smuzhiyun ICE_FLOW_SEG_HDR_TCP = 0x00000040, 44*4882a593Smuzhiyun ICE_FLOW_SEG_HDR_UDP = 0x00000080, 45*4882a593Smuzhiyun ICE_FLOW_SEG_HDR_SCTP = 0x00000100, 46*4882a593Smuzhiyun ICE_FLOW_SEG_HDR_GRE = 0x00000200, 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun enum ice_flow_field { 50*4882a593Smuzhiyun /* L3 */ 51*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_IPV4_SA, 52*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_IPV4_DA, 53*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_IPV6_SA, 54*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_IPV6_DA, 55*4882a593Smuzhiyun /* L4 */ 56*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_TCP_SRC_PORT, 57*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_TCP_DST_PORT, 58*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_UDP_SRC_PORT, 59*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_UDP_DST_PORT, 60*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT, 61*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_SCTP_DST_PORT, 62*4882a593Smuzhiyun /* GRE */ 63*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_GRE_KEYID, 64*4882a593Smuzhiyun /* The total number of enums must not exceed 64 */ 65*4882a593Smuzhiyun ICE_FLOW_FIELD_IDX_MAX 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* Flow headers and fields for AVF support */ 69*4882a593Smuzhiyun enum ice_flow_avf_hdr_field { 70*4882a593Smuzhiyun /* Values 0 - 28 are reserved for future use */ 71*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_INVALID = 0, 72*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP = 29, 73*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP, 74*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_IPV4_UDP, 75*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK, 76*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_IPV4_TCP, 77*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_IPV4_SCTP, 78*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_IPV4_OTHER, 79*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_FRAG_IPV4, 80*4882a593Smuzhiyun /* Values 37-38 are reserved */ 81*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP = 39, 82*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP, 83*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_IPV6_UDP, 84*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK, 85*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_IPV6_TCP, 86*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_IPV6_SCTP, 87*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_IPV6_OTHER, 88*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_FRAG_IPV6, 89*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_RSVD47, 90*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_FCOE_OX, 91*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_FCOE_RX, 92*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_FCOE_OTHER, 93*4882a593Smuzhiyun /* Values 51-62 are reserved */ 94*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_L2_PAYLOAD = 63, 95*4882a593Smuzhiyun ICE_AVF_FLOW_FIELD_MAX 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun /* Supported RSS offloads This macro is defined to support 99*4882a593Smuzhiyun * VIRTCHNL_OP_GET_RSS_HENA_CAPS ops. PF driver sends the RSS hardware 100*4882a593Smuzhiyun * capabilities to the caller of this ops. 101*4882a593Smuzhiyun */ 102*4882a593Smuzhiyun #define ICE_DEFAULT_RSS_HENA ( \ 103*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP) | \ 104*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP) | \ 105*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP) | \ 106*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \ 107*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4) | \ 108*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP) | \ 109*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP) | \ 110*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP) | \ 111*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \ 112*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6) | \ 113*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \ 114*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \ 115*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \ 116*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \ 117*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \ 118*4882a593Smuzhiyun BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP)) 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun enum ice_flow_dir { 121*4882a593Smuzhiyun ICE_FLOW_RX = 0x02, 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun enum ice_flow_priority { 125*4882a593Smuzhiyun ICE_FLOW_PRIO_LOW, 126*4882a593Smuzhiyun ICE_FLOW_PRIO_NORMAL, 127*4882a593Smuzhiyun ICE_FLOW_PRIO_HIGH 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun #define ICE_FLOW_SEG_MAX 2 131*4882a593Smuzhiyun #define ICE_FLOW_SEG_RAW_FLD_MAX 2 132*4882a593Smuzhiyun #define ICE_FLOW_FV_EXTRACT_SZ 2 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun #define ICE_FLOW_SET_HDRS(seg, val) ((seg)->hdrs |= (u32)(val)) 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun struct ice_flow_seg_xtrct { 137*4882a593Smuzhiyun u8 prot_id; /* Protocol ID of extracted header field */ 138*4882a593Smuzhiyun u16 off; /* Starting offset of the field in header in bytes */ 139*4882a593Smuzhiyun u8 idx; /* Index of FV entry used */ 140*4882a593Smuzhiyun u8 disp; /* Displacement of field in bits fr. FV entry's start */ 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun enum ice_flow_fld_match_type { 144*4882a593Smuzhiyun ICE_FLOW_FLD_TYPE_REG, /* Value, mask */ 145*4882a593Smuzhiyun ICE_FLOW_FLD_TYPE_RANGE, /* Value, mask, last (upper bound) */ 146*4882a593Smuzhiyun ICE_FLOW_FLD_TYPE_PREFIX, /* IP address, prefix, size of prefix */ 147*4882a593Smuzhiyun ICE_FLOW_FLD_TYPE_SIZE, /* Value, mask, size of match */ 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun struct ice_flow_fld_loc { 151*4882a593Smuzhiyun /* Describe offsets of field information relative to the beginning of 152*4882a593Smuzhiyun * input buffer provided when adding flow entries. 153*4882a593Smuzhiyun */ 154*4882a593Smuzhiyun u16 val; /* Offset where the value is located */ 155*4882a593Smuzhiyun u16 mask; /* Offset where the mask/prefix value is located */ 156*4882a593Smuzhiyun u16 last; /* Length or offset where the upper value is located */ 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun struct ice_flow_fld_info { 160*4882a593Smuzhiyun enum ice_flow_fld_match_type type; 161*4882a593Smuzhiyun /* Location where to retrieve data from an input buffer */ 162*4882a593Smuzhiyun struct ice_flow_fld_loc src; 163*4882a593Smuzhiyun /* Location where to put the data into the final entry buffer */ 164*4882a593Smuzhiyun struct ice_flow_fld_loc entry; 165*4882a593Smuzhiyun struct ice_flow_seg_xtrct xtrct; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun struct ice_flow_seg_fld_raw { 169*4882a593Smuzhiyun struct ice_flow_fld_info info; 170*4882a593Smuzhiyun u16 off; /* Offset from the start of the segment */ 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun struct ice_flow_seg_info { 174*4882a593Smuzhiyun u32 hdrs; /* Bitmask indicating protocol headers present */ 175*4882a593Smuzhiyun u64 match; /* Bitmask indicating header fields to be matched */ 176*4882a593Smuzhiyun u64 range; /* Bitmask indicating header fields matched as ranges */ 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun struct ice_flow_fld_info fields[ICE_FLOW_FIELD_IDX_MAX]; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun u8 raws_cnt; /* Number of raw fields to be matched */ 181*4882a593Smuzhiyun struct ice_flow_seg_fld_raw raws[ICE_FLOW_SEG_RAW_FLD_MAX]; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun /* This structure describes a flow entry, and is tracked only in this file */ 185*4882a593Smuzhiyun struct ice_flow_entry { 186*4882a593Smuzhiyun struct list_head l_entry; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun u64 id; 189*4882a593Smuzhiyun struct ice_flow_prof *prof; 190*4882a593Smuzhiyun /* Flow entry's content */ 191*4882a593Smuzhiyun void *entry; 192*4882a593Smuzhiyun enum ice_flow_priority priority; 193*4882a593Smuzhiyun u16 vsi_handle; 194*4882a593Smuzhiyun u16 entry_sz; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun #define ICE_FLOW_ENTRY_HNDL(e) ((u64)(uintptr_t)e) 198*4882a593Smuzhiyun #define ICE_FLOW_ENTRY_PTR(h) ((struct ice_flow_entry *)(uintptr_t)(h)) 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun struct ice_flow_prof { 201*4882a593Smuzhiyun struct list_head l_entry; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun u64 id; 204*4882a593Smuzhiyun enum ice_flow_dir dir; 205*4882a593Smuzhiyun u8 segs_cnt; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun /* Keep track of flow entries associated with this flow profile */ 208*4882a593Smuzhiyun struct mutex entries_lock; 209*4882a593Smuzhiyun struct list_head entries; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun struct ice_flow_seg_info segs[ICE_FLOW_SEG_MAX]; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun /* software VSI handles referenced by this flow profile */ 214*4882a593Smuzhiyun DECLARE_BITMAP(vsis, ICE_MAX_VSI); 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun struct ice_rss_cfg { 218*4882a593Smuzhiyun struct list_head l_entry; 219*4882a593Smuzhiyun /* bitmap of VSIs added to the RSS entry */ 220*4882a593Smuzhiyun DECLARE_BITMAP(vsis, ICE_MAX_VSI); 221*4882a593Smuzhiyun u64 hashed_flds; 222*4882a593Smuzhiyun u32 packet_hdr; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun enum ice_status 226*4882a593Smuzhiyun ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir, 227*4882a593Smuzhiyun u64 prof_id, struct ice_flow_seg_info *segs, u8 segs_cnt, 228*4882a593Smuzhiyun struct ice_flow_prof **prof); 229*4882a593Smuzhiyun enum ice_status 230*4882a593Smuzhiyun ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id); 231*4882a593Smuzhiyun enum ice_status 232*4882a593Smuzhiyun ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id, 233*4882a593Smuzhiyun u64 entry_id, u16 vsi, enum ice_flow_priority prio, 234*4882a593Smuzhiyun void *data, u64 *entry_h); 235*4882a593Smuzhiyun enum ice_status 236*4882a593Smuzhiyun ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_h); 237*4882a593Smuzhiyun void 238*4882a593Smuzhiyun ice_flow_set_fld(struct ice_flow_seg_info *seg, enum ice_flow_field fld, 239*4882a593Smuzhiyun u16 val_loc, u16 mask_loc, u16 last_loc, bool range); 240*4882a593Smuzhiyun void 241*4882a593Smuzhiyun ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len, 242*4882a593Smuzhiyun u16 val_loc, u16 mask_loc); 243*4882a593Smuzhiyun void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle); 244*4882a593Smuzhiyun enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle); 245*4882a593Smuzhiyun enum ice_status 246*4882a593Smuzhiyun ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds); 247*4882a593Smuzhiyun enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle); 248*4882a593Smuzhiyun enum ice_status 249*4882a593Smuzhiyun ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, 250*4882a593Smuzhiyun u32 addl_hdrs); 251*4882a593Smuzhiyun u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs); 252*4882a593Smuzhiyun #endif /* _ICE_FLOW_H_ */ 253