xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/intel/i40e/i40e_xsk.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* Copyright(c) 2018 Intel Corporation. */
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun #include <linux/bpf_trace.h>
5*4882a593Smuzhiyun #include <net/xdp_sock_drv.h>
6*4882a593Smuzhiyun #include <net/xdp.h>
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include "i40e.h"
9*4882a593Smuzhiyun #include "i40e_txrx_common.h"
10*4882a593Smuzhiyun #include "i40e_xsk.h"
11*4882a593Smuzhiyun 
i40e_clear_rx_bi_zc(struct i40e_ring * rx_ring)12*4882a593Smuzhiyun void i40e_clear_rx_bi_zc(struct i40e_ring *rx_ring)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun 	memset(rx_ring->rx_bi_zc, 0,
15*4882a593Smuzhiyun 	       sizeof(*rx_ring->rx_bi_zc) * rx_ring->count);
16*4882a593Smuzhiyun }
17*4882a593Smuzhiyun 
i40e_rx_bi(struct i40e_ring * rx_ring,u32 idx)18*4882a593Smuzhiyun static struct xdp_buff **i40e_rx_bi(struct i40e_ring *rx_ring, u32 idx)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun 	return &rx_ring->rx_bi_zc[idx];
21*4882a593Smuzhiyun }
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /**
24*4882a593Smuzhiyun  * i40e_realloc_rx_xdp_bi - reallocate SW ring for either XSK or normal buffer
25*4882a593Smuzhiyun  * @rx_ring: Current rx ring
26*4882a593Smuzhiyun  * @pool_present: is pool for XSK present
27*4882a593Smuzhiyun  *
28*4882a593Smuzhiyun  * Try allocating memory and return ENOMEM, if failed to allocate.
29*4882a593Smuzhiyun  * If allocation was successful, substitute buffer with allocated one.
30*4882a593Smuzhiyun  * Returns 0 on success, negative on failure
31*4882a593Smuzhiyun  */
i40e_realloc_rx_xdp_bi(struct i40e_ring * rx_ring,bool pool_present)32*4882a593Smuzhiyun static int i40e_realloc_rx_xdp_bi(struct i40e_ring *rx_ring, bool pool_present)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	size_t elem_size = pool_present ? sizeof(*rx_ring->rx_bi_zc) :
35*4882a593Smuzhiyun 					  sizeof(*rx_ring->rx_bi);
36*4882a593Smuzhiyun 	void *sw_ring = kcalloc(rx_ring->count, elem_size, GFP_KERNEL);
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	if (!sw_ring)
39*4882a593Smuzhiyun 		return -ENOMEM;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	if (pool_present) {
42*4882a593Smuzhiyun 		kfree(rx_ring->rx_bi);
43*4882a593Smuzhiyun 		rx_ring->rx_bi = NULL;
44*4882a593Smuzhiyun 		rx_ring->rx_bi_zc = sw_ring;
45*4882a593Smuzhiyun 	} else {
46*4882a593Smuzhiyun 		kfree(rx_ring->rx_bi_zc);
47*4882a593Smuzhiyun 		rx_ring->rx_bi_zc = NULL;
48*4882a593Smuzhiyun 		rx_ring->rx_bi = sw_ring;
49*4882a593Smuzhiyun 	}
50*4882a593Smuzhiyun 	return 0;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun /**
54*4882a593Smuzhiyun  * i40e_realloc_rx_bi_zc - reallocate rx SW rings
55*4882a593Smuzhiyun  * @vsi: Current VSI
56*4882a593Smuzhiyun  * @zc: is zero copy set
57*4882a593Smuzhiyun  *
58*4882a593Smuzhiyun  * Reallocate buffer for rx_rings that might be used by XSK.
59*4882a593Smuzhiyun  * XDP requires more memory, than rx_buf provides.
60*4882a593Smuzhiyun  * Returns 0 on success, negative on failure
61*4882a593Smuzhiyun  */
i40e_realloc_rx_bi_zc(struct i40e_vsi * vsi,bool zc)62*4882a593Smuzhiyun int i40e_realloc_rx_bi_zc(struct i40e_vsi *vsi, bool zc)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun 	struct i40e_ring *rx_ring;
65*4882a593Smuzhiyun 	unsigned long q;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	for_each_set_bit(q, vsi->af_xdp_zc_qps, vsi->alloc_queue_pairs) {
68*4882a593Smuzhiyun 		rx_ring = vsi->rx_rings[q];
69*4882a593Smuzhiyun 		if (i40e_realloc_rx_xdp_bi(rx_ring, zc))
70*4882a593Smuzhiyun 			return -ENOMEM;
71*4882a593Smuzhiyun 	}
72*4882a593Smuzhiyun 	return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun /**
76*4882a593Smuzhiyun  * i40e_xsk_pool_enable - Enable/associate an AF_XDP buffer pool to a
77*4882a593Smuzhiyun  * certain ring/qid
78*4882a593Smuzhiyun  * @vsi: Current VSI
79*4882a593Smuzhiyun  * @pool: buffer pool
80*4882a593Smuzhiyun  * @qid: Rx ring to associate buffer pool with
81*4882a593Smuzhiyun  *
82*4882a593Smuzhiyun  * Returns 0 on success, <0 on failure
83*4882a593Smuzhiyun  **/
i40e_xsk_pool_enable(struct i40e_vsi * vsi,struct xsk_buff_pool * pool,u16 qid)84*4882a593Smuzhiyun static int i40e_xsk_pool_enable(struct i40e_vsi *vsi,
85*4882a593Smuzhiyun 				struct xsk_buff_pool *pool,
86*4882a593Smuzhiyun 				u16 qid)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun 	struct net_device *netdev = vsi->netdev;
89*4882a593Smuzhiyun 	bool if_running;
90*4882a593Smuzhiyun 	int err;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	if (vsi->type != I40E_VSI_MAIN)
93*4882a593Smuzhiyun 		return -EINVAL;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	if (qid >= vsi->num_queue_pairs)
96*4882a593Smuzhiyun 		return -EINVAL;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	if (qid >= netdev->real_num_rx_queues ||
99*4882a593Smuzhiyun 	    qid >= netdev->real_num_tx_queues)
100*4882a593Smuzhiyun 		return -EINVAL;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	err = xsk_pool_dma_map(pool, &vsi->back->pdev->dev, I40E_RX_DMA_ATTR);
103*4882a593Smuzhiyun 	if (err)
104*4882a593Smuzhiyun 		return err;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	set_bit(qid, vsi->af_xdp_zc_qps);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	if_running = netif_running(vsi->netdev) && i40e_enabled_xdp_vsi(vsi);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (if_running) {
111*4882a593Smuzhiyun 		err = i40e_queue_pair_disable(vsi, qid);
112*4882a593Smuzhiyun 		if (err)
113*4882a593Smuzhiyun 			return err;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 		err = i40e_realloc_rx_xdp_bi(vsi->rx_rings[qid], true);
116*4882a593Smuzhiyun 		if (err)
117*4882a593Smuzhiyun 			return err;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 		err = i40e_queue_pair_enable(vsi, qid);
120*4882a593Smuzhiyun 		if (err)
121*4882a593Smuzhiyun 			return err;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 		/* Kick start the NAPI context so that receiving will start */
124*4882a593Smuzhiyun 		err = i40e_xsk_wakeup(vsi->netdev, qid, XDP_WAKEUP_RX);
125*4882a593Smuzhiyun 		if (err)
126*4882a593Smuzhiyun 			return err;
127*4882a593Smuzhiyun 	}
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	return 0;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun /**
133*4882a593Smuzhiyun  * i40e_xsk_pool_disable - Disassociate an AF_XDP buffer pool from a
134*4882a593Smuzhiyun  * certain ring/qid
135*4882a593Smuzhiyun  * @vsi: Current VSI
136*4882a593Smuzhiyun  * @qid: Rx ring to associate buffer pool with
137*4882a593Smuzhiyun  *
138*4882a593Smuzhiyun  * Returns 0 on success, <0 on failure
139*4882a593Smuzhiyun  **/
i40e_xsk_pool_disable(struct i40e_vsi * vsi,u16 qid)140*4882a593Smuzhiyun static int i40e_xsk_pool_disable(struct i40e_vsi *vsi, u16 qid)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	struct net_device *netdev = vsi->netdev;
143*4882a593Smuzhiyun 	struct xsk_buff_pool *pool;
144*4882a593Smuzhiyun 	bool if_running;
145*4882a593Smuzhiyun 	int err;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	pool = xsk_get_pool_from_qid(netdev, qid);
148*4882a593Smuzhiyun 	if (!pool)
149*4882a593Smuzhiyun 		return -EINVAL;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	if_running = netif_running(vsi->netdev) && i40e_enabled_xdp_vsi(vsi);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	if (if_running) {
154*4882a593Smuzhiyun 		err = i40e_queue_pair_disable(vsi, qid);
155*4882a593Smuzhiyun 		if (err)
156*4882a593Smuzhiyun 			return err;
157*4882a593Smuzhiyun 	}
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	clear_bit(qid, vsi->af_xdp_zc_qps);
160*4882a593Smuzhiyun 	xsk_pool_dma_unmap(pool, I40E_RX_DMA_ATTR);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	if (if_running) {
163*4882a593Smuzhiyun 		err = i40e_realloc_rx_xdp_bi(vsi->rx_rings[qid], false);
164*4882a593Smuzhiyun 		if (err)
165*4882a593Smuzhiyun 			return err;
166*4882a593Smuzhiyun 		err = i40e_queue_pair_enable(vsi, qid);
167*4882a593Smuzhiyun 		if (err)
168*4882a593Smuzhiyun 			return err;
169*4882a593Smuzhiyun 	}
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	return 0;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun /**
175*4882a593Smuzhiyun  * i40e_xsk_pool_setup - Enable/disassociate an AF_XDP buffer pool to/from
176*4882a593Smuzhiyun  * a ring/qid
177*4882a593Smuzhiyun  * @vsi: Current VSI
178*4882a593Smuzhiyun  * @pool: Buffer pool to enable/associate to a ring, or NULL to disable
179*4882a593Smuzhiyun  * @qid: Rx ring to (dis)associate buffer pool (from)to
180*4882a593Smuzhiyun  *
181*4882a593Smuzhiyun  * This function enables or disables a buffer pool to a certain ring.
182*4882a593Smuzhiyun  *
183*4882a593Smuzhiyun  * Returns 0 on success, <0 on failure
184*4882a593Smuzhiyun  **/
i40e_xsk_pool_setup(struct i40e_vsi * vsi,struct xsk_buff_pool * pool,u16 qid)185*4882a593Smuzhiyun int i40e_xsk_pool_setup(struct i40e_vsi *vsi, struct xsk_buff_pool *pool,
186*4882a593Smuzhiyun 			u16 qid)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun 	return pool ? i40e_xsk_pool_enable(vsi, pool, qid) :
189*4882a593Smuzhiyun 		i40e_xsk_pool_disable(vsi, qid);
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun /**
193*4882a593Smuzhiyun  * i40e_run_xdp_zc - Executes an XDP program on an xdp_buff
194*4882a593Smuzhiyun  * @rx_ring: Rx ring
195*4882a593Smuzhiyun  * @xdp: xdp_buff used as input to the XDP program
196*4882a593Smuzhiyun  *
197*4882a593Smuzhiyun  * Returns any of I40E_XDP_{PASS, CONSUMED, TX, REDIR}
198*4882a593Smuzhiyun  **/
i40e_run_xdp_zc(struct i40e_ring * rx_ring,struct xdp_buff * xdp)199*4882a593Smuzhiyun static int i40e_run_xdp_zc(struct i40e_ring *rx_ring, struct xdp_buff *xdp)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun 	int err, result = I40E_XDP_PASS;
202*4882a593Smuzhiyun 	struct i40e_ring *xdp_ring;
203*4882a593Smuzhiyun 	struct bpf_prog *xdp_prog;
204*4882a593Smuzhiyun 	u32 act;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	rcu_read_lock();
207*4882a593Smuzhiyun 	/* NB! xdp_prog will always be !NULL, due to the fact that
208*4882a593Smuzhiyun 	 * this path is enabled by setting an XDP program.
209*4882a593Smuzhiyun 	 */
210*4882a593Smuzhiyun 	xdp_prog = READ_ONCE(rx_ring->xdp_prog);
211*4882a593Smuzhiyun 	act = bpf_prog_run_xdp(xdp_prog, xdp);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	if (likely(act == XDP_REDIRECT)) {
214*4882a593Smuzhiyun 		err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
215*4882a593Smuzhiyun 		if (err)
216*4882a593Smuzhiyun 			goto out_failure;
217*4882a593Smuzhiyun 		rcu_read_unlock();
218*4882a593Smuzhiyun 		return I40E_XDP_REDIR;
219*4882a593Smuzhiyun 	}
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	switch (act) {
222*4882a593Smuzhiyun 	case XDP_PASS:
223*4882a593Smuzhiyun 		break;
224*4882a593Smuzhiyun 	case XDP_TX:
225*4882a593Smuzhiyun 		xdp_ring = rx_ring->vsi->xdp_rings[rx_ring->queue_index];
226*4882a593Smuzhiyun 		result = i40e_xmit_xdp_tx_ring(xdp, xdp_ring);
227*4882a593Smuzhiyun 		if (result == I40E_XDP_CONSUMED)
228*4882a593Smuzhiyun 			goto out_failure;
229*4882a593Smuzhiyun 		break;
230*4882a593Smuzhiyun 	default:
231*4882a593Smuzhiyun 		bpf_warn_invalid_xdp_action(act);
232*4882a593Smuzhiyun 		fallthrough;
233*4882a593Smuzhiyun 	case XDP_ABORTED:
234*4882a593Smuzhiyun out_failure:
235*4882a593Smuzhiyun 		trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
236*4882a593Smuzhiyun 		fallthrough; /* handle aborts by dropping packet */
237*4882a593Smuzhiyun 	case XDP_DROP:
238*4882a593Smuzhiyun 		result = I40E_XDP_CONSUMED;
239*4882a593Smuzhiyun 		break;
240*4882a593Smuzhiyun 	}
241*4882a593Smuzhiyun 	rcu_read_unlock();
242*4882a593Smuzhiyun 	return result;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun 
i40e_alloc_rx_buffers_zc(struct i40e_ring * rx_ring,u16 count)245*4882a593Smuzhiyun bool i40e_alloc_rx_buffers_zc(struct i40e_ring *rx_ring, u16 count)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun 	u16 ntu = rx_ring->next_to_use;
248*4882a593Smuzhiyun 	union i40e_rx_desc *rx_desc;
249*4882a593Smuzhiyun 	struct xdp_buff **bi, *xdp;
250*4882a593Smuzhiyun 	dma_addr_t dma;
251*4882a593Smuzhiyun 	bool ok = true;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	rx_desc = I40E_RX_DESC(rx_ring, ntu);
254*4882a593Smuzhiyun 	bi = i40e_rx_bi(rx_ring, ntu);
255*4882a593Smuzhiyun 	do {
256*4882a593Smuzhiyun 		xdp = xsk_buff_alloc(rx_ring->xsk_pool);
257*4882a593Smuzhiyun 		if (!xdp) {
258*4882a593Smuzhiyun 			ok = false;
259*4882a593Smuzhiyun 			goto no_buffers;
260*4882a593Smuzhiyun 		}
261*4882a593Smuzhiyun 		*bi = xdp;
262*4882a593Smuzhiyun 		dma = xsk_buff_xdp_get_dma(xdp);
263*4882a593Smuzhiyun 		rx_desc->read.pkt_addr = cpu_to_le64(dma);
264*4882a593Smuzhiyun 		rx_desc->read.hdr_addr = 0;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 		rx_desc++;
267*4882a593Smuzhiyun 		bi++;
268*4882a593Smuzhiyun 		ntu++;
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 		if (unlikely(ntu == rx_ring->count)) {
271*4882a593Smuzhiyun 			rx_desc = I40E_RX_DESC(rx_ring, 0);
272*4882a593Smuzhiyun 			bi = i40e_rx_bi(rx_ring, 0);
273*4882a593Smuzhiyun 			ntu = 0;
274*4882a593Smuzhiyun 		}
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 		count--;
277*4882a593Smuzhiyun 	} while (count);
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun no_buffers:
280*4882a593Smuzhiyun 	if (rx_ring->next_to_use != ntu) {
281*4882a593Smuzhiyun 		/* clear the status bits for the next_to_use descriptor */
282*4882a593Smuzhiyun 		rx_desc->wb.qword1.status_error_len = 0;
283*4882a593Smuzhiyun 		i40e_release_rx_desc(rx_ring, ntu);
284*4882a593Smuzhiyun 	}
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	return ok;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun /**
290*4882a593Smuzhiyun  * i40e_construct_skb_zc - Create skbuff from zero-copy Rx buffer
291*4882a593Smuzhiyun  * @rx_ring: Rx ring
292*4882a593Smuzhiyun  * @xdp: xdp_buff
293*4882a593Smuzhiyun  *
294*4882a593Smuzhiyun  * This functions allocates a new skb from a zero-copy Rx buffer.
295*4882a593Smuzhiyun  *
296*4882a593Smuzhiyun  * Returns the skb, or NULL on failure.
297*4882a593Smuzhiyun  **/
i40e_construct_skb_zc(struct i40e_ring * rx_ring,struct xdp_buff * xdp)298*4882a593Smuzhiyun static struct sk_buff *i40e_construct_skb_zc(struct i40e_ring *rx_ring,
299*4882a593Smuzhiyun 					     struct xdp_buff *xdp)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun 	unsigned int totalsize = xdp->data_end - xdp->data_meta;
302*4882a593Smuzhiyun 	unsigned int metasize = xdp->data - xdp->data_meta;
303*4882a593Smuzhiyun 	struct sk_buff *skb;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	net_prefetch(xdp->data_meta);
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	/* allocate a skb to store the frags */
308*4882a593Smuzhiyun 	skb = __napi_alloc_skb(&rx_ring->q_vector->napi, totalsize,
309*4882a593Smuzhiyun 			       GFP_ATOMIC | __GFP_NOWARN);
310*4882a593Smuzhiyun 	if (unlikely(!skb))
311*4882a593Smuzhiyun 		return NULL;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	memcpy(__skb_put(skb, totalsize), xdp->data_meta,
314*4882a593Smuzhiyun 	       ALIGN(totalsize, sizeof(long)));
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	if (metasize) {
317*4882a593Smuzhiyun 		skb_metadata_set(skb, metasize);
318*4882a593Smuzhiyun 		__skb_pull(skb, metasize);
319*4882a593Smuzhiyun 	}
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	xsk_buff_free(xdp);
322*4882a593Smuzhiyun 	return skb;
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun /**
326*4882a593Smuzhiyun  * i40e_inc_ntc: Advance the next_to_clean index
327*4882a593Smuzhiyun  * @rx_ring: Rx ring
328*4882a593Smuzhiyun  **/
i40e_inc_ntc(struct i40e_ring * rx_ring)329*4882a593Smuzhiyun static void i40e_inc_ntc(struct i40e_ring *rx_ring)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun 	u32 ntc = rx_ring->next_to_clean + 1;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	ntc = (ntc < rx_ring->count) ? ntc : 0;
334*4882a593Smuzhiyun 	rx_ring->next_to_clean = ntc;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun /**
338*4882a593Smuzhiyun  * i40e_clean_rx_irq_zc - Consumes Rx packets from the hardware ring
339*4882a593Smuzhiyun  * @rx_ring: Rx ring
340*4882a593Smuzhiyun  * @budget: NAPI budget
341*4882a593Smuzhiyun  *
342*4882a593Smuzhiyun  * Returns amount of work completed
343*4882a593Smuzhiyun  **/
i40e_clean_rx_irq_zc(struct i40e_ring * rx_ring,int budget)344*4882a593Smuzhiyun int i40e_clean_rx_irq_zc(struct i40e_ring *rx_ring, int budget)
345*4882a593Smuzhiyun {
346*4882a593Smuzhiyun 	unsigned int total_rx_bytes = 0, total_rx_packets = 0;
347*4882a593Smuzhiyun 	u16 cleaned_count = I40E_DESC_UNUSED(rx_ring);
348*4882a593Smuzhiyun 	unsigned int xdp_res, xdp_xmit = 0;
349*4882a593Smuzhiyun 	bool failure = false;
350*4882a593Smuzhiyun 	struct sk_buff *skb;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	while (likely(total_rx_packets < (unsigned int)budget)) {
353*4882a593Smuzhiyun 		union i40e_rx_desc *rx_desc;
354*4882a593Smuzhiyun 		struct xdp_buff **bi;
355*4882a593Smuzhiyun 		unsigned int size;
356*4882a593Smuzhiyun 		u64 qword;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 		rx_desc = I40E_RX_DESC(rx_ring, rx_ring->next_to_clean);
359*4882a593Smuzhiyun 		qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 		/* This memory barrier is needed to keep us from reading
362*4882a593Smuzhiyun 		 * any other fields out of the rx_desc until we have
363*4882a593Smuzhiyun 		 * verified the descriptor has been written back.
364*4882a593Smuzhiyun 		 */
365*4882a593Smuzhiyun 		dma_rmb();
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 		if (i40e_rx_is_programming_status(qword)) {
368*4882a593Smuzhiyun 			i40e_clean_programming_status(rx_ring,
369*4882a593Smuzhiyun 						      rx_desc->raw.qword[0],
370*4882a593Smuzhiyun 						      qword);
371*4882a593Smuzhiyun 			bi = i40e_rx_bi(rx_ring, rx_ring->next_to_clean);
372*4882a593Smuzhiyun 			xsk_buff_free(*bi);
373*4882a593Smuzhiyun 			*bi = NULL;
374*4882a593Smuzhiyun 			cleaned_count++;
375*4882a593Smuzhiyun 			i40e_inc_ntc(rx_ring);
376*4882a593Smuzhiyun 			continue;
377*4882a593Smuzhiyun 		}
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 		bi = i40e_rx_bi(rx_ring, rx_ring->next_to_clean);
380*4882a593Smuzhiyun 		size = (qword & I40E_RXD_QW1_LENGTH_PBUF_MASK) >>
381*4882a593Smuzhiyun 		       I40E_RXD_QW1_LENGTH_PBUF_SHIFT;
382*4882a593Smuzhiyun 		if (!size)
383*4882a593Smuzhiyun 			break;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 		bi = i40e_rx_bi(rx_ring, rx_ring->next_to_clean);
386*4882a593Smuzhiyun 		(*bi)->data_end = (*bi)->data + size;
387*4882a593Smuzhiyun 		xsk_buff_dma_sync_for_cpu(*bi, rx_ring->xsk_pool);
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 		xdp_res = i40e_run_xdp_zc(rx_ring, *bi);
390*4882a593Smuzhiyun 		if (xdp_res) {
391*4882a593Smuzhiyun 			if (xdp_res & (I40E_XDP_TX | I40E_XDP_REDIR))
392*4882a593Smuzhiyun 				xdp_xmit |= xdp_res;
393*4882a593Smuzhiyun 			else
394*4882a593Smuzhiyun 				xsk_buff_free(*bi);
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 			*bi = NULL;
397*4882a593Smuzhiyun 			total_rx_bytes += size;
398*4882a593Smuzhiyun 			total_rx_packets++;
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun 			cleaned_count++;
401*4882a593Smuzhiyun 			i40e_inc_ntc(rx_ring);
402*4882a593Smuzhiyun 			continue;
403*4882a593Smuzhiyun 		}
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 		/* XDP_PASS path */
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 		/* NB! We are not checking for errors using
408*4882a593Smuzhiyun 		 * i40e_test_staterr with
409*4882a593Smuzhiyun 		 * BIT(I40E_RXD_QW1_ERROR_SHIFT). This is due to that
410*4882a593Smuzhiyun 		 * SBP is *not* set in PRT_SBPVSI (default not set).
411*4882a593Smuzhiyun 		 */
412*4882a593Smuzhiyun 		skb = i40e_construct_skb_zc(rx_ring, *bi);
413*4882a593Smuzhiyun 		if (!skb) {
414*4882a593Smuzhiyun 			rx_ring->rx_stats.alloc_buff_failed++;
415*4882a593Smuzhiyun 			break;
416*4882a593Smuzhiyun 		}
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 		*bi = NULL;
419*4882a593Smuzhiyun 		cleaned_count++;
420*4882a593Smuzhiyun 		i40e_inc_ntc(rx_ring);
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 		if (eth_skb_pad(skb))
423*4882a593Smuzhiyun 			continue;
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 		total_rx_bytes += skb->len;
426*4882a593Smuzhiyun 		total_rx_packets++;
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 		i40e_process_skb_fields(rx_ring, rx_desc, skb);
429*4882a593Smuzhiyun 		napi_gro_receive(&rx_ring->q_vector->napi, skb);
430*4882a593Smuzhiyun 	}
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	if (cleaned_count >= I40E_RX_BUFFER_WRITE)
433*4882a593Smuzhiyun 		failure = !i40e_alloc_rx_buffers_zc(rx_ring, cleaned_count);
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	i40e_finalize_xdp_rx(rx_ring, xdp_xmit);
436*4882a593Smuzhiyun 	i40e_update_rx_stats(rx_ring, total_rx_bytes, total_rx_packets);
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	if (xsk_uses_need_wakeup(rx_ring->xsk_pool)) {
439*4882a593Smuzhiyun 		if (failure || rx_ring->next_to_clean == rx_ring->next_to_use)
440*4882a593Smuzhiyun 			xsk_set_rx_need_wakeup(rx_ring->xsk_pool);
441*4882a593Smuzhiyun 		else
442*4882a593Smuzhiyun 			xsk_clear_rx_need_wakeup(rx_ring->xsk_pool);
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 		return (int)total_rx_packets;
445*4882a593Smuzhiyun 	}
446*4882a593Smuzhiyun 	return failure ? budget : (int)total_rx_packets;
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun /**
450*4882a593Smuzhiyun  * i40e_xmit_zc - Performs zero-copy Tx AF_XDP
451*4882a593Smuzhiyun  * @xdp_ring: XDP Tx ring
452*4882a593Smuzhiyun  * @budget: NAPI budget
453*4882a593Smuzhiyun  *
454*4882a593Smuzhiyun  * Returns true if the work is finished.
455*4882a593Smuzhiyun  **/
i40e_xmit_zc(struct i40e_ring * xdp_ring,unsigned int budget)456*4882a593Smuzhiyun static bool i40e_xmit_zc(struct i40e_ring *xdp_ring, unsigned int budget)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun 	unsigned int sent_frames = 0, total_bytes = 0;
459*4882a593Smuzhiyun 	struct i40e_tx_desc *tx_desc = NULL;
460*4882a593Smuzhiyun 	struct i40e_tx_buffer *tx_bi;
461*4882a593Smuzhiyun 	struct xdp_desc desc;
462*4882a593Smuzhiyun 	dma_addr_t dma;
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	while (budget-- > 0) {
465*4882a593Smuzhiyun 		if (!xsk_tx_peek_desc(xdp_ring->xsk_pool, &desc))
466*4882a593Smuzhiyun 			break;
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 		dma = xsk_buff_raw_get_dma(xdp_ring->xsk_pool, desc.addr);
469*4882a593Smuzhiyun 		xsk_buff_raw_dma_sync_for_device(xdp_ring->xsk_pool, dma,
470*4882a593Smuzhiyun 						 desc.len);
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun 		tx_bi = &xdp_ring->tx_bi[xdp_ring->next_to_use];
473*4882a593Smuzhiyun 		tx_bi->bytecount = desc.len;
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 		tx_desc = I40E_TX_DESC(xdp_ring, xdp_ring->next_to_use);
476*4882a593Smuzhiyun 		tx_desc->buffer_addr = cpu_to_le64(dma);
477*4882a593Smuzhiyun 		tx_desc->cmd_type_offset_bsz =
478*4882a593Smuzhiyun 			build_ctob(I40E_TX_DESC_CMD_ICRC
479*4882a593Smuzhiyun 				   | I40E_TX_DESC_CMD_EOP,
480*4882a593Smuzhiyun 				   0, desc.len, 0);
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 		sent_frames++;
483*4882a593Smuzhiyun 		total_bytes += tx_bi->bytecount;
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 		xdp_ring->next_to_use++;
486*4882a593Smuzhiyun 		if (xdp_ring->next_to_use == xdp_ring->count)
487*4882a593Smuzhiyun 			xdp_ring->next_to_use = 0;
488*4882a593Smuzhiyun 	}
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	if (tx_desc) {
491*4882a593Smuzhiyun 		/* Request an interrupt for the last frame and bump tail ptr. */
492*4882a593Smuzhiyun 		tx_desc->cmd_type_offset_bsz |= (I40E_TX_DESC_CMD_RS <<
493*4882a593Smuzhiyun 						 I40E_TXD_QW1_CMD_SHIFT);
494*4882a593Smuzhiyun 		i40e_xdp_ring_update_tail(xdp_ring);
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 		xsk_tx_release(xdp_ring->xsk_pool);
497*4882a593Smuzhiyun 		i40e_update_tx_stats(xdp_ring, sent_frames, total_bytes);
498*4882a593Smuzhiyun 	}
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun 	return !!budget;
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun /**
504*4882a593Smuzhiyun  * i40e_clean_xdp_tx_buffer - Frees and unmaps an XDP Tx entry
505*4882a593Smuzhiyun  * @tx_ring: XDP Tx ring
506*4882a593Smuzhiyun  * @tx_bi: Tx buffer info to clean
507*4882a593Smuzhiyun  **/
i40e_clean_xdp_tx_buffer(struct i40e_ring * tx_ring,struct i40e_tx_buffer * tx_bi)508*4882a593Smuzhiyun static void i40e_clean_xdp_tx_buffer(struct i40e_ring *tx_ring,
509*4882a593Smuzhiyun 				     struct i40e_tx_buffer *tx_bi)
510*4882a593Smuzhiyun {
511*4882a593Smuzhiyun 	xdp_return_frame(tx_bi->xdpf);
512*4882a593Smuzhiyun 	tx_ring->xdp_tx_active--;
513*4882a593Smuzhiyun 	dma_unmap_single(tx_ring->dev,
514*4882a593Smuzhiyun 			 dma_unmap_addr(tx_bi, dma),
515*4882a593Smuzhiyun 			 dma_unmap_len(tx_bi, len), DMA_TO_DEVICE);
516*4882a593Smuzhiyun 	dma_unmap_len_set(tx_bi, len, 0);
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun /**
520*4882a593Smuzhiyun  * i40e_clean_xdp_tx_irq - Completes AF_XDP entries, and cleans XDP entries
521*4882a593Smuzhiyun  * @vsi: Current VSI
522*4882a593Smuzhiyun  * @tx_ring: XDP Tx ring
523*4882a593Smuzhiyun  *
524*4882a593Smuzhiyun  * Returns true if cleanup/tranmission is done.
525*4882a593Smuzhiyun  **/
i40e_clean_xdp_tx_irq(struct i40e_vsi * vsi,struct i40e_ring * tx_ring)526*4882a593Smuzhiyun bool i40e_clean_xdp_tx_irq(struct i40e_vsi *vsi, struct i40e_ring *tx_ring)
527*4882a593Smuzhiyun {
528*4882a593Smuzhiyun 	struct xsk_buff_pool *bp = tx_ring->xsk_pool;
529*4882a593Smuzhiyun 	u32 i, completed_frames, xsk_frames = 0;
530*4882a593Smuzhiyun 	u32 head_idx = i40e_get_head(tx_ring);
531*4882a593Smuzhiyun 	struct i40e_tx_buffer *tx_bi;
532*4882a593Smuzhiyun 	unsigned int ntc;
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 	if (head_idx < tx_ring->next_to_clean)
535*4882a593Smuzhiyun 		head_idx += tx_ring->count;
536*4882a593Smuzhiyun 	completed_frames = head_idx - tx_ring->next_to_clean;
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	if (completed_frames == 0)
539*4882a593Smuzhiyun 		goto out_xmit;
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	if (likely(!tx_ring->xdp_tx_active)) {
542*4882a593Smuzhiyun 		xsk_frames = completed_frames;
543*4882a593Smuzhiyun 		goto skip;
544*4882a593Smuzhiyun 	}
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	ntc = tx_ring->next_to_clean;
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun 	for (i = 0; i < completed_frames; i++) {
549*4882a593Smuzhiyun 		tx_bi = &tx_ring->tx_bi[ntc];
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 		if (tx_bi->xdpf) {
552*4882a593Smuzhiyun 			i40e_clean_xdp_tx_buffer(tx_ring, tx_bi);
553*4882a593Smuzhiyun 			tx_bi->xdpf = NULL;
554*4882a593Smuzhiyun 		} else {
555*4882a593Smuzhiyun 			xsk_frames++;
556*4882a593Smuzhiyun 		}
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun 		if (++ntc >= tx_ring->count)
559*4882a593Smuzhiyun 			ntc = 0;
560*4882a593Smuzhiyun 	}
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun skip:
563*4882a593Smuzhiyun 	tx_ring->next_to_clean += completed_frames;
564*4882a593Smuzhiyun 	if (unlikely(tx_ring->next_to_clean >= tx_ring->count))
565*4882a593Smuzhiyun 		tx_ring->next_to_clean -= tx_ring->count;
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun 	if (xsk_frames)
568*4882a593Smuzhiyun 		xsk_tx_completed(bp, xsk_frames);
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun 	i40e_arm_wb(tx_ring, vsi, completed_frames);
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun out_xmit:
573*4882a593Smuzhiyun 	if (xsk_uses_need_wakeup(tx_ring->xsk_pool))
574*4882a593Smuzhiyun 		xsk_set_tx_need_wakeup(tx_ring->xsk_pool);
575*4882a593Smuzhiyun 
576*4882a593Smuzhiyun 	return i40e_xmit_zc(tx_ring, I40E_DESC_UNUSED(tx_ring));
577*4882a593Smuzhiyun }
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun /**
580*4882a593Smuzhiyun  * i40e_xsk_wakeup - Implements the ndo_xsk_wakeup
581*4882a593Smuzhiyun  * @dev: the netdevice
582*4882a593Smuzhiyun  * @queue_id: queue id to wake up
583*4882a593Smuzhiyun  * @flags: ignored in our case since we have Rx and Tx in the same NAPI.
584*4882a593Smuzhiyun  *
585*4882a593Smuzhiyun  * Returns <0 for errors, 0 otherwise.
586*4882a593Smuzhiyun  **/
i40e_xsk_wakeup(struct net_device * dev,u32 queue_id,u32 flags)587*4882a593Smuzhiyun int i40e_xsk_wakeup(struct net_device *dev, u32 queue_id, u32 flags)
588*4882a593Smuzhiyun {
589*4882a593Smuzhiyun 	struct i40e_netdev_priv *np = netdev_priv(dev);
590*4882a593Smuzhiyun 	struct i40e_vsi *vsi = np->vsi;
591*4882a593Smuzhiyun 	struct i40e_pf *pf = vsi->back;
592*4882a593Smuzhiyun 	struct i40e_ring *ring;
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	if (test_bit(__I40E_CONFIG_BUSY, pf->state))
595*4882a593Smuzhiyun 		return -EAGAIN;
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 	if (test_bit(__I40E_VSI_DOWN, vsi->state))
598*4882a593Smuzhiyun 		return -ENETDOWN;
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	if (!i40e_enabled_xdp_vsi(vsi))
601*4882a593Smuzhiyun 		return -ENXIO;
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun 	if (queue_id >= vsi->num_queue_pairs)
604*4882a593Smuzhiyun 		return -ENXIO;
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun 	if (!vsi->xdp_rings[queue_id]->xsk_pool)
607*4882a593Smuzhiyun 		return -ENXIO;
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 	ring = vsi->xdp_rings[queue_id];
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	/* The idea here is that if NAPI is running, mark a miss, so
612*4882a593Smuzhiyun 	 * it will run again. If not, trigger an interrupt and
613*4882a593Smuzhiyun 	 * schedule the NAPI from interrupt context. If NAPI would be
614*4882a593Smuzhiyun 	 * scheduled here, the interrupt affinity would not be
615*4882a593Smuzhiyun 	 * honored.
616*4882a593Smuzhiyun 	 */
617*4882a593Smuzhiyun 	if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi))
618*4882a593Smuzhiyun 		i40e_force_wb(vsi, ring->q_vector);
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun 	return 0;
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun 
i40e_xsk_clean_rx_ring(struct i40e_ring * rx_ring)623*4882a593Smuzhiyun void i40e_xsk_clean_rx_ring(struct i40e_ring *rx_ring)
624*4882a593Smuzhiyun {
625*4882a593Smuzhiyun 	u16 i;
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	for (i = 0; i < rx_ring->count; i++) {
628*4882a593Smuzhiyun 		struct xdp_buff *rx_bi = *i40e_rx_bi(rx_ring, i);
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 		if (!rx_bi)
631*4882a593Smuzhiyun 			continue;
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 		xsk_buff_free(rx_bi);
634*4882a593Smuzhiyun 		rx_bi = NULL;
635*4882a593Smuzhiyun 	}
636*4882a593Smuzhiyun }
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun /**
639*4882a593Smuzhiyun  * i40e_xsk_clean_xdp_ring - Clean the XDP Tx ring on shutdown
640*4882a593Smuzhiyun  * @tx_ring: XDP Tx ring
641*4882a593Smuzhiyun  **/
i40e_xsk_clean_tx_ring(struct i40e_ring * tx_ring)642*4882a593Smuzhiyun void i40e_xsk_clean_tx_ring(struct i40e_ring *tx_ring)
643*4882a593Smuzhiyun {
644*4882a593Smuzhiyun 	u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
645*4882a593Smuzhiyun 	struct xsk_buff_pool *bp = tx_ring->xsk_pool;
646*4882a593Smuzhiyun 	struct i40e_tx_buffer *tx_bi;
647*4882a593Smuzhiyun 	u32 xsk_frames = 0;
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun 	while (ntc != ntu) {
650*4882a593Smuzhiyun 		tx_bi = &tx_ring->tx_bi[ntc];
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 		if (tx_bi->xdpf)
653*4882a593Smuzhiyun 			i40e_clean_xdp_tx_buffer(tx_ring, tx_bi);
654*4882a593Smuzhiyun 		else
655*4882a593Smuzhiyun 			xsk_frames++;
656*4882a593Smuzhiyun 
657*4882a593Smuzhiyun 		tx_bi->xdpf = NULL;
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 		ntc++;
660*4882a593Smuzhiyun 		if (ntc >= tx_ring->count)
661*4882a593Smuzhiyun 			ntc = 0;
662*4882a593Smuzhiyun 	}
663*4882a593Smuzhiyun 
664*4882a593Smuzhiyun 	if (xsk_frames)
665*4882a593Smuzhiyun 		xsk_tx_completed(bp, xsk_frames);
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun /**
669*4882a593Smuzhiyun  * i40e_xsk_any_rx_ring_enabled - Checks if Rx rings have an AF_XDP
670*4882a593Smuzhiyun  * buffer pool attached
671*4882a593Smuzhiyun  * @vsi: vsi
672*4882a593Smuzhiyun  *
673*4882a593Smuzhiyun  * Returns true if any of the Rx rings has an AF_XDP buffer pool attached
674*4882a593Smuzhiyun  **/
i40e_xsk_any_rx_ring_enabled(struct i40e_vsi * vsi)675*4882a593Smuzhiyun bool i40e_xsk_any_rx_ring_enabled(struct i40e_vsi *vsi)
676*4882a593Smuzhiyun {
677*4882a593Smuzhiyun 	struct net_device *netdev = vsi->netdev;
678*4882a593Smuzhiyun 	int i;
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun 	for (i = 0; i < vsi->num_queue_pairs; i++) {
681*4882a593Smuzhiyun 		if (xsk_get_pool_from_qid(netdev, i))
682*4882a593Smuzhiyun 			return true;
683*4882a593Smuzhiyun 	}
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 	return false;
686*4882a593Smuzhiyun }
687