1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* Copyright(c) 2013 - 2018 Intel Corporation. */
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun /* ethtool support for i40e */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include "i40e.h"
7*4882a593Smuzhiyun #include "i40e_diag.h"
8*4882a593Smuzhiyun #include "i40e_txrx_common.h"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun /* ethtool statistics helpers */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun /**
13*4882a593Smuzhiyun * struct i40e_stats - definition for an ethtool statistic
14*4882a593Smuzhiyun * @stat_string: statistic name to display in ethtool -S output
15*4882a593Smuzhiyun * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64)
16*4882a593Smuzhiyun * @stat_offset: offsetof() the stat from a base pointer
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * This structure defines a statistic to be added to the ethtool stats buffer.
19*4882a593Smuzhiyun * It defines a statistic as offset from a common base pointer. Stats should
20*4882a593Smuzhiyun * be defined in constant arrays using the I40E_STAT macro, with every element
21*4882a593Smuzhiyun * of the array using the same _type for calculating the sizeof_stat and
22*4882a593Smuzhiyun * stat_offset.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or
25*4882a593Smuzhiyun * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from
26*4882a593Smuzhiyun * the i40e_add_ethtool_stat() helper function.
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * The @stat_string is interpreted as a format string, allowing formatted
29*4882a593Smuzhiyun * values to be inserted while looping over multiple structures for a given
30*4882a593Smuzhiyun * statistics array. Thus, every statistic string in an array should have the
31*4882a593Smuzhiyun * same type and number of format specifiers, to be formatted by variadic
32*4882a593Smuzhiyun * arguments to the i40e_add_stat_string() helper function.
33*4882a593Smuzhiyun **/
34*4882a593Smuzhiyun struct i40e_stats {
35*4882a593Smuzhiyun char stat_string[ETH_GSTRING_LEN];
36*4882a593Smuzhiyun int sizeof_stat;
37*4882a593Smuzhiyun int stat_offset;
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* Helper macro to define an i40e_stat structure with proper size and type.
41*4882a593Smuzhiyun * Use this when defining constant statistics arrays. Note that @_type expects
42*4882a593Smuzhiyun * only a type name and is used multiple times.
43*4882a593Smuzhiyun */
44*4882a593Smuzhiyun #define I40E_STAT(_type, _name, _stat) { \
45*4882a593Smuzhiyun .stat_string = _name, \
46*4882a593Smuzhiyun .sizeof_stat = sizeof_field(_type, _stat), \
47*4882a593Smuzhiyun .stat_offset = offsetof(_type, _stat) \
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* Helper macro for defining some statistics directly copied from the netdev
51*4882a593Smuzhiyun * stats structure.
52*4882a593Smuzhiyun */
53*4882a593Smuzhiyun #define I40E_NETDEV_STAT(_net_stat) \
54*4882a593Smuzhiyun I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /* Helper macro for defining some statistics related to queues */
57*4882a593Smuzhiyun #define I40E_QUEUE_STAT(_name, _stat) \
58*4882a593Smuzhiyun I40E_STAT(struct i40e_ring, _name, _stat)
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* Stats associated with a Tx or Rx ring */
61*4882a593Smuzhiyun static const struct i40e_stats i40e_gstrings_queue_stats[] = {
62*4882a593Smuzhiyun I40E_QUEUE_STAT("%s-%u.packets", stats.packets),
63*4882a593Smuzhiyun I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes),
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /**
67*4882a593Smuzhiyun * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer
68*4882a593Smuzhiyun * @data: location to store the stat value
69*4882a593Smuzhiyun * @pointer: basis for where to copy from
70*4882a593Smuzhiyun * @stat: the stat definition
71*4882a593Smuzhiyun *
72*4882a593Smuzhiyun * Copies the stat data defined by the pointer and stat structure pair into
73*4882a593Smuzhiyun * the memory supplied as data. Used to implement i40e_add_ethtool_stats and
74*4882a593Smuzhiyun * i40e_add_queue_stats. If the pointer is null, data will be zero'd.
75*4882a593Smuzhiyun */
76*4882a593Smuzhiyun static void
i40e_add_one_ethtool_stat(u64 * data,void * pointer,const struct i40e_stats * stat)77*4882a593Smuzhiyun i40e_add_one_ethtool_stat(u64 *data, void *pointer,
78*4882a593Smuzhiyun const struct i40e_stats *stat)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun char *p;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun if (!pointer) {
83*4882a593Smuzhiyun /* ensure that the ethtool data buffer is zero'd for any stats
84*4882a593Smuzhiyun * which don't have a valid pointer.
85*4882a593Smuzhiyun */
86*4882a593Smuzhiyun *data = 0;
87*4882a593Smuzhiyun return;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun p = (char *)pointer + stat->stat_offset;
91*4882a593Smuzhiyun switch (stat->sizeof_stat) {
92*4882a593Smuzhiyun case sizeof(u64):
93*4882a593Smuzhiyun *data = *((u64 *)p);
94*4882a593Smuzhiyun break;
95*4882a593Smuzhiyun case sizeof(u32):
96*4882a593Smuzhiyun *data = *((u32 *)p);
97*4882a593Smuzhiyun break;
98*4882a593Smuzhiyun case sizeof(u16):
99*4882a593Smuzhiyun *data = *((u16 *)p);
100*4882a593Smuzhiyun break;
101*4882a593Smuzhiyun case sizeof(u8):
102*4882a593Smuzhiyun *data = *((u8 *)p);
103*4882a593Smuzhiyun break;
104*4882a593Smuzhiyun default:
105*4882a593Smuzhiyun WARN_ONCE(1, "unexpected stat size for %s",
106*4882a593Smuzhiyun stat->stat_string);
107*4882a593Smuzhiyun *data = 0;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /**
112*4882a593Smuzhiyun * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer
113*4882a593Smuzhiyun * @data: ethtool stats buffer
114*4882a593Smuzhiyun * @pointer: location to copy stats from
115*4882a593Smuzhiyun * @stats: array of stats to copy
116*4882a593Smuzhiyun * @size: the size of the stats definition
117*4882a593Smuzhiyun *
118*4882a593Smuzhiyun * Copy the stats defined by the stats array using the pointer as a base into
119*4882a593Smuzhiyun * the data buffer supplied by ethtool. Updates the data pointer to point to
120*4882a593Smuzhiyun * the next empty location for successive calls to __i40e_add_ethtool_stats.
121*4882a593Smuzhiyun * If pointer is null, set the data values to zero and update the pointer to
122*4882a593Smuzhiyun * skip these stats.
123*4882a593Smuzhiyun **/
124*4882a593Smuzhiyun static void
__i40e_add_ethtool_stats(u64 ** data,void * pointer,const struct i40e_stats stats[],const unsigned int size)125*4882a593Smuzhiyun __i40e_add_ethtool_stats(u64 **data, void *pointer,
126*4882a593Smuzhiyun const struct i40e_stats stats[],
127*4882a593Smuzhiyun const unsigned int size)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun unsigned int i;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun for (i = 0; i < size; i++)
132*4882a593Smuzhiyun i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /**
136*4882a593Smuzhiyun * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer
137*4882a593Smuzhiyun * @data: ethtool stats buffer
138*4882a593Smuzhiyun * @pointer: location where stats are stored
139*4882a593Smuzhiyun * @stats: static const array of stat definitions
140*4882a593Smuzhiyun *
141*4882a593Smuzhiyun * Macro to ease the use of __i40e_add_ethtool_stats by taking a static
142*4882a593Smuzhiyun * constant stats array and passing the ARRAY_SIZE(). This avoids typos by
143*4882a593Smuzhiyun * ensuring that we pass the size associated with the given stats array.
144*4882a593Smuzhiyun *
145*4882a593Smuzhiyun * The parameter @stats is evaluated twice, so parameters with side effects
146*4882a593Smuzhiyun * should be avoided.
147*4882a593Smuzhiyun **/
148*4882a593Smuzhiyun #define i40e_add_ethtool_stats(data, pointer, stats) \
149*4882a593Smuzhiyun __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats))
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun /**
152*4882a593Smuzhiyun * i40e_add_queue_stats - copy queue statistics into supplied buffer
153*4882a593Smuzhiyun * @data: ethtool stats buffer
154*4882a593Smuzhiyun * @ring: the ring to copy
155*4882a593Smuzhiyun *
156*4882a593Smuzhiyun * Queue statistics must be copied while protected by
157*4882a593Smuzhiyun * u64_stats_fetch_begin_irq, so we can't directly use i40e_add_ethtool_stats.
158*4882a593Smuzhiyun * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the
159*4882a593Smuzhiyun * ring pointer is null, zero out the queue stat values and update the data
160*4882a593Smuzhiyun * pointer. Otherwise safely copy the stats from the ring into the supplied
161*4882a593Smuzhiyun * buffer and update the data pointer when finished.
162*4882a593Smuzhiyun *
163*4882a593Smuzhiyun * This function expects to be called while under rcu_read_lock().
164*4882a593Smuzhiyun **/
165*4882a593Smuzhiyun static void
i40e_add_queue_stats(u64 ** data,struct i40e_ring * ring)166*4882a593Smuzhiyun i40e_add_queue_stats(u64 **data, struct i40e_ring *ring)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats);
169*4882a593Smuzhiyun const struct i40e_stats *stats = i40e_gstrings_queue_stats;
170*4882a593Smuzhiyun unsigned int start;
171*4882a593Smuzhiyun unsigned int i;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /* To avoid invalid statistics values, ensure that we keep retrying
174*4882a593Smuzhiyun * the copy until we get a consistent value according to
175*4882a593Smuzhiyun * u64_stats_fetch_retry_irq. But first, make sure our ring is
176*4882a593Smuzhiyun * non-null before attempting to access its syncp.
177*4882a593Smuzhiyun */
178*4882a593Smuzhiyun do {
179*4882a593Smuzhiyun start = !ring ? 0 : u64_stats_fetch_begin_irq(&ring->syncp);
180*4882a593Smuzhiyun for (i = 0; i < size; i++) {
181*4882a593Smuzhiyun i40e_add_one_ethtool_stat(&(*data)[i], ring,
182*4882a593Smuzhiyun &stats[i]);
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun } while (ring && u64_stats_fetch_retry_irq(&ring->syncp, start));
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /* Once we successfully copy the stats in, update the data pointer */
187*4882a593Smuzhiyun *data += size;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /**
191*4882a593Smuzhiyun * __i40e_add_stat_strings - copy stat strings into ethtool buffer
192*4882a593Smuzhiyun * @p: ethtool supplied buffer
193*4882a593Smuzhiyun * @stats: stat definitions array
194*4882a593Smuzhiyun * @size: size of the stats array
195*4882a593Smuzhiyun *
196*4882a593Smuzhiyun * Format and copy the strings described by stats into the buffer pointed at
197*4882a593Smuzhiyun * by p.
198*4882a593Smuzhiyun **/
__i40e_add_stat_strings(u8 ** p,const struct i40e_stats stats[],const unsigned int size,...)199*4882a593Smuzhiyun static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[],
200*4882a593Smuzhiyun const unsigned int size, ...)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun unsigned int i;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun for (i = 0; i < size; i++) {
205*4882a593Smuzhiyun va_list args;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun va_start(args, size);
208*4882a593Smuzhiyun vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args);
209*4882a593Smuzhiyun *p += ETH_GSTRING_LEN;
210*4882a593Smuzhiyun va_end(args);
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun /**
215*4882a593Smuzhiyun * 40e_add_stat_strings - copy stat strings into ethtool buffer
216*4882a593Smuzhiyun * @p: ethtool supplied buffer
217*4882a593Smuzhiyun * @stats: stat definitions array
218*4882a593Smuzhiyun *
219*4882a593Smuzhiyun * Format and copy the strings described by the const static stats value into
220*4882a593Smuzhiyun * the buffer pointed at by p.
221*4882a593Smuzhiyun *
222*4882a593Smuzhiyun * The parameter @stats is evaluated twice, so parameters with side effects
223*4882a593Smuzhiyun * should be avoided. Additionally, stats must be an array such that
224*4882a593Smuzhiyun * ARRAY_SIZE can be called on it.
225*4882a593Smuzhiyun **/
226*4882a593Smuzhiyun #define i40e_add_stat_strings(p, stats, ...) \
227*4882a593Smuzhiyun __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__)
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun #define I40E_PF_STAT(_name, _stat) \
230*4882a593Smuzhiyun I40E_STAT(struct i40e_pf, _name, _stat)
231*4882a593Smuzhiyun #define I40E_VSI_STAT(_name, _stat) \
232*4882a593Smuzhiyun I40E_STAT(struct i40e_vsi, _name, _stat)
233*4882a593Smuzhiyun #define I40E_VEB_STAT(_name, _stat) \
234*4882a593Smuzhiyun I40E_STAT(struct i40e_veb, _name, _stat)
235*4882a593Smuzhiyun #define I40E_VEB_TC_STAT(_name, _stat) \
236*4882a593Smuzhiyun I40E_STAT(struct i40e_cp_veb_tc_stats, _name, _stat)
237*4882a593Smuzhiyun #define I40E_PFC_STAT(_name, _stat) \
238*4882a593Smuzhiyun I40E_STAT(struct i40e_pfc_stats, _name, _stat)
239*4882a593Smuzhiyun #define I40E_QUEUE_STAT(_name, _stat) \
240*4882a593Smuzhiyun I40E_STAT(struct i40e_ring, _name, _stat)
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun static const struct i40e_stats i40e_gstrings_net_stats[] = {
243*4882a593Smuzhiyun I40E_NETDEV_STAT(rx_packets),
244*4882a593Smuzhiyun I40E_NETDEV_STAT(tx_packets),
245*4882a593Smuzhiyun I40E_NETDEV_STAT(rx_bytes),
246*4882a593Smuzhiyun I40E_NETDEV_STAT(tx_bytes),
247*4882a593Smuzhiyun I40E_NETDEV_STAT(rx_errors),
248*4882a593Smuzhiyun I40E_NETDEV_STAT(tx_errors),
249*4882a593Smuzhiyun I40E_NETDEV_STAT(rx_dropped),
250*4882a593Smuzhiyun I40E_NETDEV_STAT(tx_dropped),
251*4882a593Smuzhiyun I40E_NETDEV_STAT(collisions),
252*4882a593Smuzhiyun I40E_NETDEV_STAT(rx_length_errors),
253*4882a593Smuzhiyun I40E_NETDEV_STAT(rx_crc_errors),
254*4882a593Smuzhiyun };
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun static const struct i40e_stats i40e_gstrings_veb_stats[] = {
257*4882a593Smuzhiyun I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes),
258*4882a593Smuzhiyun I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes),
259*4882a593Smuzhiyun I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast),
260*4882a593Smuzhiyun I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast),
261*4882a593Smuzhiyun I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast),
262*4882a593Smuzhiyun I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast),
263*4882a593Smuzhiyun I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast),
264*4882a593Smuzhiyun I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast),
265*4882a593Smuzhiyun I40E_VEB_STAT("veb.rx_discards", stats.rx_discards),
266*4882a593Smuzhiyun I40E_VEB_STAT("veb.tx_discards", stats.tx_discards),
267*4882a593Smuzhiyun I40E_VEB_STAT("veb.tx_errors", stats.tx_errors),
268*4882a593Smuzhiyun I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol),
269*4882a593Smuzhiyun };
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun struct i40e_cp_veb_tc_stats {
272*4882a593Smuzhiyun u64 tc_rx_packets;
273*4882a593Smuzhiyun u64 tc_rx_bytes;
274*4882a593Smuzhiyun u64 tc_tx_packets;
275*4882a593Smuzhiyun u64 tc_tx_bytes;
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = {
279*4882a593Smuzhiyun I40E_VEB_TC_STAT("veb.tc_%u_tx_packets", tc_tx_packets),
280*4882a593Smuzhiyun I40E_VEB_TC_STAT("veb.tc_%u_tx_bytes", tc_tx_bytes),
281*4882a593Smuzhiyun I40E_VEB_TC_STAT("veb.tc_%u_rx_packets", tc_rx_packets),
282*4882a593Smuzhiyun I40E_VEB_TC_STAT("veb.tc_%u_rx_bytes", tc_rx_bytes),
283*4882a593Smuzhiyun };
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun static const struct i40e_stats i40e_gstrings_misc_stats[] = {
286*4882a593Smuzhiyun I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
287*4882a593Smuzhiyun I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
288*4882a593Smuzhiyun I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
289*4882a593Smuzhiyun I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
290*4882a593Smuzhiyun I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
291*4882a593Smuzhiyun I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
292*4882a593Smuzhiyun I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
293*4882a593Smuzhiyun I40E_VSI_STAT("tx_linearize", tx_linearize),
294*4882a593Smuzhiyun I40E_VSI_STAT("tx_force_wb", tx_force_wb),
295*4882a593Smuzhiyun I40E_VSI_STAT("tx_busy", tx_busy),
296*4882a593Smuzhiyun I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
297*4882a593Smuzhiyun I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
298*4882a593Smuzhiyun };
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun /* These PF_STATs might look like duplicates of some NETDEV_STATs,
301*4882a593Smuzhiyun * but they are separate. This device supports Virtualization, and
302*4882a593Smuzhiyun * as such might have several netdevs supporting VMDq and FCoE going
303*4882a593Smuzhiyun * through a single port. The NETDEV_STATs are for individual netdevs
304*4882a593Smuzhiyun * seen at the top of the stack, and the PF_STATs are for the physical
305*4882a593Smuzhiyun * function at the bottom of the stack hosting those netdevs.
306*4882a593Smuzhiyun *
307*4882a593Smuzhiyun * The PF_STATs are appended to the netdev stats only when ethtool -S
308*4882a593Smuzhiyun * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
309*4882a593Smuzhiyun */
310*4882a593Smuzhiyun static const struct i40e_stats i40e_gstrings_stats[] = {
311*4882a593Smuzhiyun I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes),
312*4882a593Smuzhiyun I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes),
313*4882a593Smuzhiyun I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast),
314*4882a593Smuzhiyun I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast),
315*4882a593Smuzhiyun I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast),
316*4882a593Smuzhiyun I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast),
317*4882a593Smuzhiyun I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast),
318*4882a593Smuzhiyun I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast),
319*4882a593Smuzhiyun I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors),
320*4882a593Smuzhiyun I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards),
321*4882a593Smuzhiyun I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down),
322*4882a593Smuzhiyun I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors),
323*4882a593Smuzhiyun I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes),
324*4882a593Smuzhiyun I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults),
325*4882a593Smuzhiyun I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults),
326*4882a593Smuzhiyun I40E_PF_STAT("port.tx_timeout", tx_timeout_count),
327*4882a593Smuzhiyun I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error),
328*4882a593Smuzhiyun I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors),
329*4882a593Smuzhiyun I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx),
330*4882a593Smuzhiyun I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx),
331*4882a593Smuzhiyun I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx),
332*4882a593Smuzhiyun I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx),
333*4882a593Smuzhiyun I40E_PF_STAT("port.rx_size_64", stats.rx_size_64),
334*4882a593Smuzhiyun I40E_PF_STAT("port.rx_size_127", stats.rx_size_127),
335*4882a593Smuzhiyun I40E_PF_STAT("port.rx_size_255", stats.rx_size_255),
336*4882a593Smuzhiyun I40E_PF_STAT("port.rx_size_511", stats.rx_size_511),
337*4882a593Smuzhiyun I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023),
338*4882a593Smuzhiyun I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522),
339*4882a593Smuzhiyun I40E_PF_STAT("port.rx_size_big", stats.rx_size_big),
340*4882a593Smuzhiyun I40E_PF_STAT("port.tx_size_64", stats.tx_size_64),
341*4882a593Smuzhiyun I40E_PF_STAT("port.tx_size_127", stats.tx_size_127),
342*4882a593Smuzhiyun I40E_PF_STAT("port.tx_size_255", stats.tx_size_255),
343*4882a593Smuzhiyun I40E_PF_STAT("port.tx_size_511", stats.tx_size_511),
344*4882a593Smuzhiyun I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023),
345*4882a593Smuzhiyun I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522),
346*4882a593Smuzhiyun I40E_PF_STAT("port.tx_size_big", stats.tx_size_big),
347*4882a593Smuzhiyun I40E_PF_STAT("port.rx_undersize", stats.rx_undersize),
348*4882a593Smuzhiyun I40E_PF_STAT("port.rx_fragments", stats.rx_fragments),
349*4882a593Smuzhiyun I40E_PF_STAT("port.rx_oversize", stats.rx_oversize),
350*4882a593Smuzhiyun I40E_PF_STAT("port.rx_jabber", stats.rx_jabber),
351*4882a593Smuzhiyun I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests),
352*4882a593Smuzhiyun I40E_PF_STAT("port.arq_overflows", arq_overflows),
353*4882a593Smuzhiyun I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
354*4882a593Smuzhiyun I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared),
355*4882a593Smuzhiyun I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped),
356*4882a593Smuzhiyun I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt),
357*4882a593Smuzhiyun I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match),
358*4882a593Smuzhiyun I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
359*4882a593Smuzhiyun I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status),
360*4882a593Smuzhiyun I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match),
361*4882a593Smuzhiyun I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status),
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun /* LPI stats */
364*4882a593Smuzhiyun I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status),
365*4882a593Smuzhiyun I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status),
366*4882a593Smuzhiyun I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count),
367*4882a593Smuzhiyun I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count),
368*4882a593Smuzhiyun };
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun struct i40e_pfc_stats {
371*4882a593Smuzhiyun u64 priority_xon_rx;
372*4882a593Smuzhiyun u64 priority_xoff_rx;
373*4882a593Smuzhiyun u64 priority_xon_tx;
374*4882a593Smuzhiyun u64 priority_xoff_tx;
375*4882a593Smuzhiyun u64 priority_xon_2_xoff;
376*4882a593Smuzhiyun };
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun static const struct i40e_stats i40e_gstrings_pfc_stats[] = {
379*4882a593Smuzhiyun I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx),
380*4882a593Smuzhiyun I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx),
381*4882a593Smuzhiyun I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx),
382*4882a593Smuzhiyun I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx),
383*4882a593Smuzhiyun I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff),
384*4882a593Smuzhiyun };
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN)
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \
393*4882a593Smuzhiyun I40E_MAX_USER_PRIORITY)
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \
396*4882a593Smuzhiyun (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \
397*4882a593Smuzhiyun I40E_MAX_TRAFFIC_CLASS))
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \
402*4882a593Smuzhiyun I40E_PFC_STATS_LEN + \
403*4882a593Smuzhiyun I40E_VEB_STATS_LEN + \
404*4882a593Smuzhiyun I40E_VSI_STATS_LEN)
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun /* Length of stats for a single queue */
407*4882a593Smuzhiyun #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats)
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun enum i40e_ethtool_test_id {
410*4882a593Smuzhiyun I40E_ETH_TEST_REG = 0,
411*4882a593Smuzhiyun I40E_ETH_TEST_EEPROM,
412*4882a593Smuzhiyun I40E_ETH_TEST_INTR,
413*4882a593Smuzhiyun I40E_ETH_TEST_LINK,
414*4882a593Smuzhiyun };
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
417*4882a593Smuzhiyun "Register test (offline)",
418*4882a593Smuzhiyun "Eeprom test (offline)",
419*4882a593Smuzhiyun "Interrupt test (offline)",
420*4882a593Smuzhiyun "Link test (on/offline)"
421*4882a593Smuzhiyun };
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun struct i40e_priv_flags {
426*4882a593Smuzhiyun char flag_string[ETH_GSTRING_LEN];
427*4882a593Smuzhiyun u64 flag;
428*4882a593Smuzhiyun bool read_only;
429*4882a593Smuzhiyun };
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \
432*4882a593Smuzhiyun .flag_string = _name, \
433*4882a593Smuzhiyun .flag = _flag, \
434*4882a593Smuzhiyun .read_only = _read_only, \
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
438*4882a593Smuzhiyun /* NOTE: MFP setting cannot be changed */
439*4882a593Smuzhiyun I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1),
440*4882a593Smuzhiyun I40E_PRIV_FLAG("total-port-shutdown",
441*4882a593Smuzhiyun I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED, 1),
442*4882a593Smuzhiyun I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0),
443*4882a593Smuzhiyun I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0),
444*4882a593Smuzhiyun I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0),
445*4882a593Smuzhiyun I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0),
446*4882a593Smuzhiyun I40E_PRIV_FLAG("link-down-on-close",
447*4882a593Smuzhiyun I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0),
448*4882a593Smuzhiyun I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0),
449*4882a593Smuzhiyun I40E_PRIV_FLAG("disable-source-pruning",
450*4882a593Smuzhiyun I40E_FLAG_SOURCE_PRUNING_DISABLED, 0),
451*4882a593Smuzhiyun I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0),
452*4882a593Smuzhiyun I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0),
453*4882a593Smuzhiyun I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0),
454*4882a593Smuzhiyun };
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun /* Private flags with a global effect, restricted to PF 0 */
459*4882a593Smuzhiyun static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
460*4882a593Smuzhiyun I40E_PRIV_FLAG("vf-true-promisc-support",
461*4882a593Smuzhiyun I40E_FLAG_TRUE_PROMISC_SUPPORT, 0),
462*4882a593Smuzhiyun };
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun /**
467*4882a593Smuzhiyun * i40e_partition_setting_complaint - generic complaint for MFP restriction
468*4882a593Smuzhiyun * @pf: the PF struct
469*4882a593Smuzhiyun **/
i40e_partition_setting_complaint(struct i40e_pf * pf)470*4882a593Smuzhiyun static void i40e_partition_setting_complaint(struct i40e_pf *pf)
471*4882a593Smuzhiyun {
472*4882a593Smuzhiyun dev_info(&pf->pdev->dev,
473*4882a593Smuzhiyun "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun /**
477*4882a593Smuzhiyun * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
478*4882a593Smuzhiyun * @pf: PF struct with phy_types
479*4882a593Smuzhiyun * @ks: ethtool link ksettings struct to fill out
480*4882a593Smuzhiyun *
481*4882a593Smuzhiyun **/
i40e_phy_type_to_ethtool(struct i40e_pf * pf,struct ethtool_link_ksettings * ks)482*4882a593Smuzhiyun static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
483*4882a593Smuzhiyun struct ethtool_link_ksettings *ks)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
486*4882a593Smuzhiyun u64 phy_types = pf->hw.phy.phy_types;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun ethtool_link_ksettings_zero_link_mode(ks, supported);
489*4882a593Smuzhiyun ethtool_link_ksettings_zero_link_mode(ks, advertising);
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
492*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
493*4882a593Smuzhiyun 1000baseT_Full);
494*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
495*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
496*4882a593Smuzhiyun 1000baseT_Full);
497*4882a593Smuzhiyun if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
498*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
499*4882a593Smuzhiyun 100baseT_Full);
500*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
501*4882a593Smuzhiyun 100baseT_Full);
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
505*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_XFI ||
506*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_SFI ||
507*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
508*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) {
509*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
510*4882a593Smuzhiyun 10000baseT_Full);
511*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
512*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
513*4882a593Smuzhiyun 10000baseT_Full);
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) {
516*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
517*4882a593Smuzhiyun 10000baseT_Full);
518*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
519*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
520*4882a593Smuzhiyun 10000baseT_Full);
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T) {
523*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
524*4882a593Smuzhiyun 2500baseT_Full);
525*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
526*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
527*4882a593Smuzhiyun 2500baseT_Full);
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_5GBASE_T) {
530*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
531*4882a593Smuzhiyun 5000baseT_Full);
532*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
533*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
534*4882a593Smuzhiyun 5000baseT_Full);
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
537*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
538*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
539*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
540*4882a593Smuzhiyun 40000baseCR4_Full);
541*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
542*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
543*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
544*4882a593Smuzhiyun 40000baseCR4_Full);
545*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
546*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
547*4882a593Smuzhiyun 40000baseCR4_Full);
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
550*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
551*4882a593Smuzhiyun 100baseT_Full);
552*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
553*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
554*4882a593Smuzhiyun 100baseT_Full);
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) {
557*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
558*4882a593Smuzhiyun 1000baseT_Full);
559*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
560*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
561*4882a593Smuzhiyun 1000baseT_Full);
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) {
564*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
565*4882a593Smuzhiyun 40000baseSR4_Full);
566*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
567*4882a593Smuzhiyun 40000baseSR4_Full);
568*4882a593Smuzhiyun }
569*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) {
570*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
571*4882a593Smuzhiyun 40000baseLR4_Full);
572*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
573*4882a593Smuzhiyun 40000baseLR4_Full);
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
576*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
577*4882a593Smuzhiyun 40000baseKR4_Full);
578*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
579*4882a593Smuzhiyun 40000baseKR4_Full);
580*4882a593Smuzhiyun }
581*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
582*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
583*4882a593Smuzhiyun 20000baseKR2_Full);
584*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
585*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
586*4882a593Smuzhiyun 20000baseKR2_Full);
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
589*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
590*4882a593Smuzhiyun 10000baseKX4_Full);
591*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
592*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
593*4882a593Smuzhiyun 10000baseKX4_Full);
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR &&
596*4882a593Smuzhiyun !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
597*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
598*4882a593Smuzhiyun 10000baseKR_Full);
599*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
600*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
601*4882a593Smuzhiyun 10000baseKR_Full);
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX &&
604*4882a593Smuzhiyun !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
605*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
606*4882a593Smuzhiyun 1000baseKX_Full);
607*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
608*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
609*4882a593Smuzhiyun 1000baseKX_Full);
610*4882a593Smuzhiyun }
611*4882a593Smuzhiyun /* need to add 25G PHY types */
612*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) {
613*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
614*4882a593Smuzhiyun 25000baseKR_Full);
615*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
616*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
617*4882a593Smuzhiyun 25000baseKR_Full);
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) {
620*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
621*4882a593Smuzhiyun 25000baseCR_Full);
622*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
623*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
624*4882a593Smuzhiyun 25000baseCR_Full);
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
627*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
628*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
629*4882a593Smuzhiyun 25000baseSR_Full);
630*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
631*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
632*4882a593Smuzhiyun 25000baseSR_Full);
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
635*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
636*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
637*4882a593Smuzhiyun 25000baseCR_Full);
638*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
639*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
640*4882a593Smuzhiyun 25000baseCR_Full);
641*4882a593Smuzhiyun }
642*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
643*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
644*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
645*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
646*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
647*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
648*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
649*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
650*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
651*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) {
652*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
653*4882a593Smuzhiyun FEC_NONE);
654*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
655*4882a593Smuzhiyun FEC_RS);
656*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
657*4882a593Smuzhiyun FEC_BASER);
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun /* need to add new 10G PHY types */
661*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
662*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) {
663*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
664*4882a593Smuzhiyun 10000baseCR_Full);
665*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
666*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
667*4882a593Smuzhiyun 10000baseCR_Full);
668*4882a593Smuzhiyun }
669*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) {
670*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
671*4882a593Smuzhiyun 10000baseSR_Full);
672*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
673*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
674*4882a593Smuzhiyun 10000baseSR_Full);
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
677*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
678*4882a593Smuzhiyun 10000baseLR_Full);
679*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
680*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
681*4882a593Smuzhiyun 10000baseLR_Full);
682*4882a593Smuzhiyun }
683*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
684*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
685*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
686*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
687*4882a593Smuzhiyun 1000baseX_Full);
688*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
689*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
690*4882a593Smuzhiyun 1000baseX_Full);
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun /* Autoneg PHY types */
693*4882a593Smuzhiyun if (phy_types & I40E_CAP_PHY_TYPE_SGMII ||
694*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 ||
695*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
696*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 ||
697*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
698*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
699*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
700*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
701*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 ||
702*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
703*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR ||
704*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 ||
705*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR ||
706*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
707*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
708*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
709*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_5GBASE_T ||
710*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T ||
711*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL ||
712*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
713*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
714*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
715*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX ||
716*4882a593Smuzhiyun phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
717*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
718*4882a593Smuzhiyun Autoneg);
719*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
720*4882a593Smuzhiyun Autoneg);
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun /**
725*4882a593Smuzhiyun * i40e_get_settings_link_up_fec - Get the FEC mode encoding from mask
726*4882a593Smuzhiyun * @req_fec_info: mask request FEC info
727*4882a593Smuzhiyun * @ks: ethtool ksettings to fill in
728*4882a593Smuzhiyun **/
i40e_get_settings_link_up_fec(u8 req_fec_info,struct ethtool_link_ksettings * ks)729*4882a593Smuzhiyun static void i40e_get_settings_link_up_fec(u8 req_fec_info,
730*4882a593Smuzhiyun struct ethtool_link_ksettings *ks)
731*4882a593Smuzhiyun {
732*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
733*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
734*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun if ((I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) &&
737*4882a593Smuzhiyun (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info)) {
738*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
739*4882a593Smuzhiyun FEC_NONE);
740*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
741*4882a593Smuzhiyun FEC_BASER);
742*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
743*4882a593Smuzhiyun } else if (I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) {
744*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
745*4882a593Smuzhiyun } else if (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info) {
746*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
747*4882a593Smuzhiyun FEC_BASER);
748*4882a593Smuzhiyun } else {
749*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
750*4882a593Smuzhiyun FEC_NONE);
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun }
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun /**
755*4882a593Smuzhiyun * i40e_get_settings_link_up - Get the Link settings for when link is up
756*4882a593Smuzhiyun * @hw: hw structure
757*4882a593Smuzhiyun * @ks: ethtool ksettings to fill in
758*4882a593Smuzhiyun * @netdev: network interface device structure
759*4882a593Smuzhiyun * @pf: pointer to physical function struct
760*4882a593Smuzhiyun **/
i40e_get_settings_link_up(struct i40e_hw * hw,struct ethtool_link_ksettings * ks,struct net_device * netdev,struct i40e_pf * pf)761*4882a593Smuzhiyun static void i40e_get_settings_link_up(struct i40e_hw *hw,
762*4882a593Smuzhiyun struct ethtool_link_ksettings *ks,
763*4882a593Smuzhiyun struct net_device *netdev,
764*4882a593Smuzhiyun struct i40e_pf *pf)
765*4882a593Smuzhiyun {
766*4882a593Smuzhiyun struct i40e_link_status *hw_link_info = &hw->phy.link_info;
767*4882a593Smuzhiyun struct ethtool_link_ksettings cap_ksettings;
768*4882a593Smuzhiyun u32 link_speed = hw_link_info->link_speed;
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun /* Initialize supported and advertised settings based on phy settings */
771*4882a593Smuzhiyun switch (hw_link_info->phy_type) {
772*4882a593Smuzhiyun case I40E_PHY_TYPE_40GBASE_CR4:
773*4882a593Smuzhiyun case I40E_PHY_TYPE_40GBASE_CR4_CU:
774*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
775*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
776*4882a593Smuzhiyun 40000baseCR4_Full);
777*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
778*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
779*4882a593Smuzhiyun 40000baseCR4_Full);
780*4882a593Smuzhiyun break;
781*4882a593Smuzhiyun case I40E_PHY_TYPE_XLAUI:
782*4882a593Smuzhiyun case I40E_PHY_TYPE_XLPPI:
783*4882a593Smuzhiyun case I40E_PHY_TYPE_40GBASE_AOC:
784*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
785*4882a593Smuzhiyun 40000baseCR4_Full);
786*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
787*4882a593Smuzhiyun 40000baseCR4_Full);
788*4882a593Smuzhiyun break;
789*4882a593Smuzhiyun case I40E_PHY_TYPE_40GBASE_SR4:
790*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
791*4882a593Smuzhiyun 40000baseSR4_Full);
792*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
793*4882a593Smuzhiyun 40000baseSR4_Full);
794*4882a593Smuzhiyun break;
795*4882a593Smuzhiyun case I40E_PHY_TYPE_40GBASE_LR4:
796*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
797*4882a593Smuzhiyun 40000baseLR4_Full);
798*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
799*4882a593Smuzhiyun 40000baseLR4_Full);
800*4882a593Smuzhiyun break;
801*4882a593Smuzhiyun case I40E_PHY_TYPE_25GBASE_SR:
802*4882a593Smuzhiyun case I40E_PHY_TYPE_25GBASE_LR:
803*4882a593Smuzhiyun case I40E_PHY_TYPE_10GBASE_SR:
804*4882a593Smuzhiyun case I40E_PHY_TYPE_10GBASE_LR:
805*4882a593Smuzhiyun case I40E_PHY_TYPE_1000BASE_SX:
806*4882a593Smuzhiyun case I40E_PHY_TYPE_1000BASE_LX:
807*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
808*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
809*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
810*4882a593Smuzhiyun 25000baseSR_Full);
811*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
812*4882a593Smuzhiyun 25000baseSR_Full);
813*4882a593Smuzhiyun i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
814*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
815*4882a593Smuzhiyun 10000baseSR_Full);
816*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
817*4882a593Smuzhiyun 10000baseSR_Full);
818*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
819*4882a593Smuzhiyun 10000baseLR_Full);
820*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
821*4882a593Smuzhiyun 10000baseLR_Full);
822*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
823*4882a593Smuzhiyun 1000baseX_Full);
824*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
825*4882a593Smuzhiyun 1000baseX_Full);
826*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
827*4882a593Smuzhiyun 10000baseT_Full);
828*4882a593Smuzhiyun if (hw_link_info->module_type[2] &
829*4882a593Smuzhiyun I40E_MODULE_TYPE_1000BASE_SX ||
830*4882a593Smuzhiyun hw_link_info->module_type[2] &
831*4882a593Smuzhiyun I40E_MODULE_TYPE_1000BASE_LX) {
832*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
833*4882a593Smuzhiyun 1000baseT_Full);
834*4882a593Smuzhiyun if (hw_link_info->requested_speeds &
835*4882a593Smuzhiyun I40E_LINK_SPEED_1GB)
836*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(
837*4882a593Smuzhiyun ks, advertising, 1000baseT_Full);
838*4882a593Smuzhiyun }
839*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
840*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
841*4882a593Smuzhiyun 10000baseT_Full);
842*4882a593Smuzhiyun break;
843*4882a593Smuzhiyun case I40E_PHY_TYPE_10GBASE_T:
844*4882a593Smuzhiyun case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS:
845*4882a593Smuzhiyun case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS:
846*4882a593Smuzhiyun case I40E_PHY_TYPE_1000BASE_T:
847*4882a593Smuzhiyun case I40E_PHY_TYPE_100BASE_TX:
848*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
849*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
850*4882a593Smuzhiyun 10000baseT_Full);
851*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
852*4882a593Smuzhiyun 5000baseT_Full);
853*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
854*4882a593Smuzhiyun 2500baseT_Full);
855*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
856*4882a593Smuzhiyun 1000baseT_Full);
857*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
858*4882a593Smuzhiyun 100baseT_Full);
859*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
860*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
861*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
862*4882a593Smuzhiyun 10000baseT_Full);
863*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
864*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
865*4882a593Smuzhiyun 5000baseT_Full);
866*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
867*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
868*4882a593Smuzhiyun 2500baseT_Full);
869*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
870*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
871*4882a593Smuzhiyun 1000baseT_Full);
872*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
873*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
874*4882a593Smuzhiyun 100baseT_Full);
875*4882a593Smuzhiyun break;
876*4882a593Smuzhiyun case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
877*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
878*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
879*4882a593Smuzhiyun 1000baseT_Full);
880*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
881*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
882*4882a593Smuzhiyun 1000baseT_Full);
883*4882a593Smuzhiyun break;
884*4882a593Smuzhiyun case I40E_PHY_TYPE_10GBASE_CR1_CU:
885*4882a593Smuzhiyun case I40E_PHY_TYPE_10GBASE_CR1:
886*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
887*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
888*4882a593Smuzhiyun 10000baseT_Full);
889*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
890*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
891*4882a593Smuzhiyun 10000baseT_Full);
892*4882a593Smuzhiyun break;
893*4882a593Smuzhiyun case I40E_PHY_TYPE_XAUI:
894*4882a593Smuzhiyun case I40E_PHY_TYPE_XFI:
895*4882a593Smuzhiyun case I40E_PHY_TYPE_SFI:
896*4882a593Smuzhiyun case I40E_PHY_TYPE_10GBASE_SFPP_CU:
897*4882a593Smuzhiyun case I40E_PHY_TYPE_10GBASE_AOC:
898*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
899*4882a593Smuzhiyun 10000baseT_Full);
900*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
901*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
902*4882a593Smuzhiyun 10000baseT_Full);
903*4882a593Smuzhiyun i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
904*4882a593Smuzhiyun break;
905*4882a593Smuzhiyun case I40E_PHY_TYPE_SGMII:
906*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
907*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
908*4882a593Smuzhiyun 1000baseT_Full);
909*4882a593Smuzhiyun if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
910*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
911*4882a593Smuzhiyun 1000baseT_Full);
912*4882a593Smuzhiyun if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
913*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
914*4882a593Smuzhiyun 100baseT_Full);
915*4882a593Smuzhiyun if (hw_link_info->requested_speeds &
916*4882a593Smuzhiyun I40E_LINK_SPEED_100MB)
917*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(
918*4882a593Smuzhiyun ks, advertising, 100baseT_Full);
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun break;
921*4882a593Smuzhiyun case I40E_PHY_TYPE_40GBASE_KR4:
922*4882a593Smuzhiyun case I40E_PHY_TYPE_25GBASE_KR:
923*4882a593Smuzhiyun case I40E_PHY_TYPE_20GBASE_KR2:
924*4882a593Smuzhiyun case I40E_PHY_TYPE_10GBASE_KR:
925*4882a593Smuzhiyun case I40E_PHY_TYPE_10GBASE_KX4:
926*4882a593Smuzhiyun case I40E_PHY_TYPE_1000BASE_KX:
927*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
928*4882a593Smuzhiyun 40000baseKR4_Full);
929*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
930*4882a593Smuzhiyun 25000baseKR_Full);
931*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
932*4882a593Smuzhiyun 20000baseKR2_Full);
933*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
934*4882a593Smuzhiyun 10000baseKR_Full);
935*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
936*4882a593Smuzhiyun 10000baseKX4_Full);
937*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
938*4882a593Smuzhiyun 1000baseKX_Full);
939*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
940*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
941*4882a593Smuzhiyun 40000baseKR4_Full);
942*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
943*4882a593Smuzhiyun 25000baseKR_Full);
944*4882a593Smuzhiyun i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
945*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
946*4882a593Smuzhiyun 20000baseKR2_Full);
947*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
948*4882a593Smuzhiyun 10000baseKR_Full);
949*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
950*4882a593Smuzhiyun 10000baseKX4_Full);
951*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
952*4882a593Smuzhiyun 1000baseKX_Full);
953*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
954*4882a593Smuzhiyun break;
955*4882a593Smuzhiyun case I40E_PHY_TYPE_25GBASE_CR:
956*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
957*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
958*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
959*4882a593Smuzhiyun 25000baseCR_Full);
960*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
961*4882a593Smuzhiyun 25000baseCR_Full);
962*4882a593Smuzhiyun i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun break;
965*4882a593Smuzhiyun case I40E_PHY_TYPE_25GBASE_AOC:
966*4882a593Smuzhiyun case I40E_PHY_TYPE_25GBASE_ACC:
967*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
968*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
969*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
970*4882a593Smuzhiyun 25000baseCR_Full);
971*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
972*4882a593Smuzhiyun 25000baseCR_Full);
973*4882a593Smuzhiyun i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported,
976*4882a593Smuzhiyun 10000baseCR_Full);
977*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
978*4882a593Smuzhiyun 10000baseCR_Full);
979*4882a593Smuzhiyun break;
980*4882a593Smuzhiyun default:
981*4882a593Smuzhiyun /* if we got here and link is up something bad is afoot */
982*4882a593Smuzhiyun netdev_info(netdev,
983*4882a593Smuzhiyun "WARNING: Link is up but PHY type 0x%x is not recognized, or incorrect cable is in use\n",
984*4882a593Smuzhiyun hw_link_info->phy_type);
985*4882a593Smuzhiyun }
986*4882a593Smuzhiyun
987*4882a593Smuzhiyun /* Now that we've worked out everything that could be supported by the
988*4882a593Smuzhiyun * current PHY type, get what is supported by the NVM and intersect
989*4882a593Smuzhiyun * them to get what is truly supported
990*4882a593Smuzhiyun */
991*4882a593Smuzhiyun memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings));
992*4882a593Smuzhiyun i40e_phy_type_to_ethtool(pf, &cap_ksettings);
993*4882a593Smuzhiyun ethtool_intersect_link_masks(ks, &cap_ksettings);
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun /* Set speed and duplex */
996*4882a593Smuzhiyun switch (link_speed) {
997*4882a593Smuzhiyun case I40E_LINK_SPEED_40GB:
998*4882a593Smuzhiyun ks->base.speed = SPEED_40000;
999*4882a593Smuzhiyun break;
1000*4882a593Smuzhiyun case I40E_LINK_SPEED_25GB:
1001*4882a593Smuzhiyun ks->base.speed = SPEED_25000;
1002*4882a593Smuzhiyun break;
1003*4882a593Smuzhiyun case I40E_LINK_SPEED_20GB:
1004*4882a593Smuzhiyun ks->base.speed = SPEED_20000;
1005*4882a593Smuzhiyun break;
1006*4882a593Smuzhiyun case I40E_LINK_SPEED_10GB:
1007*4882a593Smuzhiyun ks->base.speed = SPEED_10000;
1008*4882a593Smuzhiyun break;
1009*4882a593Smuzhiyun case I40E_LINK_SPEED_5GB:
1010*4882a593Smuzhiyun ks->base.speed = SPEED_5000;
1011*4882a593Smuzhiyun break;
1012*4882a593Smuzhiyun case I40E_LINK_SPEED_2_5GB:
1013*4882a593Smuzhiyun ks->base.speed = SPEED_2500;
1014*4882a593Smuzhiyun break;
1015*4882a593Smuzhiyun case I40E_LINK_SPEED_1GB:
1016*4882a593Smuzhiyun ks->base.speed = SPEED_1000;
1017*4882a593Smuzhiyun break;
1018*4882a593Smuzhiyun case I40E_LINK_SPEED_100MB:
1019*4882a593Smuzhiyun ks->base.speed = SPEED_100;
1020*4882a593Smuzhiyun break;
1021*4882a593Smuzhiyun default:
1022*4882a593Smuzhiyun ks->base.speed = SPEED_UNKNOWN;
1023*4882a593Smuzhiyun break;
1024*4882a593Smuzhiyun }
1025*4882a593Smuzhiyun ks->base.duplex = DUPLEX_FULL;
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun
1028*4882a593Smuzhiyun /**
1029*4882a593Smuzhiyun * i40e_get_settings_link_down - Get the Link settings for when link is down
1030*4882a593Smuzhiyun * @hw: hw structure
1031*4882a593Smuzhiyun * @ks: ethtool ksettings to fill in
1032*4882a593Smuzhiyun * @pf: pointer to physical function struct
1033*4882a593Smuzhiyun *
1034*4882a593Smuzhiyun * Reports link settings that can be determined when link is down
1035*4882a593Smuzhiyun **/
i40e_get_settings_link_down(struct i40e_hw * hw,struct ethtool_link_ksettings * ks,struct i40e_pf * pf)1036*4882a593Smuzhiyun static void i40e_get_settings_link_down(struct i40e_hw *hw,
1037*4882a593Smuzhiyun struct ethtool_link_ksettings *ks,
1038*4882a593Smuzhiyun struct i40e_pf *pf)
1039*4882a593Smuzhiyun {
1040*4882a593Smuzhiyun /* link is down and the driver needs to fall back on
1041*4882a593Smuzhiyun * supported phy types to figure out what info to display
1042*4882a593Smuzhiyun */
1043*4882a593Smuzhiyun i40e_phy_type_to_ethtool(pf, ks);
1044*4882a593Smuzhiyun
1045*4882a593Smuzhiyun /* With no link speed and duplex are unknown */
1046*4882a593Smuzhiyun ks->base.speed = SPEED_UNKNOWN;
1047*4882a593Smuzhiyun ks->base.duplex = DUPLEX_UNKNOWN;
1048*4882a593Smuzhiyun }
1049*4882a593Smuzhiyun
1050*4882a593Smuzhiyun /**
1051*4882a593Smuzhiyun * i40e_get_link_ksettings - Get Link Speed and Duplex settings
1052*4882a593Smuzhiyun * @netdev: network interface device structure
1053*4882a593Smuzhiyun * @ks: ethtool ksettings
1054*4882a593Smuzhiyun *
1055*4882a593Smuzhiyun * Reports speed/duplex settings based on media_type
1056*4882a593Smuzhiyun **/
i40e_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * ks)1057*4882a593Smuzhiyun static int i40e_get_link_ksettings(struct net_device *netdev,
1058*4882a593Smuzhiyun struct ethtool_link_ksettings *ks)
1059*4882a593Smuzhiyun {
1060*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1061*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1062*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
1063*4882a593Smuzhiyun struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1064*4882a593Smuzhiyun bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1065*4882a593Smuzhiyun
1066*4882a593Smuzhiyun ethtool_link_ksettings_zero_link_mode(ks, supported);
1067*4882a593Smuzhiyun ethtool_link_ksettings_zero_link_mode(ks, advertising);
1068*4882a593Smuzhiyun
1069*4882a593Smuzhiyun if (link_up)
1070*4882a593Smuzhiyun i40e_get_settings_link_up(hw, ks, netdev, pf);
1071*4882a593Smuzhiyun else
1072*4882a593Smuzhiyun i40e_get_settings_link_down(hw, ks, pf);
1073*4882a593Smuzhiyun
1074*4882a593Smuzhiyun /* Now set the settings that don't rely on link being up/down */
1075*4882a593Smuzhiyun /* Set autoneg settings */
1076*4882a593Smuzhiyun ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1077*4882a593Smuzhiyun AUTONEG_ENABLE : AUTONEG_DISABLE);
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun /* Set media type settings */
1080*4882a593Smuzhiyun switch (hw->phy.media_type) {
1081*4882a593Smuzhiyun case I40E_MEDIA_TYPE_BACKPLANE:
1082*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
1083*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Backplane);
1084*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
1085*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
1086*4882a593Smuzhiyun Backplane);
1087*4882a593Smuzhiyun ks->base.port = PORT_NONE;
1088*4882a593Smuzhiyun break;
1089*4882a593Smuzhiyun case I40E_MEDIA_TYPE_BASET:
1090*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, TP);
1091*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, TP);
1092*4882a593Smuzhiyun ks->base.port = PORT_TP;
1093*4882a593Smuzhiyun break;
1094*4882a593Smuzhiyun case I40E_MEDIA_TYPE_DA:
1095*4882a593Smuzhiyun case I40E_MEDIA_TYPE_CX4:
1096*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
1097*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
1098*4882a593Smuzhiyun ks->base.port = PORT_DA;
1099*4882a593Smuzhiyun break;
1100*4882a593Smuzhiyun case I40E_MEDIA_TYPE_FIBER:
1101*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
1102*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
1103*4882a593Smuzhiyun ks->base.port = PORT_FIBRE;
1104*4882a593Smuzhiyun break;
1105*4882a593Smuzhiyun case I40E_MEDIA_TYPE_UNKNOWN:
1106*4882a593Smuzhiyun default:
1107*4882a593Smuzhiyun ks->base.port = PORT_OTHER;
1108*4882a593Smuzhiyun break;
1109*4882a593Smuzhiyun }
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun /* Set flow control settings */
1112*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
1113*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, supported, Asym_Pause);
1114*4882a593Smuzhiyun
1115*4882a593Smuzhiyun switch (hw->fc.requested_mode) {
1116*4882a593Smuzhiyun case I40E_FC_FULL:
1117*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
1118*4882a593Smuzhiyun break;
1119*4882a593Smuzhiyun case I40E_FC_TX_PAUSE:
1120*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
1121*4882a593Smuzhiyun Asym_Pause);
1122*4882a593Smuzhiyun break;
1123*4882a593Smuzhiyun case I40E_FC_RX_PAUSE:
1124*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
1125*4882a593Smuzhiyun ethtool_link_ksettings_add_link_mode(ks, advertising,
1126*4882a593Smuzhiyun Asym_Pause);
1127*4882a593Smuzhiyun break;
1128*4882a593Smuzhiyun default:
1129*4882a593Smuzhiyun ethtool_link_ksettings_del_link_mode(ks, advertising, Pause);
1130*4882a593Smuzhiyun ethtool_link_ksettings_del_link_mode(ks, advertising,
1131*4882a593Smuzhiyun Asym_Pause);
1132*4882a593Smuzhiyun break;
1133*4882a593Smuzhiyun }
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun return 0;
1136*4882a593Smuzhiyun }
1137*4882a593Smuzhiyun
1138*4882a593Smuzhiyun /**
1139*4882a593Smuzhiyun * i40e_set_link_ksettings - Set Speed and Duplex
1140*4882a593Smuzhiyun * @netdev: network interface device structure
1141*4882a593Smuzhiyun * @ks: ethtool ksettings
1142*4882a593Smuzhiyun *
1143*4882a593Smuzhiyun * Set speed/duplex per media_types advertised/forced
1144*4882a593Smuzhiyun **/
i40e_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * ks)1145*4882a593Smuzhiyun static int i40e_set_link_ksettings(struct net_device *netdev,
1146*4882a593Smuzhiyun const struct ethtool_link_ksettings *ks)
1147*4882a593Smuzhiyun {
1148*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1149*4882a593Smuzhiyun struct i40e_aq_get_phy_abilities_resp abilities;
1150*4882a593Smuzhiyun struct ethtool_link_ksettings safe_ks;
1151*4882a593Smuzhiyun struct ethtool_link_ksettings copy_ks;
1152*4882a593Smuzhiyun struct i40e_aq_set_phy_config config;
1153*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1154*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
1155*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
1156*4882a593Smuzhiyun bool autoneg_changed = false;
1157*4882a593Smuzhiyun i40e_status status = 0;
1158*4882a593Smuzhiyun int timeout = 50;
1159*4882a593Smuzhiyun int err = 0;
1160*4882a593Smuzhiyun u8 autoneg;
1161*4882a593Smuzhiyun
1162*4882a593Smuzhiyun /* Changing port settings is not supported if this isn't the
1163*4882a593Smuzhiyun * port's controlling PF
1164*4882a593Smuzhiyun */
1165*4882a593Smuzhiyun if (hw->partition_id != 1) {
1166*4882a593Smuzhiyun i40e_partition_setting_complaint(pf);
1167*4882a593Smuzhiyun return -EOPNOTSUPP;
1168*4882a593Smuzhiyun }
1169*4882a593Smuzhiyun if (vsi != pf->vsi[pf->lan_vsi])
1170*4882a593Smuzhiyun return -EOPNOTSUPP;
1171*4882a593Smuzhiyun if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
1172*4882a593Smuzhiyun hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
1173*4882a593Smuzhiyun hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
1174*4882a593Smuzhiyun hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
1175*4882a593Smuzhiyun hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
1176*4882a593Smuzhiyun return -EOPNOTSUPP;
1177*4882a593Smuzhiyun if (hw->device_id == I40E_DEV_ID_KX_B ||
1178*4882a593Smuzhiyun hw->device_id == I40E_DEV_ID_KX_C ||
1179*4882a593Smuzhiyun hw->device_id == I40E_DEV_ID_20G_KR2 ||
1180*4882a593Smuzhiyun hw->device_id == I40E_DEV_ID_20G_KR2_A ||
1181*4882a593Smuzhiyun hw->device_id == I40E_DEV_ID_25G_B ||
1182*4882a593Smuzhiyun hw->device_id == I40E_DEV_ID_KX_X722) {
1183*4882a593Smuzhiyun netdev_info(netdev, "Changing settings is not supported on backplane.\n");
1184*4882a593Smuzhiyun return -EOPNOTSUPP;
1185*4882a593Smuzhiyun }
1186*4882a593Smuzhiyun
1187*4882a593Smuzhiyun /* copy the ksettings to copy_ks to avoid modifying the origin */
1188*4882a593Smuzhiyun memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings));
1189*4882a593Smuzhiyun
1190*4882a593Smuzhiyun /* save autoneg out of ksettings */
1191*4882a593Smuzhiyun autoneg = copy_ks.base.autoneg;
1192*4882a593Smuzhiyun
1193*4882a593Smuzhiyun /* get our own copy of the bits to check against */
1194*4882a593Smuzhiyun memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings));
1195*4882a593Smuzhiyun safe_ks.base.cmd = copy_ks.base.cmd;
1196*4882a593Smuzhiyun safe_ks.base.link_mode_masks_nwords =
1197*4882a593Smuzhiyun copy_ks.base.link_mode_masks_nwords;
1198*4882a593Smuzhiyun i40e_get_link_ksettings(netdev, &safe_ks);
1199*4882a593Smuzhiyun
1200*4882a593Smuzhiyun /* Get link modes supported by hardware and check against modes
1201*4882a593Smuzhiyun * requested by the user. Return an error if unsupported mode was set.
1202*4882a593Smuzhiyun */
1203*4882a593Smuzhiyun if (!bitmap_subset(copy_ks.link_modes.advertising,
1204*4882a593Smuzhiyun safe_ks.link_modes.supported,
1205*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS))
1206*4882a593Smuzhiyun return -EINVAL;
1207*4882a593Smuzhiyun
1208*4882a593Smuzhiyun /* set autoneg back to what it currently is */
1209*4882a593Smuzhiyun copy_ks.base.autoneg = safe_ks.base.autoneg;
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun /* If copy_ks.base and safe_ks.base are not the same now, then they are
1212*4882a593Smuzhiyun * trying to set something that we do not support.
1213*4882a593Smuzhiyun */
1214*4882a593Smuzhiyun if (memcmp(©_ks.base, &safe_ks.base,
1215*4882a593Smuzhiyun sizeof(struct ethtool_link_settings)))
1216*4882a593Smuzhiyun return -EOPNOTSUPP;
1217*4882a593Smuzhiyun
1218*4882a593Smuzhiyun while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
1219*4882a593Smuzhiyun timeout--;
1220*4882a593Smuzhiyun if (!timeout)
1221*4882a593Smuzhiyun return -EBUSY;
1222*4882a593Smuzhiyun usleep_range(1000, 2000);
1223*4882a593Smuzhiyun }
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun /* Get the current phy config */
1226*4882a593Smuzhiyun status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1227*4882a593Smuzhiyun NULL);
1228*4882a593Smuzhiyun if (status) {
1229*4882a593Smuzhiyun err = -EAGAIN;
1230*4882a593Smuzhiyun goto done;
1231*4882a593Smuzhiyun }
1232*4882a593Smuzhiyun
1233*4882a593Smuzhiyun /* Copy abilities to config in case autoneg is not
1234*4882a593Smuzhiyun * set below
1235*4882a593Smuzhiyun */
1236*4882a593Smuzhiyun memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
1237*4882a593Smuzhiyun config.abilities = abilities.abilities;
1238*4882a593Smuzhiyun
1239*4882a593Smuzhiyun /* Check autoneg */
1240*4882a593Smuzhiyun if (autoneg == AUTONEG_ENABLE) {
1241*4882a593Smuzhiyun /* If autoneg was not already enabled */
1242*4882a593Smuzhiyun if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
1243*4882a593Smuzhiyun /* If autoneg is not supported, return error */
1244*4882a593Smuzhiyun if (!ethtool_link_ksettings_test_link_mode(&safe_ks,
1245*4882a593Smuzhiyun supported,
1246*4882a593Smuzhiyun Autoneg)) {
1247*4882a593Smuzhiyun netdev_info(netdev, "Autoneg not supported on this phy\n");
1248*4882a593Smuzhiyun err = -EINVAL;
1249*4882a593Smuzhiyun goto done;
1250*4882a593Smuzhiyun }
1251*4882a593Smuzhiyun /* Autoneg is allowed to change */
1252*4882a593Smuzhiyun config.abilities = abilities.abilities |
1253*4882a593Smuzhiyun I40E_AQ_PHY_ENABLE_AN;
1254*4882a593Smuzhiyun autoneg_changed = true;
1255*4882a593Smuzhiyun }
1256*4882a593Smuzhiyun } else {
1257*4882a593Smuzhiyun /* If autoneg is currently enabled */
1258*4882a593Smuzhiyun if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
1259*4882a593Smuzhiyun /* If autoneg is supported 10GBASE_T is the only PHY
1260*4882a593Smuzhiyun * that can disable it, so otherwise return error
1261*4882a593Smuzhiyun */
1262*4882a593Smuzhiyun if (ethtool_link_ksettings_test_link_mode(&safe_ks,
1263*4882a593Smuzhiyun supported,
1264*4882a593Smuzhiyun Autoneg) &&
1265*4882a593Smuzhiyun hw->phy.media_type != I40E_MEDIA_TYPE_BASET) {
1266*4882a593Smuzhiyun netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
1267*4882a593Smuzhiyun err = -EINVAL;
1268*4882a593Smuzhiyun goto done;
1269*4882a593Smuzhiyun }
1270*4882a593Smuzhiyun /* Autoneg is allowed to change */
1271*4882a593Smuzhiyun config.abilities = abilities.abilities &
1272*4882a593Smuzhiyun ~I40E_AQ_PHY_ENABLE_AN;
1273*4882a593Smuzhiyun autoneg_changed = true;
1274*4882a593Smuzhiyun }
1275*4882a593Smuzhiyun }
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1278*4882a593Smuzhiyun 100baseT_Full))
1279*4882a593Smuzhiyun config.link_speed |= I40E_LINK_SPEED_100MB;
1280*4882a593Smuzhiyun if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1281*4882a593Smuzhiyun 1000baseT_Full) ||
1282*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1283*4882a593Smuzhiyun 1000baseX_Full) ||
1284*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1285*4882a593Smuzhiyun 1000baseKX_Full))
1286*4882a593Smuzhiyun config.link_speed |= I40E_LINK_SPEED_1GB;
1287*4882a593Smuzhiyun if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1288*4882a593Smuzhiyun 10000baseT_Full) ||
1289*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1290*4882a593Smuzhiyun 10000baseKX4_Full) ||
1291*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1292*4882a593Smuzhiyun 10000baseKR_Full) ||
1293*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1294*4882a593Smuzhiyun 10000baseCR_Full) ||
1295*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1296*4882a593Smuzhiyun 10000baseSR_Full) ||
1297*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1298*4882a593Smuzhiyun 10000baseLR_Full))
1299*4882a593Smuzhiyun config.link_speed |= I40E_LINK_SPEED_10GB;
1300*4882a593Smuzhiyun if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1301*4882a593Smuzhiyun 2500baseT_Full))
1302*4882a593Smuzhiyun config.link_speed |= I40E_LINK_SPEED_2_5GB;
1303*4882a593Smuzhiyun if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1304*4882a593Smuzhiyun 5000baseT_Full))
1305*4882a593Smuzhiyun config.link_speed |= I40E_LINK_SPEED_5GB;
1306*4882a593Smuzhiyun if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1307*4882a593Smuzhiyun 20000baseKR2_Full))
1308*4882a593Smuzhiyun config.link_speed |= I40E_LINK_SPEED_20GB;
1309*4882a593Smuzhiyun if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1310*4882a593Smuzhiyun 25000baseCR_Full) ||
1311*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1312*4882a593Smuzhiyun 25000baseKR_Full) ||
1313*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1314*4882a593Smuzhiyun 25000baseSR_Full))
1315*4882a593Smuzhiyun config.link_speed |= I40E_LINK_SPEED_25GB;
1316*4882a593Smuzhiyun if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1317*4882a593Smuzhiyun 40000baseKR4_Full) ||
1318*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1319*4882a593Smuzhiyun 40000baseCR4_Full) ||
1320*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1321*4882a593Smuzhiyun 40000baseSR4_Full) ||
1322*4882a593Smuzhiyun ethtool_link_ksettings_test_link_mode(ks, advertising,
1323*4882a593Smuzhiyun 40000baseLR4_Full))
1324*4882a593Smuzhiyun config.link_speed |= I40E_LINK_SPEED_40GB;
1325*4882a593Smuzhiyun
1326*4882a593Smuzhiyun /* If speed didn't get set, set it to what it currently is.
1327*4882a593Smuzhiyun * This is needed because if advertise is 0 (as it is when autoneg
1328*4882a593Smuzhiyun * is disabled) then speed won't get set.
1329*4882a593Smuzhiyun */
1330*4882a593Smuzhiyun if (!config.link_speed)
1331*4882a593Smuzhiyun config.link_speed = abilities.link_speed;
1332*4882a593Smuzhiyun if (autoneg_changed || abilities.link_speed != config.link_speed) {
1333*4882a593Smuzhiyun /* copy over the rest of the abilities */
1334*4882a593Smuzhiyun config.phy_type = abilities.phy_type;
1335*4882a593Smuzhiyun config.phy_type_ext = abilities.phy_type_ext;
1336*4882a593Smuzhiyun config.eee_capability = abilities.eee_capability;
1337*4882a593Smuzhiyun config.eeer = abilities.eeer_val;
1338*4882a593Smuzhiyun config.low_power_ctrl = abilities.d3_lpan;
1339*4882a593Smuzhiyun config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
1340*4882a593Smuzhiyun I40E_AQ_PHY_FEC_CONFIG_MASK;
1341*4882a593Smuzhiyun
1342*4882a593Smuzhiyun /* save the requested speeds */
1343*4882a593Smuzhiyun hw->phy.link_info.requested_speeds = config.link_speed;
1344*4882a593Smuzhiyun /* set link and auto negotiation so changes take effect */
1345*4882a593Smuzhiyun config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1346*4882a593Smuzhiyun /* If link is up put link down */
1347*4882a593Smuzhiyun if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
1348*4882a593Smuzhiyun /* Tell the OS link is going down, the link will go
1349*4882a593Smuzhiyun * back up when fw says it is ready asynchronously
1350*4882a593Smuzhiyun */
1351*4882a593Smuzhiyun i40e_print_link_message(vsi, false);
1352*4882a593Smuzhiyun netif_carrier_off(netdev);
1353*4882a593Smuzhiyun netif_tx_stop_all_queues(netdev);
1354*4882a593Smuzhiyun }
1355*4882a593Smuzhiyun
1356*4882a593Smuzhiyun /* make the aq call */
1357*4882a593Smuzhiyun status = i40e_aq_set_phy_config(hw, &config, NULL);
1358*4882a593Smuzhiyun if (status) {
1359*4882a593Smuzhiyun netdev_info(netdev,
1360*4882a593Smuzhiyun "Set phy config failed, err %s aq_err %s\n",
1361*4882a593Smuzhiyun i40e_stat_str(hw, status),
1362*4882a593Smuzhiyun i40e_aq_str(hw, hw->aq.asq_last_status));
1363*4882a593Smuzhiyun err = -EAGAIN;
1364*4882a593Smuzhiyun goto done;
1365*4882a593Smuzhiyun }
1366*4882a593Smuzhiyun
1367*4882a593Smuzhiyun status = i40e_update_link_info(hw);
1368*4882a593Smuzhiyun if (status)
1369*4882a593Smuzhiyun netdev_dbg(netdev,
1370*4882a593Smuzhiyun "Updating link info failed with err %s aq_err %s\n",
1371*4882a593Smuzhiyun i40e_stat_str(hw, status),
1372*4882a593Smuzhiyun i40e_aq_str(hw, hw->aq.asq_last_status));
1373*4882a593Smuzhiyun
1374*4882a593Smuzhiyun } else {
1375*4882a593Smuzhiyun netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
1376*4882a593Smuzhiyun }
1377*4882a593Smuzhiyun
1378*4882a593Smuzhiyun done:
1379*4882a593Smuzhiyun clear_bit(__I40E_CONFIG_BUSY, pf->state);
1380*4882a593Smuzhiyun
1381*4882a593Smuzhiyun return err;
1382*4882a593Smuzhiyun }
1383*4882a593Smuzhiyun
i40e_set_fec_cfg(struct net_device * netdev,u8 fec_cfg)1384*4882a593Smuzhiyun static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg)
1385*4882a593Smuzhiyun {
1386*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1387*4882a593Smuzhiyun struct i40e_aq_get_phy_abilities_resp abilities;
1388*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1389*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
1390*4882a593Smuzhiyun i40e_status status = 0;
1391*4882a593Smuzhiyun u32 flags = 0;
1392*4882a593Smuzhiyun int err = 0;
1393*4882a593Smuzhiyun
1394*4882a593Smuzhiyun flags = READ_ONCE(pf->flags);
1395*4882a593Smuzhiyun i40e_set_fec_in_flags(fec_cfg, &flags);
1396*4882a593Smuzhiyun
1397*4882a593Smuzhiyun /* Get the current phy config */
1398*4882a593Smuzhiyun memset(&abilities, 0, sizeof(abilities));
1399*4882a593Smuzhiyun status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1400*4882a593Smuzhiyun NULL);
1401*4882a593Smuzhiyun if (status) {
1402*4882a593Smuzhiyun err = -EAGAIN;
1403*4882a593Smuzhiyun goto done;
1404*4882a593Smuzhiyun }
1405*4882a593Smuzhiyun
1406*4882a593Smuzhiyun if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) {
1407*4882a593Smuzhiyun struct i40e_aq_set_phy_config config;
1408*4882a593Smuzhiyun
1409*4882a593Smuzhiyun memset(&config, 0, sizeof(config));
1410*4882a593Smuzhiyun config.phy_type = abilities.phy_type;
1411*4882a593Smuzhiyun config.abilities = abilities.abilities |
1412*4882a593Smuzhiyun I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1413*4882a593Smuzhiyun config.phy_type_ext = abilities.phy_type_ext;
1414*4882a593Smuzhiyun config.link_speed = abilities.link_speed;
1415*4882a593Smuzhiyun config.eee_capability = abilities.eee_capability;
1416*4882a593Smuzhiyun config.eeer = abilities.eeer_val;
1417*4882a593Smuzhiyun config.low_power_ctrl = abilities.d3_lpan;
1418*4882a593Smuzhiyun config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK;
1419*4882a593Smuzhiyun status = i40e_aq_set_phy_config(hw, &config, NULL);
1420*4882a593Smuzhiyun if (status) {
1421*4882a593Smuzhiyun netdev_info(netdev,
1422*4882a593Smuzhiyun "Set phy config failed, err %s aq_err %s\n",
1423*4882a593Smuzhiyun i40e_stat_str(hw, status),
1424*4882a593Smuzhiyun i40e_aq_str(hw, hw->aq.asq_last_status));
1425*4882a593Smuzhiyun err = -EAGAIN;
1426*4882a593Smuzhiyun goto done;
1427*4882a593Smuzhiyun }
1428*4882a593Smuzhiyun pf->flags = flags;
1429*4882a593Smuzhiyun status = i40e_update_link_info(hw);
1430*4882a593Smuzhiyun if (status)
1431*4882a593Smuzhiyun /* debug level message only due to relation to the link
1432*4882a593Smuzhiyun * itself rather than to the FEC settings
1433*4882a593Smuzhiyun * (e.g. no physical connection etc.)
1434*4882a593Smuzhiyun */
1435*4882a593Smuzhiyun netdev_dbg(netdev,
1436*4882a593Smuzhiyun "Updating link info failed with err %s aq_err %s\n",
1437*4882a593Smuzhiyun i40e_stat_str(hw, status),
1438*4882a593Smuzhiyun i40e_aq_str(hw, hw->aq.asq_last_status));
1439*4882a593Smuzhiyun }
1440*4882a593Smuzhiyun
1441*4882a593Smuzhiyun done:
1442*4882a593Smuzhiyun return err;
1443*4882a593Smuzhiyun }
1444*4882a593Smuzhiyun
i40e_get_fec_param(struct net_device * netdev,struct ethtool_fecparam * fecparam)1445*4882a593Smuzhiyun static int i40e_get_fec_param(struct net_device *netdev,
1446*4882a593Smuzhiyun struct ethtool_fecparam *fecparam)
1447*4882a593Smuzhiyun {
1448*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1449*4882a593Smuzhiyun struct i40e_aq_get_phy_abilities_resp abilities;
1450*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1451*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
1452*4882a593Smuzhiyun i40e_status status = 0;
1453*4882a593Smuzhiyun int err = 0;
1454*4882a593Smuzhiyun u8 fec_cfg;
1455*4882a593Smuzhiyun
1456*4882a593Smuzhiyun /* Get the current phy config */
1457*4882a593Smuzhiyun memset(&abilities, 0, sizeof(abilities));
1458*4882a593Smuzhiyun status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1459*4882a593Smuzhiyun NULL);
1460*4882a593Smuzhiyun if (status) {
1461*4882a593Smuzhiyun err = -EAGAIN;
1462*4882a593Smuzhiyun goto done;
1463*4882a593Smuzhiyun }
1464*4882a593Smuzhiyun
1465*4882a593Smuzhiyun fecparam->fec = 0;
1466*4882a593Smuzhiyun fec_cfg = abilities.fec_cfg_curr_mod_ext_info;
1467*4882a593Smuzhiyun if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
1468*4882a593Smuzhiyun fecparam->fec |= ETHTOOL_FEC_AUTO;
1469*4882a593Smuzhiyun else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_RS |
1470*4882a593Smuzhiyun I40E_AQ_SET_FEC_ABILITY_RS))
1471*4882a593Smuzhiyun fecparam->fec |= ETHTOOL_FEC_RS;
1472*4882a593Smuzhiyun else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_KR |
1473*4882a593Smuzhiyun I40E_AQ_SET_FEC_ABILITY_KR))
1474*4882a593Smuzhiyun fecparam->fec |= ETHTOOL_FEC_BASER;
1475*4882a593Smuzhiyun if (fec_cfg == 0)
1476*4882a593Smuzhiyun fecparam->fec |= ETHTOOL_FEC_OFF;
1477*4882a593Smuzhiyun
1478*4882a593Smuzhiyun if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA)
1479*4882a593Smuzhiyun fecparam->active_fec = ETHTOOL_FEC_BASER;
1480*4882a593Smuzhiyun else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA)
1481*4882a593Smuzhiyun fecparam->active_fec = ETHTOOL_FEC_RS;
1482*4882a593Smuzhiyun else
1483*4882a593Smuzhiyun fecparam->active_fec = ETHTOOL_FEC_OFF;
1484*4882a593Smuzhiyun done:
1485*4882a593Smuzhiyun return err;
1486*4882a593Smuzhiyun }
1487*4882a593Smuzhiyun
i40e_set_fec_param(struct net_device * netdev,struct ethtool_fecparam * fecparam)1488*4882a593Smuzhiyun static int i40e_set_fec_param(struct net_device *netdev,
1489*4882a593Smuzhiyun struct ethtool_fecparam *fecparam)
1490*4882a593Smuzhiyun {
1491*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1492*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1493*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
1494*4882a593Smuzhiyun u8 fec_cfg = 0;
1495*4882a593Smuzhiyun
1496*4882a593Smuzhiyun if (hw->device_id != I40E_DEV_ID_25G_SFP28 &&
1497*4882a593Smuzhiyun hw->device_id != I40E_DEV_ID_25G_B &&
1498*4882a593Smuzhiyun hw->device_id != I40E_DEV_ID_KX_X722)
1499*4882a593Smuzhiyun return -EPERM;
1500*4882a593Smuzhiyun
1501*4882a593Smuzhiyun if (hw->mac.type == I40E_MAC_X722 &&
1502*4882a593Smuzhiyun !(hw->flags & I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE)) {
1503*4882a593Smuzhiyun netdev_err(netdev, "Setting FEC encoding not supported by firmware. Please update the NVM image.\n");
1504*4882a593Smuzhiyun return -EOPNOTSUPP;
1505*4882a593Smuzhiyun }
1506*4882a593Smuzhiyun
1507*4882a593Smuzhiyun switch (fecparam->fec) {
1508*4882a593Smuzhiyun case ETHTOOL_FEC_AUTO:
1509*4882a593Smuzhiyun fec_cfg = I40E_AQ_SET_FEC_AUTO;
1510*4882a593Smuzhiyun break;
1511*4882a593Smuzhiyun case ETHTOOL_FEC_RS:
1512*4882a593Smuzhiyun fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
1513*4882a593Smuzhiyun I40E_AQ_SET_FEC_ABILITY_RS);
1514*4882a593Smuzhiyun break;
1515*4882a593Smuzhiyun case ETHTOOL_FEC_BASER:
1516*4882a593Smuzhiyun fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
1517*4882a593Smuzhiyun I40E_AQ_SET_FEC_ABILITY_KR);
1518*4882a593Smuzhiyun break;
1519*4882a593Smuzhiyun case ETHTOOL_FEC_OFF:
1520*4882a593Smuzhiyun case ETHTOOL_FEC_NONE:
1521*4882a593Smuzhiyun fec_cfg = 0;
1522*4882a593Smuzhiyun break;
1523*4882a593Smuzhiyun default:
1524*4882a593Smuzhiyun dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d",
1525*4882a593Smuzhiyun fecparam->fec);
1526*4882a593Smuzhiyun return -EINVAL;
1527*4882a593Smuzhiyun }
1528*4882a593Smuzhiyun
1529*4882a593Smuzhiyun return i40e_set_fec_cfg(netdev, fec_cfg);
1530*4882a593Smuzhiyun }
1531*4882a593Smuzhiyun
i40e_nway_reset(struct net_device * netdev)1532*4882a593Smuzhiyun static int i40e_nway_reset(struct net_device *netdev)
1533*4882a593Smuzhiyun {
1534*4882a593Smuzhiyun /* restart autonegotiation */
1535*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1536*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1537*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
1538*4882a593Smuzhiyun bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
1539*4882a593Smuzhiyun i40e_status ret = 0;
1540*4882a593Smuzhiyun
1541*4882a593Smuzhiyun ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
1542*4882a593Smuzhiyun if (ret) {
1543*4882a593Smuzhiyun netdev_info(netdev, "link restart failed, err %s aq_err %s\n",
1544*4882a593Smuzhiyun i40e_stat_str(hw, ret),
1545*4882a593Smuzhiyun i40e_aq_str(hw, hw->aq.asq_last_status));
1546*4882a593Smuzhiyun return -EIO;
1547*4882a593Smuzhiyun }
1548*4882a593Smuzhiyun
1549*4882a593Smuzhiyun return 0;
1550*4882a593Smuzhiyun }
1551*4882a593Smuzhiyun
1552*4882a593Smuzhiyun /**
1553*4882a593Smuzhiyun * i40e_get_pauseparam - Get Flow Control status
1554*4882a593Smuzhiyun * @netdev: netdevice structure
1555*4882a593Smuzhiyun * @pause: buffer to return pause parameters
1556*4882a593Smuzhiyun *
1557*4882a593Smuzhiyun * Return tx/rx-pause status
1558*4882a593Smuzhiyun **/
i40e_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)1559*4882a593Smuzhiyun static void i40e_get_pauseparam(struct net_device *netdev,
1560*4882a593Smuzhiyun struct ethtool_pauseparam *pause)
1561*4882a593Smuzhiyun {
1562*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1563*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1564*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
1565*4882a593Smuzhiyun struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1566*4882a593Smuzhiyun struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1567*4882a593Smuzhiyun
1568*4882a593Smuzhiyun pause->autoneg =
1569*4882a593Smuzhiyun ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1570*4882a593Smuzhiyun AUTONEG_ENABLE : AUTONEG_DISABLE);
1571*4882a593Smuzhiyun
1572*4882a593Smuzhiyun /* PFC enabled so report LFC as off */
1573*4882a593Smuzhiyun if (dcbx_cfg->pfc.pfcenable) {
1574*4882a593Smuzhiyun pause->rx_pause = 0;
1575*4882a593Smuzhiyun pause->tx_pause = 0;
1576*4882a593Smuzhiyun return;
1577*4882a593Smuzhiyun }
1578*4882a593Smuzhiyun
1579*4882a593Smuzhiyun if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
1580*4882a593Smuzhiyun pause->rx_pause = 1;
1581*4882a593Smuzhiyun } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
1582*4882a593Smuzhiyun pause->tx_pause = 1;
1583*4882a593Smuzhiyun } else if (hw->fc.current_mode == I40E_FC_FULL) {
1584*4882a593Smuzhiyun pause->rx_pause = 1;
1585*4882a593Smuzhiyun pause->tx_pause = 1;
1586*4882a593Smuzhiyun }
1587*4882a593Smuzhiyun }
1588*4882a593Smuzhiyun
1589*4882a593Smuzhiyun /**
1590*4882a593Smuzhiyun * i40e_set_pauseparam - Set Flow Control parameter
1591*4882a593Smuzhiyun * @netdev: network interface device structure
1592*4882a593Smuzhiyun * @pause: return tx/rx flow control status
1593*4882a593Smuzhiyun **/
i40e_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)1594*4882a593Smuzhiyun static int i40e_set_pauseparam(struct net_device *netdev,
1595*4882a593Smuzhiyun struct ethtool_pauseparam *pause)
1596*4882a593Smuzhiyun {
1597*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1598*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1599*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
1600*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
1601*4882a593Smuzhiyun struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1602*4882a593Smuzhiyun struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1603*4882a593Smuzhiyun bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1604*4882a593Smuzhiyun i40e_status status;
1605*4882a593Smuzhiyun u8 aq_failures;
1606*4882a593Smuzhiyun int err = 0;
1607*4882a593Smuzhiyun u32 is_an;
1608*4882a593Smuzhiyun
1609*4882a593Smuzhiyun /* Changing the port's flow control is not supported if this isn't the
1610*4882a593Smuzhiyun * port's controlling PF
1611*4882a593Smuzhiyun */
1612*4882a593Smuzhiyun if (hw->partition_id != 1) {
1613*4882a593Smuzhiyun i40e_partition_setting_complaint(pf);
1614*4882a593Smuzhiyun return -EOPNOTSUPP;
1615*4882a593Smuzhiyun }
1616*4882a593Smuzhiyun
1617*4882a593Smuzhiyun if (vsi != pf->vsi[pf->lan_vsi])
1618*4882a593Smuzhiyun return -EOPNOTSUPP;
1619*4882a593Smuzhiyun
1620*4882a593Smuzhiyun is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED;
1621*4882a593Smuzhiyun if (pause->autoneg != is_an) {
1622*4882a593Smuzhiyun netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
1623*4882a593Smuzhiyun return -EOPNOTSUPP;
1624*4882a593Smuzhiyun }
1625*4882a593Smuzhiyun
1626*4882a593Smuzhiyun /* If we have link and don't have autoneg */
1627*4882a593Smuzhiyun if (!test_bit(__I40E_DOWN, pf->state) && !is_an) {
1628*4882a593Smuzhiyun /* Send message that it might not necessarily work*/
1629*4882a593Smuzhiyun netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
1630*4882a593Smuzhiyun }
1631*4882a593Smuzhiyun
1632*4882a593Smuzhiyun if (dcbx_cfg->pfc.pfcenable) {
1633*4882a593Smuzhiyun netdev_info(netdev,
1634*4882a593Smuzhiyun "Priority flow control enabled. Cannot set link flow control.\n");
1635*4882a593Smuzhiyun return -EOPNOTSUPP;
1636*4882a593Smuzhiyun }
1637*4882a593Smuzhiyun
1638*4882a593Smuzhiyun if (pause->rx_pause && pause->tx_pause)
1639*4882a593Smuzhiyun hw->fc.requested_mode = I40E_FC_FULL;
1640*4882a593Smuzhiyun else if (pause->rx_pause && !pause->tx_pause)
1641*4882a593Smuzhiyun hw->fc.requested_mode = I40E_FC_RX_PAUSE;
1642*4882a593Smuzhiyun else if (!pause->rx_pause && pause->tx_pause)
1643*4882a593Smuzhiyun hw->fc.requested_mode = I40E_FC_TX_PAUSE;
1644*4882a593Smuzhiyun else if (!pause->rx_pause && !pause->tx_pause)
1645*4882a593Smuzhiyun hw->fc.requested_mode = I40E_FC_NONE;
1646*4882a593Smuzhiyun else
1647*4882a593Smuzhiyun return -EINVAL;
1648*4882a593Smuzhiyun
1649*4882a593Smuzhiyun /* Tell the OS link is going down, the link will go back up when fw
1650*4882a593Smuzhiyun * says it is ready asynchronously
1651*4882a593Smuzhiyun */
1652*4882a593Smuzhiyun i40e_print_link_message(vsi, false);
1653*4882a593Smuzhiyun netif_carrier_off(netdev);
1654*4882a593Smuzhiyun netif_tx_stop_all_queues(netdev);
1655*4882a593Smuzhiyun
1656*4882a593Smuzhiyun /* Set the fc mode and only restart an if link is up*/
1657*4882a593Smuzhiyun status = i40e_set_fc(hw, &aq_failures, link_up);
1658*4882a593Smuzhiyun
1659*4882a593Smuzhiyun if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
1660*4882a593Smuzhiyun netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n",
1661*4882a593Smuzhiyun i40e_stat_str(hw, status),
1662*4882a593Smuzhiyun i40e_aq_str(hw, hw->aq.asq_last_status));
1663*4882a593Smuzhiyun err = -EAGAIN;
1664*4882a593Smuzhiyun }
1665*4882a593Smuzhiyun if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
1666*4882a593Smuzhiyun netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n",
1667*4882a593Smuzhiyun i40e_stat_str(hw, status),
1668*4882a593Smuzhiyun i40e_aq_str(hw, hw->aq.asq_last_status));
1669*4882a593Smuzhiyun err = -EAGAIN;
1670*4882a593Smuzhiyun }
1671*4882a593Smuzhiyun if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
1672*4882a593Smuzhiyun netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n",
1673*4882a593Smuzhiyun i40e_stat_str(hw, status),
1674*4882a593Smuzhiyun i40e_aq_str(hw, hw->aq.asq_last_status));
1675*4882a593Smuzhiyun err = -EAGAIN;
1676*4882a593Smuzhiyun }
1677*4882a593Smuzhiyun
1678*4882a593Smuzhiyun if (!test_bit(__I40E_DOWN, pf->state) && is_an) {
1679*4882a593Smuzhiyun /* Give it a little more time to try to come back */
1680*4882a593Smuzhiyun msleep(75);
1681*4882a593Smuzhiyun if (!test_bit(__I40E_DOWN, pf->state))
1682*4882a593Smuzhiyun return i40e_nway_reset(netdev);
1683*4882a593Smuzhiyun }
1684*4882a593Smuzhiyun
1685*4882a593Smuzhiyun return err;
1686*4882a593Smuzhiyun }
1687*4882a593Smuzhiyun
i40e_get_msglevel(struct net_device * netdev)1688*4882a593Smuzhiyun static u32 i40e_get_msglevel(struct net_device *netdev)
1689*4882a593Smuzhiyun {
1690*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1691*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1692*4882a593Smuzhiyun u32 debug_mask = pf->hw.debug_mask;
1693*4882a593Smuzhiyun
1694*4882a593Smuzhiyun if (debug_mask)
1695*4882a593Smuzhiyun netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
1696*4882a593Smuzhiyun
1697*4882a593Smuzhiyun return pf->msg_enable;
1698*4882a593Smuzhiyun }
1699*4882a593Smuzhiyun
i40e_set_msglevel(struct net_device * netdev,u32 data)1700*4882a593Smuzhiyun static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1701*4882a593Smuzhiyun {
1702*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1703*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1704*4882a593Smuzhiyun
1705*4882a593Smuzhiyun if (I40E_DEBUG_USER & data)
1706*4882a593Smuzhiyun pf->hw.debug_mask = data;
1707*4882a593Smuzhiyun else
1708*4882a593Smuzhiyun pf->msg_enable = data;
1709*4882a593Smuzhiyun }
1710*4882a593Smuzhiyun
i40e_get_regs_len(struct net_device * netdev)1711*4882a593Smuzhiyun static int i40e_get_regs_len(struct net_device *netdev)
1712*4882a593Smuzhiyun {
1713*4882a593Smuzhiyun int reg_count = 0;
1714*4882a593Smuzhiyun int i;
1715*4882a593Smuzhiyun
1716*4882a593Smuzhiyun for (i = 0; i40e_reg_list[i].offset != 0; i++)
1717*4882a593Smuzhiyun reg_count += i40e_reg_list[i].elements;
1718*4882a593Smuzhiyun
1719*4882a593Smuzhiyun return reg_count * sizeof(u32);
1720*4882a593Smuzhiyun }
1721*4882a593Smuzhiyun
i40e_get_regs(struct net_device * netdev,struct ethtool_regs * regs,void * p)1722*4882a593Smuzhiyun static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1723*4882a593Smuzhiyun void *p)
1724*4882a593Smuzhiyun {
1725*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1726*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1727*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
1728*4882a593Smuzhiyun u32 *reg_buf = p;
1729*4882a593Smuzhiyun unsigned int i, j, ri;
1730*4882a593Smuzhiyun u32 reg;
1731*4882a593Smuzhiyun
1732*4882a593Smuzhiyun /* Tell ethtool which driver-version-specific regs output we have.
1733*4882a593Smuzhiyun *
1734*4882a593Smuzhiyun * At some point, if we have ethtool doing special formatting of
1735*4882a593Smuzhiyun * this data, it will rely on this version number to know how to
1736*4882a593Smuzhiyun * interpret things. Hence, this needs to be updated if/when the
1737*4882a593Smuzhiyun * diags register table is changed.
1738*4882a593Smuzhiyun */
1739*4882a593Smuzhiyun regs->version = 1;
1740*4882a593Smuzhiyun
1741*4882a593Smuzhiyun /* loop through the diags reg table for what to print */
1742*4882a593Smuzhiyun ri = 0;
1743*4882a593Smuzhiyun for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1744*4882a593Smuzhiyun for (j = 0; j < i40e_reg_list[i].elements; j++) {
1745*4882a593Smuzhiyun reg = i40e_reg_list[i].offset
1746*4882a593Smuzhiyun + (j * i40e_reg_list[i].stride);
1747*4882a593Smuzhiyun reg_buf[ri++] = rd32(hw, reg);
1748*4882a593Smuzhiyun }
1749*4882a593Smuzhiyun }
1750*4882a593Smuzhiyun
1751*4882a593Smuzhiyun }
1752*4882a593Smuzhiyun
i40e_get_eeprom(struct net_device * netdev,struct ethtool_eeprom * eeprom,u8 * bytes)1753*4882a593Smuzhiyun static int i40e_get_eeprom(struct net_device *netdev,
1754*4882a593Smuzhiyun struct ethtool_eeprom *eeprom, u8 *bytes)
1755*4882a593Smuzhiyun {
1756*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1757*4882a593Smuzhiyun struct i40e_hw *hw = &np->vsi->back->hw;
1758*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1759*4882a593Smuzhiyun int ret_val = 0, len, offset;
1760*4882a593Smuzhiyun u8 *eeprom_buff;
1761*4882a593Smuzhiyun u16 i, sectors;
1762*4882a593Smuzhiyun bool last;
1763*4882a593Smuzhiyun u32 magic;
1764*4882a593Smuzhiyun
1765*4882a593Smuzhiyun #define I40E_NVM_SECTOR_SIZE 4096
1766*4882a593Smuzhiyun if (eeprom->len == 0)
1767*4882a593Smuzhiyun return -EINVAL;
1768*4882a593Smuzhiyun
1769*4882a593Smuzhiyun /* check for NVMUpdate access method */
1770*4882a593Smuzhiyun magic = hw->vendor_id | (hw->device_id << 16);
1771*4882a593Smuzhiyun if (eeprom->magic && eeprom->magic != magic) {
1772*4882a593Smuzhiyun struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1773*4882a593Smuzhiyun int errno = 0;
1774*4882a593Smuzhiyun
1775*4882a593Smuzhiyun /* make sure it is the right magic for NVMUpdate */
1776*4882a593Smuzhiyun if ((eeprom->magic >> 16) != hw->device_id)
1777*4882a593Smuzhiyun errno = -EINVAL;
1778*4882a593Smuzhiyun else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1779*4882a593Smuzhiyun test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1780*4882a593Smuzhiyun errno = -EBUSY;
1781*4882a593Smuzhiyun else
1782*4882a593Smuzhiyun ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1783*4882a593Smuzhiyun
1784*4882a593Smuzhiyun if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1785*4882a593Smuzhiyun dev_info(&pf->pdev->dev,
1786*4882a593Smuzhiyun "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1787*4882a593Smuzhiyun ret_val, hw->aq.asq_last_status, errno,
1788*4882a593Smuzhiyun (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1789*4882a593Smuzhiyun cmd->offset, cmd->data_size);
1790*4882a593Smuzhiyun
1791*4882a593Smuzhiyun return errno;
1792*4882a593Smuzhiyun }
1793*4882a593Smuzhiyun
1794*4882a593Smuzhiyun /* normal ethtool get_eeprom support */
1795*4882a593Smuzhiyun eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1796*4882a593Smuzhiyun
1797*4882a593Smuzhiyun eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
1798*4882a593Smuzhiyun if (!eeprom_buff)
1799*4882a593Smuzhiyun return -ENOMEM;
1800*4882a593Smuzhiyun
1801*4882a593Smuzhiyun ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1802*4882a593Smuzhiyun if (ret_val) {
1803*4882a593Smuzhiyun dev_info(&pf->pdev->dev,
1804*4882a593Smuzhiyun "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1805*4882a593Smuzhiyun ret_val, hw->aq.asq_last_status);
1806*4882a593Smuzhiyun goto free_buff;
1807*4882a593Smuzhiyun }
1808*4882a593Smuzhiyun
1809*4882a593Smuzhiyun sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1810*4882a593Smuzhiyun sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1811*4882a593Smuzhiyun len = I40E_NVM_SECTOR_SIZE;
1812*4882a593Smuzhiyun last = false;
1813*4882a593Smuzhiyun for (i = 0; i < sectors; i++) {
1814*4882a593Smuzhiyun if (i == (sectors - 1)) {
1815*4882a593Smuzhiyun len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1816*4882a593Smuzhiyun last = true;
1817*4882a593Smuzhiyun }
1818*4882a593Smuzhiyun offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
1819*4882a593Smuzhiyun ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
1820*4882a593Smuzhiyun (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
1821*4882a593Smuzhiyun last, NULL);
1822*4882a593Smuzhiyun if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
1823*4882a593Smuzhiyun dev_info(&pf->pdev->dev,
1824*4882a593Smuzhiyun "read NVM failed, invalid offset 0x%x\n",
1825*4882a593Smuzhiyun offset);
1826*4882a593Smuzhiyun break;
1827*4882a593Smuzhiyun } else if (ret_val &&
1828*4882a593Smuzhiyun hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1829*4882a593Smuzhiyun dev_info(&pf->pdev->dev,
1830*4882a593Smuzhiyun "read NVM failed, access, offset 0x%x\n",
1831*4882a593Smuzhiyun offset);
1832*4882a593Smuzhiyun break;
1833*4882a593Smuzhiyun } else if (ret_val) {
1834*4882a593Smuzhiyun dev_info(&pf->pdev->dev,
1835*4882a593Smuzhiyun "read NVM failed offset %d err=%d status=0x%x\n",
1836*4882a593Smuzhiyun offset, ret_val, hw->aq.asq_last_status);
1837*4882a593Smuzhiyun break;
1838*4882a593Smuzhiyun }
1839*4882a593Smuzhiyun }
1840*4882a593Smuzhiyun
1841*4882a593Smuzhiyun i40e_release_nvm(hw);
1842*4882a593Smuzhiyun memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
1843*4882a593Smuzhiyun free_buff:
1844*4882a593Smuzhiyun kfree(eeprom_buff);
1845*4882a593Smuzhiyun return ret_val;
1846*4882a593Smuzhiyun }
1847*4882a593Smuzhiyun
i40e_get_eeprom_len(struct net_device * netdev)1848*4882a593Smuzhiyun static int i40e_get_eeprom_len(struct net_device *netdev)
1849*4882a593Smuzhiyun {
1850*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1851*4882a593Smuzhiyun struct i40e_hw *hw = &np->vsi->back->hw;
1852*4882a593Smuzhiyun u32 val;
1853*4882a593Smuzhiyun
1854*4882a593Smuzhiyun #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF
1855*4882a593Smuzhiyun if (hw->mac.type == I40E_MAC_X722) {
1856*4882a593Smuzhiyun val = X722_EEPROM_SCOPE_LIMIT + 1;
1857*4882a593Smuzhiyun return val;
1858*4882a593Smuzhiyun }
1859*4882a593Smuzhiyun val = (rd32(hw, I40E_GLPCI_LBARCTRL)
1860*4882a593Smuzhiyun & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
1861*4882a593Smuzhiyun >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
1862*4882a593Smuzhiyun /* register returns value in power of 2, 64Kbyte chunks. */
1863*4882a593Smuzhiyun val = (64 * 1024) * BIT(val);
1864*4882a593Smuzhiyun return val;
1865*4882a593Smuzhiyun }
1866*4882a593Smuzhiyun
i40e_set_eeprom(struct net_device * netdev,struct ethtool_eeprom * eeprom,u8 * bytes)1867*4882a593Smuzhiyun static int i40e_set_eeprom(struct net_device *netdev,
1868*4882a593Smuzhiyun struct ethtool_eeprom *eeprom, u8 *bytes)
1869*4882a593Smuzhiyun {
1870*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1871*4882a593Smuzhiyun struct i40e_hw *hw = &np->vsi->back->hw;
1872*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1873*4882a593Smuzhiyun struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1874*4882a593Smuzhiyun int ret_val = 0;
1875*4882a593Smuzhiyun int errno = 0;
1876*4882a593Smuzhiyun u32 magic;
1877*4882a593Smuzhiyun
1878*4882a593Smuzhiyun /* normal ethtool set_eeprom is not supported */
1879*4882a593Smuzhiyun magic = hw->vendor_id | (hw->device_id << 16);
1880*4882a593Smuzhiyun if (eeprom->magic == magic)
1881*4882a593Smuzhiyun errno = -EOPNOTSUPP;
1882*4882a593Smuzhiyun /* check for NVMUpdate access method */
1883*4882a593Smuzhiyun else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1884*4882a593Smuzhiyun errno = -EINVAL;
1885*4882a593Smuzhiyun else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1886*4882a593Smuzhiyun test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1887*4882a593Smuzhiyun errno = -EBUSY;
1888*4882a593Smuzhiyun else
1889*4882a593Smuzhiyun ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1890*4882a593Smuzhiyun
1891*4882a593Smuzhiyun if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1892*4882a593Smuzhiyun dev_info(&pf->pdev->dev,
1893*4882a593Smuzhiyun "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1894*4882a593Smuzhiyun ret_val, hw->aq.asq_last_status, errno,
1895*4882a593Smuzhiyun (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1896*4882a593Smuzhiyun cmd->offset, cmd->data_size);
1897*4882a593Smuzhiyun
1898*4882a593Smuzhiyun return errno;
1899*4882a593Smuzhiyun }
1900*4882a593Smuzhiyun
i40e_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * drvinfo)1901*4882a593Smuzhiyun static void i40e_get_drvinfo(struct net_device *netdev,
1902*4882a593Smuzhiyun struct ethtool_drvinfo *drvinfo)
1903*4882a593Smuzhiyun {
1904*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1905*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
1906*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
1907*4882a593Smuzhiyun
1908*4882a593Smuzhiyun strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
1909*4882a593Smuzhiyun strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
1910*4882a593Smuzhiyun sizeof(drvinfo->fw_version));
1911*4882a593Smuzhiyun strlcpy(drvinfo->bus_info, pci_name(pf->pdev),
1912*4882a593Smuzhiyun sizeof(drvinfo->bus_info));
1913*4882a593Smuzhiyun drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
1914*4882a593Smuzhiyun if (pf->hw.pf_id == 0)
1915*4882a593Smuzhiyun drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
1916*4882a593Smuzhiyun }
1917*4882a593Smuzhiyun
i40e_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring)1918*4882a593Smuzhiyun static void i40e_get_ringparam(struct net_device *netdev,
1919*4882a593Smuzhiyun struct ethtool_ringparam *ring)
1920*4882a593Smuzhiyun {
1921*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1922*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
1923*4882a593Smuzhiyun struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
1924*4882a593Smuzhiyun
1925*4882a593Smuzhiyun ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1926*4882a593Smuzhiyun ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1927*4882a593Smuzhiyun ring->rx_mini_max_pending = 0;
1928*4882a593Smuzhiyun ring->rx_jumbo_max_pending = 0;
1929*4882a593Smuzhiyun ring->rx_pending = vsi->rx_rings[0]->count;
1930*4882a593Smuzhiyun ring->tx_pending = vsi->tx_rings[0]->count;
1931*4882a593Smuzhiyun ring->rx_mini_pending = 0;
1932*4882a593Smuzhiyun ring->rx_jumbo_pending = 0;
1933*4882a593Smuzhiyun }
1934*4882a593Smuzhiyun
i40e_active_tx_ring_index(struct i40e_vsi * vsi,u16 index)1935*4882a593Smuzhiyun static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index)
1936*4882a593Smuzhiyun {
1937*4882a593Smuzhiyun if (i40e_enabled_xdp_vsi(vsi)) {
1938*4882a593Smuzhiyun return index < vsi->num_queue_pairs ||
1939*4882a593Smuzhiyun (index >= vsi->alloc_queue_pairs &&
1940*4882a593Smuzhiyun index < vsi->alloc_queue_pairs + vsi->num_queue_pairs);
1941*4882a593Smuzhiyun }
1942*4882a593Smuzhiyun
1943*4882a593Smuzhiyun return index < vsi->num_queue_pairs;
1944*4882a593Smuzhiyun }
1945*4882a593Smuzhiyun
i40e_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring)1946*4882a593Smuzhiyun static int i40e_set_ringparam(struct net_device *netdev,
1947*4882a593Smuzhiyun struct ethtool_ringparam *ring)
1948*4882a593Smuzhiyun {
1949*4882a593Smuzhiyun struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
1950*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
1951*4882a593Smuzhiyun struct i40e_hw *hw = &np->vsi->back->hw;
1952*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
1953*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
1954*4882a593Smuzhiyun u32 new_rx_count, new_tx_count;
1955*4882a593Smuzhiyun u16 tx_alloc_queue_pairs;
1956*4882a593Smuzhiyun int timeout = 50;
1957*4882a593Smuzhiyun int i, err = 0;
1958*4882a593Smuzhiyun
1959*4882a593Smuzhiyun if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1960*4882a593Smuzhiyun return -EINVAL;
1961*4882a593Smuzhiyun
1962*4882a593Smuzhiyun if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1963*4882a593Smuzhiyun ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
1964*4882a593Smuzhiyun ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1965*4882a593Smuzhiyun ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
1966*4882a593Smuzhiyun netdev_info(netdev,
1967*4882a593Smuzhiyun "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
1968*4882a593Smuzhiyun ring->tx_pending, ring->rx_pending,
1969*4882a593Smuzhiyun I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS);
1970*4882a593Smuzhiyun return -EINVAL;
1971*4882a593Smuzhiyun }
1972*4882a593Smuzhiyun
1973*4882a593Smuzhiyun new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1974*4882a593Smuzhiyun new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1975*4882a593Smuzhiyun
1976*4882a593Smuzhiyun /* if nothing to do return success */
1977*4882a593Smuzhiyun if ((new_tx_count == vsi->tx_rings[0]->count) &&
1978*4882a593Smuzhiyun (new_rx_count == vsi->rx_rings[0]->count))
1979*4882a593Smuzhiyun return 0;
1980*4882a593Smuzhiyun
1981*4882a593Smuzhiyun /* If there is a AF_XDP page pool attached to any of Rx rings,
1982*4882a593Smuzhiyun * disallow changing the number of descriptors -- regardless
1983*4882a593Smuzhiyun * if the netdev is running or not.
1984*4882a593Smuzhiyun */
1985*4882a593Smuzhiyun if (i40e_xsk_any_rx_ring_enabled(vsi))
1986*4882a593Smuzhiyun return -EBUSY;
1987*4882a593Smuzhiyun
1988*4882a593Smuzhiyun while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
1989*4882a593Smuzhiyun timeout--;
1990*4882a593Smuzhiyun if (!timeout)
1991*4882a593Smuzhiyun return -EBUSY;
1992*4882a593Smuzhiyun usleep_range(1000, 2000);
1993*4882a593Smuzhiyun }
1994*4882a593Smuzhiyun
1995*4882a593Smuzhiyun if (!netif_running(vsi->netdev)) {
1996*4882a593Smuzhiyun /* simple case - set for the next time the netdev is started */
1997*4882a593Smuzhiyun for (i = 0; i < vsi->num_queue_pairs; i++) {
1998*4882a593Smuzhiyun vsi->tx_rings[i]->count = new_tx_count;
1999*4882a593Smuzhiyun vsi->rx_rings[i]->count = new_rx_count;
2000*4882a593Smuzhiyun if (i40e_enabled_xdp_vsi(vsi))
2001*4882a593Smuzhiyun vsi->xdp_rings[i]->count = new_tx_count;
2002*4882a593Smuzhiyun }
2003*4882a593Smuzhiyun vsi->num_tx_desc = new_tx_count;
2004*4882a593Smuzhiyun vsi->num_rx_desc = new_rx_count;
2005*4882a593Smuzhiyun goto done;
2006*4882a593Smuzhiyun }
2007*4882a593Smuzhiyun
2008*4882a593Smuzhiyun /* We can't just free everything and then setup again,
2009*4882a593Smuzhiyun * because the ISRs in MSI-X mode get passed pointers
2010*4882a593Smuzhiyun * to the Tx and Rx ring structs.
2011*4882a593Smuzhiyun */
2012*4882a593Smuzhiyun
2013*4882a593Smuzhiyun /* alloc updated Tx and XDP Tx resources */
2014*4882a593Smuzhiyun tx_alloc_queue_pairs = vsi->alloc_queue_pairs *
2015*4882a593Smuzhiyun (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
2016*4882a593Smuzhiyun if (new_tx_count != vsi->tx_rings[0]->count) {
2017*4882a593Smuzhiyun netdev_info(netdev,
2018*4882a593Smuzhiyun "Changing Tx descriptor count from %d to %d.\n",
2019*4882a593Smuzhiyun vsi->tx_rings[0]->count, new_tx_count);
2020*4882a593Smuzhiyun tx_rings = kcalloc(tx_alloc_queue_pairs,
2021*4882a593Smuzhiyun sizeof(struct i40e_ring), GFP_KERNEL);
2022*4882a593Smuzhiyun if (!tx_rings) {
2023*4882a593Smuzhiyun err = -ENOMEM;
2024*4882a593Smuzhiyun goto done;
2025*4882a593Smuzhiyun }
2026*4882a593Smuzhiyun
2027*4882a593Smuzhiyun for (i = 0; i < tx_alloc_queue_pairs; i++) {
2028*4882a593Smuzhiyun if (!i40e_active_tx_ring_index(vsi, i))
2029*4882a593Smuzhiyun continue;
2030*4882a593Smuzhiyun
2031*4882a593Smuzhiyun tx_rings[i] = *vsi->tx_rings[i];
2032*4882a593Smuzhiyun tx_rings[i].count = new_tx_count;
2033*4882a593Smuzhiyun /* the desc and bi pointers will be reallocated in the
2034*4882a593Smuzhiyun * setup call
2035*4882a593Smuzhiyun */
2036*4882a593Smuzhiyun tx_rings[i].desc = NULL;
2037*4882a593Smuzhiyun tx_rings[i].rx_bi = NULL;
2038*4882a593Smuzhiyun err = i40e_setup_tx_descriptors(&tx_rings[i]);
2039*4882a593Smuzhiyun if (err) {
2040*4882a593Smuzhiyun while (i) {
2041*4882a593Smuzhiyun i--;
2042*4882a593Smuzhiyun if (!i40e_active_tx_ring_index(vsi, i))
2043*4882a593Smuzhiyun continue;
2044*4882a593Smuzhiyun i40e_free_tx_resources(&tx_rings[i]);
2045*4882a593Smuzhiyun }
2046*4882a593Smuzhiyun kfree(tx_rings);
2047*4882a593Smuzhiyun tx_rings = NULL;
2048*4882a593Smuzhiyun
2049*4882a593Smuzhiyun goto done;
2050*4882a593Smuzhiyun }
2051*4882a593Smuzhiyun }
2052*4882a593Smuzhiyun }
2053*4882a593Smuzhiyun
2054*4882a593Smuzhiyun /* alloc updated Rx resources */
2055*4882a593Smuzhiyun if (new_rx_count != vsi->rx_rings[0]->count) {
2056*4882a593Smuzhiyun netdev_info(netdev,
2057*4882a593Smuzhiyun "Changing Rx descriptor count from %d to %d\n",
2058*4882a593Smuzhiyun vsi->rx_rings[0]->count, new_rx_count);
2059*4882a593Smuzhiyun rx_rings = kcalloc(vsi->alloc_queue_pairs,
2060*4882a593Smuzhiyun sizeof(struct i40e_ring), GFP_KERNEL);
2061*4882a593Smuzhiyun if (!rx_rings) {
2062*4882a593Smuzhiyun err = -ENOMEM;
2063*4882a593Smuzhiyun goto free_tx;
2064*4882a593Smuzhiyun }
2065*4882a593Smuzhiyun
2066*4882a593Smuzhiyun for (i = 0; i < vsi->num_queue_pairs; i++) {
2067*4882a593Smuzhiyun u16 unused;
2068*4882a593Smuzhiyun
2069*4882a593Smuzhiyun /* clone ring and setup updated count */
2070*4882a593Smuzhiyun rx_rings[i] = *vsi->rx_rings[i];
2071*4882a593Smuzhiyun rx_rings[i].count = new_rx_count;
2072*4882a593Smuzhiyun /* the desc and bi pointers will be reallocated in the
2073*4882a593Smuzhiyun * setup call
2074*4882a593Smuzhiyun */
2075*4882a593Smuzhiyun rx_rings[i].desc = NULL;
2076*4882a593Smuzhiyun rx_rings[i].rx_bi = NULL;
2077*4882a593Smuzhiyun /* Clear cloned XDP RX-queue info before setup call */
2078*4882a593Smuzhiyun memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq));
2079*4882a593Smuzhiyun /* this is to allow wr32 to have something to write to
2080*4882a593Smuzhiyun * during early allocation of Rx buffers
2081*4882a593Smuzhiyun */
2082*4882a593Smuzhiyun rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
2083*4882a593Smuzhiyun err = i40e_setup_rx_descriptors(&rx_rings[i]);
2084*4882a593Smuzhiyun if (err)
2085*4882a593Smuzhiyun goto rx_unwind;
2086*4882a593Smuzhiyun
2087*4882a593Smuzhiyun /* now allocate the Rx buffers to make sure the OS
2088*4882a593Smuzhiyun * has enough memory, any failure here means abort
2089*4882a593Smuzhiyun */
2090*4882a593Smuzhiyun unused = I40E_DESC_UNUSED(&rx_rings[i]);
2091*4882a593Smuzhiyun err = i40e_alloc_rx_buffers(&rx_rings[i], unused);
2092*4882a593Smuzhiyun rx_unwind:
2093*4882a593Smuzhiyun if (err) {
2094*4882a593Smuzhiyun do {
2095*4882a593Smuzhiyun i40e_free_rx_resources(&rx_rings[i]);
2096*4882a593Smuzhiyun } while (i--);
2097*4882a593Smuzhiyun kfree(rx_rings);
2098*4882a593Smuzhiyun rx_rings = NULL;
2099*4882a593Smuzhiyun
2100*4882a593Smuzhiyun goto free_tx;
2101*4882a593Smuzhiyun }
2102*4882a593Smuzhiyun }
2103*4882a593Smuzhiyun }
2104*4882a593Smuzhiyun
2105*4882a593Smuzhiyun /* Bring interface down, copy in the new ring info,
2106*4882a593Smuzhiyun * then restore the interface
2107*4882a593Smuzhiyun */
2108*4882a593Smuzhiyun i40e_down(vsi);
2109*4882a593Smuzhiyun
2110*4882a593Smuzhiyun if (tx_rings) {
2111*4882a593Smuzhiyun for (i = 0; i < tx_alloc_queue_pairs; i++) {
2112*4882a593Smuzhiyun if (i40e_active_tx_ring_index(vsi, i)) {
2113*4882a593Smuzhiyun i40e_free_tx_resources(vsi->tx_rings[i]);
2114*4882a593Smuzhiyun *vsi->tx_rings[i] = tx_rings[i];
2115*4882a593Smuzhiyun }
2116*4882a593Smuzhiyun }
2117*4882a593Smuzhiyun kfree(tx_rings);
2118*4882a593Smuzhiyun tx_rings = NULL;
2119*4882a593Smuzhiyun }
2120*4882a593Smuzhiyun
2121*4882a593Smuzhiyun if (rx_rings) {
2122*4882a593Smuzhiyun for (i = 0; i < vsi->num_queue_pairs; i++) {
2123*4882a593Smuzhiyun i40e_free_rx_resources(vsi->rx_rings[i]);
2124*4882a593Smuzhiyun /* get the real tail offset */
2125*4882a593Smuzhiyun rx_rings[i].tail = vsi->rx_rings[i]->tail;
2126*4882a593Smuzhiyun /* this is to fake out the allocation routine
2127*4882a593Smuzhiyun * into thinking it has to realloc everything
2128*4882a593Smuzhiyun * but the recycling logic will let us re-use
2129*4882a593Smuzhiyun * the buffers allocated above
2130*4882a593Smuzhiyun */
2131*4882a593Smuzhiyun rx_rings[i].next_to_use = 0;
2132*4882a593Smuzhiyun rx_rings[i].next_to_clean = 0;
2133*4882a593Smuzhiyun rx_rings[i].next_to_alloc = 0;
2134*4882a593Smuzhiyun /* do a struct copy */
2135*4882a593Smuzhiyun *vsi->rx_rings[i] = rx_rings[i];
2136*4882a593Smuzhiyun }
2137*4882a593Smuzhiyun kfree(rx_rings);
2138*4882a593Smuzhiyun rx_rings = NULL;
2139*4882a593Smuzhiyun }
2140*4882a593Smuzhiyun
2141*4882a593Smuzhiyun vsi->num_tx_desc = new_tx_count;
2142*4882a593Smuzhiyun vsi->num_rx_desc = new_rx_count;
2143*4882a593Smuzhiyun i40e_up(vsi);
2144*4882a593Smuzhiyun
2145*4882a593Smuzhiyun free_tx:
2146*4882a593Smuzhiyun /* error cleanup if the Rx allocations failed after getting Tx */
2147*4882a593Smuzhiyun if (tx_rings) {
2148*4882a593Smuzhiyun for (i = 0; i < tx_alloc_queue_pairs; i++) {
2149*4882a593Smuzhiyun if (i40e_active_tx_ring_index(vsi, i))
2150*4882a593Smuzhiyun i40e_free_tx_resources(vsi->tx_rings[i]);
2151*4882a593Smuzhiyun }
2152*4882a593Smuzhiyun kfree(tx_rings);
2153*4882a593Smuzhiyun tx_rings = NULL;
2154*4882a593Smuzhiyun }
2155*4882a593Smuzhiyun
2156*4882a593Smuzhiyun done:
2157*4882a593Smuzhiyun clear_bit(__I40E_CONFIG_BUSY, pf->state);
2158*4882a593Smuzhiyun
2159*4882a593Smuzhiyun return err;
2160*4882a593Smuzhiyun }
2161*4882a593Smuzhiyun
2162*4882a593Smuzhiyun /**
2163*4882a593Smuzhiyun * i40e_get_stats_count - return the stats count for a device
2164*4882a593Smuzhiyun * @netdev: the netdev to return the count for
2165*4882a593Smuzhiyun *
2166*4882a593Smuzhiyun * Returns the total number of statistics for this netdev. Note that even
2167*4882a593Smuzhiyun * though this is a function, it is required that the count for a specific
2168*4882a593Smuzhiyun * netdev must never change. Basing the count on static values such as the
2169*4882a593Smuzhiyun * maximum number of queues or the device type is ok. However, the API for
2170*4882a593Smuzhiyun * obtaining stats is *not* safe against changes based on non-static
2171*4882a593Smuzhiyun * values such as the *current* number of queues, or runtime flags.
2172*4882a593Smuzhiyun *
2173*4882a593Smuzhiyun * If a statistic is not always enabled, return it as part of the count
2174*4882a593Smuzhiyun * anyways, always return its string, and report its value as zero.
2175*4882a593Smuzhiyun **/
i40e_get_stats_count(struct net_device * netdev)2176*4882a593Smuzhiyun static int i40e_get_stats_count(struct net_device *netdev)
2177*4882a593Smuzhiyun {
2178*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2179*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
2180*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
2181*4882a593Smuzhiyun int stats_len;
2182*4882a593Smuzhiyun
2183*4882a593Smuzhiyun if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1)
2184*4882a593Smuzhiyun stats_len = I40E_PF_STATS_LEN;
2185*4882a593Smuzhiyun else
2186*4882a593Smuzhiyun stats_len = I40E_VSI_STATS_LEN;
2187*4882a593Smuzhiyun
2188*4882a593Smuzhiyun /* The number of stats reported for a given net_device must remain
2189*4882a593Smuzhiyun * constant throughout the life of that device.
2190*4882a593Smuzhiyun *
2191*4882a593Smuzhiyun * This is because the API for obtaining the size, strings, and stats
2192*4882a593Smuzhiyun * is spread out over three separate ethtool ioctls. There is no safe
2193*4882a593Smuzhiyun * way to lock the number of stats across these calls, so we must
2194*4882a593Smuzhiyun * assume that they will never change.
2195*4882a593Smuzhiyun *
2196*4882a593Smuzhiyun * Due to this, we report the maximum number of queues, even if not
2197*4882a593Smuzhiyun * every queue is currently configured. Since we always allocate
2198*4882a593Smuzhiyun * queues in pairs, we'll just use netdev->num_tx_queues * 2. This
2199*4882a593Smuzhiyun * works because the num_tx_queues is set at device creation and never
2200*4882a593Smuzhiyun * changes.
2201*4882a593Smuzhiyun */
2202*4882a593Smuzhiyun stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues;
2203*4882a593Smuzhiyun
2204*4882a593Smuzhiyun return stats_len;
2205*4882a593Smuzhiyun }
2206*4882a593Smuzhiyun
i40e_get_sset_count(struct net_device * netdev,int sset)2207*4882a593Smuzhiyun static int i40e_get_sset_count(struct net_device *netdev, int sset)
2208*4882a593Smuzhiyun {
2209*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2210*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
2211*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
2212*4882a593Smuzhiyun
2213*4882a593Smuzhiyun switch (sset) {
2214*4882a593Smuzhiyun case ETH_SS_TEST:
2215*4882a593Smuzhiyun return I40E_TEST_LEN;
2216*4882a593Smuzhiyun case ETH_SS_STATS:
2217*4882a593Smuzhiyun return i40e_get_stats_count(netdev);
2218*4882a593Smuzhiyun case ETH_SS_PRIV_FLAGS:
2219*4882a593Smuzhiyun return I40E_PRIV_FLAGS_STR_LEN +
2220*4882a593Smuzhiyun (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
2221*4882a593Smuzhiyun default:
2222*4882a593Smuzhiyun return -EOPNOTSUPP;
2223*4882a593Smuzhiyun }
2224*4882a593Smuzhiyun }
2225*4882a593Smuzhiyun
2226*4882a593Smuzhiyun /**
2227*4882a593Smuzhiyun * i40e_get_veb_tc_stats - copy VEB TC statistics to formatted structure
2228*4882a593Smuzhiyun * @tc: the TC statistics in VEB structure (veb->tc_stats)
2229*4882a593Smuzhiyun * @i: the index of traffic class in (veb->tc_stats) structure to copy
2230*4882a593Smuzhiyun *
2231*4882a593Smuzhiyun * Copy VEB TC statistics from structure of arrays (veb->tc_stats) to
2232*4882a593Smuzhiyun * one dimensional structure i40e_cp_veb_tc_stats.
2233*4882a593Smuzhiyun * Produce formatted i40e_cp_veb_tc_stats structure of the VEB TC
2234*4882a593Smuzhiyun * statistics for the given TC.
2235*4882a593Smuzhiyun **/
2236*4882a593Smuzhiyun static struct i40e_cp_veb_tc_stats
i40e_get_veb_tc_stats(struct i40e_veb_tc_stats * tc,unsigned int i)2237*4882a593Smuzhiyun i40e_get_veb_tc_stats(struct i40e_veb_tc_stats *tc, unsigned int i)
2238*4882a593Smuzhiyun {
2239*4882a593Smuzhiyun struct i40e_cp_veb_tc_stats veb_tc = {
2240*4882a593Smuzhiyun .tc_rx_packets = tc->tc_rx_packets[i],
2241*4882a593Smuzhiyun .tc_rx_bytes = tc->tc_rx_bytes[i],
2242*4882a593Smuzhiyun .tc_tx_packets = tc->tc_tx_packets[i],
2243*4882a593Smuzhiyun .tc_tx_bytes = tc->tc_tx_bytes[i],
2244*4882a593Smuzhiyun };
2245*4882a593Smuzhiyun
2246*4882a593Smuzhiyun return veb_tc;
2247*4882a593Smuzhiyun }
2248*4882a593Smuzhiyun
2249*4882a593Smuzhiyun /**
2250*4882a593Smuzhiyun * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure
2251*4882a593Smuzhiyun * @pf: the PF device structure
2252*4882a593Smuzhiyun * @i: the priority value to copy
2253*4882a593Smuzhiyun *
2254*4882a593Smuzhiyun * The PFC stats are found as arrays in pf->stats, which is not easy to pass
2255*4882a593Smuzhiyun * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure
2256*4882a593Smuzhiyun * of the PFC stats for the given priority.
2257*4882a593Smuzhiyun **/
2258*4882a593Smuzhiyun static inline struct i40e_pfc_stats
i40e_get_pfc_stats(struct i40e_pf * pf,unsigned int i)2259*4882a593Smuzhiyun i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i)
2260*4882a593Smuzhiyun {
2261*4882a593Smuzhiyun #define I40E_GET_PFC_STAT(stat, priority) \
2262*4882a593Smuzhiyun .stat = pf->stats.stat[priority]
2263*4882a593Smuzhiyun
2264*4882a593Smuzhiyun struct i40e_pfc_stats pfc = {
2265*4882a593Smuzhiyun I40E_GET_PFC_STAT(priority_xon_rx, i),
2266*4882a593Smuzhiyun I40E_GET_PFC_STAT(priority_xoff_rx, i),
2267*4882a593Smuzhiyun I40E_GET_PFC_STAT(priority_xon_tx, i),
2268*4882a593Smuzhiyun I40E_GET_PFC_STAT(priority_xoff_tx, i),
2269*4882a593Smuzhiyun I40E_GET_PFC_STAT(priority_xon_2_xoff, i),
2270*4882a593Smuzhiyun };
2271*4882a593Smuzhiyun return pfc;
2272*4882a593Smuzhiyun }
2273*4882a593Smuzhiyun
2274*4882a593Smuzhiyun /**
2275*4882a593Smuzhiyun * i40e_get_ethtool_stats - copy stat values into supplied buffer
2276*4882a593Smuzhiyun * @netdev: the netdev to collect stats for
2277*4882a593Smuzhiyun * @stats: ethtool stats command structure
2278*4882a593Smuzhiyun * @data: ethtool supplied buffer
2279*4882a593Smuzhiyun *
2280*4882a593Smuzhiyun * Copy the stats values for this netdev into the buffer. Expects data to be
2281*4882a593Smuzhiyun * pre-allocated to the size returned by i40e_get_stats_count.. Note that all
2282*4882a593Smuzhiyun * statistics must be copied in a static order, and the count must not change
2283*4882a593Smuzhiyun * for a given netdev. See i40e_get_stats_count for more details.
2284*4882a593Smuzhiyun *
2285*4882a593Smuzhiyun * If a statistic is not currently valid (such as a disabled queue), this
2286*4882a593Smuzhiyun * function reports its value as zero.
2287*4882a593Smuzhiyun **/
i40e_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * data)2288*4882a593Smuzhiyun static void i40e_get_ethtool_stats(struct net_device *netdev,
2289*4882a593Smuzhiyun struct ethtool_stats *stats, u64 *data)
2290*4882a593Smuzhiyun {
2291*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2292*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
2293*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
2294*4882a593Smuzhiyun struct i40e_veb *veb = NULL;
2295*4882a593Smuzhiyun unsigned int i;
2296*4882a593Smuzhiyun bool veb_stats;
2297*4882a593Smuzhiyun u64 *p = data;
2298*4882a593Smuzhiyun
2299*4882a593Smuzhiyun i40e_update_stats(vsi);
2300*4882a593Smuzhiyun
2301*4882a593Smuzhiyun i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi),
2302*4882a593Smuzhiyun i40e_gstrings_net_stats);
2303*4882a593Smuzhiyun
2304*4882a593Smuzhiyun i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats);
2305*4882a593Smuzhiyun
2306*4882a593Smuzhiyun rcu_read_lock();
2307*4882a593Smuzhiyun for (i = 0; i < netdev->num_tx_queues; i++) {
2308*4882a593Smuzhiyun i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i]));
2309*4882a593Smuzhiyun i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i]));
2310*4882a593Smuzhiyun }
2311*4882a593Smuzhiyun rcu_read_unlock();
2312*4882a593Smuzhiyun
2313*4882a593Smuzhiyun if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
2314*4882a593Smuzhiyun goto check_data_pointer;
2315*4882a593Smuzhiyun
2316*4882a593Smuzhiyun veb_stats = ((pf->lan_veb != I40E_NO_VEB) &&
2317*4882a593Smuzhiyun (pf->lan_veb < I40E_MAX_VEB) &&
2318*4882a593Smuzhiyun (pf->flags & I40E_FLAG_VEB_STATS_ENABLED));
2319*4882a593Smuzhiyun
2320*4882a593Smuzhiyun if (veb_stats) {
2321*4882a593Smuzhiyun veb = pf->veb[pf->lan_veb];
2322*4882a593Smuzhiyun i40e_update_veb_stats(veb);
2323*4882a593Smuzhiyun }
2324*4882a593Smuzhiyun
2325*4882a593Smuzhiyun /* If veb stats aren't enabled, pass NULL instead of the veb so that
2326*4882a593Smuzhiyun * we initialize stats to zero and update the data pointer
2327*4882a593Smuzhiyun * intelligently
2328*4882a593Smuzhiyun */
2329*4882a593Smuzhiyun i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL,
2330*4882a593Smuzhiyun i40e_gstrings_veb_stats);
2331*4882a593Smuzhiyun
2332*4882a593Smuzhiyun for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
2333*4882a593Smuzhiyun if (veb_stats) {
2334*4882a593Smuzhiyun struct i40e_cp_veb_tc_stats veb_tc =
2335*4882a593Smuzhiyun i40e_get_veb_tc_stats(&veb->tc_stats, i);
2336*4882a593Smuzhiyun
2337*4882a593Smuzhiyun i40e_add_ethtool_stats(&data, &veb_tc,
2338*4882a593Smuzhiyun i40e_gstrings_veb_tc_stats);
2339*4882a593Smuzhiyun } else {
2340*4882a593Smuzhiyun i40e_add_ethtool_stats(&data, NULL,
2341*4882a593Smuzhiyun i40e_gstrings_veb_tc_stats);
2342*4882a593Smuzhiyun }
2343*4882a593Smuzhiyun
2344*4882a593Smuzhiyun i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats);
2345*4882a593Smuzhiyun
2346*4882a593Smuzhiyun for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
2347*4882a593Smuzhiyun struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i);
2348*4882a593Smuzhiyun
2349*4882a593Smuzhiyun i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats);
2350*4882a593Smuzhiyun }
2351*4882a593Smuzhiyun
2352*4882a593Smuzhiyun check_data_pointer:
2353*4882a593Smuzhiyun WARN_ONCE(data - p != i40e_get_stats_count(netdev),
2354*4882a593Smuzhiyun "ethtool stats count mismatch!");
2355*4882a593Smuzhiyun }
2356*4882a593Smuzhiyun
2357*4882a593Smuzhiyun /**
2358*4882a593Smuzhiyun * i40e_get_stat_strings - copy stat strings into supplied buffer
2359*4882a593Smuzhiyun * @netdev: the netdev to collect strings for
2360*4882a593Smuzhiyun * @data: supplied buffer to copy strings into
2361*4882a593Smuzhiyun *
2362*4882a593Smuzhiyun * Copy the strings related to stats for this netdev. Expects data to be
2363*4882a593Smuzhiyun * pre-allocated with the size reported by i40e_get_stats_count. Note that the
2364*4882a593Smuzhiyun * strings must be copied in a static order and the total count must not
2365*4882a593Smuzhiyun * change for a given netdev. See i40e_get_stats_count for more details.
2366*4882a593Smuzhiyun **/
i40e_get_stat_strings(struct net_device * netdev,u8 * data)2367*4882a593Smuzhiyun static void i40e_get_stat_strings(struct net_device *netdev, u8 *data)
2368*4882a593Smuzhiyun {
2369*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2370*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
2371*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
2372*4882a593Smuzhiyun unsigned int i;
2373*4882a593Smuzhiyun u8 *p = data;
2374*4882a593Smuzhiyun
2375*4882a593Smuzhiyun i40e_add_stat_strings(&data, i40e_gstrings_net_stats);
2376*4882a593Smuzhiyun
2377*4882a593Smuzhiyun i40e_add_stat_strings(&data, i40e_gstrings_misc_stats);
2378*4882a593Smuzhiyun
2379*4882a593Smuzhiyun for (i = 0; i < netdev->num_tx_queues; i++) {
2380*4882a593Smuzhiyun i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
2381*4882a593Smuzhiyun "tx", i);
2382*4882a593Smuzhiyun i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
2383*4882a593Smuzhiyun "rx", i);
2384*4882a593Smuzhiyun }
2385*4882a593Smuzhiyun
2386*4882a593Smuzhiyun if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
2387*4882a593Smuzhiyun goto check_data_pointer;
2388*4882a593Smuzhiyun
2389*4882a593Smuzhiyun i40e_add_stat_strings(&data, i40e_gstrings_veb_stats);
2390*4882a593Smuzhiyun
2391*4882a593Smuzhiyun for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
2392*4882a593Smuzhiyun i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i);
2393*4882a593Smuzhiyun
2394*4882a593Smuzhiyun i40e_add_stat_strings(&data, i40e_gstrings_stats);
2395*4882a593Smuzhiyun
2396*4882a593Smuzhiyun for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
2397*4882a593Smuzhiyun i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i);
2398*4882a593Smuzhiyun
2399*4882a593Smuzhiyun check_data_pointer:
2400*4882a593Smuzhiyun WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN,
2401*4882a593Smuzhiyun "stat strings count mismatch!");
2402*4882a593Smuzhiyun }
2403*4882a593Smuzhiyun
i40e_get_priv_flag_strings(struct net_device * netdev,u8 * data)2404*4882a593Smuzhiyun static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data)
2405*4882a593Smuzhiyun {
2406*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2407*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
2408*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
2409*4882a593Smuzhiyun char *p = (char *)data;
2410*4882a593Smuzhiyun unsigned int i;
2411*4882a593Smuzhiyun
2412*4882a593Smuzhiyun for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
2413*4882a593Smuzhiyun snprintf(p, ETH_GSTRING_LEN, "%s",
2414*4882a593Smuzhiyun i40e_gstrings_priv_flags[i].flag_string);
2415*4882a593Smuzhiyun p += ETH_GSTRING_LEN;
2416*4882a593Smuzhiyun }
2417*4882a593Smuzhiyun if (pf->hw.pf_id != 0)
2418*4882a593Smuzhiyun return;
2419*4882a593Smuzhiyun for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) {
2420*4882a593Smuzhiyun snprintf(p, ETH_GSTRING_LEN, "%s",
2421*4882a593Smuzhiyun i40e_gl_gstrings_priv_flags[i].flag_string);
2422*4882a593Smuzhiyun p += ETH_GSTRING_LEN;
2423*4882a593Smuzhiyun }
2424*4882a593Smuzhiyun }
2425*4882a593Smuzhiyun
i40e_get_strings(struct net_device * netdev,u32 stringset,u8 * data)2426*4882a593Smuzhiyun static void i40e_get_strings(struct net_device *netdev, u32 stringset,
2427*4882a593Smuzhiyun u8 *data)
2428*4882a593Smuzhiyun {
2429*4882a593Smuzhiyun switch (stringset) {
2430*4882a593Smuzhiyun case ETH_SS_TEST:
2431*4882a593Smuzhiyun memcpy(data, i40e_gstrings_test,
2432*4882a593Smuzhiyun I40E_TEST_LEN * ETH_GSTRING_LEN);
2433*4882a593Smuzhiyun break;
2434*4882a593Smuzhiyun case ETH_SS_STATS:
2435*4882a593Smuzhiyun i40e_get_stat_strings(netdev, data);
2436*4882a593Smuzhiyun break;
2437*4882a593Smuzhiyun case ETH_SS_PRIV_FLAGS:
2438*4882a593Smuzhiyun i40e_get_priv_flag_strings(netdev, data);
2439*4882a593Smuzhiyun break;
2440*4882a593Smuzhiyun default:
2441*4882a593Smuzhiyun break;
2442*4882a593Smuzhiyun }
2443*4882a593Smuzhiyun }
2444*4882a593Smuzhiyun
i40e_get_ts_info(struct net_device * dev,struct ethtool_ts_info * info)2445*4882a593Smuzhiyun static int i40e_get_ts_info(struct net_device *dev,
2446*4882a593Smuzhiyun struct ethtool_ts_info *info)
2447*4882a593Smuzhiyun {
2448*4882a593Smuzhiyun struct i40e_pf *pf = i40e_netdev_to_pf(dev);
2449*4882a593Smuzhiyun
2450*4882a593Smuzhiyun /* only report HW timestamping if PTP is enabled */
2451*4882a593Smuzhiyun if (!(pf->flags & I40E_FLAG_PTP))
2452*4882a593Smuzhiyun return ethtool_op_get_ts_info(dev, info);
2453*4882a593Smuzhiyun
2454*4882a593Smuzhiyun info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
2455*4882a593Smuzhiyun SOF_TIMESTAMPING_RX_SOFTWARE |
2456*4882a593Smuzhiyun SOF_TIMESTAMPING_SOFTWARE |
2457*4882a593Smuzhiyun SOF_TIMESTAMPING_TX_HARDWARE |
2458*4882a593Smuzhiyun SOF_TIMESTAMPING_RX_HARDWARE |
2459*4882a593Smuzhiyun SOF_TIMESTAMPING_RAW_HARDWARE;
2460*4882a593Smuzhiyun
2461*4882a593Smuzhiyun if (pf->ptp_clock)
2462*4882a593Smuzhiyun info->phc_index = ptp_clock_index(pf->ptp_clock);
2463*4882a593Smuzhiyun else
2464*4882a593Smuzhiyun info->phc_index = -1;
2465*4882a593Smuzhiyun
2466*4882a593Smuzhiyun info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
2467*4882a593Smuzhiyun
2468*4882a593Smuzhiyun info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
2469*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
2470*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2471*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
2472*4882a593Smuzhiyun
2473*4882a593Smuzhiyun if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE)
2474*4882a593Smuzhiyun info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2475*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2476*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
2477*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
2478*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
2479*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2480*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
2481*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
2482*4882a593Smuzhiyun
2483*4882a593Smuzhiyun return 0;
2484*4882a593Smuzhiyun }
2485*4882a593Smuzhiyun
i40e_link_test(struct net_device * netdev,u64 * data)2486*4882a593Smuzhiyun static u64 i40e_link_test(struct net_device *netdev, u64 *data)
2487*4882a593Smuzhiyun {
2488*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2489*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
2490*4882a593Smuzhiyun i40e_status status;
2491*4882a593Smuzhiyun bool link_up = false;
2492*4882a593Smuzhiyun
2493*4882a593Smuzhiyun netif_info(pf, hw, netdev, "link test\n");
2494*4882a593Smuzhiyun status = i40e_get_link_status(&pf->hw, &link_up);
2495*4882a593Smuzhiyun if (status) {
2496*4882a593Smuzhiyun netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
2497*4882a593Smuzhiyun *data = 1;
2498*4882a593Smuzhiyun return *data;
2499*4882a593Smuzhiyun }
2500*4882a593Smuzhiyun
2501*4882a593Smuzhiyun if (link_up)
2502*4882a593Smuzhiyun *data = 0;
2503*4882a593Smuzhiyun else
2504*4882a593Smuzhiyun *data = 1;
2505*4882a593Smuzhiyun
2506*4882a593Smuzhiyun return *data;
2507*4882a593Smuzhiyun }
2508*4882a593Smuzhiyun
i40e_reg_test(struct net_device * netdev,u64 * data)2509*4882a593Smuzhiyun static u64 i40e_reg_test(struct net_device *netdev, u64 *data)
2510*4882a593Smuzhiyun {
2511*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2512*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
2513*4882a593Smuzhiyun
2514*4882a593Smuzhiyun netif_info(pf, hw, netdev, "register test\n");
2515*4882a593Smuzhiyun *data = i40e_diag_reg_test(&pf->hw);
2516*4882a593Smuzhiyun
2517*4882a593Smuzhiyun return *data;
2518*4882a593Smuzhiyun }
2519*4882a593Smuzhiyun
i40e_eeprom_test(struct net_device * netdev,u64 * data)2520*4882a593Smuzhiyun static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data)
2521*4882a593Smuzhiyun {
2522*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2523*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
2524*4882a593Smuzhiyun
2525*4882a593Smuzhiyun netif_info(pf, hw, netdev, "eeprom test\n");
2526*4882a593Smuzhiyun *data = i40e_diag_eeprom_test(&pf->hw);
2527*4882a593Smuzhiyun
2528*4882a593Smuzhiyun /* forcebly clear the NVM Update state machine */
2529*4882a593Smuzhiyun pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
2530*4882a593Smuzhiyun
2531*4882a593Smuzhiyun return *data;
2532*4882a593Smuzhiyun }
2533*4882a593Smuzhiyun
i40e_intr_test(struct net_device * netdev,u64 * data)2534*4882a593Smuzhiyun static u64 i40e_intr_test(struct net_device *netdev, u64 *data)
2535*4882a593Smuzhiyun {
2536*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2537*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
2538*4882a593Smuzhiyun u16 swc_old = pf->sw_int_count;
2539*4882a593Smuzhiyun
2540*4882a593Smuzhiyun netif_info(pf, hw, netdev, "interrupt test\n");
2541*4882a593Smuzhiyun wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
2542*4882a593Smuzhiyun (I40E_PFINT_DYN_CTL0_INTENA_MASK |
2543*4882a593Smuzhiyun I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
2544*4882a593Smuzhiyun I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
2545*4882a593Smuzhiyun I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
2546*4882a593Smuzhiyun I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
2547*4882a593Smuzhiyun usleep_range(1000, 2000);
2548*4882a593Smuzhiyun *data = (swc_old == pf->sw_int_count);
2549*4882a593Smuzhiyun
2550*4882a593Smuzhiyun return *data;
2551*4882a593Smuzhiyun }
2552*4882a593Smuzhiyun
i40e_active_vfs(struct i40e_pf * pf)2553*4882a593Smuzhiyun static inline bool i40e_active_vfs(struct i40e_pf *pf)
2554*4882a593Smuzhiyun {
2555*4882a593Smuzhiyun struct i40e_vf *vfs = pf->vf;
2556*4882a593Smuzhiyun int i;
2557*4882a593Smuzhiyun
2558*4882a593Smuzhiyun for (i = 0; i < pf->num_alloc_vfs; i++)
2559*4882a593Smuzhiyun if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states))
2560*4882a593Smuzhiyun return true;
2561*4882a593Smuzhiyun return false;
2562*4882a593Smuzhiyun }
2563*4882a593Smuzhiyun
i40e_active_vmdqs(struct i40e_pf * pf)2564*4882a593Smuzhiyun static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
2565*4882a593Smuzhiyun {
2566*4882a593Smuzhiyun return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
2567*4882a593Smuzhiyun }
2568*4882a593Smuzhiyun
i40e_diag_test(struct net_device * netdev,struct ethtool_test * eth_test,u64 * data)2569*4882a593Smuzhiyun static void i40e_diag_test(struct net_device *netdev,
2570*4882a593Smuzhiyun struct ethtool_test *eth_test, u64 *data)
2571*4882a593Smuzhiyun {
2572*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2573*4882a593Smuzhiyun bool if_running = netif_running(netdev);
2574*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
2575*4882a593Smuzhiyun
2576*4882a593Smuzhiyun if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2577*4882a593Smuzhiyun /* Offline tests */
2578*4882a593Smuzhiyun netif_info(pf, drv, netdev, "offline testing starting\n");
2579*4882a593Smuzhiyun
2580*4882a593Smuzhiyun set_bit(__I40E_TESTING, pf->state);
2581*4882a593Smuzhiyun
2582*4882a593Smuzhiyun if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
2583*4882a593Smuzhiyun test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
2584*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
2585*4882a593Smuzhiyun "Cannot start offline testing when PF is in reset state.\n");
2586*4882a593Smuzhiyun goto skip_ol_tests;
2587*4882a593Smuzhiyun }
2588*4882a593Smuzhiyun
2589*4882a593Smuzhiyun if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
2590*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
2591*4882a593Smuzhiyun "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
2592*4882a593Smuzhiyun goto skip_ol_tests;
2593*4882a593Smuzhiyun }
2594*4882a593Smuzhiyun
2595*4882a593Smuzhiyun /* If the device is online then take it offline */
2596*4882a593Smuzhiyun if (if_running)
2597*4882a593Smuzhiyun /* indicate we're in test mode */
2598*4882a593Smuzhiyun i40e_close(netdev);
2599*4882a593Smuzhiyun else
2600*4882a593Smuzhiyun /* This reset does not affect link - if it is
2601*4882a593Smuzhiyun * changed to a type of reset that does affect
2602*4882a593Smuzhiyun * link then the following link test would have
2603*4882a593Smuzhiyun * to be moved to before the reset
2604*4882a593Smuzhiyun */
2605*4882a593Smuzhiyun i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2606*4882a593Smuzhiyun
2607*4882a593Smuzhiyun if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2608*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
2609*4882a593Smuzhiyun
2610*4882a593Smuzhiyun if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
2611*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
2612*4882a593Smuzhiyun
2613*4882a593Smuzhiyun if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
2614*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
2615*4882a593Smuzhiyun
2616*4882a593Smuzhiyun /* run reg test last, a reset is required after it */
2617*4882a593Smuzhiyun if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
2618*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
2619*4882a593Smuzhiyun
2620*4882a593Smuzhiyun clear_bit(__I40E_TESTING, pf->state);
2621*4882a593Smuzhiyun i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2622*4882a593Smuzhiyun
2623*4882a593Smuzhiyun if (if_running)
2624*4882a593Smuzhiyun i40e_open(netdev);
2625*4882a593Smuzhiyun } else {
2626*4882a593Smuzhiyun /* Online tests */
2627*4882a593Smuzhiyun netif_info(pf, drv, netdev, "online testing starting\n");
2628*4882a593Smuzhiyun
2629*4882a593Smuzhiyun if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2630*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
2631*4882a593Smuzhiyun
2632*4882a593Smuzhiyun /* Offline only tests, not run in online; pass by default */
2633*4882a593Smuzhiyun data[I40E_ETH_TEST_REG] = 0;
2634*4882a593Smuzhiyun data[I40E_ETH_TEST_EEPROM] = 0;
2635*4882a593Smuzhiyun data[I40E_ETH_TEST_INTR] = 0;
2636*4882a593Smuzhiyun }
2637*4882a593Smuzhiyun
2638*4882a593Smuzhiyun netif_info(pf, drv, netdev, "testing finished\n");
2639*4882a593Smuzhiyun return;
2640*4882a593Smuzhiyun
2641*4882a593Smuzhiyun skip_ol_tests:
2642*4882a593Smuzhiyun data[I40E_ETH_TEST_REG] = 1;
2643*4882a593Smuzhiyun data[I40E_ETH_TEST_EEPROM] = 1;
2644*4882a593Smuzhiyun data[I40E_ETH_TEST_INTR] = 1;
2645*4882a593Smuzhiyun data[I40E_ETH_TEST_LINK] = 1;
2646*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
2647*4882a593Smuzhiyun clear_bit(__I40E_TESTING, pf->state);
2648*4882a593Smuzhiyun netif_info(pf, drv, netdev, "testing failed\n");
2649*4882a593Smuzhiyun }
2650*4882a593Smuzhiyun
i40e_get_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)2651*4882a593Smuzhiyun static void i40e_get_wol(struct net_device *netdev,
2652*4882a593Smuzhiyun struct ethtool_wolinfo *wol)
2653*4882a593Smuzhiyun {
2654*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2655*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
2656*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
2657*4882a593Smuzhiyun u16 wol_nvm_bits;
2658*4882a593Smuzhiyun
2659*4882a593Smuzhiyun /* NVM bit on means WoL disabled for the port */
2660*4882a593Smuzhiyun i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2661*4882a593Smuzhiyun if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
2662*4882a593Smuzhiyun wol->supported = 0;
2663*4882a593Smuzhiyun wol->wolopts = 0;
2664*4882a593Smuzhiyun } else {
2665*4882a593Smuzhiyun wol->supported = WAKE_MAGIC;
2666*4882a593Smuzhiyun wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
2667*4882a593Smuzhiyun }
2668*4882a593Smuzhiyun }
2669*4882a593Smuzhiyun
2670*4882a593Smuzhiyun /**
2671*4882a593Smuzhiyun * i40e_set_wol - set the WakeOnLAN configuration
2672*4882a593Smuzhiyun * @netdev: the netdev in question
2673*4882a593Smuzhiyun * @wol: the ethtool WoL setting data
2674*4882a593Smuzhiyun **/
i40e_set_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)2675*4882a593Smuzhiyun static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2676*4882a593Smuzhiyun {
2677*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2678*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
2679*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
2680*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
2681*4882a593Smuzhiyun u16 wol_nvm_bits;
2682*4882a593Smuzhiyun
2683*4882a593Smuzhiyun /* WoL not supported if this isn't the controlling PF on the port */
2684*4882a593Smuzhiyun if (hw->partition_id != 1) {
2685*4882a593Smuzhiyun i40e_partition_setting_complaint(pf);
2686*4882a593Smuzhiyun return -EOPNOTSUPP;
2687*4882a593Smuzhiyun }
2688*4882a593Smuzhiyun
2689*4882a593Smuzhiyun if (vsi != pf->vsi[pf->lan_vsi])
2690*4882a593Smuzhiyun return -EOPNOTSUPP;
2691*4882a593Smuzhiyun
2692*4882a593Smuzhiyun /* NVM bit on means WoL disabled for the port */
2693*4882a593Smuzhiyun i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2694*4882a593Smuzhiyun if (BIT(hw->port) & wol_nvm_bits)
2695*4882a593Smuzhiyun return -EOPNOTSUPP;
2696*4882a593Smuzhiyun
2697*4882a593Smuzhiyun /* only magic packet is supported */
2698*4882a593Smuzhiyun if (wol->wolopts & ~WAKE_MAGIC)
2699*4882a593Smuzhiyun return -EOPNOTSUPP;
2700*4882a593Smuzhiyun
2701*4882a593Smuzhiyun /* is this a new value? */
2702*4882a593Smuzhiyun if (pf->wol_en != !!wol->wolopts) {
2703*4882a593Smuzhiyun pf->wol_en = !!wol->wolopts;
2704*4882a593Smuzhiyun device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
2705*4882a593Smuzhiyun }
2706*4882a593Smuzhiyun
2707*4882a593Smuzhiyun return 0;
2708*4882a593Smuzhiyun }
2709*4882a593Smuzhiyun
i40e_set_phys_id(struct net_device * netdev,enum ethtool_phys_id_state state)2710*4882a593Smuzhiyun static int i40e_set_phys_id(struct net_device *netdev,
2711*4882a593Smuzhiyun enum ethtool_phys_id_state state)
2712*4882a593Smuzhiyun {
2713*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2714*4882a593Smuzhiyun i40e_status ret = 0;
2715*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
2716*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
2717*4882a593Smuzhiyun int blink_freq = 2;
2718*4882a593Smuzhiyun u16 temp_status;
2719*4882a593Smuzhiyun
2720*4882a593Smuzhiyun switch (state) {
2721*4882a593Smuzhiyun case ETHTOOL_ID_ACTIVE:
2722*4882a593Smuzhiyun if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2723*4882a593Smuzhiyun pf->led_status = i40e_led_get(hw);
2724*4882a593Smuzhiyun } else {
2725*4882a593Smuzhiyun if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2726*4882a593Smuzhiyun i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL,
2727*4882a593Smuzhiyun NULL);
2728*4882a593Smuzhiyun ret = i40e_led_get_phy(hw, &temp_status,
2729*4882a593Smuzhiyun &pf->phy_led_val);
2730*4882a593Smuzhiyun pf->led_status = temp_status;
2731*4882a593Smuzhiyun }
2732*4882a593Smuzhiyun return blink_freq;
2733*4882a593Smuzhiyun case ETHTOOL_ID_ON:
2734*4882a593Smuzhiyun if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2735*4882a593Smuzhiyun i40e_led_set(hw, 0xf, false);
2736*4882a593Smuzhiyun else
2737*4882a593Smuzhiyun ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
2738*4882a593Smuzhiyun break;
2739*4882a593Smuzhiyun case ETHTOOL_ID_OFF:
2740*4882a593Smuzhiyun if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2741*4882a593Smuzhiyun i40e_led_set(hw, 0x0, false);
2742*4882a593Smuzhiyun else
2743*4882a593Smuzhiyun ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
2744*4882a593Smuzhiyun break;
2745*4882a593Smuzhiyun case ETHTOOL_ID_INACTIVE:
2746*4882a593Smuzhiyun if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2747*4882a593Smuzhiyun i40e_led_set(hw, pf->led_status, false);
2748*4882a593Smuzhiyun } else {
2749*4882a593Smuzhiyun ret = i40e_led_set_phy(hw, false, pf->led_status,
2750*4882a593Smuzhiyun (pf->phy_led_val |
2751*4882a593Smuzhiyun I40E_PHY_LED_MODE_ORIG));
2752*4882a593Smuzhiyun if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2753*4882a593Smuzhiyun i40e_aq_set_phy_debug(hw, 0, NULL);
2754*4882a593Smuzhiyun }
2755*4882a593Smuzhiyun break;
2756*4882a593Smuzhiyun default:
2757*4882a593Smuzhiyun break;
2758*4882a593Smuzhiyun }
2759*4882a593Smuzhiyun if (ret)
2760*4882a593Smuzhiyun return -ENOENT;
2761*4882a593Smuzhiyun else
2762*4882a593Smuzhiyun return 0;
2763*4882a593Smuzhiyun }
2764*4882a593Smuzhiyun
2765*4882a593Smuzhiyun /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
2766*4882a593Smuzhiyun * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
2767*4882a593Smuzhiyun * 125us (8000 interrupts per second) == ITR(62)
2768*4882a593Smuzhiyun */
2769*4882a593Smuzhiyun
2770*4882a593Smuzhiyun /**
2771*4882a593Smuzhiyun * __i40e_get_coalesce - get per-queue coalesce settings
2772*4882a593Smuzhiyun * @netdev: the netdev to check
2773*4882a593Smuzhiyun * @ec: ethtool coalesce data structure
2774*4882a593Smuzhiyun * @queue: which queue to pick
2775*4882a593Smuzhiyun *
2776*4882a593Smuzhiyun * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
2777*4882a593Smuzhiyun * are per queue. If queue is <0 then we default to queue 0 as the
2778*4882a593Smuzhiyun * representative value.
2779*4882a593Smuzhiyun **/
__i40e_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec,int queue)2780*4882a593Smuzhiyun static int __i40e_get_coalesce(struct net_device *netdev,
2781*4882a593Smuzhiyun struct ethtool_coalesce *ec,
2782*4882a593Smuzhiyun int queue)
2783*4882a593Smuzhiyun {
2784*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2785*4882a593Smuzhiyun struct i40e_ring *rx_ring, *tx_ring;
2786*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
2787*4882a593Smuzhiyun
2788*4882a593Smuzhiyun ec->tx_max_coalesced_frames_irq = vsi->work_limit;
2789*4882a593Smuzhiyun ec->rx_max_coalesced_frames_irq = vsi->work_limit;
2790*4882a593Smuzhiyun
2791*4882a593Smuzhiyun /* rx and tx usecs has per queue value. If user doesn't specify the
2792*4882a593Smuzhiyun * queue, return queue 0's value to represent.
2793*4882a593Smuzhiyun */
2794*4882a593Smuzhiyun if (queue < 0)
2795*4882a593Smuzhiyun queue = 0;
2796*4882a593Smuzhiyun else if (queue >= vsi->num_queue_pairs)
2797*4882a593Smuzhiyun return -EINVAL;
2798*4882a593Smuzhiyun
2799*4882a593Smuzhiyun rx_ring = vsi->rx_rings[queue];
2800*4882a593Smuzhiyun tx_ring = vsi->tx_rings[queue];
2801*4882a593Smuzhiyun
2802*4882a593Smuzhiyun if (ITR_IS_DYNAMIC(rx_ring->itr_setting))
2803*4882a593Smuzhiyun ec->use_adaptive_rx_coalesce = 1;
2804*4882a593Smuzhiyun
2805*4882a593Smuzhiyun if (ITR_IS_DYNAMIC(tx_ring->itr_setting))
2806*4882a593Smuzhiyun ec->use_adaptive_tx_coalesce = 1;
2807*4882a593Smuzhiyun
2808*4882a593Smuzhiyun ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2809*4882a593Smuzhiyun ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2810*4882a593Smuzhiyun
2811*4882a593Smuzhiyun /* we use the _usecs_high to store/set the interrupt rate limit
2812*4882a593Smuzhiyun * that the hardware supports, that almost but not quite
2813*4882a593Smuzhiyun * fits the original intent of the ethtool variable,
2814*4882a593Smuzhiyun * the rx_coalesce_usecs_high limits total interrupts
2815*4882a593Smuzhiyun * per second from both tx/rx sources.
2816*4882a593Smuzhiyun */
2817*4882a593Smuzhiyun ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2818*4882a593Smuzhiyun ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
2819*4882a593Smuzhiyun
2820*4882a593Smuzhiyun return 0;
2821*4882a593Smuzhiyun }
2822*4882a593Smuzhiyun
2823*4882a593Smuzhiyun /**
2824*4882a593Smuzhiyun * i40e_get_coalesce - get a netdev's coalesce settings
2825*4882a593Smuzhiyun * @netdev: the netdev to check
2826*4882a593Smuzhiyun * @ec: ethtool coalesce data structure
2827*4882a593Smuzhiyun *
2828*4882a593Smuzhiyun * Gets the coalesce settings for a particular netdev. Note that if user has
2829*4882a593Smuzhiyun * modified per-queue settings, this only guarantees to represent queue 0. See
2830*4882a593Smuzhiyun * __i40e_get_coalesce for more details.
2831*4882a593Smuzhiyun **/
i40e_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec)2832*4882a593Smuzhiyun static int i40e_get_coalesce(struct net_device *netdev,
2833*4882a593Smuzhiyun struct ethtool_coalesce *ec)
2834*4882a593Smuzhiyun {
2835*4882a593Smuzhiyun return __i40e_get_coalesce(netdev, ec, -1);
2836*4882a593Smuzhiyun }
2837*4882a593Smuzhiyun
2838*4882a593Smuzhiyun /**
2839*4882a593Smuzhiyun * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
2840*4882a593Smuzhiyun * @netdev: netdev structure
2841*4882a593Smuzhiyun * @ec: ethtool's coalesce settings
2842*4882a593Smuzhiyun * @queue: the particular queue to read
2843*4882a593Smuzhiyun *
2844*4882a593Smuzhiyun * Will read a specific queue's coalesce settings
2845*4882a593Smuzhiyun **/
i40e_get_per_queue_coalesce(struct net_device * netdev,u32 queue,struct ethtool_coalesce * ec)2846*4882a593Smuzhiyun static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2847*4882a593Smuzhiyun struct ethtool_coalesce *ec)
2848*4882a593Smuzhiyun {
2849*4882a593Smuzhiyun return __i40e_get_coalesce(netdev, ec, queue);
2850*4882a593Smuzhiyun }
2851*4882a593Smuzhiyun
2852*4882a593Smuzhiyun /**
2853*4882a593Smuzhiyun * i40e_set_itr_per_queue - set ITR values for specific queue
2854*4882a593Smuzhiyun * @vsi: the VSI to set values for
2855*4882a593Smuzhiyun * @ec: coalesce settings from ethtool
2856*4882a593Smuzhiyun * @queue: the queue to modify
2857*4882a593Smuzhiyun *
2858*4882a593Smuzhiyun * Change the ITR settings for a specific queue.
2859*4882a593Smuzhiyun **/
i40e_set_itr_per_queue(struct i40e_vsi * vsi,struct ethtool_coalesce * ec,int queue)2860*4882a593Smuzhiyun static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2861*4882a593Smuzhiyun struct ethtool_coalesce *ec,
2862*4882a593Smuzhiyun int queue)
2863*4882a593Smuzhiyun {
2864*4882a593Smuzhiyun struct i40e_ring *rx_ring = vsi->rx_rings[queue];
2865*4882a593Smuzhiyun struct i40e_ring *tx_ring = vsi->tx_rings[queue];
2866*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
2867*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
2868*4882a593Smuzhiyun struct i40e_q_vector *q_vector;
2869*4882a593Smuzhiyun u16 intrl;
2870*4882a593Smuzhiyun
2871*4882a593Smuzhiyun intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
2872*4882a593Smuzhiyun
2873*4882a593Smuzhiyun rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs);
2874*4882a593Smuzhiyun tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs);
2875*4882a593Smuzhiyun
2876*4882a593Smuzhiyun if (ec->use_adaptive_rx_coalesce)
2877*4882a593Smuzhiyun rx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2878*4882a593Smuzhiyun else
2879*4882a593Smuzhiyun rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2880*4882a593Smuzhiyun
2881*4882a593Smuzhiyun if (ec->use_adaptive_tx_coalesce)
2882*4882a593Smuzhiyun tx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2883*4882a593Smuzhiyun else
2884*4882a593Smuzhiyun tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2885*4882a593Smuzhiyun
2886*4882a593Smuzhiyun q_vector = rx_ring->q_vector;
2887*4882a593Smuzhiyun q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting);
2888*4882a593Smuzhiyun
2889*4882a593Smuzhiyun q_vector = tx_ring->q_vector;
2890*4882a593Smuzhiyun q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting);
2891*4882a593Smuzhiyun
2892*4882a593Smuzhiyun /* The interrupt handler itself will take care of programming
2893*4882a593Smuzhiyun * the Tx and Rx ITR values based on the values we have entered
2894*4882a593Smuzhiyun * into the q_vector, no need to write the values now.
2895*4882a593Smuzhiyun */
2896*4882a593Smuzhiyun
2897*4882a593Smuzhiyun wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl);
2898*4882a593Smuzhiyun i40e_flush(hw);
2899*4882a593Smuzhiyun }
2900*4882a593Smuzhiyun
2901*4882a593Smuzhiyun /**
2902*4882a593Smuzhiyun * __i40e_set_coalesce - set coalesce settings for particular queue
2903*4882a593Smuzhiyun * @netdev: the netdev to change
2904*4882a593Smuzhiyun * @ec: ethtool coalesce settings
2905*4882a593Smuzhiyun * @queue: the queue to change
2906*4882a593Smuzhiyun *
2907*4882a593Smuzhiyun * Sets the coalesce settings for a particular queue.
2908*4882a593Smuzhiyun **/
__i40e_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec,int queue)2909*4882a593Smuzhiyun static int __i40e_set_coalesce(struct net_device *netdev,
2910*4882a593Smuzhiyun struct ethtool_coalesce *ec,
2911*4882a593Smuzhiyun int queue)
2912*4882a593Smuzhiyun {
2913*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
2914*4882a593Smuzhiyun u16 intrl_reg, cur_rx_itr, cur_tx_itr;
2915*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
2916*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
2917*4882a593Smuzhiyun int i;
2918*4882a593Smuzhiyun
2919*4882a593Smuzhiyun if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
2920*4882a593Smuzhiyun vsi->work_limit = ec->tx_max_coalesced_frames_irq;
2921*4882a593Smuzhiyun
2922*4882a593Smuzhiyun if (queue < 0) {
2923*4882a593Smuzhiyun cur_rx_itr = vsi->rx_rings[0]->itr_setting;
2924*4882a593Smuzhiyun cur_tx_itr = vsi->tx_rings[0]->itr_setting;
2925*4882a593Smuzhiyun } else if (queue < vsi->num_queue_pairs) {
2926*4882a593Smuzhiyun cur_rx_itr = vsi->rx_rings[queue]->itr_setting;
2927*4882a593Smuzhiyun cur_tx_itr = vsi->tx_rings[queue]->itr_setting;
2928*4882a593Smuzhiyun } else {
2929*4882a593Smuzhiyun netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
2930*4882a593Smuzhiyun vsi->num_queue_pairs - 1);
2931*4882a593Smuzhiyun return -EINVAL;
2932*4882a593Smuzhiyun }
2933*4882a593Smuzhiyun
2934*4882a593Smuzhiyun cur_tx_itr &= ~I40E_ITR_DYNAMIC;
2935*4882a593Smuzhiyun cur_rx_itr &= ~I40E_ITR_DYNAMIC;
2936*4882a593Smuzhiyun
2937*4882a593Smuzhiyun /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
2938*4882a593Smuzhiyun if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
2939*4882a593Smuzhiyun netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
2940*4882a593Smuzhiyun return -EINVAL;
2941*4882a593Smuzhiyun }
2942*4882a593Smuzhiyun
2943*4882a593Smuzhiyun if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
2944*4882a593Smuzhiyun netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n",
2945*4882a593Smuzhiyun INTRL_REG_TO_USEC(I40E_MAX_INTRL));
2946*4882a593Smuzhiyun return -EINVAL;
2947*4882a593Smuzhiyun }
2948*4882a593Smuzhiyun
2949*4882a593Smuzhiyun if (ec->rx_coalesce_usecs != cur_rx_itr &&
2950*4882a593Smuzhiyun ec->use_adaptive_rx_coalesce) {
2951*4882a593Smuzhiyun netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n");
2952*4882a593Smuzhiyun return -EINVAL;
2953*4882a593Smuzhiyun }
2954*4882a593Smuzhiyun
2955*4882a593Smuzhiyun if (ec->rx_coalesce_usecs > I40E_MAX_ITR) {
2956*4882a593Smuzhiyun netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
2957*4882a593Smuzhiyun return -EINVAL;
2958*4882a593Smuzhiyun }
2959*4882a593Smuzhiyun
2960*4882a593Smuzhiyun if (ec->tx_coalesce_usecs != cur_tx_itr &&
2961*4882a593Smuzhiyun ec->use_adaptive_tx_coalesce) {
2962*4882a593Smuzhiyun netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n");
2963*4882a593Smuzhiyun return -EINVAL;
2964*4882a593Smuzhiyun }
2965*4882a593Smuzhiyun
2966*4882a593Smuzhiyun if (ec->tx_coalesce_usecs > I40E_MAX_ITR) {
2967*4882a593Smuzhiyun netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
2968*4882a593Smuzhiyun return -EINVAL;
2969*4882a593Smuzhiyun }
2970*4882a593Smuzhiyun
2971*4882a593Smuzhiyun if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
2972*4882a593Smuzhiyun ec->rx_coalesce_usecs = I40E_MIN_ITR;
2973*4882a593Smuzhiyun
2974*4882a593Smuzhiyun if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
2975*4882a593Smuzhiyun ec->tx_coalesce_usecs = I40E_MIN_ITR;
2976*4882a593Smuzhiyun
2977*4882a593Smuzhiyun intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
2978*4882a593Smuzhiyun vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);
2979*4882a593Smuzhiyun if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) {
2980*4882a593Smuzhiyun netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n",
2981*4882a593Smuzhiyun vsi->int_rate_limit);
2982*4882a593Smuzhiyun }
2983*4882a593Smuzhiyun
2984*4882a593Smuzhiyun /* rx and tx usecs has per queue value. If user doesn't specify the
2985*4882a593Smuzhiyun * queue, apply to all queues.
2986*4882a593Smuzhiyun */
2987*4882a593Smuzhiyun if (queue < 0) {
2988*4882a593Smuzhiyun for (i = 0; i < vsi->num_queue_pairs; i++)
2989*4882a593Smuzhiyun i40e_set_itr_per_queue(vsi, ec, i);
2990*4882a593Smuzhiyun } else {
2991*4882a593Smuzhiyun i40e_set_itr_per_queue(vsi, ec, queue);
2992*4882a593Smuzhiyun }
2993*4882a593Smuzhiyun
2994*4882a593Smuzhiyun return 0;
2995*4882a593Smuzhiyun }
2996*4882a593Smuzhiyun
2997*4882a593Smuzhiyun /**
2998*4882a593Smuzhiyun * i40e_set_coalesce - set coalesce settings for every queue on the netdev
2999*4882a593Smuzhiyun * @netdev: the netdev to change
3000*4882a593Smuzhiyun * @ec: ethtool coalesce settings
3001*4882a593Smuzhiyun *
3002*4882a593Smuzhiyun * This will set each queue to the same coalesce settings.
3003*4882a593Smuzhiyun **/
i40e_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec)3004*4882a593Smuzhiyun static int i40e_set_coalesce(struct net_device *netdev,
3005*4882a593Smuzhiyun struct ethtool_coalesce *ec)
3006*4882a593Smuzhiyun {
3007*4882a593Smuzhiyun return __i40e_set_coalesce(netdev, ec, -1);
3008*4882a593Smuzhiyun }
3009*4882a593Smuzhiyun
3010*4882a593Smuzhiyun /**
3011*4882a593Smuzhiyun * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
3012*4882a593Smuzhiyun * @netdev: the netdev to change
3013*4882a593Smuzhiyun * @ec: ethtool's coalesce settings
3014*4882a593Smuzhiyun * @queue: the queue to change
3015*4882a593Smuzhiyun *
3016*4882a593Smuzhiyun * Sets the specified queue's coalesce settings.
3017*4882a593Smuzhiyun **/
i40e_set_per_queue_coalesce(struct net_device * netdev,u32 queue,struct ethtool_coalesce * ec)3018*4882a593Smuzhiyun static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
3019*4882a593Smuzhiyun struct ethtool_coalesce *ec)
3020*4882a593Smuzhiyun {
3021*4882a593Smuzhiyun return __i40e_set_coalesce(netdev, ec, queue);
3022*4882a593Smuzhiyun }
3023*4882a593Smuzhiyun
3024*4882a593Smuzhiyun /**
3025*4882a593Smuzhiyun * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
3026*4882a593Smuzhiyun * @pf: pointer to the physical function struct
3027*4882a593Smuzhiyun * @cmd: ethtool rxnfc command
3028*4882a593Smuzhiyun *
3029*4882a593Smuzhiyun * Returns Success if the flow is supported, else Invalid Input.
3030*4882a593Smuzhiyun **/
i40e_get_rss_hash_opts(struct i40e_pf * pf,struct ethtool_rxnfc * cmd)3031*4882a593Smuzhiyun static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
3032*4882a593Smuzhiyun {
3033*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
3034*4882a593Smuzhiyun u8 flow_pctype = 0;
3035*4882a593Smuzhiyun u64 i_set = 0;
3036*4882a593Smuzhiyun
3037*4882a593Smuzhiyun cmd->data = 0;
3038*4882a593Smuzhiyun
3039*4882a593Smuzhiyun switch (cmd->flow_type) {
3040*4882a593Smuzhiyun case TCP_V4_FLOW:
3041*4882a593Smuzhiyun flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3042*4882a593Smuzhiyun break;
3043*4882a593Smuzhiyun case UDP_V4_FLOW:
3044*4882a593Smuzhiyun flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3045*4882a593Smuzhiyun break;
3046*4882a593Smuzhiyun case TCP_V6_FLOW:
3047*4882a593Smuzhiyun flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
3048*4882a593Smuzhiyun break;
3049*4882a593Smuzhiyun case UDP_V6_FLOW:
3050*4882a593Smuzhiyun flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
3051*4882a593Smuzhiyun break;
3052*4882a593Smuzhiyun case SCTP_V4_FLOW:
3053*4882a593Smuzhiyun case AH_ESP_V4_FLOW:
3054*4882a593Smuzhiyun case AH_V4_FLOW:
3055*4882a593Smuzhiyun case ESP_V4_FLOW:
3056*4882a593Smuzhiyun case IPV4_FLOW:
3057*4882a593Smuzhiyun case SCTP_V6_FLOW:
3058*4882a593Smuzhiyun case AH_ESP_V6_FLOW:
3059*4882a593Smuzhiyun case AH_V6_FLOW:
3060*4882a593Smuzhiyun case ESP_V6_FLOW:
3061*4882a593Smuzhiyun case IPV6_FLOW:
3062*4882a593Smuzhiyun /* Default is src/dest for IP, no matter the L4 hashing */
3063*4882a593Smuzhiyun cmd->data |= RXH_IP_SRC | RXH_IP_DST;
3064*4882a593Smuzhiyun break;
3065*4882a593Smuzhiyun default:
3066*4882a593Smuzhiyun return -EINVAL;
3067*4882a593Smuzhiyun }
3068*4882a593Smuzhiyun
3069*4882a593Smuzhiyun /* Read flow based hash input set register */
3070*4882a593Smuzhiyun if (flow_pctype) {
3071*4882a593Smuzhiyun i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
3072*4882a593Smuzhiyun flow_pctype)) |
3073*4882a593Smuzhiyun ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
3074*4882a593Smuzhiyun flow_pctype)) << 32);
3075*4882a593Smuzhiyun }
3076*4882a593Smuzhiyun
3077*4882a593Smuzhiyun /* Process bits of hash input set */
3078*4882a593Smuzhiyun if (i_set) {
3079*4882a593Smuzhiyun if (i_set & I40E_L4_SRC_MASK)
3080*4882a593Smuzhiyun cmd->data |= RXH_L4_B_0_1;
3081*4882a593Smuzhiyun if (i_set & I40E_L4_DST_MASK)
3082*4882a593Smuzhiyun cmd->data |= RXH_L4_B_2_3;
3083*4882a593Smuzhiyun
3084*4882a593Smuzhiyun if (cmd->flow_type == TCP_V4_FLOW ||
3085*4882a593Smuzhiyun cmd->flow_type == UDP_V4_FLOW) {
3086*4882a593Smuzhiyun if (hw->mac.type == I40E_MAC_X722) {
3087*4882a593Smuzhiyun if (i_set & I40E_X722_L3_SRC_MASK)
3088*4882a593Smuzhiyun cmd->data |= RXH_IP_SRC;
3089*4882a593Smuzhiyun if (i_set & I40E_X722_L3_DST_MASK)
3090*4882a593Smuzhiyun cmd->data |= RXH_IP_DST;
3091*4882a593Smuzhiyun } else {
3092*4882a593Smuzhiyun if (i_set & I40E_L3_SRC_MASK)
3093*4882a593Smuzhiyun cmd->data |= RXH_IP_SRC;
3094*4882a593Smuzhiyun if (i_set & I40E_L3_DST_MASK)
3095*4882a593Smuzhiyun cmd->data |= RXH_IP_DST;
3096*4882a593Smuzhiyun }
3097*4882a593Smuzhiyun } else if (cmd->flow_type == TCP_V6_FLOW ||
3098*4882a593Smuzhiyun cmd->flow_type == UDP_V6_FLOW) {
3099*4882a593Smuzhiyun if (i_set & I40E_L3_V6_SRC_MASK)
3100*4882a593Smuzhiyun cmd->data |= RXH_IP_SRC;
3101*4882a593Smuzhiyun if (i_set & I40E_L3_V6_DST_MASK)
3102*4882a593Smuzhiyun cmd->data |= RXH_IP_DST;
3103*4882a593Smuzhiyun }
3104*4882a593Smuzhiyun }
3105*4882a593Smuzhiyun
3106*4882a593Smuzhiyun return 0;
3107*4882a593Smuzhiyun }
3108*4882a593Smuzhiyun
3109*4882a593Smuzhiyun /**
3110*4882a593Smuzhiyun * i40e_check_mask - Check whether a mask field is set
3111*4882a593Smuzhiyun * @mask: the full mask value
3112*4882a593Smuzhiyun * @field: mask of the field to check
3113*4882a593Smuzhiyun *
3114*4882a593Smuzhiyun * If the given mask is fully set, return positive value. If the mask for the
3115*4882a593Smuzhiyun * field is fully unset, return zero. Otherwise return a negative error code.
3116*4882a593Smuzhiyun **/
i40e_check_mask(u64 mask,u64 field)3117*4882a593Smuzhiyun static int i40e_check_mask(u64 mask, u64 field)
3118*4882a593Smuzhiyun {
3119*4882a593Smuzhiyun u64 value = mask & field;
3120*4882a593Smuzhiyun
3121*4882a593Smuzhiyun if (value == field)
3122*4882a593Smuzhiyun return 1;
3123*4882a593Smuzhiyun else if (!value)
3124*4882a593Smuzhiyun return 0;
3125*4882a593Smuzhiyun else
3126*4882a593Smuzhiyun return -1;
3127*4882a593Smuzhiyun }
3128*4882a593Smuzhiyun
3129*4882a593Smuzhiyun /**
3130*4882a593Smuzhiyun * i40e_parse_rx_flow_user_data - Deconstruct user-defined data
3131*4882a593Smuzhiyun * @fsp: pointer to rx flow specification
3132*4882a593Smuzhiyun * @data: pointer to userdef data structure for storage
3133*4882a593Smuzhiyun *
3134*4882a593Smuzhiyun * Read the user-defined data and deconstruct the value into a structure. No
3135*4882a593Smuzhiyun * other code should read the user-defined data, so as to ensure that every
3136*4882a593Smuzhiyun * place consistently reads the value correctly.
3137*4882a593Smuzhiyun *
3138*4882a593Smuzhiyun * The user-defined field is a 64bit Big Endian format value, which we
3139*4882a593Smuzhiyun * deconstruct by reading bits or bit fields from it. Single bit flags shall
3140*4882a593Smuzhiyun * be defined starting from the highest bits, while small bit field values
3141*4882a593Smuzhiyun * shall be defined starting from the lowest bits.
3142*4882a593Smuzhiyun *
3143*4882a593Smuzhiyun * Returns 0 if the data is valid, and non-zero if the userdef data is invalid
3144*4882a593Smuzhiyun * and the filter should be rejected. The data structure will always be
3145*4882a593Smuzhiyun * modified even if FLOW_EXT is not set.
3146*4882a593Smuzhiyun *
3147*4882a593Smuzhiyun **/
i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec * fsp,struct i40e_rx_flow_userdef * data)3148*4882a593Smuzhiyun static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
3149*4882a593Smuzhiyun struct i40e_rx_flow_userdef *data)
3150*4882a593Smuzhiyun {
3151*4882a593Smuzhiyun u64 value, mask;
3152*4882a593Smuzhiyun int valid;
3153*4882a593Smuzhiyun
3154*4882a593Smuzhiyun /* Zero memory first so it's always consistent. */
3155*4882a593Smuzhiyun memset(data, 0, sizeof(*data));
3156*4882a593Smuzhiyun
3157*4882a593Smuzhiyun if (!(fsp->flow_type & FLOW_EXT))
3158*4882a593Smuzhiyun return 0;
3159*4882a593Smuzhiyun
3160*4882a593Smuzhiyun value = be64_to_cpu(*((__be64 *)fsp->h_ext.data));
3161*4882a593Smuzhiyun mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data));
3162*4882a593Smuzhiyun
3163*4882a593Smuzhiyun #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0)
3164*4882a593Smuzhiyun #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16)
3165*4882a593Smuzhiyun #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0)
3166*4882a593Smuzhiyun
3167*4882a593Smuzhiyun valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER);
3168*4882a593Smuzhiyun if (valid < 0) {
3169*4882a593Smuzhiyun return -EINVAL;
3170*4882a593Smuzhiyun } else if (valid) {
3171*4882a593Smuzhiyun data->flex_word = value & I40E_USERDEF_FLEX_WORD;
3172*4882a593Smuzhiyun data->flex_offset =
3173*4882a593Smuzhiyun (value & I40E_USERDEF_FLEX_OFFSET) >> 16;
3174*4882a593Smuzhiyun data->flex_filter = true;
3175*4882a593Smuzhiyun }
3176*4882a593Smuzhiyun
3177*4882a593Smuzhiyun return 0;
3178*4882a593Smuzhiyun }
3179*4882a593Smuzhiyun
3180*4882a593Smuzhiyun /**
3181*4882a593Smuzhiyun * i40e_fill_rx_flow_user_data - Fill in user-defined data field
3182*4882a593Smuzhiyun * @fsp: pointer to rx_flow specification
3183*4882a593Smuzhiyun * @data: pointer to return userdef data
3184*4882a593Smuzhiyun *
3185*4882a593Smuzhiyun * Reads the userdef data structure and properly fills in the user defined
3186*4882a593Smuzhiyun * fields of the rx_flow_spec.
3187*4882a593Smuzhiyun **/
i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec * fsp,struct i40e_rx_flow_userdef * data)3188*4882a593Smuzhiyun static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
3189*4882a593Smuzhiyun struct i40e_rx_flow_userdef *data)
3190*4882a593Smuzhiyun {
3191*4882a593Smuzhiyun u64 value = 0, mask = 0;
3192*4882a593Smuzhiyun
3193*4882a593Smuzhiyun if (data->flex_filter) {
3194*4882a593Smuzhiyun value |= data->flex_word;
3195*4882a593Smuzhiyun value |= (u64)data->flex_offset << 16;
3196*4882a593Smuzhiyun mask |= I40E_USERDEF_FLEX_FILTER;
3197*4882a593Smuzhiyun }
3198*4882a593Smuzhiyun
3199*4882a593Smuzhiyun if (value || mask)
3200*4882a593Smuzhiyun fsp->flow_type |= FLOW_EXT;
3201*4882a593Smuzhiyun
3202*4882a593Smuzhiyun *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value);
3203*4882a593Smuzhiyun *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask);
3204*4882a593Smuzhiyun }
3205*4882a593Smuzhiyun
3206*4882a593Smuzhiyun /**
3207*4882a593Smuzhiyun * i40e_get_ethtool_fdir_all - Populates the rule count of a command
3208*4882a593Smuzhiyun * @pf: Pointer to the physical function struct
3209*4882a593Smuzhiyun * @cmd: The command to get or set Rx flow classification rules
3210*4882a593Smuzhiyun * @rule_locs: Array of used rule locations
3211*4882a593Smuzhiyun *
3212*4882a593Smuzhiyun * This function populates both the total and actual rule count of
3213*4882a593Smuzhiyun * the ethtool flow classification command
3214*4882a593Smuzhiyun *
3215*4882a593Smuzhiyun * Returns 0 on success or -EMSGSIZE if entry not found
3216*4882a593Smuzhiyun **/
i40e_get_ethtool_fdir_all(struct i40e_pf * pf,struct ethtool_rxnfc * cmd,u32 * rule_locs)3217*4882a593Smuzhiyun static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
3218*4882a593Smuzhiyun struct ethtool_rxnfc *cmd,
3219*4882a593Smuzhiyun u32 *rule_locs)
3220*4882a593Smuzhiyun {
3221*4882a593Smuzhiyun struct i40e_fdir_filter *rule;
3222*4882a593Smuzhiyun struct hlist_node *node2;
3223*4882a593Smuzhiyun int cnt = 0;
3224*4882a593Smuzhiyun
3225*4882a593Smuzhiyun /* report total rule count */
3226*4882a593Smuzhiyun cmd->data = i40e_get_fd_cnt_all(pf);
3227*4882a593Smuzhiyun
3228*4882a593Smuzhiyun hlist_for_each_entry_safe(rule, node2,
3229*4882a593Smuzhiyun &pf->fdir_filter_list, fdir_node) {
3230*4882a593Smuzhiyun if (cnt == cmd->rule_cnt)
3231*4882a593Smuzhiyun return -EMSGSIZE;
3232*4882a593Smuzhiyun
3233*4882a593Smuzhiyun rule_locs[cnt] = rule->fd_id;
3234*4882a593Smuzhiyun cnt++;
3235*4882a593Smuzhiyun }
3236*4882a593Smuzhiyun
3237*4882a593Smuzhiyun cmd->rule_cnt = cnt;
3238*4882a593Smuzhiyun
3239*4882a593Smuzhiyun return 0;
3240*4882a593Smuzhiyun }
3241*4882a593Smuzhiyun
3242*4882a593Smuzhiyun /**
3243*4882a593Smuzhiyun * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
3244*4882a593Smuzhiyun * @pf: Pointer to the physical function struct
3245*4882a593Smuzhiyun * @cmd: The command to get or set Rx flow classification rules
3246*4882a593Smuzhiyun *
3247*4882a593Smuzhiyun * This function looks up a filter based on the Rx flow classification
3248*4882a593Smuzhiyun * command and fills the flow spec info for it if found
3249*4882a593Smuzhiyun *
3250*4882a593Smuzhiyun * Returns 0 on success or -EINVAL if filter not found
3251*4882a593Smuzhiyun **/
i40e_get_ethtool_fdir_entry(struct i40e_pf * pf,struct ethtool_rxnfc * cmd)3252*4882a593Smuzhiyun static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
3253*4882a593Smuzhiyun struct ethtool_rxnfc *cmd)
3254*4882a593Smuzhiyun {
3255*4882a593Smuzhiyun struct ethtool_rx_flow_spec *fsp =
3256*4882a593Smuzhiyun (struct ethtool_rx_flow_spec *)&cmd->fs;
3257*4882a593Smuzhiyun struct i40e_rx_flow_userdef userdef = {0};
3258*4882a593Smuzhiyun struct i40e_fdir_filter *rule = NULL;
3259*4882a593Smuzhiyun struct hlist_node *node2;
3260*4882a593Smuzhiyun u64 input_set;
3261*4882a593Smuzhiyun u16 index;
3262*4882a593Smuzhiyun
3263*4882a593Smuzhiyun hlist_for_each_entry_safe(rule, node2,
3264*4882a593Smuzhiyun &pf->fdir_filter_list, fdir_node) {
3265*4882a593Smuzhiyun if (fsp->location <= rule->fd_id)
3266*4882a593Smuzhiyun break;
3267*4882a593Smuzhiyun }
3268*4882a593Smuzhiyun
3269*4882a593Smuzhiyun if (!rule || fsp->location != rule->fd_id)
3270*4882a593Smuzhiyun return -EINVAL;
3271*4882a593Smuzhiyun
3272*4882a593Smuzhiyun fsp->flow_type = rule->flow_type;
3273*4882a593Smuzhiyun if (fsp->flow_type == IP_USER_FLOW) {
3274*4882a593Smuzhiyun fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
3275*4882a593Smuzhiyun fsp->h_u.usr_ip4_spec.proto = 0;
3276*4882a593Smuzhiyun fsp->m_u.usr_ip4_spec.proto = 0;
3277*4882a593Smuzhiyun }
3278*4882a593Smuzhiyun
3279*4882a593Smuzhiyun /* Reverse the src and dest notion, since the HW views them from
3280*4882a593Smuzhiyun * Tx perspective where as the user expects it from Rx filter view.
3281*4882a593Smuzhiyun */
3282*4882a593Smuzhiyun fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
3283*4882a593Smuzhiyun fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
3284*4882a593Smuzhiyun fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip;
3285*4882a593Smuzhiyun fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip;
3286*4882a593Smuzhiyun
3287*4882a593Smuzhiyun switch (rule->flow_type) {
3288*4882a593Smuzhiyun case SCTP_V4_FLOW:
3289*4882a593Smuzhiyun index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
3290*4882a593Smuzhiyun break;
3291*4882a593Smuzhiyun case TCP_V4_FLOW:
3292*4882a593Smuzhiyun index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3293*4882a593Smuzhiyun break;
3294*4882a593Smuzhiyun case UDP_V4_FLOW:
3295*4882a593Smuzhiyun index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3296*4882a593Smuzhiyun break;
3297*4882a593Smuzhiyun case IP_USER_FLOW:
3298*4882a593Smuzhiyun index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
3299*4882a593Smuzhiyun break;
3300*4882a593Smuzhiyun default:
3301*4882a593Smuzhiyun /* If we have stored a filter with a flow type not listed here
3302*4882a593Smuzhiyun * it is almost certainly a driver bug. WARN(), and then
3303*4882a593Smuzhiyun * assign the input_set as if all fields are enabled to avoid
3304*4882a593Smuzhiyun * reading unassigned memory.
3305*4882a593Smuzhiyun */
3306*4882a593Smuzhiyun WARN(1, "Missing input set index for flow_type %d\n",
3307*4882a593Smuzhiyun rule->flow_type);
3308*4882a593Smuzhiyun input_set = 0xFFFFFFFFFFFFFFFFULL;
3309*4882a593Smuzhiyun goto no_input_set;
3310*4882a593Smuzhiyun }
3311*4882a593Smuzhiyun
3312*4882a593Smuzhiyun input_set = i40e_read_fd_input_set(pf, index);
3313*4882a593Smuzhiyun
3314*4882a593Smuzhiyun no_input_set:
3315*4882a593Smuzhiyun if (input_set & I40E_L3_SRC_MASK)
3316*4882a593Smuzhiyun fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF);
3317*4882a593Smuzhiyun
3318*4882a593Smuzhiyun if (input_set & I40E_L3_DST_MASK)
3319*4882a593Smuzhiyun fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF);
3320*4882a593Smuzhiyun
3321*4882a593Smuzhiyun if (input_set & I40E_L4_SRC_MASK)
3322*4882a593Smuzhiyun fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF);
3323*4882a593Smuzhiyun
3324*4882a593Smuzhiyun if (input_set & I40E_L4_DST_MASK)
3325*4882a593Smuzhiyun fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF);
3326*4882a593Smuzhiyun
3327*4882a593Smuzhiyun if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
3328*4882a593Smuzhiyun fsp->ring_cookie = RX_CLS_FLOW_DISC;
3329*4882a593Smuzhiyun else
3330*4882a593Smuzhiyun fsp->ring_cookie = rule->q_index;
3331*4882a593Smuzhiyun
3332*4882a593Smuzhiyun if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) {
3333*4882a593Smuzhiyun struct i40e_vsi *vsi;
3334*4882a593Smuzhiyun
3335*4882a593Smuzhiyun vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
3336*4882a593Smuzhiyun if (vsi && vsi->type == I40E_VSI_SRIOV) {
3337*4882a593Smuzhiyun /* VFs are zero-indexed by the driver, but ethtool
3338*4882a593Smuzhiyun * expects them to be one-indexed, so add one here
3339*4882a593Smuzhiyun */
3340*4882a593Smuzhiyun u64 ring_vf = vsi->vf_id + 1;
3341*4882a593Smuzhiyun
3342*4882a593Smuzhiyun ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
3343*4882a593Smuzhiyun fsp->ring_cookie |= ring_vf;
3344*4882a593Smuzhiyun }
3345*4882a593Smuzhiyun }
3346*4882a593Smuzhiyun
3347*4882a593Smuzhiyun if (rule->flex_filter) {
3348*4882a593Smuzhiyun userdef.flex_filter = true;
3349*4882a593Smuzhiyun userdef.flex_word = be16_to_cpu(rule->flex_word);
3350*4882a593Smuzhiyun userdef.flex_offset = rule->flex_offset;
3351*4882a593Smuzhiyun }
3352*4882a593Smuzhiyun
3353*4882a593Smuzhiyun i40e_fill_rx_flow_user_data(fsp, &userdef);
3354*4882a593Smuzhiyun
3355*4882a593Smuzhiyun return 0;
3356*4882a593Smuzhiyun }
3357*4882a593Smuzhiyun
3358*4882a593Smuzhiyun /**
3359*4882a593Smuzhiyun * i40e_get_rxnfc - command to get RX flow classification rules
3360*4882a593Smuzhiyun * @netdev: network interface device structure
3361*4882a593Smuzhiyun * @cmd: ethtool rxnfc command
3362*4882a593Smuzhiyun * @rule_locs: pointer to store rule data
3363*4882a593Smuzhiyun *
3364*4882a593Smuzhiyun * Returns Success if the command is supported.
3365*4882a593Smuzhiyun **/
i40e_get_rxnfc(struct net_device * netdev,struct ethtool_rxnfc * cmd,u32 * rule_locs)3366*4882a593Smuzhiyun static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
3367*4882a593Smuzhiyun u32 *rule_locs)
3368*4882a593Smuzhiyun {
3369*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
3370*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
3371*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
3372*4882a593Smuzhiyun int ret = -EOPNOTSUPP;
3373*4882a593Smuzhiyun
3374*4882a593Smuzhiyun switch (cmd->cmd) {
3375*4882a593Smuzhiyun case ETHTOOL_GRXRINGS:
3376*4882a593Smuzhiyun cmd->data = vsi->rss_size;
3377*4882a593Smuzhiyun ret = 0;
3378*4882a593Smuzhiyun break;
3379*4882a593Smuzhiyun case ETHTOOL_GRXFH:
3380*4882a593Smuzhiyun ret = i40e_get_rss_hash_opts(pf, cmd);
3381*4882a593Smuzhiyun break;
3382*4882a593Smuzhiyun case ETHTOOL_GRXCLSRLCNT:
3383*4882a593Smuzhiyun cmd->rule_cnt = pf->fdir_pf_active_filters;
3384*4882a593Smuzhiyun /* report total rule count */
3385*4882a593Smuzhiyun cmd->data = i40e_get_fd_cnt_all(pf);
3386*4882a593Smuzhiyun ret = 0;
3387*4882a593Smuzhiyun break;
3388*4882a593Smuzhiyun case ETHTOOL_GRXCLSRULE:
3389*4882a593Smuzhiyun ret = i40e_get_ethtool_fdir_entry(pf, cmd);
3390*4882a593Smuzhiyun break;
3391*4882a593Smuzhiyun case ETHTOOL_GRXCLSRLALL:
3392*4882a593Smuzhiyun ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
3393*4882a593Smuzhiyun break;
3394*4882a593Smuzhiyun default:
3395*4882a593Smuzhiyun break;
3396*4882a593Smuzhiyun }
3397*4882a593Smuzhiyun
3398*4882a593Smuzhiyun return ret;
3399*4882a593Smuzhiyun }
3400*4882a593Smuzhiyun
3401*4882a593Smuzhiyun /**
3402*4882a593Smuzhiyun * i40e_get_rss_hash_bits - Read RSS Hash bits from register
3403*4882a593Smuzhiyun * @hw: hw structure
3404*4882a593Smuzhiyun * @nfc: pointer to user request
3405*4882a593Smuzhiyun * @i_setc: bits currently set
3406*4882a593Smuzhiyun *
3407*4882a593Smuzhiyun * Returns value of bits to be set per user request
3408*4882a593Smuzhiyun **/
i40e_get_rss_hash_bits(struct i40e_hw * hw,struct ethtool_rxnfc * nfc,u64 i_setc)3409*4882a593Smuzhiyun static u64 i40e_get_rss_hash_bits(struct i40e_hw *hw,
3410*4882a593Smuzhiyun struct ethtool_rxnfc *nfc,
3411*4882a593Smuzhiyun u64 i_setc)
3412*4882a593Smuzhiyun {
3413*4882a593Smuzhiyun u64 i_set = i_setc;
3414*4882a593Smuzhiyun u64 src_l3 = 0, dst_l3 = 0;
3415*4882a593Smuzhiyun
3416*4882a593Smuzhiyun if (nfc->data & RXH_L4_B_0_1)
3417*4882a593Smuzhiyun i_set |= I40E_L4_SRC_MASK;
3418*4882a593Smuzhiyun else
3419*4882a593Smuzhiyun i_set &= ~I40E_L4_SRC_MASK;
3420*4882a593Smuzhiyun if (nfc->data & RXH_L4_B_2_3)
3421*4882a593Smuzhiyun i_set |= I40E_L4_DST_MASK;
3422*4882a593Smuzhiyun else
3423*4882a593Smuzhiyun i_set &= ~I40E_L4_DST_MASK;
3424*4882a593Smuzhiyun
3425*4882a593Smuzhiyun if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
3426*4882a593Smuzhiyun src_l3 = I40E_L3_V6_SRC_MASK;
3427*4882a593Smuzhiyun dst_l3 = I40E_L3_V6_DST_MASK;
3428*4882a593Smuzhiyun } else if (nfc->flow_type == TCP_V4_FLOW ||
3429*4882a593Smuzhiyun nfc->flow_type == UDP_V4_FLOW) {
3430*4882a593Smuzhiyun if (hw->mac.type == I40E_MAC_X722) {
3431*4882a593Smuzhiyun src_l3 = I40E_X722_L3_SRC_MASK;
3432*4882a593Smuzhiyun dst_l3 = I40E_X722_L3_DST_MASK;
3433*4882a593Smuzhiyun } else {
3434*4882a593Smuzhiyun src_l3 = I40E_L3_SRC_MASK;
3435*4882a593Smuzhiyun dst_l3 = I40E_L3_DST_MASK;
3436*4882a593Smuzhiyun }
3437*4882a593Smuzhiyun } else {
3438*4882a593Smuzhiyun /* Any other flow type are not supported here */
3439*4882a593Smuzhiyun return i_set;
3440*4882a593Smuzhiyun }
3441*4882a593Smuzhiyun
3442*4882a593Smuzhiyun if (nfc->data & RXH_IP_SRC)
3443*4882a593Smuzhiyun i_set |= src_l3;
3444*4882a593Smuzhiyun else
3445*4882a593Smuzhiyun i_set &= ~src_l3;
3446*4882a593Smuzhiyun if (nfc->data & RXH_IP_DST)
3447*4882a593Smuzhiyun i_set |= dst_l3;
3448*4882a593Smuzhiyun else
3449*4882a593Smuzhiyun i_set &= ~dst_l3;
3450*4882a593Smuzhiyun
3451*4882a593Smuzhiyun return i_set;
3452*4882a593Smuzhiyun }
3453*4882a593Smuzhiyun
3454*4882a593Smuzhiyun #define FLOW_PCTYPES_SIZE 64
3455*4882a593Smuzhiyun /**
3456*4882a593Smuzhiyun * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
3457*4882a593Smuzhiyun * @pf: pointer to the physical function struct
3458*4882a593Smuzhiyun * @nfc: ethtool rxnfc command
3459*4882a593Smuzhiyun *
3460*4882a593Smuzhiyun * Returns Success if the flow input set is supported.
3461*4882a593Smuzhiyun **/
i40e_set_rss_hash_opt(struct i40e_pf * pf,struct ethtool_rxnfc * nfc)3462*4882a593Smuzhiyun static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
3463*4882a593Smuzhiyun {
3464*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
3465*4882a593Smuzhiyun u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
3466*4882a593Smuzhiyun ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
3467*4882a593Smuzhiyun DECLARE_BITMAP(flow_pctypes, FLOW_PCTYPES_SIZE);
3468*4882a593Smuzhiyun u64 i_set, i_setc;
3469*4882a593Smuzhiyun
3470*4882a593Smuzhiyun bitmap_zero(flow_pctypes, FLOW_PCTYPES_SIZE);
3471*4882a593Smuzhiyun
3472*4882a593Smuzhiyun if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3473*4882a593Smuzhiyun dev_err(&pf->pdev->dev,
3474*4882a593Smuzhiyun "Change of RSS hash input set is not supported when MFP mode is enabled\n");
3475*4882a593Smuzhiyun return -EOPNOTSUPP;
3476*4882a593Smuzhiyun }
3477*4882a593Smuzhiyun
3478*4882a593Smuzhiyun /* RSS does not support anything other than hashing
3479*4882a593Smuzhiyun * to queues on src and dst IPs and ports
3480*4882a593Smuzhiyun */
3481*4882a593Smuzhiyun if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
3482*4882a593Smuzhiyun RXH_L4_B_0_1 | RXH_L4_B_2_3))
3483*4882a593Smuzhiyun return -EINVAL;
3484*4882a593Smuzhiyun
3485*4882a593Smuzhiyun switch (nfc->flow_type) {
3486*4882a593Smuzhiyun case TCP_V4_FLOW:
3487*4882a593Smuzhiyun set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, flow_pctypes);
3488*4882a593Smuzhiyun if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
3489*4882a593Smuzhiyun set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK,
3490*4882a593Smuzhiyun flow_pctypes);
3491*4882a593Smuzhiyun break;
3492*4882a593Smuzhiyun case TCP_V6_FLOW:
3493*4882a593Smuzhiyun set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, flow_pctypes);
3494*4882a593Smuzhiyun if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
3495*4882a593Smuzhiyun set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK,
3496*4882a593Smuzhiyun flow_pctypes);
3497*4882a593Smuzhiyun break;
3498*4882a593Smuzhiyun case UDP_V4_FLOW:
3499*4882a593Smuzhiyun set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, flow_pctypes);
3500*4882a593Smuzhiyun if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
3501*4882a593Smuzhiyun set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP,
3502*4882a593Smuzhiyun flow_pctypes);
3503*4882a593Smuzhiyun set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP,
3504*4882a593Smuzhiyun flow_pctypes);
3505*4882a593Smuzhiyun }
3506*4882a593Smuzhiyun hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
3507*4882a593Smuzhiyun break;
3508*4882a593Smuzhiyun case UDP_V6_FLOW:
3509*4882a593Smuzhiyun set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, flow_pctypes);
3510*4882a593Smuzhiyun if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
3511*4882a593Smuzhiyun set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP,
3512*4882a593Smuzhiyun flow_pctypes);
3513*4882a593Smuzhiyun set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP,
3514*4882a593Smuzhiyun flow_pctypes);
3515*4882a593Smuzhiyun }
3516*4882a593Smuzhiyun hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
3517*4882a593Smuzhiyun break;
3518*4882a593Smuzhiyun case AH_ESP_V4_FLOW:
3519*4882a593Smuzhiyun case AH_V4_FLOW:
3520*4882a593Smuzhiyun case ESP_V4_FLOW:
3521*4882a593Smuzhiyun case SCTP_V4_FLOW:
3522*4882a593Smuzhiyun if ((nfc->data & RXH_L4_B_0_1) ||
3523*4882a593Smuzhiyun (nfc->data & RXH_L4_B_2_3))
3524*4882a593Smuzhiyun return -EINVAL;
3525*4882a593Smuzhiyun hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
3526*4882a593Smuzhiyun break;
3527*4882a593Smuzhiyun case AH_ESP_V6_FLOW:
3528*4882a593Smuzhiyun case AH_V6_FLOW:
3529*4882a593Smuzhiyun case ESP_V6_FLOW:
3530*4882a593Smuzhiyun case SCTP_V6_FLOW:
3531*4882a593Smuzhiyun if ((nfc->data & RXH_L4_B_0_1) ||
3532*4882a593Smuzhiyun (nfc->data & RXH_L4_B_2_3))
3533*4882a593Smuzhiyun return -EINVAL;
3534*4882a593Smuzhiyun hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
3535*4882a593Smuzhiyun break;
3536*4882a593Smuzhiyun case IPV4_FLOW:
3537*4882a593Smuzhiyun hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
3538*4882a593Smuzhiyun BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
3539*4882a593Smuzhiyun break;
3540*4882a593Smuzhiyun case IPV6_FLOW:
3541*4882a593Smuzhiyun hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
3542*4882a593Smuzhiyun BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
3543*4882a593Smuzhiyun break;
3544*4882a593Smuzhiyun default:
3545*4882a593Smuzhiyun return -EINVAL;
3546*4882a593Smuzhiyun }
3547*4882a593Smuzhiyun
3548*4882a593Smuzhiyun if (bitmap_weight(flow_pctypes, FLOW_PCTYPES_SIZE)) {
3549*4882a593Smuzhiyun u8 flow_id;
3550*4882a593Smuzhiyun
3551*4882a593Smuzhiyun for_each_set_bit(flow_id, flow_pctypes, FLOW_PCTYPES_SIZE) {
3552*4882a593Smuzhiyun i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id)) |
3553*4882a593Smuzhiyun ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id)) << 32);
3554*4882a593Smuzhiyun i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc);
3555*4882a593Smuzhiyun
3556*4882a593Smuzhiyun i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id),
3557*4882a593Smuzhiyun (u32)i_set);
3558*4882a593Smuzhiyun i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id),
3559*4882a593Smuzhiyun (u32)(i_set >> 32));
3560*4882a593Smuzhiyun hena |= BIT_ULL(flow_id);
3561*4882a593Smuzhiyun }
3562*4882a593Smuzhiyun }
3563*4882a593Smuzhiyun
3564*4882a593Smuzhiyun i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
3565*4882a593Smuzhiyun i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
3566*4882a593Smuzhiyun i40e_flush(hw);
3567*4882a593Smuzhiyun
3568*4882a593Smuzhiyun return 0;
3569*4882a593Smuzhiyun }
3570*4882a593Smuzhiyun
3571*4882a593Smuzhiyun /**
3572*4882a593Smuzhiyun * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
3573*4882a593Smuzhiyun * @vsi: Pointer to the targeted VSI
3574*4882a593Smuzhiyun * @input: The filter to update or NULL to indicate deletion
3575*4882a593Smuzhiyun * @sw_idx: Software index to the filter
3576*4882a593Smuzhiyun * @cmd: The command to get or set Rx flow classification rules
3577*4882a593Smuzhiyun *
3578*4882a593Smuzhiyun * This function updates (or deletes) a Flow Director entry from
3579*4882a593Smuzhiyun * the hlist of the corresponding PF
3580*4882a593Smuzhiyun *
3581*4882a593Smuzhiyun * Returns 0 on success
3582*4882a593Smuzhiyun **/
i40e_update_ethtool_fdir_entry(struct i40e_vsi * vsi,struct i40e_fdir_filter * input,u16 sw_idx,struct ethtool_rxnfc * cmd)3583*4882a593Smuzhiyun static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
3584*4882a593Smuzhiyun struct i40e_fdir_filter *input,
3585*4882a593Smuzhiyun u16 sw_idx,
3586*4882a593Smuzhiyun struct ethtool_rxnfc *cmd)
3587*4882a593Smuzhiyun {
3588*4882a593Smuzhiyun struct i40e_fdir_filter *rule, *parent;
3589*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
3590*4882a593Smuzhiyun struct hlist_node *node2;
3591*4882a593Smuzhiyun int err = -EINVAL;
3592*4882a593Smuzhiyun
3593*4882a593Smuzhiyun parent = NULL;
3594*4882a593Smuzhiyun rule = NULL;
3595*4882a593Smuzhiyun
3596*4882a593Smuzhiyun hlist_for_each_entry_safe(rule, node2,
3597*4882a593Smuzhiyun &pf->fdir_filter_list, fdir_node) {
3598*4882a593Smuzhiyun /* hash found, or no matching entry */
3599*4882a593Smuzhiyun if (rule->fd_id >= sw_idx)
3600*4882a593Smuzhiyun break;
3601*4882a593Smuzhiyun parent = rule;
3602*4882a593Smuzhiyun }
3603*4882a593Smuzhiyun
3604*4882a593Smuzhiyun /* if there is an old rule occupying our place remove it */
3605*4882a593Smuzhiyun if (rule && (rule->fd_id == sw_idx)) {
3606*4882a593Smuzhiyun /* Remove this rule, since we're either deleting it, or
3607*4882a593Smuzhiyun * replacing it.
3608*4882a593Smuzhiyun */
3609*4882a593Smuzhiyun err = i40e_add_del_fdir(vsi, rule, false);
3610*4882a593Smuzhiyun hlist_del(&rule->fdir_node);
3611*4882a593Smuzhiyun kfree(rule);
3612*4882a593Smuzhiyun pf->fdir_pf_active_filters--;
3613*4882a593Smuzhiyun }
3614*4882a593Smuzhiyun
3615*4882a593Smuzhiyun /* If we weren't given an input, this is a delete, so just return the
3616*4882a593Smuzhiyun * error code indicating if there was an entry at the requested slot
3617*4882a593Smuzhiyun */
3618*4882a593Smuzhiyun if (!input)
3619*4882a593Smuzhiyun return err;
3620*4882a593Smuzhiyun
3621*4882a593Smuzhiyun /* Otherwise, install the new rule as requested */
3622*4882a593Smuzhiyun INIT_HLIST_NODE(&input->fdir_node);
3623*4882a593Smuzhiyun
3624*4882a593Smuzhiyun /* add filter to the list */
3625*4882a593Smuzhiyun if (parent)
3626*4882a593Smuzhiyun hlist_add_behind(&input->fdir_node, &parent->fdir_node);
3627*4882a593Smuzhiyun else
3628*4882a593Smuzhiyun hlist_add_head(&input->fdir_node,
3629*4882a593Smuzhiyun &pf->fdir_filter_list);
3630*4882a593Smuzhiyun
3631*4882a593Smuzhiyun /* update counts */
3632*4882a593Smuzhiyun pf->fdir_pf_active_filters++;
3633*4882a593Smuzhiyun
3634*4882a593Smuzhiyun return 0;
3635*4882a593Smuzhiyun }
3636*4882a593Smuzhiyun
3637*4882a593Smuzhiyun /**
3638*4882a593Smuzhiyun * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table
3639*4882a593Smuzhiyun * @pf: pointer to PF structure
3640*4882a593Smuzhiyun *
3641*4882a593Smuzhiyun * This function searches the list of filters and determines which FLX_PIT
3642*4882a593Smuzhiyun * entries are still required. It will prune any entries which are no longer
3643*4882a593Smuzhiyun * in use after the deletion.
3644*4882a593Smuzhiyun **/
i40e_prune_flex_pit_list(struct i40e_pf * pf)3645*4882a593Smuzhiyun static void i40e_prune_flex_pit_list(struct i40e_pf *pf)
3646*4882a593Smuzhiyun {
3647*4882a593Smuzhiyun struct i40e_flex_pit *entry, *tmp;
3648*4882a593Smuzhiyun struct i40e_fdir_filter *rule;
3649*4882a593Smuzhiyun
3650*4882a593Smuzhiyun /* First, we'll check the l3 table */
3651*4882a593Smuzhiyun list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) {
3652*4882a593Smuzhiyun bool found = false;
3653*4882a593Smuzhiyun
3654*4882a593Smuzhiyun hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3655*4882a593Smuzhiyun if (rule->flow_type != IP_USER_FLOW)
3656*4882a593Smuzhiyun continue;
3657*4882a593Smuzhiyun if (rule->flex_filter &&
3658*4882a593Smuzhiyun rule->flex_offset == entry->src_offset) {
3659*4882a593Smuzhiyun found = true;
3660*4882a593Smuzhiyun break;
3661*4882a593Smuzhiyun }
3662*4882a593Smuzhiyun }
3663*4882a593Smuzhiyun
3664*4882a593Smuzhiyun /* If we didn't find the filter, then we can prune this entry
3665*4882a593Smuzhiyun * from the list.
3666*4882a593Smuzhiyun */
3667*4882a593Smuzhiyun if (!found) {
3668*4882a593Smuzhiyun list_del(&entry->list);
3669*4882a593Smuzhiyun kfree(entry);
3670*4882a593Smuzhiyun }
3671*4882a593Smuzhiyun }
3672*4882a593Smuzhiyun
3673*4882a593Smuzhiyun /* Followed by the L4 table */
3674*4882a593Smuzhiyun list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) {
3675*4882a593Smuzhiyun bool found = false;
3676*4882a593Smuzhiyun
3677*4882a593Smuzhiyun hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3678*4882a593Smuzhiyun /* Skip this filter if it's L3, since we already
3679*4882a593Smuzhiyun * checked those in the above loop
3680*4882a593Smuzhiyun */
3681*4882a593Smuzhiyun if (rule->flow_type == IP_USER_FLOW)
3682*4882a593Smuzhiyun continue;
3683*4882a593Smuzhiyun if (rule->flex_filter &&
3684*4882a593Smuzhiyun rule->flex_offset == entry->src_offset) {
3685*4882a593Smuzhiyun found = true;
3686*4882a593Smuzhiyun break;
3687*4882a593Smuzhiyun }
3688*4882a593Smuzhiyun }
3689*4882a593Smuzhiyun
3690*4882a593Smuzhiyun /* If we didn't find the filter, then we can prune this entry
3691*4882a593Smuzhiyun * from the list.
3692*4882a593Smuzhiyun */
3693*4882a593Smuzhiyun if (!found) {
3694*4882a593Smuzhiyun list_del(&entry->list);
3695*4882a593Smuzhiyun kfree(entry);
3696*4882a593Smuzhiyun }
3697*4882a593Smuzhiyun }
3698*4882a593Smuzhiyun }
3699*4882a593Smuzhiyun
3700*4882a593Smuzhiyun /**
3701*4882a593Smuzhiyun * i40e_del_fdir_entry - Deletes a Flow Director filter entry
3702*4882a593Smuzhiyun * @vsi: Pointer to the targeted VSI
3703*4882a593Smuzhiyun * @cmd: The command to get or set Rx flow classification rules
3704*4882a593Smuzhiyun *
3705*4882a593Smuzhiyun * The function removes a Flow Director filter entry from the
3706*4882a593Smuzhiyun * hlist of the corresponding PF
3707*4882a593Smuzhiyun *
3708*4882a593Smuzhiyun * Returns 0 on success
3709*4882a593Smuzhiyun */
i40e_del_fdir_entry(struct i40e_vsi * vsi,struct ethtool_rxnfc * cmd)3710*4882a593Smuzhiyun static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
3711*4882a593Smuzhiyun struct ethtool_rxnfc *cmd)
3712*4882a593Smuzhiyun {
3713*4882a593Smuzhiyun struct ethtool_rx_flow_spec *fsp =
3714*4882a593Smuzhiyun (struct ethtool_rx_flow_spec *)&cmd->fs;
3715*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
3716*4882a593Smuzhiyun int ret = 0;
3717*4882a593Smuzhiyun
3718*4882a593Smuzhiyun if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3719*4882a593Smuzhiyun test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
3720*4882a593Smuzhiyun return -EBUSY;
3721*4882a593Smuzhiyun
3722*4882a593Smuzhiyun if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
3723*4882a593Smuzhiyun return -EBUSY;
3724*4882a593Smuzhiyun
3725*4882a593Smuzhiyun ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
3726*4882a593Smuzhiyun
3727*4882a593Smuzhiyun i40e_prune_flex_pit_list(pf);
3728*4882a593Smuzhiyun
3729*4882a593Smuzhiyun i40e_fdir_check_and_reenable(pf);
3730*4882a593Smuzhiyun return ret;
3731*4882a593Smuzhiyun }
3732*4882a593Smuzhiyun
3733*4882a593Smuzhiyun /**
3734*4882a593Smuzhiyun * i40e_unused_pit_index - Find an unused PIT index for given list
3735*4882a593Smuzhiyun * @pf: the PF data structure
3736*4882a593Smuzhiyun *
3737*4882a593Smuzhiyun * Find the first unused flexible PIT index entry. We search both the L3 and
3738*4882a593Smuzhiyun * L4 flexible PIT lists so that the returned index is unique and unused by
3739*4882a593Smuzhiyun * either currently programmed L3 or L4 filters. We use a bit field as storage
3740*4882a593Smuzhiyun * to track which indexes are already used.
3741*4882a593Smuzhiyun **/
i40e_unused_pit_index(struct i40e_pf * pf)3742*4882a593Smuzhiyun static u8 i40e_unused_pit_index(struct i40e_pf *pf)
3743*4882a593Smuzhiyun {
3744*4882a593Smuzhiyun unsigned long available_index = 0xFF;
3745*4882a593Smuzhiyun struct i40e_flex_pit *entry;
3746*4882a593Smuzhiyun
3747*4882a593Smuzhiyun /* We need to make sure that the new index isn't in use by either L3
3748*4882a593Smuzhiyun * or L4 filters so that IP_USER_FLOW filters can program both L3 and
3749*4882a593Smuzhiyun * L4 to use the same index.
3750*4882a593Smuzhiyun */
3751*4882a593Smuzhiyun
3752*4882a593Smuzhiyun list_for_each_entry(entry, &pf->l4_flex_pit_list, list)
3753*4882a593Smuzhiyun clear_bit(entry->pit_index, &available_index);
3754*4882a593Smuzhiyun
3755*4882a593Smuzhiyun list_for_each_entry(entry, &pf->l3_flex_pit_list, list)
3756*4882a593Smuzhiyun clear_bit(entry->pit_index, &available_index);
3757*4882a593Smuzhiyun
3758*4882a593Smuzhiyun return find_first_bit(&available_index, 8);
3759*4882a593Smuzhiyun }
3760*4882a593Smuzhiyun
3761*4882a593Smuzhiyun /**
3762*4882a593Smuzhiyun * i40e_find_flex_offset - Find an existing flex src_offset
3763*4882a593Smuzhiyun * @flex_pit_list: L3 or L4 flex PIT list
3764*4882a593Smuzhiyun * @src_offset: new src_offset to find
3765*4882a593Smuzhiyun *
3766*4882a593Smuzhiyun * Searches the flex_pit_list for an existing offset. If no offset is
3767*4882a593Smuzhiyun * currently programmed, then this will return an ERR_PTR if there is no space
3768*4882a593Smuzhiyun * to add a new offset, otherwise it returns NULL.
3769*4882a593Smuzhiyun **/
3770*4882a593Smuzhiyun static
i40e_find_flex_offset(struct list_head * flex_pit_list,u16 src_offset)3771*4882a593Smuzhiyun struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list,
3772*4882a593Smuzhiyun u16 src_offset)
3773*4882a593Smuzhiyun {
3774*4882a593Smuzhiyun struct i40e_flex_pit *entry;
3775*4882a593Smuzhiyun int size = 0;
3776*4882a593Smuzhiyun
3777*4882a593Smuzhiyun /* Search for the src_offset first. If we find a matching entry
3778*4882a593Smuzhiyun * already programmed, we can simply re-use it.
3779*4882a593Smuzhiyun */
3780*4882a593Smuzhiyun list_for_each_entry(entry, flex_pit_list, list) {
3781*4882a593Smuzhiyun size++;
3782*4882a593Smuzhiyun if (entry->src_offset == src_offset)
3783*4882a593Smuzhiyun return entry;
3784*4882a593Smuzhiyun }
3785*4882a593Smuzhiyun
3786*4882a593Smuzhiyun /* If we haven't found an entry yet, then the provided src offset has
3787*4882a593Smuzhiyun * not yet been programmed. We will program the src offset later on,
3788*4882a593Smuzhiyun * but we need to indicate whether there is enough space to do so
3789*4882a593Smuzhiyun * here. We'll make use of ERR_PTR for this purpose.
3790*4882a593Smuzhiyun */
3791*4882a593Smuzhiyun if (size >= I40E_FLEX_PIT_TABLE_SIZE)
3792*4882a593Smuzhiyun return ERR_PTR(-ENOSPC);
3793*4882a593Smuzhiyun
3794*4882a593Smuzhiyun return NULL;
3795*4882a593Smuzhiyun }
3796*4882a593Smuzhiyun
3797*4882a593Smuzhiyun /**
3798*4882a593Smuzhiyun * i40e_add_flex_offset - Add src_offset to flex PIT table list
3799*4882a593Smuzhiyun * @flex_pit_list: L3 or L4 flex PIT list
3800*4882a593Smuzhiyun * @src_offset: new src_offset to add
3801*4882a593Smuzhiyun * @pit_index: the PIT index to program
3802*4882a593Smuzhiyun *
3803*4882a593Smuzhiyun * This function programs the new src_offset to the list. It is expected that
3804*4882a593Smuzhiyun * i40e_find_flex_offset has already been tried and returned NULL, indicating
3805*4882a593Smuzhiyun * that this offset is not programmed, and that the list has enough space to
3806*4882a593Smuzhiyun * store another offset.
3807*4882a593Smuzhiyun *
3808*4882a593Smuzhiyun * Returns 0 on success, and negative value on error.
3809*4882a593Smuzhiyun **/
i40e_add_flex_offset(struct list_head * flex_pit_list,u16 src_offset,u8 pit_index)3810*4882a593Smuzhiyun static int i40e_add_flex_offset(struct list_head *flex_pit_list,
3811*4882a593Smuzhiyun u16 src_offset,
3812*4882a593Smuzhiyun u8 pit_index)
3813*4882a593Smuzhiyun {
3814*4882a593Smuzhiyun struct i40e_flex_pit *new_pit, *entry;
3815*4882a593Smuzhiyun
3816*4882a593Smuzhiyun new_pit = kzalloc(sizeof(*entry), GFP_KERNEL);
3817*4882a593Smuzhiyun if (!new_pit)
3818*4882a593Smuzhiyun return -ENOMEM;
3819*4882a593Smuzhiyun
3820*4882a593Smuzhiyun new_pit->src_offset = src_offset;
3821*4882a593Smuzhiyun new_pit->pit_index = pit_index;
3822*4882a593Smuzhiyun
3823*4882a593Smuzhiyun /* We need to insert this item such that the list is sorted by
3824*4882a593Smuzhiyun * src_offset in ascending order.
3825*4882a593Smuzhiyun */
3826*4882a593Smuzhiyun list_for_each_entry(entry, flex_pit_list, list) {
3827*4882a593Smuzhiyun if (new_pit->src_offset < entry->src_offset) {
3828*4882a593Smuzhiyun list_add_tail(&new_pit->list, &entry->list);
3829*4882a593Smuzhiyun return 0;
3830*4882a593Smuzhiyun }
3831*4882a593Smuzhiyun
3832*4882a593Smuzhiyun /* If we found an entry with our offset already programmed we
3833*4882a593Smuzhiyun * can simply return here, after freeing the memory. However,
3834*4882a593Smuzhiyun * if the pit_index does not match we need to report an error.
3835*4882a593Smuzhiyun */
3836*4882a593Smuzhiyun if (new_pit->src_offset == entry->src_offset) {
3837*4882a593Smuzhiyun int err = 0;
3838*4882a593Smuzhiyun
3839*4882a593Smuzhiyun /* If the PIT index is not the same we can't re-use
3840*4882a593Smuzhiyun * the entry, so we must report an error.
3841*4882a593Smuzhiyun */
3842*4882a593Smuzhiyun if (new_pit->pit_index != entry->pit_index)
3843*4882a593Smuzhiyun err = -EINVAL;
3844*4882a593Smuzhiyun
3845*4882a593Smuzhiyun kfree(new_pit);
3846*4882a593Smuzhiyun return err;
3847*4882a593Smuzhiyun }
3848*4882a593Smuzhiyun }
3849*4882a593Smuzhiyun
3850*4882a593Smuzhiyun /* If we reached here, then we haven't yet added the item. This means
3851*4882a593Smuzhiyun * that we should add the item at the end of the list.
3852*4882a593Smuzhiyun */
3853*4882a593Smuzhiyun list_add_tail(&new_pit->list, flex_pit_list);
3854*4882a593Smuzhiyun return 0;
3855*4882a593Smuzhiyun }
3856*4882a593Smuzhiyun
3857*4882a593Smuzhiyun /**
3858*4882a593Smuzhiyun * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table
3859*4882a593Smuzhiyun * @pf: Pointer to the PF structure
3860*4882a593Smuzhiyun * @flex_pit_list: list of flexible src offsets in use
3861*4882a593Smuzhiyun * @flex_pit_start: index to first entry for this section of the table
3862*4882a593Smuzhiyun *
3863*4882a593Smuzhiyun * In order to handle flexible data, the hardware uses a table of values
3864*4882a593Smuzhiyun * called the FLX_PIT table. This table is used to indicate which sections of
3865*4882a593Smuzhiyun * the input correspond to what PIT index values. Unfortunately, hardware is
3866*4882a593Smuzhiyun * very restrictive about programming this table. Entries must be ordered by
3867*4882a593Smuzhiyun * src_offset in ascending order, without duplicates. Additionally, unused
3868*4882a593Smuzhiyun * entries must be set to the unused index value, and must have valid size and
3869*4882a593Smuzhiyun * length according to the src_offset ordering.
3870*4882a593Smuzhiyun *
3871*4882a593Smuzhiyun * This function will reprogram the FLX_PIT register from a book-keeping
3872*4882a593Smuzhiyun * structure that we guarantee is already ordered correctly, and has no more
3873*4882a593Smuzhiyun * than 3 entries.
3874*4882a593Smuzhiyun *
3875*4882a593Smuzhiyun * To make things easier, we only support flexible values of one word length,
3876*4882a593Smuzhiyun * rather than allowing variable length flexible values.
3877*4882a593Smuzhiyun **/
__i40e_reprogram_flex_pit(struct i40e_pf * pf,struct list_head * flex_pit_list,int flex_pit_start)3878*4882a593Smuzhiyun static void __i40e_reprogram_flex_pit(struct i40e_pf *pf,
3879*4882a593Smuzhiyun struct list_head *flex_pit_list,
3880*4882a593Smuzhiyun int flex_pit_start)
3881*4882a593Smuzhiyun {
3882*4882a593Smuzhiyun struct i40e_flex_pit *entry = NULL;
3883*4882a593Smuzhiyun u16 last_offset = 0;
3884*4882a593Smuzhiyun int i = 0, j = 0;
3885*4882a593Smuzhiyun
3886*4882a593Smuzhiyun /* First, loop over the list of flex PIT entries, and reprogram the
3887*4882a593Smuzhiyun * registers.
3888*4882a593Smuzhiyun */
3889*4882a593Smuzhiyun list_for_each_entry(entry, flex_pit_list, list) {
3890*4882a593Smuzhiyun /* We have to be careful when programming values for the
3891*4882a593Smuzhiyun * largest SRC_OFFSET value. It is possible that adding
3892*4882a593Smuzhiyun * additional empty values at the end would overflow the space
3893*4882a593Smuzhiyun * for the SRC_OFFSET in the FLX_PIT register. To avoid this,
3894*4882a593Smuzhiyun * we check here and add the empty values prior to adding the
3895*4882a593Smuzhiyun * largest value.
3896*4882a593Smuzhiyun *
3897*4882a593Smuzhiyun * To determine this, we will use a loop from i+1 to 3, which
3898*4882a593Smuzhiyun * will determine whether the unused entries would have valid
3899*4882a593Smuzhiyun * SRC_OFFSET. Note that there cannot be extra entries past
3900*4882a593Smuzhiyun * this value, because the only valid values would have been
3901*4882a593Smuzhiyun * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not
3902*4882a593Smuzhiyun * have been added to the list in the first place.
3903*4882a593Smuzhiyun */
3904*4882a593Smuzhiyun for (j = i + 1; j < 3; j++) {
3905*4882a593Smuzhiyun u16 offset = entry->src_offset + j;
3906*4882a593Smuzhiyun int index = flex_pit_start + i;
3907*4882a593Smuzhiyun u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3908*4882a593Smuzhiyun 1,
3909*4882a593Smuzhiyun offset - 3);
3910*4882a593Smuzhiyun
3911*4882a593Smuzhiyun if (offset > I40E_MAX_FLEX_SRC_OFFSET) {
3912*4882a593Smuzhiyun i40e_write_rx_ctl(&pf->hw,
3913*4882a593Smuzhiyun I40E_PRTQF_FLX_PIT(index),
3914*4882a593Smuzhiyun value);
3915*4882a593Smuzhiyun i++;
3916*4882a593Smuzhiyun }
3917*4882a593Smuzhiyun }
3918*4882a593Smuzhiyun
3919*4882a593Smuzhiyun /* Now, we can program the actual value into the table */
3920*4882a593Smuzhiyun i40e_write_rx_ctl(&pf->hw,
3921*4882a593Smuzhiyun I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3922*4882a593Smuzhiyun I40E_FLEX_PREP_VAL(entry->pit_index + 50,
3923*4882a593Smuzhiyun 1,
3924*4882a593Smuzhiyun entry->src_offset));
3925*4882a593Smuzhiyun i++;
3926*4882a593Smuzhiyun }
3927*4882a593Smuzhiyun
3928*4882a593Smuzhiyun /* In order to program the last entries in the table, we need to
3929*4882a593Smuzhiyun * determine the valid offset. If the list is empty, we'll just start
3930*4882a593Smuzhiyun * with 0. Otherwise, we'll start with the last item offset and add 1.
3931*4882a593Smuzhiyun * This ensures that all entries have valid sizes. If we don't do this
3932*4882a593Smuzhiyun * correctly, the hardware will disable flexible field parsing.
3933*4882a593Smuzhiyun */
3934*4882a593Smuzhiyun if (!list_empty(flex_pit_list))
3935*4882a593Smuzhiyun last_offset = list_prev_entry(entry, list)->src_offset + 1;
3936*4882a593Smuzhiyun
3937*4882a593Smuzhiyun for (; i < 3; i++, last_offset++) {
3938*4882a593Smuzhiyun i40e_write_rx_ctl(&pf->hw,
3939*4882a593Smuzhiyun I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3940*4882a593Smuzhiyun I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3941*4882a593Smuzhiyun 1,
3942*4882a593Smuzhiyun last_offset));
3943*4882a593Smuzhiyun }
3944*4882a593Smuzhiyun }
3945*4882a593Smuzhiyun
3946*4882a593Smuzhiyun /**
3947*4882a593Smuzhiyun * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change
3948*4882a593Smuzhiyun * @pf: pointer to the PF structure
3949*4882a593Smuzhiyun *
3950*4882a593Smuzhiyun * This function reprograms both the L3 and L4 FLX_PIT tables. See the
3951*4882a593Smuzhiyun * internal helper function for implementation details.
3952*4882a593Smuzhiyun **/
i40e_reprogram_flex_pit(struct i40e_pf * pf)3953*4882a593Smuzhiyun static void i40e_reprogram_flex_pit(struct i40e_pf *pf)
3954*4882a593Smuzhiyun {
3955*4882a593Smuzhiyun __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list,
3956*4882a593Smuzhiyun I40E_FLEX_PIT_IDX_START_L3);
3957*4882a593Smuzhiyun
3958*4882a593Smuzhiyun __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list,
3959*4882a593Smuzhiyun I40E_FLEX_PIT_IDX_START_L4);
3960*4882a593Smuzhiyun
3961*4882a593Smuzhiyun /* We also need to program the L3 and L4 GLQF ORT register */
3962*4882a593Smuzhiyun i40e_write_rx_ctl(&pf->hw,
3963*4882a593Smuzhiyun I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX),
3964*4882a593Smuzhiyun I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3,
3965*4882a593Smuzhiyun 3, 1));
3966*4882a593Smuzhiyun
3967*4882a593Smuzhiyun i40e_write_rx_ctl(&pf->hw,
3968*4882a593Smuzhiyun I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX),
3969*4882a593Smuzhiyun I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4,
3970*4882a593Smuzhiyun 3, 1));
3971*4882a593Smuzhiyun }
3972*4882a593Smuzhiyun
3973*4882a593Smuzhiyun /**
3974*4882a593Smuzhiyun * i40e_flow_str - Converts a flow_type into a human readable string
3975*4882a593Smuzhiyun * @fsp: the flow specification
3976*4882a593Smuzhiyun *
3977*4882a593Smuzhiyun * Currently only flow types we support are included here, and the string
3978*4882a593Smuzhiyun * value attempts to match what ethtool would use to configure this flow type.
3979*4882a593Smuzhiyun **/
i40e_flow_str(struct ethtool_rx_flow_spec * fsp)3980*4882a593Smuzhiyun static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp)
3981*4882a593Smuzhiyun {
3982*4882a593Smuzhiyun switch (fsp->flow_type & ~FLOW_EXT) {
3983*4882a593Smuzhiyun case TCP_V4_FLOW:
3984*4882a593Smuzhiyun return "tcp4";
3985*4882a593Smuzhiyun case UDP_V4_FLOW:
3986*4882a593Smuzhiyun return "udp4";
3987*4882a593Smuzhiyun case SCTP_V4_FLOW:
3988*4882a593Smuzhiyun return "sctp4";
3989*4882a593Smuzhiyun case IP_USER_FLOW:
3990*4882a593Smuzhiyun return "ip4";
3991*4882a593Smuzhiyun default:
3992*4882a593Smuzhiyun return "unknown";
3993*4882a593Smuzhiyun }
3994*4882a593Smuzhiyun }
3995*4882a593Smuzhiyun
3996*4882a593Smuzhiyun /**
3997*4882a593Smuzhiyun * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index
3998*4882a593Smuzhiyun * @pit_index: PIT index to convert
3999*4882a593Smuzhiyun *
4000*4882a593Smuzhiyun * Returns the mask for a given PIT index. Will return 0 if the pit_index is
4001*4882a593Smuzhiyun * of range.
4002*4882a593Smuzhiyun **/
i40e_pit_index_to_mask(int pit_index)4003*4882a593Smuzhiyun static u64 i40e_pit_index_to_mask(int pit_index)
4004*4882a593Smuzhiyun {
4005*4882a593Smuzhiyun switch (pit_index) {
4006*4882a593Smuzhiyun case 0:
4007*4882a593Smuzhiyun return I40E_FLEX_50_MASK;
4008*4882a593Smuzhiyun case 1:
4009*4882a593Smuzhiyun return I40E_FLEX_51_MASK;
4010*4882a593Smuzhiyun case 2:
4011*4882a593Smuzhiyun return I40E_FLEX_52_MASK;
4012*4882a593Smuzhiyun case 3:
4013*4882a593Smuzhiyun return I40E_FLEX_53_MASK;
4014*4882a593Smuzhiyun case 4:
4015*4882a593Smuzhiyun return I40E_FLEX_54_MASK;
4016*4882a593Smuzhiyun case 5:
4017*4882a593Smuzhiyun return I40E_FLEX_55_MASK;
4018*4882a593Smuzhiyun case 6:
4019*4882a593Smuzhiyun return I40E_FLEX_56_MASK;
4020*4882a593Smuzhiyun case 7:
4021*4882a593Smuzhiyun return I40E_FLEX_57_MASK;
4022*4882a593Smuzhiyun default:
4023*4882a593Smuzhiyun return 0;
4024*4882a593Smuzhiyun }
4025*4882a593Smuzhiyun }
4026*4882a593Smuzhiyun
4027*4882a593Smuzhiyun /**
4028*4882a593Smuzhiyun * i40e_print_input_set - Show changes between two input sets
4029*4882a593Smuzhiyun * @vsi: the vsi being configured
4030*4882a593Smuzhiyun * @old: the old input set
4031*4882a593Smuzhiyun * @new: the new input set
4032*4882a593Smuzhiyun *
4033*4882a593Smuzhiyun * Print the difference between old and new input sets by showing which series
4034*4882a593Smuzhiyun * of words are toggled on or off. Only displays the bits we actually support
4035*4882a593Smuzhiyun * changing.
4036*4882a593Smuzhiyun **/
i40e_print_input_set(struct i40e_vsi * vsi,u64 old,u64 new)4037*4882a593Smuzhiyun static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new)
4038*4882a593Smuzhiyun {
4039*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
4040*4882a593Smuzhiyun bool old_value, new_value;
4041*4882a593Smuzhiyun int i;
4042*4882a593Smuzhiyun
4043*4882a593Smuzhiyun old_value = !!(old & I40E_L3_SRC_MASK);
4044*4882a593Smuzhiyun new_value = !!(new & I40E_L3_SRC_MASK);
4045*4882a593Smuzhiyun if (old_value != new_value)
4046*4882a593Smuzhiyun netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n",
4047*4882a593Smuzhiyun old_value ? "ON" : "OFF",
4048*4882a593Smuzhiyun new_value ? "ON" : "OFF");
4049*4882a593Smuzhiyun
4050*4882a593Smuzhiyun old_value = !!(old & I40E_L3_DST_MASK);
4051*4882a593Smuzhiyun new_value = !!(new & I40E_L3_DST_MASK);
4052*4882a593Smuzhiyun if (old_value != new_value)
4053*4882a593Smuzhiyun netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n",
4054*4882a593Smuzhiyun old_value ? "ON" : "OFF",
4055*4882a593Smuzhiyun new_value ? "ON" : "OFF");
4056*4882a593Smuzhiyun
4057*4882a593Smuzhiyun old_value = !!(old & I40E_L4_SRC_MASK);
4058*4882a593Smuzhiyun new_value = !!(new & I40E_L4_SRC_MASK);
4059*4882a593Smuzhiyun if (old_value != new_value)
4060*4882a593Smuzhiyun netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n",
4061*4882a593Smuzhiyun old_value ? "ON" : "OFF",
4062*4882a593Smuzhiyun new_value ? "ON" : "OFF");
4063*4882a593Smuzhiyun
4064*4882a593Smuzhiyun old_value = !!(old & I40E_L4_DST_MASK);
4065*4882a593Smuzhiyun new_value = !!(new & I40E_L4_DST_MASK);
4066*4882a593Smuzhiyun if (old_value != new_value)
4067*4882a593Smuzhiyun netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n",
4068*4882a593Smuzhiyun old_value ? "ON" : "OFF",
4069*4882a593Smuzhiyun new_value ? "ON" : "OFF");
4070*4882a593Smuzhiyun
4071*4882a593Smuzhiyun old_value = !!(old & I40E_VERIFY_TAG_MASK);
4072*4882a593Smuzhiyun new_value = !!(new & I40E_VERIFY_TAG_MASK);
4073*4882a593Smuzhiyun if (old_value != new_value)
4074*4882a593Smuzhiyun netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n",
4075*4882a593Smuzhiyun old_value ? "ON" : "OFF",
4076*4882a593Smuzhiyun new_value ? "ON" : "OFF");
4077*4882a593Smuzhiyun
4078*4882a593Smuzhiyun /* Show change of flexible filter entries */
4079*4882a593Smuzhiyun for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) {
4080*4882a593Smuzhiyun u64 flex_mask = i40e_pit_index_to_mask(i);
4081*4882a593Smuzhiyun
4082*4882a593Smuzhiyun old_value = !!(old & flex_mask);
4083*4882a593Smuzhiyun new_value = !!(new & flex_mask);
4084*4882a593Smuzhiyun if (old_value != new_value)
4085*4882a593Smuzhiyun netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n",
4086*4882a593Smuzhiyun i,
4087*4882a593Smuzhiyun old_value ? "ON" : "OFF",
4088*4882a593Smuzhiyun new_value ? "ON" : "OFF");
4089*4882a593Smuzhiyun }
4090*4882a593Smuzhiyun
4091*4882a593Smuzhiyun netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n",
4092*4882a593Smuzhiyun old);
4093*4882a593Smuzhiyun netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n",
4094*4882a593Smuzhiyun new);
4095*4882a593Smuzhiyun }
4096*4882a593Smuzhiyun
4097*4882a593Smuzhiyun /**
4098*4882a593Smuzhiyun * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid
4099*4882a593Smuzhiyun * @vsi: pointer to the targeted VSI
4100*4882a593Smuzhiyun * @fsp: pointer to Rx flow specification
4101*4882a593Smuzhiyun * @userdef: userdefined data from flow specification
4102*4882a593Smuzhiyun *
4103*4882a593Smuzhiyun * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support
4104*4882a593Smuzhiyun * for partial matches exists with a few limitations. First, hardware only
4105*4882a593Smuzhiyun * supports masking by word boundary (2 bytes) and not per individual bit.
4106*4882a593Smuzhiyun * Second, hardware is limited to using one mask for a flow type and cannot
4107*4882a593Smuzhiyun * use a separate mask for each filter.
4108*4882a593Smuzhiyun *
4109*4882a593Smuzhiyun * To support these limitations, if we already have a configured filter for
4110*4882a593Smuzhiyun * the specified type, this function enforces that new filters of the type
4111*4882a593Smuzhiyun * match the configured input set. Otherwise, if we do not have a filter of
4112*4882a593Smuzhiyun * the specified type, we allow the input set to be updated to match the
4113*4882a593Smuzhiyun * desired filter.
4114*4882a593Smuzhiyun *
4115*4882a593Smuzhiyun * To help ensure that administrators understand why filters weren't displayed
4116*4882a593Smuzhiyun * as supported, we print a diagnostic message displaying how the input set
4117*4882a593Smuzhiyun * would change and warning to delete the preexisting filters if required.
4118*4882a593Smuzhiyun *
4119*4882a593Smuzhiyun * Returns 0 on successful input set match, and a negative return code on
4120*4882a593Smuzhiyun * failure.
4121*4882a593Smuzhiyun **/
i40e_check_fdir_input_set(struct i40e_vsi * vsi,struct ethtool_rx_flow_spec * fsp,struct i40e_rx_flow_userdef * userdef)4122*4882a593Smuzhiyun static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
4123*4882a593Smuzhiyun struct ethtool_rx_flow_spec *fsp,
4124*4882a593Smuzhiyun struct i40e_rx_flow_userdef *userdef)
4125*4882a593Smuzhiyun {
4126*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
4127*4882a593Smuzhiyun struct ethtool_tcpip4_spec *tcp_ip4_spec;
4128*4882a593Smuzhiyun struct ethtool_usrip4_spec *usr_ip4_spec;
4129*4882a593Smuzhiyun u64 current_mask, new_mask;
4130*4882a593Smuzhiyun bool new_flex_offset = false;
4131*4882a593Smuzhiyun bool flex_l3 = false;
4132*4882a593Smuzhiyun u16 *fdir_filter_count;
4133*4882a593Smuzhiyun u16 index, src_offset = 0;
4134*4882a593Smuzhiyun u8 pit_index = 0;
4135*4882a593Smuzhiyun int err;
4136*4882a593Smuzhiyun
4137*4882a593Smuzhiyun switch (fsp->flow_type & ~FLOW_EXT) {
4138*4882a593Smuzhiyun case SCTP_V4_FLOW:
4139*4882a593Smuzhiyun index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
4140*4882a593Smuzhiyun fdir_filter_count = &pf->fd_sctp4_filter_cnt;
4141*4882a593Smuzhiyun break;
4142*4882a593Smuzhiyun case TCP_V4_FLOW:
4143*4882a593Smuzhiyun index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
4144*4882a593Smuzhiyun fdir_filter_count = &pf->fd_tcp4_filter_cnt;
4145*4882a593Smuzhiyun break;
4146*4882a593Smuzhiyun case UDP_V4_FLOW:
4147*4882a593Smuzhiyun index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
4148*4882a593Smuzhiyun fdir_filter_count = &pf->fd_udp4_filter_cnt;
4149*4882a593Smuzhiyun break;
4150*4882a593Smuzhiyun case IP_USER_FLOW:
4151*4882a593Smuzhiyun index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
4152*4882a593Smuzhiyun fdir_filter_count = &pf->fd_ip4_filter_cnt;
4153*4882a593Smuzhiyun flex_l3 = true;
4154*4882a593Smuzhiyun break;
4155*4882a593Smuzhiyun default:
4156*4882a593Smuzhiyun return -EOPNOTSUPP;
4157*4882a593Smuzhiyun }
4158*4882a593Smuzhiyun
4159*4882a593Smuzhiyun /* Read the current input set from register memory. */
4160*4882a593Smuzhiyun current_mask = i40e_read_fd_input_set(pf, index);
4161*4882a593Smuzhiyun new_mask = current_mask;
4162*4882a593Smuzhiyun
4163*4882a593Smuzhiyun /* Determine, if any, the required changes to the input set in order
4164*4882a593Smuzhiyun * to support the provided mask.
4165*4882a593Smuzhiyun *
4166*4882a593Smuzhiyun * Hardware only supports masking at word (2 byte) granularity and does
4167*4882a593Smuzhiyun * not support full bitwise masking. This implementation simplifies
4168*4882a593Smuzhiyun * even further and only supports fully enabled or fully disabled
4169*4882a593Smuzhiyun * masks for each field, even though we could split the ip4src and
4170*4882a593Smuzhiyun * ip4dst fields.
4171*4882a593Smuzhiyun */
4172*4882a593Smuzhiyun switch (fsp->flow_type & ~FLOW_EXT) {
4173*4882a593Smuzhiyun case SCTP_V4_FLOW:
4174*4882a593Smuzhiyun new_mask &= ~I40E_VERIFY_TAG_MASK;
4175*4882a593Smuzhiyun fallthrough;
4176*4882a593Smuzhiyun case TCP_V4_FLOW:
4177*4882a593Smuzhiyun case UDP_V4_FLOW:
4178*4882a593Smuzhiyun tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec;
4179*4882a593Smuzhiyun
4180*4882a593Smuzhiyun /* IPv4 source address */
4181*4882a593Smuzhiyun if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF))
4182*4882a593Smuzhiyun new_mask |= I40E_L3_SRC_MASK;
4183*4882a593Smuzhiyun else if (!tcp_ip4_spec->ip4src)
4184*4882a593Smuzhiyun new_mask &= ~I40E_L3_SRC_MASK;
4185*4882a593Smuzhiyun else
4186*4882a593Smuzhiyun return -EOPNOTSUPP;
4187*4882a593Smuzhiyun
4188*4882a593Smuzhiyun /* IPv4 destination address */
4189*4882a593Smuzhiyun if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
4190*4882a593Smuzhiyun new_mask |= I40E_L3_DST_MASK;
4191*4882a593Smuzhiyun else if (!tcp_ip4_spec->ip4dst)
4192*4882a593Smuzhiyun new_mask &= ~I40E_L3_DST_MASK;
4193*4882a593Smuzhiyun else
4194*4882a593Smuzhiyun return -EOPNOTSUPP;
4195*4882a593Smuzhiyun
4196*4882a593Smuzhiyun /* L4 source port */
4197*4882a593Smuzhiyun if (tcp_ip4_spec->psrc == htons(0xFFFF))
4198*4882a593Smuzhiyun new_mask |= I40E_L4_SRC_MASK;
4199*4882a593Smuzhiyun else if (!tcp_ip4_spec->psrc)
4200*4882a593Smuzhiyun new_mask &= ~I40E_L4_SRC_MASK;
4201*4882a593Smuzhiyun else
4202*4882a593Smuzhiyun return -EOPNOTSUPP;
4203*4882a593Smuzhiyun
4204*4882a593Smuzhiyun /* L4 destination port */
4205*4882a593Smuzhiyun if (tcp_ip4_spec->pdst == htons(0xFFFF))
4206*4882a593Smuzhiyun new_mask |= I40E_L4_DST_MASK;
4207*4882a593Smuzhiyun else if (!tcp_ip4_spec->pdst)
4208*4882a593Smuzhiyun new_mask &= ~I40E_L4_DST_MASK;
4209*4882a593Smuzhiyun else
4210*4882a593Smuzhiyun return -EOPNOTSUPP;
4211*4882a593Smuzhiyun
4212*4882a593Smuzhiyun /* Filtering on Type of Service is not supported. */
4213*4882a593Smuzhiyun if (tcp_ip4_spec->tos)
4214*4882a593Smuzhiyun return -EOPNOTSUPP;
4215*4882a593Smuzhiyun
4216*4882a593Smuzhiyun break;
4217*4882a593Smuzhiyun case IP_USER_FLOW:
4218*4882a593Smuzhiyun usr_ip4_spec = &fsp->m_u.usr_ip4_spec;
4219*4882a593Smuzhiyun
4220*4882a593Smuzhiyun /* IPv4 source address */
4221*4882a593Smuzhiyun if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF))
4222*4882a593Smuzhiyun new_mask |= I40E_L3_SRC_MASK;
4223*4882a593Smuzhiyun else if (!usr_ip4_spec->ip4src)
4224*4882a593Smuzhiyun new_mask &= ~I40E_L3_SRC_MASK;
4225*4882a593Smuzhiyun else
4226*4882a593Smuzhiyun return -EOPNOTSUPP;
4227*4882a593Smuzhiyun
4228*4882a593Smuzhiyun /* IPv4 destination address */
4229*4882a593Smuzhiyun if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
4230*4882a593Smuzhiyun new_mask |= I40E_L3_DST_MASK;
4231*4882a593Smuzhiyun else if (!usr_ip4_spec->ip4dst)
4232*4882a593Smuzhiyun new_mask &= ~I40E_L3_DST_MASK;
4233*4882a593Smuzhiyun else
4234*4882a593Smuzhiyun return -EOPNOTSUPP;
4235*4882a593Smuzhiyun
4236*4882a593Smuzhiyun /* First 4 bytes of L4 header */
4237*4882a593Smuzhiyun if (usr_ip4_spec->l4_4_bytes)
4238*4882a593Smuzhiyun return -EOPNOTSUPP;
4239*4882a593Smuzhiyun
4240*4882a593Smuzhiyun /* Filtering on Type of Service is not supported. */
4241*4882a593Smuzhiyun if (usr_ip4_spec->tos)
4242*4882a593Smuzhiyun return -EOPNOTSUPP;
4243*4882a593Smuzhiyun
4244*4882a593Smuzhiyun /* Filtering on IP version is not supported */
4245*4882a593Smuzhiyun if (usr_ip4_spec->ip_ver)
4246*4882a593Smuzhiyun return -EINVAL;
4247*4882a593Smuzhiyun
4248*4882a593Smuzhiyun /* Filtering on L4 protocol is not supported */
4249*4882a593Smuzhiyun if (usr_ip4_spec->proto)
4250*4882a593Smuzhiyun return -EINVAL;
4251*4882a593Smuzhiyun
4252*4882a593Smuzhiyun break;
4253*4882a593Smuzhiyun default:
4254*4882a593Smuzhiyun return -EOPNOTSUPP;
4255*4882a593Smuzhiyun }
4256*4882a593Smuzhiyun
4257*4882a593Smuzhiyun /* First, clear all flexible filter entries */
4258*4882a593Smuzhiyun new_mask &= ~I40E_FLEX_INPUT_MASK;
4259*4882a593Smuzhiyun
4260*4882a593Smuzhiyun /* If we have a flexible filter, try to add this offset to the correct
4261*4882a593Smuzhiyun * flexible filter PIT list. Once finished, we can update the mask.
4262*4882a593Smuzhiyun * If the src_offset changed, we will get a new mask value which will
4263*4882a593Smuzhiyun * trigger an input set change.
4264*4882a593Smuzhiyun */
4265*4882a593Smuzhiyun if (userdef->flex_filter) {
4266*4882a593Smuzhiyun struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL;
4267*4882a593Smuzhiyun
4268*4882a593Smuzhiyun /* Flexible offset must be even, since the flexible payload
4269*4882a593Smuzhiyun * must be aligned on 2-byte boundary.
4270*4882a593Smuzhiyun */
4271*4882a593Smuzhiyun if (userdef->flex_offset & 0x1) {
4272*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
4273*4882a593Smuzhiyun "Flexible data offset must be 2-byte aligned\n");
4274*4882a593Smuzhiyun return -EINVAL;
4275*4882a593Smuzhiyun }
4276*4882a593Smuzhiyun
4277*4882a593Smuzhiyun src_offset = userdef->flex_offset >> 1;
4278*4882a593Smuzhiyun
4279*4882a593Smuzhiyun /* FLX_PIT source offset value is only so large */
4280*4882a593Smuzhiyun if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) {
4281*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
4282*4882a593Smuzhiyun "Flexible data must reside within first 64 bytes of the packet payload\n");
4283*4882a593Smuzhiyun return -EINVAL;
4284*4882a593Smuzhiyun }
4285*4882a593Smuzhiyun
4286*4882a593Smuzhiyun /* See if this offset has already been programmed. If we get
4287*4882a593Smuzhiyun * an ERR_PTR, then the filter is not safe to add. Otherwise,
4288*4882a593Smuzhiyun * if we get a NULL pointer, this means we will need to add
4289*4882a593Smuzhiyun * the offset.
4290*4882a593Smuzhiyun */
4291*4882a593Smuzhiyun flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list,
4292*4882a593Smuzhiyun src_offset);
4293*4882a593Smuzhiyun if (IS_ERR(flex_pit))
4294*4882a593Smuzhiyun return PTR_ERR(flex_pit);
4295*4882a593Smuzhiyun
4296*4882a593Smuzhiyun /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown)
4297*4882a593Smuzhiyun * packet types, and thus we need to program both L3 and L4
4298*4882a593Smuzhiyun * flexible values. These must have identical flexible index,
4299*4882a593Smuzhiyun * as otherwise we can't correctly program the input set. So
4300*4882a593Smuzhiyun * we'll find both an L3 and L4 index and make sure they are
4301*4882a593Smuzhiyun * the same.
4302*4882a593Smuzhiyun */
4303*4882a593Smuzhiyun if (flex_l3) {
4304*4882a593Smuzhiyun l3_flex_pit =
4305*4882a593Smuzhiyun i40e_find_flex_offset(&pf->l3_flex_pit_list,
4306*4882a593Smuzhiyun src_offset);
4307*4882a593Smuzhiyun if (IS_ERR(l3_flex_pit))
4308*4882a593Smuzhiyun return PTR_ERR(l3_flex_pit);
4309*4882a593Smuzhiyun
4310*4882a593Smuzhiyun if (flex_pit) {
4311*4882a593Smuzhiyun /* If we already had a matching L4 entry, we
4312*4882a593Smuzhiyun * need to make sure that the L3 entry we
4313*4882a593Smuzhiyun * obtained uses the same index.
4314*4882a593Smuzhiyun */
4315*4882a593Smuzhiyun if (l3_flex_pit) {
4316*4882a593Smuzhiyun if (l3_flex_pit->pit_index !=
4317*4882a593Smuzhiyun flex_pit->pit_index) {
4318*4882a593Smuzhiyun return -EINVAL;
4319*4882a593Smuzhiyun }
4320*4882a593Smuzhiyun } else {
4321*4882a593Smuzhiyun new_flex_offset = true;
4322*4882a593Smuzhiyun }
4323*4882a593Smuzhiyun } else {
4324*4882a593Smuzhiyun flex_pit = l3_flex_pit;
4325*4882a593Smuzhiyun }
4326*4882a593Smuzhiyun }
4327*4882a593Smuzhiyun
4328*4882a593Smuzhiyun /* If we didn't find an existing flex offset, we need to
4329*4882a593Smuzhiyun * program a new one. However, we don't immediately program it
4330*4882a593Smuzhiyun * here because we will wait to program until after we check
4331*4882a593Smuzhiyun * that it is safe to change the input set.
4332*4882a593Smuzhiyun */
4333*4882a593Smuzhiyun if (!flex_pit) {
4334*4882a593Smuzhiyun new_flex_offset = true;
4335*4882a593Smuzhiyun pit_index = i40e_unused_pit_index(pf);
4336*4882a593Smuzhiyun } else {
4337*4882a593Smuzhiyun pit_index = flex_pit->pit_index;
4338*4882a593Smuzhiyun }
4339*4882a593Smuzhiyun
4340*4882a593Smuzhiyun /* Update the mask with the new offset */
4341*4882a593Smuzhiyun new_mask |= i40e_pit_index_to_mask(pit_index);
4342*4882a593Smuzhiyun }
4343*4882a593Smuzhiyun
4344*4882a593Smuzhiyun /* If the mask and flexible filter offsets for this filter match the
4345*4882a593Smuzhiyun * currently programmed values we don't need any input set change, so
4346*4882a593Smuzhiyun * this filter is safe to install.
4347*4882a593Smuzhiyun */
4348*4882a593Smuzhiyun if (new_mask == current_mask && !new_flex_offset)
4349*4882a593Smuzhiyun return 0;
4350*4882a593Smuzhiyun
4351*4882a593Smuzhiyun netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n",
4352*4882a593Smuzhiyun i40e_flow_str(fsp));
4353*4882a593Smuzhiyun i40e_print_input_set(vsi, current_mask, new_mask);
4354*4882a593Smuzhiyun if (new_flex_offset) {
4355*4882a593Smuzhiyun netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d",
4356*4882a593Smuzhiyun pit_index, src_offset);
4357*4882a593Smuzhiyun }
4358*4882a593Smuzhiyun
4359*4882a593Smuzhiyun /* Hardware input sets are global across multiple ports, so even the
4360*4882a593Smuzhiyun * main port cannot change them when in MFP mode as this would impact
4361*4882a593Smuzhiyun * any filters on the other ports.
4362*4882a593Smuzhiyun */
4363*4882a593Smuzhiyun if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4364*4882a593Smuzhiyun netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
4365*4882a593Smuzhiyun return -EOPNOTSUPP;
4366*4882a593Smuzhiyun }
4367*4882a593Smuzhiyun
4368*4882a593Smuzhiyun /* This filter requires us to update the input set. However, hardware
4369*4882a593Smuzhiyun * only supports one input set per flow type, and does not support
4370*4882a593Smuzhiyun * separate masks for each filter. This means that we can only support
4371*4882a593Smuzhiyun * a single mask for all filters of a specific type.
4372*4882a593Smuzhiyun *
4373*4882a593Smuzhiyun * If we have preexisting filters, they obviously depend on the
4374*4882a593Smuzhiyun * current programmed input set. Display a diagnostic message in this
4375*4882a593Smuzhiyun * case explaining why the filter could not be accepted.
4376*4882a593Smuzhiyun */
4377*4882a593Smuzhiyun if (*fdir_filter_count) {
4378*4882a593Smuzhiyun netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n",
4379*4882a593Smuzhiyun i40e_flow_str(fsp),
4380*4882a593Smuzhiyun *fdir_filter_count);
4381*4882a593Smuzhiyun return -EOPNOTSUPP;
4382*4882a593Smuzhiyun }
4383*4882a593Smuzhiyun
4384*4882a593Smuzhiyun i40e_write_fd_input_set(pf, index, new_mask);
4385*4882a593Smuzhiyun
4386*4882a593Smuzhiyun /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented
4387*4882a593Smuzhiyun * frames. If we're programming the input set for IPv4/Other, we also
4388*4882a593Smuzhiyun * need to program the IPv4/Fragmented input set. Since we don't have
4389*4882a593Smuzhiyun * separate support, we'll always assume and enforce that the two flow
4390*4882a593Smuzhiyun * types must have matching input sets.
4391*4882a593Smuzhiyun */
4392*4882a593Smuzhiyun if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER)
4393*4882a593Smuzhiyun i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
4394*4882a593Smuzhiyun new_mask);
4395*4882a593Smuzhiyun
4396*4882a593Smuzhiyun /* Add the new offset and update table, if necessary */
4397*4882a593Smuzhiyun if (new_flex_offset) {
4398*4882a593Smuzhiyun err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset,
4399*4882a593Smuzhiyun pit_index);
4400*4882a593Smuzhiyun if (err)
4401*4882a593Smuzhiyun return err;
4402*4882a593Smuzhiyun
4403*4882a593Smuzhiyun if (flex_l3) {
4404*4882a593Smuzhiyun err = i40e_add_flex_offset(&pf->l3_flex_pit_list,
4405*4882a593Smuzhiyun src_offset,
4406*4882a593Smuzhiyun pit_index);
4407*4882a593Smuzhiyun if (err)
4408*4882a593Smuzhiyun return err;
4409*4882a593Smuzhiyun }
4410*4882a593Smuzhiyun
4411*4882a593Smuzhiyun i40e_reprogram_flex_pit(pf);
4412*4882a593Smuzhiyun }
4413*4882a593Smuzhiyun
4414*4882a593Smuzhiyun return 0;
4415*4882a593Smuzhiyun }
4416*4882a593Smuzhiyun
4417*4882a593Smuzhiyun /**
4418*4882a593Smuzhiyun * i40e_match_fdir_filter - Return true of two filters match
4419*4882a593Smuzhiyun * @a: pointer to filter struct
4420*4882a593Smuzhiyun * @b: pointer to filter struct
4421*4882a593Smuzhiyun *
4422*4882a593Smuzhiyun * Returns true if the two filters match exactly the same criteria. I.e. they
4423*4882a593Smuzhiyun * match the same flow type and have the same parameters. We don't need to
4424*4882a593Smuzhiyun * check any input-set since all filters of the same flow type must use the
4425*4882a593Smuzhiyun * same input set.
4426*4882a593Smuzhiyun **/
i40e_match_fdir_filter(struct i40e_fdir_filter * a,struct i40e_fdir_filter * b)4427*4882a593Smuzhiyun static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a,
4428*4882a593Smuzhiyun struct i40e_fdir_filter *b)
4429*4882a593Smuzhiyun {
4430*4882a593Smuzhiyun /* The filters do not much if any of these criteria differ. */
4431*4882a593Smuzhiyun if (a->dst_ip != b->dst_ip ||
4432*4882a593Smuzhiyun a->src_ip != b->src_ip ||
4433*4882a593Smuzhiyun a->dst_port != b->dst_port ||
4434*4882a593Smuzhiyun a->src_port != b->src_port ||
4435*4882a593Smuzhiyun a->flow_type != b->flow_type ||
4436*4882a593Smuzhiyun a->ip4_proto != b->ip4_proto)
4437*4882a593Smuzhiyun return false;
4438*4882a593Smuzhiyun
4439*4882a593Smuzhiyun return true;
4440*4882a593Smuzhiyun }
4441*4882a593Smuzhiyun
4442*4882a593Smuzhiyun /**
4443*4882a593Smuzhiyun * i40e_disallow_matching_filters - Check that new filters differ
4444*4882a593Smuzhiyun * @vsi: pointer to the targeted VSI
4445*4882a593Smuzhiyun * @input: new filter to check
4446*4882a593Smuzhiyun *
4447*4882a593Smuzhiyun * Due to hardware limitations, it is not possible for two filters that match
4448*4882a593Smuzhiyun * similar criteria to be programmed at the same time. This is true for a few
4449*4882a593Smuzhiyun * reasons:
4450*4882a593Smuzhiyun *
4451*4882a593Smuzhiyun * (a) all filters matching a particular flow type must use the same input
4452*4882a593Smuzhiyun * set, that is they must match the same criteria.
4453*4882a593Smuzhiyun * (b) different flow types will never match the same packet, as the flow type
4454*4882a593Smuzhiyun * is decided by hardware before checking which rules apply.
4455*4882a593Smuzhiyun * (c) hardware has no way to distinguish which order filters apply in.
4456*4882a593Smuzhiyun *
4457*4882a593Smuzhiyun * Due to this, we can't really support using the location data to order
4458*4882a593Smuzhiyun * filters in the hardware parsing. It is technically possible for the user to
4459*4882a593Smuzhiyun * request two filters matching the same criteria but which select different
4460*4882a593Smuzhiyun * queues. In this case, rather than keep both filters in the list, we reject
4461*4882a593Smuzhiyun * the 2nd filter when the user requests adding it.
4462*4882a593Smuzhiyun *
4463*4882a593Smuzhiyun * This avoids needing to track location for programming the filter to
4464*4882a593Smuzhiyun * hardware, and ensures that we avoid some strange scenarios involving
4465*4882a593Smuzhiyun * deleting filters which match the same criteria.
4466*4882a593Smuzhiyun **/
i40e_disallow_matching_filters(struct i40e_vsi * vsi,struct i40e_fdir_filter * input)4467*4882a593Smuzhiyun static int i40e_disallow_matching_filters(struct i40e_vsi *vsi,
4468*4882a593Smuzhiyun struct i40e_fdir_filter *input)
4469*4882a593Smuzhiyun {
4470*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
4471*4882a593Smuzhiyun struct i40e_fdir_filter *rule;
4472*4882a593Smuzhiyun struct hlist_node *node2;
4473*4882a593Smuzhiyun
4474*4882a593Smuzhiyun /* Loop through every filter, and check that it doesn't match */
4475*4882a593Smuzhiyun hlist_for_each_entry_safe(rule, node2,
4476*4882a593Smuzhiyun &pf->fdir_filter_list, fdir_node) {
4477*4882a593Smuzhiyun /* Don't check the filters match if they share the same fd_id,
4478*4882a593Smuzhiyun * since the new filter is actually just updating the target
4479*4882a593Smuzhiyun * of the old filter.
4480*4882a593Smuzhiyun */
4481*4882a593Smuzhiyun if (rule->fd_id == input->fd_id)
4482*4882a593Smuzhiyun continue;
4483*4882a593Smuzhiyun
4484*4882a593Smuzhiyun /* If any filters match, then print a warning message to the
4485*4882a593Smuzhiyun * kernel message buffer and bail out.
4486*4882a593Smuzhiyun */
4487*4882a593Smuzhiyun if (i40e_match_fdir_filter(rule, input)) {
4488*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
4489*4882a593Smuzhiyun "Existing user defined filter %d already matches this flow.\n",
4490*4882a593Smuzhiyun rule->fd_id);
4491*4882a593Smuzhiyun return -EINVAL;
4492*4882a593Smuzhiyun }
4493*4882a593Smuzhiyun }
4494*4882a593Smuzhiyun
4495*4882a593Smuzhiyun return 0;
4496*4882a593Smuzhiyun }
4497*4882a593Smuzhiyun
4498*4882a593Smuzhiyun /**
4499*4882a593Smuzhiyun * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
4500*4882a593Smuzhiyun * @vsi: pointer to the targeted VSI
4501*4882a593Smuzhiyun * @cmd: command to get or set RX flow classification rules
4502*4882a593Smuzhiyun *
4503*4882a593Smuzhiyun * Add Flow Director filters for a specific flow spec based on their
4504*4882a593Smuzhiyun * protocol. Returns 0 if the filters were successfully added.
4505*4882a593Smuzhiyun **/
i40e_add_fdir_ethtool(struct i40e_vsi * vsi,struct ethtool_rxnfc * cmd)4506*4882a593Smuzhiyun static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
4507*4882a593Smuzhiyun struct ethtool_rxnfc *cmd)
4508*4882a593Smuzhiyun {
4509*4882a593Smuzhiyun struct i40e_rx_flow_userdef userdef;
4510*4882a593Smuzhiyun struct ethtool_rx_flow_spec *fsp;
4511*4882a593Smuzhiyun struct i40e_fdir_filter *input;
4512*4882a593Smuzhiyun u16 dest_vsi = 0, q_index = 0;
4513*4882a593Smuzhiyun struct i40e_pf *pf;
4514*4882a593Smuzhiyun int ret = -EINVAL;
4515*4882a593Smuzhiyun u8 dest_ctl;
4516*4882a593Smuzhiyun
4517*4882a593Smuzhiyun if (!vsi)
4518*4882a593Smuzhiyun return -EINVAL;
4519*4882a593Smuzhiyun pf = vsi->back;
4520*4882a593Smuzhiyun
4521*4882a593Smuzhiyun if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
4522*4882a593Smuzhiyun return -EOPNOTSUPP;
4523*4882a593Smuzhiyun
4524*4882a593Smuzhiyun if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
4525*4882a593Smuzhiyun return -ENOSPC;
4526*4882a593Smuzhiyun
4527*4882a593Smuzhiyun if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
4528*4882a593Smuzhiyun test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
4529*4882a593Smuzhiyun return -EBUSY;
4530*4882a593Smuzhiyun
4531*4882a593Smuzhiyun if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
4532*4882a593Smuzhiyun return -EBUSY;
4533*4882a593Smuzhiyun
4534*4882a593Smuzhiyun fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
4535*4882a593Smuzhiyun
4536*4882a593Smuzhiyun /* Parse the user-defined field */
4537*4882a593Smuzhiyun if (i40e_parse_rx_flow_user_data(fsp, &userdef))
4538*4882a593Smuzhiyun return -EINVAL;
4539*4882a593Smuzhiyun
4540*4882a593Smuzhiyun /* Extended MAC field is not supported */
4541*4882a593Smuzhiyun if (fsp->flow_type & FLOW_MAC_EXT)
4542*4882a593Smuzhiyun return -EINVAL;
4543*4882a593Smuzhiyun
4544*4882a593Smuzhiyun ret = i40e_check_fdir_input_set(vsi, fsp, &userdef);
4545*4882a593Smuzhiyun if (ret)
4546*4882a593Smuzhiyun return ret;
4547*4882a593Smuzhiyun
4548*4882a593Smuzhiyun if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
4549*4882a593Smuzhiyun pf->hw.func_caps.fd_filters_guaranteed)) {
4550*4882a593Smuzhiyun return -EINVAL;
4551*4882a593Smuzhiyun }
4552*4882a593Smuzhiyun
4553*4882a593Smuzhiyun /* ring_cookie is either the drop index, or is a mask of the queue
4554*4882a593Smuzhiyun * index and VF id we wish to target.
4555*4882a593Smuzhiyun */
4556*4882a593Smuzhiyun if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
4557*4882a593Smuzhiyun dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
4558*4882a593Smuzhiyun } else {
4559*4882a593Smuzhiyun u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
4560*4882a593Smuzhiyun u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
4561*4882a593Smuzhiyun
4562*4882a593Smuzhiyun if (!vf) {
4563*4882a593Smuzhiyun if (ring >= vsi->num_queue_pairs)
4564*4882a593Smuzhiyun return -EINVAL;
4565*4882a593Smuzhiyun dest_vsi = vsi->id;
4566*4882a593Smuzhiyun } else {
4567*4882a593Smuzhiyun /* VFs are zero-indexed, so we subtract one here */
4568*4882a593Smuzhiyun vf--;
4569*4882a593Smuzhiyun
4570*4882a593Smuzhiyun if (vf >= pf->num_alloc_vfs)
4571*4882a593Smuzhiyun return -EINVAL;
4572*4882a593Smuzhiyun if (ring >= pf->vf[vf].num_queue_pairs)
4573*4882a593Smuzhiyun return -EINVAL;
4574*4882a593Smuzhiyun dest_vsi = pf->vf[vf].lan_vsi_id;
4575*4882a593Smuzhiyun }
4576*4882a593Smuzhiyun dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
4577*4882a593Smuzhiyun q_index = ring;
4578*4882a593Smuzhiyun }
4579*4882a593Smuzhiyun
4580*4882a593Smuzhiyun input = kzalloc(sizeof(*input), GFP_KERNEL);
4581*4882a593Smuzhiyun
4582*4882a593Smuzhiyun if (!input)
4583*4882a593Smuzhiyun return -ENOMEM;
4584*4882a593Smuzhiyun
4585*4882a593Smuzhiyun input->fd_id = fsp->location;
4586*4882a593Smuzhiyun input->q_index = q_index;
4587*4882a593Smuzhiyun input->dest_vsi = dest_vsi;
4588*4882a593Smuzhiyun input->dest_ctl = dest_ctl;
4589*4882a593Smuzhiyun input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
4590*4882a593Smuzhiyun input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
4591*4882a593Smuzhiyun input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4592*4882a593Smuzhiyun input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4593*4882a593Smuzhiyun input->flow_type = fsp->flow_type & ~FLOW_EXT;
4594*4882a593Smuzhiyun input->ip4_proto = fsp->h_u.usr_ip4_spec.proto;
4595*4882a593Smuzhiyun
4596*4882a593Smuzhiyun /* Reverse the src and dest notion, since the HW expects them to be from
4597*4882a593Smuzhiyun * Tx perspective where as the input from user is from Rx filter view.
4598*4882a593Smuzhiyun */
4599*4882a593Smuzhiyun input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
4600*4882a593Smuzhiyun input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
4601*4882a593Smuzhiyun input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4602*4882a593Smuzhiyun input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4603*4882a593Smuzhiyun
4604*4882a593Smuzhiyun if (userdef.flex_filter) {
4605*4882a593Smuzhiyun input->flex_filter = true;
4606*4882a593Smuzhiyun input->flex_word = cpu_to_be16(userdef.flex_word);
4607*4882a593Smuzhiyun input->flex_offset = userdef.flex_offset;
4608*4882a593Smuzhiyun }
4609*4882a593Smuzhiyun
4610*4882a593Smuzhiyun /* Avoid programming two filters with identical match criteria. */
4611*4882a593Smuzhiyun ret = i40e_disallow_matching_filters(vsi, input);
4612*4882a593Smuzhiyun if (ret)
4613*4882a593Smuzhiyun goto free_filter_memory;
4614*4882a593Smuzhiyun
4615*4882a593Smuzhiyun /* Add the input filter to the fdir_input_list, possibly replacing
4616*4882a593Smuzhiyun * a previous filter. Do not free the input structure after adding it
4617*4882a593Smuzhiyun * to the list as this would cause a use-after-free bug.
4618*4882a593Smuzhiyun */
4619*4882a593Smuzhiyun i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
4620*4882a593Smuzhiyun ret = i40e_add_del_fdir(vsi, input, true);
4621*4882a593Smuzhiyun if (ret)
4622*4882a593Smuzhiyun goto remove_sw_rule;
4623*4882a593Smuzhiyun return 0;
4624*4882a593Smuzhiyun
4625*4882a593Smuzhiyun remove_sw_rule:
4626*4882a593Smuzhiyun hlist_del(&input->fdir_node);
4627*4882a593Smuzhiyun pf->fdir_pf_active_filters--;
4628*4882a593Smuzhiyun free_filter_memory:
4629*4882a593Smuzhiyun kfree(input);
4630*4882a593Smuzhiyun return ret;
4631*4882a593Smuzhiyun }
4632*4882a593Smuzhiyun
4633*4882a593Smuzhiyun /**
4634*4882a593Smuzhiyun * i40e_set_rxnfc - command to set RX flow classification rules
4635*4882a593Smuzhiyun * @netdev: network interface device structure
4636*4882a593Smuzhiyun * @cmd: ethtool rxnfc command
4637*4882a593Smuzhiyun *
4638*4882a593Smuzhiyun * Returns Success if the command is supported.
4639*4882a593Smuzhiyun **/
i40e_set_rxnfc(struct net_device * netdev,struct ethtool_rxnfc * cmd)4640*4882a593Smuzhiyun static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
4641*4882a593Smuzhiyun {
4642*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
4643*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
4644*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
4645*4882a593Smuzhiyun int ret = -EOPNOTSUPP;
4646*4882a593Smuzhiyun
4647*4882a593Smuzhiyun switch (cmd->cmd) {
4648*4882a593Smuzhiyun case ETHTOOL_SRXFH:
4649*4882a593Smuzhiyun ret = i40e_set_rss_hash_opt(pf, cmd);
4650*4882a593Smuzhiyun break;
4651*4882a593Smuzhiyun case ETHTOOL_SRXCLSRLINS:
4652*4882a593Smuzhiyun ret = i40e_add_fdir_ethtool(vsi, cmd);
4653*4882a593Smuzhiyun break;
4654*4882a593Smuzhiyun case ETHTOOL_SRXCLSRLDEL:
4655*4882a593Smuzhiyun ret = i40e_del_fdir_entry(vsi, cmd);
4656*4882a593Smuzhiyun break;
4657*4882a593Smuzhiyun default:
4658*4882a593Smuzhiyun break;
4659*4882a593Smuzhiyun }
4660*4882a593Smuzhiyun
4661*4882a593Smuzhiyun return ret;
4662*4882a593Smuzhiyun }
4663*4882a593Smuzhiyun
4664*4882a593Smuzhiyun /**
4665*4882a593Smuzhiyun * i40e_max_channels - get Max number of combined channels supported
4666*4882a593Smuzhiyun * @vsi: vsi pointer
4667*4882a593Smuzhiyun **/
i40e_max_channels(struct i40e_vsi * vsi)4668*4882a593Smuzhiyun static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
4669*4882a593Smuzhiyun {
4670*4882a593Smuzhiyun /* TODO: This code assumes DCB and FD is disabled for now. */
4671*4882a593Smuzhiyun return vsi->alloc_queue_pairs;
4672*4882a593Smuzhiyun }
4673*4882a593Smuzhiyun
4674*4882a593Smuzhiyun /**
4675*4882a593Smuzhiyun * i40e_get_channels - Get the current channels enabled and max supported etc.
4676*4882a593Smuzhiyun * @dev: network interface device structure
4677*4882a593Smuzhiyun * @ch: ethtool channels structure
4678*4882a593Smuzhiyun *
4679*4882a593Smuzhiyun * We don't support separate tx and rx queues as channels. The other count
4680*4882a593Smuzhiyun * represents how many queues are being used for control. max_combined counts
4681*4882a593Smuzhiyun * how many queue pairs we can support. They may not be mapped 1 to 1 with
4682*4882a593Smuzhiyun * q_vectors since we support a lot more queue pairs than q_vectors.
4683*4882a593Smuzhiyun **/
i40e_get_channels(struct net_device * dev,struct ethtool_channels * ch)4684*4882a593Smuzhiyun static void i40e_get_channels(struct net_device *dev,
4685*4882a593Smuzhiyun struct ethtool_channels *ch)
4686*4882a593Smuzhiyun {
4687*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(dev);
4688*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
4689*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
4690*4882a593Smuzhiyun
4691*4882a593Smuzhiyun /* report maximum channels */
4692*4882a593Smuzhiyun ch->max_combined = i40e_max_channels(vsi);
4693*4882a593Smuzhiyun
4694*4882a593Smuzhiyun /* report info for other vector */
4695*4882a593Smuzhiyun ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
4696*4882a593Smuzhiyun ch->max_other = ch->other_count;
4697*4882a593Smuzhiyun
4698*4882a593Smuzhiyun /* Note: This code assumes DCB is disabled for now. */
4699*4882a593Smuzhiyun ch->combined_count = vsi->num_queue_pairs;
4700*4882a593Smuzhiyun }
4701*4882a593Smuzhiyun
4702*4882a593Smuzhiyun /**
4703*4882a593Smuzhiyun * i40e_set_channels - Set the new channels count.
4704*4882a593Smuzhiyun * @dev: network interface device structure
4705*4882a593Smuzhiyun * @ch: ethtool channels structure
4706*4882a593Smuzhiyun *
4707*4882a593Smuzhiyun * The new channels count may not be the same as requested by the user
4708*4882a593Smuzhiyun * since it gets rounded down to a power of 2 value.
4709*4882a593Smuzhiyun **/
i40e_set_channels(struct net_device * dev,struct ethtool_channels * ch)4710*4882a593Smuzhiyun static int i40e_set_channels(struct net_device *dev,
4711*4882a593Smuzhiyun struct ethtool_channels *ch)
4712*4882a593Smuzhiyun {
4713*4882a593Smuzhiyun const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
4714*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(dev);
4715*4882a593Smuzhiyun unsigned int count = ch->combined_count;
4716*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
4717*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
4718*4882a593Smuzhiyun struct i40e_fdir_filter *rule;
4719*4882a593Smuzhiyun struct hlist_node *node2;
4720*4882a593Smuzhiyun int new_count;
4721*4882a593Smuzhiyun int err = 0;
4722*4882a593Smuzhiyun
4723*4882a593Smuzhiyun /* We do not support setting channels for any other VSI at present */
4724*4882a593Smuzhiyun if (vsi->type != I40E_VSI_MAIN)
4725*4882a593Smuzhiyun return -EINVAL;
4726*4882a593Smuzhiyun
4727*4882a593Smuzhiyun /* We do not support setting channels via ethtool when TCs are
4728*4882a593Smuzhiyun * configured through mqprio
4729*4882a593Smuzhiyun */
4730*4882a593Smuzhiyun if (pf->flags & I40E_FLAG_TC_MQPRIO)
4731*4882a593Smuzhiyun return -EINVAL;
4732*4882a593Smuzhiyun
4733*4882a593Smuzhiyun /* verify they are not requesting separate vectors */
4734*4882a593Smuzhiyun if (!count || ch->rx_count || ch->tx_count)
4735*4882a593Smuzhiyun return -EINVAL;
4736*4882a593Smuzhiyun
4737*4882a593Smuzhiyun /* verify other_count has not changed */
4738*4882a593Smuzhiyun if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
4739*4882a593Smuzhiyun return -EINVAL;
4740*4882a593Smuzhiyun
4741*4882a593Smuzhiyun /* verify the number of channels does not exceed hardware limits */
4742*4882a593Smuzhiyun if (count > i40e_max_channels(vsi))
4743*4882a593Smuzhiyun return -EINVAL;
4744*4882a593Smuzhiyun
4745*4882a593Smuzhiyun /* verify that the number of channels does not invalidate any current
4746*4882a593Smuzhiyun * flow director rules
4747*4882a593Smuzhiyun */
4748*4882a593Smuzhiyun hlist_for_each_entry_safe(rule, node2,
4749*4882a593Smuzhiyun &pf->fdir_filter_list, fdir_node) {
4750*4882a593Smuzhiyun if (rule->dest_ctl != drop && count <= rule->q_index) {
4751*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
4752*4882a593Smuzhiyun "Existing user defined filter %d assigns flow to queue %d\n",
4753*4882a593Smuzhiyun rule->fd_id, rule->q_index);
4754*4882a593Smuzhiyun err = -EINVAL;
4755*4882a593Smuzhiyun }
4756*4882a593Smuzhiyun }
4757*4882a593Smuzhiyun
4758*4882a593Smuzhiyun if (err) {
4759*4882a593Smuzhiyun dev_err(&pf->pdev->dev,
4760*4882a593Smuzhiyun "Existing filter rules must be deleted to reduce combined channel count to %d\n",
4761*4882a593Smuzhiyun count);
4762*4882a593Smuzhiyun return err;
4763*4882a593Smuzhiyun }
4764*4882a593Smuzhiyun
4765*4882a593Smuzhiyun /* update feature limits from largest to smallest supported values */
4766*4882a593Smuzhiyun /* TODO: Flow director limit, DCB etc */
4767*4882a593Smuzhiyun
4768*4882a593Smuzhiyun /* use rss_reconfig to rebuild with new queue count and update traffic
4769*4882a593Smuzhiyun * class queue mapping
4770*4882a593Smuzhiyun */
4771*4882a593Smuzhiyun new_count = i40e_reconfig_rss_queues(pf, count);
4772*4882a593Smuzhiyun if (new_count > 0)
4773*4882a593Smuzhiyun return 0;
4774*4882a593Smuzhiyun else
4775*4882a593Smuzhiyun return -EINVAL;
4776*4882a593Smuzhiyun }
4777*4882a593Smuzhiyun
4778*4882a593Smuzhiyun /**
4779*4882a593Smuzhiyun * i40e_get_rxfh_key_size - get the RSS hash key size
4780*4882a593Smuzhiyun * @netdev: network interface device structure
4781*4882a593Smuzhiyun *
4782*4882a593Smuzhiyun * Returns the table size.
4783*4882a593Smuzhiyun **/
i40e_get_rxfh_key_size(struct net_device * netdev)4784*4882a593Smuzhiyun static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
4785*4882a593Smuzhiyun {
4786*4882a593Smuzhiyun return I40E_HKEY_ARRAY_SIZE;
4787*4882a593Smuzhiyun }
4788*4882a593Smuzhiyun
4789*4882a593Smuzhiyun /**
4790*4882a593Smuzhiyun * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
4791*4882a593Smuzhiyun * @netdev: network interface device structure
4792*4882a593Smuzhiyun *
4793*4882a593Smuzhiyun * Returns the table size.
4794*4882a593Smuzhiyun **/
i40e_get_rxfh_indir_size(struct net_device * netdev)4795*4882a593Smuzhiyun static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
4796*4882a593Smuzhiyun {
4797*4882a593Smuzhiyun return I40E_HLUT_ARRAY_SIZE;
4798*4882a593Smuzhiyun }
4799*4882a593Smuzhiyun
4800*4882a593Smuzhiyun /**
4801*4882a593Smuzhiyun * i40e_get_rxfh - get the rx flow hash indirection table
4802*4882a593Smuzhiyun * @netdev: network interface device structure
4803*4882a593Smuzhiyun * @indir: indirection table
4804*4882a593Smuzhiyun * @key: hash key
4805*4882a593Smuzhiyun * @hfunc: hash function
4806*4882a593Smuzhiyun *
4807*4882a593Smuzhiyun * Reads the indirection table directly from the hardware. Returns 0 on
4808*4882a593Smuzhiyun * success.
4809*4882a593Smuzhiyun **/
i40e_get_rxfh(struct net_device * netdev,u32 * indir,u8 * key,u8 * hfunc)4810*4882a593Smuzhiyun static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
4811*4882a593Smuzhiyun u8 *hfunc)
4812*4882a593Smuzhiyun {
4813*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
4814*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
4815*4882a593Smuzhiyun u8 *lut, *seed = NULL;
4816*4882a593Smuzhiyun int ret;
4817*4882a593Smuzhiyun u16 i;
4818*4882a593Smuzhiyun
4819*4882a593Smuzhiyun if (hfunc)
4820*4882a593Smuzhiyun *hfunc = ETH_RSS_HASH_TOP;
4821*4882a593Smuzhiyun
4822*4882a593Smuzhiyun if (!indir)
4823*4882a593Smuzhiyun return 0;
4824*4882a593Smuzhiyun
4825*4882a593Smuzhiyun seed = key;
4826*4882a593Smuzhiyun lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4827*4882a593Smuzhiyun if (!lut)
4828*4882a593Smuzhiyun return -ENOMEM;
4829*4882a593Smuzhiyun ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
4830*4882a593Smuzhiyun if (ret)
4831*4882a593Smuzhiyun goto out;
4832*4882a593Smuzhiyun for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4833*4882a593Smuzhiyun indir[i] = (u32)(lut[i]);
4834*4882a593Smuzhiyun
4835*4882a593Smuzhiyun out:
4836*4882a593Smuzhiyun kfree(lut);
4837*4882a593Smuzhiyun
4838*4882a593Smuzhiyun return ret;
4839*4882a593Smuzhiyun }
4840*4882a593Smuzhiyun
4841*4882a593Smuzhiyun /**
4842*4882a593Smuzhiyun * i40e_set_rxfh - set the rx flow hash indirection table
4843*4882a593Smuzhiyun * @netdev: network interface device structure
4844*4882a593Smuzhiyun * @indir: indirection table
4845*4882a593Smuzhiyun * @key: hash key
4846*4882a593Smuzhiyun * @hfunc: hash function to use
4847*4882a593Smuzhiyun *
4848*4882a593Smuzhiyun * Returns -EINVAL if the table specifies an invalid queue id, otherwise
4849*4882a593Smuzhiyun * returns 0 after programming the table.
4850*4882a593Smuzhiyun **/
i40e_set_rxfh(struct net_device * netdev,const u32 * indir,const u8 * key,const u8 hfunc)4851*4882a593Smuzhiyun static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir,
4852*4882a593Smuzhiyun const u8 *key, const u8 hfunc)
4853*4882a593Smuzhiyun {
4854*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
4855*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
4856*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
4857*4882a593Smuzhiyun u8 *seed = NULL;
4858*4882a593Smuzhiyun u16 i;
4859*4882a593Smuzhiyun
4860*4882a593Smuzhiyun if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
4861*4882a593Smuzhiyun return -EOPNOTSUPP;
4862*4882a593Smuzhiyun
4863*4882a593Smuzhiyun if (key) {
4864*4882a593Smuzhiyun if (!vsi->rss_hkey_user) {
4865*4882a593Smuzhiyun vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
4866*4882a593Smuzhiyun GFP_KERNEL);
4867*4882a593Smuzhiyun if (!vsi->rss_hkey_user)
4868*4882a593Smuzhiyun return -ENOMEM;
4869*4882a593Smuzhiyun }
4870*4882a593Smuzhiyun memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE);
4871*4882a593Smuzhiyun seed = vsi->rss_hkey_user;
4872*4882a593Smuzhiyun }
4873*4882a593Smuzhiyun if (!vsi->rss_lut_user) {
4874*4882a593Smuzhiyun vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4875*4882a593Smuzhiyun if (!vsi->rss_lut_user)
4876*4882a593Smuzhiyun return -ENOMEM;
4877*4882a593Smuzhiyun }
4878*4882a593Smuzhiyun
4879*4882a593Smuzhiyun /* Each 32 bits pointed by 'indir' is stored with a lut entry */
4880*4882a593Smuzhiyun if (indir)
4881*4882a593Smuzhiyun for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4882*4882a593Smuzhiyun vsi->rss_lut_user[i] = (u8)(indir[i]);
4883*4882a593Smuzhiyun else
4884*4882a593Smuzhiyun i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
4885*4882a593Smuzhiyun vsi->rss_size);
4886*4882a593Smuzhiyun
4887*4882a593Smuzhiyun return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
4888*4882a593Smuzhiyun I40E_HLUT_ARRAY_SIZE);
4889*4882a593Smuzhiyun }
4890*4882a593Smuzhiyun
4891*4882a593Smuzhiyun /**
4892*4882a593Smuzhiyun * i40e_get_priv_flags - report device private flags
4893*4882a593Smuzhiyun * @dev: network interface device structure
4894*4882a593Smuzhiyun *
4895*4882a593Smuzhiyun * The get string set count and the string set should be matched for each
4896*4882a593Smuzhiyun * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags
4897*4882a593Smuzhiyun * array.
4898*4882a593Smuzhiyun *
4899*4882a593Smuzhiyun * Returns a u32 bitmap of flags.
4900*4882a593Smuzhiyun **/
i40e_get_priv_flags(struct net_device * dev)4901*4882a593Smuzhiyun static u32 i40e_get_priv_flags(struct net_device *dev)
4902*4882a593Smuzhiyun {
4903*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(dev);
4904*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
4905*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
4906*4882a593Smuzhiyun u32 i, j, ret_flags = 0;
4907*4882a593Smuzhiyun
4908*4882a593Smuzhiyun for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4909*4882a593Smuzhiyun const struct i40e_priv_flags *priv_flags;
4910*4882a593Smuzhiyun
4911*4882a593Smuzhiyun priv_flags = &i40e_gstrings_priv_flags[i];
4912*4882a593Smuzhiyun
4913*4882a593Smuzhiyun if (priv_flags->flag & pf->flags)
4914*4882a593Smuzhiyun ret_flags |= BIT(i);
4915*4882a593Smuzhiyun }
4916*4882a593Smuzhiyun
4917*4882a593Smuzhiyun if (pf->hw.pf_id != 0)
4918*4882a593Smuzhiyun return ret_flags;
4919*4882a593Smuzhiyun
4920*4882a593Smuzhiyun for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4921*4882a593Smuzhiyun const struct i40e_priv_flags *priv_flags;
4922*4882a593Smuzhiyun
4923*4882a593Smuzhiyun priv_flags = &i40e_gl_gstrings_priv_flags[j];
4924*4882a593Smuzhiyun
4925*4882a593Smuzhiyun if (priv_flags->flag & pf->flags)
4926*4882a593Smuzhiyun ret_flags |= BIT(i + j);
4927*4882a593Smuzhiyun }
4928*4882a593Smuzhiyun
4929*4882a593Smuzhiyun return ret_flags;
4930*4882a593Smuzhiyun }
4931*4882a593Smuzhiyun
4932*4882a593Smuzhiyun /**
4933*4882a593Smuzhiyun * i40e_set_priv_flags - set private flags
4934*4882a593Smuzhiyun * @dev: network interface device structure
4935*4882a593Smuzhiyun * @flags: bit flags to be set
4936*4882a593Smuzhiyun **/
i40e_set_priv_flags(struct net_device * dev,u32 flags)4937*4882a593Smuzhiyun static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
4938*4882a593Smuzhiyun {
4939*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(dev);
4940*4882a593Smuzhiyun u64 orig_flags, new_flags, changed_flags;
4941*4882a593Smuzhiyun enum i40e_admin_queue_err adq_err;
4942*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
4943*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
4944*4882a593Smuzhiyun u32 reset_needed = 0;
4945*4882a593Smuzhiyun i40e_status status;
4946*4882a593Smuzhiyun u32 i, j;
4947*4882a593Smuzhiyun
4948*4882a593Smuzhiyun orig_flags = READ_ONCE(pf->flags);
4949*4882a593Smuzhiyun new_flags = orig_flags;
4950*4882a593Smuzhiyun
4951*4882a593Smuzhiyun for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4952*4882a593Smuzhiyun const struct i40e_priv_flags *priv_flags;
4953*4882a593Smuzhiyun
4954*4882a593Smuzhiyun priv_flags = &i40e_gstrings_priv_flags[i];
4955*4882a593Smuzhiyun
4956*4882a593Smuzhiyun if (flags & BIT(i))
4957*4882a593Smuzhiyun new_flags |= priv_flags->flag;
4958*4882a593Smuzhiyun else
4959*4882a593Smuzhiyun new_flags &= ~(priv_flags->flag);
4960*4882a593Smuzhiyun
4961*4882a593Smuzhiyun /* If this is a read-only flag, it can't be changed */
4962*4882a593Smuzhiyun if (priv_flags->read_only &&
4963*4882a593Smuzhiyun ((orig_flags ^ new_flags) & ~BIT(i)))
4964*4882a593Smuzhiyun return -EOPNOTSUPP;
4965*4882a593Smuzhiyun }
4966*4882a593Smuzhiyun
4967*4882a593Smuzhiyun if (pf->hw.pf_id != 0)
4968*4882a593Smuzhiyun goto flags_complete;
4969*4882a593Smuzhiyun
4970*4882a593Smuzhiyun for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4971*4882a593Smuzhiyun const struct i40e_priv_flags *priv_flags;
4972*4882a593Smuzhiyun
4973*4882a593Smuzhiyun priv_flags = &i40e_gl_gstrings_priv_flags[j];
4974*4882a593Smuzhiyun
4975*4882a593Smuzhiyun if (flags & BIT(i + j))
4976*4882a593Smuzhiyun new_flags |= priv_flags->flag;
4977*4882a593Smuzhiyun else
4978*4882a593Smuzhiyun new_flags &= ~(priv_flags->flag);
4979*4882a593Smuzhiyun
4980*4882a593Smuzhiyun /* If this is a read-only flag, it can't be changed */
4981*4882a593Smuzhiyun if (priv_flags->read_only &&
4982*4882a593Smuzhiyun ((orig_flags ^ new_flags) & ~BIT(i)))
4983*4882a593Smuzhiyun return -EOPNOTSUPP;
4984*4882a593Smuzhiyun }
4985*4882a593Smuzhiyun
4986*4882a593Smuzhiyun flags_complete:
4987*4882a593Smuzhiyun changed_flags = orig_flags ^ new_flags;
4988*4882a593Smuzhiyun
4989*4882a593Smuzhiyun if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP)
4990*4882a593Smuzhiyun reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG;
4991*4882a593Smuzhiyun if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED |
4992*4882a593Smuzhiyun I40E_FLAG_LEGACY_RX | I40E_FLAG_SOURCE_PRUNING_DISABLED))
4993*4882a593Smuzhiyun reset_needed = BIT(__I40E_PF_RESET_REQUESTED);
4994*4882a593Smuzhiyun
4995*4882a593Smuzhiyun /* Before we finalize any flag changes, we need to perform some
4996*4882a593Smuzhiyun * checks to ensure that the changes are supported and safe.
4997*4882a593Smuzhiyun */
4998*4882a593Smuzhiyun
4999*4882a593Smuzhiyun /* ATR eviction is not supported on all devices */
5000*4882a593Smuzhiyun if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) &&
5001*4882a593Smuzhiyun !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE))
5002*4882a593Smuzhiyun return -EOPNOTSUPP;
5003*4882a593Smuzhiyun
5004*4882a593Smuzhiyun /* If the driver detected FW LLDP was disabled on init, this flag could
5005*4882a593Smuzhiyun * be set, however we do not support _changing_ the flag:
5006*4882a593Smuzhiyun * - on XL710 if NPAR is enabled or FW API version < 1.7
5007*4882a593Smuzhiyun * - on X722 with FW API version < 1.6
5008*4882a593Smuzhiyun * There are situations where older FW versions/NPAR enabled PFs could
5009*4882a593Smuzhiyun * disable LLDP, however we _must_ not allow the user to enable/disable
5010*4882a593Smuzhiyun * LLDP with this flag on unsupported FW versions.
5011*4882a593Smuzhiyun */
5012*4882a593Smuzhiyun if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
5013*4882a593Smuzhiyun if (!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) {
5014*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
5015*4882a593Smuzhiyun "Device does not support changing FW LLDP\n");
5016*4882a593Smuzhiyun return -EOPNOTSUPP;
5017*4882a593Smuzhiyun }
5018*4882a593Smuzhiyun }
5019*4882a593Smuzhiyun
5020*4882a593Smuzhiyun if (changed_flags & I40E_FLAG_RS_FEC &&
5021*4882a593Smuzhiyun pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
5022*4882a593Smuzhiyun pf->hw.device_id != I40E_DEV_ID_25G_B) {
5023*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
5024*4882a593Smuzhiyun "Device does not support changing FEC configuration\n");
5025*4882a593Smuzhiyun return -EOPNOTSUPP;
5026*4882a593Smuzhiyun }
5027*4882a593Smuzhiyun
5028*4882a593Smuzhiyun if (changed_flags & I40E_FLAG_BASE_R_FEC &&
5029*4882a593Smuzhiyun pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
5030*4882a593Smuzhiyun pf->hw.device_id != I40E_DEV_ID_25G_B &&
5031*4882a593Smuzhiyun pf->hw.device_id != I40E_DEV_ID_KX_X722) {
5032*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
5033*4882a593Smuzhiyun "Device does not support changing FEC configuration\n");
5034*4882a593Smuzhiyun return -EOPNOTSUPP;
5035*4882a593Smuzhiyun }
5036*4882a593Smuzhiyun
5037*4882a593Smuzhiyun /* Process any additional changes needed as a result of flag changes.
5038*4882a593Smuzhiyun * The changed_flags value reflects the list of bits that were
5039*4882a593Smuzhiyun * changed in the code above.
5040*4882a593Smuzhiyun */
5041*4882a593Smuzhiyun
5042*4882a593Smuzhiyun /* Flush current ATR settings if ATR was disabled */
5043*4882a593Smuzhiyun if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) &&
5044*4882a593Smuzhiyun !(new_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5045*4882a593Smuzhiyun set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
5046*4882a593Smuzhiyun set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
5047*4882a593Smuzhiyun }
5048*4882a593Smuzhiyun
5049*4882a593Smuzhiyun if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) {
5050*4882a593Smuzhiyun u16 sw_flags = 0, valid_flags = 0;
5051*4882a593Smuzhiyun int ret;
5052*4882a593Smuzhiyun
5053*4882a593Smuzhiyun if (!(new_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
5054*4882a593Smuzhiyun sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
5055*4882a593Smuzhiyun valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
5056*4882a593Smuzhiyun ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
5057*4882a593Smuzhiyun 0, NULL);
5058*4882a593Smuzhiyun if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
5059*4882a593Smuzhiyun dev_info(&pf->pdev->dev,
5060*4882a593Smuzhiyun "couldn't set switch config bits, err %s aq_err %s\n",
5061*4882a593Smuzhiyun i40e_stat_str(&pf->hw, ret),
5062*4882a593Smuzhiyun i40e_aq_str(&pf->hw,
5063*4882a593Smuzhiyun pf->hw.aq.asq_last_status));
5064*4882a593Smuzhiyun /* not a fatal problem, just keep going */
5065*4882a593Smuzhiyun }
5066*4882a593Smuzhiyun }
5067*4882a593Smuzhiyun
5068*4882a593Smuzhiyun if ((changed_flags & I40E_FLAG_RS_FEC) ||
5069*4882a593Smuzhiyun (changed_flags & I40E_FLAG_BASE_R_FEC)) {
5070*4882a593Smuzhiyun u8 fec_cfg = 0;
5071*4882a593Smuzhiyun
5072*4882a593Smuzhiyun if (new_flags & I40E_FLAG_RS_FEC &&
5073*4882a593Smuzhiyun new_flags & I40E_FLAG_BASE_R_FEC) {
5074*4882a593Smuzhiyun fec_cfg = I40E_AQ_SET_FEC_AUTO;
5075*4882a593Smuzhiyun } else if (new_flags & I40E_FLAG_RS_FEC) {
5076*4882a593Smuzhiyun fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
5077*4882a593Smuzhiyun I40E_AQ_SET_FEC_ABILITY_RS);
5078*4882a593Smuzhiyun } else if (new_flags & I40E_FLAG_BASE_R_FEC) {
5079*4882a593Smuzhiyun fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
5080*4882a593Smuzhiyun I40E_AQ_SET_FEC_ABILITY_KR);
5081*4882a593Smuzhiyun }
5082*4882a593Smuzhiyun if (i40e_set_fec_cfg(dev, fec_cfg))
5083*4882a593Smuzhiyun dev_warn(&pf->pdev->dev, "Cannot change FEC config\n");
5084*4882a593Smuzhiyun }
5085*4882a593Smuzhiyun
5086*4882a593Smuzhiyun if ((changed_flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
5087*4882a593Smuzhiyun (orig_flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)) {
5088*4882a593Smuzhiyun dev_err(&pf->pdev->dev,
5089*4882a593Smuzhiyun "Setting link-down-on-close not supported on this port (because total-port-shutdown is enabled)\n");
5090*4882a593Smuzhiyun return -EOPNOTSUPP;
5091*4882a593Smuzhiyun }
5092*4882a593Smuzhiyun
5093*4882a593Smuzhiyun if ((changed_flags & new_flags &
5094*4882a593Smuzhiyun I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
5095*4882a593Smuzhiyun (new_flags & I40E_FLAG_MFP_ENABLED))
5096*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
5097*4882a593Smuzhiyun "Turning on link-down-on-close flag may affect other partitions\n");
5098*4882a593Smuzhiyun
5099*4882a593Smuzhiyun if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
5100*4882a593Smuzhiyun if (new_flags & I40E_FLAG_DISABLE_FW_LLDP) {
5101*4882a593Smuzhiyun struct i40e_dcbx_config *dcbcfg;
5102*4882a593Smuzhiyun
5103*4882a593Smuzhiyun i40e_aq_stop_lldp(&pf->hw, true, false, NULL);
5104*4882a593Smuzhiyun i40e_aq_set_dcb_parameters(&pf->hw, true, NULL);
5105*4882a593Smuzhiyun /* reset local_dcbx_config to default */
5106*4882a593Smuzhiyun dcbcfg = &pf->hw.local_dcbx_config;
5107*4882a593Smuzhiyun dcbcfg->etscfg.willing = 1;
5108*4882a593Smuzhiyun dcbcfg->etscfg.maxtcs = 0;
5109*4882a593Smuzhiyun dcbcfg->etscfg.tcbwtable[0] = 100;
5110*4882a593Smuzhiyun for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++)
5111*4882a593Smuzhiyun dcbcfg->etscfg.tcbwtable[i] = 0;
5112*4882a593Smuzhiyun for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5113*4882a593Smuzhiyun dcbcfg->etscfg.prioritytable[i] = 0;
5114*4882a593Smuzhiyun dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
5115*4882a593Smuzhiyun dcbcfg->pfc.willing = 1;
5116*4882a593Smuzhiyun dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
5117*4882a593Smuzhiyun } else {
5118*4882a593Smuzhiyun status = i40e_aq_start_lldp(&pf->hw, false, NULL);
5119*4882a593Smuzhiyun if (status) {
5120*4882a593Smuzhiyun adq_err = pf->hw.aq.asq_last_status;
5121*4882a593Smuzhiyun switch (adq_err) {
5122*4882a593Smuzhiyun case I40E_AQ_RC_EEXIST:
5123*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
5124*4882a593Smuzhiyun "FW LLDP agent is already running\n");
5125*4882a593Smuzhiyun reset_needed = 0;
5126*4882a593Smuzhiyun break;
5127*4882a593Smuzhiyun case I40E_AQ_RC_EPERM:
5128*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
5129*4882a593Smuzhiyun "Device configuration forbids SW from starting the LLDP agent.\n");
5130*4882a593Smuzhiyun return -EINVAL;
5131*4882a593Smuzhiyun case I40E_AQ_RC_EAGAIN:
5132*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
5133*4882a593Smuzhiyun "Stop FW LLDP agent command is still being processed, please try again in a second.\n");
5134*4882a593Smuzhiyun return -EBUSY;
5135*4882a593Smuzhiyun default:
5136*4882a593Smuzhiyun dev_warn(&pf->pdev->dev,
5137*4882a593Smuzhiyun "Starting FW LLDP agent failed: error: %s, %s\n",
5138*4882a593Smuzhiyun i40e_stat_str(&pf->hw,
5139*4882a593Smuzhiyun status),
5140*4882a593Smuzhiyun i40e_aq_str(&pf->hw,
5141*4882a593Smuzhiyun adq_err));
5142*4882a593Smuzhiyun return -EINVAL;
5143*4882a593Smuzhiyun }
5144*4882a593Smuzhiyun }
5145*4882a593Smuzhiyun }
5146*4882a593Smuzhiyun }
5147*4882a593Smuzhiyun
5148*4882a593Smuzhiyun /* Now that we've checked to ensure that the new flags are valid, load
5149*4882a593Smuzhiyun * them into place. Since we only modify flags either (a) during
5150*4882a593Smuzhiyun * initialization or (b) while holding the RTNL lock, we don't need
5151*4882a593Smuzhiyun * anything fancy here.
5152*4882a593Smuzhiyun */
5153*4882a593Smuzhiyun pf->flags = new_flags;
5154*4882a593Smuzhiyun
5155*4882a593Smuzhiyun /* Issue reset to cause things to take effect, as additional bits
5156*4882a593Smuzhiyun * are added we will need to create a mask of bits requiring reset
5157*4882a593Smuzhiyun */
5158*4882a593Smuzhiyun if (reset_needed)
5159*4882a593Smuzhiyun i40e_do_reset(pf, reset_needed, true);
5160*4882a593Smuzhiyun
5161*4882a593Smuzhiyun return 0;
5162*4882a593Smuzhiyun }
5163*4882a593Smuzhiyun
5164*4882a593Smuzhiyun /**
5165*4882a593Smuzhiyun * i40e_get_module_info - get (Q)SFP+ module type info
5166*4882a593Smuzhiyun * @netdev: network interface device structure
5167*4882a593Smuzhiyun * @modinfo: module EEPROM size and layout information structure
5168*4882a593Smuzhiyun **/
i40e_get_module_info(struct net_device * netdev,struct ethtool_modinfo * modinfo)5169*4882a593Smuzhiyun static int i40e_get_module_info(struct net_device *netdev,
5170*4882a593Smuzhiyun struct ethtool_modinfo *modinfo)
5171*4882a593Smuzhiyun {
5172*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
5173*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
5174*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
5175*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
5176*4882a593Smuzhiyun u32 sff8472_comp = 0;
5177*4882a593Smuzhiyun u32 sff8472_swap = 0;
5178*4882a593Smuzhiyun u32 sff8636_rev = 0;
5179*4882a593Smuzhiyun i40e_status status;
5180*4882a593Smuzhiyun u32 type = 0;
5181*4882a593Smuzhiyun
5182*4882a593Smuzhiyun /* Check if firmware supports reading module EEPROM. */
5183*4882a593Smuzhiyun if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) {
5184*4882a593Smuzhiyun netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n");
5185*4882a593Smuzhiyun return -EINVAL;
5186*4882a593Smuzhiyun }
5187*4882a593Smuzhiyun
5188*4882a593Smuzhiyun status = i40e_update_link_info(hw);
5189*4882a593Smuzhiyun if (status)
5190*4882a593Smuzhiyun return -EIO;
5191*4882a593Smuzhiyun
5192*4882a593Smuzhiyun if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) {
5193*4882a593Smuzhiyun netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n");
5194*4882a593Smuzhiyun return -EINVAL;
5195*4882a593Smuzhiyun }
5196*4882a593Smuzhiyun
5197*4882a593Smuzhiyun type = hw->phy.link_info.module_type[0];
5198*4882a593Smuzhiyun
5199*4882a593Smuzhiyun switch (type) {
5200*4882a593Smuzhiyun case I40E_MODULE_TYPE_SFP:
5201*4882a593Smuzhiyun status = i40e_aq_get_phy_register(hw,
5202*4882a593Smuzhiyun I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5203*4882a593Smuzhiyun I40E_I2C_EEPROM_DEV_ADDR, true,
5204*4882a593Smuzhiyun I40E_MODULE_SFF_8472_COMP,
5205*4882a593Smuzhiyun &sff8472_comp, NULL);
5206*4882a593Smuzhiyun if (status)
5207*4882a593Smuzhiyun return -EIO;
5208*4882a593Smuzhiyun
5209*4882a593Smuzhiyun status = i40e_aq_get_phy_register(hw,
5210*4882a593Smuzhiyun I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5211*4882a593Smuzhiyun I40E_I2C_EEPROM_DEV_ADDR, true,
5212*4882a593Smuzhiyun I40E_MODULE_SFF_8472_SWAP,
5213*4882a593Smuzhiyun &sff8472_swap, NULL);
5214*4882a593Smuzhiyun if (status)
5215*4882a593Smuzhiyun return -EIO;
5216*4882a593Smuzhiyun
5217*4882a593Smuzhiyun /* Check if the module requires address swap to access
5218*4882a593Smuzhiyun * the other EEPROM memory page.
5219*4882a593Smuzhiyun */
5220*4882a593Smuzhiyun if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) {
5221*4882a593Smuzhiyun netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n");
5222*4882a593Smuzhiyun modinfo->type = ETH_MODULE_SFF_8079;
5223*4882a593Smuzhiyun modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5224*4882a593Smuzhiyun } else if (sff8472_comp == 0x00) {
5225*4882a593Smuzhiyun /* Module is not SFF-8472 compliant */
5226*4882a593Smuzhiyun modinfo->type = ETH_MODULE_SFF_8079;
5227*4882a593Smuzhiyun modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5228*4882a593Smuzhiyun } else if (!(sff8472_swap & I40E_MODULE_SFF_DDM_IMPLEMENTED)) {
5229*4882a593Smuzhiyun /* Module is SFF-8472 compliant but doesn't implement
5230*4882a593Smuzhiyun * Digital Diagnostic Monitoring (DDM).
5231*4882a593Smuzhiyun */
5232*4882a593Smuzhiyun modinfo->type = ETH_MODULE_SFF_8079;
5233*4882a593Smuzhiyun modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5234*4882a593Smuzhiyun } else {
5235*4882a593Smuzhiyun modinfo->type = ETH_MODULE_SFF_8472;
5236*4882a593Smuzhiyun modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
5237*4882a593Smuzhiyun }
5238*4882a593Smuzhiyun break;
5239*4882a593Smuzhiyun case I40E_MODULE_TYPE_QSFP_PLUS:
5240*4882a593Smuzhiyun /* Read from memory page 0. */
5241*4882a593Smuzhiyun status = i40e_aq_get_phy_register(hw,
5242*4882a593Smuzhiyun I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5243*4882a593Smuzhiyun 0, true,
5244*4882a593Smuzhiyun I40E_MODULE_REVISION_ADDR,
5245*4882a593Smuzhiyun &sff8636_rev, NULL);
5246*4882a593Smuzhiyun if (status)
5247*4882a593Smuzhiyun return -EIO;
5248*4882a593Smuzhiyun /* Determine revision compliance byte */
5249*4882a593Smuzhiyun if (sff8636_rev > 0x02) {
5250*4882a593Smuzhiyun /* Module is SFF-8636 compliant */
5251*4882a593Smuzhiyun modinfo->type = ETH_MODULE_SFF_8636;
5252*4882a593Smuzhiyun modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5253*4882a593Smuzhiyun } else {
5254*4882a593Smuzhiyun modinfo->type = ETH_MODULE_SFF_8436;
5255*4882a593Smuzhiyun modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5256*4882a593Smuzhiyun }
5257*4882a593Smuzhiyun break;
5258*4882a593Smuzhiyun case I40E_MODULE_TYPE_QSFP28:
5259*4882a593Smuzhiyun modinfo->type = ETH_MODULE_SFF_8636;
5260*4882a593Smuzhiyun modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5261*4882a593Smuzhiyun break;
5262*4882a593Smuzhiyun default:
5263*4882a593Smuzhiyun netdev_err(vsi->netdev, "Module type unrecognized\n");
5264*4882a593Smuzhiyun return -EINVAL;
5265*4882a593Smuzhiyun }
5266*4882a593Smuzhiyun return 0;
5267*4882a593Smuzhiyun }
5268*4882a593Smuzhiyun
5269*4882a593Smuzhiyun /**
5270*4882a593Smuzhiyun * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents
5271*4882a593Smuzhiyun * @netdev: network interface device structure
5272*4882a593Smuzhiyun * @ee: EEPROM dump request structure
5273*4882a593Smuzhiyun * @data: buffer to be filled with EEPROM contents
5274*4882a593Smuzhiyun **/
i40e_get_module_eeprom(struct net_device * netdev,struct ethtool_eeprom * ee,u8 * data)5275*4882a593Smuzhiyun static int i40e_get_module_eeprom(struct net_device *netdev,
5276*4882a593Smuzhiyun struct ethtool_eeprom *ee,
5277*4882a593Smuzhiyun u8 *data)
5278*4882a593Smuzhiyun {
5279*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
5280*4882a593Smuzhiyun struct i40e_vsi *vsi = np->vsi;
5281*4882a593Smuzhiyun struct i40e_pf *pf = vsi->back;
5282*4882a593Smuzhiyun struct i40e_hw *hw = &pf->hw;
5283*4882a593Smuzhiyun bool is_sfp = false;
5284*4882a593Smuzhiyun i40e_status status;
5285*4882a593Smuzhiyun u32 value = 0;
5286*4882a593Smuzhiyun int i;
5287*4882a593Smuzhiyun
5288*4882a593Smuzhiyun if (!ee || !ee->len || !data)
5289*4882a593Smuzhiyun return -EINVAL;
5290*4882a593Smuzhiyun
5291*4882a593Smuzhiyun if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP)
5292*4882a593Smuzhiyun is_sfp = true;
5293*4882a593Smuzhiyun
5294*4882a593Smuzhiyun for (i = 0; i < ee->len; i++) {
5295*4882a593Smuzhiyun u32 offset = i + ee->offset;
5296*4882a593Smuzhiyun u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0;
5297*4882a593Smuzhiyun
5298*4882a593Smuzhiyun /* Check if we need to access the other memory page */
5299*4882a593Smuzhiyun if (is_sfp) {
5300*4882a593Smuzhiyun if (offset >= ETH_MODULE_SFF_8079_LEN) {
5301*4882a593Smuzhiyun offset -= ETH_MODULE_SFF_8079_LEN;
5302*4882a593Smuzhiyun addr = I40E_I2C_EEPROM_DEV_ADDR2;
5303*4882a593Smuzhiyun }
5304*4882a593Smuzhiyun } else {
5305*4882a593Smuzhiyun while (offset >= ETH_MODULE_SFF_8436_LEN) {
5306*4882a593Smuzhiyun /* Compute memory page number and offset. */
5307*4882a593Smuzhiyun offset -= ETH_MODULE_SFF_8436_LEN / 2;
5308*4882a593Smuzhiyun addr++;
5309*4882a593Smuzhiyun }
5310*4882a593Smuzhiyun }
5311*4882a593Smuzhiyun
5312*4882a593Smuzhiyun status = i40e_aq_get_phy_register(hw,
5313*4882a593Smuzhiyun I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5314*4882a593Smuzhiyun addr, true, offset, &value, NULL);
5315*4882a593Smuzhiyun if (status)
5316*4882a593Smuzhiyun return -EIO;
5317*4882a593Smuzhiyun data[i] = value;
5318*4882a593Smuzhiyun }
5319*4882a593Smuzhiyun return 0;
5320*4882a593Smuzhiyun }
5321*4882a593Smuzhiyun
i40e_get_eee(struct net_device * netdev,struct ethtool_eee * edata)5322*4882a593Smuzhiyun static int i40e_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
5323*4882a593Smuzhiyun {
5324*4882a593Smuzhiyun return -EOPNOTSUPP;
5325*4882a593Smuzhiyun }
5326*4882a593Smuzhiyun
i40e_set_eee(struct net_device * netdev,struct ethtool_eee * edata)5327*4882a593Smuzhiyun static int i40e_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
5328*4882a593Smuzhiyun {
5329*4882a593Smuzhiyun return -EOPNOTSUPP;
5330*4882a593Smuzhiyun }
5331*4882a593Smuzhiyun
5332*4882a593Smuzhiyun static const struct ethtool_ops i40e_ethtool_recovery_mode_ops = {
5333*4882a593Smuzhiyun .get_drvinfo = i40e_get_drvinfo,
5334*4882a593Smuzhiyun .set_eeprom = i40e_set_eeprom,
5335*4882a593Smuzhiyun .get_eeprom_len = i40e_get_eeprom_len,
5336*4882a593Smuzhiyun .get_eeprom = i40e_get_eeprom,
5337*4882a593Smuzhiyun };
5338*4882a593Smuzhiyun
5339*4882a593Smuzhiyun static const struct ethtool_ops i40e_ethtool_ops = {
5340*4882a593Smuzhiyun .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
5341*4882a593Smuzhiyun ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
5342*4882a593Smuzhiyun ETHTOOL_COALESCE_USE_ADAPTIVE |
5343*4882a593Smuzhiyun ETHTOOL_COALESCE_RX_USECS_HIGH |
5344*4882a593Smuzhiyun ETHTOOL_COALESCE_TX_USECS_HIGH,
5345*4882a593Smuzhiyun .get_drvinfo = i40e_get_drvinfo,
5346*4882a593Smuzhiyun .get_regs_len = i40e_get_regs_len,
5347*4882a593Smuzhiyun .get_regs = i40e_get_regs,
5348*4882a593Smuzhiyun .nway_reset = i40e_nway_reset,
5349*4882a593Smuzhiyun .get_link = ethtool_op_get_link,
5350*4882a593Smuzhiyun .get_wol = i40e_get_wol,
5351*4882a593Smuzhiyun .set_wol = i40e_set_wol,
5352*4882a593Smuzhiyun .set_eeprom = i40e_set_eeprom,
5353*4882a593Smuzhiyun .get_eeprom_len = i40e_get_eeprom_len,
5354*4882a593Smuzhiyun .get_eeprom = i40e_get_eeprom,
5355*4882a593Smuzhiyun .get_ringparam = i40e_get_ringparam,
5356*4882a593Smuzhiyun .set_ringparam = i40e_set_ringparam,
5357*4882a593Smuzhiyun .get_pauseparam = i40e_get_pauseparam,
5358*4882a593Smuzhiyun .set_pauseparam = i40e_set_pauseparam,
5359*4882a593Smuzhiyun .get_msglevel = i40e_get_msglevel,
5360*4882a593Smuzhiyun .set_msglevel = i40e_set_msglevel,
5361*4882a593Smuzhiyun .get_rxnfc = i40e_get_rxnfc,
5362*4882a593Smuzhiyun .set_rxnfc = i40e_set_rxnfc,
5363*4882a593Smuzhiyun .self_test = i40e_diag_test,
5364*4882a593Smuzhiyun .get_strings = i40e_get_strings,
5365*4882a593Smuzhiyun .get_eee = i40e_get_eee,
5366*4882a593Smuzhiyun .set_eee = i40e_set_eee,
5367*4882a593Smuzhiyun .set_phys_id = i40e_set_phys_id,
5368*4882a593Smuzhiyun .get_sset_count = i40e_get_sset_count,
5369*4882a593Smuzhiyun .get_ethtool_stats = i40e_get_ethtool_stats,
5370*4882a593Smuzhiyun .get_coalesce = i40e_get_coalesce,
5371*4882a593Smuzhiyun .set_coalesce = i40e_set_coalesce,
5372*4882a593Smuzhiyun .get_rxfh_key_size = i40e_get_rxfh_key_size,
5373*4882a593Smuzhiyun .get_rxfh_indir_size = i40e_get_rxfh_indir_size,
5374*4882a593Smuzhiyun .get_rxfh = i40e_get_rxfh,
5375*4882a593Smuzhiyun .set_rxfh = i40e_set_rxfh,
5376*4882a593Smuzhiyun .get_channels = i40e_get_channels,
5377*4882a593Smuzhiyun .set_channels = i40e_set_channels,
5378*4882a593Smuzhiyun .get_module_info = i40e_get_module_info,
5379*4882a593Smuzhiyun .get_module_eeprom = i40e_get_module_eeprom,
5380*4882a593Smuzhiyun .get_ts_info = i40e_get_ts_info,
5381*4882a593Smuzhiyun .get_priv_flags = i40e_get_priv_flags,
5382*4882a593Smuzhiyun .set_priv_flags = i40e_set_priv_flags,
5383*4882a593Smuzhiyun .get_per_queue_coalesce = i40e_get_per_queue_coalesce,
5384*4882a593Smuzhiyun .set_per_queue_coalesce = i40e_set_per_queue_coalesce,
5385*4882a593Smuzhiyun .get_link_ksettings = i40e_get_link_ksettings,
5386*4882a593Smuzhiyun .set_link_ksettings = i40e_set_link_ksettings,
5387*4882a593Smuzhiyun .get_fecparam = i40e_get_fec_param,
5388*4882a593Smuzhiyun .set_fecparam = i40e_set_fec_param,
5389*4882a593Smuzhiyun .flash_device = i40e_ddp_flash,
5390*4882a593Smuzhiyun };
5391*4882a593Smuzhiyun
i40e_set_ethtool_ops(struct net_device * netdev)5392*4882a593Smuzhiyun void i40e_set_ethtool_ops(struct net_device *netdev)
5393*4882a593Smuzhiyun {
5394*4882a593Smuzhiyun struct i40e_netdev_priv *np = netdev_priv(netdev);
5395*4882a593Smuzhiyun struct i40e_pf *pf = np->vsi->back;
5396*4882a593Smuzhiyun
5397*4882a593Smuzhiyun if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
5398*4882a593Smuzhiyun netdev->ethtool_ops = &i40e_ethtool_ops;
5399*4882a593Smuzhiyun else
5400*4882a593Smuzhiyun netdev->ethtool_ops = &i40e_ethtool_recovery_mode_ops;
5401*4882a593Smuzhiyun }
5402