1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* Copyright(c) 1999 - 2018 Intel Corporation. */
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun /* ethtool support for e1000 */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/netdevice.h>
7*4882a593Smuzhiyun #include <linux/interrupt.h>
8*4882a593Smuzhiyun #include <linux/ethtool.h>
9*4882a593Smuzhiyun #include <linux/pci.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/vmalloc.h>
13*4882a593Smuzhiyun #include <linux/pm_runtime.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "e1000.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun enum { NETDEV_STATS, E1000_STATS };
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun struct e1000_stats {
20*4882a593Smuzhiyun char stat_string[ETH_GSTRING_LEN];
21*4882a593Smuzhiyun int type;
22*4882a593Smuzhiyun int sizeof_stat;
23*4882a593Smuzhiyun int stat_offset;
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun static const char e1000e_priv_flags_strings[][ETH_GSTRING_LEN] = {
27*4882a593Smuzhiyun #define E1000E_PRIV_FLAGS_S0IX_ENABLED BIT(0)
28*4882a593Smuzhiyun "s0ix-enabled",
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define E1000E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(e1000e_priv_flags_strings)
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define E1000_STAT(str, m) { \
34*4882a593Smuzhiyun .stat_string = str, \
35*4882a593Smuzhiyun .type = E1000_STATS, \
36*4882a593Smuzhiyun .sizeof_stat = sizeof(((struct e1000_adapter *)0)->m), \
37*4882a593Smuzhiyun .stat_offset = offsetof(struct e1000_adapter, m) }
38*4882a593Smuzhiyun #define E1000_NETDEV_STAT(str, m) { \
39*4882a593Smuzhiyun .stat_string = str, \
40*4882a593Smuzhiyun .type = NETDEV_STATS, \
41*4882a593Smuzhiyun .sizeof_stat = sizeof(((struct rtnl_link_stats64 *)0)->m), \
42*4882a593Smuzhiyun .stat_offset = offsetof(struct rtnl_link_stats64, m) }
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun static const struct e1000_stats e1000_gstrings_stats[] = {
45*4882a593Smuzhiyun E1000_STAT("rx_packets", stats.gprc),
46*4882a593Smuzhiyun E1000_STAT("tx_packets", stats.gptc),
47*4882a593Smuzhiyun E1000_STAT("rx_bytes", stats.gorc),
48*4882a593Smuzhiyun E1000_STAT("tx_bytes", stats.gotc),
49*4882a593Smuzhiyun E1000_STAT("rx_broadcast", stats.bprc),
50*4882a593Smuzhiyun E1000_STAT("tx_broadcast", stats.bptc),
51*4882a593Smuzhiyun E1000_STAT("rx_multicast", stats.mprc),
52*4882a593Smuzhiyun E1000_STAT("tx_multicast", stats.mptc),
53*4882a593Smuzhiyun E1000_NETDEV_STAT("rx_errors", rx_errors),
54*4882a593Smuzhiyun E1000_NETDEV_STAT("tx_errors", tx_errors),
55*4882a593Smuzhiyun E1000_NETDEV_STAT("tx_dropped", tx_dropped),
56*4882a593Smuzhiyun E1000_STAT("multicast", stats.mprc),
57*4882a593Smuzhiyun E1000_STAT("collisions", stats.colc),
58*4882a593Smuzhiyun E1000_NETDEV_STAT("rx_length_errors", rx_length_errors),
59*4882a593Smuzhiyun E1000_NETDEV_STAT("rx_over_errors", rx_over_errors),
60*4882a593Smuzhiyun E1000_STAT("rx_crc_errors", stats.crcerrs),
61*4882a593Smuzhiyun E1000_NETDEV_STAT("rx_frame_errors", rx_frame_errors),
62*4882a593Smuzhiyun E1000_STAT("rx_no_buffer_count", stats.rnbc),
63*4882a593Smuzhiyun E1000_STAT("rx_missed_errors", stats.mpc),
64*4882a593Smuzhiyun E1000_STAT("tx_aborted_errors", stats.ecol),
65*4882a593Smuzhiyun E1000_STAT("tx_carrier_errors", stats.tncrs),
66*4882a593Smuzhiyun E1000_NETDEV_STAT("tx_fifo_errors", tx_fifo_errors),
67*4882a593Smuzhiyun E1000_NETDEV_STAT("tx_heartbeat_errors", tx_heartbeat_errors),
68*4882a593Smuzhiyun E1000_STAT("tx_window_errors", stats.latecol),
69*4882a593Smuzhiyun E1000_STAT("tx_abort_late_coll", stats.latecol),
70*4882a593Smuzhiyun E1000_STAT("tx_deferred_ok", stats.dc),
71*4882a593Smuzhiyun E1000_STAT("tx_single_coll_ok", stats.scc),
72*4882a593Smuzhiyun E1000_STAT("tx_multi_coll_ok", stats.mcc),
73*4882a593Smuzhiyun E1000_STAT("tx_timeout_count", tx_timeout_count),
74*4882a593Smuzhiyun E1000_STAT("tx_restart_queue", restart_queue),
75*4882a593Smuzhiyun E1000_STAT("rx_long_length_errors", stats.roc),
76*4882a593Smuzhiyun E1000_STAT("rx_short_length_errors", stats.ruc),
77*4882a593Smuzhiyun E1000_STAT("rx_align_errors", stats.algnerrc),
78*4882a593Smuzhiyun E1000_STAT("tx_tcp_seg_good", stats.tsctc),
79*4882a593Smuzhiyun E1000_STAT("tx_tcp_seg_failed", stats.tsctfc),
80*4882a593Smuzhiyun E1000_STAT("rx_flow_control_xon", stats.xonrxc),
81*4882a593Smuzhiyun E1000_STAT("rx_flow_control_xoff", stats.xoffrxc),
82*4882a593Smuzhiyun E1000_STAT("tx_flow_control_xon", stats.xontxc),
83*4882a593Smuzhiyun E1000_STAT("tx_flow_control_xoff", stats.xofftxc),
84*4882a593Smuzhiyun E1000_STAT("rx_csum_offload_good", hw_csum_good),
85*4882a593Smuzhiyun E1000_STAT("rx_csum_offload_errors", hw_csum_err),
86*4882a593Smuzhiyun E1000_STAT("rx_header_split", rx_hdr_split),
87*4882a593Smuzhiyun E1000_STAT("alloc_rx_buff_failed", alloc_rx_buff_failed),
88*4882a593Smuzhiyun E1000_STAT("tx_smbus", stats.mgptc),
89*4882a593Smuzhiyun E1000_STAT("rx_smbus", stats.mgprc),
90*4882a593Smuzhiyun E1000_STAT("dropped_smbus", stats.mgpdc),
91*4882a593Smuzhiyun E1000_STAT("rx_dma_failed", rx_dma_failed),
92*4882a593Smuzhiyun E1000_STAT("tx_dma_failed", tx_dma_failed),
93*4882a593Smuzhiyun E1000_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
94*4882a593Smuzhiyun E1000_STAT("uncorr_ecc_errors", uncorr_errors),
95*4882a593Smuzhiyun E1000_STAT("corr_ecc_errors", corr_errors),
96*4882a593Smuzhiyun E1000_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
97*4882a593Smuzhiyun E1000_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun #define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
101*4882a593Smuzhiyun #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN)
102*4882a593Smuzhiyun static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
103*4882a593Smuzhiyun "Register test (offline)", "Eeprom test (offline)",
104*4882a593Smuzhiyun "Interrupt test (offline)", "Loopback test (offline)",
105*4882a593Smuzhiyun "Link test (on/offline)"
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun #define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
109*4882a593Smuzhiyun
e1000_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)110*4882a593Smuzhiyun static int e1000_get_link_ksettings(struct net_device *netdev,
111*4882a593Smuzhiyun struct ethtool_link_ksettings *cmd)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
114*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
115*4882a593Smuzhiyun u32 speed, supported, advertising;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun if (hw->phy.media_type == e1000_media_type_copper) {
118*4882a593Smuzhiyun supported = (SUPPORTED_10baseT_Half |
119*4882a593Smuzhiyun SUPPORTED_10baseT_Full |
120*4882a593Smuzhiyun SUPPORTED_100baseT_Half |
121*4882a593Smuzhiyun SUPPORTED_100baseT_Full |
122*4882a593Smuzhiyun SUPPORTED_1000baseT_Full |
123*4882a593Smuzhiyun SUPPORTED_Autoneg |
124*4882a593Smuzhiyun SUPPORTED_TP);
125*4882a593Smuzhiyun if (hw->phy.type == e1000_phy_ife)
126*4882a593Smuzhiyun supported &= ~SUPPORTED_1000baseT_Full;
127*4882a593Smuzhiyun advertising = ADVERTISED_TP;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun if (hw->mac.autoneg == 1) {
130*4882a593Smuzhiyun advertising |= ADVERTISED_Autoneg;
131*4882a593Smuzhiyun /* the e1000 autoneg seems to match ethtool nicely */
132*4882a593Smuzhiyun advertising |= hw->phy.autoneg_advertised;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun cmd->base.port = PORT_TP;
136*4882a593Smuzhiyun cmd->base.phy_address = hw->phy.addr;
137*4882a593Smuzhiyun } else {
138*4882a593Smuzhiyun supported = (SUPPORTED_1000baseT_Full |
139*4882a593Smuzhiyun SUPPORTED_FIBRE |
140*4882a593Smuzhiyun SUPPORTED_Autoneg);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun advertising = (ADVERTISED_1000baseT_Full |
143*4882a593Smuzhiyun ADVERTISED_FIBRE |
144*4882a593Smuzhiyun ADVERTISED_Autoneg);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun cmd->base.port = PORT_FIBRE;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun speed = SPEED_UNKNOWN;
150*4882a593Smuzhiyun cmd->base.duplex = DUPLEX_UNKNOWN;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun if (netif_running(netdev)) {
153*4882a593Smuzhiyun if (netif_carrier_ok(netdev)) {
154*4882a593Smuzhiyun speed = adapter->link_speed;
155*4882a593Smuzhiyun cmd->base.duplex = adapter->link_duplex - 1;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun } else if (!pm_runtime_suspended(netdev->dev.parent)) {
158*4882a593Smuzhiyun u32 status = er32(STATUS);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun if (status & E1000_STATUS_LU) {
161*4882a593Smuzhiyun if (status & E1000_STATUS_SPEED_1000)
162*4882a593Smuzhiyun speed = SPEED_1000;
163*4882a593Smuzhiyun else if (status & E1000_STATUS_SPEED_100)
164*4882a593Smuzhiyun speed = SPEED_100;
165*4882a593Smuzhiyun else
166*4882a593Smuzhiyun speed = SPEED_10;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (status & E1000_STATUS_FD)
169*4882a593Smuzhiyun cmd->base.duplex = DUPLEX_FULL;
170*4882a593Smuzhiyun else
171*4882a593Smuzhiyun cmd->base.duplex = DUPLEX_HALF;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun cmd->base.speed = speed;
176*4882a593Smuzhiyun cmd->base.autoneg = ((hw->phy.media_type == e1000_media_type_fiber) ||
177*4882a593Smuzhiyun hw->mac.autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /* MDI-X => 2; MDI =>1; Invalid =>0 */
180*4882a593Smuzhiyun if ((hw->phy.media_type == e1000_media_type_copper) &&
181*4882a593Smuzhiyun netif_carrier_ok(netdev))
182*4882a593Smuzhiyun cmd->base.eth_tp_mdix = hw->phy.is_mdix ?
183*4882a593Smuzhiyun ETH_TP_MDI_X : ETH_TP_MDI;
184*4882a593Smuzhiyun else
185*4882a593Smuzhiyun cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun if (hw->phy.mdix == AUTO_ALL_MODES)
188*4882a593Smuzhiyun cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
189*4882a593Smuzhiyun else
190*4882a593Smuzhiyun cmd->base.eth_tp_mdix_ctrl = hw->phy.mdix;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun if (hw->phy.media_type != e1000_media_type_copper)
193*4882a593Smuzhiyun cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
196*4882a593Smuzhiyun supported);
197*4882a593Smuzhiyun ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
198*4882a593Smuzhiyun advertising);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
e1000_set_spd_dplx(struct e1000_adapter * adapter,u32 spd,u8 dplx)203*4882a593Smuzhiyun static int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun struct e1000_mac_info *mac = &adapter->hw.mac;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun mac->autoneg = 0;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /* Make sure dplx is at most 1 bit and lsb of speed is not set
210*4882a593Smuzhiyun * for the switch() below to work
211*4882a593Smuzhiyun */
212*4882a593Smuzhiyun if ((spd & 1) || (dplx & ~1))
213*4882a593Smuzhiyun goto err_inval;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun /* Fiber NICs only allow 1000 gbps Full duplex */
216*4882a593Smuzhiyun if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
217*4882a593Smuzhiyun (spd != SPEED_1000) && (dplx != DUPLEX_FULL)) {
218*4882a593Smuzhiyun goto err_inval;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun switch (spd + dplx) {
222*4882a593Smuzhiyun case SPEED_10 + DUPLEX_HALF:
223*4882a593Smuzhiyun mac->forced_speed_duplex = ADVERTISE_10_HALF;
224*4882a593Smuzhiyun break;
225*4882a593Smuzhiyun case SPEED_10 + DUPLEX_FULL:
226*4882a593Smuzhiyun mac->forced_speed_duplex = ADVERTISE_10_FULL;
227*4882a593Smuzhiyun break;
228*4882a593Smuzhiyun case SPEED_100 + DUPLEX_HALF:
229*4882a593Smuzhiyun mac->forced_speed_duplex = ADVERTISE_100_HALF;
230*4882a593Smuzhiyun break;
231*4882a593Smuzhiyun case SPEED_100 + DUPLEX_FULL:
232*4882a593Smuzhiyun mac->forced_speed_duplex = ADVERTISE_100_FULL;
233*4882a593Smuzhiyun break;
234*4882a593Smuzhiyun case SPEED_1000 + DUPLEX_FULL:
235*4882a593Smuzhiyun if (adapter->hw.phy.media_type == e1000_media_type_copper) {
236*4882a593Smuzhiyun mac->autoneg = 1;
237*4882a593Smuzhiyun adapter->hw.phy.autoneg_advertised =
238*4882a593Smuzhiyun ADVERTISE_1000_FULL;
239*4882a593Smuzhiyun } else {
240*4882a593Smuzhiyun mac->forced_speed_duplex = ADVERTISE_1000_FULL;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun break;
243*4882a593Smuzhiyun case SPEED_1000 + DUPLEX_HALF: /* not supported */
244*4882a593Smuzhiyun default:
245*4882a593Smuzhiyun goto err_inval;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
249*4882a593Smuzhiyun adapter->hw.phy.mdix = AUTO_ALL_MODES;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun return 0;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun err_inval:
254*4882a593Smuzhiyun e_err("Unsupported Speed/Duplex configuration\n");
255*4882a593Smuzhiyun return -EINVAL;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
e1000_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)258*4882a593Smuzhiyun static int e1000_set_link_ksettings(struct net_device *netdev,
259*4882a593Smuzhiyun const struct ethtool_link_ksettings *cmd)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
262*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
263*4882a593Smuzhiyun int ret_val = 0;
264*4882a593Smuzhiyun u32 advertising;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun ethtool_convert_link_mode_to_legacy_u32(&advertising,
267*4882a593Smuzhiyun cmd->link_modes.advertising);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun /* When SoL/IDER sessions are active, autoneg/speed/duplex
272*4882a593Smuzhiyun * cannot be changed
273*4882a593Smuzhiyun */
274*4882a593Smuzhiyun if (hw->phy.ops.check_reset_block &&
275*4882a593Smuzhiyun hw->phy.ops.check_reset_block(hw)) {
276*4882a593Smuzhiyun e_err("Cannot change link characteristics when SoL/IDER is active.\n");
277*4882a593Smuzhiyun ret_val = -EINVAL;
278*4882a593Smuzhiyun goto out;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun /* MDI setting is only allowed when autoneg enabled because
282*4882a593Smuzhiyun * some hardware doesn't allow MDI setting when speed or
283*4882a593Smuzhiyun * duplex is forced.
284*4882a593Smuzhiyun */
285*4882a593Smuzhiyun if (cmd->base.eth_tp_mdix_ctrl) {
286*4882a593Smuzhiyun if (hw->phy.media_type != e1000_media_type_copper) {
287*4882a593Smuzhiyun ret_val = -EOPNOTSUPP;
288*4882a593Smuzhiyun goto out;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun if ((cmd->base.eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
292*4882a593Smuzhiyun (cmd->base.autoneg != AUTONEG_ENABLE)) {
293*4882a593Smuzhiyun e_err("forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
294*4882a593Smuzhiyun ret_val = -EINVAL;
295*4882a593Smuzhiyun goto out;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
300*4882a593Smuzhiyun usleep_range(1000, 2000);
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun if (cmd->base.autoneg == AUTONEG_ENABLE) {
303*4882a593Smuzhiyun hw->mac.autoneg = 1;
304*4882a593Smuzhiyun if (hw->phy.media_type == e1000_media_type_fiber)
305*4882a593Smuzhiyun hw->phy.autoneg_advertised = ADVERTISED_1000baseT_Full |
306*4882a593Smuzhiyun ADVERTISED_FIBRE | ADVERTISED_Autoneg;
307*4882a593Smuzhiyun else
308*4882a593Smuzhiyun hw->phy.autoneg_advertised = advertising |
309*4882a593Smuzhiyun ADVERTISED_TP | ADVERTISED_Autoneg;
310*4882a593Smuzhiyun advertising = hw->phy.autoneg_advertised;
311*4882a593Smuzhiyun if (adapter->fc_autoneg)
312*4882a593Smuzhiyun hw->fc.requested_mode = e1000_fc_default;
313*4882a593Smuzhiyun } else {
314*4882a593Smuzhiyun u32 speed = cmd->base.speed;
315*4882a593Smuzhiyun /* calling this overrides forced MDI setting */
316*4882a593Smuzhiyun if (e1000_set_spd_dplx(adapter, speed, cmd->base.duplex)) {
317*4882a593Smuzhiyun ret_val = -EINVAL;
318*4882a593Smuzhiyun goto out;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun /* MDI-X => 2; MDI => 1; Auto => 3 */
323*4882a593Smuzhiyun if (cmd->base.eth_tp_mdix_ctrl) {
324*4882a593Smuzhiyun /* fix up the value for auto (3 => 0) as zero is mapped
325*4882a593Smuzhiyun * internally to auto
326*4882a593Smuzhiyun */
327*4882a593Smuzhiyun if (cmd->base.eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
328*4882a593Smuzhiyun hw->phy.mdix = AUTO_ALL_MODES;
329*4882a593Smuzhiyun else
330*4882a593Smuzhiyun hw->phy.mdix = cmd->base.eth_tp_mdix_ctrl;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun /* reset the link */
334*4882a593Smuzhiyun if (netif_running(adapter->netdev)) {
335*4882a593Smuzhiyun e1000e_down(adapter, true);
336*4882a593Smuzhiyun e1000e_up(adapter);
337*4882a593Smuzhiyun } else {
338*4882a593Smuzhiyun e1000e_reset(adapter);
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun out:
342*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
343*4882a593Smuzhiyun clear_bit(__E1000_RESETTING, &adapter->state);
344*4882a593Smuzhiyun return ret_val;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
e1000_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)347*4882a593Smuzhiyun static void e1000_get_pauseparam(struct net_device *netdev,
348*4882a593Smuzhiyun struct ethtool_pauseparam *pause)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
351*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun pause->autoneg =
354*4882a593Smuzhiyun (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun if (hw->fc.current_mode == e1000_fc_rx_pause) {
357*4882a593Smuzhiyun pause->rx_pause = 1;
358*4882a593Smuzhiyun } else if (hw->fc.current_mode == e1000_fc_tx_pause) {
359*4882a593Smuzhiyun pause->tx_pause = 1;
360*4882a593Smuzhiyun } else if (hw->fc.current_mode == e1000_fc_full) {
361*4882a593Smuzhiyun pause->rx_pause = 1;
362*4882a593Smuzhiyun pause->tx_pause = 1;
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
e1000_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)366*4882a593Smuzhiyun static int e1000_set_pauseparam(struct net_device *netdev,
367*4882a593Smuzhiyun struct ethtool_pauseparam *pause)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
370*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
371*4882a593Smuzhiyun int retval = 0;
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun adapter->fc_autoneg = pause->autoneg;
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
376*4882a593Smuzhiyun usleep_range(1000, 2000);
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun if (adapter->fc_autoneg == AUTONEG_ENABLE) {
381*4882a593Smuzhiyun hw->fc.requested_mode = e1000_fc_default;
382*4882a593Smuzhiyun if (netif_running(adapter->netdev)) {
383*4882a593Smuzhiyun e1000e_down(adapter, true);
384*4882a593Smuzhiyun e1000e_up(adapter);
385*4882a593Smuzhiyun } else {
386*4882a593Smuzhiyun e1000e_reset(adapter);
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun } else {
389*4882a593Smuzhiyun if (pause->rx_pause && pause->tx_pause)
390*4882a593Smuzhiyun hw->fc.requested_mode = e1000_fc_full;
391*4882a593Smuzhiyun else if (pause->rx_pause && !pause->tx_pause)
392*4882a593Smuzhiyun hw->fc.requested_mode = e1000_fc_rx_pause;
393*4882a593Smuzhiyun else if (!pause->rx_pause && pause->tx_pause)
394*4882a593Smuzhiyun hw->fc.requested_mode = e1000_fc_tx_pause;
395*4882a593Smuzhiyun else if (!pause->rx_pause && !pause->tx_pause)
396*4882a593Smuzhiyun hw->fc.requested_mode = e1000_fc_none;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun hw->fc.current_mode = hw->fc.requested_mode;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun if (hw->phy.media_type == e1000_media_type_fiber) {
401*4882a593Smuzhiyun retval = hw->mac.ops.setup_link(hw);
402*4882a593Smuzhiyun /* implicit goto out */
403*4882a593Smuzhiyun } else {
404*4882a593Smuzhiyun retval = e1000e_force_mac_fc(hw);
405*4882a593Smuzhiyun if (retval)
406*4882a593Smuzhiyun goto out;
407*4882a593Smuzhiyun e1000e_set_fc_watermarks(hw);
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun out:
412*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
413*4882a593Smuzhiyun clear_bit(__E1000_RESETTING, &adapter->state);
414*4882a593Smuzhiyun return retval;
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun
e1000_get_msglevel(struct net_device * netdev)417*4882a593Smuzhiyun static u32 e1000_get_msglevel(struct net_device *netdev)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
420*4882a593Smuzhiyun return adapter->msg_enable;
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun
e1000_set_msglevel(struct net_device * netdev,u32 data)423*4882a593Smuzhiyun static void e1000_set_msglevel(struct net_device *netdev, u32 data)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
426*4882a593Smuzhiyun adapter->msg_enable = data;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun
e1000_get_regs_len(struct net_device __always_unused * netdev)429*4882a593Smuzhiyun static int e1000_get_regs_len(struct net_device __always_unused *netdev)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun #define E1000_REGS_LEN 32 /* overestimate */
432*4882a593Smuzhiyun return E1000_REGS_LEN * sizeof(u32);
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun
e1000_get_regs(struct net_device * netdev,struct ethtool_regs * regs,void * p)435*4882a593Smuzhiyun static void e1000_get_regs(struct net_device *netdev,
436*4882a593Smuzhiyun struct ethtool_regs *regs, void *p)
437*4882a593Smuzhiyun {
438*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
439*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
440*4882a593Smuzhiyun u32 *regs_buff = p;
441*4882a593Smuzhiyun u16 phy_data;
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun memset(p, 0, E1000_REGS_LEN * sizeof(u32));
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun regs->version = (1u << 24) |
448*4882a593Smuzhiyun (adapter->pdev->revision << 16) |
449*4882a593Smuzhiyun adapter->pdev->device;
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun regs_buff[0] = er32(CTRL);
452*4882a593Smuzhiyun regs_buff[1] = er32(STATUS);
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun regs_buff[2] = er32(RCTL);
455*4882a593Smuzhiyun regs_buff[3] = er32(RDLEN(0));
456*4882a593Smuzhiyun regs_buff[4] = er32(RDH(0));
457*4882a593Smuzhiyun regs_buff[5] = er32(RDT(0));
458*4882a593Smuzhiyun regs_buff[6] = er32(RDTR);
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun regs_buff[7] = er32(TCTL);
461*4882a593Smuzhiyun regs_buff[8] = er32(TDLEN(0));
462*4882a593Smuzhiyun regs_buff[9] = er32(TDH(0));
463*4882a593Smuzhiyun regs_buff[10] = er32(TDT(0));
464*4882a593Smuzhiyun regs_buff[11] = er32(TIDV);
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun regs_buff[12] = adapter->hw.phy.type; /* PHY type (IGP=1, M88=0) */
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun /* ethtool doesn't use anything past this point, so all this
469*4882a593Smuzhiyun * code is likely legacy junk for apps that may or may not exist
470*4882a593Smuzhiyun */
471*4882a593Smuzhiyun if (hw->phy.type == e1000_phy_m88) {
472*4882a593Smuzhiyun e1e_rphy(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
473*4882a593Smuzhiyun regs_buff[13] = (u32)phy_data; /* cable length */
474*4882a593Smuzhiyun regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
475*4882a593Smuzhiyun regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
476*4882a593Smuzhiyun regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
477*4882a593Smuzhiyun e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
478*4882a593Smuzhiyun regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
479*4882a593Smuzhiyun regs_buff[18] = regs_buff[13]; /* cable polarity */
480*4882a593Smuzhiyun regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
481*4882a593Smuzhiyun regs_buff[20] = regs_buff[17]; /* polarity correction */
482*4882a593Smuzhiyun /* phy receive errors */
483*4882a593Smuzhiyun regs_buff[22] = adapter->phy_stats.receive_errors;
484*4882a593Smuzhiyun regs_buff[23] = regs_buff[13]; /* mdix mode */
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun regs_buff[21] = 0; /* was idle_errors */
487*4882a593Smuzhiyun e1e_rphy(hw, MII_STAT1000, &phy_data);
488*4882a593Smuzhiyun regs_buff[24] = (u32)phy_data; /* phy local receiver status */
489*4882a593Smuzhiyun regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
e1000_get_eeprom_len(struct net_device * netdev)494*4882a593Smuzhiyun static int e1000_get_eeprom_len(struct net_device *netdev)
495*4882a593Smuzhiyun {
496*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
497*4882a593Smuzhiyun return adapter->hw.nvm.word_size * 2;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun
e1000_get_eeprom(struct net_device * netdev,struct ethtool_eeprom * eeprom,u8 * bytes)500*4882a593Smuzhiyun static int e1000_get_eeprom(struct net_device *netdev,
501*4882a593Smuzhiyun struct ethtool_eeprom *eeprom, u8 *bytes)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
504*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
505*4882a593Smuzhiyun u16 *eeprom_buff;
506*4882a593Smuzhiyun int first_word;
507*4882a593Smuzhiyun int last_word;
508*4882a593Smuzhiyun int ret_val = 0;
509*4882a593Smuzhiyun u16 i;
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun if (eeprom->len == 0)
512*4882a593Smuzhiyun return -EINVAL;
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun eeprom->magic = adapter->pdev->vendor | (adapter->pdev->device << 16);
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun first_word = eeprom->offset >> 1;
517*4882a593Smuzhiyun last_word = (eeprom->offset + eeprom->len - 1) >> 1;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
520*4882a593Smuzhiyun GFP_KERNEL);
521*4882a593Smuzhiyun if (!eeprom_buff)
522*4882a593Smuzhiyun return -ENOMEM;
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun if (hw->nvm.type == e1000_nvm_eeprom_spi) {
527*4882a593Smuzhiyun ret_val = e1000_read_nvm(hw, first_word,
528*4882a593Smuzhiyun last_word - first_word + 1,
529*4882a593Smuzhiyun eeprom_buff);
530*4882a593Smuzhiyun } else {
531*4882a593Smuzhiyun for (i = 0; i < last_word - first_word + 1; i++) {
532*4882a593Smuzhiyun ret_val = e1000_read_nvm(hw, first_word + i, 1,
533*4882a593Smuzhiyun &eeprom_buff[i]);
534*4882a593Smuzhiyun if (ret_val)
535*4882a593Smuzhiyun break;
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun if (ret_val) {
542*4882a593Smuzhiyun /* a read error occurred, throw away the result */
543*4882a593Smuzhiyun memset(eeprom_buff, 0xff, sizeof(u16) *
544*4882a593Smuzhiyun (last_word - first_word + 1));
545*4882a593Smuzhiyun } else {
546*4882a593Smuzhiyun /* Device's eeprom is always little-endian, word addressable */
547*4882a593Smuzhiyun for (i = 0; i < last_word - first_word + 1; i++)
548*4882a593Smuzhiyun le16_to_cpus(&eeprom_buff[i]);
549*4882a593Smuzhiyun }
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
552*4882a593Smuzhiyun kfree(eeprom_buff);
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun return ret_val;
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun
e1000_set_eeprom(struct net_device * netdev,struct ethtool_eeprom * eeprom,u8 * bytes)557*4882a593Smuzhiyun static int e1000_set_eeprom(struct net_device *netdev,
558*4882a593Smuzhiyun struct ethtool_eeprom *eeprom, u8 *bytes)
559*4882a593Smuzhiyun {
560*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
561*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
562*4882a593Smuzhiyun u16 *eeprom_buff;
563*4882a593Smuzhiyun void *ptr;
564*4882a593Smuzhiyun int max_len;
565*4882a593Smuzhiyun int first_word;
566*4882a593Smuzhiyun int last_word;
567*4882a593Smuzhiyun int ret_val = 0;
568*4882a593Smuzhiyun u16 i;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun if (eeprom->len == 0)
571*4882a593Smuzhiyun return -EOPNOTSUPP;
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun if (eeprom->magic !=
574*4882a593Smuzhiyun (adapter->pdev->vendor | (adapter->pdev->device << 16)))
575*4882a593Smuzhiyun return -EFAULT;
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun if (adapter->flags & FLAG_READ_ONLY_NVM)
578*4882a593Smuzhiyun return -EINVAL;
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun max_len = hw->nvm.word_size * 2;
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun first_word = eeprom->offset >> 1;
583*4882a593Smuzhiyun last_word = (eeprom->offset + eeprom->len - 1) >> 1;
584*4882a593Smuzhiyun eeprom_buff = kmalloc(max_len, GFP_KERNEL);
585*4882a593Smuzhiyun if (!eeprom_buff)
586*4882a593Smuzhiyun return -ENOMEM;
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun ptr = (void *)eeprom_buff;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun if (eeprom->offset & 1) {
593*4882a593Smuzhiyun /* need read/modify/write of first changed EEPROM word */
594*4882a593Smuzhiyun /* only the second byte of the word is being modified */
595*4882a593Smuzhiyun ret_val = e1000_read_nvm(hw, first_word, 1, &eeprom_buff[0]);
596*4882a593Smuzhiyun ptr++;
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun if (((eeprom->offset + eeprom->len) & 1) && (!ret_val))
599*4882a593Smuzhiyun /* need read/modify/write of last changed EEPROM word */
600*4882a593Smuzhiyun /* only the first byte of the word is being modified */
601*4882a593Smuzhiyun ret_val = e1000_read_nvm(hw, last_word, 1,
602*4882a593Smuzhiyun &eeprom_buff[last_word - first_word]);
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun if (ret_val)
605*4882a593Smuzhiyun goto out;
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun /* Device's eeprom is always little-endian, word addressable */
608*4882a593Smuzhiyun for (i = 0; i < last_word - first_word + 1; i++)
609*4882a593Smuzhiyun le16_to_cpus(&eeprom_buff[i]);
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun memcpy(ptr, bytes, eeprom->len);
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun for (i = 0; i < last_word - first_word + 1; i++)
614*4882a593Smuzhiyun cpu_to_le16s(&eeprom_buff[i]);
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun ret_val = e1000_write_nvm(hw, first_word,
617*4882a593Smuzhiyun last_word - first_word + 1, eeprom_buff);
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun if (ret_val)
620*4882a593Smuzhiyun goto out;
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun /* Update the checksum over the first part of the EEPROM if needed
623*4882a593Smuzhiyun * and flush shadow RAM for applicable controllers
624*4882a593Smuzhiyun */
625*4882a593Smuzhiyun if ((first_word <= NVM_CHECKSUM_REG) ||
626*4882a593Smuzhiyun (hw->mac.type == e1000_82583) ||
627*4882a593Smuzhiyun (hw->mac.type == e1000_82574) ||
628*4882a593Smuzhiyun (hw->mac.type == e1000_82573))
629*4882a593Smuzhiyun ret_val = e1000e_update_nvm_checksum(hw);
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun out:
632*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
633*4882a593Smuzhiyun kfree(eeprom_buff);
634*4882a593Smuzhiyun return ret_val;
635*4882a593Smuzhiyun }
636*4882a593Smuzhiyun
e1000_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * drvinfo)637*4882a593Smuzhiyun static void e1000_get_drvinfo(struct net_device *netdev,
638*4882a593Smuzhiyun struct ethtool_drvinfo *drvinfo)
639*4882a593Smuzhiyun {
640*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun strlcpy(drvinfo->driver, e1000e_driver_name, sizeof(drvinfo->driver));
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun /* EEPROM image version # is reported as firmware version # for
645*4882a593Smuzhiyun * PCI-E controllers
646*4882a593Smuzhiyun */
647*4882a593Smuzhiyun snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
648*4882a593Smuzhiyun "%d.%d-%d",
649*4882a593Smuzhiyun (adapter->eeprom_vers & 0xF000) >> 12,
650*4882a593Smuzhiyun (adapter->eeprom_vers & 0x0FF0) >> 4,
651*4882a593Smuzhiyun (adapter->eeprom_vers & 0x000F));
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
654*4882a593Smuzhiyun sizeof(drvinfo->bus_info));
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun
e1000_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring)657*4882a593Smuzhiyun static void e1000_get_ringparam(struct net_device *netdev,
658*4882a593Smuzhiyun struct ethtool_ringparam *ring)
659*4882a593Smuzhiyun {
660*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun ring->rx_max_pending = E1000_MAX_RXD;
663*4882a593Smuzhiyun ring->tx_max_pending = E1000_MAX_TXD;
664*4882a593Smuzhiyun ring->rx_pending = adapter->rx_ring_count;
665*4882a593Smuzhiyun ring->tx_pending = adapter->tx_ring_count;
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun
e1000_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring)668*4882a593Smuzhiyun static int e1000_set_ringparam(struct net_device *netdev,
669*4882a593Smuzhiyun struct ethtool_ringparam *ring)
670*4882a593Smuzhiyun {
671*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
672*4882a593Smuzhiyun struct e1000_ring *temp_tx = NULL, *temp_rx = NULL;
673*4882a593Smuzhiyun int err = 0, size = sizeof(struct e1000_ring);
674*4882a593Smuzhiyun bool set_tx = false, set_rx = false;
675*4882a593Smuzhiyun u16 new_rx_count, new_tx_count;
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
678*4882a593Smuzhiyun return -EINVAL;
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun new_rx_count = clamp_t(u32, ring->rx_pending, E1000_MIN_RXD,
681*4882a593Smuzhiyun E1000_MAX_RXD);
682*4882a593Smuzhiyun new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun new_tx_count = clamp_t(u32, ring->tx_pending, E1000_MIN_TXD,
685*4882a593Smuzhiyun E1000_MAX_TXD);
686*4882a593Smuzhiyun new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun if ((new_tx_count == adapter->tx_ring_count) &&
689*4882a593Smuzhiyun (new_rx_count == adapter->rx_ring_count))
690*4882a593Smuzhiyun /* nothing to do */
691*4882a593Smuzhiyun return 0;
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
694*4882a593Smuzhiyun usleep_range(1000, 2000);
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun if (!netif_running(adapter->netdev)) {
697*4882a593Smuzhiyun /* Set counts now and allocate resources during open() */
698*4882a593Smuzhiyun adapter->tx_ring->count = new_tx_count;
699*4882a593Smuzhiyun adapter->rx_ring->count = new_rx_count;
700*4882a593Smuzhiyun adapter->tx_ring_count = new_tx_count;
701*4882a593Smuzhiyun adapter->rx_ring_count = new_rx_count;
702*4882a593Smuzhiyun goto clear_reset;
703*4882a593Smuzhiyun }
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun set_tx = (new_tx_count != adapter->tx_ring_count);
706*4882a593Smuzhiyun set_rx = (new_rx_count != adapter->rx_ring_count);
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun /* Allocate temporary storage for ring updates */
709*4882a593Smuzhiyun if (set_tx) {
710*4882a593Smuzhiyun temp_tx = vmalloc(size);
711*4882a593Smuzhiyun if (!temp_tx) {
712*4882a593Smuzhiyun err = -ENOMEM;
713*4882a593Smuzhiyun goto free_temp;
714*4882a593Smuzhiyun }
715*4882a593Smuzhiyun }
716*4882a593Smuzhiyun if (set_rx) {
717*4882a593Smuzhiyun temp_rx = vmalloc(size);
718*4882a593Smuzhiyun if (!temp_rx) {
719*4882a593Smuzhiyun err = -ENOMEM;
720*4882a593Smuzhiyun goto free_temp;
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun e1000e_down(adapter, true);
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun /* We can't just free everything and then setup again, because the
729*4882a593Smuzhiyun * ISRs in MSI-X mode get passed pointers to the Tx and Rx ring
730*4882a593Smuzhiyun * structs. First, attempt to allocate new resources...
731*4882a593Smuzhiyun */
732*4882a593Smuzhiyun if (set_tx) {
733*4882a593Smuzhiyun memcpy(temp_tx, adapter->tx_ring, size);
734*4882a593Smuzhiyun temp_tx->count = new_tx_count;
735*4882a593Smuzhiyun err = e1000e_setup_tx_resources(temp_tx);
736*4882a593Smuzhiyun if (err)
737*4882a593Smuzhiyun goto err_setup;
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun if (set_rx) {
740*4882a593Smuzhiyun memcpy(temp_rx, adapter->rx_ring, size);
741*4882a593Smuzhiyun temp_rx->count = new_rx_count;
742*4882a593Smuzhiyun err = e1000e_setup_rx_resources(temp_rx);
743*4882a593Smuzhiyun if (err)
744*4882a593Smuzhiyun goto err_setup_rx;
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun /* ...then free the old resources and copy back any new ring data */
748*4882a593Smuzhiyun if (set_tx) {
749*4882a593Smuzhiyun e1000e_free_tx_resources(adapter->tx_ring);
750*4882a593Smuzhiyun memcpy(adapter->tx_ring, temp_tx, size);
751*4882a593Smuzhiyun adapter->tx_ring_count = new_tx_count;
752*4882a593Smuzhiyun }
753*4882a593Smuzhiyun if (set_rx) {
754*4882a593Smuzhiyun e1000e_free_rx_resources(adapter->rx_ring);
755*4882a593Smuzhiyun memcpy(adapter->rx_ring, temp_rx, size);
756*4882a593Smuzhiyun adapter->rx_ring_count = new_rx_count;
757*4882a593Smuzhiyun }
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun err_setup_rx:
760*4882a593Smuzhiyun if (err && set_tx)
761*4882a593Smuzhiyun e1000e_free_tx_resources(temp_tx);
762*4882a593Smuzhiyun err_setup:
763*4882a593Smuzhiyun e1000e_up(adapter);
764*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
765*4882a593Smuzhiyun free_temp:
766*4882a593Smuzhiyun vfree(temp_tx);
767*4882a593Smuzhiyun vfree(temp_rx);
768*4882a593Smuzhiyun clear_reset:
769*4882a593Smuzhiyun clear_bit(__E1000_RESETTING, &adapter->state);
770*4882a593Smuzhiyun return err;
771*4882a593Smuzhiyun }
772*4882a593Smuzhiyun
reg_pattern_test(struct e1000_adapter * adapter,u64 * data,int reg,int offset,u32 mask,u32 write)773*4882a593Smuzhiyun static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
774*4882a593Smuzhiyun int reg, int offset, u32 mask, u32 write)
775*4882a593Smuzhiyun {
776*4882a593Smuzhiyun u32 pat, val;
777*4882a593Smuzhiyun static const u32 test[] = {
778*4882a593Smuzhiyun 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
779*4882a593Smuzhiyun };
780*4882a593Smuzhiyun for (pat = 0; pat < ARRAY_SIZE(test); pat++) {
781*4882a593Smuzhiyun E1000_WRITE_REG_ARRAY(&adapter->hw, reg, offset,
782*4882a593Smuzhiyun (test[pat] & write));
783*4882a593Smuzhiyun val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
784*4882a593Smuzhiyun if (val != (test[pat] & write & mask)) {
785*4882a593Smuzhiyun e_err("pattern test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
786*4882a593Smuzhiyun reg + (offset << 2), val,
787*4882a593Smuzhiyun (test[pat] & write & mask));
788*4882a593Smuzhiyun *data = reg;
789*4882a593Smuzhiyun return true;
790*4882a593Smuzhiyun }
791*4882a593Smuzhiyun }
792*4882a593Smuzhiyun return false;
793*4882a593Smuzhiyun }
794*4882a593Smuzhiyun
reg_set_and_check(struct e1000_adapter * adapter,u64 * data,int reg,u32 mask,u32 write)795*4882a593Smuzhiyun static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
796*4882a593Smuzhiyun int reg, u32 mask, u32 write)
797*4882a593Smuzhiyun {
798*4882a593Smuzhiyun u32 val;
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun __ew32(&adapter->hw, reg, write & mask);
801*4882a593Smuzhiyun val = __er32(&adapter->hw, reg);
802*4882a593Smuzhiyun if ((write & mask) != (val & mask)) {
803*4882a593Smuzhiyun e_err("set/check test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
804*4882a593Smuzhiyun reg, (val & mask), (write & mask));
805*4882a593Smuzhiyun *data = reg;
806*4882a593Smuzhiyun return true;
807*4882a593Smuzhiyun }
808*4882a593Smuzhiyun return false;
809*4882a593Smuzhiyun }
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun #define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \
812*4882a593Smuzhiyun do { \
813*4882a593Smuzhiyun if (reg_pattern_test(adapter, data, reg, offset, mask, write)) \
814*4882a593Smuzhiyun return 1; \
815*4882a593Smuzhiyun } while (0)
816*4882a593Smuzhiyun #define REG_PATTERN_TEST(reg, mask, write) \
817*4882a593Smuzhiyun REG_PATTERN_TEST_ARRAY(reg, 0, mask, write)
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun #define REG_SET_AND_CHECK(reg, mask, write) \
820*4882a593Smuzhiyun do { \
821*4882a593Smuzhiyun if (reg_set_and_check(adapter, data, reg, mask, write)) \
822*4882a593Smuzhiyun return 1; \
823*4882a593Smuzhiyun } while (0)
824*4882a593Smuzhiyun
e1000_reg_test(struct e1000_adapter * adapter,u64 * data)825*4882a593Smuzhiyun static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
826*4882a593Smuzhiyun {
827*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
828*4882a593Smuzhiyun struct e1000_mac_info *mac = &adapter->hw.mac;
829*4882a593Smuzhiyun u32 value;
830*4882a593Smuzhiyun u32 before;
831*4882a593Smuzhiyun u32 after;
832*4882a593Smuzhiyun u32 i;
833*4882a593Smuzhiyun u32 toggle;
834*4882a593Smuzhiyun u32 mask;
835*4882a593Smuzhiyun u32 wlock_mac = 0;
836*4882a593Smuzhiyun
837*4882a593Smuzhiyun /* The status register is Read Only, so a write should fail.
838*4882a593Smuzhiyun * Some bits that get toggled are ignored. There are several bits
839*4882a593Smuzhiyun * on newer hardware that are r/w.
840*4882a593Smuzhiyun */
841*4882a593Smuzhiyun switch (mac->type) {
842*4882a593Smuzhiyun case e1000_82571:
843*4882a593Smuzhiyun case e1000_82572:
844*4882a593Smuzhiyun case e1000_80003es2lan:
845*4882a593Smuzhiyun toggle = 0x7FFFF3FF;
846*4882a593Smuzhiyun break;
847*4882a593Smuzhiyun default:
848*4882a593Smuzhiyun toggle = 0x7FFFF033;
849*4882a593Smuzhiyun break;
850*4882a593Smuzhiyun }
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun before = er32(STATUS);
853*4882a593Smuzhiyun value = (er32(STATUS) & toggle);
854*4882a593Smuzhiyun ew32(STATUS, toggle);
855*4882a593Smuzhiyun after = er32(STATUS) & toggle;
856*4882a593Smuzhiyun if (value != after) {
857*4882a593Smuzhiyun e_err("failed STATUS register test got: 0x%08X expected: 0x%08X\n",
858*4882a593Smuzhiyun after, value);
859*4882a593Smuzhiyun *data = 1;
860*4882a593Smuzhiyun return 1;
861*4882a593Smuzhiyun }
862*4882a593Smuzhiyun /* restore previous status */
863*4882a593Smuzhiyun ew32(STATUS, before);
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun if (!(adapter->flags & FLAG_IS_ICH)) {
866*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
867*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_FCAH, 0x0000FFFF, 0xFFFFFFFF);
868*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_FCT, 0x0000FFFF, 0xFFFFFFFF);
869*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_VET, 0x0000FFFF, 0xFFFFFFFF);
870*4882a593Smuzhiyun }
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_RDTR, 0x0000FFFF, 0xFFFFFFFF);
873*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_RDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
874*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_RDLEN(0), 0x000FFF80, 0x000FFFFF);
875*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_RDH(0), 0x0000FFFF, 0x0000FFFF);
876*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_RDT(0), 0x0000FFFF, 0x0000FFFF);
877*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_FCRTH, 0x0000FFF8, 0x0000FFF8);
878*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_FCTTV, 0x0000FFFF, 0x0000FFFF);
879*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
880*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_TDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
881*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_TDLEN(0), 0x000FFF80, 0x000FFFFF);
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000);
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun before = ((adapter->flags & FLAG_IS_ICH) ? 0x06C3B33E : 0x06DFB3FE);
886*4882a593Smuzhiyun REG_SET_AND_CHECK(E1000_RCTL, before, 0x003FFFFB);
887*4882a593Smuzhiyun REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000);
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF);
890*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_RDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
891*4882a593Smuzhiyun if (!(adapter->flags & FLAG_IS_ICH))
892*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);
893*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_TDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
894*4882a593Smuzhiyun REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
895*4882a593Smuzhiyun mask = 0x8003FFFF;
896*4882a593Smuzhiyun switch (mac->type) {
897*4882a593Smuzhiyun case e1000_ich10lan:
898*4882a593Smuzhiyun case e1000_pchlan:
899*4882a593Smuzhiyun case e1000_pch2lan:
900*4882a593Smuzhiyun case e1000_pch_lpt:
901*4882a593Smuzhiyun case e1000_pch_spt:
902*4882a593Smuzhiyun case e1000_pch_cnp:
903*4882a593Smuzhiyun case e1000_pch_tgp:
904*4882a593Smuzhiyun case e1000_pch_adp:
905*4882a593Smuzhiyun case e1000_pch_mtp:
906*4882a593Smuzhiyun mask |= BIT(18);
907*4882a593Smuzhiyun break;
908*4882a593Smuzhiyun default:
909*4882a593Smuzhiyun break;
910*4882a593Smuzhiyun }
911*4882a593Smuzhiyun
912*4882a593Smuzhiyun if (mac->type >= e1000_pch_lpt)
913*4882a593Smuzhiyun wlock_mac = (er32(FWSM) & E1000_FWSM_WLOCK_MAC_MASK) >>
914*4882a593Smuzhiyun E1000_FWSM_WLOCK_MAC_SHIFT;
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun for (i = 0; i < mac->rar_entry_count; i++) {
917*4882a593Smuzhiyun if (mac->type >= e1000_pch_lpt) {
918*4882a593Smuzhiyun /* Cannot test write-protected SHRAL[n] registers */
919*4882a593Smuzhiyun if ((wlock_mac == 1) || (wlock_mac && (i > wlock_mac)))
920*4882a593Smuzhiyun continue;
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun /* SHRAH[9] different than the others */
923*4882a593Smuzhiyun if (i == 10)
924*4882a593Smuzhiyun mask |= BIT(30);
925*4882a593Smuzhiyun else
926*4882a593Smuzhiyun mask &= ~BIT(30);
927*4882a593Smuzhiyun }
928*4882a593Smuzhiyun if (mac->type == e1000_pch2lan) {
929*4882a593Smuzhiyun /* SHRAH[0,1,2] different than previous */
930*4882a593Smuzhiyun if (i == 1)
931*4882a593Smuzhiyun mask &= 0xFFF4FFFF;
932*4882a593Smuzhiyun /* SHRAH[3] different than SHRAH[0,1,2] */
933*4882a593Smuzhiyun if (i == 4)
934*4882a593Smuzhiyun mask |= BIT(30);
935*4882a593Smuzhiyun /* RAR[1-6] owned by management engine - skipping */
936*4882a593Smuzhiyun if (i > 0)
937*4882a593Smuzhiyun i += 6;
938*4882a593Smuzhiyun }
939*4882a593Smuzhiyun
940*4882a593Smuzhiyun REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1), mask,
941*4882a593Smuzhiyun 0xFFFFFFFF);
942*4882a593Smuzhiyun /* reset index to actual value */
943*4882a593Smuzhiyun if ((mac->type == e1000_pch2lan) && (i > 6))
944*4882a593Smuzhiyun i -= 6;
945*4882a593Smuzhiyun }
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun for (i = 0; i < mac->mta_reg_count; i++)
948*4882a593Smuzhiyun REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);
949*4882a593Smuzhiyun
950*4882a593Smuzhiyun *data = 0;
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun return 0;
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun
e1000_eeprom_test(struct e1000_adapter * adapter,u64 * data)955*4882a593Smuzhiyun static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
956*4882a593Smuzhiyun {
957*4882a593Smuzhiyun u16 temp;
958*4882a593Smuzhiyun u16 checksum = 0;
959*4882a593Smuzhiyun u16 i;
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun *data = 0;
962*4882a593Smuzhiyun /* Read and add up the contents of the EEPROM */
963*4882a593Smuzhiyun for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
964*4882a593Smuzhiyun if ((e1000_read_nvm(&adapter->hw, i, 1, &temp)) < 0) {
965*4882a593Smuzhiyun *data = 1;
966*4882a593Smuzhiyun return *data;
967*4882a593Smuzhiyun }
968*4882a593Smuzhiyun checksum += temp;
969*4882a593Smuzhiyun }
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun /* If Checksum is not Correct return error else test passed */
972*4882a593Smuzhiyun if ((checksum != (u16)NVM_SUM) && !(*data))
973*4882a593Smuzhiyun *data = 2;
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun return *data;
976*4882a593Smuzhiyun }
977*4882a593Smuzhiyun
e1000_test_intr(int __always_unused irq,void * data)978*4882a593Smuzhiyun static irqreturn_t e1000_test_intr(int __always_unused irq, void *data)
979*4882a593Smuzhiyun {
980*4882a593Smuzhiyun struct net_device *netdev = (struct net_device *)data;
981*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
982*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
983*4882a593Smuzhiyun
984*4882a593Smuzhiyun adapter->test_icr |= er32(ICR);
985*4882a593Smuzhiyun
986*4882a593Smuzhiyun return IRQ_HANDLED;
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun
e1000_intr_test(struct e1000_adapter * adapter,u64 * data)989*4882a593Smuzhiyun static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
990*4882a593Smuzhiyun {
991*4882a593Smuzhiyun struct net_device *netdev = adapter->netdev;
992*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
993*4882a593Smuzhiyun u32 mask;
994*4882a593Smuzhiyun u32 shared_int = 1;
995*4882a593Smuzhiyun u32 irq = adapter->pdev->irq;
996*4882a593Smuzhiyun int i;
997*4882a593Smuzhiyun int ret_val = 0;
998*4882a593Smuzhiyun int int_mode = E1000E_INT_MODE_LEGACY;
999*4882a593Smuzhiyun
1000*4882a593Smuzhiyun *data = 0;
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun /* NOTE: we don't test MSI/MSI-X interrupts here, yet */
1003*4882a593Smuzhiyun if (adapter->int_mode == E1000E_INT_MODE_MSIX) {
1004*4882a593Smuzhiyun int_mode = adapter->int_mode;
1005*4882a593Smuzhiyun e1000e_reset_interrupt_capability(adapter);
1006*4882a593Smuzhiyun adapter->int_mode = E1000E_INT_MODE_LEGACY;
1007*4882a593Smuzhiyun e1000e_set_interrupt_capability(adapter);
1008*4882a593Smuzhiyun }
1009*4882a593Smuzhiyun /* Hook up test interrupt handler just for this test */
1010*4882a593Smuzhiyun if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
1011*4882a593Smuzhiyun netdev)) {
1012*4882a593Smuzhiyun shared_int = 0;
1013*4882a593Smuzhiyun } else if (request_irq(irq, e1000_test_intr, IRQF_SHARED, netdev->name,
1014*4882a593Smuzhiyun netdev)) {
1015*4882a593Smuzhiyun *data = 1;
1016*4882a593Smuzhiyun ret_val = -1;
1017*4882a593Smuzhiyun goto out;
1018*4882a593Smuzhiyun }
1019*4882a593Smuzhiyun e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared"));
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun /* Disable all the interrupts */
1022*4882a593Smuzhiyun ew32(IMC, 0xFFFFFFFF);
1023*4882a593Smuzhiyun e1e_flush();
1024*4882a593Smuzhiyun usleep_range(10000, 11000);
1025*4882a593Smuzhiyun
1026*4882a593Smuzhiyun /* Test each interrupt */
1027*4882a593Smuzhiyun for (i = 0; i < 10; i++) {
1028*4882a593Smuzhiyun /* Interrupt to test */
1029*4882a593Smuzhiyun mask = BIT(i);
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun if (adapter->flags & FLAG_IS_ICH) {
1032*4882a593Smuzhiyun switch (mask) {
1033*4882a593Smuzhiyun case E1000_ICR_RXSEQ:
1034*4882a593Smuzhiyun continue;
1035*4882a593Smuzhiyun case 0x00000100:
1036*4882a593Smuzhiyun if (adapter->hw.mac.type == e1000_ich8lan ||
1037*4882a593Smuzhiyun adapter->hw.mac.type == e1000_ich9lan)
1038*4882a593Smuzhiyun continue;
1039*4882a593Smuzhiyun break;
1040*4882a593Smuzhiyun default:
1041*4882a593Smuzhiyun break;
1042*4882a593Smuzhiyun }
1043*4882a593Smuzhiyun }
1044*4882a593Smuzhiyun
1045*4882a593Smuzhiyun if (!shared_int) {
1046*4882a593Smuzhiyun /* Disable the interrupt to be reported in
1047*4882a593Smuzhiyun * the cause register and then force the same
1048*4882a593Smuzhiyun * interrupt and see if one gets posted. If
1049*4882a593Smuzhiyun * an interrupt was posted to the bus, the
1050*4882a593Smuzhiyun * test failed.
1051*4882a593Smuzhiyun */
1052*4882a593Smuzhiyun adapter->test_icr = 0;
1053*4882a593Smuzhiyun ew32(IMC, mask);
1054*4882a593Smuzhiyun ew32(ICS, mask);
1055*4882a593Smuzhiyun e1e_flush();
1056*4882a593Smuzhiyun usleep_range(10000, 11000);
1057*4882a593Smuzhiyun
1058*4882a593Smuzhiyun if (adapter->test_icr & mask) {
1059*4882a593Smuzhiyun *data = 3;
1060*4882a593Smuzhiyun break;
1061*4882a593Smuzhiyun }
1062*4882a593Smuzhiyun }
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun /* Enable the interrupt to be reported in
1065*4882a593Smuzhiyun * the cause register and then force the same
1066*4882a593Smuzhiyun * interrupt and see if one gets posted. If
1067*4882a593Smuzhiyun * an interrupt was not posted to the bus, the
1068*4882a593Smuzhiyun * test failed.
1069*4882a593Smuzhiyun */
1070*4882a593Smuzhiyun adapter->test_icr = 0;
1071*4882a593Smuzhiyun ew32(IMS, mask);
1072*4882a593Smuzhiyun ew32(ICS, mask);
1073*4882a593Smuzhiyun e1e_flush();
1074*4882a593Smuzhiyun usleep_range(10000, 11000);
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun if (!(adapter->test_icr & mask)) {
1077*4882a593Smuzhiyun *data = 4;
1078*4882a593Smuzhiyun break;
1079*4882a593Smuzhiyun }
1080*4882a593Smuzhiyun
1081*4882a593Smuzhiyun if (!shared_int) {
1082*4882a593Smuzhiyun /* Disable the other interrupts to be reported in
1083*4882a593Smuzhiyun * the cause register and then force the other
1084*4882a593Smuzhiyun * interrupts and see if any get posted. If
1085*4882a593Smuzhiyun * an interrupt was posted to the bus, the
1086*4882a593Smuzhiyun * test failed.
1087*4882a593Smuzhiyun */
1088*4882a593Smuzhiyun adapter->test_icr = 0;
1089*4882a593Smuzhiyun ew32(IMC, ~mask & 0x00007FFF);
1090*4882a593Smuzhiyun ew32(ICS, ~mask & 0x00007FFF);
1091*4882a593Smuzhiyun e1e_flush();
1092*4882a593Smuzhiyun usleep_range(10000, 11000);
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun if (adapter->test_icr) {
1095*4882a593Smuzhiyun *data = 5;
1096*4882a593Smuzhiyun break;
1097*4882a593Smuzhiyun }
1098*4882a593Smuzhiyun }
1099*4882a593Smuzhiyun }
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun /* Disable all the interrupts */
1102*4882a593Smuzhiyun ew32(IMC, 0xFFFFFFFF);
1103*4882a593Smuzhiyun e1e_flush();
1104*4882a593Smuzhiyun usleep_range(10000, 11000);
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun /* Unhook test interrupt handler */
1107*4882a593Smuzhiyun free_irq(irq, netdev);
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun out:
1110*4882a593Smuzhiyun if (int_mode == E1000E_INT_MODE_MSIX) {
1111*4882a593Smuzhiyun e1000e_reset_interrupt_capability(adapter);
1112*4882a593Smuzhiyun adapter->int_mode = int_mode;
1113*4882a593Smuzhiyun e1000e_set_interrupt_capability(adapter);
1114*4882a593Smuzhiyun }
1115*4882a593Smuzhiyun
1116*4882a593Smuzhiyun return ret_val;
1117*4882a593Smuzhiyun }
1118*4882a593Smuzhiyun
e1000_free_desc_rings(struct e1000_adapter * adapter)1119*4882a593Smuzhiyun static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1120*4882a593Smuzhiyun {
1121*4882a593Smuzhiyun struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1122*4882a593Smuzhiyun struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1123*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
1124*4882a593Smuzhiyun struct e1000_buffer *buffer_info;
1125*4882a593Smuzhiyun int i;
1126*4882a593Smuzhiyun
1127*4882a593Smuzhiyun if (tx_ring->desc && tx_ring->buffer_info) {
1128*4882a593Smuzhiyun for (i = 0; i < tx_ring->count; i++) {
1129*4882a593Smuzhiyun buffer_info = &tx_ring->buffer_info[i];
1130*4882a593Smuzhiyun
1131*4882a593Smuzhiyun if (buffer_info->dma)
1132*4882a593Smuzhiyun dma_unmap_single(&pdev->dev,
1133*4882a593Smuzhiyun buffer_info->dma,
1134*4882a593Smuzhiyun buffer_info->length,
1135*4882a593Smuzhiyun DMA_TO_DEVICE);
1136*4882a593Smuzhiyun dev_kfree_skb(buffer_info->skb);
1137*4882a593Smuzhiyun }
1138*4882a593Smuzhiyun }
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun if (rx_ring->desc && rx_ring->buffer_info) {
1141*4882a593Smuzhiyun for (i = 0; i < rx_ring->count; i++) {
1142*4882a593Smuzhiyun buffer_info = &rx_ring->buffer_info[i];
1143*4882a593Smuzhiyun
1144*4882a593Smuzhiyun if (buffer_info->dma)
1145*4882a593Smuzhiyun dma_unmap_single(&pdev->dev,
1146*4882a593Smuzhiyun buffer_info->dma,
1147*4882a593Smuzhiyun 2048, DMA_FROM_DEVICE);
1148*4882a593Smuzhiyun dev_kfree_skb(buffer_info->skb);
1149*4882a593Smuzhiyun }
1150*4882a593Smuzhiyun }
1151*4882a593Smuzhiyun
1152*4882a593Smuzhiyun if (tx_ring->desc) {
1153*4882a593Smuzhiyun dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1154*4882a593Smuzhiyun tx_ring->dma);
1155*4882a593Smuzhiyun tx_ring->desc = NULL;
1156*4882a593Smuzhiyun }
1157*4882a593Smuzhiyun if (rx_ring->desc) {
1158*4882a593Smuzhiyun dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1159*4882a593Smuzhiyun rx_ring->dma);
1160*4882a593Smuzhiyun rx_ring->desc = NULL;
1161*4882a593Smuzhiyun }
1162*4882a593Smuzhiyun
1163*4882a593Smuzhiyun kfree(tx_ring->buffer_info);
1164*4882a593Smuzhiyun tx_ring->buffer_info = NULL;
1165*4882a593Smuzhiyun kfree(rx_ring->buffer_info);
1166*4882a593Smuzhiyun rx_ring->buffer_info = NULL;
1167*4882a593Smuzhiyun }
1168*4882a593Smuzhiyun
e1000_setup_desc_rings(struct e1000_adapter * adapter)1169*4882a593Smuzhiyun static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1170*4882a593Smuzhiyun {
1171*4882a593Smuzhiyun struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1172*4882a593Smuzhiyun struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1173*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
1174*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
1175*4882a593Smuzhiyun u32 rctl;
1176*4882a593Smuzhiyun int i;
1177*4882a593Smuzhiyun int ret_val;
1178*4882a593Smuzhiyun
1179*4882a593Smuzhiyun /* Setup Tx descriptor ring and Tx buffers */
1180*4882a593Smuzhiyun
1181*4882a593Smuzhiyun if (!tx_ring->count)
1182*4882a593Smuzhiyun tx_ring->count = E1000_DEFAULT_TXD;
1183*4882a593Smuzhiyun
1184*4882a593Smuzhiyun tx_ring->buffer_info = kcalloc(tx_ring->count,
1185*4882a593Smuzhiyun sizeof(struct e1000_buffer), GFP_KERNEL);
1186*4882a593Smuzhiyun if (!tx_ring->buffer_info) {
1187*4882a593Smuzhiyun ret_val = 1;
1188*4882a593Smuzhiyun goto err_nomem;
1189*4882a593Smuzhiyun }
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1192*4882a593Smuzhiyun tx_ring->size = ALIGN(tx_ring->size, 4096);
1193*4882a593Smuzhiyun tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
1194*4882a593Smuzhiyun &tx_ring->dma, GFP_KERNEL);
1195*4882a593Smuzhiyun if (!tx_ring->desc) {
1196*4882a593Smuzhiyun ret_val = 2;
1197*4882a593Smuzhiyun goto err_nomem;
1198*4882a593Smuzhiyun }
1199*4882a593Smuzhiyun tx_ring->next_to_use = 0;
1200*4882a593Smuzhiyun tx_ring->next_to_clean = 0;
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun ew32(TDBAL(0), ((u64)tx_ring->dma & 0x00000000FFFFFFFF));
1203*4882a593Smuzhiyun ew32(TDBAH(0), ((u64)tx_ring->dma >> 32));
1204*4882a593Smuzhiyun ew32(TDLEN(0), tx_ring->count * sizeof(struct e1000_tx_desc));
1205*4882a593Smuzhiyun ew32(TDH(0), 0);
1206*4882a593Smuzhiyun ew32(TDT(0), 0);
1207*4882a593Smuzhiyun ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR |
1208*4882a593Smuzhiyun E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1209*4882a593Smuzhiyun E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun for (i = 0; i < tx_ring->count; i++) {
1212*4882a593Smuzhiyun struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
1213*4882a593Smuzhiyun struct sk_buff *skb;
1214*4882a593Smuzhiyun unsigned int skb_size = 1024;
1215*4882a593Smuzhiyun
1216*4882a593Smuzhiyun skb = alloc_skb(skb_size, GFP_KERNEL);
1217*4882a593Smuzhiyun if (!skb) {
1218*4882a593Smuzhiyun ret_val = 3;
1219*4882a593Smuzhiyun goto err_nomem;
1220*4882a593Smuzhiyun }
1221*4882a593Smuzhiyun skb_put(skb, skb_size);
1222*4882a593Smuzhiyun tx_ring->buffer_info[i].skb = skb;
1223*4882a593Smuzhiyun tx_ring->buffer_info[i].length = skb->len;
1224*4882a593Smuzhiyun tx_ring->buffer_info[i].dma =
1225*4882a593Smuzhiyun dma_map_single(&pdev->dev, skb->data, skb->len,
1226*4882a593Smuzhiyun DMA_TO_DEVICE);
1227*4882a593Smuzhiyun if (dma_mapping_error(&pdev->dev,
1228*4882a593Smuzhiyun tx_ring->buffer_info[i].dma)) {
1229*4882a593Smuzhiyun ret_val = 4;
1230*4882a593Smuzhiyun goto err_nomem;
1231*4882a593Smuzhiyun }
1232*4882a593Smuzhiyun tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma);
1233*4882a593Smuzhiyun tx_desc->lower.data = cpu_to_le32(skb->len);
1234*4882a593Smuzhiyun tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1235*4882a593Smuzhiyun E1000_TXD_CMD_IFCS |
1236*4882a593Smuzhiyun E1000_TXD_CMD_RS);
1237*4882a593Smuzhiyun tx_desc->upper.data = 0;
1238*4882a593Smuzhiyun }
1239*4882a593Smuzhiyun
1240*4882a593Smuzhiyun /* Setup Rx descriptor ring and Rx buffers */
1241*4882a593Smuzhiyun
1242*4882a593Smuzhiyun if (!rx_ring->count)
1243*4882a593Smuzhiyun rx_ring->count = E1000_DEFAULT_RXD;
1244*4882a593Smuzhiyun
1245*4882a593Smuzhiyun rx_ring->buffer_info = kcalloc(rx_ring->count,
1246*4882a593Smuzhiyun sizeof(struct e1000_buffer), GFP_KERNEL);
1247*4882a593Smuzhiyun if (!rx_ring->buffer_info) {
1248*4882a593Smuzhiyun ret_val = 5;
1249*4882a593Smuzhiyun goto err_nomem;
1250*4882a593Smuzhiyun }
1251*4882a593Smuzhiyun
1252*4882a593Smuzhiyun rx_ring->size = rx_ring->count * sizeof(union e1000_rx_desc_extended);
1253*4882a593Smuzhiyun rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
1254*4882a593Smuzhiyun &rx_ring->dma, GFP_KERNEL);
1255*4882a593Smuzhiyun if (!rx_ring->desc) {
1256*4882a593Smuzhiyun ret_val = 6;
1257*4882a593Smuzhiyun goto err_nomem;
1258*4882a593Smuzhiyun }
1259*4882a593Smuzhiyun rx_ring->next_to_use = 0;
1260*4882a593Smuzhiyun rx_ring->next_to_clean = 0;
1261*4882a593Smuzhiyun
1262*4882a593Smuzhiyun rctl = er32(RCTL);
1263*4882a593Smuzhiyun if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
1264*4882a593Smuzhiyun ew32(RCTL, rctl & ~E1000_RCTL_EN);
1265*4882a593Smuzhiyun ew32(RDBAL(0), ((u64)rx_ring->dma & 0xFFFFFFFF));
1266*4882a593Smuzhiyun ew32(RDBAH(0), ((u64)rx_ring->dma >> 32));
1267*4882a593Smuzhiyun ew32(RDLEN(0), rx_ring->size);
1268*4882a593Smuzhiyun ew32(RDH(0), 0);
1269*4882a593Smuzhiyun ew32(RDT(0), 0);
1270*4882a593Smuzhiyun rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1271*4882a593Smuzhiyun E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE |
1272*4882a593Smuzhiyun E1000_RCTL_SBP | E1000_RCTL_SECRC |
1273*4882a593Smuzhiyun E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1274*4882a593Smuzhiyun (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1275*4882a593Smuzhiyun ew32(RCTL, rctl);
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun for (i = 0; i < rx_ring->count; i++) {
1278*4882a593Smuzhiyun union e1000_rx_desc_extended *rx_desc;
1279*4882a593Smuzhiyun struct sk_buff *skb;
1280*4882a593Smuzhiyun
1281*4882a593Smuzhiyun skb = alloc_skb(2048 + NET_IP_ALIGN, GFP_KERNEL);
1282*4882a593Smuzhiyun if (!skb) {
1283*4882a593Smuzhiyun ret_val = 7;
1284*4882a593Smuzhiyun goto err_nomem;
1285*4882a593Smuzhiyun }
1286*4882a593Smuzhiyun skb_reserve(skb, NET_IP_ALIGN);
1287*4882a593Smuzhiyun rx_ring->buffer_info[i].skb = skb;
1288*4882a593Smuzhiyun rx_ring->buffer_info[i].dma =
1289*4882a593Smuzhiyun dma_map_single(&pdev->dev, skb->data, 2048,
1290*4882a593Smuzhiyun DMA_FROM_DEVICE);
1291*4882a593Smuzhiyun if (dma_mapping_error(&pdev->dev,
1292*4882a593Smuzhiyun rx_ring->buffer_info[i].dma)) {
1293*4882a593Smuzhiyun ret_val = 8;
1294*4882a593Smuzhiyun goto err_nomem;
1295*4882a593Smuzhiyun }
1296*4882a593Smuzhiyun rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1297*4882a593Smuzhiyun rx_desc->read.buffer_addr =
1298*4882a593Smuzhiyun cpu_to_le64(rx_ring->buffer_info[i].dma);
1299*4882a593Smuzhiyun memset(skb->data, 0x00, skb->len);
1300*4882a593Smuzhiyun }
1301*4882a593Smuzhiyun
1302*4882a593Smuzhiyun return 0;
1303*4882a593Smuzhiyun
1304*4882a593Smuzhiyun err_nomem:
1305*4882a593Smuzhiyun e1000_free_desc_rings(adapter);
1306*4882a593Smuzhiyun return ret_val;
1307*4882a593Smuzhiyun }
1308*4882a593Smuzhiyun
e1000_phy_disable_receiver(struct e1000_adapter * adapter)1309*4882a593Smuzhiyun static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1310*4882a593Smuzhiyun {
1311*4882a593Smuzhiyun /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1312*4882a593Smuzhiyun e1e_wphy(&adapter->hw, 29, 0x001F);
1313*4882a593Smuzhiyun e1e_wphy(&adapter->hw, 30, 0x8FFC);
1314*4882a593Smuzhiyun e1e_wphy(&adapter->hw, 29, 0x001A);
1315*4882a593Smuzhiyun e1e_wphy(&adapter->hw, 30, 0x8FF0);
1316*4882a593Smuzhiyun }
1317*4882a593Smuzhiyun
e1000_integrated_phy_loopback(struct e1000_adapter * adapter)1318*4882a593Smuzhiyun static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1319*4882a593Smuzhiyun {
1320*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
1321*4882a593Smuzhiyun u32 ctrl_reg = 0;
1322*4882a593Smuzhiyun u16 phy_reg = 0;
1323*4882a593Smuzhiyun s32 ret_val = 0;
1324*4882a593Smuzhiyun
1325*4882a593Smuzhiyun hw->mac.autoneg = 0;
1326*4882a593Smuzhiyun
1327*4882a593Smuzhiyun if (hw->phy.type == e1000_phy_ife) {
1328*4882a593Smuzhiyun /* force 100, set loopback */
1329*4882a593Smuzhiyun e1e_wphy(hw, MII_BMCR, 0x6100);
1330*4882a593Smuzhiyun
1331*4882a593Smuzhiyun /* Now set up the MAC to the same speed/duplex as the PHY. */
1332*4882a593Smuzhiyun ctrl_reg = er32(CTRL);
1333*4882a593Smuzhiyun ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1334*4882a593Smuzhiyun ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1335*4882a593Smuzhiyun E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1336*4882a593Smuzhiyun E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1337*4882a593Smuzhiyun E1000_CTRL_FD); /* Force Duplex to FULL */
1338*4882a593Smuzhiyun
1339*4882a593Smuzhiyun ew32(CTRL, ctrl_reg);
1340*4882a593Smuzhiyun e1e_flush();
1341*4882a593Smuzhiyun usleep_range(500, 1000);
1342*4882a593Smuzhiyun
1343*4882a593Smuzhiyun return 0;
1344*4882a593Smuzhiyun }
1345*4882a593Smuzhiyun
1346*4882a593Smuzhiyun /* Specific PHY configuration for loopback */
1347*4882a593Smuzhiyun switch (hw->phy.type) {
1348*4882a593Smuzhiyun case e1000_phy_m88:
1349*4882a593Smuzhiyun /* Auto-MDI/MDIX Off */
1350*4882a593Smuzhiyun e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1351*4882a593Smuzhiyun /* reset to update Auto-MDI/MDIX */
1352*4882a593Smuzhiyun e1e_wphy(hw, MII_BMCR, 0x9140);
1353*4882a593Smuzhiyun /* autoneg off */
1354*4882a593Smuzhiyun e1e_wphy(hw, MII_BMCR, 0x8140);
1355*4882a593Smuzhiyun break;
1356*4882a593Smuzhiyun case e1000_phy_gg82563:
1357*4882a593Smuzhiyun e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x1CC);
1358*4882a593Smuzhiyun break;
1359*4882a593Smuzhiyun case e1000_phy_bm:
1360*4882a593Smuzhiyun /* Set Default MAC Interface speed to 1GB */
1361*4882a593Smuzhiyun e1e_rphy(hw, PHY_REG(2, 21), &phy_reg);
1362*4882a593Smuzhiyun phy_reg &= ~0x0007;
1363*4882a593Smuzhiyun phy_reg |= 0x006;
1364*4882a593Smuzhiyun e1e_wphy(hw, PHY_REG(2, 21), phy_reg);
1365*4882a593Smuzhiyun /* Assert SW reset for above settings to take effect */
1366*4882a593Smuzhiyun hw->phy.ops.commit(hw);
1367*4882a593Smuzhiyun usleep_range(1000, 2000);
1368*4882a593Smuzhiyun /* Force Full Duplex */
1369*4882a593Smuzhiyun e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1370*4882a593Smuzhiyun e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C);
1371*4882a593Smuzhiyun /* Set Link Up (in force link) */
1372*4882a593Smuzhiyun e1e_rphy(hw, PHY_REG(776, 16), &phy_reg);
1373*4882a593Smuzhiyun e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040);
1374*4882a593Smuzhiyun /* Force Link */
1375*4882a593Smuzhiyun e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1376*4882a593Smuzhiyun e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x0040);
1377*4882a593Smuzhiyun /* Set Early Link Enable */
1378*4882a593Smuzhiyun e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);
1379*4882a593Smuzhiyun e1e_wphy(hw, PHY_REG(769, 20), phy_reg | 0x0400);
1380*4882a593Smuzhiyun break;
1381*4882a593Smuzhiyun case e1000_phy_82577:
1382*4882a593Smuzhiyun case e1000_phy_82578:
1383*4882a593Smuzhiyun /* Workaround: K1 must be disabled for stable 1Gbps operation */
1384*4882a593Smuzhiyun ret_val = hw->phy.ops.acquire(hw);
1385*4882a593Smuzhiyun if (ret_val) {
1386*4882a593Smuzhiyun e_err("Cannot setup 1Gbps loopback.\n");
1387*4882a593Smuzhiyun return ret_val;
1388*4882a593Smuzhiyun }
1389*4882a593Smuzhiyun e1000_configure_k1_ich8lan(hw, false);
1390*4882a593Smuzhiyun hw->phy.ops.release(hw);
1391*4882a593Smuzhiyun break;
1392*4882a593Smuzhiyun case e1000_phy_82579:
1393*4882a593Smuzhiyun /* Disable PHY energy detect power down */
1394*4882a593Smuzhiyun e1e_rphy(hw, PHY_REG(0, 21), &phy_reg);
1395*4882a593Smuzhiyun e1e_wphy(hw, PHY_REG(0, 21), phy_reg & ~BIT(3));
1396*4882a593Smuzhiyun /* Disable full chip energy detect */
1397*4882a593Smuzhiyun e1e_rphy(hw, PHY_REG(776, 18), &phy_reg);
1398*4882a593Smuzhiyun e1e_wphy(hw, PHY_REG(776, 18), phy_reg | 1);
1399*4882a593Smuzhiyun /* Enable loopback on the PHY */
1400*4882a593Smuzhiyun e1e_wphy(hw, I82577_PHY_LBK_CTRL, 0x8001);
1401*4882a593Smuzhiyun break;
1402*4882a593Smuzhiyun default:
1403*4882a593Smuzhiyun break;
1404*4882a593Smuzhiyun }
1405*4882a593Smuzhiyun
1406*4882a593Smuzhiyun /* force 1000, set loopback */
1407*4882a593Smuzhiyun e1e_wphy(hw, MII_BMCR, 0x4140);
1408*4882a593Smuzhiyun msleep(250);
1409*4882a593Smuzhiyun
1410*4882a593Smuzhiyun /* Now set up the MAC to the same speed/duplex as the PHY. */
1411*4882a593Smuzhiyun ctrl_reg = er32(CTRL);
1412*4882a593Smuzhiyun ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1413*4882a593Smuzhiyun ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1414*4882a593Smuzhiyun E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1415*4882a593Smuzhiyun E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1416*4882a593Smuzhiyun E1000_CTRL_FD); /* Force Duplex to FULL */
1417*4882a593Smuzhiyun
1418*4882a593Smuzhiyun if (adapter->flags & FLAG_IS_ICH)
1419*4882a593Smuzhiyun ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
1420*4882a593Smuzhiyun
1421*4882a593Smuzhiyun if (hw->phy.media_type == e1000_media_type_copper &&
1422*4882a593Smuzhiyun hw->phy.type == e1000_phy_m88) {
1423*4882a593Smuzhiyun ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1424*4882a593Smuzhiyun } else {
1425*4882a593Smuzhiyun /* Set the ILOS bit on the fiber Nic if half duplex link is
1426*4882a593Smuzhiyun * detected.
1427*4882a593Smuzhiyun */
1428*4882a593Smuzhiyun if ((er32(STATUS) & E1000_STATUS_FD) == 0)
1429*4882a593Smuzhiyun ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1430*4882a593Smuzhiyun }
1431*4882a593Smuzhiyun
1432*4882a593Smuzhiyun ew32(CTRL, ctrl_reg);
1433*4882a593Smuzhiyun
1434*4882a593Smuzhiyun /* Disable the receiver on the PHY so when a cable is plugged in, the
1435*4882a593Smuzhiyun * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1436*4882a593Smuzhiyun */
1437*4882a593Smuzhiyun if (hw->phy.type == e1000_phy_m88)
1438*4882a593Smuzhiyun e1000_phy_disable_receiver(adapter);
1439*4882a593Smuzhiyun
1440*4882a593Smuzhiyun usleep_range(500, 1000);
1441*4882a593Smuzhiyun
1442*4882a593Smuzhiyun return 0;
1443*4882a593Smuzhiyun }
1444*4882a593Smuzhiyun
e1000_set_82571_fiber_loopback(struct e1000_adapter * adapter)1445*4882a593Smuzhiyun static int e1000_set_82571_fiber_loopback(struct e1000_adapter *adapter)
1446*4882a593Smuzhiyun {
1447*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
1448*4882a593Smuzhiyun u32 ctrl = er32(CTRL);
1449*4882a593Smuzhiyun int link;
1450*4882a593Smuzhiyun
1451*4882a593Smuzhiyun /* special requirements for 82571/82572 fiber adapters */
1452*4882a593Smuzhiyun
1453*4882a593Smuzhiyun /* jump through hoops to make sure link is up because serdes
1454*4882a593Smuzhiyun * link is hardwired up
1455*4882a593Smuzhiyun */
1456*4882a593Smuzhiyun ctrl |= E1000_CTRL_SLU;
1457*4882a593Smuzhiyun ew32(CTRL, ctrl);
1458*4882a593Smuzhiyun
1459*4882a593Smuzhiyun /* disable autoneg */
1460*4882a593Smuzhiyun ctrl = er32(TXCW);
1461*4882a593Smuzhiyun ctrl &= ~BIT(31);
1462*4882a593Smuzhiyun ew32(TXCW, ctrl);
1463*4882a593Smuzhiyun
1464*4882a593Smuzhiyun link = (er32(STATUS) & E1000_STATUS_LU);
1465*4882a593Smuzhiyun
1466*4882a593Smuzhiyun if (!link) {
1467*4882a593Smuzhiyun /* set invert loss of signal */
1468*4882a593Smuzhiyun ctrl = er32(CTRL);
1469*4882a593Smuzhiyun ctrl |= E1000_CTRL_ILOS;
1470*4882a593Smuzhiyun ew32(CTRL, ctrl);
1471*4882a593Smuzhiyun }
1472*4882a593Smuzhiyun
1473*4882a593Smuzhiyun /* special write to serdes control register to enable SerDes analog
1474*4882a593Smuzhiyun * loopback
1475*4882a593Smuzhiyun */
1476*4882a593Smuzhiyun ew32(SCTL, E1000_SCTL_ENABLE_SERDES_LOOPBACK);
1477*4882a593Smuzhiyun e1e_flush();
1478*4882a593Smuzhiyun usleep_range(10000, 11000);
1479*4882a593Smuzhiyun
1480*4882a593Smuzhiyun return 0;
1481*4882a593Smuzhiyun }
1482*4882a593Smuzhiyun
1483*4882a593Smuzhiyun /* only call this for fiber/serdes connections to es2lan */
e1000_set_es2lan_mac_loopback(struct e1000_adapter * adapter)1484*4882a593Smuzhiyun static int e1000_set_es2lan_mac_loopback(struct e1000_adapter *adapter)
1485*4882a593Smuzhiyun {
1486*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
1487*4882a593Smuzhiyun u32 ctrlext = er32(CTRL_EXT);
1488*4882a593Smuzhiyun u32 ctrl = er32(CTRL);
1489*4882a593Smuzhiyun
1490*4882a593Smuzhiyun /* save CTRL_EXT to restore later, reuse an empty variable (unused
1491*4882a593Smuzhiyun * on mac_type 80003es2lan)
1492*4882a593Smuzhiyun */
1493*4882a593Smuzhiyun adapter->tx_fifo_head = ctrlext;
1494*4882a593Smuzhiyun
1495*4882a593Smuzhiyun /* clear the serdes mode bits, putting the device into mac loopback */
1496*4882a593Smuzhiyun ctrlext &= ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1497*4882a593Smuzhiyun ew32(CTRL_EXT, ctrlext);
1498*4882a593Smuzhiyun
1499*4882a593Smuzhiyun /* force speed to 1000/FD, link up */
1500*4882a593Smuzhiyun ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
1501*4882a593Smuzhiyun ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX |
1502*4882a593Smuzhiyun E1000_CTRL_SPD_1000 | E1000_CTRL_FD);
1503*4882a593Smuzhiyun ew32(CTRL, ctrl);
1504*4882a593Smuzhiyun
1505*4882a593Smuzhiyun /* set mac loopback */
1506*4882a593Smuzhiyun ctrl = er32(RCTL);
1507*4882a593Smuzhiyun ctrl |= E1000_RCTL_LBM_MAC;
1508*4882a593Smuzhiyun ew32(RCTL, ctrl);
1509*4882a593Smuzhiyun
1510*4882a593Smuzhiyun /* set testing mode parameters (no need to reset later) */
1511*4882a593Smuzhiyun #define KMRNCTRLSTA_OPMODE (0x1F << 16)
1512*4882a593Smuzhiyun #define KMRNCTRLSTA_OPMODE_1GB_FD_GMII 0x0582
1513*4882a593Smuzhiyun ew32(KMRNCTRLSTA,
1514*4882a593Smuzhiyun (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII));
1515*4882a593Smuzhiyun
1516*4882a593Smuzhiyun return 0;
1517*4882a593Smuzhiyun }
1518*4882a593Smuzhiyun
e1000_setup_loopback_test(struct e1000_adapter * adapter)1519*4882a593Smuzhiyun static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1520*4882a593Smuzhiyun {
1521*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
1522*4882a593Smuzhiyun u32 rctl, fext_nvm11, tarc0;
1523*4882a593Smuzhiyun
1524*4882a593Smuzhiyun if (hw->mac.type >= e1000_pch_spt) {
1525*4882a593Smuzhiyun fext_nvm11 = er32(FEXTNVM11);
1526*4882a593Smuzhiyun fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
1527*4882a593Smuzhiyun ew32(FEXTNVM11, fext_nvm11);
1528*4882a593Smuzhiyun tarc0 = er32(TARC(0));
1529*4882a593Smuzhiyun /* clear bits 28 & 29 (control of MULR concurrent requests) */
1530*4882a593Smuzhiyun tarc0 &= 0xcfffffff;
1531*4882a593Smuzhiyun /* set bit 29 (value of MULR requests is now 2) */
1532*4882a593Smuzhiyun tarc0 |= 0x20000000;
1533*4882a593Smuzhiyun ew32(TARC(0), tarc0);
1534*4882a593Smuzhiyun }
1535*4882a593Smuzhiyun if (hw->phy.media_type == e1000_media_type_fiber ||
1536*4882a593Smuzhiyun hw->phy.media_type == e1000_media_type_internal_serdes) {
1537*4882a593Smuzhiyun switch (hw->mac.type) {
1538*4882a593Smuzhiyun case e1000_80003es2lan:
1539*4882a593Smuzhiyun return e1000_set_es2lan_mac_loopback(adapter);
1540*4882a593Smuzhiyun case e1000_82571:
1541*4882a593Smuzhiyun case e1000_82572:
1542*4882a593Smuzhiyun return e1000_set_82571_fiber_loopback(adapter);
1543*4882a593Smuzhiyun default:
1544*4882a593Smuzhiyun rctl = er32(RCTL);
1545*4882a593Smuzhiyun rctl |= E1000_RCTL_LBM_TCVR;
1546*4882a593Smuzhiyun ew32(RCTL, rctl);
1547*4882a593Smuzhiyun return 0;
1548*4882a593Smuzhiyun }
1549*4882a593Smuzhiyun } else if (hw->phy.media_type == e1000_media_type_copper) {
1550*4882a593Smuzhiyun return e1000_integrated_phy_loopback(adapter);
1551*4882a593Smuzhiyun }
1552*4882a593Smuzhiyun
1553*4882a593Smuzhiyun return 7;
1554*4882a593Smuzhiyun }
1555*4882a593Smuzhiyun
e1000_loopback_cleanup(struct e1000_adapter * adapter)1556*4882a593Smuzhiyun static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1557*4882a593Smuzhiyun {
1558*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
1559*4882a593Smuzhiyun u32 rctl, fext_nvm11, tarc0;
1560*4882a593Smuzhiyun u16 phy_reg;
1561*4882a593Smuzhiyun
1562*4882a593Smuzhiyun rctl = er32(RCTL);
1563*4882a593Smuzhiyun rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1564*4882a593Smuzhiyun ew32(RCTL, rctl);
1565*4882a593Smuzhiyun
1566*4882a593Smuzhiyun switch (hw->mac.type) {
1567*4882a593Smuzhiyun case e1000_pch_spt:
1568*4882a593Smuzhiyun case e1000_pch_cnp:
1569*4882a593Smuzhiyun case e1000_pch_tgp:
1570*4882a593Smuzhiyun case e1000_pch_adp:
1571*4882a593Smuzhiyun case e1000_pch_mtp:
1572*4882a593Smuzhiyun fext_nvm11 = er32(FEXTNVM11);
1573*4882a593Smuzhiyun fext_nvm11 &= ~E1000_FEXTNVM11_DISABLE_MULR_FIX;
1574*4882a593Smuzhiyun ew32(FEXTNVM11, fext_nvm11);
1575*4882a593Smuzhiyun tarc0 = er32(TARC(0));
1576*4882a593Smuzhiyun /* clear bits 28 & 29 (control of MULR concurrent requests) */
1577*4882a593Smuzhiyun /* set bit 29 (value of MULR requests is now 0) */
1578*4882a593Smuzhiyun tarc0 &= 0xcfffffff;
1579*4882a593Smuzhiyun ew32(TARC(0), tarc0);
1580*4882a593Smuzhiyun fallthrough;
1581*4882a593Smuzhiyun case e1000_80003es2lan:
1582*4882a593Smuzhiyun if (hw->phy.media_type == e1000_media_type_fiber ||
1583*4882a593Smuzhiyun hw->phy.media_type == e1000_media_type_internal_serdes) {
1584*4882a593Smuzhiyun /* restore CTRL_EXT, stealing space from tx_fifo_head */
1585*4882a593Smuzhiyun ew32(CTRL_EXT, adapter->tx_fifo_head);
1586*4882a593Smuzhiyun adapter->tx_fifo_head = 0;
1587*4882a593Smuzhiyun }
1588*4882a593Smuzhiyun fallthrough;
1589*4882a593Smuzhiyun case e1000_82571:
1590*4882a593Smuzhiyun case e1000_82572:
1591*4882a593Smuzhiyun if (hw->phy.media_type == e1000_media_type_fiber ||
1592*4882a593Smuzhiyun hw->phy.media_type == e1000_media_type_internal_serdes) {
1593*4882a593Smuzhiyun ew32(SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
1594*4882a593Smuzhiyun e1e_flush();
1595*4882a593Smuzhiyun usleep_range(10000, 11000);
1596*4882a593Smuzhiyun break;
1597*4882a593Smuzhiyun }
1598*4882a593Smuzhiyun fallthrough;
1599*4882a593Smuzhiyun default:
1600*4882a593Smuzhiyun hw->mac.autoneg = 1;
1601*4882a593Smuzhiyun if (hw->phy.type == e1000_phy_gg82563)
1602*4882a593Smuzhiyun e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x180);
1603*4882a593Smuzhiyun e1e_rphy(hw, MII_BMCR, &phy_reg);
1604*4882a593Smuzhiyun if (phy_reg & BMCR_LOOPBACK) {
1605*4882a593Smuzhiyun phy_reg &= ~BMCR_LOOPBACK;
1606*4882a593Smuzhiyun e1e_wphy(hw, MII_BMCR, phy_reg);
1607*4882a593Smuzhiyun if (hw->phy.ops.commit)
1608*4882a593Smuzhiyun hw->phy.ops.commit(hw);
1609*4882a593Smuzhiyun }
1610*4882a593Smuzhiyun break;
1611*4882a593Smuzhiyun }
1612*4882a593Smuzhiyun }
1613*4882a593Smuzhiyun
e1000_create_lbtest_frame(struct sk_buff * skb,unsigned int frame_size)1614*4882a593Smuzhiyun static void e1000_create_lbtest_frame(struct sk_buff *skb,
1615*4882a593Smuzhiyun unsigned int frame_size)
1616*4882a593Smuzhiyun {
1617*4882a593Smuzhiyun memset(skb->data, 0xFF, frame_size);
1618*4882a593Smuzhiyun frame_size &= ~1;
1619*4882a593Smuzhiyun memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1620*4882a593Smuzhiyun skb->data[frame_size / 2 + 10] = 0xBE;
1621*4882a593Smuzhiyun skb->data[frame_size / 2 + 12] = 0xAF;
1622*4882a593Smuzhiyun }
1623*4882a593Smuzhiyun
e1000_check_lbtest_frame(struct sk_buff * skb,unsigned int frame_size)1624*4882a593Smuzhiyun static int e1000_check_lbtest_frame(struct sk_buff *skb,
1625*4882a593Smuzhiyun unsigned int frame_size)
1626*4882a593Smuzhiyun {
1627*4882a593Smuzhiyun frame_size &= ~1;
1628*4882a593Smuzhiyun if (*(skb->data + 3) == 0xFF)
1629*4882a593Smuzhiyun if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1630*4882a593Smuzhiyun (*(skb->data + frame_size / 2 + 12) == 0xAF))
1631*4882a593Smuzhiyun return 0;
1632*4882a593Smuzhiyun return 13;
1633*4882a593Smuzhiyun }
1634*4882a593Smuzhiyun
e1000_run_loopback_test(struct e1000_adapter * adapter)1635*4882a593Smuzhiyun static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1636*4882a593Smuzhiyun {
1637*4882a593Smuzhiyun struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1638*4882a593Smuzhiyun struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1639*4882a593Smuzhiyun struct pci_dev *pdev = adapter->pdev;
1640*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
1641*4882a593Smuzhiyun struct e1000_buffer *buffer_info;
1642*4882a593Smuzhiyun int i, j, k, l;
1643*4882a593Smuzhiyun int lc;
1644*4882a593Smuzhiyun int good_cnt;
1645*4882a593Smuzhiyun int ret_val = 0;
1646*4882a593Smuzhiyun unsigned long time;
1647*4882a593Smuzhiyun
1648*4882a593Smuzhiyun ew32(RDT(0), rx_ring->count - 1);
1649*4882a593Smuzhiyun
1650*4882a593Smuzhiyun /* Calculate the loop count based on the largest descriptor ring
1651*4882a593Smuzhiyun * The idea is to wrap the largest ring a number of times using 64
1652*4882a593Smuzhiyun * send/receive pairs during each loop
1653*4882a593Smuzhiyun */
1654*4882a593Smuzhiyun
1655*4882a593Smuzhiyun if (rx_ring->count <= tx_ring->count)
1656*4882a593Smuzhiyun lc = ((tx_ring->count / 64) * 2) + 1;
1657*4882a593Smuzhiyun else
1658*4882a593Smuzhiyun lc = ((rx_ring->count / 64) * 2) + 1;
1659*4882a593Smuzhiyun
1660*4882a593Smuzhiyun k = 0;
1661*4882a593Smuzhiyun l = 0;
1662*4882a593Smuzhiyun /* loop count loop */
1663*4882a593Smuzhiyun for (j = 0; j <= lc; j++) {
1664*4882a593Smuzhiyun /* send the packets */
1665*4882a593Smuzhiyun for (i = 0; i < 64; i++) {
1666*4882a593Smuzhiyun buffer_info = &tx_ring->buffer_info[k];
1667*4882a593Smuzhiyun
1668*4882a593Smuzhiyun e1000_create_lbtest_frame(buffer_info->skb, 1024);
1669*4882a593Smuzhiyun dma_sync_single_for_device(&pdev->dev,
1670*4882a593Smuzhiyun buffer_info->dma,
1671*4882a593Smuzhiyun buffer_info->length,
1672*4882a593Smuzhiyun DMA_TO_DEVICE);
1673*4882a593Smuzhiyun k++;
1674*4882a593Smuzhiyun if (k == tx_ring->count)
1675*4882a593Smuzhiyun k = 0;
1676*4882a593Smuzhiyun }
1677*4882a593Smuzhiyun ew32(TDT(0), k);
1678*4882a593Smuzhiyun e1e_flush();
1679*4882a593Smuzhiyun msleep(200);
1680*4882a593Smuzhiyun time = jiffies; /* set the start time for the receive */
1681*4882a593Smuzhiyun good_cnt = 0;
1682*4882a593Smuzhiyun /* receive the sent packets */
1683*4882a593Smuzhiyun do {
1684*4882a593Smuzhiyun buffer_info = &rx_ring->buffer_info[l];
1685*4882a593Smuzhiyun
1686*4882a593Smuzhiyun dma_sync_single_for_cpu(&pdev->dev,
1687*4882a593Smuzhiyun buffer_info->dma, 2048,
1688*4882a593Smuzhiyun DMA_FROM_DEVICE);
1689*4882a593Smuzhiyun
1690*4882a593Smuzhiyun ret_val = e1000_check_lbtest_frame(buffer_info->skb,
1691*4882a593Smuzhiyun 1024);
1692*4882a593Smuzhiyun if (!ret_val)
1693*4882a593Smuzhiyun good_cnt++;
1694*4882a593Smuzhiyun l++;
1695*4882a593Smuzhiyun if (l == rx_ring->count)
1696*4882a593Smuzhiyun l = 0;
1697*4882a593Smuzhiyun /* time + 20 msecs (200 msecs on 2.4) is more than
1698*4882a593Smuzhiyun * enough time to complete the receives, if it's
1699*4882a593Smuzhiyun * exceeded, break and error off
1700*4882a593Smuzhiyun */
1701*4882a593Smuzhiyun } while ((good_cnt < 64) && !time_after(jiffies, time + 20));
1702*4882a593Smuzhiyun if (good_cnt != 64) {
1703*4882a593Smuzhiyun ret_val = 13; /* ret_val is the same as mis-compare */
1704*4882a593Smuzhiyun break;
1705*4882a593Smuzhiyun }
1706*4882a593Smuzhiyun if (time_after(jiffies, time + 20)) {
1707*4882a593Smuzhiyun ret_val = 14; /* error code for time out error */
1708*4882a593Smuzhiyun break;
1709*4882a593Smuzhiyun }
1710*4882a593Smuzhiyun }
1711*4882a593Smuzhiyun return ret_val;
1712*4882a593Smuzhiyun }
1713*4882a593Smuzhiyun
e1000_loopback_test(struct e1000_adapter * adapter,u64 * data)1714*4882a593Smuzhiyun static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1715*4882a593Smuzhiyun {
1716*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
1717*4882a593Smuzhiyun
1718*4882a593Smuzhiyun /* PHY loopback cannot be performed if SoL/IDER sessions are active */
1719*4882a593Smuzhiyun if (hw->phy.ops.check_reset_block &&
1720*4882a593Smuzhiyun hw->phy.ops.check_reset_block(hw)) {
1721*4882a593Smuzhiyun e_err("Cannot do PHY loopback test when SoL/IDER is active.\n");
1722*4882a593Smuzhiyun *data = 0;
1723*4882a593Smuzhiyun goto out;
1724*4882a593Smuzhiyun }
1725*4882a593Smuzhiyun
1726*4882a593Smuzhiyun *data = e1000_setup_desc_rings(adapter);
1727*4882a593Smuzhiyun if (*data)
1728*4882a593Smuzhiyun goto out;
1729*4882a593Smuzhiyun
1730*4882a593Smuzhiyun *data = e1000_setup_loopback_test(adapter);
1731*4882a593Smuzhiyun if (*data)
1732*4882a593Smuzhiyun goto err_loopback;
1733*4882a593Smuzhiyun
1734*4882a593Smuzhiyun *data = e1000_run_loopback_test(adapter);
1735*4882a593Smuzhiyun e1000_loopback_cleanup(adapter);
1736*4882a593Smuzhiyun
1737*4882a593Smuzhiyun err_loopback:
1738*4882a593Smuzhiyun e1000_free_desc_rings(adapter);
1739*4882a593Smuzhiyun out:
1740*4882a593Smuzhiyun return *data;
1741*4882a593Smuzhiyun }
1742*4882a593Smuzhiyun
e1000_link_test(struct e1000_adapter * adapter,u64 * data)1743*4882a593Smuzhiyun static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1744*4882a593Smuzhiyun {
1745*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
1746*4882a593Smuzhiyun
1747*4882a593Smuzhiyun *data = 0;
1748*4882a593Smuzhiyun if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1749*4882a593Smuzhiyun int i = 0;
1750*4882a593Smuzhiyun
1751*4882a593Smuzhiyun hw->mac.serdes_has_link = false;
1752*4882a593Smuzhiyun
1753*4882a593Smuzhiyun /* On some blade server designs, link establishment
1754*4882a593Smuzhiyun * could take as long as 2-3 minutes
1755*4882a593Smuzhiyun */
1756*4882a593Smuzhiyun do {
1757*4882a593Smuzhiyun hw->mac.ops.check_for_link(hw);
1758*4882a593Smuzhiyun if (hw->mac.serdes_has_link)
1759*4882a593Smuzhiyun return *data;
1760*4882a593Smuzhiyun msleep(20);
1761*4882a593Smuzhiyun } while (i++ < 3750);
1762*4882a593Smuzhiyun
1763*4882a593Smuzhiyun *data = 1;
1764*4882a593Smuzhiyun } else {
1765*4882a593Smuzhiyun hw->mac.ops.check_for_link(hw);
1766*4882a593Smuzhiyun if (hw->mac.autoneg)
1767*4882a593Smuzhiyun /* On some Phy/switch combinations, link establishment
1768*4882a593Smuzhiyun * can take a few seconds more than expected.
1769*4882a593Smuzhiyun */
1770*4882a593Smuzhiyun msleep_interruptible(5000);
1771*4882a593Smuzhiyun
1772*4882a593Smuzhiyun if (!(er32(STATUS) & E1000_STATUS_LU))
1773*4882a593Smuzhiyun *data = 1;
1774*4882a593Smuzhiyun }
1775*4882a593Smuzhiyun return *data;
1776*4882a593Smuzhiyun }
1777*4882a593Smuzhiyun
e1000e_get_sset_count(struct net_device __always_unused * netdev,int sset)1778*4882a593Smuzhiyun static int e1000e_get_sset_count(struct net_device __always_unused *netdev,
1779*4882a593Smuzhiyun int sset)
1780*4882a593Smuzhiyun {
1781*4882a593Smuzhiyun switch (sset) {
1782*4882a593Smuzhiyun case ETH_SS_TEST:
1783*4882a593Smuzhiyun return E1000_TEST_LEN;
1784*4882a593Smuzhiyun case ETH_SS_STATS:
1785*4882a593Smuzhiyun return E1000_STATS_LEN;
1786*4882a593Smuzhiyun case ETH_SS_PRIV_FLAGS:
1787*4882a593Smuzhiyun return E1000E_PRIV_FLAGS_STR_LEN;
1788*4882a593Smuzhiyun default:
1789*4882a593Smuzhiyun return -EOPNOTSUPP;
1790*4882a593Smuzhiyun }
1791*4882a593Smuzhiyun }
1792*4882a593Smuzhiyun
e1000_diag_test(struct net_device * netdev,struct ethtool_test * eth_test,u64 * data)1793*4882a593Smuzhiyun static void e1000_diag_test(struct net_device *netdev,
1794*4882a593Smuzhiyun struct ethtool_test *eth_test, u64 *data)
1795*4882a593Smuzhiyun {
1796*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
1797*4882a593Smuzhiyun u16 autoneg_advertised;
1798*4882a593Smuzhiyun u8 forced_speed_duplex;
1799*4882a593Smuzhiyun u8 autoneg;
1800*4882a593Smuzhiyun bool if_running = netif_running(netdev);
1801*4882a593Smuzhiyun
1802*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
1803*4882a593Smuzhiyun
1804*4882a593Smuzhiyun set_bit(__E1000_TESTING, &adapter->state);
1805*4882a593Smuzhiyun
1806*4882a593Smuzhiyun if (!if_running) {
1807*4882a593Smuzhiyun /* Get control of and reset hardware */
1808*4882a593Smuzhiyun if (adapter->flags & FLAG_HAS_AMT)
1809*4882a593Smuzhiyun e1000e_get_hw_control(adapter);
1810*4882a593Smuzhiyun
1811*4882a593Smuzhiyun e1000e_power_up_phy(adapter);
1812*4882a593Smuzhiyun
1813*4882a593Smuzhiyun adapter->hw.phy.autoneg_wait_to_complete = 1;
1814*4882a593Smuzhiyun e1000e_reset(adapter);
1815*4882a593Smuzhiyun adapter->hw.phy.autoneg_wait_to_complete = 0;
1816*4882a593Smuzhiyun }
1817*4882a593Smuzhiyun
1818*4882a593Smuzhiyun if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1819*4882a593Smuzhiyun /* Offline tests */
1820*4882a593Smuzhiyun
1821*4882a593Smuzhiyun /* save speed, duplex, autoneg settings */
1822*4882a593Smuzhiyun autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1823*4882a593Smuzhiyun forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1824*4882a593Smuzhiyun autoneg = adapter->hw.mac.autoneg;
1825*4882a593Smuzhiyun
1826*4882a593Smuzhiyun e_info("offline testing starting\n");
1827*4882a593Smuzhiyun
1828*4882a593Smuzhiyun if (if_running)
1829*4882a593Smuzhiyun /* indicate we're in test mode */
1830*4882a593Smuzhiyun e1000e_close(netdev);
1831*4882a593Smuzhiyun
1832*4882a593Smuzhiyun if (e1000_reg_test(adapter, &data[0]))
1833*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
1834*4882a593Smuzhiyun
1835*4882a593Smuzhiyun e1000e_reset(adapter);
1836*4882a593Smuzhiyun if (e1000_eeprom_test(adapter, &data[1]))
1837*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
1838*4882a593Smuzhiyun
1839*4882a593Smuzhiyun e1000e_reset(adapter);
1840*4882a593Smuzhiyun if (e1000_intr_test(adapter, &data[2]))
1841*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
1842*4882a593Smuzhiyun
1843*4882a593Smuzhiyun e1000e_reset(adapter);
1844*4882a593Smuzhiyun if (e1000_loopback_test(adapter, &data[3]))
1845*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
1846*4882a593Smuzhiyun
1847*4882a593Smuzhiyun /* force this routine to wait until autoneg complete/timeout */
1848*4882a593Smuzhiyun adapter->hw.phy.autoneg_wait_to_complete = 1;
1849*4882a593Smuzhiyun e1000e_reset(adapter);
1850*4882a593Smuzhiyun adapter->hw.phy.autoneg_wait_to_complete = 0;
1851*4882a593Smuzhiyun
1852*4882a593Smuzhiyun if (e1000_link_test(adapter, &data[4]))
1853*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
1854*4882a593Smuzhiyun
1855*4882a593Smuzhiyun /* restore speed, duplex, autoneg settings */
1856*4882a593Smuzhiyun adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1857*4882a593Smuzhiyun adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1858*4882a593Smuzhiyun adapter->hw.mac.autoneg = autoneg;
1859*4882a593Smuzhiyun e1000e_reset(adapter);
1860*4882a593Smuzhiyun
1861*4882a593Smuzhiyun clear_bit(__E1000_TESTING, &adapter->state);
1862*4882a593Smuzhiyun if (if_running)
1863*4882a593Smuzhiyun e1000e_open(netdev);
1864*4882a593Smuzhiyun } else {
1865*4882a593Smuzhiyun /* Online tests */
1866*4882a593Smuzhiyun
1867*4882a593Smuzhiyun e_info("online testing starting\n");
1868*4882a593Smuzhiyun
1869*4882a593Smuzhiyun /* register, eeprom, intr and loopback tests not run online */
1870*4882a593Smuzhiyun data[0] = 0;
1871*4882a593Smuzhiyun data[1] = 0;
1872*4882a593Smuzhiyun data[2] = 0;
1873*4882a593Smuzhiyun data[3] = 0;
1874*4882a593Smuzhiyun
1875*4882a593Smuzhiyun if (e1000_link_test(adapter, &data[4]))
1876*4882a593Smuzhiyun eth_test->flags |= ETH_TEST_FL_FAILED;
1877*4882a593Smuzhiyun
1878*4882a593Smuzhiyun clear_bit(__E1000_TESTING, &adapter->state);
1879*4882a593Smuzhiyun }
1880*4882a593Smuzhiyun
1881*4882a593Smuzhiyun if (!if_running) {
1882*4882a593Smuzhiyun e1000e_reset(adapter);
1883*4882a593Smuzhiyun
1884*4882a593Smuzhiyun if (adapter->flags & FLAG_HAS_AMT)
1885*4882a593Smuzhiyun e1000e_release_hw_control(adapter);
1886*4882a593Smuzhiyun }
1887*4882a593Smuzhiyun
1888*4882a593Smuzhiyun msleep_interruptible(4 * 1000);
1889*4882a593Smuzhiyun
1890*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
1891*4882a593Smuzhiyun }
1892*4882a593Smuzhiyun
e1000_get_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)1893*4882a593Smuzhiyun static void e1000_get_wol(struct net_device *netdev,
1894*4882a593Smuzhiyun struct ethtool_wolinfo *wol)
1895*4882a593Smuzhiyun {
1896*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
1897*4882a593Smuzhiyun
1898*4882a593Smuzhiyun wol->supported = 0;
1899*4882a593Smuzhiyun wol->wolopts = 0;
1900*4882a593Smuzhiyun
1901*4882a593Smuzhiyun if (!(adapter->flags & FLAG_HAS_WOL) ||
1902*4882a593Smuzhiyun !device_can_wakeup(&adapter->pdev->dev))
1903*4882a593Smuzhiyun return;
1904*4882a593Smuzhiyun
1905*4882a593Smuzhiyun wol->supported = WAKE_UCAST | WAKE_MCAST |
1906*4882a593Smuzhiyun WAKE_BCAST | WAKE_MAGIC | WAKE_PHY;
1907*4882a593Smuzhiyun
1908*4882a593Smuzhiyun /* apply any specific unsupported masks here */
1909*4882a593Smuzhiyun if (adapter->flags & FLAG_NO_WAKE_UCAST) {
1910*4882a593Smuzhiyun wol->supported &= ~WAKE_UCAST;
1911*4882a593Smuzhiyun
1912*4882a593Smuzhiyun if (adapter->wol & E1000_WUFC_EX)
1913*4882a593Smuzhiyun e_err("Interface does not support directed (unicast) frame wake-up packets\n");
1914*4882a593Smuzhiyun }
1915*4882a593Smuzhiyun
1916*4882a593Smuzhiyun if (adapter->wol & E1000_WUFC_EX)
1917*4882a593Smuzhiyun wol->wolopts |= WAKE_UCAST;
1918*4882a593Smuzhiyun if (adapter->wol & E1000_WUFC_MC)
1919*4882a593Smuzhiyun wol->wolopts |= WAKE_MCAST;
1920*4882a593Smuzhiyun if (adapter->wol & E1000_WUFC_BC)
1921*4882a593Smuzhiyun wol->wolopts |= WAKE_BCAST;
1922*4882a593Smuzhiyun if (adapter->wol & E1000_WUFC_MAG)
1923*4882a593Smuzhiyun wol->wolopts |= WAKE_MAGIC;
1924*4882a593Smuzhiyun if (adapter->wol & E1000_WUFC_LNKC)
1925*4882a593Smuzhiyun wol->wolopts |= WAKE_PHY;
1926*4882a593Smuzhiyun }
1927*4882a593Smuzhiyun
e1000_set_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)1928*4882a593Smuzhiyun static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1929*4882a593Smuzhiyun {
1930*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
1931*4882a593Smuzhiyun
1932*4882a593Smuzhiyun if (!(adapter->flags & FLAG_HAS_WOL) ||
1933*4882a593Smuzhiyun !device_can_wakeup(&adapter->pdev->dev) ||
1934*4882a593Smuzhiyun (wol->wolopts & ~(WAKE_UCAST | WAKE_MCAST | WAKE_BCAST |
1935*4882a593Smuzhiyun WAKE_MAGIC | WAKE_PHY)))
1936*4882a593Smuzhiyun return -EOPNOTSUPP;
1937*4882a593Smuzhiyun
1938*4882a593Smuzhiyun /* these settings will always override what we currently have */
1939*4882a593Smuzhiyun adapter->wol = 0;
1940*4882a593Smuzhiyun
1941*4882a593Smuzhiyun if (wol->wolopts & WAKE_UCAST)
1942*4882a593Smuzhiyun adapter->wol |= E1000_WUFC_EX;
1943*4882a593Smuzhiyun if (wol->wolopts & WAKE_MCAST)
1944*4882a593Smuzhiyun adapter->wol |= E1000_WUFC_MC;
1945*4882a593Smuzhiyun if (wol->wolopts & WAKE_BCAST)
1946*4882a593Smuzhiyun adapter->wol |= E1000_WUFC_BC;
1947*4882a593Smuzhiyun if (wol->wolopts & WAKE_MAGIC)
1948*4882a593Smuzhiyun adapter->wol |= E1000_WUFC_MAG;
1949*4882a593Smuzhiyun if (wol->wolopts & WAKE_PHY)
1950*4882a593Smuzhiyun adapter->wol |= E1000_WUFC_LNKC;
1951*4882a593Smuzhiyun
1952*4882a593Smuzhiyun device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1953*4882a593Smuzhiyun
1954*4882a593Smuzhiyun return 0;
1955*4882a593Smuzhiyun }
1956*4882a593Smuzhiyun
e1000_set_phys_id(struct net_device * netdev,enum ethtool_phys_id_state state)1957*4882a593Smuzhiyun static int e1000_set_phys_id(struct net_device *netdev,
1958*4882a593Smuzhiyun enum ethtool_phys_id_state state)
1959*4882a593Smuzhiyun {
1960*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
1961*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
1962*4882a593Smuzhiyun
1963*4882a593Smuzhiyun switch (state) {
1964*4882a593Smuzhiyun case ETHTOOL_ID_ACTIVE:
1965*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
1966*4882a593Smuzhiyun
1967*4882a593Smuzhiyun if (!hw->mac.ops.blink_led)
1968*4882a593Smuzhiyun return 2; /* cycle on/off twice per second */
1969*4882a593Smuzhiyun
1970*4882a593Smuzhiyun hw->mac.ops.blink_led(hw);
1971*4882a593Smuzhiyun break;
1972*4882a593Smuzhiyun
1973*4882a593Smuzhiyun case ETHTOOL_ID_INACTIVE:
1974*4882a593Smuzhiyun if (hw->phy.type == e1000_phy_ife)
1975*4882a593Smuzhiyun e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);
1976*4882a593Smuzhiyun hw->mac.ops.led_off(hw);
1977*4882a593Smuzhiyun hw->mac.ops.cleanup_led(hw);
1978*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
1979*4882a593Smuzhiyun break;
1980*4882a593Smuzhiyun
1981*4882a593Smuzhiyun case ETHTOOL_ID_ON:
1982*4882a593Smuzhiyun hw->mac.ops.led_on(hw);
1983*4882a593Smuzhiyun break;
1984*4882a593Smuzhiyun
1985*4882a593Smuzhiyun case ETHTOOL_ID_OFF:
1986*4882a593Smuzhiyun hw->mac.ops.led_off(hw);
1987*4882a593Smuzhiyun break;
1988*4882a593Smuzhiyun }
1989*4882a593Smuzhiyun
1990*4882a593Smuzhiyun return 0;
1991*4882a593Smuzhiyun }
1992*4882a593Smuzhiyun
e1000_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec)1993*4882a593Smuzhiyun static int e1000_get_coalesce(struct net_device *netdev,
1994*4882a593Smuzhiyun struct ethtool_coalesce *ec)
1995*4882a593Smuzhiyun {
1996*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
1997*4882a593Smuzhiyun
1998*4882a593Smuzhiyun if (adapter->itr_setting <= 4)
1999*4882a593Smuzhiyun ec->rx_coalesce_usecs = adapter->itr_setting;
2000*4882a593Smuzhiyun else
2001*4882a593Smuzhiyun ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
2002*4882a593Smuzhiyun
2003*4882a593Smuzhiyun return 0;
2004*4882a593Smuzhiyun }
2005*4882a593Smuzhiyun
e1000_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec)2006*4882a593Smuzhiyun static int e1000_set_coalesce(struct net_device *netdev,
2007*4882a593Smuzhiyun struct ethtool_coalesce *ec)
2008*4882a593Smuzhiyun {
2009*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
2010*4882a593Smuzhiyun
2011*4882a593Smuzhiyun if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
2012*4882a593Smuzhiyun ((ec->rx_coalesce_usecs > 4) &&
2013*4882a593Smuzhiyun (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
2014*4882a593Smuzhiyun (ec->rx_coalesce_usecs == 2))
2015*4882a593Smuzhiyun return -EINVAL;
2016*4882a593Smuzhiyun
2017*4882a593Smuzhiyun if (ec->rx_coalesce_usecs == 4) {
2018*4882a593Smuzhiyun adapter->itr_setting = 4;
2019*4882a593Smuzhiyun adapter->itr = adapter->itr_setting;
2020*4882a593Smuzhiyun } else if (ec->rx_coalesce_usecs <= 3) {
2021*4882a593Smuzhiyun adapter->itr = 20000;
2022*4882a593Smuzhiyun adapter->itr_setting = ec->rx_coalesce_usecs;
2023*4882a593Smuzhiyun } else {
2024*4882a593Smuzhiyun adapter->itr = (1000000 / ec->rx_coalesce_usecs);
2025*4882a593Smuzhiyun adapter->itr_setting = adapter->itr & ~3;
2026*4882a593Smuzhiyun }
2027*4882a593Smuzhiyun
2028*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
2029*4882a593Smuzhiyun
2030*4882a593Smuzhiyun if (adapter->itr_setting != 0)
2031*4882a593Smuzhiyun e1000e_write_itr(adapter, adapter->itr);
2032*4882a593Smuzhiyun else
2033*4882a593Smuzhiyun e1000e_write_itr(adapter, 0);
2034*4882a593Smuzhiyun
2035*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
2036*4882a593Smuzhiyun
2037*4882a593Smuzhiyun return 0;
2038*4882a593Smuzhiyun }
2039*4882a593Smuzhiyun
e1000_nway_reset(struct net_device * netdev)2040*4882a593Smuzhiyun static int e1000_nway_reset(struct net_device *netdev)
2041*4882a593Smuzhiyun {
2042*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
2043*4882a593Smuzhiyun
2044*4882a593Smuzhiyun if (!netif_running(netdev))
2045*4882a593Smuzhiyun return -EAGAIN;
2046*4882a593Smuzhiyun
2047*4882a593Smuzhiyun if (!adapter->hw.mac.autoneg)
2048*4882a593Smuzhiyun return -EINVAL;
2049*4882a593Smuzhiyun
2050*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
2051*4882a593Smuzhiyun e1000e_reinit_locked(adapter);
2052*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
2053*4882a593Smuzhiyun
2054*4882a593Smuzhiyun return 0;
2055*4882a593Smuzhiyun }
2056*4882a593Smuzhiyun
e1000_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats __always_unused * stats,u64 * data)2057*4882a593Smuzhiyun static void e1000_get_ethtool_stats(struct net_device *netdev,
2058*4882a593Smuzhiyun struct ethtool_stats __always_unused *stats,
2059*4882a593Smuzhiyun u64 *data)
2060*4882a593Smuzhiyun {
2061*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
2062*4882a593Smuzhiyun struct rtnl_link_stats64 net_stats;
2063*4882a593Smuzhiyun int i;
2064*4882a593Smuzhiyun char *p = NULL;
2065*4882a593Smuzhiyun
2066*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
2067*4882a593Smuzhiyun
2068*4882a593Smuzhiyun dev_get_stats(netdev, &net_stats);
2069*4882a593Smuzhiyun
2070*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
2071*4882a593Smuzhiyun
2072*4882a593Smuzhiyun for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
2073*4882a593Smuzhiyun switch (e1000_gstrings_stats[i].type) {
2074*4882a593Smuzhiyun case NETDEV_STATS:
2075*4882a593Smuzhiyun p = (char *)&net_stats +
2076*4882a593Smuzhiyun e1000_gstrings_stats[i].stat_offset;
2077*4882a593Smuzhiyun break;
2078*4882a593Smuzhiyun case E1000_STATS:
2079*4882a593Smuzhiyun p = (char *)adapter +
2080*4882a593Smuzhiyun e1000_gstrings_stats[i].stat_offset;
2081*4882a593Smuzhiyun break;
2082*4882a593Smuzhiyun default:
2083*4882a593Smuzhiyun data[i] = 0;
2084*4882a593Smuzhiyun continue;
2085*4882a593Smuzhiyun }
2086*4882a593Smuzhiyun
2087*4882a593Smuzhiyun data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
2088*4882a593Smuzhiyun sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2089*4882a593Smuzhiyun }
2090*4882a593Smuzhiyun }
2091*4882a593Smuzhiyun
e1000_get_strings(struct net_device __always_unused * netdev,u32 stringset,u8 * data)2092*4882a593Smuzhiyun static void e1000_get_strings(struct net_device __always_unused *netdev,
2093*4882a593Smuzhiyun u32 stringset, u8 *data)
2094*4882a593Smuzhiyun {
2095*4882a593Smuzhiyun u8 *p = data;
2096*4882a593Smuzhiyun int i;
2097*4882a593Smuzhiyun
2098*4882a593Smuzhiyun switch (stringset) {
2099*4882a593Smuzhiyun case ETH_SS_TEST:
2100*4882a593Smuzhiyun memcpy(data, e1000_gstrings_test, sizeof(e1000_gstrings_test));
2101*4882a593Smuzhiyun break;
2102*4882a593Smuzhiyun case ETH_SS_STATS:
2103*4882a593Smuzhiyun for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
2104*4882a593Smuzhiyun memcpy(p, e1000_gstrings_stats[i].stat_string,
2105*4882a593Smuzhiyun ETH_GSTRING_LEN);
2106*4882a593Smuzhiyun p += ETH_GSTRING_LEN;
2107*4882a593Smuzhiyun }
2108*4882a593Smuzhiyun break;
2109*4882a593Smuzhiyun case ETH_SS_PRIV_FLAGS:
2110*4882a593Smuzhiyun memcpy(data, e1000e_priv_flags_strings,
2111*4882a593Smuzhiyun E1000E_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
2112*4882a593Smuzhiyun break;
2113*4882a593Smuzhiyun }
2114*4882a593Smuzhiyun }
2115*4882a593Smuzhiyun
e1000_get_rxnfc(struct net_device * netdev,struct ethtool_rxnfc * info,u32 __always_unused * rule_locs)2116*4882a593Smuzhiyun static int e1000_get_rxnfc(struct net_device *netdev,
2117*4882a593Smuzhiyun struct ethtool_rxnfc *info,
2118*4882a593Smuzhiyun u32 __always_unused *rule_locs)
2119*4882a593Smuzhiyun {
2120*4882a593Smuzhiyun info->data = 0;
2121*4882a593Smuzhiyun
2122*4882a593Smuzhiyun switch (info->cmd) {
2123*4882a593Smuzhiyun case ETHTOOL_GRXFH: {
2124*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
2125*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
2126*4882a593Smuzhiyun u32 mrqc;
2127*4882a593Smuzhiyun
2128*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
2129*4882a593Smuzhiyun mrqc = er32(MRQC);
2130*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
2131*4882a593Smuzhiyun
2132*4882a593Smuzhiyun if (!(mrqc & E1000_MRQC_RSS_FIELD_MASK))
2133*4882a593Smuzhiyun return 0;
2134*4882a593Smuzhiyun
2135*4882a593Smuzhiyun switch (info->flow_type) {
2136*4882a593Smuzhiyun case TCP_V4_FLOW:
2137*4882a593Smuzhiyun if (mrqc & E1000_MRQC_RSS_FIELD_IPV4_TCP)
2138*4882a593Smuzhiyun info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2139*4882a593Smuzhiyun fallthrough;
2140*4882a593Smuzhiyun case UDP_V4_FLOW:
2141*4882a593Smuzhiyun case SCTP_V4_FLOW:
2142*4882a593Smuzhiyun case AH_ESP_V4_FLOW:
2143*4882a593Smuzhiyun case IPV4_FLOW:
2144*4882a593Smuzhiyun if (mrqc & E1000_MRQC_RSS_FIELD_IPV4)
2145*4882a593Smuzhiyun info->data |= RXH_IP_SRC | RXH_IP_DST;
2146*4882a593Smuzhiyun break;
2147*4882a593Smuzhiyun case TCP_V6_FLOW:
2148*4882a593Smuzhiyun if (mrqc & E1000_MRQC_RSS_FIELD_IPV6_TCP)
2149*4882a593Smuzhiyun info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2150*4882a593Smuzhiyun fallthrough;
2151*4882a593Smuzhiyun case UDP_V6_FLOW:
2152*4882a593Smuzhiyun case SCTP_V6_FLOW:
2153*4882a593Smuzhiyun case AH_ESP_V6_FLOW:
2154*4882a593Smuzhiyun case IPV6_FLOW:
2155*4882a593Smuzhiyun if (mrqc & E1000_MRQC_RSS_FIELD_IPV6)
2156*4882a593Smuzhiyun info->data |= RXH_IP_SRC | RXH_IP_DST;
2157*4882a593Smuzhiyun break;
2158*4882a593Smuzhiyun default:
2159*4882a593Smuzhiyun break;
2160*4882a593Smuzhiyun }
2161*4882a593Smuzhiyun return 0;
2162*4882a593Smuzhiyun }
2163*4882a593Smuzhiyun default:
2164*4882a593Smuzhiyun return -EOPNOTSUPP;
2165*4882a593Smuzhiyun }
2166*4882a593Smuzhiyun }
2167*4882a593Smuzhiyun
e1000e_get_eee(struct net_device * netdev,struct ethtool_eee * edata)2168*4882a593Smuzhiyun static int e1000e_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2169*4882a593Smuzhiyun {
2170*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
2171*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
2172*4882a593Smuzhiyun u16 cap_addr, lpa_addr, pcs_stat_addr, phy_data;
2173*4882a593Smuzhiyun u32 ret_val;
2174*4882a593Smuzhiyun
2175*4882a593Smuzhiyun if (!(adapter->flags2 & FLAG2_HAS_EEE))
2176*4882a593Smuzhiyun return -EOPNOTSUPP;
2177*4882a593Smuzhiyun
2178*4882a593Smuzhiyun switch (hw->phy.type) {
2179*4882a593Smuzhiyun case e1000_phy_82579:
2180*4882a593Smuzhiyun cap_addr = I82579_EEE_CAPABILITY;
2181*4882a593Smuzhiyun lpa_addr = I82579_EEE_LP_ABILITY;
2182*4882a593Smuzhiyun pcs_stat_addr = I82579_EEE_PCS_STATUS;
2183*4882a593Smuzhiyun break;
2184*4882a593Smuzhiyun case e1000_phy_i217:
2185*4882a593Smuzhiyun cap_addr = I217_EEE_CAPABILITY;
2186*4882a593Smuzhiyun lpa_addr = I217_EEE_LP_ABILITY;
2187*4882a593Smuzhiyun pcs_stat_addr = I217_EEE_PCS_STATUS;
2188*4882a593Smuzhiyun break;
2189*4882a593Smuzhiyun default:
2190*4882a593Smuzhiyun return -EOPNOTSUPP;
2191*4882a593Smuzhiyun }
2192*4882a593Smuzhiyun
2193*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
2194*4882a593Smuzhiyun
2195*4882a593Smuzhiyun ret_val = hw->phy.ops.acquire(hw);
2196*4882a593Smuzhiyun if (ret_val) {
2197*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
2198*4882a593Smuzhiyun return -EBUSY;
2199*4882a593Smuzhiyun }
2200*4882a593Smuzhiyun
2201*4882a593Smuzhiyun /* EEE Capability */
2202*4882a593Smuzhiyun ret_val = e1000_read_emi_reg_locked(hw, cap_addr, &phy_data);
2203*4882a593Smuzhiyun if (ret_val)
2204*4882a593Smuzhiyun goto release;
2205*4882a593Smuzhiyun edata->supported = mmd_eee_cap_to_ethtool_sup_t(phy_data);
2206*4882a593Smuzhiyun
2207*4882a593Smuzhiyun /* EEE Advertised */
2208*4882a593Smuzhiyun edata->advertised = mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
2209*4882a593Smuzhiyun
2210*4882a593Smuzhiyun /* EEE Link Partner Advertised */
2211*4882a593Smuzhiyun ret_val = e1000_read_emi_reg_locked(hw, lpa_addr, &phy_data);
2212*4882a593Smuzhiyun if (ret_val)
2213*4882a593Smuzhiyun goto release;
2214*4882a593Smuzhiyun edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2215*4882a593Smuzhiyun
2216*4882a593Smuzhiyun /* EEE PCS Status */
2217*4882a593Smuzhiyun ret_val = e1000_read_emi_reg_locked(hw, pcs_stat_addr, &phy_data);
2218*4882a593Smuzhiyun if (ret_val)
2219*4882a593Smuzhiyun goto release;
2220*4882a593Smuzhiyun if (hw->phy.type == e1000_phy_82579)
2221*4882a593Smuzhiyun phy_data <<= 8;
2222*4882a593Smuzhiyun
2223*4882a593Smuzhiyun /* Result of the EEE auto negotiation - there is no register that
2224*4882a593Smuzhiyun * has the status of the EEE negotiation so do a best-guess based
2225*4882a593Smuzhiyun * on whether Tx or Rx LPI indications have been received.
2226*4882a593Smuzhiyun */
2227*4882a593Smuzhiyun if (phy_data & (E1000_EEE_TX_LPI_RCVD | E1000_EEE_RX_LPI_RCVD))
2228*4882a593Smuzhiyun edata->eee_active = true;
2229*4882a593Smuzhiyun
2230*4882a593Smuzhiyun edata->eee_enabled = !hw->dev_spec.ich8lan.eee_disable;
2231*4882a593Smuzhiyun edata->tx_lpi_enabled = true;
2232*4882a593Smuzhiyun edata->tx_lpi_timer = er32(LPIC) >> E1000_LPIC_LPIET_SHIFT;
2233*4882a593Smuzhiyun
2234*4882a593Smuzhiyun release:
2235*4882a593Smuzhiyun hw->phy.ops.release(hw);
2236*4882a593Smuzhiyun if (ret_val)
2237*4882a593Smuzhiyun ret_val = -ENODATA;
2238*4882a593Smuzhiyun
2239*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
2240*4882a593Smuzhiyun
2241*4882a593Smuzhiyun return ret_val;
2242*4882a593Smuzhiyun }
2243*4882a593Smuzhiyun
e1000e_set_eee(struct net_device * netdev,struct ethtool_eee * edata)2244*4882a593Smuzhiyun static int e1000e_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
2245*4882a593Smuzhiyun {
2246*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
2247*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
2248*4882a593Smuzhiyun struct ethtool_eee eee_curr;
2249*4882a593Smuzhiyun s32 ret_val;
2250*4882a593Smuzhiyun
2251*4882a593Smuzhiyun ret_val = e1000e_get_eee(netdev, &eee_curr);
2252*4882a593Smuzhiyun if (ret_val)
2253*4882a593Smuzhiyun return ret_val;
2254*4882a593Smuzhiyun
2255*4882a593Smuzhiyun if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2256*4882a593Smuzhiyun e_err("Setting EEE tx-lpi is not supported\n");
2257*4882a593Smuzhiyun return -EINVAL;
2258*4882a593Smuzhiyun }
2259*4882a593Smuzhiyun
2260*4882a593Smuzhiyun if (eee_curr.tx_lpi_timer != edata->tx_lpi_timer) {
2261*4882a593Smuzhiyun e_err("Setting EEE Tx LPI timer is not supported\n");
2262*4882a593Smuzhiyun return -EINVAL;
2263*4882a593Smuzhiyun }
2264*4882a593Smuzhiyun
2265*4882a593Smuzhiyun if (edata->advertised & ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL)) {
2266*4882a593Smuzhiyun e_err("EEE advertisement supports only 100TX and/or 1000T full-duplex\n");
2267*4882a593Smuzhiyun return -EINVAL;
2268*4882a593Smuzhiyun }
2269*4882a593Smuzhiyun
2270*4882a593Smuzhiyun adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
2271*4882a593Smuzhiyun
2272*4882a593Smuzhiyun hw->dev_spec.ich8lan.eee_disable = !edata->eee_enabled;
2273*4882a593Smuzhiyun
2274*4882a593Smuzhiyun pm_runtime_get_sync(netdev->dev.parent);
2275*4882a593Smuzhiyun
2276*4882a593Smuzhiyun /* reset the link */
2277*4882a593Smuzhiyun if (netif_running(netdev))
2278*4882a593Smuzhiyun e1000e_reinit_locked(adapter);
2279*4882a593Smuzhiyun else
2280*4882a593Smuzhiyun e1000e_reset(adapter);
2281*4882a593Smuzhiyun
2282*4882a593Smuzhiyun pm_runtime_put_sync(netdev->dev.parent);
2283*4882a593Smuzhiyun
2284*4882a593Smuzhiyun return 0;
2285*4882a593Smuzhiyun }
2286*4882a593Smuzhiyun
e1000e_get_ts_info(struct net_device * netdev,struct ethtool_ts_info * info)2287*4882a593Smuzhiyun static int e1000e_get_ts_info(struct net_device *netdev,
2288*4882a593Smuzhiyun struct ethtool_ts_info *info)
2289*4882a593Smuzhiyun {
2290*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
2291*4882a593Smuzhiyun
2292*4882a593Smuzhiyun ethtool_op_get_ts_info(netdev, info);
2293*4882a593Smuzhiyun
2294*4882a593Smuzhiyun if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
2295*4882a593Smuzhiyun return 0;
2296*4882a593Smuzhiyun
2297*4882a593Smuzhiyun info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE |
2298*4882a593Smuzhiyun SOF_TIMESTAMPING_RX_HARDWARE |
2299*4882a593Smuzhiyun SOF_TIMESTAMPING_RAW_HARDWARE);
2300*4882a593Smuzhiyun
2301*4882a593Smuzhiyun info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
2302*4882a593Smuzhiyun
2303*4882a593Smuzhiyun info->rx_filters = (BIT(HWTSTAMP_FILTER_NONE) |
2304*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2305*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2306*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2307*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2308*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2309*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2310*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
2311*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
2312*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
2313*4882a593Smuzhiyun BIT(HWTSTAMP_FILTER_ALL));
2314*4882a593Smuzhiyun
2315*4882a593Smuzhiyun if (adapter->ptp_clock)
2316*4882a593Smuzhiyun info->phc_index = ptp_clock_index(adapter->ptp_clock);
2317*4882a593Smuzhiyun
2318*4882a593Smuzhiyun return 0;
2319*4882a593Smuzhiyun }
2320*4882a593Smuzhiyun
e1000e_get_priv_flags(struct net_device * netdev)2321*4882a593Smuzhiyun static u32 e1000e_get_priv_flags(struct net_device *netdev)
2322*4882a593Smuzhiyun {
2323*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
2324*4882a593Smuzhiyun u32 priv_flags = 0;
2325*4882a593Smuzhiyun
2326*4882a593Smuzhiyun if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
2327*4882a593Smuzhiyun priv_flags |= E1000E_PRIV_FLAGS_S0IX_ENABLED;
2328*4882a593Smuzhiyun
2329*4882a593Smuzhiyun return priv_flags;
2330*4882a593Smuzhiyun }
2331*4882a593Smuzhiyun
e1000e_set_priv_flags(struct net_device * netdev,u32 priv_flags)2332*4882a593Smuzhiyun static int e1000e_set_priv_flags(struct net_device *netdev, u32 priv_flags)
2333*4882a593Smuzhiyun {
2334*4882a593Smuzhiyun struct e1000_adapter *adapter = netdev_priv(netdev);
2335*4882a593Smuzhiyun unsigned int flags2 = adapter->flags2;
2336*4882a593Smuzhiyun
2337*4882a593Smuzhiyun flags2 &= ~FLAG2_ENABLE_S0IX_FLOWS;
2338*4882a593Smuzhiyun if (priv_flags & E1000E_PRIV_FLAGS_S0IX_ENABLED) {
2339*4882a593Smuzhiyun struct e1000_hw *hw = &adapter->hw;
2340*4882a593Smuzhiyun
2341*4882a593Smuzhiyun if (hw->mac.type < e1000_pch_cnp)
2342*4882a593Smuzhiyun return -EINVAL;
2343*4882a593Smuzhiyun flags2 |= FLAG2_ENABLE_S0IX_FLOWS;
2344*4882a593Smuzhiyun }
2345*4882a593Smuzhiyun
2346*4882a593Smuzhiyun if (flags2 != adapter->flags2)
2347*4882a593Smuzhiyun adapter->flags2 = flags2;
2348*4882a593Smuzhiyun
2349*4882a593Smuzhiyun return 0;
2350*4882a593Smuzhiyun }
2351*4882a593Smuzhiyun
2352*4882a593Smuzhiyun static const struct ethtool_ops e1000_ethtool_ops = {
2353*4882a593Smuzhiyun .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS,
2354*4882a593Smuzhiyun .get_drvinfo = e1000_get_drvinfo,
2355*4882a593Smuzhiyun .get_regs_len = e1000_get_regs_len,
2356*4882a593Smuzhiyun .get_regs = e1000_get_regs,
2357*4882a593Smuzhiyun .get_wol = e1000_get_wol,
2358*4882a593Smuzhiyun .set_wol = e1000_set_wol,
2359*4882a593Smuzhiyun .get_msglevel = e1000_get_msglevel,
2360*4882a593Smuzhiyun .set_msglevel = e1000_set_msglevel,
2361*4882a593Smuzhiyun .nway_reset = e1000_nway_reset,
2362*4882a593Smuzhiyun .get_link = ethtool_op_get_link,
2363*4882a593Smuzhiyun .get_eeprom_len = e1000_get_eeprom_len,
2364*4882a593Smuzhiyun .get_eeprom = e1000_get_eeprom,
2365*4882a593Smuzhiyun .set_eeprom = e1000_set_eeprom,
2366*4882a593Smuzhiyun .get_ringparam = e1000_get_ringparam,
2367*4882a593Smuzhiyun .set_ringparam = e1000_set_ringparam,
2368*4882a593Smuzhiyun .get_pauseparam = e1000_get_pauseparam,
2369*4882a593Smuzhiyun .set_pauseparam = e1000_set_pauseparam,
2370*4882a593Smuzhiyun .self_test = e1000_diag_test,
2371*4882a593Smuzhiyun .get_strings = e1000_get_strings,
2372*4882a593Smuzhiyun .set_phys_id = e1000_set_phys_id,
2373*4882a593Smuzhiyun .get_ethtool_stats = e1000_get_ethtool_stats,
2374*4882a593Smuzhiyun .get_sset_count = e1000e_get_sset_count,
2375*4882a593Smuzhiyun .get_coalesce = e1000_get_coalesce,
2376*4882a593Smuzhiyun .set_coalesce = e1000_set_coalesce,
2377*4882a593Smuzhiyun .get_rxnfc = e1000_get_rxnfc,
2378*4882a593Smuzhiyun .get_ts_info = e1000e_get_ts_info,
2379*4882a593Smuzhiyun .get_eee = e1000e_get_eee,
2380*4882a593Smuzhiyun .set_eee = e1000e_set_eee,
2381*4882a593Smuzhiyun .get_link_ksettings = e1000_get_link_ksettings,
2382*4882a593Smuzhiyun .set_link_ksettings = e1000_set_link_ksettings,
2383*4882a593Smuzhiyun .get_priv_flags = e1000e_get_priv_flags,
2384*4882a593Smuzhiyun .set_priv_flags = e1000e_set_priv_flags,
2385*4882a593Smuzhiyun };
2386*4882a593Smuzhiyun
e1000e_set_ethtool_ops(struct net_device * netdev)2387*4882a593Smuzhiyun void e1000e_set_ethtool_ops(struct net_device *netdev)
2388*4882a593Smuzhiyun {
2389*4882a593Smuzhiyun netdev->ethtool_ops = &e1000_ethtool_ops;
2390*4882a593Smuzhiyun }
2391