1*4882a593Smuzhiyun /* lasi_82596.c -- driver for the intel 82596 ethernet controller, as
2*4882a593Smuzhiyun munged into HPPA boxen .
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun This driver is based upon 82596.c, original credits are below...
5*4882a593Smuzhiyun but there were too many hoops which HP wants jumped through to
6*4882a593Smuzhiyun keep this code in there in a sane manner.
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun 3 primary sources of the mess --
9*4882a593Smuzhiyun 1) hppa needs *lots* of cacheline flushing to keep this kind of
10*4882a593Smuzhiyun MMIO running.
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun 2) The 82596 needs to see all of its pointers as their physical
13*4882a593Smuzhiyun address. Thus virt_to_bus/bus_to_virt are *everywhere*.
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun 3) The implementation HP is using seems to be significantly pickier
16*4882a593Smuzhiyun about when and how the command and RX units are started. some
17*4882a593Smuzhiyun command ordering was changed.
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun Examination of the mach driver leads one to believe that there
20*4882a593Smuzhiyun might be a saner way to pull this off... anyone who feels like a
21*4882a593Smuzhiyun full rewrite can be my guest.
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun Split 02/13/2000 Sam Creasey (sammy@oh.verio.com)
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun 02/01/2000 Initial modifications for parisc by Helge Deller (deller@gmx.de)
26*4882a593Smuzhiyun 03/02/2000 changes for better/correct(?) cache-flushing (deller)
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* 82596.c: A generic 82596 ethernet driver for linux. */
30*4882a593Smuzhiyun /*
31*4882a593Smuzhiyun Based on Apricot.c
32*4882a593Smuzhiyun Written 1994 by Mark Evans.
33*4882a593Smuzhiyun This driver is for the Apricot 82596 bus-master interface
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun Modularised 12/94 Mark Evans
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun Modified to support the 82596 ethernet chips on 680x0 VME boards.
39*4882a593Smuzhiyun by Richard Hirst <richard@sleepie.demon.co.uk>
40*4882a593Smuzhiyun Renamed to be 82596.c
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun 980825: Changed to receive directly in to sk_buffs which are
43*4882a593Smuzhiyun allocated at open() time. Eliminates copy on incoming frames
44*4882a593Smuzhiyun (small ones are still copied). Shared data now held in a
45*4882a593Smuzhiyun non-cached page, so we can run on 68060 in copyback mode.
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun TBD:
48*4882a593Smuzhiyun * look at deferring rx frames rather than discarding (as per tulip)
49*4882a593Smuzhiyun * handle tx ring full as per tulip
50*4882a593Smuzhiyun * performance test to tune rx_copybreak
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun Most of my modifications relate to the braindead big-endian
53*4882a593Smuzhiyun implementation by Intel. When the i596 is operating in
54*4882a593Smuzhiyun 'big-endian' mode, it thinks a 32 bit value of 0x12345678
55*4882a593Smuzhiyun should be stored as 0x56781234. This is a real pain, when
56*4882a593Smuzhiyun you have linked lists which are shared by the 680x0 and the
57*4882a593Smuzhiyun i596.
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun Driver skeleton
60*4882a593Smuzhiyun Written 1993 by Donald Becker.
61*4882a593Smuzhiyun Copyright 1993 United States Government as represented by the Director,
62*4882a593Smuzhiyun National Security Agency. This software may only be used and distributed
63*4882a593Smuzhiyun according to the terms of the GNU General Public License as modified by SRC,
64*4882a593Smuzhiyun incorporated herein by reference.
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun The author may be reached as becker@scyld.com, or C/O
67*4882a593Smuzhiyun Scyld Computing Corporation, 410 Severn Ave., Suite 210, Annapolis MD 21403
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun */
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun #include <linux/module.h>
72*4882a593Smuzhiyun #include <linux/kernel.h>
73*4882a593Smuzhiyun #include <linux/string.h>
74*4882a593Smuzhiyun #include <linux/errno.h>
75*4882a593Smuzhiyun #include <linux/ioport.h>
76*4882a593Smuzhiyun #include <linux/interrupt.h>
77*4882a593Smuzhiyun #include <linux/delay.h>
78*4882a593Smuzhiyun #include <linux/netdevice.h>
79*4882a593Smuzhiyun #include <linux/etherdevice.h>
80*4882a593Smuzhiyun #include <linux/skbuff.h>
81*4882a593Smuzhiyun #include <linux/types.h>
82*4882a593Smuzhiyun #include <linux/bitops.h>
83*4882a593Smuzhiyun #include <linux/dma-mapping.h>
84*4882a593Smuzhiyun #include <linux/io.h>
85*4882a593Smuzhiyun #include <linux/irq.h>
86*4882a593Smuzhiyun #include <linux/gfp.h>
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /* DEBUG flags
89*4882a593Smuzhiyun */
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun #define DEB_INIT 0x0001
92*4882a593Smuzhiyun #define DEB_PROBE 0x0002
93*4882a593Smuzhiyun #define DEB_SERIOUS 0x0004
94*4882a593Smuzhiyun #define DEB_ERRORS 0x0008
95*4882a593Smuzhiyun #define DEB_MULTI 0x0010
96*4882a593Smuzhiyun #define DEB_TDR 0x0020
97*4882a593Smuzhiyun #define DEB_OPEN 0x0040
98*4882a593Smuzhiyun #define DEB_RESET 0x0080
99*4882a593Smuzhiyun #define DEB_ADDCMD 0x0100
100*4882a593Smuzhiyun #define DEB_STATUS 0x0200
101*4882a593Smuzhiyun #define DEB_STARTTX 0x0400
102*4882a593Smuzhiyun #define DEB_RXADDR 0x0800
103*4882a593Smuzhiyun #define DEB_TXADDR 0x1000
104*4882a593Smuzhiyun #define DEB_RXFRAME 0x2000
105*4882a593Smuzhiyun #define DEB_INTS 0x4000
106*4882a593Smuzhiyun #define DEB_STRUCT 0x8000
107*4882a593Smuzhiyun #define DEB_ANY 0xffff
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun #define DEB(x, y) if (i596_debug & (x)) { y; }
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /*
114*4882a593Smuzhiyun * The MPU_PORT command allows direct access to the 82596. With PORT access
115*4882a593Smuzhiyun * the following commands are available (p5-18). The 32-bit port command
116*4882a593Smuzhiyun * must be word-swapped with the most significant word written first.
117*4882a593Smuzhiyun * This only applies to VME boards.
118*4882a593Smuzhiyun */
119*4882a593Smuzhiyun #define PORT_RESET 0x00 /* reset 82596 */
120*4882a593Smuzhiyun #define PORT_SELFTEST 0x01 /* selftest */
121*4882a593Smuzhiyun #define PORT_ALTSCP 0x02 /* alternate SCB address */
122*4882a593Smuzhiyun #define PORT_ALTDUMP 0x03 /* Alternate DUMP address */
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun static int i596_debug = (DEB_SERIOUS|DEB_PROBE);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun /* Copy frames shorter than rx_copybreak, otherwise pass on up in
127*4882a593Smuzhiyun * a full sized sk_buff. Value of 100 stolen from tulip.c (!alpha).
128*4882a593Smuzhiyun */
129*4882a593Smuzhiyun static int rx_copybreak = 100;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun #define PKT_BUF_SZ 1536
132*4882a593Smuzhiyun #define MAX_MC_CNT 64
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun #define ISCP_BUSY 0x0001
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun #define I596_NULL ((u32)0xffffffff)
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun #define CMD_EOL 0x8000 /* The last command of the list, stop. */
139*4882a593Smuzhiyun #define CMD_SUSP 0x4000 /* Suspend after doing cmd. */
140*4882a593Smuzhiyun #define CMD_INTR 0x2000 /* Interrupt after doing cmd. */
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun #define CMD_FLEX 0x0008 /* Enable flexible memory model */
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun enum commands {
145*4882a593Smuzhiyun CmdNOp = 0, CmdSASetup = 1, CmdConfigure = 2, CmdMulticastList = 3,
146*4882a593Smuzhiyun CmdTx = 4, CmdTDR = 5, CmdDump = 6, CmdDiagnose = 7
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun #define STAT_C 0x8000 /* Set to 0 after execution */
150*4882a593Smuzhiyun #define STAT_B 0x4000 /* Command being executed */
151*4882a593Smuzhiyun #define STAT_OK 0x2000 /* Command executed ok */
152*4882a593Smuzhiyun #define STAT_A 0x1000 /* Command aborted */
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun #define CUC_START 0x0100
155*4882a593Smuzhiyun #define CUC_RESUME 0x0200
156*4882a593Smuzhiyun #define CUC_SUSPEND 0x0300
157*4882a593Smuzhiyun #define CUC_ABORT 0x0400
158*4882a593Smuzhiyun #define RX_START 0x0010
159*4882a593Smuzhiyun #define RX_RESUME 0x0020
160*4882a593Smuzhiyun #define RX_SUSPEND 0x0030
161*4882a593Smuzhiyun #define RX_ABORT 0x0040
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun #define TX_TIMEOUT (HZ/20)
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun struct i596_reg {
167*4882a593Smuzhiyun unsigned short porthi;
168*4882a593Smuzhiyun unsigned short portlo;
169*4882a593Smuzhiyun u32 ca;
170*4882a593Smuzhiyun };
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun #define EOF 0x8000
173*4882a593Smuzhiyun #define SIZE_MASK 0x3fff
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun struct i596_tbd {
176*4882a593Smuzhiyun unsigned short size;
177*4882a593Smuzhiyun unsigned short pad;
178*4882a593Smuzhiyun u32 next;
179*4882a593Smuzhiyun u32 data;
180*4882a593Smuzhiyun u32 cache_pad[5]; /* Total 32 bytes... */
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /* The command structure has two 'next' pointers; v_next is the address of
184*4882a593Smuzhiyun * the next command as seen by the CPU, b_next is the address of the next
185*4882a593Smuzhiyun * command as seen by the 82596. The b_next pointer, as used by the 82596
186*4882a593Smuzhiyun * always references the status field of the next command, rather than the
187*4882a593Smuzhiyun * v_next field, because the 82596 is unaware of v_next. It may seem more
188*4882a593Smuzhiyun * logical to put v_next at the end of the structure, but we cannot do that
189*4882a593Smuzhiyun * because the 82596 expects other fields to be there, depending on command
190*4882a593Smuzhiyun * type.
191*4882a593Smuzhiyun */
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun struct i596_cmd {
194*4882a593Smuzhiyun struct i596_cmd *v_next; /* Address from CPUs viewpoint */
195*4882a593Smuzhiyun unsigned short status;
196*4882a593Smuzhiyun unsigned short command;
197*4882a593Smuzhiyun u32 b_next; /* Address from i596 viewpoint */
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun struct tx_cmd {
201*4882a593Smuzhiyun struct i596_cmd cmd;
202*4882a593Smuzhiyun u32 tbd;
203*4882a593Smuzhiyun unsigned short size;
204*4882a593Smuzhiyun unsigned short pad;
205*4882a593Smuzhiyun struct sk_buff *skb; /* So we can free it after tx */
206*4882a593Smuzhiyun dma_addr_t dma_addr;
207*4882a593Smuzhiyun #ifdef __LP64__
208*4882a593Smuzhiyun u32 cache_pad[6]; /* Total 64 bytes... */
209*4882a593Smuzhiyun #else
210*4882a593Smuzhiyun u32 cache_pad[1]; /* Total 32 bytes... */
211*4882a593Smuzhiyun #endif
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun struct tdr_cmd {
215*4882a593Smuzhiyun struct i596_cmd cmd;
216*4882a593Smuzhiyun unsigned short status;
217*4882a593Smuzhiyun unsigned short pad;
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun struct mc_cmd {
221*4882a593Smuzhiyun struct i596_cmd cmd;
222*4882a593Smuzhiyun short mc_cnt;
223*4882a593Smuzhiyun char mc_addrs[MAX_MC_CNT*6];
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun struct sa_cmd {
227*4882a593Smuzhiyun struct i596_cmd cmd;
228*4882a593Smuzhiyun char eth_addr[8];
229*4882a593Smuzhiyun };
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun struct cf_cmd {
232*4882a593Smuzhiyun struct i596_cmd cmd;
233*4882a593Smuzhiyun char i596_config[16];
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun struct i596_rfd {
237*4882a593Smuzhiyun unsigned short stat;
238*4882a593Smuzhiyun unsigned short cmd;
239*4882a593Smuzhiyun u32 b_next; /* Address from i596 viewpoint */
240*4882a593Smuzhiyun u32 rbd;
241*4882a593Smuzhiyun unsigned short count;
242*4882a593Smuzhiyun unsigned short size;
243*4882a593Smuzhiyun struct i596_rfd *v_next; /* Address from CPUs viewpoint */
244*4882a593Smuzhiyun struct i596_rfd *v_prev;
245*4882a593Smuzhiyun #ifndef __LP64__
246*4882a593Smuzhiyun u32 cache_pad[2]; /* Total 32 bytes... */
247*4882a593Smuzhiyun #endif
248*4882a593Smuzhiyun };
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun struct i596_rbd {
251*4882a593Smuzhiyun /* hardware data */
252*4882a593Smuzhiyun unsigned short count;
253*4882a593Smuzhiyun unsigned short zero1;
254*4882a593Smuzhiyun u32 b_next;
255*4882a593Smuzhiyun u32 b_data; /* Address from i596 viewpoint */
256*4882a593Smuzhiyun unsigned short size;
257*4882a593Smuzhiyun unsigned short zero2;
258*4882a593Smuzhiyun /* driver data */
259*4882a593Smuzhiyun struct sk_buff *skb;
260*4882a593Smuzhiyun struct i596_rbd *v_next;
261*4882a593Smuzhiyun u32 b_addr; /* This rbd addr from i596 view */
262*4882a593Smuzhiyun unsigned char *v_data; /* Address from CPUs viewpoint */
263*4882a593Smuzhiyun /* Total 32 bytes... */
264*4882a593Smuzhiyun #ifdef __LP64__
265*4882a593Smuzhiyun u32 cache_pad[4];
266*4882a593Smuzhiyun #endif
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /* These values as chosen so struct i596_dma fits in one page... */
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun #define TX_RING_SIZE 32
272*4882a593Smuzhiyun #define RX_RING_SIZE 16
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun struct i596_scb {
275*4882a593Smuzhiyun unsigned short status;
276*4882a593Smuzhiyun unsigned short command;
277*4882a593Smuzhiyun u32 cmd;
278*4882a593Smuzhiyun u32 rfd;
279*4882a593Smuzhiyun u32 crc_err;
280*4882a593Smuzhiyun u32 align_err;
281*4882a593Smuzhiyun u32 resource_err;
282*4882a593Smuzhiyun u32 over_err;
283*4882a593Smuzhiyun u32 rcvdt_err;
284*4882a593Smuzhiyun u32 short_err;
285*4882a593Smuzhiyun unsigned short t_on;
286*4882a593Smuzhiyun unsigned short t_off;
287*4882a593Smuzhiyun };
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun struct i596_iscp {
290*4882a593Smuzhiyun u32 stat;
291*4882a593Smuzhiyun u32 scb;
292*4882a593Smuzhiyun };
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun struct i596_scp {
295*4882a593Smuzhiyun u32 sysbus;
296*4882a593Smuzhiyun u32 pad;
297*4882a593Smuzhiyun u32 iscp;
298*4882a593Smuzhiyun };
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun struct i596_dma {
301*4882a593Smuzhiyun struct i596_scp scp __attribute__((aligned(32)));
302*4882a593Smuzhiyun volatile struct i596_iscp iscp __attribute__((aligned(32)));
303*4882a593Smuzhiyun volatile struct i596_scb scb __attribute__((aligned(32)));
304*4882a593Smuzhiyun struct sa_cmd sa_cmd __attribute__((aligned(32)));
305*4882a593Smuzhiyun struct cf_cmd cf_cmd __attribute__((aligned(32)));
306*4882a593Smuzhiyun struct tdr_cmd tdr_cmd __attribute__((aligned(32)));
307*4882a593Smuzhiyun struct mc_cmd mc_cmd __attribute__((aligned(32)));
308*4882a593Smuzhiyun struct i596_rfd rfds[RX_RING_SIZE] __attribute__((aligned(32)));
309*4882a593Smuzhiyun struct i596_rbd rbds[RX_RING_SIZE] __attribute__((aligned(32)));
310*4882a593Smuzhiyun struct tx_cmd tx_cmds[TX_RING_SIZE] __attribute__((aligned(32)));
311*4882a593Smuzhiyun struct i596_tbd tbds[TX_RING_SIZE] __attribute__((aligned(32)));
312*4882a593Smuzhiyun };
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun struct i596_private {
315*4882a593Smuzhiyun struct i596_dma *dma;
316*4882a593Smuzhiyun u32 stat;
317*4882a593Smuzhiyun int last_restart;
318*4882a593Smuzhiyun struct i596_rfd *rfd_head;
319*4882a593Smuzhiyun struct i596_rbd *rbd_head;
320*4882a593Smuzhiyun struct i596_cmd *cmd_tail;
321*4882a593Smuzhiyun struct i596_cmd *cmd_head;
322*4882a593Smuzhiyun int cmd_backlog;
323*4882a593Smuzhiyun u32 last_cmd;
324*4882a593Smuzhiyun int next_tx_cmd;
325*4882a593Smuzhiyun int options;
326*4882a593Smuzhiyun spinlock_t lock; /* serialize access to chip */
327*4882a593Smuzhiyun dma_addr_t dma_addr;
328*4882a593Smuzhiyun void __iomem *mpu_port;
329*4882a593Smuzhiyun void __iomem *ca;
330*4882a593Smuzhiyun };
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun static const char init_setup[] =
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun 0x8E, /* length, prefetch on */
335*4882a593Smuzhiyun 0xC8, /* fifo to 8, monitor off */
336*4882a593Smuzhiyun 0x80, /* don't save bad frames */
337*4882a593Smuzhiyun 0x2E, /* No source address insertion, 8 byte preamble */
338*4882a593Smuzhiyun 0x00, /* priority and backoff defaults */
339*4882a593Smuzhiyun 0x60, /* interframe spacing */
340*4882a593Smuzhiyun 0x00, /* slot time LSB */
341*4882a593Smuzhiyun 0xf2, /* slot time and retries */
342*4882a593Smuzhiyun 0x00, /* promiscuous mode */
343*4882a593Smuzhiyun 0x00, /* collision detect */
344*4882a593Smuzhiyun 0x40, /* minimum frame length */
345*4882a593Smuzhiyun 0xff,
346*4882a593Smuzhiyun 0x00,
347*4882a593Smuzhiyun 0x7f /* *multi IA */ };
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun static int i596_open(struct net_device *dev);
350*4882a593Smuzhiyun static netdev_tx_t i596_start_xmit(struct sk_buff *skb, struct net_device *dev);
351*4882a593Smuzhiyun static irqreturn_t i596_interrupt(int irq, void *dev_id);
352*4882a593Smuzhiyun static int i596_close(struct net_device *dev);
353*4882a593Smuzhiyun static void i596_add_cmd(struct net_device *dev, struct i596_cmd *cmd);
354*4882a593Smuzhiyun static void i596_tx_timeout (struct net_device *dev, unsigned int txqueue);
355*4882a593Smuzhiyun static void print_eth(unsigned char *buf, char *str);
356*4882a593Smuzhiyun static void set_multicast_list(struct net_device *dev);
357*4882a593Smuzhiyun static inline void ca(struct net_device *dev);
358*4882a593Smuzhiyun static void mpu_port(struct net_device *dev, int c, dma_addr_t x);
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun static int rx_ring_size = RX_RING_SIZE;
361*4882a593Smuzhiyun static int ticks_limit = 100;
362*4882a593Smuzhiyun static int max_cmd_backlog = TX_RING_SIZE-1;
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
365*4882a593Smuzhiyun static void i596_poll_controller(struct net_device *dev);
366*4882a593Smuzhiyun #endif
367*4882a593Smuzhiyun
virt_to_dma(struct i596_private * lp,volatile void * v)368*4882a593Smuzhiyun static inline dma_addr_t virt_to_dma(struct i596_private *lp, volatile void *v)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun return lp->dma_addr + ((unsigned long)v - (unsigned long)lp->dma);
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun #ifdef NONCOHERENT_DMA
dma_sync_dev(struct net_device * ndev,volatile void * addr,size_t len)374*4882a593Smuzhiyun static inline void dma_sync_dev(struct net_device *ndev, volatile void *addr,
375*4882a593Smuzhiyun size_t len)
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun dma_sync_single_for_device(ndev->dev.parent,
378*4882a593Smuzhiyun virt_to_dma(netdev_priv(ndev), addr), len,
379*4882a593Smuzhiyun DMA_BIDIRECTIONAL);
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun
dma_sync_cpu(struct net_device * ndev,volatile void * addr,size_t len)382*4882a593Smuzhiyun static inline void dma_sync_cpu(struct net_device *ndev, volatile void *addr,
383*4882a593Smuzhiyun size_t len)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun dma_sync_single_for_cpu(ndev->dev.parent,
386*4882a593Smuzhiyun virt_to_dma(netdev_priv(ndev), addr), len,
387*4882a593Smuzhiyun DMA_BIDIRECTIONAL);
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun #else
dma_sync_dev(struct net_device * ndev,volatile void * addr,size_t len)390*4882a593Smuzhiyun static inline void dma_sync_dev(struct net_device *ndev, volatile void *addr,
391*4882a593Smuzhiyun size_t len)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun }
dma_sync_cpu(struct net_device * ndev,volatile void * addr,size_t len)394*4882a593Smuzhiyun static inline void dma_sync_cpu(struct net_device *ndev, volatile void *addr,
395*4882a593Smuzhiyun size_t len)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun #endif /* NONCOHERENT_DMA */
399*4882a593Smuzhiyun
wait_istat(struct net_device * dev,struct i596_dma * dma,int delcnt,char * str)400*4882a593Smuzhiyun static inline int wait_istat(struct net_device *dev, struct i596_dma *dma, int delcnt, char *str)
401*4882a593Smuzhiyun {
402*4882a593Smuzhiyun dma_sync_cpu(dev, &(dma->iscp), sizeof(struct i596_iscp));
403*4882a593Smuzhiyun while (--delcnt && dma->iscp.stat) {
404*4882a593Smuzhiyun udelay(10);
405*4882a593Smuzhiyun dma_sync_cpu(dev, &(dma->iscp), sizeof(struct i596_iscp));
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun if (!delcnt) {
408*4882a593Smuzhiyun printk(KERN_ERR "%s: %s, iscp.stat %04x, didn't clear\n",
409*4882a593Smuzhiyun dev->name, str, SWAP16(dma->iscp.stat));
410*4882a593Smuzhiyun return -1;
411*4882a593Smuzhiyun } else
412*4882a593Smuzhiyun return 0;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun
wait_cmd(struct net_device * dev,struct i596_dma * dma,int delcnt,char * str)416*4882a593Smuzhiyun static inline int wait_cmd(struct net_device *dev, struct i596_dma *dma, int delcnt, char *str)
417*4882a593Smuzhiyun {
418*4882a593Smuzhiyun dma_sync_cpu(dev, &(dma->scb), sizeof(struct i596_scb));
419*4882a593Smuzhiyun while (--delcnt && dma->scb.command) {
420*4882a593Smuzhiyun udelay(10);
421*4882a593Smuzhiyun dma_sync_cpu(dev, &(dma->scb), sizeof(struct i596_scb));
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun if (!delcnt) {
424*4882a593Smuzhiyun printk(KERN_ERR "%s: %s, status %4.4x, cmd %4.4x.\n",
425*4882a593Smuzhiyun dev->name, str,
426*4882a593Smuzhiyun SWAP16(dma->scb.status),
427*4882a593Smuzhiyun SWAP16(dma->scb.command));
428*4882a593Smuzhiyun return -1;
429*4882a593Smuzhiyun } else
430*4882a593Smuzhiyun return 0;
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun
i596_display_data(struct net_device * dev)434*4882a593Smuzhiyun static void i596_display_data(struct net_device *dev)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
437*4882a593Smuzhiyun struct i596_dma *dma = lp->dma;
438*4882a593Smuzhiyun struct i596_cmd *cmd;
439*4882a593Smuzhiyun struct i596_rfd *rfd;
440*4882a593Smuzhiyun struct i596_rbd *rbd;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun printk(KERN_DEBUG "lp and scp at %p, .sysbus = %08x, .iscp = %08x\n",
443*4882a593Smuzhiyun &dma->scp, dma->scp.sysbus, SWAP32(dma->scp.iscp));
444*4882a593Smuzhiyun printk(KERN_DEBUG "iscp at %p, iscp.stat = %08x, .scb = %08x\n",
445*4882a593Smuzhiyun &dma->iscp, SWAP32(dma->iscp.stat), SWAP32(dma->iscp.scb));
446*4882a593Smuzhiyun printk(KERN_DEBUG "scb at %p, scb.status = %04x, .command = %04x,"
447*4882a593Smuzhiyun " .cmd = %08x, .rfd = %08x\n",
448*4882a593Smuzhiyun &dma->scb, SWAP16(dma->scb.status), SWAP16(dma->scb.command),
449*4882a593Smuzhiyun SWAP16(dma->scb.cmd), SWAP32(dma->scb.rfd));
450*4882a593Smuzhiyun printk(KERN_DEBUG " errors: crc %x, align %x, resource %x,"
451*4882a593Smuzhiyun " over %x, rcvdt %x, short %x\n",
452*4882a593Smuzhiyun SWAP32(dma->scb.crc_err), SWAP32(dma->scb.align_err),
453*4882a593Smuzhiyun SWAP32(dma->scb.resource_err), SWAP32(dma->scb.over_err),
454*4882a593Smuzhiyun SWAP32(dma->scb.rcvdt_err), SWAP32(dma->scb.short_err));
455*4882a593Smuzhiyun cmd = lp->cmd_head;
456*4882a593Smuzhiyun while (cmd != NULL) {
457*4882a593Smuzhiyun printk(KERN_DEBUG
458*4882a593Smuzhiyun "cmd at %p, .status = %04x, .command = %04x,"
459*4882a593Smuzhiyun " .b_next = %08x\n",
460*4882a593Smuzhiyun cmd, SWAP16(cmd->status), SWAP16(cmd->command),
461*4882a593Smuzhiyun SWAP32(cmd->b_next));
462*4882a593Smuzhiyun cmd = cmd->v_next;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun rfd = lp->rfd_head;
465*4882a593Smuzhiyun printk(KERN_DEBUG "rfd_head = %p\n", rfd);
466*4882a593Smuzhiyun do {
467*4882a593Smuzhiyun printk(KERN_DEBUG
468*4882a593Smuzhiyun " %p .stat %04x, .cmd %04x, b_next %08x, rbd %08x,"
469*4882a593Smuzhiyun " count %04x\n",
470*4882a593Smuzhiyun rfd, SWAP16(rfd->stat), SWAP16(rfd->cmd),
471*4882a593Smuzhiyun SWAP32(rfd->b_next), SWAP32(rfd->rbd),
472*4882a593Smuzhiyun SWAP16(rfd->count));
473*4882a593Smuzhiyun rfd = rfd->v_next;
474*4882a593Smuzhiyun } while (rfd != lp->rfd_head);
475*4882a593Smuzhiyun rbd = lp->rbd_head;
476*4882a593Smuzhiyun printk(KERN_DEBUG "rbd_head = %p\n", rbd);
477*4882a593Smuzhiyun do {
478*4882a593Smuzhiyun printk(KERN_DEBUG
479*4882a593Smuzhiyun " %p .count %04x, b_next %08x, b_data %08x,"
480*4882a593Smuzhiyun " size %04x\n",
481*4882a593Smuzhiyun rbd, SWAP16(rbd->count), SWAP32(rbd->b_next),
482*4882a593Smuzhiyun SWAP32(rbd->b_data), SWAP16(rbd->size));
483*4882a593Smuzhiyun rbd = rbd->v_next;
484*4882a593Smuzhiyun } while (rbd != lp->rbd_head);
485*4882a593Smuzhiyun dma_sync_cpu(dev, dma, sizeof(struct i596_dma));
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun
init_rx_bufs(struct net_device * dev)488*4882a593Smuzhiyun static inline int init_rx_bufs(struct net_device *dev)
489*4882a593Smuzhiyun {
490*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
491*4882a593Smuzhiyun struct i596_dma *dma = lp->dma;
492*4882a593Smuzhiyun int i;
493*4882a593Smuzhiyun struct i596_rfd *rfd;
494*4882a593Smuzhiyun struct i596_rbd *rbd;
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun /* First build the Receive Buffer Descriptor List */
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun for (i = 0, rbd = dma->rbds; i < rx_ring_size; i++, rbd++) {
499*4882a593Smuzhiyun dma_addr_t dma_addr;
500*4882a593Smuzhiyun struct sk_buff *skb;
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun skb = netdev_alloc_skb_ip_align(dev, PKT_BUF_SZ);
503*4882a593Smuzhiyun if (skb == NULL)
504*4882a593Smuzhiyun return -1;
505*4882a593Smuzhiyun dma_addr = dma_map_single(dev->dev.parent, skb->data,
506*4882a593Smuzhiyun PKT_BUF_SZ, DMA_FROM_DEVICE);
507*4882a593Smuzhiyun rbd->v_next = rbd+1;
508*4882a593Smuzhiyun rbd->b_next = SWAP32(virt_to_dma(lp, rbd+1));
509*4882a593Smuzhiyun rbd->b_addr = SWAP32(virt_to_dma(lp, rbd));
510*4882a593Smuzhiyun rbd->skb = skb;
511*4882a593Smuzhiyun rbd->v_data = skb->data;
512*4882a593Smuzhiyun rbd->b_data = SWAP32(dma_addr);
513*4882a593Smuzhiyun rbd->size = SWAP16(PKT_BUF_SZ);
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun lp->rbd_head = dma->rbds;
516*4882a593Smuzhiyun rbd = dma->rbds + rx_ring_size - 1;
517*4882a593Smuzhiyun rbd->v_next = dma->rbds;
518*4882a593Smuzhiyun rbd->b_next = SWAP32(virt_to_dma(lp, dma->rbds));
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun /* Now build the Receive Frame Descriptor List */
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun for (i = 0, rfd = dma->rfds; i < rx_ring_size; i++, rfd++) {
523*4882a593Smuzhiyun rfd->rbd = I596_NULL;
524*4882a593Smuzhiyun rfd->v_next = rfd+1;
525*4882a593Smuzhiyun rfd->v_prev = rfd-1;
526*4882a593Smuzhiyun rfd->b_next = SWAP32(virt_to_dma(lp, rfd+1));
527*4882a593Smuzhiyun rfd->cmd = SWAP16(CMD_FLEX);
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun lp->rfd_head = dma->rfds;
530*4882a593Smuzhiyun dma->scb.rfd = SWAP32(virt_to_dma(lp, dma->rfds));
531*4882a593Smuzhiyun rfd = dma->rfds;
532*4882a593Smuzhiyun rfd->rbd = SWAP32(virt_to_dma(lp, lp->rbd_head));
533*4882a593Smuzhiyun rfd->v_prev = dma->rfds + rx_ring_size - 1;
534*4882a593Smuzhiyun rfd = dma->rfds + rx_ring_size - 1;
535*4882a593Smuzhiyun rfd->v_next = dma->rfds;
536*4882a593Smuzhiyun rfd->b_next = SWAP32(virt_to_dma(lp, dma->rfds));
537*4882a593Smuzhiyun rfd->cmd = SWAP16(CMD_EOL|CMD_FLEX);
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun dma_sync_dev(dev, dma, sizeof(struct i596_dma));
540*4882a593Smuzhiyun return 0;
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun
remove_rx_bufs(struct net_device * dev)543*4882a593Smuzhiyun static inline void remove_rx_bufs(struct net_device *dev)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
546*4882a593Smuzhiyun struct i596_rbd *rbd;
547*4882a593Smuzhiyun int i;
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun for (i = 0, rbd = lp->dma->rbds; i < rx_ring_size; i++, rbd++) {
550*4882a593Smuzhiyun if (rbd->skb == NULL)
551*4882a593Smuzhiyun break;
552*4882a593Smuzhiyun dma_unmap_single(dev->dev.parent,
553*4882a593Smuzhiyun (dma_addr_t)SWAP32(rbd->b_data),
554*4882a593Smuzhiyun PKT_BUF_SZ, DMA_FROM_DEVICE);
555*4882a593Smuzhiyun dev_kfree_skb(rbd->skb);
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun
rebuild_rx_bufs(struct net_device * dev)560*4882a593Smuzhiyun static void rebuild_rx_bufs(struct net_device *dev)
561*4882a593Smuzhiyun {
562*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
563*4882a593Smuzhiyun struct i596_dma *dma = lp->dma;
564*4882a593Smuzhiyun int i;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun /* Ensure rx frame/buffer descriptors are tidy */
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun for (i = 0; i < rx_ring_size; i++) {
569*4882a593Smuzhiyun dma->rfds[i].rbd = I596_NULL;
570*4882a593Smuzhiyun dma->rfds[i].cmd = SWAP16(CMD_FLEX);
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun dma->rfds[rx_ring_size-1].cmd = SWAP16(CMD_EOL|CMD_FLEX);
573*4882a593Smuzhiyun lp->rfd_head = dma->rfds;
574*4882a593Smuzhiyun dma->scb.rfd = SWAP32(virt_to_dma(lp, dma->rfds));
575*4882a593Smuzhiyun lp->rbd_head = dma->rbds;
576*4882a593Smuzhiyun dma->rfds[0].rbd = SWAP32(virt_to_dma(lp, dma->rbds));
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun dma_sync_dev(dev, dma, sizeof(struct i596_dma));
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun
init_i596_mem(struct net_device * dev)582*4882a593Smuzhiyun static int init_i596_mem(struct net_device *dev)
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
585*4882a593Smuzhiyun struct i596_dma *dma = lp->dma;
586*4882a593Smuzhiyun unsigned long flags;
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun mpu_port(dev, PORT_RESET, 0);
589*4882a593Smuzhiyun udelay(100); /* Wait 100us - seems to help */
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun /* change the scp address */
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun lp->last_cmd = jiffies;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun dma->scp.sysbus = SYSBUS;
596*4882a593Smuzhiyun dma->scp.iscp = SWAP32(virt_to_dma(lp, &(dma->iscp)));
597*4882a593Smuzhiyun dma->iscp.scb = SWAP32(virt_to_dma(lp, &(dma->scb)));
598*4882a593Smuzhiyun dma->iscp.stat = SWAP32(ISCP_BUSY);
599*4882a593Smuzhiyun lp->cmd_backlog = 0;
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun lp->cmd_head = NULL;
602*4882a593Smuzhiyun dma->scb.cmd = I596_NULL;
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun DEB(DEB_INIT, printk(KERN_DEBUG "%s: starting i82596.\n", dev->name));
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun dma_sync_dev(dev, &(dma->scp), sizeof(struct i596_scp));
607*4882a593Smuzhiyun dma_sync_dev(dev, &(dma->iscp), sizeof(struct i596_iscp));
608*4882a593Smuzhiyun dma_sync_dev(dev, &(dma->scb), sizeof(struct i596_scb));
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun mpu_port(dev, PORT_ALTSCP, virt_to_dma(lp, &dma->scp));
611*4882a593Smuzhiyun ca(dev);
612*4882a593Smuzhiyun if (wait_istat(dev, dma, 1000, "initialization timed out"))
613*4882a593Smuzhiyun goto failed;
614*4882a593Smuzhiyun DEB(DEB_INIT, printk(KERN_DEBUG
615*4882a593Smuzhiyun "%s: i82596 initialization successful\n",
616*4882a593Smuzhiyun dev->name));
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun if (request_irq(dev->irq, i596_interrupt, 0, "i82596", dev)) {
619*4882a593Smuzhiyun printk(KERN_ERR "%s: IRQ %d not free\n", dev->name, dev->irq);
620*4882a593Smuzhiyun goto failed;
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun /* Ensure rx frame/buffer descriptors are tidy */
624*4882a593Smuzhiyun rebuild_rx_bufs(dev);
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun dma->scb.command = 0;
627*4882a593Smuzhiyun dma_sync_dev(dev, &(dma->scb), sizeof(struct i596_scb));
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun DEB(DEB_INIT, printk(KERN_DEBUG
630*4882a593Smuzhiyun "%s: queuing CmdConfigure\n", dev->name));
631*4882a593Smuzhiyun memcpy(dma->cf_cmd.i596_config, init_setup, 14);
632*4882a593Smuzhiyun dma->cf_cmd.cmd.command = SWAP16(CmdConfigure);
633*4882a593Smuzhiyun dma_sync_dev(dev, &(dma->cf_cmd), sizeof(struct cf_cmd));
634*4882a593Smuzhiyun i596_add_cmd(dev, &dma->cf_cmd.cmd);
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun DEB(DEB_INIT, printk(KERN_DEBUG "%s: queuing CmdSASetup\n", dev->name));
637*4882a593Smuzhiyun memcpy(dma->sa_cmd.eth_addr, dev->dev_addr, ETH_ALEN);
638*4882a593Smuzhiyun dma->sa_cmd.cmd.command = SWAP16(CmdSASetup);
639*4882a593Smuzhiyun dma_sync_dev(dev, &(dma->sa_cmd), sizeof(struct sa_cmd));
640*4882a593Smuzhiyun i596_add_cmd(dev, &dma->sa_cmd.cmd);
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun DEB(DEB_INIT, printk(KERN_DEBUG "%s: queuing CmdTDR\n", dev->name));
643*4882a593Smuzhiyun dma->tdr_cmd.cmd.command = SWAP16(CmdTDR);
644*4882a593Smuzhiyun dma_sync_dev(dev, &(dma->tdr_cmd), sizeof(struct tdr_cmd));
645*4882a593Smuzhiyun i596_add_cmd(dev, &dma->tdr_cmd.cmd);
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun spin_lock_irqsave (&lp->lock, flags);
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun if (wait_cmd(dev, dma, 1000, "timed out waiting to issue RX_START")) {
650*4882a593Smuzhiyun spin_unlock_irqrestore (&lp->lock, flags);
651*4882a593Smuzhiyun goto failed_free_irq;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun DEB(DEB_INIT, printk(KERN_DEBUG "%s: Issuing RX_START\n", dev->name));
654*4882a593Smuzhiyun dma->scb.command = SWAP16(RX_START);
655*4882a593Smuzhiyun dma->scb.rfd = SWAP32(virt_to_dma(lp, dma->rfds));
656*4882a593Smuzhiyun dma_sync_dev(dev, &(dma->scb), sizeof(struct i596_scb));
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun ca(dev);
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun spin_unlock_irqrestore (&lp->lock, flags);
661*4882a593Smuzhiyun if (wait_cmd(dev, dma, 1000, "RX_START not processed"))
662*4882a593Smuzhiyun goto failed_free_irq;
663*4882a593Smuzhiyun DEB(DEB_INIT, printk(KERN_DEBUG
664*4882a593Smuzhiyun "%s: Receive unit started OK\n", dev->name));
665*4882a593Smuzhiyun return 0;
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun failed_free_irq:
668*4882a593Smuzhiyun free_irq(dev->irq, dev);
669*4882a593Smuzhiyun failed:
670*4882a593Smuzhiyun printk(KERN_ERR "%s: Failed to initialise 82596\n", dev->name);
671*4882a593Smuzhiyun mpu_port(dev, PORT_RESET, 0);
672*4882a593Smuzhiyun return -1;
673*4882a593Smuzhiyun }
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun
i596_rx(struct net_device * dev)676*4882a593Smuzhiyun static inline int i596_rx(struct net_device *dev)
677*4882a593Smuzhiyun {
678*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
679*4882a593Smuzhiyun struct i596_rfd *rfd;
680*4882a593Smuzhiyun struct i596_rbd *rbd;
681*4882a593Smuzhiyun int frames = 0;
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun DEB(DEB_RXFRAME, printk(KERN_DEBUG
684*4882a593Smuzhiyun "i596_rx(), rfd_head %p, rbd_head %p\n",
685*4882a593Smuzhiyun lp->rfd_head, lp->rbd_head));
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun rfd = lp->rfd_head; /* Ref next frame to check */
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun dma_sync_cpu(dev, rfd, sizeof(struct i596_rfd));
691*4882a593Smuzhiyun while (rfd->stat & SWAP16(STAT_C)) { /* Loop while complete frames */
692*4882a593Smuzhiyun if (rfd->rbd == I596_NULL)
693*4882a593Smuzhiyun rbd = NULL;
694*4882a593Smuzhiyun else if (rfd->rbd == lp->rbd_head->b_addr) {
695*4882a593Smuzhiyun rbd = lp->rbd_head;
696*4882a593Smuzhiyun dma_sync_cpu(dev, rbd, sizeof(struct i596_rbd));
697*4882a593Smuzhiyun } else {
698*4882a593Smuzhiyun printk(KERN_ERR "%s: rbd chain broken!\n", dev->name);
699*4882a593Smuzhiyun /* XXX Now what? */
700*4882a593Smuzhiyun rbd = NULL;
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun DEB(DEB_RXFRAME, printk(KERN_DEBUG
703*4882a593Smuzhiyun " rfd %p, rfd.rbd %08x, rfd.stat %04x\n",
704*4882a593Smuzhiyun rfd, rfd->rbd, rfd->stat));
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun if (rbd != NULL && (rfd->stat & SWAP16(STAT_OK))) {
707*4882a593Smuzhiyun /* a good frame */
708*4882a593Smuzhiyun int pkt_len = SWAP16(rbd->count) & 0x3fff;
709*4882a593Smuzhiyun struct sk_buff *skb = rbd->skb;
710*4882a593Smuzhiyun int rx_in_place = 0;
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun DEB(DEB_RXADDR, print_eth(rbd->v_data, "received"));
713*4882a593Smuzhiyun frames++;
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun /* Check if the packet is long enough to just accept
716*4882a593Smuzhiyun * without copying to a properly sized skbuff.
717*4882a593Smuzhiyun */
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun if (pkt_len > rx_copybreak) {
720*4882a593Smuzhiyun struct sk_buff *newskb;
721*4882a593Smuzhiyun dma_addr_t dma_addr;
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun dma_unmap_single(dev->dev.parent,
724*4882a593Smuzhiyun (dma_addr_t)SWAP32(rbd->b_data),
725*4882a593Smuzhiyun PKT_BUF_SZ, DMA_FROM_DEVICE);
726*4882a593Smuzhiyun /* Get fresh skbuff to replace filled one. */
727*4882a593Smuzhiyun newskb = netdev_alloc_skb_ip_align(dev,
728*4882a593Smuzhiyun PKT_BUF_SZ);
729*4882a593Smuzhiyun if (newskb == NULL) {
730*4882a593Smuzhiyun skb = NULL; /* drop pkt */
731*4882a593Smuzhiyun goto memory_squeeze;
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun /* Pass up the skb already on the Rx ring. */
735*4882a593Smuzhiyun skb_put(skb, pkt_len);
736*4882a593Smuzhiyun rx_in_place = 1;
737*4882a593Smuzhiyun rbd->skb = newskb;
738*4882a593Smuzhiyun dma_addr = dma_map_single(dev->dev.parent,
739*4882a593Smuzhiyun newskb->data,
740*4882a593Smuzhiyun PKT_BUF_SZ,
741*4882a593Smuzhiyun DMA_FROM_DEVICE);
742*4882a593Smuzhiyun rbd->v_data = newskb->data;
743*4882a593Smuzhiyun rbd->b_data = SWAP32(dma_addr);
744*4882a593Smuzhiyun dma_sync_dev(dev, rbd, sizeof(struct i596_rbd));
745*4882a593Smuzhiyun } else {
746*4882a593Smuzhiyun skb = netdev_alloc_skb_ip_align(dev, pkt_len);
747*4882a593Smuzhiyun }
748*4882a593Smuzhiyun memory_squeeze:
749*4882a593Smuzhiyun if (skb == NULL) {
750*4882a593Smuzhiyun /* XXX tulip.c can defer packets here!! */
751*4882a593Smuzhiyun dev->stats.rx_dropped++;
752*4882a593Smuzhiyun } else {
753*4882a593Smuzhiyun if (!rx_in_place) {
754*4882a593Smuzhiyun /* 16 byte align the data fields */
755*4882a593Smuzhiyun dma_sync_single_for_cpu(dev->dev.parent,
756*4882a593Smuzhiyun (dma_addr_t)SWAP32(rbd->b_data),
757*4882a593Smuzhiyun PKT_BUF_SZ, DMA_FROM_DEVICE);
758*4882a593Smuzhiyun skb_put_data(skb, rbd->v_data,
759*4882a593Smuzhiyun pkt_len);
760*4882a593Smuzhiyun dma_sync_single_for_device(dev->dev.parent,
761*4882a593Smuzhiyun (dma_addr_t)SWAP32(rbd->b_data),
762*4882a593Smuzhiyun PKT_BUF_SZ, DMA_FROM_DEVICE);
763*4882a593Smuzhiyun }
764*4882a593Smuzhiyun skb->len = pkt_len;
765*4882a593Smuzhiyun skb->protocol = eth_type_trans(skb, dev);
766*4882a593Smuzhiyun netif_rx(skb);
767*4882a593Smuzhiyun dev->stats.rx_packets++;
768*4882a593Smuzhiyun dev->stats.rx_bytes += pkt_len;
769*4882a593Smuzhiyun }
770*4882a593Smuzhiyun } else {
771*4882a593Smuzhiyun DEB(DEB_ERRORS, printk(KERN_DEBUG
772*4882a593Smuzhiyun "%s: Error, rfd.stat = 0x%04x\n",
773*4882a593Smuzhiyun dev->name, rfd->stat));
774*4882a593Smuzhiyun dev->stats.rx_errors++;
775*4882a593Smuzhiyun if (rfd->stat & SWAP16(0x0100))
776*4882a593Smuzhiyun dev->stats.collisions++;
777*4882a593Smuzhiyun if (rfd->stat & SWAP16(0x8000))
778*4882a593Smuzhiyun dev->stats.rx_length_errors++;
779*4882a593Smuzhiyun if (rfd->stat & SWAP16(0x0001))
780*4882a593Smuzhiyun dev->stats.rx_over_errors++;
781*4882a593Smuzhiyun if (rfd->stat & SWAP16(0x0002))
782*4882a593Smuzhiyun dev->stats.rx_fifo_errors++;
783*4882a593Smuzhiyun if (rfd->stat & SWAP16(0x0004))
784*4882a593Smuzhiyun dev->stats.rx_frame_errors++;
785*4882a593Smuzhiyun if (rfd->stat & SWAP16(0x0008))
786*4882a593Smuzhiyun dev->stats.rx_crc_errors++;
787*4882a593Smuzhiyun if (rfd->stat & SWAP16(0x0010))
788*4882a593Smuzhiyun dev->stats.rx_length_errors++;
789*4882a593Smuzhiyun }
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun /* Clear the buffer descriptor count and EOF + F flags */
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun if (rbd != NULL && (rbd->count & SWAP16(0x4000))) {
794*4882a593Smuzhiyun rbd->count = 0;
795*4882a593Smuzhiyun lp->rbd_head = rbd->v_next;
796*4882a593Smuzhiyun dma_sync_dev(dev, rbd, sizeof(struct i596_rbd));
797*4882a593Smuzhiyun }
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun /* Tidy the frame descriptor, marking it as end of list */
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun rfd->rbd = I596_NULL;
802*4882a593Smuzhiyun rfd->stat = 0;
803*4882a593Smuzhiyun rfd->cmd = SWAP16(CMD_EOL|CMD_FLEX);
804*4882a593Smuzhiyun rfd->count = 0;
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun /* Update record of next frame descriptor to process */
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun lp->dma->scb.rfd = rfd->b_next;
809*4882a593Smuzhiyun lp->rfd_head = rfd->v_next;
810*4882a593Smuzhiyun dma_sync_dev(dev, rfd, sizeof(struct i596_rfd));
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun /* Remove end-of-list from old end descriptor */
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun rfd->v_prev->cmd = SWAP16(CMD_FLEX);
815*4882a593Smuzhiyun dma_sync_dev(dev, rfd->v_prev, sizeof(struct i596_rfd));
816*4882a593Smuzhiyun rfd = lp->rfd_head;
817*4882a593Smuzhiyun dma_sync_cpu(dev, rfd, sizeof(struct i596_rfd));
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun DEB(DEB_RXFRAME, printk(KERN_DEBUG "frames %d\n", frames));
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun return 0;
823*4882a593Smuzhiyun }
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun
i596_cleanup_cmd(struct net_device * dev,struct i596_private * lp)826*4882a593Smuzhiyun static inline void i596_cleanup_cmd(struct net_device *dev, struct i596_private *lp)
827*4882a593Smuzhiyun {
828*4882a593Smuzhiyun struct i596_cmd *ptr;
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun while (lp->cmd_head != NULL) {
831*4882a593Smuzhiyun ptr = lp->cmd_head;
832*4882a593Smuzhiyun lp->cmd_head = ptr->v_next;
833*4882a593Smuzhiyun lp->cmd_backlog--;
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun switch (SWAP16(ptr->command) & 0x7) {
836*4882a593Smuzhiyun case CmdTx:
837*4882a593Smuzhiyun {
838*4882a593Smuzhiyun struct tx_cmd *tx_cmd = (struct tx_cmd *) ptr;
839*4882a593Smuzhiyun struct sk_buff *skb = tx_cmd->skb;
840*4882a593Smuzhiyun dma_unmap_single(dev->dev.parent,
841*4882a593Smuzhiyun tx_cmd->dma_addr,
842*4882a593Smuzhiyun skb->len, DMA_TO_DEVICE);
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun dev_kfree_skb(skb);
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun dev->stats.tx_errors++;
847*4882a593Smuzhiyun dev->stats.tx_aborted_errors++;
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun ptr->v_next = NULL;
850*4882a593Smuzhiyun ptr->b_next = I596_NULL;
851*4882a593Smuzhiyun tx_cmd->cmd.command = 0; /* Mark as free */
852*4882a593Smuzhiyun break;
853*4882a593Smuzhiyun }
854*4882a593Smuzhiyun default:
855*4882a593Smuzhiyun ptr->v_next = NULL;
856*4882a593Smuzhiyun ptr->b_next = I596_NULL;
857*4882a593Smuzhiyun }
858*4882a593Smuzhiyun dma_sync_dev(dev, ptr, sizeof(struct i596_cmd));
859*4882a593Smuzhiyun }
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun wait_cmd(dev, lp->dma, 100, "i596_cleanup_cmd timed out");
862*4882a593Smuzhiyun lp->dma->scb.cmd = I596_NULL;
863*4882a593Smuzhiyun dma_sync_dev(dev, &(lp->dma->scb), sizeof(struct i596_scb));
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun
i596_reset(struct net_device * dev,struct i596_private * lp)867*4882a593Smuzhiyun static inline void i596_reset(struct net_device *dev, struct i596_private *lp)
868*4882a593Smuzhiyun {
869*4882a593Smuzhiyun unsigned long flags;
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun DEB(DEB_RESET, printk(KERN_DEBUG "i596_reset\n"));
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun spin_lock_irqsave (&lp->lock, flags);
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun wait_cmd(dev, lp->dma, 100, "i596_reset timed out");
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun netif_stop_queue(dev);
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun /* FIXME: this command might cause an lpmc */
880*4882a593Smuzhiyun lp->dma->scb.command = SWAP16(CUC_ABORT | RX_ABORT);
881*4882a593Smuzhiyun dma_sync_dev(dev, &(lp->dma->scb), sizeof(struct i596_scb));
882*4882a593Smuzhiyun ca(dev);
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun /* wait for shutdown */
885*4882a593Smuzhiyun wait_cmd(dev, lp->dma, 1000, "i596_reset 2 timed out");
886*4882a593Smuzhiyun spin_unlock_irqrestore (&lp->lock, flags);
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun i596_cleanup_cmd(dev, lp);
889*4882a593Smuzhiyun i596_rx(dev);
890*4882a593Smuzhiyun
891*4882a593Smuzhiyun netif_start_queue(dev);
892*4882a593Smuzhiyun init_i596_mem(dev);
893*4882a593Smuzhiyun }
894*4882a593Smuzhiyun
895*4882a593Smuzhiyun
i596_add_cmd(struct net_device * dev,struct i596_cmd * cmd)896*4882a593Smuzhiyun static void i596_add_cmd(struct net_device *dev, struct i596_cmd *cmd)
897*4882a593Smuzhiyun {
898*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
899*4882a593Smuzhiyun struct i596_dma *dma = lp->dma;
900*4882a593Smuzhiyun unsigned long flags;
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun DEB(DEB_ADDCMD, printk(KERN_DEBUG "i596_add_cmd cmd_head %p\n",
903*4882a593Smuzhiyun lp->cmd_head));
904*4882a593Smuzhiyun
905*4882a593Smuzhiyun cmd->status = 0;
906*4882a593Smuzhiyun cmd->command |= SWAP16(CMD_EOL | CMD_INTR);
907*4882a593Smuzhiyun cmd->v_next = NULL;
908*4882a593Smuzhiyun cmd->b_next = I596_NULL;
909*4882a593Smuzhiyun dma_sync_dev(dev, cmd, sizeof(struct i596_cmd));
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun spin_lock_irqsave (&lp->lock, flags);
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun if (lp->cmd_head != NULL) {
914*4882a593Smuzhiyun lp->cmd_tail->v_next = cmd;
915*4882a593Smuzhiyun lp->cmd_tail->b_next = SWAP32(virt_to_dma(lp, &cmd->status));
916*4882a593Smuzhiyun dma_sync_dev(dev, lp->cmd_tail, sizeof(struct i596_cmd));
917*4882a593Smuzhiyun } else {
918*4882a593Smuzhiyun lp->cmd_head = cmd;
919*4882a593Smuzhiyun wait_cmd(dev, dma, 100, "i596_add_cmd timed out");
920*4882a593Smuzhiyun dma->scb.cmd = SWAP32(virt_to_dma(lp, &cmd->status));
921*4882a593Smuzhiyun dma->scb.command = SWAP16(CUC_START);
922*4882a593Smuzhiyun dma_sync_dev(dev, &(dma->scb), sizeof(struct i596_scb));
923*4882a593Smuzhiyun ca(dev);
924*4882a593Smuzhiyun }
925*4882a593Smuzhiyun lp->cmd_tail = cmd;
926*4882a593Smuzhiyun lp->cmd_backlog++;
927*4882a593Smuzhiyun
928*4882a593Smuzhiyun spin_unlock_irqrestore (&lp->lock, flags);
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun if (lp->cmd_backlog > max_cmd_backlog) {
931*4882a593Smuzhiyun unsigned long tickssofar = jiffies - lp->last_cmd;
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun if (tickssofar < ticks_limit)
934*4882a593Smuzhiyun return;
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun printk(KERN_ERR
937*4882a593Smuzhiyun "%s: command unit timed out, status resetting.\n",
938*4882a593Smuzhiyun dev->name);
939*4882a593Smuzhiyun #if 1
940*4882a593Smuzhiyun i596_reset(dev, lp);
941*4882a593Smuzhiyun #endif
942*4882a593Smuzhiyun }
943*4882a593Smuzhiyun }
944*4882a593Smuzhiyun
i596_open(struct net_device * dev)945*4882a593Smuzhiyun static int i596_open(struct net_device *dev)
946*4882a593Smuzhiyun {
947*4882a593Smuzhiyun DEB(DEB_OPEN, printk(KERN_DEBUG
948*4882a593Smuzhiyun "%s: i596_open() irq %d.\n", dev->name, dev->irq));
949*4882a593Smuzhiyun
950*4882a593Smuzhiyun if (init_rx_bufs(dev)) {
951*4882a593Smuzhiyun printk(KERN_ERR "%s: Failed to init rx bufs\n", dev->name);
952*4882a593Smuzhiyun return -EAGAIN;
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun if (init_i596_mem(dev)) {
955*4882a593Smuzhiyun printk(KERN_ERR "%s: Failed to init memory\n", dev->name);
956*4882a593Smuzhiyun goto out_remove_rx_bufs;
957*4882a593Smuzhiyun }
958*4882a593Smuzhiyun netif_start_queue(dev);
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun return 0;
961*4882a593Smuzhiyun
962*4882a593Smuzhiyun out_remove_rx_bufs:
963*4882a593Smuzhiyun remove_rx_bufs(dev);
964*4882a593Smuzhiyun return -EAGAIN;
965*4882a593Smuzhiyun }
966*4882a593Smuzhiyun
i596_tx_timeout(struct net_device * dev,unsigned int txqueue)967*4882a593Smuzhiyun static void i596_tx_timeout (struct net_device *dev, unsigned int txqueue)
968*4882a593Smuzhiyun {
969*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun /* Transmitter timeout, serious problems. */
972*4882a593Smuzhiyun DEB(DEB_ERRORS, printk(KERN_DEBUG
973*4882a593Smuzhiyun "%s: transmit timed out, status resetting.\n",
974*4882a593Smuzhiyun dev->name));
975*4882a593Smuzhiyun
976*4882a593Smuzhiyun dev->stats.tx_errors++;
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun /* Try to restart the adaptor */
979*4882a593Smuzhiyun if (lp->last_restart == dev->stats.tx_packets) {
980*4882a593Smuzhiyun DEB(DEB_ERRORS, printk(KERN_DEBUG "Resetting board.\n"));
981*4882a593Smuzhiyun /* Shutdown and restart */
982*4882a593Smuzhiyun i596_reset (dev, lp);
983*4882a593Smuzhiyun } else {
984*4882a593Smuzhiyun /* Issue a channel attention signal */
985*4882a593Smuzhiyun DEB(DEB_ERRORS, printk(KERN_DEBUG "Kicking board.\n"));
986*4882a593Smuzhiyun lp->dma->scb.command = SWAP16(CUC_START | RX_START);
987*4882a593Smuzhiyun dma_sync_dev(dev, &(lp->dma->scb), sizeof(struct i596_scb));
988*4882a593Smuzhiyun ca (dev);
989*4882a593Smuzhiyun lp->last_restart = dev->stats.tx_packets;
990*4882a593Smuzhiyun }
991*4882a593Smuzhiyun
992*4882a593Smuzhiyun netif_trans_update(dev); /* prevent tx timeout */
993*4882a593Smuzhiyun netif_wake_queue (dev);
994*4882a593Smuzhiyun }
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun
i596_start_xmit(struct sk_buff * skb,struct net_device * dev)997*4882a593Smuzhiyun static netdev_tx_t i596_start_xmit(struct sk_buff *skb, struct net_device *dev)
998*4882a593Smuzhiyun {
999*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
1000*4882a593Smuzhiyun struct tx_cmd *tx_cmd;
1001*4882a593Smuzhiyun struct i596_tbd *tbd;
1002*4882a593Smuzhiyun short length = skb->len;
1003*4882a593Smuzhiyun
1004*4882a593Smuzhiyun DEB(DEB_STARTTX, printk(KERN_DEBUG
1005*4882a593Smuzhiyun "%s: i596_start_xmit(%x,%p) called\n",
1006*4882a593Smuzhiyun dev->name, skb->len, skb->data));
1007*4882a593Smuzhiyun
1008*4882a593Smuzhiyun if (length < ETH_ZLEN) {
1009*4882a593Smuzhiyun if (skb_padto(skb, ETH_ZLEN))
1010*4882a593Smuzhiyun return NETDEV_TX_OK;
1011*4882a593Smuzhiyun length = ETH_ZLEN;
1012*4882a593Smuzhiyun }
1013*4882a593Smuzhiyun
1014*4882a593Smuzhiyun netif_stop_queue(dev);
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun tx_cmd = lp->dma->tx_cmds + lp->next_tx_cmd;
1017*4882a593Smuzhiyun tbd = lp->dma->tbds + lp->next_tx_cmd;
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun if (tx_cmd->cmd.command) {
1020*4882a593Smuzhiyun DEB(DEB_ERRORS, printk(KERN_DEBUG
1021*4882a593Smuzhiyun "%s: xmit ring full, dropping packet.\n",
1022*4882a593Smuzhiyun dev->name));
1023*4882a593Smuzhiyun dev->stats.tx_dropped++;
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun dev_kfree_skb_any(skb);
1026*4882a593Smuzhiyun } else {
1027*4882a593Smuzhiyun if (++lp->next_tx_cmd == TX_RING_SIZE)
1028*4882a593Smuzhiyun lp->next_tx_cmd = 0;
1029*4882a593Smuzhiyun tx_cmd->tbd = SWAP32(virt_to_dma(lp, tbd));
1030*4882a593Smuzhiyun tbd->next = I596_NULL;
1031*4882a593Smuzhiyun
1032*4882a593Smuzhiyun tx_cmd->cmd.command = SWAP16(CMD_FLEX | CmdTx);
1033*4882a593Smuzhiyun tx_cmd->skb = skb;
1034*4882a593Smuzhiyun
1035*4882a593Smuzhiyun tx_cmd->pad = 0;
1036*4882a593Smuzhiyun tx_cmd->size = 0;
1037*4882a593Smuzhiyun tbd->pad = 0;
1038*4882a593Smuzhiyun tbd->size = SWAP16(EOF | length);
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun tx_cmd->dma_addr = dma_map_single(dev->dev.parent, skb->data,
1041*4882a593Smuzhiyun skb->len, DMA_TO_DEVICE);
1042*4882a593Smuzhiyun tbd->data = SWAP32(tx_cmd->dma_addr);
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun DEB(DEB_TXADDR, print_eth(skb->data, "tx-queued"));
1045*4882a593Smuzhiyun dma_sync_dev(dev, tx_cmd, sizeof(struct tx_cmd));
1046*4882a593Smuzhiyun dma_sync_dev(dev, tbd, sizeof(struct i596_tbd));
1047*4882a593Smuzhiyun i596_add_cmd(dev, &tx_cmd->cmd);
1048*4882a593Smuzhiyun
1049*4882a593Smuzhiyun dev->stats.tx_packets++;
1050*4882a593Smuzhiyun dev->stats.tx_bytes += length;
1051*4882a593Smuzhiyun }
1052*4882a593Smuzhiyun
1053*4882a593Smuzhiyun netif_start_queue(dev);
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun return NETDEV_TX_OK;
1056*4882a593Smuzhiyun }
1057*4882a593Smuzhiyun
print_eth(unsigned char * add,char * str)1058*4882a593Smuzhiyun static void print_eth(unsigned char *add, char *str)
1059*4882a593Smuzhiyun {
1060*4882a593Smuzhiyun printk(KERN_DEBUG "i596 0x%p, %pM --> %pM %02X%02X, %s\n",
1061*4882a593Smuzhiyun add, add + 6, add, add[12], add[13], str);
1062*4882a593Smuzhiyun }
1063*4882a593Smuzhiyun static const struct net_device_ops i596_netdev_ops = {
1064*4882a593Smuzhiyun .ndo_open = i596_open,
1065*4882a593Smuzhiyun .ndo_stop = i596_close,
1066*4882a593Smuzhiyun .ndo_start_xmit = i596_start_xmit,
1067*4882a593Smuzhiyun .ndo_set_rx_mode = set_multicast_list,
1068*4882a593Smuzhiyun .ndo_tx_timeout = i596_tx_timeout,
1069*4882a593Smuzhiyun .ndo_validate_addr = eth_validate_addr,
1070*4882a593Smuzhiyun .ndo_set_mac_address = eth_mac_addr,
1071*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
1072*4882a593Smuzhiyun .ndo_poll_controller = i596_poll_controller,
1073*4882a593Smuzhiyun #endif
1074*4882a593Smuzhiyun };
1075*4882a593Smuzhiyun
i82596_probe(struct net_device * dev)1076*4882a593Smuzhiyun static int i82596_probe(struct net_device *dev)
1077*4882a593Smuzhiyun {
1078*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
1079*4882a593Smuzhiyun int ret;
1080*4882a593Smuzhiyun
1081*4882a593Smuzhiyun /* This lot is ensure things have been cache line aligned. */
1082*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct i596_rfd) != 32);
1083*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct i596_rbd) & 31);
1084*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct tx_cmd) & 31);
1085*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct i596_tbd) != 32);
1086*4882a593Smuzhiyun #ifndef __LP64__
1087*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct i596_dma) > 4096);
1088*4882a593Smuzhiyun #endif
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun if (!dev->base_addr || !dev->irq)
1091*4882a593Smuzhiyun return -ENODEV;
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun dev->netdev_ops = &i596_netdev_ops;
1094*4882a593Smuzhiyun dev->watchdog_timeo = TX_TIMEOUT;
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun memset(lp->dma, 0, sizeof(struct i596_dma));
1097*4882a593Smuzhiyun lp->dma->scb.command = 0;
1098*4882a593Smuzhiyun lp->dma->scb.cmd = I596_NULL;
1099*4882a593Smuzhiyun lp->dma->scb.rfd = I596_NULL;
1100*4882a593Smuzhiyun spin_lock_init(&lp->lock);
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun dma_sync_dev(dev, lp->dma, sizeof(struct i596_dma));
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun ret = register_netdev(dev);
1105*4882a593Smuzhiyun if (ret)
1106*4882a593Smuzhiyun return ret;
1107*4882a593Smuzhiyun
1108*4882a593Smuzhiyun DEB(DEB_PROBE, printk(KERN_INFO "%s: 82596 at %#3lx, %pM IRQ %d.\n",
1109*4882a593Smuzhiyun dev->name, dev->base_addr, dev->dev_addr,
1110*4882a593Smuzhiyun dev->irq));
1111*4882a593Smuzhiyun DEB(DEB_INIT, printk(KERN_INFO
1112*4882a593Smuzhiyun "%s: dma at 0x%p (%d bytes), lp->scb at 0x%p\n",
1113*4882a593Smuzhiyun dev->name, lp->dma, (int)sizeof(struct i596_dma),
1114*4882a593Smuzhiyun &lp->dma->scb));
1115*4882a593Smuzhiyun
1116*4882a593Smuzhiyun return 0;
1117*4882a593Smuzhiyun }
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
i596_poll_controller(struct net_device * dev)1120*4882a593Smuzhiyun static void i596_poll_controller(struct net_device *dev)
1121*4882a593Smuzhiyun {
1122*4882a593Smuzhiyun disable_irq(dev->irq);
1123*4882a593Smuzhiyun i596_interrupt(dev->irq, dev);
1124*4882a593Smuzhiyun enable_irq(dev->irq);
1125*4882a593Smuzhiyun }
1126*4882a593Smuzhiyun #endif
1127*4882a593Smuzhiyun
i596_interrupt(int irq,void * dev_id)1128*4882a593Smuzhiyun static irqreturn_t i596_interrupt(int irq, void *dev_id)
1129*4882a593Smuzhiyun {
1130*4882a593Smuzhiyun struct net_device *dev = dev_id;
1131*4882a593Smuzhiyun struct i596_private *lp;
1132*4882a593Smuzhiyun struct i596_dma *dma;
1133*4882a593Smuzhiyun unsigned short status, ack_cmd = 0;
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun lp = netdev_priv(dev);
1136*4882a593Smuzhiyun dma = lp->dma;
1137*4882a593Smuzhiyun
1138*4882a593Smuzhiyun spin_lock (&lp->lock);
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun wait_cmd(dev, dma, 100, "i596 interrupt, timeout");
1141*4882a593Smuzhiyun status = SWAP16(dma->scb.status);
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun DEB(DEB_INTS, printk(KERN_DEBUG
1144*4882a593Smuzhiyun "%s: i596 interrupt, IRQ %d, status %4.4x.\n",
1145*4882a593Smuzhiyun dev->name, dev->irq, status));
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun ack_cmd = status & 0xf000;
1148*4882a593Smuzhiyun
1149*4882a593Smuzhiyun if (!ack_cmd) {
1150*4882a593Smuzhiyun DEB(DEB_ERRORS, printk(KERN_DEBUG
1151*4882a593Smuzhiyun "%s: interrupt with no events\n",
1152*4882a593Smuzhiyun dev->name));
1153*4882a593Smuzhiyun spin_unlock (&lp->lock);
1154*4882a593Smuzhiyun return IRQ_NONE;
1155*4882a593Smuzhiyun }
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun if ((status & 0x8000) || (status & 0x2000)) {
1158*4882a593Smuzhiyun struct i596_cmd *ptr;
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun if ((status & 0x8000))
1161*4882a593Smuzhiyun DEB(DEB_INTS,
1162*4882a593Smuzhiyun printk(KERN_DEBUG
1163*4882a593Smuzhiyun "%s: i596 interrupt completed command.\n",
1164*4882a593Smuzhiyun dev->name));
1165*4882a593Smuzhiyun if ((status & 0x2000))
1166*4882a593Smuzhiyun DEB(DEB_INTS,
1167*4882a593Smuzhiyun printk(KERN_DEBUG
1168*4882a593Smuzhiyun "%s: i596 interrupt command unit inactive %x.\n",
1169*4882a593Smuzhiyun dev->name, status & 0x0700));
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun while (lp->cmd_head != NULL) {
1172*4882a593Smuzhiyun dma_sync_cpu(dev, lp->cmd_head, sizeof(struct i596_cmd));
1173*4882a593Smuzhiyun if (!(lp->cmd_head->status & SWAP16(STAT_C)))
1174*4882a593Smuzhiyun break;
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun ptr = lp->cmd_head;
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun DEB(DEB_STATUS,
1179*4882a593Smuzhiyun printk(KERN_DEBUG
1180*4882a593Smuzhiyun "cmd_head->status = %04x, ->command = %04x\n",
1181*4882a593Smuzhiyun SWAP16(lp->cmd_head->status),
1182*4882a593Smuzhiyun SWAP16(lp->cmd_head->command)));
1183*4882a593Smuzhiyun lp->cmd_head = ptr->v_next;
1184*4882a593Smuzhiyun lp->cmd_backlog--;
1185*4882a593Smuzhiyun
1186*4882a593Smuzhiyun switch (SWAP16(ptr->command) & 0x7) {
1187*4882a593Smuzhiyun case CmdTx:
1188*4882a593Smuzhiyun {
1189*4882a593Smuzhiyun struct tx_cmd *tx_cmd = (struct tx_cmd *) ptr;
1190*4882a593Smuzhiyun struct sk_buff *skb = tx_cmd->skb;
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun if (ptr->status & SWAP16(STAT_OK)) {
1193*4882a593Smuzhiyun DEB(DEB_TXADDR,
1194*4882a593Smuzhiyun print_eth(skb->data, "tx-done"));
1195*4882a593Smuzhiyun } else {
1196*4882a593Smuzhiyun dev->stats.tx_errors++;
1197*4882a593Smuzhiyun if (ptr->status & SWAP16(0x0020))
1198*4882a593Smuzhiyun dev->stats.collisions++;
1199*4882a593Smuzhiyun if (!(ptr->status & SWAP16(0x0040)))
1200*4882a593Smuzhiyun dev->stats.tx_heartbeat_errors++;
1201*4882a593Smuzhiyun if (ptr->status & SWAP16(0x0400))
1202*4882a593Smuzhiyun dev->stats.tx_carrier_errors++;
1203*4882a593Smuzhiyun if (ptr->status & SWAP16(0x0800))
1204*4882a593Smuzhiyun dev->stats.collisions++;
1205*4882a593Smuzhiyun if (ptr->status & SWAP16(0x1000))
1206*4882a593Smuzhiyun dev->stats.tx_aborted_errors++;
1207*4882a593Smuzhiyun }
1208*4882a593Smuzhiyun dma_unmap_single(dev->dev.parent,
1209*4882a593Smuzhiyun tx_cmd->dma_addr,
1210*4882a593Smuzhiyun skb->len, DMA_TO_DEVICE);
1211*4882a593Smuzhiyun dev_consume_skb_irq(skb);
1212*4882a593Smuzhiyun
1213*4882a593Smuzhiyun tx_cmd->cmd.command = 0; /* Mark free */
1214*4882a593Smuzhiyun break;
1215*4882a593Smuzhiyun }
1216*4882a593Smuzhiyun case CmdTDR:
1217*4882a593Smuzhiyun {
1218*4882a593Smuzhiyun unsigned short status = SWAP16(((struct tdr_cmd *)ptr)->status);
1219*4882a593Smuzhiyun
1220*4882a593Smuzhiyun if (status & 0x8000) {
1221*4882a593Smuzhiyun DEB(DEB_ANY,
1222*4882a593Smuzhiyun printk(KERN_DEBUG "%s: link ok.\n",
1223*4882a593Smuzhiyun dev->name));
1224*4882a593Smuzhiyun } else {
1225*4882a593Smuzhiyun if (status & 0x4000)
1226*4882a593Smuzhiyun printk(KERN_ERR
1227*4882a593Smuzhiyun "%s: Transceiver problem.\n",
1228*4882a593Smuzhiyun dev->name);
1229*4882a593Smuzhiyun if (status & 0x2000)
1230*4882a593Smuzhiyun printk(KERN_ERR
1231*4882a593Smuzhiyun "%s: Termination problem.\n",
1232*4882a593Smuzhiyun dev->name);
1233*4882a593Smuzhiyun if (status & 0x1000)
1234*4882a593Smuzhiyun printk(KERN_ERR
1235*4882a593Smuzhiyun "%s: Short circuit.\n",
1236*4882a593Smuzhiyun dev->name);
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun DEB(DEB_TDR,
1239*4882a593Smuzhiyun printk(KERN_DEBUG "%s: Time %d.\n",
1240*4882a593Smuzhiyun dev->name, status & 0x07ff));
1241*4882a593Smuzhiyun }
1242*4882a593Smuzhiyun break;
1243*4882a593Smuzhiyun }
1244*4882a593Smuzhiyun case CmdConfigure:
1245*4882a593Smuzhiyun /*
1246*4882a593Smuzhiyun * Zap command so set_multicast_list() know
1247*4882a593Smuzhiyun * it is free
1248*4882a593Smuzhiyun */
1249*4882a593Smuzhiyun ptr->command = 0;
1250*4882a593Smuzhiyun break;
1251*4882a593Smuzhiyun }
1252*4882a593Smuzhiyun ptr->v_next = NULL;
1253*4882a593Smuzhiyun ptr->b_next = I596_NULL;
1254*4882a593Smuzhiyun dma_sync_dev(dev, ptr, sizeof(struct i596_cmd));
1255*4882a593Smuzhiyun lp->last_cmd = jiffies;
1256*4882a593Smuzhiyun }
1257*4882a593Smuzhiyun
1258*4882a593Smuzhiyun /* This mess is arranging that only the last of any outstanding
1259*4882a593Smuzhiyun * commands has the interrupt bit set. Should probably really
1260*4882a593Smuzhiyun * only add to the cmd queue when the CU is stopped.
1261*4882a593Smuzhiyun */
1262*4882a593Smuzhiyun ptr = lp->cmd_head;
1263*4882a593Smuzhiyun while ((ptr != NULL) && (ptr != lp->cmd_tail)) {
1264*4882a593Smuzhiyun struct i596_cmd *prev = ptr;
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun ptr->command &= SWAP16(0x1fff);
1267*4882a593Smuzhiyun ptr = ptr->v_next;
1268*4882a593Smuzhiyun dma_sync_dev(dev, prev, sizeof(struct i596_cmd));
1269*4882a593Smuzhiyun }
1270*4882a593Smuzhiyun
1271*4882a593Smuzhiyun if (lp->cmd_head != NULL)
1272*4882a593Smuzhiyun ack_cmd |= CUC_START;
1273*4882a593Smuzhiyun dma->scb.cmd = SWAP32(virt_to_dma(lp, &lp->cmd_head->status));
1274*4882a593Smuzhiyun dma_sync_dev(dev, &dma->scb, sizeof(struct i596_scb));
1275*4882a593Smuzhiyun }
1276*4882a593Smuzhiyun if ((status & 0x1000) || (status & 0x4000)) {
1277*4882a593Smuzhiyun if ((status & 0x4000))
1278*4882a593Smuzhiyun DEB(DEB_INTS,
1279*4882a593Smuzhiyun printk(KERN_DEBUG
1280*4882a593Smuzhiyun "%s: i596 interrupt received a frame.\n",
1281*4882a593Smuzhiyun dev->name));
1282*4882a593Smuzhiyun i596_rx(dev);
1283*4882a593Smuzhiyun /* Only RX_START if stopped - RGH 07-07-96 */
1284*4882a593Smuzhiyun if (status & 0x1000) {
1285*4882a593Smuzhiyun if (netif_running(dev)) {
1286*4882a593Smuzhiyun DEB(DEB_ERRORS,
1287*4882a593Smuzhiyun printk(KERN_DEBUG
1288*4882a593Smuzhiyun "%s: i596 interrupt receive unit inactive, status 0x%x\n",
1289*4882a593Smuzhiyun dev->name, status));
1290*4882a593Smuzhiyun ack_cmd |= RX_START;
1291*4882a593Smuzhiyun dev->stats.rx_errors++;
1292*4882a593Smuzhiyun dev->stats.rx_fifo_errors++;
1293*4882a593Smuzhiyun rebuild_rx_bufs(dev);
1294*4882a593Smuzhiyun }
1295*4882a593Smuzhiyun }
1296*4882a593Smuzhiyun }
1297*4882a593Smuzhiyun wait_cmd(dev, dma, 100, "i596 interrupt, timeout");
1298*4882a593Smuzhiyun dma->scb.command = SWAP16(ack_cmd);
1299*4882a593Smuzhiyun dma_sync_dev(dev, &dma->scb, sizeof(struct i596_scb));
1300*4882a593Smuzhiyun
1301*4882a593Smuzhiyun /* DANGER: I suspect that some kind of interrupt
1302*4882a593Smuzhiyun acknowledgement aside from acking the 82596 might be needed
1303*4882a593Smuzhiyun here... but it's running acceptably without */
1304*4882a593Smuzhiyun
1305*4882a593Smuzhiyun ca(dev);
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun wait_cmd(dev, dma, 100, "i596 interrupt, exit timeout");
1308*4882a593Smuzhiyun DEB(DEB_INTS, printk(KERN_DEBUG "%s: exiting interrupt.\n", dev->name));
1309*4882a593Smuzhiyun
1310*4882a593Smuzhiyun spin_unlock (&lp->lock);
1311*4882a593Smuzhiyun return IRQ_HANDLED;
1312*4882a593Smuzhiyun }
1313*4882a593Smuzhiyun
i596_close(struct net_device * dev)1314*4882a593Smuzhiyun static int i596_close(struct net_device *dev)
1315*4882a593Smuzhiyun {
1316*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
1317*4882a593Smuzhiyun unsigned long flags;
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun netif_stop_queue(dev);
1320*4882a593Smuzhiyun
1321*4882a593Smuzhiyun DEB(DEB_INIT,
1322*4882a593Smuzhiyun printk(KERN_DEBUG
1323*4882a593Smuzhiyun "%s: Shutting down ethercard, status was %4.4x.\n",
1324*4882a593Smuzhiyun dev->name, SWAP16(lp->dma->scb.status)));
1325*4882a593Smuzhiyun
1326*4882a593Smuzhiyun spin_lock_irqsave(&lp->lock, flags);
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun wait_cmd(dev, lp->dma, 100, "close1 timed out");
1329*4882a593Smuzhiyun lp->dma->scb.command = SWAP16(CUC_ABORT | RX_ABORT);
1330*4882a593Smuzhiyun dma_sync_dev(dev, &lp->dma->scb, sizeof(struct i596_scb));
1331*4882a593Smuzhiyun
1332*4882a593Smuzhiyun ca(dev);
1333*4882a593Smuzhiyun
1334*4882a593Smuzhiyun wait_cmd(dev, lp->dma, 100, "close2 timed out");
1335*4882a593Smuzhiyun spin_unlock_irqrestore(&lp->lock, flags);
1336*4882a593Smuzhiyun DEB(DEB_STRUCT, i596_display_data(dev));
1337*4882a593Smuzhiyun i596_cleanup_cmd(dev, lp);
1338*4882a593Smuzhiyun
1339*4882a593Smuzhiyun free_irq(dev->irq, dev);
1340*4882a593Smuzhiyun remove_rx_bufs(dev);
1341*4882a593Smuzhiyun
1342*4882a593Smuzhiyun return 0;
1343*4882a593Smuzhiyun }
1344*4882a593Smuzhiyun
1345*4882a593Smuzhiyun /*
1346*4882a593Smuzhiyun * Set or clear the multicast filter for this adaptor.
1347*4882a593Smuzhiyun */
1348*4882a593Smuzhiyun
set_multicast_list(struct net_device * dev)1349*4882a593Smuzhiyun static void set_multicast_list(struct net_device *dev)
1350*4882a593Smuzhiyun {
1351*4882a593Smuzhiyun struct i596_private *lp = netdev_priv(dev);
1352*4882a593Smuzhiyun struct i596_dma *dma = lp->dma;
1353*4882a593Smuzhiyun int config = 0, cnt;
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun DEB(DEB_MULTI,
1356*4882a593Smuzhiyun printk(KERN_DEBUG
1357*4882a593Smuzhiyun "%s: set multicast list, %d entries, promisc %s, allmulti %s\n",
1358*4882a593Smuzhiyun dev->name, netdev_mc_count(dev),
1359*4882a593Smuzhiyun dev->flags & IFF_PROMISC ? "ON" : "OFF",
1360*4882a593Smuzhiyun dev->flags & IFF_ALLMULTI ? "ON" : "OFF"));
1361*4882a593Smuzhiyun
1362*4882a593Smuzhiyun if ((dev->flags & IFF_PROMISC) &&
1363*4882a593Smuzhiyun !(dma->cf_cmd.i596_config[8] & 0x01)) {
1364*4882a593Smuzhiyun dma->cf_cmd.i596_config[8] |= 0x01;
1365*4882a593Smuzhiyun config = 1;
1366*4882a593Smuzhiyun }
1367*4882a593Smuzhiyun if (!(dev->flags & IFF_PROMISC) &&
1368*4882a593Smuzhiyun (dma->cf_cmd.i596_config[8] & 0x01)) {
1369*4882a593Smuzhiyun dma->cf_cmd.i596_config[8] &= ~0x01;
1370*4882a593Smuzhiyun config = 1;
1371*4882a593Smuzhiyun }
1372*4882a593Smuzhiyun if ((dev->flags & IFF_ALLMULTI) &&
1373*4882a593Smuzhiyun (dma->cf_cmd.i596_config[11] & 0x20)) {
1374*4882a593Smuzhiyun dma->cf_cmd.i596_config[11] &= ~0x20;
1375*4882a593Smuzhiyun config = 1;
1376*4882a593Smuzhiyun }
1377*4882a593Smuzhiyun if (!(dev->flags & IFF_ALLMULTI) &&
1378*4882a593Smuzhiyun !(dma->cf_cmd.i596_config[11] & 0x20)) {
1379*4882a593Smuzhiyun dma->cf_cmd.i596_config[11] |= 0x20;
1380*4882a593Smuzhiyun config = 1;
1381*4882a593Smuzhiyun }
1382*4882a593Smuzhiyun if (config) {
1383*4882a593Smuzhiyun if (dma->cf_cmd.cmd.command)
1384*4882a593Smuzhiyun printk(KERN_INFO
1385*4882a593Smuzhiyun "%s: config change request already queued\n",
1386*4882a593Smuzhiyun dev->name);
1387*4882a593Smuzhiyun else {
1388*4882a593Smuzhiyun dma->cf_cmd.cmd.command = SWAP16(CmdConfigure);
1389*4882a593Smuzhiyun dma_sync_dev(dev, &dma->cf_cmd, sizeof(struct cf_cmd));
1390*4882a593Smuzhiyun i596_add_cmd(dev, &dma->cf_cmd.cmd);
1391*4882a593Smuzhiyun }
1392*4882a593Smuzhiyun }
1393*4882a593Smuzhiyun
1394*4882a593Smuzhiyun cnt = netdev_mc_count(dev);
1395*4882a593Smuzhiyun if (cnt > MAX_MC_CNT) {
1396*4882a593Smuzhiyun cnt = MAX_MC_CNT;
1397*4882a593Smuzhiyun printk(KERN_NOTICE "%s: Only %d multicast addresses supported",
1398*4882a593Smuzhiyun dev->name, cnt);
1399*4882a593Smuzhiyun }
1400*4882a593Smuzhiyun
1401*4882a593Smuzhiyun if (!netdev_mc_empty(dev)) {
1402*4882a593Smuzhiyun struct netdev_hw_addr *ha;
1403*4882a593Smuzhiyun unsigned char *cp;
1404*4882a593Smuzhiyun struct mc_cmd *cmd;
1405*4882a593Smuzhiyun
1406*4882a593Smuzhiyun cmd = &dma->mc_cmd;
1407*4882a593Smuzhiyun cmd->cmd.command = SWAP16(CmdMulticastList);
1408*4882a593Smuzhiyun cmd->mc_cnt = SWAP16(netdev_mc_count(dev) * 6);
1409*4882a593Smuzhiyun cp = cmd->mc_addrs;
1410*4882a593Smuzhiyun netdev_for_each_mc_addr(ha, dev) {
1411*4882a593Smuzhiyun if (!cnt--)
1412*4882a593Smuzhiyun break;
1413*4882a593Smuzhiyun memcpy(cp, ha->addr, ETH_ALEN);
1414*4882a593Smuzhiyun if (i596_debug > 1)
1415*4882a593Smuzhiyun DEB(DEB_MULTI,
1416*4882a593Smuzhiyun printk(KERN_DEBUG
1417*4882a593Smuzhiyun "%s: Adding address %pM\n",
1418*4882a593Smuzhiyun dev->name, cp));
1419*4882a593Smuzhiyun cp += ETH_ALEN;
1420*4882a593Smuzhiyun }
1421*4882a593Smuzhiyun dma_sync_dev(dev, &dma->mc_cmd, sizeof(struct mc_cmd));
1422*4882a593Smuzhiyun i596_add_cmd(dev, &cmd->cmd);
1423*4882a593Smuzhiyun }
1424*4882a593Smuzhiyun }
1425