1*4882a593Smuzhiyun /* 82596.c: A generic 82596 ethernet driver for linux. */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun Based on Apricot.c
4*4882a593Smuzhiyun Written 1994 by Mark Evans.
5*4882a593Smuzhiyun This driver is for the Apricot 82596 bus-master interface
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun Modularised 12/94 Mark Evans
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun Modified to support the 82596 ethernet chips on 680x0 VME boards.
11*4882a593Smuzhiyun by Richard Hirst <richard@sleepie.demon.co.uk>
12*4882a593Smuzhiyun Renamed to be 82596.c
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun 980825: Changed to receive directly in to sk_buffs which are
15*4882a593Smuzhiyun allocated at open() time. Eliminates copy on incoming frames
16*4882a593Smuzhiyun (small ones are still copied). Shared data now held in a
17*4882a593Smuzhiyun non-cached page, so we can run on 68060 in copyback mode.
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun TBD:
20*4882a593Smuzhiyun * look at deferring rx frames rather than discarding (as per tulip)
21*4882a593Smuzhiyun * handle tx ring full as per tulip
22*4882a593Smuzhiyun * performance test to tune rx_copybreak
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun Most of my modifications relate to the braindead big-endian
25*4882a593Smuzhiyun implementation by Intel. When the i596 is operating in
26*4882a593Smuzhiyun 'big-endian' mode, it thinks a 32 bit value of 0x12345678
27*4882a593Smuzhiyun should be stored as 0x56781234. This is a real pain, when
28*4882a593Smuzhiyun you have linked lists which are shared by the 680x0 and the
29*4882a593Smuzhiyun i596.
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun Driver skeleton
32*4882a593Smuzhiyun Written 1993 by Donald Becker.
33*4882a593Smuzhiyun Copyright 1993 United States Government as represented by the Director,
34*4882a593Smuzhiyun National Security Agency. This software may only be used and distributed
35*4882a593Smuzhiyun according to the terms of the GNU General Public License as modified by SRC,
36*4882a593Smuzhiyun incorporated herein by reference.
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun The author may be reached as becker@scyld.com, or C/O
39*4882a593Smuzhiyun Scyld Computing Corporation, 410 Severn Ave., Suite 210, Annapolis MD 21403
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun */
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #include <linux/module.h>
44*4882a593Smuzhiyun #include <linux/kernel.h>
45*4882a593Smuzhiyun #include <linux/string.h>
46*4882a593Smuzhiyun #include <linux/errno.h>
47*4882a593Smuzhiyun #include <linux/ioport.h>
48*4882a593Smuzhiyun #include <linux/interrupt.h>
49*4882a593Smuzhiyun #include <linux/delay.h>
50*4882a593Smuzhiyun #include <linux/netdevice.h>
51*4882a593Smuzhiyun #include <linux/etherdevice.h>
52*4882a593Smuzhiyun #include <linux/skbuff.h>
53*4882a593Smuzhiyun #include <linux/init.h>
54*4882a593Smuzhiyun #include <linux/bitops.h>
55*4882a593Smuzhiyun #include <linux/gfp.h>
56*4882a593Smuzhiyun #include <linux/pgtable.h>
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #include <asm/io.h>
59*4882a593Smuzhiyun #include <asm/dma.h>
60*4882a593Smuzhiyun #include <asm/cacheflush.h>
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun static char version[] __initdata =
63*4882a593Smuzhiyun "82596.c $Revision: 1.5 $\n";
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun #define DRV_NAME "82596"
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* DEBUG flags
68*4882a593Smuzhiyun */
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun #define DEB_INIT 0x0001
71*4882a593Smuzhiyun #define DEB_PROBE 0x0002
72*4882a593Smuzhiyun #define DEB_SERIOUS 0x0004
73*4882a593Smuzhiyun #define DEB_ERRORS 0x0008
74*4882a593Smuzhiyun #define DEB_MULTI 0x0010
75*4882a593Smuzhiyun #define DEB_TDR 0x0020
76*4882a593Smuzhiyun #define DEB_OPEN 0x0040
77*4882a593Smuzhiyun #define DEB_RESET 0x0080
78*4882a593Smuzhiyun #define DEB_ADDCMD 0x0100
79*4882a593Smuzhiyun #define DEB_STATUS 0x0200
80*4882a593Smuzhiyun #define DEB_STARTTX 0x0400
81*4882a593Smuzhiyun #define DEB_RXADDR 0x0800
82*4882a593Smuzhiyun #define DEB_TXADDR 0x1000
83*4882a593Smuzhiyun #define DEB_RXFRAME 0x2000
84*4882a593Smuzhiyun #define DEB_INTS 0x4000
85*4882a593Smuzhiyun #define DEB_STRUCT 0x8000
86*4882a593Smuzhiyun #define DEB_ANY 0xffff
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun #define DEB(x,y) if (i596_debug & (x)) y
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_MVME16x_NET)
93*4882a593Smuzhiyun #define ENABLE_MVME16x_NET
94*4882a593Smuzhiyun #endif
95*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_BVME6000_NET)
96*4882a593Smuzhiyun #define ENABLE_BVME6000_NET
97*4882a593Smuzhiyun #endif
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
100*4882a593Smuzhiyun #include <asm/mvme16xhw.h>
101*4882a593Smuzhiyun #endif
102*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
103*4882a593Smuzhiyun #include <asm/bvme6000hw.h>
104*4882a593Smuzhiyun #endif
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /*
107*4882a593Smuzhiyun * Define various macros for Channel Attention, word swapping etc., dependent
108*4882a593Smuzhiyun * on architecture. MVME and BVME are 680x0 based, otherwise it is Intel.
109*4882a593Smuzhiyun */
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun #ifdef __mc68000__
112*4882a593Smuzhiyun #define WSWAPrfd(x) ((struct i596_rfd *) (((u32)(x)<<16) | ((((u32)(x)))>>16)))
113*4882a593Smuzhiyun #define WSWAPrbd(x) ((struct i596_rbd *) (((u32)(x)<<16) | ((((u32)(x)))>>16)))
114*4882a593Smuzhiyun #define WSWAPiscp(x) ((struct i596_iscp *)(((u32)(x)<<16) | ((((u32)(x)))>>16)))
115*4882a593Smuzhiyun #define WSWAPscb(x) ((struct i596_scb *) (((u32)(x)<<16) | ((((u32)(x)))>>16)))
116*4882a593Smuzhiyun #define WSWAPcmd(x) ((struct i596_cmd *) (((u32)(x)<<16) | ((((u32)(x)))>>16)))
117*4882a593Smuzhiyun #define WSWAPtbd(x) ((struct i596_tbd *) (((u32)(x)<<16) | ((((u32)(x)))>>16)))
118*4882a593Smuzhiyun #define WSWAPchar(x) ((char *) (((u32)(x)<<16) | ((((u32)(x)))>>16)))
119*4882a593Smuzhiyun #define ISCP_BUSY 0x00010000
120*4882a593Smuzhiyun #else
121*4882a593Smuzhiyun #error 82596.c: unknown architecture
122*4882a593Smuzhiyun #endif
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /*
125*4882a593Smuzhiyun * These were the intel versions, left here for reference. There
126*4882a593Smuzhiyun * are currently no x86 users of this legacy i82596 chip.
127*4882a593Smuzhiyun */
128*4882a593Smuzhiyun #if 0
129*4882a593Smuzhiyun #define WSWAPrfd(x) ((struct i596_rfd *)((long)x))
130*4882a593Smuzhiyun #define WSWAPrbd(x) ((struct i596_rbd *)((long)x))
131*4882a593Smuzhiyun #define WSWAPiscp(x) ((struct i596_iscp *)((long)x))
132*4882a593Smuzhiyun #define WSWAPscb(x) ((struct i596_scb *)((long)x))
133*4882a593Smuzhiyun #define WSWAPcmd(x) ((struct i596_cmd *)((long)x))
134*4882a593Smuzhiyun #define WSWAPtbd(x) ((struct i596_tbd *)((long)x))
135*4882a593Smuzhiyun #define WSWAPchar(x) ((char *)((long)x))
136*4882a593Smuzhiyun #define ISCP_BUSY 0x0001
137*4882a593Smuzhiyun #endif
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /*
140*4882a593Smuzhiyun * The MPU_PORT command allows direct access to the 82596. With PORT access
141*4882a593Smuzhiyun * the following commands are available (p5-18). The 32-bit port command
142*4882a593Smuzhiyun * must be word-swapped with the most significant word written first.
143*4882a593Smuzhiyun * This only applies to VME boards.
144*4882a593Smuzhiyun */
145*4882a593Smuzhiyun #define PORT_RESET 0x00 /* reset 82596 */
146*4882a593Smuzhiyun #define PORT_SELFTEST 0x01 /* selftest */
147*4882a593Smuzhiyun #define PORT_ALTSCP 0x02 /* alternate SCB address */
148*4882a593Smuzhiyun #define PORT_ALTDUMP 0x03 /* Alternate DUMP address */
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun static int i596_debug = (DEB_SERIOUS|DEB_PROBE);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun MODULE_AUTHOR("Richard Hirst");
153*4882a593Smuzhiyun MODULE_DESCRIPTION("i82596 driver");
154*4882a593Smuzhiyun MODULE_LICENSE("GPL");
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun module_param(i596_debug, int, 0);
157*4882a593Smuzhiyun MODULE_PARM_DESC(i596_debug, "i82596 debug mask");
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /* Copy frames shorter than rx_copybreak, otherwise pass on up in
161*4882a593Smuzhiyun * a full sized sk_buff. Value of 100 stolen from tulip.c (!alpha).
162*4882a593Smuzhiyun */
163*4882a593Smuzhiyun static int rx_copybreak = 100;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun #define PKT_BUF_SZ 1536
166*4882a593Smuzhiyun #define MAX_MC_CNT 64
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun #define I596_TOTAL_SIZE 17
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun #define I596_NULL ((void *)0xffffffff)
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun #define CMD_EOL 0x8000 /* The last command of the list, stop. */
173*4882a593Smuzhiyun #define CMD_SUSP 0x4000 /* Suspend after doing cmd. */
174*4882a593Smuzhiyun #define CMD_INTR 0x2000 /* Interrupt after doing cmd. */
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun #define CMD_FLEX 0x0008 /* Enable flexible memory model */
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun enum commands {
179*4882a593Smuzhiyun CmdNOp = 0, CmdSASetup = 1, CmdConfigure = 2, CmdMulticastList = 3,
180*4882a593Smuzhiyun CmdTx = 4, CmdTDR = 5, CmdDump = 6, CmdDiagnose = 7
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun #define STAT_C 0x8000 /* Set to 0 after execution */
184*4882a593Smuzhiyun #define STAT_B 0x4000 /* Command being executed */
185*4882a593Smuzhiyun #define STAT_OK 0x2000 /* Command executed ok */
186*4882a593Smuzhiyun #define STAT_A 0x1000 /* Command aborted */
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun #define CUC_START 0x0100
189*4882a593Smuzhiyun #define CUC_RESUME 0x0200
190*4882a593Smuzhiyun #define CUC_SUSPEND 0x0300
191*4882a593Smuzhiyun #define CUC_ABORT 0x0400
192*4882a593Smuzhiyun #define RX_START 0x0010
193*4882a593Smuzhiyun #define RX_RESUME 0x0020
194*4882a593Smuzhiyun #define RX_SUSPEND 0x0030
195*4882a593Smuzhiyun #define RX_ABORT 0x0040
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun #define TX_TIMEOUT (HZ/20)
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun struct i596_reg {
201*4882a593Smuzhiyun unsigned short porthi;
202*4882a593Smuzhiyun unsigned short portlo;
203*4882a593Smuzhiyun unsigned long ca;
204*4882a593Smuzhiyun };
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun #define EOF 0x8000
207*4882a593Smuzhiyun #define SIZE_MASK 0x3fff
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun struct i596_tbd {
210*4882a593Smuzhiyun unsigned short size;
211*4882a593Smuzhiyun unsigned short pad;
212*4882a593Smuzhiyun struct i596_tbd *next;
213*4882a593Smuzhiyun char *data;
214*4882a593Smuzhiyun };
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun /* The command structure has two 'next' pointers; v_next is the address of
217*4882a593Smuzhiyun * the next command as seen by the CPU, b_next is the address of the next
218*4882a593Smuzhiyun * command as seen by the 82596. The b_next pointer, as used by the 82596
219*4882a593Smuzhiyun * always references the status field of the next command, rather than the
220*4882a593Smuzhiyun * v_next field, because the 82596 is unaware of v_next. It may seem more
221*4882a593Smuzhiyun * logical to put v_next at the end of the structure, but we cannot do that
222*4882a593Smuzhiyun * because the 82596 expects other fields to be there, depending on command
223*4882a593Smuzhiyun * type.
224*4882a593Smuzhiyun */
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun struct i596_cmd {
227*4882a593Smuzhiyun struct i596_cmd *v_next; /* Address from CPUs viewpoint */
228*4882a593Smuzhiyun unsigned short status;
229*4882a593Smuzhiyun unsigned short command;
230*4882a593Smuzhiyun struct i596_cmd *b_next; /* Address from i596 viewpoint */
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun struct tx_cmd {
234*4882a593Smuzhiyun struct i596_cmd cmd;
235*4882a593Smuzhiyun struct i596_tbd *tbd;
236*4882a593Smuzhiyun unsigned short size;
237*4882a593Smuzhiyun unsigned short pad;
238*4882a593Smuzhiyun struct sk_buff *skb; /* So we can free it after tx */
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun struct tdr_cmd {
242*4882a593Smuzhiyun struct i596_cmd cmd;
243*4882a593Smuzhiyun unsigned short status;
244*4882a593Smuzhiyun unsigned short pad;
245*4882a593Smuzhiyun };
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun struct mc_cmd {
248*4882a593Smuzhiyun struct i596_cmd cmd;
249*4882a593Smuzhiyun short mc_cnt;
250*4882a593Smuzhiyun char mc_addrs[MAX_MC_CNT*6];
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun struct sa_cmd {
254*4882a593Smuzhiyun struct i596_cmd cmd;
255*4882a593Smuzhiyun char eth_addr[8];
256*4882a593Smuzhiyun };
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun struct cf_cmd {
259*4882a593Smuzhiyun struct i596_cmd cmd;
260*4882a593Smuzhiyun char i596_config[16];
261*4882a593Smuzhiyun };
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun struct i596_rfd {
264*4882a593Smuzhiyun unsigned short stat;
265*4882a593Smuzhiyun unsigned short cmd;
266*4882a593Smuzhiyun struct i596_rfd *b_next; /* Address from i596 viewpoint */
267*4882a593Smuzhiyun struct i596_rbd *rbd;
268*4882a593Smuzhiyun unsigned short count;
269*4882a593Smuzhiyun unsigned short size;
270*4882a593Smuzhiyun struct i596_rfd *v_next; /* Address from CPUs viewpoint */
271*4882a593Smuzhiyun struct i596_rfd *v_prev;
272*4882a593Smuzhiyun };
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun struct i596_rbd {
275*4882a593Smuzhiyun unsigned short count;
276*4882a593Smuzhiyun unsigned short zero1;
277*4882a593Smuzhiyun struct i596_rbd *b_next;
278*4882a593Smuzhiyun unsigned char *b_data; /* Address from i596 viewpoint */
279*4882a593Smuzhiyun unsigned short size;
280*4882a593Smuzhiyun unsigned short zero2;
281*4882a593Smuzhiyun struct sk_buff *skb;
282*4882a593Smuzhiyun struct i596_rbd *v_next;
283*4882a593Smuzhiyun struct i596_rbd *b_addr; /* This rbd addr from i596 view */
284*4882a593Smuzhiyun unsigned char *v_data; /* Address from CPUs viewpoint */
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun #define TX_RING_SIZE 64
288*4882a593Smuzhiyun #define RX_RING_SIZE 16
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun struct i596_scb {
291*4882a593Smuzhiyun unsigned short status;
292*4882a593Smuzhiyun unsigned short command;
293*4882a593Smuzhiyun struct i596_cmd *cmd;
294*4882a593Smuzhiyun struct i596_rfd *rfd;
295*4882a593Smuzhiyun unsigned long crc_err;
296*4882a593Smuzhiyun unsigned long align_err;
297*4882a593Smuzhiyun unsigned long resource_err;
298*4882a593Smuzhiyun unsigned long over_err;
299*4882a593Smuzhiyun unsigned long rcvdt_err;
300*4882a593Smuzhiyun unsigned long short_err;
301*4882a593Smuzhiyun unsigned short t_on;
302*4882a593Smuzhiyun unsigned short t_off;
303*4882a593Smuzhiyun };
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun struct i596_iscp {
306*4882a593Smuzhiyun unsigned long stat;
307*4882a593Smuzhiyun struct i596_scb *scb;
308*4882a593Smuzhiyun };
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun struct i596_scp {
311*4882a593Smuzhiyun unsigned long sysbus;
312*4882a593Smuzhiyun unsigned long pad;
313*4882a593Smuzhiyun struct i596_iscp *iscp;
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun struct i596_private {
317*4882a593Smuzhiyun volatile struct i596_scp scp;
318*4882a593Smuzhiyun volatile struct i596_iscp iscp;
319*4882a593Smuzhiyun volatile struct i596_scb scb;
320*4882a593Smuzhiyun struct sa_cmd sa_cmd;
321*4882a593Smuzhiyun struct cf_cmd cf_cmd;
322*4882a593Smuzhiyun struct tdr_cmd tdr_cmd;
323*4882a593Smuzhiyun struct mc_cmd mc_cmd;
324*4882a593Smuzhiyun unsigned long stat;
325*4882a593Smuzhiyun int last_restart __attribute__((aligned(4)));
326*4882a593Smuzhiyun struct i596_rfd *rfd_head;
327*4882a593Smuzhiyun struct i596_rbd *rbd_head;
328*4882a593Smuzhiyun struct i596_cmd *cmd_tail;
329*4882a593Smuzhiyun struct i596_cmd *cmd_head;
330*4882a593Smuzhiyun int cmd_backlog;
331*4882a593Smuzhiyun unsigned long last_cmd;
332*4882a593Smuzhiyun struct i596_rfd rfds[RX_RING_SIZE];
333*4882a593Smuzhiyun struct i596_rbd rbds[RX_RING_SIZE];
334*4882a593Smuzhiyun struct tx_cmd tx_cmds[TX_RING_SIZE];
335*4882a593Smuzhiyun struct i596_tbd tbds[TX_RING_SIZE];
336*4882a593Smuzhiyun int next_tx_cmd;
337*4882a593Smuzhiyun spinlock_t lock;
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun static char init_setup[] =
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun 0x8E, /* length, prefetch on */
343*4882a593Smuzhiyun 0xC8, /* fifo to 8, monitor off */
344*4882a593Smuzhiyun #ifdef CONFIG_VME
345*4882a593Smuzhiyun 0xc0, /* don't save bad frames */
346*4882a593Smuzhiyun #else
347*4882a593Smuzhiyun 0x80, /* don't save bad frames */
348*4882a593Smuzhiyun #endif
349*4882a593Smuzhiyun 0x2E, /* No source address insertion, 8 byte preamble */
350*4882a593Smuzhiyun 0x00, /* priority and backoff defaults */
351*4882a593Smuzhiyun 0x60, /* interframe spacing */
352*4882a593Smuzhiyun 0x00, /* slot time LSB */
353*4882a593Smuzhiyun 0xf2, /* slot time and retries */
354*4882a593Smuzhiyun 0x00, /* promiscuous mode */
355*4882a593Smuzhiyun 0x00, /* collision detect */
356*4882a593Smuzhiyun 0x40, /* minimum frame length */
357*4882a593Smuzhiyun 0xff,
358*4882a593Smuzhiyun 0x00,
359*4882a593Smuzhiyun 0x7f /* *multi IA */ };
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun static int i596_open(struct net_device *dev);
362*4882a593Smuzhiyun static netdev_tx_t i596_start_xmit(struct sk_buff *skb, struct net_device *dev);
363*4882a593Smuzhiyun static irqreturn_t i596_interrupt(int irq, void *dev_id);
364*4882a593Smuzhiyun static int i596_close(struct net_device *dev);
365*4882a593Smuzhiyun static void i596_add_cmd(struct net_device *dev, struct i596_cmd *cmd);
366*4882a593Smuzhiyun static void i596_tx_timeout (struct net_device *dev, unsigned int txqueue);
367*4882a593Smuzhiyun static void print_eth(unsigned char *buf, char *str);
368*4882a593Smuzhiyun static void set_multicast_list(struct net_device *dev);
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun static int rx_ring_size = RX_RING_SIZE;
371*4882a593Smuzhiyun static int ticks_limit = 25;
372*4882a593Smuzhiyun static int max_cmd_backlog = TX_RING_SIZE-1;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun
CA(struct net_device * dev)375*4882a593Smuzhiyun static inline void CA(struct net_device *dev)
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
378*4882a593Smuzhiyun if (MACH_IS_MVME16x) {
379*4882a593Smuzhiyun ((struct i596_reg *) dev->base_addr)->ca = 1;
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun #endif
382*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
383*4882a593Smuzhiyun if (MACH_IS_BVME6000) {
384*4882a593Smuzhiyun volatile u32 i;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun i = *(volatile u32 *) (dev->base_addr);
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun #endif
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun
MPU_PORT(struct net_device * dev,int c,volatile void * x)392*4882a593Smuzhiyun static inline void MPU_PORT(struct net_device *dev, int c, volatile void *x)
393*4882a593Smuzhiyun {
394*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
395*4882a593Smuzhiyun if (MACH_IS_MVME16x) {
396*4882a593Smuzhiyun struct i596_reg *p = (struct i596_reg *) (dev->base_addr);
397*4882a593Smuzhiyun p->porthi = ((c) | (u32) (x)) & 0xffff;
398*4882a593Smuzhiyun p->portlo = ((c) | (u32) (x)) >> 16;
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun #endif
401*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
402*4882a593Smuzhiyun if (MACH_IS_BVME6000) {
403*4882a593Smuzhiyun u32 v = (u32) (c) | (u32) (x);
404*4882a593Smuzhiyun v = ((u32) (v) << 16) | ((u32) (v) >> 16);
405*4882a593Smuzhiyun *(volatile u32 *) dev->base_addr = v;
406*4882a593Smuzhiyun udelay(1);
407*4882a593Smuzhiyun *(volatile u32 *) dev->base_addr = v;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun #endif
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun
wait_istat(struct net_device * dev,struct i596_private * lp,int delcnt,char * str)413*4882a593Smuzhiyun static inline int wait_istat(struct net_device *dev, struct i596_private *lp, int delcnt, char *str)
414*4882a593Smuzhiyun {
415*4882a593Smuzhiyun while (--delcnt && lp->iscp.stat)
416*4882a593Smuzhiyun udelay(10);
417*4882a593Smuzhiyun if (!delcnt) {
418*4882a593Smuzhiyun printk(KERN_ERR "%s: %s, status %4.4x, cmd %4.4x.\n",
419*4882a593Smuzhiyun dev->name, str, lp->scb.status, lp->scb.command);
420*4882a593Smuzhiyun return -1;
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun else
423*4882a593Smuzhiyun return 0;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun
wait_cmd(struct net_device * dev,struct i596_private * lp,int delcnt,char * str)427*4882a593Smuzhiyun static inline int wait_cmd(struct net_device *dev, struct i596_private *lp, int delcnt, char *str)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun while (--delcnt && lp->scb.command)
430*4882a593Smuzhiyun udelay(10);
431*4882a593Smuzhiyun if (!delcnt) {
432*4882a593Smuzhiyun printk(KERN_ERR "%s: %s, status %4.4x, cmd %4.4x.\n",
433*4882a593Smuzhiyun dev->name, str, lp->scb.status, lp->scb.command);
434*4882a593Smuzhiyun return -1;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun else
437*4882a593Smuzhiyun return 0;
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun
wait_cfg(struct net_device * dev,struct i596_cmd * cmd,int delcnt,char * str)441*4882a593Smuzhiyun static inline int wait_cfg(struct net_device *dev, struct i596_cmd *cmd, int delcnt, char *str)
442*4882a593Smuzhiyun {
443*4882a593Smuzhiyun volatile struct i596_cmd *c = cmd;
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun while (--delcnt && c->command)
446*4882a593Smuzhiyun udelay(10);
447*4882a593Smuzhiyun if (!delcnt) {
448*4882a593Smuzhiyun printk(KERN_ERR "%s: %s.\n", dev->name, str);
449*4882a593Smuzhiyun return -1;
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun else
452*4882a593Smuzhiyun return 0;
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun
i596_display_data(struct net_device * dev)456*4882a593Smuzhiyun static void i596_display_data(struct net_device *dev)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun struct i596_private *lp = dev->ml_priv;
459*4882a593Smuzhiyun struct i596_cmd *cmd;
460*4882a593Smuzhiyun struct i596_rfd *rfd;
461*4882a593Smuzhiyun struct i596_rbd *rbd;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun printk(KERN_ERR "lp and scp at %p, .sysbus = %08lx, .iscp = %p\n",
464*4882a593Smuzhiyun &lp->scp, lp->scp.sysbus, lp->scp.iscp);
465*4882a593Smuzhiyun printk(KERN_ERR "iscp at %p, iscp.stat = %08lx, .scb = %p\n",
466*4882a593Smuzhiyun &lp->iscp, lp->iscp.stat, lp->iscp.scb);
467*4882a593Smuzhiyun printk(KERN_ERR "scb at %p, scb.status = %04x, .command = %04x,"
468*4882a593Smuzhiyun " .cmd = %p, .rfd = %p\n",
469*4882a593Smuzhiyun &lp->scb, lp->scb.status, lp->scb.command,
470*4882a593Smuzhiyun lp->scb.cmd, lp->scb.rfd);
471*4882a593Smuzhiyun printk(KERN_ERR " errors: crc %lx, align %lx, resource %lx,"
472*4882a593Smuzhiyun " over %lx, rcvdt %lx, short %lx\n",
473*4882a593Smuzhiyun lp->scb.crc_err, lp->scb.align_err, lp->scb.resource_err,
474*4882a593Smuzhiyun lp->scb.over_err, lp->scb.rcvdt_err, lp->scb.short_err);
475*4882a593Smuzhiyun cmd = lp->cmd_head;
476*4882a593Smuzhiyun while (cmd != I596_NULL) {
477*4882a593Smuzhiyun printk(KERN_ERR "cmd at %p, .status = %04x, .command = %04x, .b_next = %p\n",
478*4882a593Smuzhiyun cmd, cmd->status, cmd->command, cmd->b_next);
479*4882a593Smuzhiyun cmd = cmd->v_next;
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun rfd = lp->rfd_head;
482*4882a593Smuzhiyun printk(KERN_ERR "rfd_head = %p\n", rfd);
483*4882a593Smuzhiyun do {
484*4882a593Smuzhiyun printk(KERN_ERR " %p .stat %04x, .cmd %04x, b_next %p, rbd %p,"
485*4882a593Smuzhiyun " count %04x\n",
486*4882a593Smuzhiyun rfd, rfd->stat, rfd->cmd, rfd->b_next, rfd->rbd,
487*4882a593Smuzhiyun rfd->count);
488*4882a593Smuzhiyun rfd = rfd->v_next;
489*4882a593Smuzhiyun } while (rfd != lp->rfd_head);
490*4882a593Smuzhiyun rbd = lp->rbd_head;
491*4882a593Smuzhiyun printk(KERN_ERR "rbd_head = %p\n", rbd);
492*4882a593Smuzhiyun do {
493*4882a593Smuzhiyun printk(KERN_ERR " %p .count %04x, b_next %p, b_data %p, size %04x\n",
494*4882a593Smuzhiyun rbd, rbd->count, rbd->b_next, rbd->b_data, rbd->size);
495*4882a593Smuzhiyun rbd = rbd->v_next;
496*4882a593Smuzhiyun } while (rbd != lp->rbd_head);
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun #if defined(ENABLE_MVME16x_NET) || defined(ENABLE_BVME6000_NET)
i596_error(int irq,void * dev_id)501*4882a593Smuzhiyun static irqreturn_t i596_error(int irq, void *dev_id)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun struct net_device *dev = dev_id;
504*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
505*4882a593Smuzhiyun if (MACH_IS_MVME16x) {
506*4882a593Smuzhiyun volatile unsigned char *pcc2 = (unsigned char *) 0xfff42000;
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun pcc2[0x28] = 1;
509*4882a593Smuzhiyun pcc2[0x2b] = 0x1d;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun #endif
512*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
513*4882a593Smuzhiyun if (MACH_IS_BVME6000) {
514*4882a593Smuzhiyun volatile unsigned char *ethirq = (unsigned char *) BVME_ETHIRQ_REG;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun *ethirq = 1;
517*4882a593Smuzhiyun *ethirq = 3;
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun #endif
520*4882a593Smuzhiyun printk(KERN_ERR "%s: Error interrupt\n", dev->name);
521*4882a593Smuzhiyun i596_display_data(dev);
522*4882a593Smuzhiyun return IRQ_HANDLED;
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun #endif
525*4882a593Smuzhiyun
remove_rx_bufs(struct net_device * dev)526*4882a593Smuzhiyun static inline void remove_rx_bufs(struct net_device *dev)
527*4882a593Smuzhiyun {
528*4882a593Smuzhiyun struct i596_private *lp = dev->ml_priv;
529*4882a593Smuzhiyun struct i596_rbd *rbd;
530*4882a593Smuzhiyun int i;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun for (i = 0, rbd = lp->rbds; i < rx_ring_size; i++, rbd++) {
533*4882a593Smuzhiyun if (rbd->skb == NULL)
534*4882a593Smuzhiyun break;
535*4882a593Smuzhiyun dev_kfree_skb(rbd->skb);
536*4882a593Smuzhiyun rbd->skb = NULL;
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
init_rx_bufs(struct net_device * dev)540*4882a593Smuzhiyun static inline int init_rx_bufs(struct net_device *dev)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun struct i596_private *lp = dev->ml_priv;
543*4882a593Smuzhiyun int i;
544*4882a593Smuzhiyun struct i596_rfd *rfd;
545*4882a593Smuzhiyun struct i596_rbd *rbd;
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun /* First build the Receive Buffer Descriptor List */
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun for (i = 0, rbd = lp->rbds; i < rx_ring_size; i++, rbd++) {
550*4882a593Smuzhiyun struct sk_buff *skb = netdev_alloc_skb(dev, PKT_BUF_SZ);
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun if (skb == NULL) {
553*4882a593Smuzhiyun remove_rx_bufs(dev);
554*4882a593Smuzhiyun return -ENOMEM;
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun rbd->v_next = rbd+1;
558*4882a593Smuzhiyun rbd->b_next = WSWAPrbd(virt_to_bus(rbd+1));
559*4882a593Smuzhiyun rbd->b_addr = WSWAPrbd(virt_to_bus(rbd));
560*4882a593Smuzhiyun rbd->skb = skb;
561*4882a593Smuzhiyun rbd->v_data = skb->data;
562*4882a593Smuzhiyun rbd->b_data = WSWAPchar(virt_to_bus(skb->data));
563*4882a593Smuzhiyun rbd->size = PKT_BUF_SZ;
564*4882a593Smuzhiyun #ifdef __mc68000__
565*4882a593Smuzhiyun cache_clear(virt_to_phys(skb->data), PKT_BUF_SZ);
566*4882a593Smuzhiyun #endif
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun lp->rbd_head = lp->rbds;
569*4882a593Smuzhiyun rbd = lp->rbds + rx_ring_size - 1;
570*4882a593Smuzhiyun rbd->v_next = lp->rbds;
571*4882a593Smuzhiyun rbd->b_next = WSWAPrbd(virt_to_bus(lp->rbds));
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun /* Now build the Receive Frame Descriptor List */
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun for (i = 0, rfd = lp->rfds; i < rx_ring_size; i++, rfd++) {
576*4882a593Smuzhiyun rfd->rbd = I596_NULL;
577*4882a593Smuzhiyun rfd->v_next = rfd+1;
578*4882a593Smuzhiyun rfd->v_prev = rfd-1;
579*4882a593Smuzhiyun rfd->b_next = WSWAPrfd(virt_to_bus(rfd+1));
580*4882a593Smuzhiyun rfd->cmd = CMD_FLEX;
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun lp->rfd_head = lp->rfds;
583*4882a593Smuzhiyun lp->scb.rfd = WSWAPrfd(virt_to_bus(lp->rfds));
584*4882a593Smuzhiyun rfd = lp->rfds;
585*4882a593Smuzhiyun rfd->rbd = lp->rbd_head;
586*4882a593Smuzhiyun rfd->v_prev = lp->rfds + rx_ring_size - 1;
587*4882a593Smuzhiyun rfd = lp->rfds + rx_ring_size - 1;
588*4882a593Smuzhiyun rfd->v_next = lp->rfds;
589*4882a593Smuzhiyun rfd->b_next = WSWAPrfd(virt_to_bus(lp->rfds));
590*4882a593Smuzhiyun rfd->cmd = CMD_EOL|CMD_FLEX;
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun return 0;
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun
rebuild_rx_bufs(struct net_device * dev)596*4882a593Smuzhiyun static void rebuild_rx_bufs(struct net_device *dev)
597*4882a593Smuzhiyun {
598*4882a593Smuzhiyun struct i596_private *lp = dev->ml_priv;
599*4882a593Smuzhiyun int i;
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun /* Ensure rx frame/buffer descriptors are tidy */
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun for (i = 0; i < rx_ring_size; i++) {
604*4882a593Smuzhiyun lp->rfds[i].rbd = I596_NULL;
605*4882a593Smuzhiyun lp->rfds[i].cmd = CMD_FLEX;
606*4882a593Smuzhiyun }
607*4882a593Smuzhiyun lp->rfds[rx_ring_size-1].cmd = CMD_EOL|CMD_FLEX;
608*4882a593Smuzhiyun lp->rfd_head = lp->rfds;
609*4882a593Smuzhiyun lp->scb.rfd = WSWAPrfd(virt_to_bus(lp->rfds));
610*4882a593Smuzhiyun lp->rbd_head = lp->rbds;
611*4882a593Smuzhiyun lp->rfds[0].rbd = WSWAPrbd(virt_to_bus(lp->rbds));
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun
init_i596_mem(struct net_device * dev)615*4882a593Smuzhiyun static int init_i596_mem(struct net_device *dev)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun struct i596_private *lp = dev->ml_priv;
618*4882a593Smuzhiyun unsigned long flags;
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun MPU_PORT(dev, PORT_RESET, NULL);
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun udelay(100); /* Wait 100us - seems to help */
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun #if defined(ENABLE_MVME16x_NET) || defined(ENABLE_BVME6000_NET)
625*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
626*4882a593Smuzhiyun if (MACH_IS_MVME16x) {
627*4882a593Smuzhiyun volatile unsigned char *pcc2 = (unsigned char *) 0xfff42000;
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun /* Disable all ints for now */
630*4882a593Smuzhiyun pcc2[0x28] = 1;
631*4882a593Smuzhiyun pcc2[0x2a] = 0x48;
632*4882a593Smuzhiyun /* Following disables snooping. Snooping is not required
633*4882a593Smuzhiyun * as we make appropriate use of non-cached pages for
634*4882a593Smuzhiyun * shared data, and cache_push/cache_clear.
635*4882a593Smuzhiyun */
636*4882a593Smuzhiyun pcc2[0x2b] = 0x08;
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun #endif
639*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
640*4882a593Smuzhiyun if (MACH_IS_BVME6000) {
641*4882a593Smuzhiyun volatile unsigned char *ethirq = (unsigned char *) BVME_ETHIRQ_REG;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun *ethirq = 1;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun #endif
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun /* change the scp address */
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun MPU_PORT(dev, PORT_ALTSCP, (void *)virt_to_bus((void *)&lp->scp));
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun #endif
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun lp->last_cmd = jiffies;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
656*4882a593Smuzhiyun if (MACH_IS_MVME16x)
657*4882a593Smuzhiyun lp->scp.sysbus = 0x00000054;
658*4882a593Smuzhiyun #endif
659*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
660*4882a593Smuzhiyun if (MACH_IS_BVME6000)
661*4882a593Smuzhiyun lp->scp.sysbus = 0x0000004c;
662*4882a593Smuzhiyun #endif
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun lp->scp.iscp = WSWAPiscp(virt_to_bus((void *)&lp->iscp));
665*4882a593Smuzhiyun lp->iscp.scb = WSWAPscb(virt_to_bus((void *)&lp->scb));
666*4882a593Smuzhiyun lp->iscp.stat = ISCP_BUSY;
667*4882a593Smuzhiyun lp->cmd_backlog = 0;
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun lp->cmd_head = lp->scb.cmd = I596_NULL;
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
672*4882a593Smuzhiyun if (MACH_IS_BVME6000) {
673*4882a593Smuzhiyun lp->scb.t_on = 7 * 25;
674*4882a593Smuzhiyun lp->scb.t_off = 1 * 25;
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun #endif
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun DEB(DEB_INIT,printk(KERN_DEBUG "%s: starting i82596.\n", dev->name));
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun CA(dev);
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun if (wait_istat(dev,lp,1000,"initialization timed out"))
683*4882a593Smuzhiyun goto failed;
684*4882a593Smuzhiyun DEB(DEB_INIT,printk(KERN_DEBUG "%s: i82596 initialization successful\n", dev->name));
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun /* Ensure rx frame/buffer descriptors are tidy */
687*4882a593Smuzhiyun rebuild_rx_bufs(dev);
688*4882a593Smuzhiyun lp->scb.command = 0;
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
691*4882a593Smuzhiyun if (MACH_IS_MVME16x) {
692*4882a593Smuzhiyun volatile unsigned char *pcc2 = (unsigned char *) 0xfff42000;
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun /* Enable ints, etc. now */
695*4882a593Smuzhiyun pcc2[0x2a] = 0x55; /* Edge sensitive */
696*4882a593Smuzhiyun pcc2[0x2b] = 0x15;
697*4882a593Smuzhiyun }
698*4882a593Smuzhiyun #endif
699*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
700*4882a593Smuzhiyun if (MACH_IS_BVME6000) {
701*4882a593Smuzhiyun volatile unsigned char *ethirq = (unsigned char *) BVME_ETHIRQ_REG;
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun *ethirq = 3;
704*4882a593Smuzhiyun }
705*4882a593Smuzhiyun #endif
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun DEB(DEB_INIT,printk(KERN_DEBUG "%s: queuing CmdConfigure\n", dev->name));
709*4882a593Smuzhiyun memcpy(lp->cf_cmd.i596_config, init_setup, 14);
710*4882a593Smuzhiyun lp->cf_cmd.cmd.command = CmdConfigure;
711*4882a593Smuzhiyun i596_add_cmd(dev, &lp->cf_cmd.cmd);
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun DEB(DEB_INIT,printk(KERN_DEBUG "%s: queuing CmdSASetup\n", dev->name));
714*4882a593Smuzhiyun memcpy(lp->sa_cmd.eth_addr, dev->dev_addr, ETH_ALEN);
715*4882a593Smuzhiyun lp->sa_cmd.cmd.command = CmdSASetup;
716*4882a593Smuzhiyun i596_add_cmd(dev, &lp->sa_cmd.cmd);
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun DEB(DEB_INIT,printk(KERN_DEBUG "%s: queuing CmdTDR\n", dev->name));
719*4882a593Smuzhiyun lp->tdr_cmd.cmd.command = CmdTDR;
720*4882a593Smuzhiyun i596_add_cmd(dev, &lp->tdr_cmd.cmd);
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun spin_lock_irqsave (&lp->lock, flags);
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun if (wait_cmd(dev,lp,1000,"timed out waiting to issue RX_START")) {
725*4882a593Smuzhiyun spin_unlock_irqrestore (&lp->lock, flags);
726*4882a593Smuzhiyun goto failed;
727*4882a593Smuzhiyun }
728*4882a593Smuzhiyun DEB(DEB_INIT,printk(KERN_DEBUG "%s: Issuing RX_START\n", dev->name));
729*4882a593Smuzhiyun lp->scb.command = RX_START;
730*4882a593Smuzhiyun CA(dev);
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun spin_unlock_irqrestore (&lp->lock, flags);
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun if (wait_cmd(dev,lp,1000,"RX_START not processed"))
735*4882a593Smuzhiyun goto failed;
736*4882a593Smuzhiyun DEB(DEB_INIT,printk(KERN_DEBUG "%s: Receive unit started OK\n", dev->name));
737*4882a593Smuzhiyun return 0;
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun failed:
740*4882a593Smuzhiyun printk(KERN_CRIT "%s: Failed to initialise 82596\n", dev->name);
741*4882a593Smuzhiyun MPU_PORT(dev, PORT_RESET, NULL);
742*4882a593Smuzhiyun return -1;
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun
i596_rx(struct net_device * dev)745*4882a593Smuzhiyun static inline int i596_rx(struct net_device *dev)
746*4882a593Smuzhiyun {
747*4882a593Smuzhiyun struct i596_private *lp = dev->ml_priv;
748*4882a593Smuzhiyun struct i596_rfd *rfd;
749*4882a593Smuzhiyun struct i596_rbd *rbd;
750*4882a593Smuzhiyun int frames = 0;
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun DEB(DEB_RXFRAME,printk(KERN_DEBUG "i596_rx(), rfd_head %p, rbd_head %p\n",
753*4882a593Smuzhiyun lp->rfd_head, lp->rbd_head));
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun rfd = lp->rfd_head; /* Ref next frame to check */
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun while ((rfd->stat) & STAT_C) { /* Loop while complete frames */
758*4882a593Smuzhiyun if (rfd->rbd == I596_NULL)
759*4882a593Smuzhiyun rbd = I596_NULL;
760*4882a593Smuzhiyun else if (rfd->rbd == lp->rbd_head->b_addr)
761*4882a593Smuzhiyun rbd = lp->rbd_head;
762*4882a593Smuzhiyun else {
763*4882a593Smuzhiyun printk(KERN_CRIT "%s: rbd chain broken!\n", dev->name);
764*4882a593Smuzhiyun /* XXX Now what? */
765*4882a593Smuzhiyun rbd = I596_NULL;
766*4882a593Smuzhiyun }
767*4882a593Smuzhiyun DEB(DEB_RXFRAME, printk(KERN_DEBUG " rfd %p, rfd.rbd %p, rfd.stat %04x\n",
768*4882a593Smuzhiyun rfd, rfd->rbd, rfd->stat));
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun if (rbd != I596_NULL && ((rfd->stat) & STAT_OK)) {
771*4882a593Smuzhiyun /* a good frame */
772*4882a593Smuzhiyun int pkt_len = rbd->count & 0x3fff;
773*4882a593Smuzhiyun struct sk_buff *skb = rbd->skb;
774*4882a593Smuzhiyun int rx_in_place = 0;
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun DEB(DEB_RXADDR,print_eth(rbd->v_data, "received"));
777*4882a593Smuzhiyun frames++;
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun /* Check if the packet is long enough to just accept
780*4882a593Smuzhiyun * without copying to a properly sized skbuff.
781*4882a593Smuzhiyun */
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun if (pkt_len > rx_copybreak) {
784*4882a593Smuzhiyun struct sk_buff *newskb;
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun /* Get fresh skbuff to replace filled one. */
787*4882a593Smuzhiyun newskb = netdev_alloc_skb(dev, PKT_BUF_SZ);
788*4882a593Smuzhiyun if (newskb == NULL) {
789*4882a593Smuzhiyun skb = NULL; /* drop pkt */
790*4882a593Smuzhiyun goto memory_squeeze;
791*4882a593Smuzhiyun }
792*4882a593Smuzhiyun /* Pass up the skb already on the Rx ring. */
793*4882a593Smuzhiyun skb_put(skb, pkt_len);
794*4882a593Smuzhiyun rx_in_place = 1;
795*4882a593Smuzhiyun rbd->skb = newskb;
796*4882a593Smuzhiyun rbd->v_data = newskb->data;
797*4882a593Smuzhiyun rbd->b_data = WSWAPchar(virt_to_bus(newskb->data));
798*4882a593Smuzhiyun #ifdef __mc68000__
799*4882a593Smuzhiyun cache_clear(virt_to_phys(newskb->data), PKT_BUF_SZ);
800*4882a593Smuzhiyun #endif
801*4882a593Smuzhiyun } else {
802*4882a593Smuzhiyun skb = netdev_alloc_skb(dev, pkt_len + 2);
803*4882a593Smuzhiyun }
804*4882a593Smuzhiyun memory_squeeze:
805*4882a593Smuzhiyun if (skb == NULL) {
806*4882a593Smuzhiyun /* XXX tulip.c can defer packets here!! */
807*4882a593Smuzhiyun dev->stats.rx_dropped++;
808*4882a593Smuzhiyun } else {
809*4882a593Smuzhiyun if (!rx_in_place) {
810*4882a593Smuzhiyun /* 16 byte align the data fields */
811*4882a593Smuzhiyun skb_reserve(skb, 2);
812*4882a593Smuzhiyun skb_put_data(skb, rbd->v_data,
813*4882a593Smuzhiyun pkt_len);
814*4882a593Smuzhiyun }
815*4882a593Smuzhiyun skb->protocol=eth_type_trans(skb,dev);
816*4882a593Smuzhiyun skb->len = pkt_len;
817*4882a593Smuzhiyun #ifdef __mc68000__
818*4882a593Smuzhiyun cache_clear(virt_to_phys(rbd->skb->data),
819*4882a593Smuzhiyun pkt_len);
820*4882a593Smuzhiyun #endif
821*4882a593Smuzhiyun netif_rx(skb);
822*4882a593Smuzhiyun dev->stats.rx_packets++;
823*4882a593Smuzhiyun dev->stats.rx_bytes+=pkt_len;
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun else {
827*4882a593Smuzhiyun DEB(DEB_ERRORS, printk(KERN_DEBUG "%s: Error, rfd.stat = 0x%04x\n",
828*4882a593Smuzhiyun dev->name, rfd->stat));
829*4882a593Smuzhiyun dev->stats.rx_errors++;
830*4882a593Smuzhiyun if ((rfd->stat) & 0x0001)
831*4882a593Smuzhiyun dev->stats.collisions++;
832*4882a593Smuzhiyun if ((rfd->stat) & 0x0080)
833*4882a593Smuzhiyun dev->stats.rx_length_errors++;
834*4882a593Smuzhiyun if ((rfd->stat) & 0x0100)
835*4882a593Smuzhiyun dev->stats.rx_over_errors++;
836*4882a593Smuzhiyun if ((rfd->stat) & 0x0200)
837*4882a593Smuzhiyun dev->stats.rx_fifo_errors++;
838*4882a593Smuzhiyun if ((rfd->stat) & 0x0400)
839*4882a593Smuzhiyun dev->stats.rx_frame_errors++;
840*4882a593Smuzhiyun if ((rfd->stat) & 0x0800)
841*4882a593Smuzhiyun dev->stats.rx_crc_errors++;
842*4882a593Smuzhiyun if ((rfd->stat) & 0x1000)
843*4882a593Smuzhiyun dev->stats.rx_length_errors++;
844*4882a593Smuzhiyun }
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun /* Clear the buffer descriptor count and EOF + F flags */
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun if (rbd != I596_NULL && (rbd->count & 0x4000)) {
849*4882a593Smuzhiyun rbd->count = 0;
850*4882a593Smuzhiyun lp->rbd_head = rbd->v_next;
851*4882a593Smuzhiyun }
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun /* Tidy the frame descriptor, marking it as end of list */
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun rfd->rbd = I596_NULL;
856*4882a593Smuzhiyun rfd->stat = 0;
857*4882a593Smuzhiyun rfd->cmd = CMD_EOL|CMD_FLEX;
858*4882a593Smuzhiyun rfd->count = 0;
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun /* Remove end-of-list from old end descriptor */
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun rfd->v_prev->cmd = CMD_FLEX;
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun /* Update record of next frame descriptor to process */
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun lp->scb.rfd = rfd->b_next;
867*4882a593Smuzhiyun lp->rfd_head = rfd->v_next;
868*4882a593Smuzhiyun rfd = lp->rfd_head;
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun DEB(DEB_RXFRAME,printk(KERN_DEBUG "frames %d\n", frames));
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun return 0;
874*4882a593Smuzhiyun }
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun
i596_cleanup_cmd(struct net_device * dev,struct i596_private * lp)877*4882a593Smuzhiyun static void i596_cleanup_cmd(struct net_device *dev, struct i596_private *lp)
878*4882a593Smuzhiyun {
879*4882a593Smuzhiyun struct i596_cmd *ptr;
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun while (lp->cmd_head != I596_NULL) {
882*4882a593Smuzhiyun ptr = lp->cmd_head;
883*4882a593Smuzhiyun lp->cmd_head = ptr->v_next;
884*4882a593Smuzhiyun lp->cmd_backlog--;
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun switch ((ptr->command) & 0x7) {
887*4882a593Smuzhiyun case CmdTx:
888*4882a593Smuzhiyun {
889*4882a593Smuzhiyun struct tx_cmd *tx_cmd = (struct tx_cmd *) ptr;
890*4882a593Smuzhiyun struct sk_buff *skb = tx_cmd->skb;
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun dev_kfree_skb(skb);
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun dev->stats.tx_errors++;
895*4882a593Smuzhiyun dev->stats.tx_aborted_errors++;
896*4882a593Smuzhiyun
897*4882a593Smuzhiyun ptr->v_next = ptr->b_next = I596_NULL;
898*4882a593Smuzhiyun tx_cmd->cmd.command = 0; /* Mark as free */
899*4882a593Smuzhiyun break;
900*4882a593Smuzhiyun }
901*4882a593Smuzhiyun default:
902*4882a593Smuzhiyun ptr->v_next = ptr->b_next = I596_NULL;
903*4882a593Smuzhiyun }
904*4882a593Smuzhiyun }
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun wait_cmd(dev,lp,100,"i596_cleanup_cmd timed out");
907*4882a593Smuzhiyun lp->scb.cmd = I596_NULL;
908*4882a593Smuzhiyun }
909*4882a593Smuzhiyun
i596_reset(struct net_device * dev,struct i596_private * lp,int ioaddr)910*4882a593Smuzhiyun static void i596_reset(struct net_device *dev, struct i596_private *lp,
911*4882a593Smuzhiyun int ioaddr)
912*4882a593Smuzhiyun {
913*4882a593Smuzhiyun unsigned long flags;
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun DEB(DEB_RESET,printk(KERN_DEBUG "i596_reset\n"));
916*4882a593Smuzhiyun
917*4882a593Smuzhiyun spin_lock_irqsave (&lp->lock, flags);
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun wait_cmd(dev,lp,100,"i596_reset timed out");
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun netif_stop_queue(dev);
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun lp->scb.command = CUC_ABORT | RX_ABORT;
924*4882a593Smuzhiyun CA(dev);
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun /* wait for shutdown */
927*4882a593Smuzhiyun wait_cmd(dev,lp,1000,"i596_reset 2 timed out");
928*4882a593Smuzhiyun spin_unlock_irqrestore (&lp->lock, flags);
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun i596_cleanup_cmd(dev,lp);
931*4882a593Smuzhiyun i596_rx(dev);
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun netif_start_queue(dev);
934*4882a593Smuzhiyun init_i596_mem(dev);
935*4882a593Smuzhiyun }
936*4882a593Smuzhiyun
i596_add_cmd(struct net_device * dev,struct i596_cmd * cmd)937*4882a593Smuzhiyun static void i596_add_cmd(struct net_device *dev, struct i596_cmd *cmd)
938*4882a593Smuzhiyun {
939*4882a593Smuzhiyun struct i596_private *lp = dev->ml_priv;
940*4882a593Smuzhiyun int ioaddr = dev->base_addr;
941*4882a593Smuzhiyun unsigned long flags;
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun DEB(DEB_ADDCMD,printk(KERN_DEBUG "i596_add_cmd\n"));
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun cmd->status = 0;
946*4882a593Smuzhiyun cmd->command |= (CMD_EOL | CMD_INTR);
947*4882a593Smuzhiyun cmd->v_next = cmd->b_next = I596_NULL;
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun spin_lock_irqsave (&lp->lock, flags);
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun if (lp->cmd_head != I596_NULL) {
952*4882a593Smuzhiyun lp->cmd_tail->v_next = cmd;
953*4882a593Smuzhiyun lp->cmd_tail->b_next = WSWAPcmd(virt_to_bus(&cmd->status));
954*4882a593Smuzhiyun } else {
955*4882a593Smuzhiyun lp->cmd_head = cmd;
956*4882a593Smuzhiyun wait_cmd(dev,lp,100,"i596_add_cmd timed out");
957*4882a593Smuzhiyun lp->scb.cmd = WSWAPcmd(virt_to_bus(&cmd->status));
958*4882a593Smuzhiyun lp->scb.command = CUC_START;
959*4882a593Smuzhiyun CA(dev);
960*4882a593Smuzhiyun }
961*4882a593Smuzhiyun lp->cmd_tail = cmd;
962*4882a593Smuzhiyun lp->cmd_backlog++;
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun spin_unlock_irqrestore (&lp->lock, flags);
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun if (lp->cmd_backlog > max_cmd_backlog) {
967*4882a593Smuzhiyun unsigned long tickssofar = jiffies - lp->last_cmd;
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun if (tickssofar < ticks_limit)
970*4882a593Smuzhiyun return;
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun printk(KERN_NOTICE "%s: command unit timed out, status resetting.\n", dev->name);
973*4882a593Smuzhiyun
974*4882a593Smuzhiyun i596_reset(dev, lp, ioaddr);
975*4882a593Smuzhiyun }
976*4882a593Smuzhiyun }
977*4882a593Smuzhiyun
i596_open(struct net_device * dev)978*4882a593Smuzhiyun static int i596_open(struct net_device *dev)
979*4882a593Smuzhiyun {
980*4882a593Smuzhiyun int res = 0;
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun DEB(DEB_OPEN,printk(KERN_DEBUG "%s: i596_open() irq %d.\n", dev->name, dev->irq));
983*4882a593Smuzhiyun
984*4882a593Smuzhiyun if (request_irq(dev->irq, i596_interrupt, 0, "i82596", dev)) {
985*4882a593Smuzhiyun printk(KERN_ERR "%s: IRQ %d not free\n", dev->name, dev->irq);
986*4882a593Smuzhiyun return -EAGAIN;
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
989*4882a593Smuzhiyun if (MACH_IS_MVME16x) {
990*4882a593Smuzhiyun if (request_irq(0x56, i596_error, 0, "i82596_error", dev)) {
991*4882a593Smuzhiyun res = -EAGAIN;
992*4882a593Smuzhiyun goto err_irq_dev;
993*4882a593Smuzhiyun }
994*4882a593Smuzhiyun }
995*4882a593Smuzhiyun #endif
996*4882a593Smuzhiyun res = init_rx_bufs(dev);
997*4882a593Smuzhiyun if (res)
998*4882a593Smuzhiyun goto err_irq_56;
999*4882a593Smuzhiyun
1000*4882a593Smuzhiyun netif_start_queue(dev);
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun if (init_i596_mem(dev)) {
1003*4882a593Smuzhiyun res = -EAGAIN;
1004*4882a593Smuzhiyun goto err_queue;
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun
1007*4882a593Smuzhiyun return 0;
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun err_queue:
1010*4882a593Smuzhiyun netif_stop_queue(dev);
1011*4882a593Smuzhiyun remove_rx_bufs(dev);
1012*4882a593Smuzhiyun err_irq_56:
1013*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
1014*4882a593Smuzhiyun free_irq(0x56, dev);
1015*4882a593Smuzhiyun err_irq_dev:
1016*4882a593Smuzhiyun #endif
1017*4882a593Smuzhiyun free_irq(dev->irq, dev);
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun return res;
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun
i596_tx_timeout(struct net_device * dev,unsigned int txqueue)1022*4882a593Smuzhiyun static void i596_tx_timeout (struct net_device *dev, unsigned int txqueue)
1023*4882a593Smuzhiyun {
1024*4882a593Smuzhiyun struct i596_private *lp = dev->ml_priv;
1025*4882a593Smuzhiyun int ioaddr = dev->base_addr;
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun /* Transmitter timeout, serious problems. */
1028*4882a593Smuzhiyun DEB(DEB_ERRORS,printk(KERN_ERR "%s: transmit timed out, status resetting.\n",
1029*4882a593Smuzhiyun dev->name));
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun dev->stats.tx_errors++;
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun /* Try to restart the adaptor */
1034*4882a593Smuzhiyun if (lp->last_restart == dev->stats.tx_packets) {
1035*4882a593Smuzhiyun DEB(DEB_ERRORS,printk(KERN_ERR "Resetting board.\n"));
1036*4882a593Smuzhiyun /* Shutdown and restart */
1037*4882a593Smuzhiyun i596_reset (dev, lp, ioaddr);
1038*4882a593Smuzhiyun } else {
1039*4882a593Smuzhiyun /* Issue a channel attention signal */
1040*4882a593Smuzhiyun DEB(DEB_ERRORS,printk(KERN_ERR "Kicking board.\n"));
1041*4882a593Smuzhiyun lp->scb.command = CUC_START | RX_START;
1042*4882a593Smuzhiyun CA (dev);
1043*4882a593Smuzhiyun lp->last_restart = dev->stats.tx_packets;
1044*4882a593Smuzhiyun }
1045*4882a593Smuzhiyun
1046*4882a593Smuzhiyun netif_trans_update(dev); /* prevent tx timeout */
1047*4882a593Smuzhiyun netif_wake_queue (dev);
1048*4882a593Smuzhiyun }
1049*4882a593Smuzhiyun
i596_start_xmit(struct sk_buff * skb,struct net_device * dev)1050*4882a593Smuzhiyun static netdev_tx_t i596_start_xmit(struct sk_buff *skb, struct net_device *dev)
1051*4882a593Smuzhiyun {
1052*4882a593Smuzhiyun struct i596_private *lp = dev->ml_priv;
1053*4882a593Smuzhiyun struct tx_cmd *tx_cmd;
1054*4882a593Smuzhiyun struct i596_tbd *tbd;
1055*4882a593Smuzhiyun short length = skb->len;
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun DEB(DEB_STARTTX,printk(KERN_DEBUG "%s: i596_start_xmit(%x,%p) called\n",
1058*4882a593Smuzhiyun dev->name, skb->len, skb->data));
1059*4882a593Smuzhiyun
1060*4882a593Smuzhiyun if (skb->len < ETH_ZLEN) {
1061*4882a593Smuzhiyun if (skb_padto(skb, ETH_ZLEN))
1062*4882a593Smuzhiyun return NETDEV_TX_OK;
1063*4882a593Smuzhiyun length = ETH_ZLEN;
1064*4882a593Smuzhiyun }
1065*4882a593Smuzhiyun netif_stop_queue(dev);
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun tx_cmd = lp->tx_cmds + lp->next_tx_cmd;
1068*4882a593Smuzhiyun tbd = lp->tbds + lp->next_tx_cmd;
1069*4882a593Smuzhiyun
1070*4882a593Smuzhiyun if (tx_cmd->cmd.command) {
1071*4882a593Smuzhiyun printk(KERN_NOTICE "%s: xmit ring full, dropping packet.\n",
1072*4882a593Smuzhiyun dev->name);
1073*4882a593Smuzhiyun dev->stats.tx_dropped++;
1074*4882a593Smuzhiyun
1075*4882a593Smuzhiyun dev_kfree_skb(skb);
1076*4882a593Smuzhiyun } else {
1077*4882a593Smuzhiyun if (++lp->next_tx_cmd == TX_RING_SIZE)
1078*4882a593Smuzhiyun lp->next_tx_cmd = 0;
1079*4882a593Smuzhiyun tx_cmd->tbd = WSWAPtbd(virt_to_bus(tbd));
1080*4882a593Smuzhiyun tbd->next = I596_NULL;
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun tx_cmd->cmd.command = CMD_FLEX | CmdTx;
1083*4882a593Smuzhiyun tx_cmd->skb = skb;
1084*4882a593Smuzhiyun
1085*4882a593Smuzhiyun tx_cmd->pad = 0;
1086*4882a593Smuzhiyun tx_cmd->size = 0;
1087*4882a593Smuzhiyun tbd->pad = 0;
1088*4882a593Smuzhiyun tbd->size = EOF | length;
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun tbd->data = WSWAPchar(virt_to_bus(skb->data));
1091*4882a593Smuzhiyun
1092*4882a593Smuzhiyun #ifdef __mc68000__
1093*4882a593Smuzhiyun cache_push(virt_to_phys(skb->data), length);
1094*4882a593Smuzhiyun #endif
1095*4882a593Smuzhiyun DEB(DEB_TXADDR,print_eth(skb->data, "tx-queued"));
1096*4882a593Smuzhiyun i596_add_cmd(dev, &tx_cmd->cmd);
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun dev->stats.tx_packets++;
1099*4882a593Smuzhiyun dev->stats.tx_bytes += length;
1100*4882a593Smuzhiyun }
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun netif_start_queue(dev);
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun return NETDEV_TX_OK;
1105*4882a593Smuzhiyun }
1106*4882a593Smuzhiyun
print_eth(unsigned char * add,char * str)1107*4882a593Smuzhiyun static void print_eth(unsigned char *add, char *str)
1108*4882a593Smuzhiyun {
1109*4882a593Smuzhiyun printk(KERN_DEBUG "i596 0x%p, %pM --> %pM %02X%02X, %s\n",
1110*4882a593Smuzhiyun add, add + 6, add, add[12], add[13], str);
1111*4882a593Smuzhiyun }
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun static int io = 0x300;
1114*4882a593Smuzhiyun static int irq = 10;
1115*4882a593Smuzhiyun
1116*4882a593Smuzhiyun static const struct net_device_ops i596_netdev_ops = {
1117*4882a593Smuzhiyun .ndo_open = i596_open,
1118*4882a593Smuzhiyun .ndo_stop = i596_close,
1119*4882a593Smuzhiyun .ndo_start_xmit = i596_start_xmit,
1120*4882a593Smuzhiyun .ndo_set_rx_mode = set_multicast_list,
1121*4882a593Smuzhiyun .ndo_tx_timeout = i596_tx_timeout,
1122*4882a593Smuzhiyun .ndo_set_mac_address = eth_mac_addr,
1123*4882a593Smuzhiyun .ndo_validate_addr = eth_validate_addr,
1124*4882a593Smuzhiyun };
1125*4882a593Smuzhiyun
i82596_probe(int unit)1126*4882a593Smuzhiyun struct net_device * __init i82596_probe(int unit)
1127*4882a593Smuzhiyun {
1128*4882a593Smuzhiyun struct net_device *dev;
1129*4882a593Smuzhiyun int i;
1130*4882a593Smuzhiyun struct i596_private *lp;
1131*4882a593Smuzhiyun char eth_addr[8];
1132*4882a593Smuzhiyun static int probed;
1133*4882a593Smuzhiyun int err;
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun if (probed)
1136*4882a593Smuzhiyun return ERR_PTR(-ENODEV);
1137*4882a593Smuzhiyun probed++;
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun dev = alloc_etherdev(0);
1140*4882a593Smuzhiyun if (!dev)
1141*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun if (unit >= 0) {
1144*4882a593Smuzhiyun sprintf(dev->name, "eth%d", unit);
1145*4882a593Smuzhiyun netdev_boot_setup_check(dev);
1146*4882a593Smuzhiyun } else {
1147*4882a593Smuzhiyun dev->base_addr = io;
1148*4882a593Smuzhiyun dev->irq = irq;
1149*4882a593Smuzhiyun }
1150*4882a593Smuzhiyun
1151*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
1152*4882a593Smuzhiyun if (MACH_IS_MVME16x) {
1153*4882a593Smuzhiyun if (mvme16x_config & MVME16x_CONFIG_NO_ETHERNET) {
1154*4882a593Smuzhiyun printk(KERN_NOTICE "Ethernet probe disabled - chip not present\n");
1155*4882a593Smuzhiyun err = -ENODEV;
1156*4882a593Smuzhiyun goto out;
1157*4882a593Smuzhiyun }
1158*4882a593Smuzhiyun memcpy(eth_addr, absolute_pointer(0xfffc1f2c), ETH_ALEN); /* YUCK! Get addr from NOVRAM */
1159*4882a593Smuzhiyun dev->base_addr = MVME_I596_BASE;
1160*4882a593Smuzhiyun dev->irq = (unsigned) MVME16x_IRQ_I596;
1161*4882a593Smuzhiyun goto found;
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun #endif
1164*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
1165*4882a593Smuzhiyun if (MACH_IS_BVME6000) {
1166*4882a593Smuzhiyun volatile unsigned char *rtc = (unsigned char *) BVME_RTC_BASE;
1167*4882a593Smuzhiyun unsigned char msr = rtc[3];
1168*4882a593Smuzhiyun int i;
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun rtc[3] |= 0x80;
1171*4882a593Smuzhiyun for (i = 0; i < 6; i++)
1172*4882a593Smuzhiyun eth_addr[i] = rtc[i * 4 + 7]; /* Stored in RTC RAM at offset 1 */
1173*4882a593Smuzhiyun rtc[3] = msr;
1174*4882a593Smuzhiyun dev->base_addr = BVME_I596_BASE;
1175*4882a593Smuzhiyun dev->irq = (unsigned) BVME_IRQ_I596;
1176*4882a593Smuzhiyun goto found;
1177*4882a593Smuzhiyun }
1178*4882a593Smuzhiyun #endif
1179*4882a593Smuzhiyun err = -ENODEV;
1180*4882a593Smuzhiyun goto out;
1181*4882a593Smuzhiyun
1182*4882a593Smuzhiyun found:
1183*4882a593Smuzhiyun dev->mem_start = (int)__get_free_pages(GFP_ATOMIC, 0);
1184*4882a593Smuzhiyun if (!dev->mem_start) {
1185*4882a593Smuzhiyun err = -ENOMEM;
1186*4882a593Smuzhiyun goto out1;
1187*4882a593Smuzhiyun }
1188*4882a593Smuzhiyun
1189*4882a593Smuzhiyun DEB(DEB_PROBE,printk(KERN_INFO "%s: 82596 at %#3lx,", dev->name, dev->base_addr));
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun for (i = 0; i < 6; i++)
1192*4882a593Smuzhiyun DEB(DEB_PROBE,printk(" %2.2X", dev->dev_addr[i] = eth_addr[i]));
1193*4882a593Smuzhiyun
1194*4882a593Smuzhiyun DEB(DEB_PROBE,printk(" IRQ %d.\n", dev->irq));
1195*4882a593Smuzhiyun
1196*4882a593Smuzhiyun DEB(DEB_PROBE,printk(KERN_INFO "%s", version));
1197*4882a593Smuzhiyun
1198*4882a593Smuzhiyun /* The 82596-specific entries in the device structure. */
1199*4882a593Smuzhiyun dev->netdev_ops = &i596_netdev_ops;
1200*4882a593Smuzhiyun dev->watchdog_timeo = TX_TIMEOUT;
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun dev->ml_priv = (void *)(dev->mem_start);
1203*4882a593Smuzhiyun
1204*4882a593Smuzhiyun lp = dev->ml_priv;
1205*4882a593Smuzhiyun DEB(DEB_INIT,printk(KERN_DEBUG "%s: lp at 0x%08lx (%zd bytes), "
1206*4882a593Smuzhiyun "lp->scb at 0x%08lx\n",
1207*4882a593Smuzhiyun dev->name, (unsigned long)lp,
1208*4882a593Smuzhiyun sizeof(struct i596_private), (unsigned long)&lp->scb));
1209*4882a593Smuzhiyun memset((void *) lp, 0, sizeof(struct i596_private));
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun #ifdef __mc68000__
1212*4882a593Smuzhiyun cache_push(virt_to_phys((void *)(dev->mem_start)), 4096);
1213*4882a593Smuzhiyun cache_clear(virt_to_phys((void *)(dev->mem_start)), 4096);
1214*4882a593Smuzhiyun kernel_set_cachemode((void *)(dev->mem_start), 4096, IOMAP_NOCACHE_SER);
1215*4882a593Smuzhiyun #endif
1216*4882a593Smuzhiyun lp->scb.command = 0;
1217*4882a593Smuzhiyun lp->scb.cmd = I596_NULL;
1218*4882a593Smuzhiyun lp->scb.rfd = I596_NULL;
1219*4882a593Smuzhiyun spin_lock_init(&lp->lock);
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun err = register_netdev(dev);
1222*4882a593Smuzhiyun if (err)
1223*4882a593Smuzhiyun goto out2;
1224*4882a593Smuzhiyun return dev;
1225*4882a593Smuzhiyun out2:
1226*4882a593Smuzhiyun #ifdef __mc68000__
1227*4882a593Smuzhiyun /* XXX This assumes default cache mode to be IOMAP_FULL_CACHING,
1228*4882a593Smuzhiyun * XXX which may be invalid (CONFIG_060_WRITETHROUGH)
1229*4882a593Smuzhiyun */
1230*4882a593Smuzhiyun kernel_set_cachemode((void *)(dev->mem_start), 4096,
1231*4882a593Smuzhiyun IOMAP_FULL_CACHING);
1232*4882a593Smuzhiyun #endif
1233*4882a593Smuzhiyun free_page ((u32)(dev->mem_start));
1234*4882a593Smuzhiyun out1:
1235*4882a593Smuzhiyun out:
1236*4882a593Smuzhiyun free_netdev(dev);
1237*4882a593Smuzhiyun return ERR_PTR(err);
1238*4882a593Smuzhiyun }
1239*4882a593Smuzhiyun
i596_interrupt(int irq,void * dev_id)1240*4882a593Smuzhiyun static irqreturn_t i596_interrupt(int irq, void *dev_id)
1241*4882a593Smuzhiyun {
1242*4882a593Smuzhiyun struct net_device *dev = dev_id;
1243*4882a593Smuzhiyun struct i596_private *lp;
1244*4882a593Smuzhiyun short ioaddr;
1245*4882a593Smuzhiyun unsigned short status, ack_cmd = 0;
1246*4882a593Smuzhiyun int handled = 0;
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
1249*4882a593Smuzhiyun if (MACH_IS_BVME6000) {
1250*4882a593Smuzhiyun if (*(char *) BVME_LOCAL_IRQ_STAT & BVME_ETHERR) {
1251*4882a593Smuzhiyun i596_error(irq, dev_id);
1252*4882a593Smuzhiyun return IRQ_HANDLED;
1253*4882a593Smuzhiyun }
1254*4882a593Smuzhiyun }
1255*4882a593Smuzhiyun #endif
1256*4882a593Smuzhiyun if (dev == NULL) {
1257*4882a593Smuzhiyun printk(KERN_ERR "i596_interrupt(): irq %d for unknown device.\n", irq);
1258*4882a593Smuzhiyun return IRQ_NONE;
1259*4882a593Smuzhiyun }
1260*4882a593Smuzhiyun
1261*4882a593Smuzhiyun ioaddr = dev->base_addr;
1262*4882a593Smuzhiyun lp = dev->ml_priv;
1263*4882a593Smuzhiyun
1264*4882a593Smuzhiyun spin_lock (&lp->lock);
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun wait_cmd(dev,lp,100,"i596 interrupt, timeout");
1267*4882a593Smuzhiyun status = lp->scb.status;
1268*4882a593Smuzhiyun
1269*4882a593Smuzhiyun DEB(DEB_INTS,printk(KERN_DEBUG "%s: i596 interrupt, IRQ %d, status %4.4x.\n",
1270*4882a593Smuzhiyun dev->name, irq, status));
1271*4882a593Smuzhiyun
1272*4882a593Smuzhiyun ack_cmd = status & 0xf000;
1273*4882a593Smuzhiyun
1274*4882a593Smuzhiyun if ((status & 0x8000) || (status & 0x2000)) {
1275*4882a593Smuzhiyun struct i596_cmd *ptr;
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun handled = 1;
1278*4882a593Smuzhiyun if ((status & 0x8000))
1279*4882a593Smuzhiyun DEB(DEB_INTS,printk(KERN_DEBUG "%s: i596 interrupt completed command.\n", dev->name));
1280*4882a593Smuzhiyun if ((status & 0x2000))
1281*4882a593Smuzhiyun DEB(DEB_INTS,printk(KERN_DEBUG "%s: i596 interrupt command unit inactive %x.\n", dev->name, status & 0x0700));
1282*4882a593Smuzhiyun
1283*4882a593Smuzhiyun while ((lp->cmd_head != I596_NULL) && (lp->cmd_head->status & STAT_C)) {
1284*4882a593Smuzhiyun ptr = lp->cmd_head;
1285*4882a593Smuzhiyun
1286*4882a593Smuzhiyun DEB(DEB_STATUS,printk(KERN_DEBUG "cmd_head->status = %04x, ->command = %04x\n",
1287*4882a593Smuzhiyun lp->cmd_head->status, lp->cmd_head->command));
1288*4882a593Smuzhiyun lp->cmd_head = ptr->v_next;
1289*4882a593Smuzhiyun lp->cmd_backlog--;
1290*4882a593Smuzhiyun
1291*4882a593Smuzhiyun switch ((ptr->command) & 0x7) {
1292*4882a593Smuzhiyun case CmdTx:
1293*4882a593Smuzhiyun {
1294*4882a593Smuzhiyun struct tx_cmd *tx_cmd = (struct tx_cmd *) ptr;
1295*4882a593Smuzhiyun struct sk_buff *skb = tx_cmd->skb;
1296*4882a593Smuzhiyun
1297*4882a593Smuzhiyun if ((ptr->status) & STAT_OK) {
1298*4882a593Smuzhiyun DEB(DEB_TXADDR,print_eth(skb->data, "tx-done"));
1299*4882a593Smuzhiyun } else {
1300*4882a593Smuzhiyun dev->stats.tx_errors++;
1301*4882a593Smuzhiyun if ((ptr->status) & 0x0020)
1302*4882a593Smuzhiyun dev->stats.collisions++;
1303*4882a593Smuzhiyun if (!((ptr->status) & 0x0040))
1304*4882a593Smuzhiyun dev->stats.tx_heartbeat_errors++;
1305*4882a593Smuzhiyun if ((ptr->status) & 0x0400)
1306*4882a593Smuzhiyun dev->stats.tx_carrier_errors++;
1307*4882a593Smuzhiyun if ((ptr->status) & 0x0800)
1308*4882a593Smuzhiyun dev->stats.collisions++;
1309*4882a593Smuzhiyun if ((ptr->status) & 0x1000)
1310*4882a593Smuzhiyun dev->stats.tx_aborted_errors++;
1311*4882a593Smuzhiyun }
1312*4882a593Smuzhiyun
1313*4882a593Smuzhiyun dev_consume_skb_irq(skb);
1314*4882a593Smuzhiyun
1315*4882a593Smuzhiyun tx_cmd->cmd.command = 0; /* Mark free */
1316*4882a593Smuzhiyun break;
1317*4882a593Smuzhiyun }
1318*4882a593Smuzhiyun case CmdTDR:
1319*4882a593Smuzhiyun {
1320*4882a593Smuzhiyun unsigned short status = ((struct tdr_cmd *)ptr)->status;
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun if (status & 0x8000) {
1323*4882a593Smuzhiyun DEB(DEB_TDR,printk(KERN_INFO "%s: link ok.\n", dev->name));
1324*4882a593Smuzhiyun } else {
1325*4882a593Smuzhiyun if (status & 0x4000)
1326*4882a593Smuzhiyun printk(KERN_ERR "%s: Transceiver problem.\n", dev->name);
1327*4882a593Smuzhiyun if (status & 0x2000)
1328*4882a593Smuzhiyun printk(KERN_ERR "%s: Termination problem.\n", dev->name);
1329*4882a593Smuzhiyun if (status & 0x1000)
1330*4882a593Smuzhiyun printk(KERN_ERR "%s: Short circuit.\n", dev->name);
1331*4882a593Smuzhiyun
1332*4882a593Smuzhiyun DEB(DEB_TDR,printk(KERN_INFO "%s: Time %d.\n", dev->name, status & 0x07ff));
1333*4882a593Smuzhiyun }
1334*4882a593Smuzhiyun break;
1335*4882a593Smuzhiyun }
1336*4882a593Smuzhiyun case CmdConfigure:
1337*4882a593Smuzhiyun case CmdMulticastList:
1338*4882a593Smuzhiyun /* Zap command so set_multicast_list() knows it is free */
1339*4882a593Smuzhiyun ptr->command = 0;
1340*4882a593Smuzhiyun break;
1341*4882a593Smuzhiyun }
1342*4882a593Smuzhiyun ptr->v_next = ptr->b_next = I596_NULL;
1343*4882a593Smuzhiyun lp->last_cmd = jiffies;
1344*4882a593Smuzhiyun }
1345*4882a593Smuzhiyun
1346*4882a593Smuzhiyun ptr = lp->cmd_head;
1347*4882a593Smuzhiyun while ((ptr != I596_NULL) && (ptr != lp->cmd_tail)) {
1348*4882a593Smuzhiyun ptr->command &= 0x1fff;
1349*4882a593Smuzhiyun ptr = ptr->v_next;
1350*4882a593Smuzhiyun }
1351*4882a593Smuzhiyun
1352*4882a593Smuzhiyun if ((lp->cmd_head != I596_NULL))
1353*4882a593Smuzhiyun ack_cmd |= CUC_START;
1354*4882a593Smuzhiyun lp->scb.cmd = WSWAPcmd(virt_to_bus(&lp->cmd_head->status));
1355*4882a593Smuzhiyun }
1356*4882a593Smuzhiyun if ((status & 0x1000) || (status & 0x4000)) {
1357*4882a593Smuzhiyun if ((status & 0x4000))
1358*4882a593Smuzhiyun DEB(DEB_INTS,printk(KERN_DEBUG "%s: i596 interrupt received a frame.\n", dev->name));
1359*4882a593Smuzhiyun i596_rx(dev);
1360*4882a593Smuzhiyun /* Only RX_START if stopped - RGH 07-07-96 */
1361*4882a593Smuzhiyun if (status & 0x1000) {
1362*4882a593Smuzhiyun if (netif_running(dev)) {
1363*4882a593Smuzhiyun DEB(DEB_ERRORS,printk(KERN_ERR "%s: i596 interrupt receive unit inactive, status 0x%x\n", dev->name, status));
1364*4882a593Smuzhiyun ack_cmd |= RX_START;
1365*4882a593Smuzhiyun dev->stats.rx_errors++;
1366*4882a593Smuzhiyun dev->stats.rx_fifo_errors++;
1367*4882a593Smuzhiyun rebuild_rx_bufs(dev);
1368*4882a593Smuzhiyun }
1369*4882a593Smuzhiyun }
1370*4882a593Smuzhiyun }
1371*4882a593Smuzhiyun wait_cmd(dev,lp,100,"i596 interrupt, timeout");
1372*4882a593Smuzhiyun lp->scb.command = ack_cmd;
1373*4882a593Smuzhiyun
1374*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
1375*4882a593Smuzhiyun if (MACH_IS_MVME16x) {
1376*4882a593Smuzhiyun /* Ack the interrupt */
1377*4882a593Smuzhiyun
1378*4882a593Smuzhiyun volatile unsigned char *pcc2 = (unsigned char *) 0xfff42000;
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun pcc2[0x2a] |= 0x08;
1381*4882a593Smuzhiyun }
1382*4882a593Smuzhiyun #endif
1383*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
1384*4882a593Smuzhiyun if (MACH_IS_BVME6000) {
1385*4882a593Smuzhiyun volatile unsigned char *ethirq = (unsigned char *) BVME_ETHIRQ_REG;
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun *ethirq = 1;
1388*4882a593Smuzhiyun *ethirq = 3;
1389*4882a593Smuzhiyun }
1390*4882a593Smuzhiyun #endif
1391*4882a593Smuzhiyun CA(dev);
1392*4882a593Smuzhiyun
1393*4882a593Smuzhiyun DEB(DEB_INTS,printk(KERN_DEBUG "%s: exiting interrupt.\n", dev->name));
1394*4882a593Smuzhiyun
1395*4882a593Smuzhiyun spin_unlock (&lp->lock);
1396*4882a593Smuzhiyun return IRQ_RETVAL(handled);
1397*4882a593Smuzhiyun }
1398*4882a593Smuzhiyun
i596_close(struct net_device * dev)1399*4882a593Smuzhiyun static int i596_close(struct net_device *dev)
1400*4882a593Smuzhiyun {
1401*4882a593Smuzhiyun struct i596_private *lp = dev->ml_priv;
1402*4882a593Smuzhiyun unsigned long flags;
1403*4882a593Smuzhiyun
1404*4882a593Smuzhiyun netif_stop_queue(dev);
1405*4882a593Smuzhiyun
1406*4882a593Smuzhiyun DEB(DEB_INIT,printk(KERN_DEBUG "%s: Shutting down ethercard, status was %4.4x.\n",
1407*4882a593Smuzhiyun dev->name, lp->scb.status));
1408*4882a593Smuzhiyun
1409*4882a593Smuzhiyun spin_lock_irqsave(&lp->lock, flags);
1410*4882a593Smuzhiyun
1411*4882a593Smuzhiyun wait_cmd(dev,lp,100,"close1 timed out");
1412*4882a593Smuzhiyun lp->scb.command = CUC_ABORT | RX_ABORT;
1413*4882a593Smuzhiyun CA(dev);
1414*4882a593Smuzhiyun
1415*4882a593Smuzhiyun wait_cmd(dev,lp,100,"close2 timed out");
1416*4882a593Smuzhiyun
1417*4882a593Smuzhiyun spin_unlock_irqrestore(&lp->lock, flags);
1418*4882a593Smuzhiyun DEB(DEB_STRUCT,i596_display_data(dev));
1419*4882a593Smuzhiyun i596_cleanup_cmd(dev,lp);
1420*4882a593Smuzhiyun
1421*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
1422*4882a593Smuzhiyun if (MACH_IS_MVME16x) {
1423*4882a593Smuzhiyun volatile unsigned char *pcc2 = (unsigned char *) 0xfff42000;
1424*4882a593Smuzhiyun
1425*4882a593Smuzhiyun /* Disable all ints */
1426*4882a593Smuzhiyun pcc2[0x28] = 1;
1427*4882a593Smuzhiyun pcc2[0x2a] = 0x40;
1428*4882a593Smuzhiyun pcc2[0x2b] = 0x40; /* Set snooping bits now! */
1429*4882a593Smuzhiyun }
1430*4882a593Smuzhiyun #endif
1431*4882a593Smuzhiyun #ifdef ENABLE_BVME6000_NET
1432*4882a593Smuzhiyun if (MACH_IS_BVME6000) {
1433*4882a593Smuzhiyun volatile unsigned char *ethirq = (unsigned char *) BVME_ETHIRQ_REG;
1434*4882a593Smuzhiyun
1435*4882a593Smuzhiyun *ethirq = 1;
1436*4882a593Smuzhiyun }
1437*4882a593Smuzhiyun #endif
1438*4882a593Smuzhiyun
1439*4882a593Smuzhiyun #ifdef ENABLE_MVME16x_NET
1440*4882a593Smuzhiyun free_irq(0x56, dev);
1441*4882a593Smuzhiyun #endif
1442*4882a593Smuzhiyun free_irq(dev->irq, dev);
1443*4882a593Smuzhiyun remove_rx_bufs(dev);
1444*4882a593Smuzhiyun
1445*4882a593Smuzhiyun return 0;
1446*4882a593Smuzhiyun }
1447*4882a593Smuzhiyun
1448*4882a593Smuzhiyun /*
1449*4882a593Smuzhiyun * Set or clear the multicast filter for this adaptor.
1450*4882a593Smuzhiyun */
1451*4882a593Smuzhiyun
set_multicast_list(struct net_device * dev)1452*4882a593Smuzhiyun static void set_multicast_list(struct net_device *dev)
1453*4882a593Smuzhiyun {
1454*4882a593Smuzhiyun struct i596_private *lp = dev->ml_priv;
1455*4882a593Smuzhiyun int config = 0, cnt;
1456*4882a593Smuzhiyun
1457*4882a593Smuzhiyun DEB(DEB_MULTI,printk(KERN_DEBUG "%s: set multicast list, %d entries, promisc %s, allmulti %s\n",
1458*4882a593Smuzhiyun dev->name, netdev_mc_count(dev),
1459*4882a593Smuzhiyun dev->flags & IFF_PROMISC ? "ON" : "OFF",
1460*4882a593Smuzhiyun dev->flags & IFF_ALLMULTI ? "ON" : "OFF"));
1461*4882a593Smuzhiyun
1462*4882a593Smuzhiyun if (wait_cfg(dev, &lp->cf_cmd.cmd, 1000, "config change request timed out"))
1463*4882a593Smuzhiyun return;
1464*4882a593Smuzhiyun
1465*4882a593Smuzhiyun if ((dev->flags & IFF_PROMISC) && !(lp->cf_cmd.i596_config[8] & 0x01)) {
1466*4882a593Smuzhiyun lp->cf_cmd.i596_config[8] |= 0x01;
1467*4882a593Smuzhiyun config = 1;
1468*4882a593Smuzhiyun }
1469*4882a593Smuzhiyun if (!(dev->flags & IFF_PROMISC) && (lp->cf_cmd.i596_config[8] & 0x01)) {
1470*4882a593Smuzhiyun lp->cf_cmd.i596_config[8] &= ~0x01;
1471*4882a593Smuzhiyun config = 1;
1472*4882a593Smuzhiyun }
1473*4882a593Smuzhiyun if ((dev->flags & IFF_ALLMULTI) && (lp->cf_cmd.i596_config[11] & 0x20)) {
1474*4882a593Smuzhiyun lp->cf_cmd.i596_config[11] &= ~0x20;
1475*4882a593Smuzhiyun config = 1;
1476*4882a593Smuzhiyun }
1477*4882a593Smuzhiyun if (!(dev->flags & IFF_ALLMULTI) && !(lp->cf_cmd.i596_config[11] & 0x20)) {
1478*4882a593Smuzhiyun lp->cf_cmd.i596_config[11] |= 0x20;
1479*4882a593Smuzhiyun config = 1;
1480*4882a593Smuzhiyun }
1481*4882a593Smuzhiyun if (config) {
1482*4882a593Smuzhiyun lp->cf_cmd.cmd.command = CmdConfigure;
1483*4882a593Smuzhiyun i596_add_cmd(dev, &lp->cf_cmd.cmd);
1484*4882a593Smuzhiyun }
1485*4882a593Smuzhiyun
1486*4882a593Smuzhiyun cnt = netdev_mc_count(dev);
1487*4882a593Smuzhiyun if (cnt > MAX_MC_CNT)
1488*4882a593Smuzhiyun {
1489*4882a593Smuzhiyun cnt = MAX_MC_CNT;
1490*4882a593Smuzhiyun printk(KERN_ERR "%s: Only %d multicast addresses supported",
1491*4882a593Smuzhiyun dev->name, cnt);
1492*4882a593Smuzhiyun }
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun if (!netdev_mc_empty(dev)) {
1495*4882a593Smuzhiyun struct netdev_hw_addr *ha;
1496*4882a593Smuzhiyun unsigned char *cp;
1497*4882a593Smuzhiyun struct mc_cmd *cmd;
1498*4882a593Smuzhiyun
1499*4882a593Smuzhiyun if (wait_cfg(dev, &lp->mc_cmd.cmd, 1000, "multicast list change request timed out"))
1500*4882a593Smuzhiyun return;
1501*4882a593Smuzhiyun cmd = &lp->mc_cmd;
1502*4882a593Smuzhiyun cmd->cmd.command = CmdMulticastList;
1503*4882a593Smuzhiyun cmd->mc_cnt = cnt * ETH_ALEN;
1504*4882a593Smuzhiyun cp = cmd->mc_addrs;
1505*4882a593Smuzhiyun netdev_for_each_mc_addr(ha, dev) {
1506*4882a593Smuzhiyun if (!cnt--)
1507*4882a593Smuzhiyun break;
1508*4882a593Smuzhiyun memcpy(cp, ha->addr, ETH_ALEN);
1509*4882a593Smuzhiyun if (i596_debug > 1)
1510*4882a593Smuzhiyun DEB(DEB_MULTI,printk(KERN_INFO "%s: Adding address %pM\n",
1511*4882a593Smuzhiyun dev->name, cp));
1512*4882a593Smuzhiyun cp += ETH_ALEN;
1513*4882a593Smuzhiyun }
1514*4882a593Smuzhiyun i596_add_cmd(dev, &cmd->cmd);
1515*4882a593Smuzhiyun }
1516*4882a593Smuzhiyun }
1517*4882a593Smuzhiyun
1518*4882a593Smuzhiyun #ifdef MODULE
1519*4882a593Smuzhiyun static struct net_device *dev_82596;
1520*4882a593Smuzhiyun
1521*4882a593Smuzhiyun static int debug = -1;
1522*4882a593Smuzhiyun module_param(debug, int, 0);
1523*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "i82596 debug mask");
1524*4882a593Smuzhiyun
init_module(void)1525*4882a593Smuzhiyun int __init init_module(void)
1526*4882a593Smuzhiyun {
1527*4882a593Smuzhiyun if (debug >= 0)
1528*4882a593Smuzhiyun i596_debug = debug;
1529*4882a593Smuzhiyun dev_82596 = i82596_probe(-1);
1530*4882a593Smuzhiyun return PTR_ERR_OR_ZERO(dev_82596);
1531*4882a593Smuzhiyun }
1532*4882a593Smuzhiyun
cleanup_module(void)1533*4882a593Smuzhiyun void __exit cleanup_module(void)
1534*4882a593Smuzhiyun {
1535*4882a593Smuzhiyun unregister_netdev(dev_82596);
1536*4882a593Smuzhiyun #ifdef __mc68000__
1537*4882a593Smuzhiyun /* XXX This assumes default cache mode to be IOMAP_FULL_CACHING,
1538*4882a593Smuzhiyun * XXX which may be invalid (CONFIG_060_WRITETHROUGH)
1539*4882a593Smuzhiyun */
1540*4882a593Smuzhiyun
1541*4882a593Smuzhiyun kernel_set_cachemode((void *)(dev_82596->mem_start), 4096,
1542*4882a593Smuzhiyun IOMAP_FULL_CACHING);
1543*4882a593Smuzhiyun #endif
1544*4882a593Smuzhiyun free_page ((u32)(dev_82596->mem_start));
1545*4882a593Smuzhiyun free_netdev(dev_82596);
1546*4882a593Smuzhiyun }
1547*4882a593Smuzhiyun
1548*4882a593Smuzhiyun #endif /* MODULE */
1549