xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/huawei/hinic/hinic_dev.h (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Huawei HiNIC PCI Express Linux driver
4*4882a593Smuzhiyun  * Copyright(c) 2017 Huawei Technologies Co., Ltd
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #ifndef HINIC_DEV_H
8*4882a593Smuzhiyun #define HINIC_DEV_H
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/netdevice.h>
11*4882a593Smuzhiyun #include <linux/types.h>
12*4882a593Smuzhiyun #include <linux/semaphore.h>
13*4882a593Smuzhiyun #include <linux/workqueue.h>
14*4882a593Smuzhiyun #include <linux/bitops.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include "hinic_hw_dev.h"
17*4882a593Smuzhiyun #include "hinic_tx.h"
18*4882a593Smuzhiyun #include "hinic_rx.h"
19*4882a593Smuzhiyun #include "hinic_sriov.h"
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define HINIC_DRV_NAME          "hinic"
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define LP_PKT_CNT		64
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun enum hinic_flags {
26*4882a593Smuzhiyun 	HINIC_LINK_UP = BIT(0),
27*4882a593Smuzhiyun 	HINIC_INTF_UP = BIT(1),
28*4882a593Smuzhiyun 	HINIC_RSS_ENABLE = BIT(2),
29*4882a593Smuzhiyun 	HINIC_LINK_DOWN = BIT(3),
30*4882a593Smuzhiyun 	HINIC_LP_TEST = BIT(4),
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun struct hinic_rx_mode_work {
34*4882a593Smuzhiyun 	struct work_struct      work;
35*4882a593Smuzhiyun 	u32                     rx_mode;
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun struct hinic_rss_type {
39*4882a593Smuzhiyun 	u8 tcp_ipv6_ext;
40*4882a593Smuzhiyun 	u8 ipv6_ext;
41*4882a593Smuzhiyun 	u8 tcp_ipv6;
42*4882a593Smuzhiyun 	u8 ipv6;
43*4882a593Smuzhiyun 	u8 tcp_ipv4;
44*4882a593Smuzhiyun 	u8 ipv4;
45*4882a593Smuzhiyun 	u8 udp_ipv6;
46*4882a593Smuzhiyun 	u8 udp_ipv4;
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun enum hinic_rss_hash_type {
50*4882a593Smuzhiyun 	HINIC_RSS_HASH_ENGINE_TYPE_XOR,
51*4882a593Smuzhiyun 	HINIC_RSS_HASH_ENGINE_TYPE_TOEP,
52*4882a593Smuzhiyun 	HINIC_RSS_HASH_ENGINE_TYPE_MAX,
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun struct hinic_intr_coal_info {
56*4882a593Smuzhiyun 	u8	pending_limt;
57*4882a593Smuzhiyun 	u8	coalesce_timer_cfg;
58*4882a593Smuzhiyun 	u8	resend_timer_cfg;
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun enum hinic_dbg_type {
62*4882a593Smuzhiyun 	HINIC_DBG_SQ_INFO,
63*4882a593Smuzhiyun 	HINIC_DBG_RQ_INFO,
64*4882a593Smuzhiyun 	HINIC_DBG_FUNC_TABLE,
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun struct hinic_debug_priv {
68*4882a593Smuzhiyun 	struct hinic_dev	*dev;
69*4882a593Smuzhiyun 	void			*object;
70*4882a593Smuzhiyun 	enum hinic_dbg_type	type;
71*4882a593Smuzhiyun 	struct dentry		*root;
72*4882a593Smuzhiyun 	int			field_id[64];
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun struct hinic_dev {
76*4882a593Smuzhiyun 	struct net_device               *netdev;
77*4882a593Smuzhiyun 	struct hinic_hwdev              *hwdev;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	u32                             msg_enable;
80*4882a593Smuzhiyun 	unsigned int                    tx_weight;
81*4882a593Smuzhiyun 	unsigned int                    rx_weight;
82*4882a593Smuzhiyun 	u16				num_qps;
83*4882a593Smuzhiyun 	u16				max_qps;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	unsigned int                    flags;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	struct semaphore                mgmt_lock;
88*4882a593Smuzhiyun 	unsigned long                   *vlan_bitmap;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	struct hinic_rx_mode_work       rx_mode_work;
91*4882a593Smuzhiyun 	struct workqueue_struct         *workq;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	struct hinic_txq                *txqs;
94*4882a593Smuzhiyun 	struct hinic_rxq                *rxqs;
95*4882a593Smuzhiyun 	u16				sq_depth;
96*4882a593Smuzhiyun 	u16				rq_depth;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	u8				rss_tmpl_idx;
99*4882a593Smuzhiyun 	u8				rss_hash_engine;
100*4882a593Smuzhiyun 	u16				num_rss;
101*4882a593Smuzhiyun 	u16				rss_limit;
102*4882a593Smuzhiyun 	struct hinic_rss_type		rss_type;
103*4882a593Smuzhiyun 	u8				*rss_hkey_user;
104*4882a593Smuzhiyun 	s32				*rss_indir_user;
105*4882a593Smuzhiyun 	struct hinic_intr_coal_info	*rx_intr_coalesce;
106*4882a593Smuzhiyun 	struct hinic_intr_coal_info	*tx_intr_coalesce;
107*4882a593Smuzhiyun 	struct hinic_sriov_info sriov_info;
108*4882a593Smuzhiyun 	int				lb_test_rx_idx;
109*4882a593Smuzhiyun 	int				lb_pkt_len;
110*4882a593Smuzhiyun 	u8				*lb_test_rx_buf;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	struct dentry			*dbgfs_root;
113*4882a593Smuzhiyun 	struct dentry			*sq_dbgfs;
114*4882a593Smuzhiyun 	struct dentry			*rq_dbgfs;
115*4882a593Smuzhiyun 	struct dentry			*func_tbl_dbgfs;
116*4882a593Smuzhiyun 	struct hinic_debug_priv		*dbg;
117*4882a593Smuzhiyun 	struct devlink			*devlink;
118*4882a593Smuzhiyun 	bool				cable_unplugged;
119*4882a593Smuzhiyun 	bool				module_unrecognized;
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun struct hinic_devlink_priv {
123*4882a593Smuzhiyun 	struct hinic_hwdev		*hwdev;
124*4882a593Smuzhiyun 	struct devlink_health_reporter  *hw_fault_reporter;
125*4882a593Smuzhiyun 	struct devlink_health_reporter  *fw_fault_reporter;
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun #endif
129