1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (c) 2003 Intracom S.A.
5*4882a593Smuzhiyun * by Pantelis Antoniou <panto@intracom.gr>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * 2005 (c) MontaVista Software, Inc.
8*4882a593Smuzhiyun * Vitaly Bordug <vbordug@ru.mvista.com>
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public License
11*4882a593Smuzhiyun * version 2. This program is licensed "as is" without any warranty of any
12*4882a593Smuzhiyun * kind, whether express or implied.
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/types.h>
18*4882a593Smuzhiyun #include <linux/string.h>
19*4882a593Smuzhiyun #include <linux/ptrace.h>
20*4882a593Smuzhiyun #include <linux/errno.h>
21*4882a593Smuzhiyun #include <linux/ioport.h>
22*4882a593Smuzhiyun #include <linux/interrupt.h>
23*4882a593Smuzhiyun #include <linux/delay.h>
24*4882a593Smuzhiyun #include <linux/netdevice.h>
25*4882a593Smuzhiyun #include <linux/etherdevice.h>
26*4882a593Smuzhiyun #include <linux/skbuff.h>
27*4882a593Smuzhiyun #include <linux/spinlock.h>
28*4882a593Smuzhiyun #include <linux/mii.h>
29*4882a593Smuzhiyun #include <linux/ethtool.h>
30*4882a593Smuzhiyun #include <linux/bitops.h>
31*4882a593Smuzhiyun #include <linux/fs.h>
32*4882a593Smuzhiyun #include <linux/platform_device.h>
33*4882a593Smuzhiyun #include <linux/of_address.h>
34*4882a593Smuzhiyun #include <linux/of_irq.h>
35*4882a593Smuzhiyun #include <linux/of_platform.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #include <asm/irq.h>
38*4882a593Smuzhiyun #include <linux/uaccess.h>
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #include "fs_enet.h"
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /*************************************************/
43*4882a593Smuzhiyun #if defined(CONFIG_CPM1)
44*4882a593Smuzhiyun /* for a 8xx __raw_xxx's are sufficient */
45*4882a593Smuzhiyun #define __fs_out32(addr, x) __raw_writel(x, addr)
46*4882a593Smuzhiyun #define __fs_out16(addr, x) __raw_writew(x, addr)
47*4882a593Smuzhiyun #define __fs_out8(addr, x) __raw_writeb(x, addr)
48*4882a593Smuzhiyun #define __fs_in32(addr) __raw_readl(addr)
49*4882a593Smuzhiyun #define __fs_in16(addr) __raw_readw(addr)
50*4882a593Smuzhiyun #define __fs_in8(addr) __raw_readb(addr)
51*4882a593Smuzhiyun #else
52*4882a593Smuzhiyun /* for others play it safe */
53*4882a593Smuzhiyun #define __fs_out32(addr, x) out_be32(addr, x)
54*4882a593Smuzhiyun #define __fs_out16(addr, x) out_be16(addr, x)
55*4882a593Smuzhiyun #define __fs_in32(addr) in_be32(addr)
56*4882a593Smuzhiyun #define __fs_in16(addr) in_be16(addr)
57*4882a593Smuzhiyun #define __fs_out8(addr, x) out_8(addr, x)
58*4882a593Smuzhiyun #define __fs_in8(addr) in_8(addr)
59*4882a593Smuzhiyun #endif
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* write, read, set bits, clear bits */
62*4882a593Smuzhiyun #define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v))
63*4882a593Smuzhiyun #define R32(_p, _m) __fs_in32(&(_p)->_m)
64*4882a593Smuzhiyun #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
65*4882a593Smuzhiyun #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v))
68*4882a593Smuzhiyun #define R16(_p, _m) __fs_in16(&(_p)->_m)
69*4882a593Smuzhiyun #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
70*4882a593Smuzhiyun #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun #define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v))
73*4882a593Smuzhiyun #define R8(_p, _m) __fs_in8(&(_p)->_m)
74*4882a593Smuzhiyun #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
75*4882a593Smuzhiyun #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun #define SCC_MAX_MULTICAST_ADDRS 64
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /*
80*4882a593Smuzhiyun * Delay to wait for SCC reset command to complete (in us)
81*4882a593Smuzhiyun */
82*4882a593Smuzhiyun #define SCC_RESET_DELAY 50
83*4882a593Smuzhiyun
scc_cr_cmd(struct fs_enet_private * fep,u32 op)84*4882a593Smuzhiyun static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun const struct fs_platform_info *fpi = fep->fpi;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return cpm_command(fpi->cp_command, op);
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
do_pd_setup(struct fs_enet_private * fep)91*4882a593Smuzhiyun static int do_pd_setup(struct fs_enet_private *fep)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun struct platform_device *ofdev = to_platform_device(fep->dev);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun fep->interrupt = irq_of_parse_and_map(ofdev->dev.of_node, 0);
96*4882a593Smuzhiyun if (!fep->interrupt)
97*4882a593Smuzhiyun return -EINVAL;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun fep->scc.sccp = of_iomap(ofdev->dev.of_node, 0);
100*4882a593Smuzhiyun if (!fep->scc.sccp)
101*4882a593Smuzhiyun return -EINVAL;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun fep->scc.ep = of_iomap(ofdev->dev.of_node, 1);
104*4882a593Smuzhiyun if (!fep->scc.ep) {
105*4882a593Smuzhiyun iounmap(fep->scc.sccp);
106*4882a593Smuzhiyun return -EINVAL;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun return 0;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun #define SCC_NAPI_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB | SCCE_ENET_TXB)
113*4882a593Smuzhiyun #define SCC_EVENT (SCCE_ENET_RXF | SCCE_ENET_TXB)
114*4882a593Smuzhiyun #define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY)
115*4882a593Smuzhiyun
setup_data(struct net_device * dev)116*4882a593Smuzhiyun static int setup_data(struct net_device *dev)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun do_pd_setup(fep);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun fep->scc.hthi = 0;
123*4882a593Smuzhiyun fep->scc.htlo = 0;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun fep->ev_napi = SCC_NAPI_EVENT_MSK;
126*4882a593Smuzhiyun fep->ev = SCC_EVENT | SCCE_ENET_TXE;
127*4882a593Smuzhiyun fep->ev_err = SCC_ERR_EVENT_MSK;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun return 0;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
allocate_bd(struct net_device * dev)132*4882a593Smuzhiyun static int allocate_bd(struct net_device *dev)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
135*4882a593Smuzhiyun const struct fs_platform_info *fpi = fep->fpi;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) *
138*4882a593Smuzhiyun sizeof(cbd_t), 8);
139*4882a593Smuzhiyun if (IS_ERR_VALUE(fep->ring_mem_addr))
140*4882a593Smuzhiyun return -ENOMEM;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun fep->ring_base = (void __iomem __force*)
143*4882a593Smuzhiyun cpm_dpram_addr(fep->ring_mem_addr);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun return 0;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
free_bd(struct net_device * dev)148*4882a593Smuzhiyun static void free_bd(struct net_device *dev)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun if (fep->ring_base)
153*4882a593Smuzhiyun cpm_dpfree(fep->ring_mem_addr);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
cleanup_data(struct net_device * dev)156*4882a593Smuzhiyun static void cleanup_data(struct net_device *dev)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun /* nothing */
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
set_promiscuous_mode(struct net_device * dev)161*4882a593Smuzhiyun static void set_promiscuous_mode(struct net_device *dev)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
164*4882a593Smuzhiyun scc_t __iomem *sccp = fep->scc.sccp;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun S16(sccp, scc_psmr, SCC_PSMR_PRO);
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
set_multicast_start(struct net_device * dev)169*4882a593Smuzhiyun static void set_multicast_start(struct net_device *dev)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
172*4882a593Smuzhiyun scc_enet_t __iomem *ep = fep->scc.ep;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun W16(ep, sen_gaddr1, 0);
175*4882a593Smuzhiyun W16(ep, sen_gaddr2, 0);
176*4882a593Smuzhiyun W16(ep, sen_gaddr3, 0);
177*4882a593Smuzhiyun W16(ep, sen_gaddr4, 0);
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
set_multicast_one(struct net_device * dev,const u8 * mac)180*4882a593Smuzhiyun static void set_multicast_one(struct net_device *dev, const u8 * mac)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
183*4882a593Smuzhiyun scc_enet_t __iomem *ep = fep->scc.ep;
184*4882a593Smuzhiyun u16 taddrh, taddrm, taddrl;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun taddrh = ((u16) mac[5] << 8) | mac[4];
187*4882a593Smuzhiyun taddrm = ((u16) mac[3] << 8) | mac[2];
188*4882a593Smuzhiyun taddrl = ((u16) mac[1] << 8) | mac[0];
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun W16(ep, sen_taddrh, taddrh);
191*4882a593Smuzhiyun W16(ep, sen_taddrm, taddrm);
192*4882a593Smuzhiyun W16(ep, sen_taddrl, taddrl);
193*4882a593Smuzhiyun scc_cr_cmd(fep, CPM_CR_SET_GADDR);
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
set_multicast_finish(struct net_device * dev)196*4882a593Smuzhiyun static void set_multicast_finish(struct net_device *dev)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
199*4882a593Smuzhiyun scc_t __iomem *sccp = fep->scc.sccp;
200*4882a593Smuzhiyun scc_enet_t __iomem *ep = fep->scc.ep;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun /* clear promiscuous always */
203*4882a593Smuzhiyun C16(sccp, scc_psmr, SCC_PSMR_PRO);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /* if all multi or too many multicasts; just enable all */
206*4882a593Smuzhiyun if ((dev->flags & IFF_ALLMULTI) != 0 ||
207*4882a593Smuzhiyun netdev_mc_count(dev) > SCC_MAX_MULTICAST_ADDRS) {
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun W16(ep, sen_gaddr1, 0xffff);
210*4882a593Smuzhiyun W16(ep, sen_gaddr2, 0xffff);
211*4882a593Smuzhiyun W16(ep, sen_gaddr3, 0xffff);
212*4882a593Smuzhiyun W16(ep, sen_gaddr4, 0xffff);
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
set_multicast_list(struct net_device * dev)216*4882a593Smuzhiyun static void set_multicast_list(struct net_device *dev)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun struct netdev_hw_addr *ha;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun if ((dev->flags & IFF_PROMISC) == 0) {
221*4882a593Smuzhiyun set_multicast_start(dev);
222*4882a593Smuzhiyun netdev_for_each_mc_addr(ha, dev)
223*4882a593Smuzhiyun set_multicast_one(dev, ha->addr);
224*4882a593Smuzhiyun set_multicast_finish(dev);
225*4882a593Smuzhiyun } else
226*4882a593Smuzhiyun set_promiscuous_mode(dev);
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun /*
230*4882a593Smuzhiyun * This function is called to start or restart the FEC during a link
231*4882a593Smuzhiyun * change. This only happens when switching between half and full
232*4882a593Smuzhiyun * duplex.
233*4882a593Smuzhiyun */
restart(struct net_device * dev)234*4882a593Smuzhiyun static void restart(struct net_device *dev)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
237*4882a593Smuzhiyun scc_t __iomem *sccp = fep->scc.sccp;
238*4882a593Smuzhiyun scc_enet_t __iomem *ep = fep->scc.ep;
239*4882a593Smuzhiyun const struct fs_platform_info *fpi = fep->fpi;
240*4882a593Smuzhiyun u16 paddrh, paddrm, paddrl;
241*4882a593Smuzhiyun const unsigned char *mac;
242*4882a593Smuzhiyun int i;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun /* clear everything (slow & steady does it) */
247*4882a593Smuzhiyun for (i = 0; i < sizeof(*ep); i++)
248*4882a593Smuzhiyun __fs_out8((u8 __iomem *)ep + i, 0);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun /* point to bds */
251*4882a593Smuzhiyun W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr);
252*4882a593Smuzhiyun W16(ep, sen_genscc.scc_tbase,
253*4882a593Smuzhiyun fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun /* Initialize function code registers for big-endian.
256*4882a593Smuzhiyun */
257*4882a593Smuzhiyun #ifndef CONFIG_NOT_COHERENT_CACHE
258*4882a593Smuzhiyun W8(ep, sen_genscc.scc_rfcr, SCC_EB | SCC_GBL);
259*4882a593Smuzhiyun W8(ep, sen_genscc.scc_tfcr, SCC_EB | SCC_GBL);
260*4882a593Smuzhiyun #else
261*4882a593Smuzhiyun W8(ep, sen_genscc.scc_rfcr, SCC_EB);
262*4882a593Smuzhiyun W8(ep, sen_genscc.scc_tfcr, SCC_EB);
263*4882a593Smuzhiyun #endif
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun /* Set maximum bytes per receive buffer.
266*4882a593Smuzhiyun * This appears to be an Ethernet frame size, not the buffer
267*4882a593Smuzhiyun * fragment size. It must be a multiple of four.
268*4882a593Smuzhiyun */
269*4882a593Smuzhiyun W16(ep, sen_genscc.scc_mrblr, 0x5f0);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun /* Set CRC preset and mask.
272*4882a593Smuzhiyun */
273*4882a593Smuzhiyun W32(ep, sen_cpres, 0xffffffff);
274*4882a593Smuzhiyun W32(ep, sen_cmask, 0xdebb20e3);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun W32(ep, sen_crcec, 0); /* CRC Error counter */
277*4882a593Smuzhiyun W32(ep, sen_alec, 0); /* alignment error counter */
278*4882a593Smuzhiyun W32(ep, sen_disfc, 0); /* discard frame counter */
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */
281*4882a593Smuzhiyun W16(ep, sen_retlim, 15); /* Retry limit threshold */
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */
288*4882a593Smuzhiyun W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun /* Clear hash tables.
291*4882a593Smuzhiyun */
292*4882a593Smuzhiyun W16(ep, sen_gaddr1, 0);
293*4882a593Smuzhiyun W16(ep, sen_gaddr2, 0);
294*4882a593Smuzhiyun W16(ep, sen_gaddr3, 0);
295*4882a593Smuzhiyun W16(ep, sen_gaddr4, 0);
296*4882a593Smuzhiyun W16(ep, sen_iaddr1, 0);
297*4882a593Smuzhiyun W16(ep, sen_iaddr2, 0);
298*4882a593Smuzhiyun W16(ep, sen_iaddr3, 0);
299*4882a593Smuzhiyun W16(ep, sen_iaddr4, 0);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun /* set address
302*4882a593Smuzhiyun */
303*4882a593Smuzhiyun mac = dev->dev_addr;
304*4882a593Smuzhiyun paddrh = ((u16) mac[5] << 8) | mac[4];
305*4882a593Smuzhiyun paddrm = ((u16) mac[3] << 8) | mac[2];
306*4882a593Smuzhiyun paddrl = ((u16) mac[1] << 8) | mac[0];
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun W16(ep, sen_paddrh, paddrh);
309*4882a593Smuzhiyun W16(ep, sen_paddrm, paddrm);
310*4882a593Smuzhiyun W16(ep, sen_paddrl, paddrl);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun W16(ep, sen_pper, 0);
313*4882a593Smuzhiyun W16(ep, sen_taddrl, 0);
314*4882a593Smuzhiyun W16(ep, sen_taddrm, 0);
315*4882a593Smuzhiyun W16(ep, sen_taddrh, 0);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun fs_init_bds(dev);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun scc_cr_cmd(fep, CPM_CR_INIT_TRX);
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun W16(sccp, scc_scce, 0xffff);
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun /* Enable interrupts we wish to service.
324*4882a593Smuzhiyun */
325*4882a593Smuzhiyun W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun /* Set GSMR_H to enable all normal operating modes.
328*4882a593Smuzhiyun * Set GSMR_L to enable Ethernet to MC68160.
329*4882a593Smuzhiyun */
330*4882a593Smuzhiyun W32(sccp, scc_gsmrh, 0);
331*4882a593Smuzhiyun W32(sccp, scc_gsmrl,
332*4882a593Smuzhiyun SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 |
333*4882a593Smuzhiyun SCC_GSMRL_MODE_ENET);
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun /* Set sync/delimiters.
336*4882a593Smuzhiyun */
337*4882a593Smuzhiyun W16(sccp, scc_dsr, 0xd555);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun /* Set processing mode. Use Ethernet CRC, catch broadcast, and
340*4882a593Smuzhiyun * start frame search 22 bit times after RENA.
341*4882a593Smuzhiyun */
342*4882a593Smuzhiyun W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun /* Set full duplex mode if needed */
345*4882a593Smuzhiyun if (dev->phydev->duplex)
346*4882a593Smuzhiyun S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE);
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun /* Restore multicast and promiscuous settings */
349*4882a593Smuzhiyun set_multicast_list(dev);
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
stop(struct net_device * dev)354*4882a593Smuzhiyun static void stop(struct net_device *dev)
355*4882a593Smuzhiyun {
356*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
357*4882a593Smuzhiyun scc_t __iomem *sccp = fep->scc.sccp;
358*4882a593Smuzhiyun int i;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++)
361*4882a593Smuzhiyun udelay(1);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun if (i == SCC_RESET_DELAY)
364*4882a593Smuzhiyun dev_warn(fep->dev, "SCC timeout on graceful transmit stop\n");
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun W16(sccp, scc_sccm, 0);
367*4882a593Smuzhiyun C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun fs_cleanup_bds(dev);
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun
napi_clear_event_fs(struct net_device * dev)372*4882a593Smuzhiyun static void napi_clear_event_fs(struct net_device *dev)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
375*4882a593Smuzhiyun scc_t __iomem *sccp = fep->scc.sccp;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun W16(sccp, scc_scce, SCC_NAPI_EVENT_MSK);
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun
napi_enable_fs(struct net_device * dev)380*4882a593Smuzhiyun static void napi_enable_fs(struct net_device *dev)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
383*4882a593Smuzhiyun scc_t __iomem *sccp = fep->scc.sccp;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun S16(sccp, scc_sccm, SCC_NAPI_EVENT_MSK);
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun
napi_disable_fs(struct net_device * dev)388*4882a593Smuzhiyun static void napi_disable_fs(struct net_device *dev)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
391*4882a593Smuzhiyun scc_t __iomem *sccp = fep->scc.sccp;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun C16(sccp, scc_sccm, SCC_NAPI_EVENT_MSK);
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
rx_bd_done(struct net_device * dev)396*4882a593Smuzhiyun static void rx_bd_done(struct net_device *dev)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun /* nothing */
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun
tx_kickstart(struct net_device * dev)401*4882a593Smuzhiyun static void tx_kickstart(struct net_device *dev)
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun /* nothing */
404*4882a593Smuzhiyun }
405*4882a593Smuzhiyun
get_int_events(struct net_device * dev)406*4882a593Smuzhiyun static u32 get_int_events(struct net_device *dev)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
409*4882a593Smuzhiyun scc_t __iomem *sccp = fep->scc.sccp;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun return (u32) R16(sccp, scc_scce);
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun
clear_int_events(struct net_device * dev,u32 int_events)414*4882a593Smuzhiyun static void clear_int_events(struct net_device *dev, u32 int_events)
415*4882a593Smuzhiyun {
416*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
417*4882a593Smuzhiyun scc_t __iomem *sccp = fep->scc.sccp;
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun W16(sccp, scc_scce, int_events & 0xffff);
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
ev_error(struct net_device * dev,u32 int_events)422*4882a593Smuzhiyun static void ev_error(struct net_device *dev, u32 int_events)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun dev_warn(fep->dev, "SCC ERROR(s) 0x%x\n", int_events);
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun
get_regs(struct net_device * dev,void * p,int * sizep)429*4882a593Smuzhiyun static int get_regs(struct net_device *dev, void *p, int *sizep)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t __iomem *))
434*4882a593Smuzhiyun return -EINVAL;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t));
437*4882a593Smuzhiyun p = (char *)p + sizeof(scc_t);
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t __iomem *));
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun return 0;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
get_regs_len(struct net_device * dev)444*4882a593Smuzhiyun static int get_regs_len(struct net_device *dev)
445*4882a593Smuzhiyun {
446*4882a593Smuzhiyun return sizeof(scc_t) + sizeof(scc_enet_t __iomem *);
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun
tx_restart(struct net_device * dev)449*4882a593Smuzhiyun static void tx_restart(struct net_device *dev)
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun struct fs_enet_private *fep = netdev_priv(dev);
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun scc_cr_cmd(fep, CPM_CR_RESTART_TX);
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun /*************************************************************************/
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun const struct fs_ops fs_scc_ops = {
461*4882a593Smuzhiyun .setup_data = setup_data,
462*4882a593Smuzhiyun .cleanup_data = cleanup_data,
463*4882a593Smuzhiyun .set_multicast_list = set_multicast_list,
464*4882a593Smuzhiyun .restart = restart,
465*4882a593Smuzhiyun .stop = stop,
466*4882a593Smuzhiyun .napi_clear_event = napi_clear_event_fs,
467*4882a593Smuzhiyun .napi_enable = napi_enable_fs,
468*4882a593Smuzhiyun .napi_disable = napi_disable_fs,
469*4882a593Smuzhiyun .rx_bd_done = rx_bd_done,
470*4882a593Smuzhiyun .tx_kickstart = tx_kickstart,
471*4882a593Smuzhiyun .get_int_events = get_int_events,
472*4882a593Smuzhiyun .clear_int_events = clear_int_events,
473*4882a593Smuzhiyun .ev_error = ev_error,
474*4882a593Smuzhiyun .get_regs = get_regs,
475*4882a593Smuzhiyun .get_regs_len = get_regs_len,
476*4882a593Smuzhiyun .tx_restart = tx_restart,
477*4882a593Smuzhiyun .allocate_bd = allocate_bd,
478*4882a593Smuzhiyun .free_bd = free_bd,
479*4882a593Smuzhiyun };
480