1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2013-2016 Freescale Semiconductor Inc. 4*4882a593Smuzhiyun * Copyright 2016-2018 NXP 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __FSL_DPRTC_H 8*4882a593Smuzhiyun #define __FSL_DPRTC_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* Data Path Real Time Counter API 11*4882a593Smuzhiyun * Contains initialization APIs and runtime control APIs for RTC 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun struct fsl_mc_io; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /** 17*4882a593Smuzhiyun * Number of irq's 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun #define DPRTC_MAX_IRQ_NUM 1 20*4882a593Smuzhiyun #define DPRTC_IRQ_INDEX 0 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define DPRTC_EVENT_PPS 0x08000000 23*4882a593Smuzhiyun #define DPRTC_EVENT_ETS1 0x00800000 24*4882a593Smuzhiyun #define DPRTC_EVENT_ETS2 0x00400000 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun int dprtc_open(struct fsl_mc_io *mc_io, 27*4882a593Smuzhiyun u32 cmd_flags, 28*4882a593Smuzhiyun int dprtc_id, 29*4882a593Smuzhiyun u16 *token); 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun int dprtc_close(struct fsl_mc_io *mc_io, 32*4882a593Smuzhiyun u32 cmd_flags, 33*4882a593Smuzhiyun u16 token); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun int dprtc_set_irq_enable(struct fsl_mc_io *mc_io, 36*4882a593Smuzhiyun u32 cmd_flags, 37*4882a593Smuzhiyun u16 token, 38*4882a593Smuzhiyun u8 irq_index, 39*4882a593Smuzhiyun u8 en); 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun int dprtc_get_irq_enable(struct fsl_mc_io *mc_io, 42*4882a593Smuzhiyun u32 cmd_flags, 43*4882a593Smuzhiyun u16 token, 44*4882a593Smuzhiyun u8 irq_index, 45*4882a593Smuzhiyun u8 *en); 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun int dprtc_set_irq_mask(struct fsl_mc_io *mc_io, 48*4882a593Smuzhiyun u32 cmd_flags, 49*4882a593Smuzhiyun u16 token, 50*4882a593Smuzhiyun u8 irq_index, 51*4882a593Smuzhiyun u32 mask); 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun int dprtc_get_irq_mask(struct fsl_mc_io *mc_io, 54*4882a593Smuzhiyun u32 cmd_flags, 55*4882a593Smuzhiyun u16 token, 56*4882a593Smuzhiyun u8 irq_index, 57*4882a593Smuzhiyun u32 *mask); 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun int dprtc_get_irq_status(struct fsl_mc_io *mc_io, 60*4882a593Smuzhiyun u32 cmd_flags, 61*4882a593Smuzhiyun u16 token, 62*4882a593Smuzhiyun u8 irq_index, 63*4882a593Smuzhiyun u32 *status); 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun int dprtc_clear_irq_status(struct fsl_mc_io *mc_io, 66*4882a593Smuzhiyun u32 cmd_flags, 67*4882a593Smuzhiyun u16 token, 68*4882a593Smuzhiyun u8 irq_index, 69*4882a593Smuzhiyun u32 status); 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #endif /* __FSL_DPRTC_H */ 72