xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/freescale/dpaa2/dpni-cmd.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2*4882a593Smuzhiyun /* Copyright 2013-2016 Freescale Semiconductor Inc.
3*4882a593Smuzhiyun  * Copyright 2016 NXP
4*4882a593Smuzhiyun  * Copyright 2020 NXP
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun #ifndef _FSL_DPNI_CMD_H
7*4882a593Smuzhiyun #define _FSL_DPNI_CMD_H
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include "dpni.h"
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun /* DPNI Version */
12*4882a593Smuzhiyun #define DPNI_VER_MAJOR				7
13*4882a593Smuzhiyun #define DPNI_VER_MINOR				0
14*4882a593Smuzhiyun #define DPNI_CMD_BASE_VERSION			1
15*4882a593Smuzhiyun #define DPNI_CMD_2ND_VERSION			2
16*4882a593Smuzhiyun #define DPNI_CMD_ID_OFFSET			4
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define DPNI_CMD(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
19*4882a593Smuzhiyun #define DPNI_CMD_V2(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_2ND_VERSION)
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define DPNI_CMDID_OPEN					DPNI_CMD(0x801)
22*4882a593Smuzhiyun #define DPNI_CMDID_CLOSE				DPNI_CMD(0x800)
23*4882a593Smuzhiyun #define DPNI_CMDID_CREATE				DPNI_CMD(0x901)
24*4882a593Smuzhiyun #define DPNI_CMDID_DESTROY				DPNI_CMD(0x900)
25*4882a593Smuzhiyun #define DPNI_CMDID_GET_API_VERSION			DPNI_CMD(0xa01)
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define DPNI_CMDID_ENABLE				DPNI_CMD(0x002)
28*4882a593Smuzhiyun #define DPNI_CMDID_DISABLE				DPNI_CMD(0x003)
29*4882a593Smuzhiyun #define DPNI_CMDID_GET_ATTR				DPNI_CMD(0x004)
30*4882a593Smuzhiyun #define DPNI_CMDID_RESET				DPNI_CMD(0x005)
31*4882a593Smuzhiyun #define DPNI_CMDID_IS_ENABLED				DPNI_CMD(0x006)
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define DPNI_CMDID_SET_IRQ				DPNI_CMD(0x010)
34*4882a593Smuzhiyun #define DPNI_CMDID_GET_IRQ				DPNI_CMD(0x011)
35*4882a593Smuzhiyun #define DPNI_CMDID_SET_IRQ_ENABLE			DPNI_CMD(0x012)
36*4882a593Smuzhiyun #define DPNI_CMDID_GET_IRQ_ENABLE			DPNI_CMD(0x013)
37*4882a593Smuzhiyun #define DPNI_CMDID_SET_IRQ_MASK				DPNI_CMD(0x014)
38*4882a593Smuzhiyun #define DPNI_CMDID_GET_IRQ_MASK				DPNI_CMD(0x015)
39*4882a593Smuzhiyun #define DPNI_CMDID_GET_IRQ_STATUS			DPNI_CMD(0x016)
40*4882a593Smuzhiyun #define DPNI_CMDID_CLEAR_IRQ_STATUS			DPNI_CMD(0x017)
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define DPNI_CMDID_SET_POOLS				DPNI_CMD(0x200)
43*4882a593Smuzhiyun #define DPNI_CMDID_SET_ERRORS_BEHAVIOR			DPNI_CMD(0x20B)
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define DPNI_CMDID_GET_QDID				DPNI_CMD(0x210)
46*4882a593Smuzhiyun #define DPNI_CMDID_GET_TX_DATA_OFFSET			DPNI_CMD(0x212)
47*4882a593Smuzhiyun #define DPNI_CMDID_GET_LINK_STATE			DPNI_CMD(0x215)
48*4882a593Smuzhiyun #define DPNI_CMDID_SET_MAX_FRAME_LENGTH			DPNI_CMD(0x216)
49*4882a593Smuzhiyun #define DPNI_CMDID_GET_MAX_FRAME_LENGTH			DPNI_CMD(0x217)
50*4882a593Smuzhiyun #define DPNI_CMDID_SET_LINK_CFG				DPNI_CMD(0x21A)
51*4882a593Smuzhiyun #define DPNI_CMDID_SET_TX_SHAPING			DPNI_CMD_V2(0x21B)
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define DPNI_CMDID_SET_MCAST_PROMISC			DPNI_CMD(0x220)
54*4882a593Smuzhiyun #define DPNI_CMDID_GET_MCAST_PROMISC			DPNI_CMD(0x221)
55*4882a593Smuzhiyun #define DPNI_CMDID_SET_UNICAST_PROMISC			DPNI_CMD(0x222)
56*4882a593Smuzhiyun #define DPNI_CMDID_GET_UNICAST_PROMISC			DPNI_CMD(0x223)
57*4882a593Smuzhiyun #define DPNI_CMDID_SET_PRIM_MAC				DPNI_CMD(0x224)
58*4882a593Smuzhiyun #define DPNI_CMDID_GET_PRIM_MAC				DPNI_CMD(0x225)
59*4882a593Smuzhiyun #define DPNI_CMDID_ADD_MAC_ADDR				DPNI_CMD(0x226)
60*4882a593Smuzhiyun #define DPNI_CMDID_REMOVE_MAC_ADDR			DPNI_CMD(0x227)
61*4882a593Smuzhiyun #define DPNI_CMDID_CLR_MAC_FILTERS			DPNI_CMD(0x228)
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #define DPNI_CMDID_SET_RX_TC_DIST			DPNI_CMD(0x235)
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #define DPNI_CMDID_SET_QOS_TBL				DPNI_CMD(0x240)
66*4882a593Smuzhiyun #define DPNI_CMDID_ADD_QOS_ENT				DPNI_CMD(0x241)
67*4882a593Smuzhiyun #define DPNI_CMDID_REMOVE_QOS_ENT			DPNI_CMD(0x242)
68*4882a593Smuzhiyun #define DPNI_CMDID_CLR_QOS_TBL				DPNI_CMD(0x243)
69*4882a593Smuzhiyun #define DPNI_CMDID_ADD_FS_ENT				DPNI_CMD(0x244)
70*4882a593Smuzhiyun #define DPNI_CMDID_REMOVE_FS_ENT			DPNI_CMD(0x245)
71*4882a593Smuzhiyun #define DPNI_CMDID_CLR_FS_ENT				DPNI_CMD(0x246)
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun #define DPNI_CMDID_GET_STATISTICS			DPNI_CMD(0x25D)
74*4882a593Smuzhiyun #define DPNI_CMDID_GET_QUEUE				DPNI_CMD(0x25F)
75*4882a593Smuzhiyun #define DPNI_CMDID_SET_QUEUE				DPNI_CMD(0x260)
76*4882a593Smuzhiyun #define DPNI_CMDID_GET_TAILDROP				DPNI_CMD(0x261)
77*4882a593Smuzhiyun #define DPNI_CMDID_SET_TAILDROP				DPNI_CMD(0x262)
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define DPNI_CMDID_GET_PORT_MAC_ADDR			DPNI_CMD(0x263)
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun #define DPNI_CMDID_GET_BUFFER_LAYOUT			DPNI_CMD(0x264)
82*4882a593Smuzhiyun #define DPNI_CMDID_SET_BUFFER_LAYOUT			DPNI_CMD(0x265)
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE		DPNI_CMD(0x266)
85*4882a593Smuzhiyun #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION		DPNI_CMD(0x267)
86*4882a593Smuzhiyun #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION		DPNI_CMD(0x268)
87*4882a593Smuzhiyun #define DPNI_CMDID_SET_EARLY_DROP			DPNI_CMD(0x269)
88*4882a593Smuzhiyun #define DPNI_CMDID_GET_EARLY_DROP			DPNI_CMD(0x26A)
89*4882a593Smuzhiyun #define DPNI_CMDID_GET_OFFLOAD				DPNI_CMD(0x26B)
90*4882a593Smuzhiyun #define DPNI_CMDID_SET_OFFLOAD				DPNI_CMD(0x26C)
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun #define DPNI_CMDID_SET_RX_FS_DIST			DPNI_CMD(0x273)
93*4882a593Smuzhiyun #define DPNI_CMDID_SET_RX_HASH_DIST			DPNI_CMD(0x274)
94*4882a593Smuzhiyun #define DPNI_CMDID_GET_LINK_CFG				DPNI_CMD(0x278)
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun #define DPNI_CMDID_SET_SINGLE_STEP_CFG			DPNI_CMD(0x279)
97*4882a593Smuzhiyun #define DPNI_CMDID_GET_SINGLE_STEP_CFG			DPNI_CMD(0x27a)
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun /* Macros for accessing command fields smaller than 1byte */
100*4882a593Smuzhiyun #define DPNI_MASK(field)	\
101*4882a593Smuzhiyun 	GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
102*4882a593Smuzhiyun 		DPNI_##field##_SHIFT)
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun #define dpni_set_field(var, field, val)	\
105*4882a593Smuzhiyun 	((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
106*4882a593Smuzhiyun #define dpni_get_field(var, field)	\
107*4882a593Smuzhiyun 	(((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun struct dpni_cmd_open {
110*4882a593Smuzhiyun 	__le32 dpni_id;
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun #define DPNI_BACKUP_POOL(val, order)	(((val) & 0x1) << (order))
114*4882a593Smuzhiyun struct dpni_cmd_set_pools {
115*4882a593Smuzhiyun 	/* cmd word 0 */
116*4882a593Smuzhiyun 	u8 num_dpbp;
117*4882a593Smuzhiyun 	u8 backup_pool_mask;
118*4882a593Smuzhiyun 	__le16 pad;
119*4882a593Smuzhiyun 	/* cmd word 0..4 */
120*4882a593Smuzhiyun 	__le32 dpbp_id[DPNI_MAX_DPBP];
121*4882a593Smuzhiyun 	/* cmd word 4..6 */
122*4882a593Smuzhiyun 	__le16 buffer_size[DPNI_MAX_DPBP];
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun /* The enable indication is always the least significant bit */
126*4882a593Smuzhiyun #define DPNI_ENABLE_SHIFT		0
127*4882a593Smuzhiyun #define DPNI_ENABLE_SIZE		1
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun struct dpni_rsp_is_enabled {
130*4882a593Smuzhiyun 	u8 enabled;
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun struct dpni_rsp_get_irq {
134*4882a593Smuzhiyun 	/* response word 0 */
135*4882a593Smuzhiyun 	__le32 irq_val;
136*4882a593Smuzhiyun 	__le32 pad;
137*4882a593Smuzhiyun 	/* response word 1 */
138*4882a593Smuzhiyun 	__le64 irq_addr;
139*4882a593Smuzhiyun 	/* response word 2 */
140*4882a593Smuzhiyun 	__le32 irq_num;
141*4882a593Smuzhiyun 	__le32 type;
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun struct dpni_cmd_set_irq_enable {
145*4882a593Smuzhiyun 	u8 enable;
146*4882a593Smuzhiyun 	u8 pad[3];
147*4882a593Smuzhiyun 	u8 irq_index;
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun struct dpni_cmd_get_irq_enable {
151*4882a593Smuzhiyun 	__le32 pad;
152*4882a593Smuzhiyun 	u8 irq_index;
153*4882a593Smuzhiyun };
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun struct dpni_rsp_get_irq_enable {
156*4882a593Smuzhiyun 	u8 enabled;
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun struct dpni_cmd_set_irq_mask {
160*4882a593Smuzhiyun 	__le32 mask;
161*4882a593Smuzhiyun 	u8 irq_index;
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun struct dpni_cmd_get_irq_mask {
165*4882a593Smuzhiyun 	__le32 pad;
166*4882a593Smuzhiyun 	u8 irq_index;
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun struct dpni_rsp_get_irq_mask {
170*4882a593Smuzhiyun 	__le32 mask;
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun struct dpni_cmd_get_irq_status {
174*4882a593Smuzhiyun 	__le32 status;
175*4882a593Smuzhiyun 	u8 irq_index;
176*4882a593Smuzhiyun };
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun struct dpni_rsp_get_irq_status {
179*4882a593Smuzhiyun 	__le32 status;
180*4882a593Smuzhiyun };
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun struct dpni_cmd_clear_irq_status {
183*4882a593Smuzhiyun 	__le32 status;
184*4882a593Smuzhiyun 	u8 irq_index;
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun struct dpni_rsp_get_attr {
188*4882a593Smuzhiyun 	/* response word 0 */
189*4882a593Smuzhiyun 	__le32 options;
190*4882a593Smuzhiyun 	u8 num_queues;
191*4882a593Smuzhiyun 	u8 num_tcs;
192*4882a593Smuzhiyun 	u8 mac_filter_entries;
193*4882a593Smuzhiyun 	u8 pad0;
194*4882a593Smuzhiyun 	/* response word 1 */
195*4882a593Smuzhiyun 	u8 vlan_filter_entries;
196*4882a593Smuzhiyun 	u8 pad1;
197*4882a593Smuzhiyun 	u8 qos_entries;
198*4882a593Smuzhiyun 	u8 pad2;
199*4882a593Smuzhiyun 	__le16 fs_entries;
200*4882a593Smuzhiyun 	__le16 pad3;
201*4882a593Smuzhiyun 	/* response word 2 */
202*4882a593Smuzhiyun 	u8 qos_key_size;
203*4882a593Smuzhiyun 	u8 fs_key_size;
204*4882a593Smuzhiyun 	__le16 wriop_version;
205*4882a593Smuzhiyun };
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun #define DPNI_ERROR_ACTION_SHIFT		0
208*4882a593Smuzhiyun #define DPNI_ERROR_ACTION_SIZE		4
209*4882a593Smuzhiyun #define DPNI_FRAME_ANN_SHIFT		4
210*4882a593Smuzhiyun #define DPNI_FRAME_ANN_SIZE		1
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun struct dpni_cmd_set_errors_behavior {
213*4882a593Smuzhiyun 	__le32 errors;
214*4882a593Smuzhiyun 	/* from least significant bit: error_action:4, set_frame_annotation:1 */
215*4882a593Smuzhiyun 	u8 flags;
216*4882a593Smuzhiyun };
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun /* There are 3 separate commands for configuring Rx, Tx and Tx confirmation
219*4882a593Smuzhiyun  * buffer layouts, but they all share the same parameters.
220*4882a593Smuzhiyun  * If one of the functions changes, below structure needs to be split.
221*4882a593Smuzhiyun  */
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun #define DPNI_PASS_TS_SHIFT		0
224*4882a593Smuzhiyun #define DPNI_PASS_TS_SIZE		1
225*4882a593Smuzhiyun #define DPNI_PASS_PR_SHIFT		1
226*4882a593Smuzhiyun #define DPNI_PASS_PR_SIZE		1
227*4882a593Smuzhiyun #define DPNI_PASS_FS_SHIFT		2
228*4882a593Smuzhiyun #define DPNI_PASS_FS_SIZE		1
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun struct dpni_cmd_get_buffer_layout {
231*4882a593Smuzhiyun 	u8 qtype;
232*4882a593Smuzhiyun };
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun struct dpni_rsp_get_buffer_layout {
235*4882a593Smuzhiyun 	/* response word 0 */
236*4882a593Smuzhiyun 	u8 pad0[6];
237*4882a593Smuzhiyun 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
238*4882a593Smuzhiyun 	u8 flags;
239*4882a593Smuzhiyun 	u8 pad1;
240*4882a593Smuzhiyun 	/* response word 1 */
241*4882a593Smuzhiyun 	__le16 private_data_size;
242*4882a593Smuzhiyun 	__le16 data_align;
243*4882a593Smuzhiyun 	__le16 head_room;
244*4882a593Smuzhiyun 	__le16 tail_room;
245*4882a593Smuzhiyun };
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun struct dpni_cmd_set_buffer_layout {
248*4882a593Smuzhiyun 	/* cmd word 0 */
249*4882a593Smuzhiyun 	u8 qtype;
250*4882a593Smuzhiyun 	u8 pad0[3];
251*4882a593Smuzhiyun 	__le16 options;
252*4882a593Smuzhiyun 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
253*4882a593Smuzhiyun 	u8 flags;
254*4882a593Smuzhiyun 	u8 pad1;
255*4882a593Smuzhiyun 	/* cmd word 1 */
256*4882a593Smuzhiyun 	__le16 private_data_size;
257*4882a593Smuzhiyun 	__le16 data_align;
258*4882a593Smuzhiyun 	__le16 head_room;
259*4882a593Smuzhiyun 	__le16 tail_room;
260*4882a593Smuzhiyun };
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun struct dpni_cmd_set_offload {
263*4882a593Smuzhiyun 	u8 pad[3];
264*4882a593Smuzhiyun 	u8 dpni_offload;
265*4882a593Smuzhiyun 	__le32 config;
266*4882a593Smuzhiyun };
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun struct dpni_cmd_get_offload {
269*4882a593Smuzhiyun 	u8 pad[3];
270*4882a593Smuzhiyun 	u8 dpni_offload;
271*4882a593Smuzhiyun };
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun struct dpni_rsp_get_offload {
274*4882a593Smuzhiyun 	__le32 pad;
275*4882a593Smuzhiyun 	__le32 config;
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun struct dpni_cmd_get_qdid {
279*4882a593Smuzhiyun 	u8 qtype;
280*4882a593Smuzhiyun };
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun struct dpni_rsp_get_qdid {
283*4882a593Smuzhiyun 	__le16 qdid;
284*4882a593Smuzhiyun };
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun struct dpni_rsp_get_tx_data_offset {
287*4882a593Smuzhiyun 	__le16 data_offset;
288*4882a593Smuzhiyun };
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun struct dpni_cmd_get_statistics {
291*4882a593Smuzhiyun 	u8 page_number;
292*4882a593Smuzhiyun };
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun struct dpni_rsp_get_statistics {
295*4882a593Smuzhiyun 	__le64 counter[DPNI_STATISTICS_CNT];
296*4882a593Smuzhiyun };
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun struct dpni_cmd_link_cfg {
299*4882a593Smuzhiyun 	/* cmd word 0 */
300*4882a593Smuzhiyun 	__le64 pad0;
301*4882a593Smuzhiyun 	/* cmd word 1 */
302*4882a593Smuzhiyun 	__le32 rate;
303*4882a593Smuzhiyun 	__le32 pad1;
304*4882a593Smuzhiyun 	/* cmd word 2 */
305*4882a593Smuzhiyun 	__le64 options;
306*4882a593Smuzhiyun };
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun #define DPNI_LINK_STATE_SHIFT		0
309*4882a593Smuzhiyun #define DPNI_LINK_STATE_SIZE		1
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun struct dpni_rsp_get_link_state {
312*4882a593Smuzhiyun 	/* response word 0 */
313*4882a593Smuzhiyun 	__le32 pad0;
314*4882a593Smuzhiyun 	/* from LSB: up:1 */
315*4882a593Smuzhiyun 	u8 flags;
316*4882a593Smuzhiyun 	u8 pad1[3];
317*4882a593Smuzhiyun 	/* response word 1 */
318*4882a593Smuzhiyun 	__le32 rate;
319*4882a593Smuzhiyun 	__le32 pad2;
320*4882a593Smuzhiyun 	/* response word 2 */
321*4882a593Smuzhiyun 	__le64 options;
322*4882a593Smuzhiyun };
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun struct dpni_cmd_set_max_frame_length {
325*4882a593Smuzhiyun 	__le16 max_frame_length;
326*4882a593Smuzhiyun };
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun struct dpni_rsp_get_max_frame_length {
329*4882a593Smuzhiyun 	__le16 max_frame_length;
330*4882a593Smuzhiyun };
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun struct dpni_cmd_set_multicast_promisc {
333*4882a593Smuzhiyun 	u8 enable;
334*4882a593Smuzhiyun };
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun struct dpni_rsp_get_multicast_promisc {
337*4882a593Smuzhiyun 	u8 enabled;
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun struct dpni_cmd_set_unicast_promisc {
341*4882a593Smuzhiyun 	u8 enable;
342*4882a593Smuzhiyun };
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun struct dpni_rsp_get_unicast_promisc {
345*4882a593Smuzhiyun 	u8 enabled;
346*4882a593Smuzhiyun };
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun struct dpni_cmd_set_primary_mac_addr {
349*4882a593Smuzhiyun 	__le16 pad;
350*4882a593Smuzhiyun 	u8 mac_addr[6];
351*4882a593Smuzhiyun };
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun struct dpni_rsp_get_primary_mac_addr {
354*4882a593Smuzhiyun 	__le16 pad;
355*4882a593Smuzhiyun 	u8 mac_addr[6];
356*4882a593Smuzhiyun };
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun struct dpni_rsp_get_port_mac_addr {
359*4882a593Smuzhiyun 	__le16 pad;
360*4882a593Smuzhiyun 	u8 mac_addr[6];
361*4882a593Smuzhiyun };
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun struct dpni_cmd_add_mac_addr {
364*4882a593Smuzhiyun 	__le16 pad;
365*4882a593Smuzhiyun 	u8 mac_addr[6];
366*4882a593Smuzhiyun };
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun struct dpni_cmd_remove_mac_addr {
369*4882a593Smuzhiyun 	__le16 pad;
370*4882a593Smuzhiyun 	u8 mac_addr[6];
371*4882a593Smuzhiyun };
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun #define DPNI_UNICAST_FILTERS_SHIFT	0
374*4882a593Smuzhiyun #define DPNI_UNICAST_FILTERS_SIZE	1
375*4882a593Smuzhiyun #define DPNI_MULTICAST_FILTERS_SHIFT	1
376*4882a593Smuzhiyun #define DPNI_MULTICAST_FILTERS_SIZE	1
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun struct dpni_cmd_clear_mac_filters {
379*4882a593Smuzhiyun 	/* from LSB: unicast:1, multicast:1 */
380*4882a593Smuzhiyun 	u8 flags;
381*4882a593Smuzhiyun };
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun #define DPNI_DIST_MODE_SHIFT		0
384*4882a593Smuzhiyun #define DPNI_DIST_MODE_SIZE		4
385*4882a593Smuzhiyun #define DPNI_MISS_ACTION_SHIFT		4
386*4882a593Smuzhiyun #define DPNI_MISS_ACTION_SIZE		4
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun struct dpni_cmd_set_rx_tc_dist {
389*4882a593Smuzhiyun 	/* cmd word 0 */
390*4882a593Smuzhiyun 	__le16 dist_size;
391*4882a593Smuzhiyun 	u8 tc_id;
392*4882a593Smuzhiyun 	/* from LSB: dist_mode:4, miss_action:4 */
393*4882a593Smuzhiyun 	u8 flags;
394*4882a593Smuzhiyun 	__le16 pad0;
395*4882a593Smuzhiyun 	__le16 default_flow_id;
396*4882a593Smuzhiyun 	/* cmd word 1..5 */
397*4882a593Smuzhiyun 	__le64 pad1[5];
398*4882a593Smuzhiyun 	/* cmd word 6 */
399*4882a593Smuzhiyun 	__le64 key_cfg_iova;
400*4882a593Smuzhiyun };
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun /* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at
403*4882a593Smuzhiyun  * key_cfg_iova)
404*4882a593Smuzhiyun  */
405*4882a593Smuzhiyun struct dpni_mask_cfg {
406*4882a593Smuzhiyun 	u8 mask;
407*4882a593Smuzhiyun 	u8 offset;
408*4882a593Smuzhiyun };
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun #define DPNI_EFH_TYPE_SHIFT		0
411*4882a593Smuzhiyun #define DPNI_EFH_TYPE_SIZE		4
412*4882a593Smuzhiyun #define DPNI_EXTRACT_TYPE_SHIFT		0
413*4882a593Smuzhiyun #define DPNI_EXTRACT_TYPE_SIZE		4
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun struct dpni_dist_extract {
416*4882a593Smuzhiyun 	/* word 0 */
417*4882a593Smuzhiyun 	u8 prot;
418*4882a593Smuzhiyun 	/* EFH type stored in the 4 least significant bits */
419*4882a593Smuzhiyun 	u8 efh_type;
420*4882a593Smuzhiyun 	u8 size;
421*4882a593Smuzhiyun 	u8 offset;
422*4882a593Smuzhiyun 	__le32 field;
423*4882a593Smuzhiyun 	/* word 1 */
424*4882a593Smuzhiyun 	u8 hdr_index;
425*4882a593Smuzhiyun 	u8 constant;
426*4882a593Smuzhiyun 	u8 num_of_repeats;
427*4882a593Smuzhiyun 	u8 num_of_byte_masks;
428*4882a593Smuzhiyun 	/* Extraction type is stored in the 4 LSBs */
429*4882a593Smuzhiyun 	u8 extract_type;
430*4882a593Smuzhiyun 	u8 pad[3];
431*4882a593Smuzhiyun 	/* word 2 */
432*4882a593Smuzhiyun 	struct dpni_mask_cfg masks[4];
433*4882a593Smuzhiyun };
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun struct dpni_ext_set_rx_tc_dist {
436*4882a593Smuzhiyun 	/* extension word 0 */
437*4882a593Smuzhiyun 	u8 num_extracts;
438*4882a593Smuzhiyun 	u8 pad[7];
439*4882a593Smuzhiyun 	/* words 1..25 */
440*4882a593Smuzhiyun 	struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
441*4882a593Smuzhiyun };
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun struct dpni_cmd_get_queue {
444*4882a593Smuzhiyun 	u8 qtype;
445*4882a593Smuzhiyun 	u8 tc;
446*4882a593Smuzhiyun 	u8 index;
447*4882a593Smuzhiyun };
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun #define DPNI_DEST_TYPE_SHIFT		0
450*4882a593Smuzhiyun #define DPNI_DEST_TYPE_SIZE		4
451*4882a593Smuzhiyun #define DPNI_STASH_CTRL_SHIFT		6
452*4882a593Smuzhiyun #define DPNI_STASH_CTRL_SIZE		1
453*4882a593Smuzhiyun #define DPNI_HOLD_ACTIVE_SHIFT		7
454*4882a593Smuzhiyun #define DPNI_HOLD_ACTIVE_SIZE		1
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun struct dpni_rsp_get_queue {
457*4882a593Smuzhiyun 	/* response word 0 */
458*4882a593Smuzhiyun 	__le64 pad0;
459*4882a593Smuzhiyun 	/* response word 1 */
460*4882a593Smuzhiyun 	__le32 dest_id;
461*4882a593Smuzhiyun 	__le16 pad1;
462*4882a593Smuzhiyun 	u8 dest_prio;
463*4882a593Smuzhiyun 	/* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */
464*4882a593Smuzhiyun 	u8 flags;
465*4882a593Smuzhiyun 	/* response word 2 */
466*4882a593Smuzhiyun 	__le64 flc;
467*4882a593Smuzhiyun 	/* response word 3 */
468*4882a593Smuzhiyun 	__le64 user_context;
469*4882a593Smuzhiyun 	/* response word 4 */
470*4882a593Smuzhiyun 	__le32 fqid;
471*4882a593Smuzhiyun 	__le16 qdbin;
472*4882a593Smuzhiyun };
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun struct dpni_cmd_set_queue {
475*4882a593Smuzhiyun 	/* cmd word 0 */
476*4882a593Smuzhiyun 	u8 qtype;
477*4882a593Smuzhiyun 	u8 tc;
478*4882a593Smuzhiyun 	u8 index;
479*4882a593Smuzhiyun 	u8 options;
480*4882a593Smuzhiyun 	__le32 pad0;
481*4882a593Smuzhiyun 	/* cmd word 1 */
482*4882a593Smuzhiyun 	__le32 dest_id;
483*4882a593Smuzhiyun 	__le16 pad1;
484*4882a593Smuzhiyun 	u8 dest_prio;
485*4882a593Smuzhiyun 	u8 flags;
486*4882a593Smuzhiyun 	/* cmd word 2 */
487*4882a593Smuzhiyun 	__le64 flc;
488*4882a593Smuzhiyun 	/* cmd word 3 */
489*4882a593Smuzhiyun 	__le64 user_context;
490*4882a593Smuzhiyun };
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun struct dpni_cmd_set_taildrop {
493*4882a593Smuzhiyun 	/* cmd word 0 */
494*4882a593Smuzhiyun 	u8 congestion_point;
495*4882a593Smuzhiyun 	u8 qtype;
496*4882a593Smuzhiyun 	u8 tc;
497*4882a593Smuzhiyun 	u8 index;
498*4882a593Smuzhiyun 	__le32 pad0;
499*4882a593Smuzhiyun 	/* cmd word 1 */
500*4882a593Smuzhiyun 	/* Only least significant bit is relevant */
501*4882a593Smuzhiyun 	u8 enable;
502*4882a593Smuzhiyun 	u8 pad1;
503*4882a593Smuzhiyun 	u8 units;
504*4882a593Smuzhiyun 	u8 pad2;
505*4882a593Smuzhiyun 	__le32 threshold;
506*4882a593Smuzhiyun };
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun struct dpni_cmd_get_taildrop {
509*4882a593Smuzhiyun 	u8 congestion_point;
510*4882a593Smuzhiyun 	u8 qtype;
511*4882a593Smuzhiyun 	u8 tc;
512*4882a593Smuzhiyun 	u8 index;
513*4882a593Smuzhiyun };
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun struct dpni_rsp_get_taildrop {
516*4882a593Smuzhiyun 	/* cmd word 0 */
517*4882a593Smuzhiyun 	__le64 pad0;
518*4882a593Smuzhiyun 	/* cmd word 1 */
519*4882a593Smuzhiyun 	/* only least significant bit is relevant */
520*4882a593Smuzhiyun 	u8 enable;
521*4882a593Smuzhiyun 	u8 pad1;
522*4882a593Smuzhiyun 	u8 units;
523*4882a593Smuzhiyun 	u8 pad2;
524*4882a593Smuzhiyun 	__le32 threshold;
525*4882a593Smuzhiyun };
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun struct dpni_rsp_get_api_version {
528*4882a593Smuzhiyun 	__le16 major;
529*4882a593Smuzhiyun 	__le16 minor;
530*4882a593Smuzhiyun };
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun #define DPNI_RX_FS_DIST_ENABLE_SHIFT	0
533*4882a593Smuzhiyun #define DPNI_RX_FS_DIST_ENABLE_SIZE	1
534*4882a593Smuzhiyun struct dpni_cmd_set_rx_fs_dist {
535*4882a593Smuzhiyun 	__le16 dist_size;
536*4882a593Smuzhiyun 	u8 enable;
537*4882a593Smuzhiyun 	u8 tc;
538*4882a593Smuzhiyun 	__le16 miss_flow_id;
539*4882a593Smuzhiyun 	__le16 pad;
540*4882a593Smuzhiyun 	__le64 key_cfg_iova;
541*4882a593Smuzhiyun };
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun #define DPNI_RX_HASH_DIST_ENABLE_SHIFT	0
544*4882a593Smuzhiyun #define DPNI_RX_HASH_DIST_ENABLE_SIZE	1
545*4882a593Smuzhiyun struct dpni_cmd_set_rx_hash_dist {
546*4882a593Smuzhiyun 	__le16 dist_size;
547*4882a593Smuzhiyun 	u8 enable;
548*4882a593Smuzhiyun 	u8 tc;
549*4882a593Smuzhiyun 	__le32 pad;
550*4882a593Smuzhiyun 	__le64 key_cfg_iova;
551*4882a593Smuzhiyun };
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun struct dpni_cmd_add_fs_entry {
554*4882a593Smuzhiyun 	/* cmd word 0 */
555*4882a593Smuzhiyun 	__le16 options;
556*4882a593Smuzhiyun 	u8 tc_id;
557*4882a593Smuzhiyun 	u8 key_size;
558*4882a593Smuzhiyun 	__le16 index;
559*4882a593Smuzhiyun 	__le16 flow_id;
560*4882a593Smuzhiyun 	/* cmd word 1 */
561*4882a593Smuzhiyun 	__le64 key_iova;
562*4882a593Smuzhiyun 	/* cmd word 2 */
563*4882a593Smuzhiyun 	__le64 mask_iova;
564*4882a593Smuzhiyun 	/* cmd word 3 */
565*4882a593Smuzhiyun 	__le64 flc;
566*4882a593Smuzhiyun };
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun struct dpni_cmd_remove_fs_entry {
569*4882a593Smuzhiyun 	/* cmd word 0 */
570*4882a593Smuzhiyun 	__le16 pad0;
571*4882a593Smuzhiyun 	u8 tc_id;
572*4882a593Smuzhiyun 	u8 key_size;
573*4882a593Smuzhiyun 	__le32 pad1;
574*4882a593Smuzhiyun 	/* cmd word 1 */
575*4882a593Smuzhiyun 	__le64 key_iova;
576*4882a593Smuzhiyun 	/* cmd word 2 */
577*4882a593Smuzhiyun 	__le64 mask_iova;
578*4882a593Smuzhiyun };
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun #define DPNI_DISCARD_ON_MISS_SHIFT	0
581*4882a593Smuzhiyun #define DPNI_DISCARD_ON_MISS_SIZE	1
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun struct dpni_cmd_set_qos_table {
584*4882a593Smuzhiyun 	__le32 pad;
585*4882a593Smuzhiyun 	u8 default_tc;
586*4882a593Smuzhiyun 	/* only the LSB */
587*4882a593Smuzhiyun 	u8 discard_on_miss;
588*4882a593Smuzhiyun 	__le16 pad1[21];
589*4882a593Smuzhiyun 	__le64 key_cfg_iova;
590*4882a593Smuzhiyun };
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun struct dpni_cmd_add_qos_entry {
593*4882a593Smuzhiyun 	__le16 pad;
594*4882a593Smuzhiyun 	u8 tc_id;
595*4882a593Smuzhiyun 	u8 key_size;
596*4882a593Smuzhiyun 	__le16 index;
597*4882a593Smuzhiyun 	__le16 pad1;
598*4882a593Smuzhiyun 	__le64 key_iova;
599*4882a593Smuzhiyun 	__le64 mask_iova;
600*4882a593Smuzhiyun };
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun struct dpni_cmd_remove_qos_entry {
603*4882a593Smuzhiyun 	u8 pad[3];
604*4882a593Smuzhiyun 	u8 key_size;
605*4882a593Smuzhiyun 	__le32 pad1;
606*4882a593Smuzhiyun 	__le64 key_iova;
607*4882a593Smuzhiyun 	__le64 mask_iova;
608*4882a593Smuzhiyun };
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun #define DPNI_DEST_TYPE_SHIFT		0
611*4882a593Smuzhiyun #define DPNI_DEST_TYPE_SIZE		4
612*4882a593Smuzhiyun #define DPNI_CONG_UNITS_SHIFT		4
613*4882a593Smuzhiyun #define DPNI_CONG_UNITS_SIZE		2
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun struct dpni_cmd_set_congestion_notification {
616*4882a593Smuzhiyun 	/* cmd word 0 */
617*4882a593Smuzhiyun 	u8 qtype;
618*4882a593Smuzhiyun 	u8 tc;
619*4882a593Smuzhiyun 	u8 pad[6];
620*4882a593Smuzhiyun 	/* cmd word 1 */
621*4882a593Smuzhiyun 	__le32 dest_id;
622*4882a593Smuzhiyun 	__le16 notification_mode;
623*4882a593Smuzhiyun 	u8 dest_priority;
624*4882a593Smuzhiyun 	/* from LSB: dest_type: 4 units:2 */
625*4882a593Smuzhiyun 	u8 type_units;
626*4882a593Smuzhiyun 	/* cmd word 2 */
627*4882a593Smuzhiyun 	__le64 message_iova;
628*4882a593Smuzhiyun 	/* cmd word 3 */
629*4882a593Smuzhiyun 	__le64 message_ctx;
630*4882a593Smuzhiyun 	/* cmd word 4 */
631*4882a593Smuzhiyun 	__le32 threshold_entry;
632*4882a593Smuzhiyun 	__le32 threshold_exit;
633*4882a593Smuzhiyun };
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun #define DPNI_COUPLED_SHIFT	0
636*4882a593Smuzhiyun #define DPNI_COUPLED_SIZE	1
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun struct dpni_cmd_set_tx_shaping {
639*4882a593Smuzhiyun 	__le16 tx_cr_max_burst_size;
640*4882a593Smuzhiyun 	__le16 tx_er_max_burst_size;
641*4882a593Smuzhiyun 	__le32 pad;
642*4882a593Smuzhiyun 	__le32 tx_cr_rate_limit;
643*4882a593Smuzhiyun 	__le32 tx_er_rate_limit;
644*4882a593Smuzhiyun 	/* from LSB: coupled:1 */
645*4882a593Smuzhiyun 	u8 coupled;
646*4882a593Smuzhiyun };
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun #define DPNI_PTP_ENABLE_SHIFT			0
649*4882a593Smuzhiyun #define DPNI_PTP_ENABLE_SIZE			1
650*4882a593Smuzhiyun #define DPNI_PTP_CH_UPDATE_SHIFT		1
651*4882a593Smuzhiyun #define DPNI_PTP_CH_UPDATE_SIZE			1
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun struct dpni_cmd_single_step_cfg {
654*4882a593Smuzhiyun 	__le16 flags;
655*4882a593Smuzhiyun 	__le16 offset;
656*4882a593Smuzhiyun 	__le32 peer_delay;
657*4882a593Smuzhiyun };
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun struct dpni_rsp_single_step_cfg {
660*4882a593Smuzhiyun 	__le16 flags;
661*4882a593Smuzhiyun 	__le16 offset;
662*4882a593Smuzhiyun 	__le32 peer_delay;
663*4882a593Smuzhiyun };
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun #endif /* _FSL_DPNI_CMD_H */
666