xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/dec/tulip/de2104x.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* de2104x.c: A Linux PCI Ethernet driver for Intel/Digital 21040/1 chips. */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun 	Copyright 2001,2003 Jeff Garzik <jgarzik@pobox.com>
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun 	Copyright 1994, 1995 Digital Equipment Corporation.	    [de4x5.c]
6*4882a593Smuzhiyun 	Written/copyright 1994-2001 by Donald Becker.		    [tulip.c]
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun 	This software may be used and distributed according to the terms of
9*4882a593Smuzhiyun 	the GNU General Public License (GPL), incorporated herein by reference.
10*4882a593Smuzhiyun 	Drivers based on or derived from this code fall under the GPL and must
11*4882a593Smuzhiyun 	retain the authorship, copyright and license notice.  This file is not
12*4882a593Smuzhiyun 	a complete program and may only be used when the entire operating
13*4882a593Smuzhiyun 	system is licensed under the GPL.
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun 	See the file COPYING in this distribution for more information.
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun 	TODO, in rough priority order:
18*4882a593Smuzhiyun 	* Support forcing media type with a module parameter,
19*4882a593Smuzhiyun 	  like dl2k.c/sundance.c
20*4882a593Smuzhiyun 	* Constants (module parms?) for Rx work limit
21*4882a593Smuzhiyun 	* Complete reset on PciErr
22*4882a593Smuzhiyun 	* Jumbo frames / dev->change_mtu
23*4882a593Smuzhiyun 	* Adjust Rx FIFO threshold and Max Rx DMA burst on Rx FIFO error
24*4882a593Smuzhiyun 	* Adjust Tx FIFO threshold and Max Tx DMA burst on Tx FIFO error
25*4882a593Smuzhiyun 	* Implement Tx software interrupt mitigation via
26*4882a593Smuzhiyun 	  Tx descriptor bit
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun  */
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define DRV_NAME		"de2104x"
33*4882a593Smuzhiyun #define DRV_RELDATE		"Mar 17, 2004"
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #include <linux/module.h>
36*4882a593Smuzhiyun #include <linux/kernel.h>
37*4882a593Smuzhiyun #include <linux/netdevice.h>
38*4882a593Smuzhiyun #include <linux/etherdevice.h>
39*4882a593Smuzhiyun #include <linux/init.h>
40*4882a593Smuzhiyun #include <linux/interrupt.h>
41*4882a593Smuzhiyun #include <linux/pci.h>
42*4882a593Smuzhiyun #include <linux/delay.h>
43*4882a593Smuzhiyun #include <linux/ethtool.h>
44*4882a593Smuzhiyun #include <linux/compiler.h>
45*4882a593Smuzhiyun #include <linux/rtnetlink.h>
46*4882a593Smuzhiyun #include <linux/crc32.h>
47*4882a593Smuzhiyun #include <linux/slab.h>
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #include <asm/io.h>
50*4882a593Smuzhiyun #include <asm/irq.h>
51*4882a593Smuzhiyun #include <linux/uaccess.h>
52*4882a593Smuzhiyun #include <asm/unaligned.h>
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun MODULE_AUTHOR("Jeff Garzik <jgarzik@pobox.com>");
55*4882a593Smuzhiyun MODULE_DESCRIPTION("Intel/Digital 21040/1 series PCI Ethernet driver");
56*4882a593Smuzhiyun MODULE_LICENSE("GPL");
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun static int debug = -1;
59*4882a593Smuzhiyun module_param (debug, int, 0);
60*4882a593Smuzhiyun MODULE_PARM_DESC (debug, "de2104x bitmapped message enable number");
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
63*4882a593Smuzhiyun #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) || \
64*4882a593Smuzhiyun         defined(CONFIG_SPARC) || defined(__ia64__) ||		   \
65*4882a593Smuzhiyun         defined(__sh__) || defined(__mips__)
66*4882a593Smuzhiyun static int rx_copybreak = 1518;
67*4882a593Smuzhiyun #else
68*4882a593Smuzhiyun static int rx_copybreak = 100;
69*4882a593Smuzhiyun #endif
70*4882a593Smuzhiyun module_param (rx_copybreak, int, 0);
71*4882a593Smuzhiyun MODULE_PARM_DESC (rx_copybreak, "de2104x Breakpoint at which Rx packets are copied");
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun #define DE_DEF_MSG_ENABLE	(NETIF_MSG_DRV		| \
74*4882a593Smuzhiyun 				 NETIF_MSG_PROBE 	| \
75*4882a593Smuzhiyun 				 NETIF_MSG_LINK		| \
76*4882a593Smuzhiyun 				 NETIF_MSG_IFDOWN	| \
77*4882a593Smuzhiyun 				 NETIF_MSG_IFUP		| \
78*4882a593Smuzhiyun 				 NETIF_MSG_RX_ERR	| \
79*4882a593Smuzhiyun 				 NETIF_MSG_TX_ERR)
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun /* Descriptor skip length in 32 bit longwords. */
82*4882a593Smuzhiyun #ifndef CONFIG_DE2104X_DSL
83*4882a593Smuzhiyun #define DSL			0
84*4882a593Smuzhiyun #else
85*4882a593Smuzhiyun #define DSL			CONFIG_DE2104X_DSL
86*4882a593Smuzhiyun #endif
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #define DE_RX_RING_SIZE		128
89*4882a593Smuzhiyun #define DE_TX_RING_SIZE		64
90*4882a593Smuzhiyun #define DE_RING_BYTES		\
91*4882a593Smuzhiyun 		((sizeof(struct de_desc) * DE_RX_RING_SIZE) +	\
92*4882a593Smuzhiyun 		(sizeof(struct de_desc) * DE_TX_RING_SIZE))
93*4882a593Smuzhiyun #define NEXT_TX(N)		(((N) + 1) & (DE_TX_RING_SIZE - 1))
94*4882a593Smuzhiyun #define NEXT_RX(N)		(((N) + 1) & (DE_RX_RING_SIZE - 1))
95*4882a593Smuzhiyun #define TX_BUFFS_AVAIL(CP)					\
96*4882a593Smuzhiyun 	(((CP)->tx_tail <= (CP)->tx_head) ?			\
97*4882a593Smuzhiyun 	  (CP)->tx_tail + (DE_TX_RING_SIZE - 1) - (CP)->tx_head :	\
98*4882a593Smuzhiyun 	  (CP)->tx_tail - (CP)->tx_head - 1)
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun #define PKT_BUF_SZ		1536	/* Size of each temporary Rx buffer.*/
101*4882a593Smuzhiyun #define RX_OFFSET		2
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun #define DE_SETUP_SKB		((struct sk_buff *) 1)
104*4882a593Smuzhiyun #define DE_DUMMY_SKB		((struct sk_buff *) 2)
105*4882a593Smuzhiyun #define DE_SETUP_FRAME_WORDS	96
106*4882a593Smuzhiyun #define DE_EEPROM_WORDS		256
107*4882a593Smuzhiyun #define DE_EEPROM_SIZE		(DE_EEPROM_WORDS * sizeof(u16))
108*4882a593Smuzhiyun #define DE_MAX_MEDIA		5
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun #define DE_MEDIA_TP_AUTO	0
111*4882a593Smuzhiyun #define DE_MEDIA_BNC		1
112*4882a593Smuzhiyun #define DE_MEDIA_AUI		2
113*4882a593Smuzhiyun #define DE_MEDIA_TP		3
114*4882a593Smuzhiyun #define DE_MEDIA_TP_FD		4
115*4882a593Smuzhiyun #define DE_MEDIA_INVALID	DE_MAX_MEDIA
116*4882a593Smuzhiyun #define DE_MEDIA_FIRST		0
117*4882a593Smuzhiyun #define DE_MEDIA_LAST		(DE_MAX_MEDIA - 1)
118*4882a593Smuzhiyun #define DE_AUI_BNC		(SUPPORTED_AUI | SUPPORTED_BNC)
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun #define DE_TIMER_LINK		(60 * HZ)
121*4882a593Smuzhiyun #define DE_TIMER_NO_LINK	(5 * HZ)
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun #define DE_NUM_REGS		16
124*4882a593Smuzhiyun #define DE_REGS_SIZE		(DE_NUM_REGS * sizeof(u32))
125*4882a593Smuzhiyun #define DE_REGS_VER		1
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun /* Time in jiffies before concluding the transmitter is hung. */
128*4882a593Smuzhiyun #define TX_TIMEOUT		(6*HZ)
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /* This is a mysterious value that can be written to CSR11 in the 21040 (only)
131*4882a593Smuzhiyun    to support a pre-NWay full-duplex signaling mechanism using short frames.
132*4882a593Smuzhiyun    No one knows what it should be, but if left at its default value some
133*4882a593Smuzhiyun    10base2(!) packets trigger a full-duplex-request interrupt. */
134*4882a593Smuzhiyun #define FULL_DUPLEX_MAGIC	0x6969
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun enum {
137*4882a593Smuzhiyun 	/* NIC registers */
138*4882a593Smuzhiyun 	BusMode			= 0x00,
139*4882a593Smuzhiyun 	TxPoll			= 0x08,
140*4882a593Smuzhiyun 	RxPoll			= 0x10,
141*4882a593Smuzhiyun 	RxRingAddr		= 0x18,
142*4882a593Smuzhiyun 	TxRingAddr		= 0x20,
143*4882a593Smuzhiyun 	MacStatus		= 0x28,
144*4882a593Smuzhiyun 	MacMode			= 0x30,
145*4882a593Smuzhiyun 	IntrMask		= 0x38,
146*4882a593Smuzhiyun 	RxMissed		= 0x40,
147*4882a593Smuzhiyun 	ROMCmd			= 0x48,
148*4882a593Smuzhiyun 	CSR11			= 0x58,
149*4882a593Smuzhiyun 	SIAStatus		= 0x60,
150*4882a593Smuzhiyun 	CSR13			= 0x68,
151*4882a593Smuzhiyun 	CSR14			= 0x70,
152*4882a593Smuzhiyun 	CSR15			= 0x78,
153*4882a593Smuzhiyun 	PCIPM			= 0x40,
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	/* BusMode bits */
156*4882a593Smuzhiyun 	CmdReset		= (1 << 0),
157*4882a593Smuzhiyun 	CacheAlign16		= 0x00008000,
158*4882a593Smuzhiyun 	BurstLen4		= 0x00000400,
159*4882a593Smuzhiyun 	DescSkipLen		= (DSL << 2),
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	/* Rx/TxPoll bits */
162*4882a593Smuzhiyun 	NormalTxPoll		= (1 << 0),
163*4882a593Smuzhiyun 	NormalRxPoll		= (1 << 0),
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	/* Tx/Rx descriptor status bits */
166*4882a593Smuzhiyun 	DescOwn			= (1 << 31),
167*4882a593Smuzhiyun 	RxError			= (1 << 15),
168*4882a593Smuzhiyun 	RxErrLong		= (1 << 7),
169*4882a593Smuzhiyun 	RxErrCRC		= (1 << 1),
170*4882a593Smuzhiyun 	RxErrFIFO		= (1 << 0),
171*4882a593Smuzhiyun 	RxErrRunt		= (1 << 11),
172*4882a593Smuzhiyun 	RxErrFrame		= (1 << 14),
173*4882a593Smuzhiyun 	RingEnd			= (1 << 25),
174*4882a593Smuzhiyun 	FirstFrag		= (1 << 29),
175*4882a593Smuzhiyun 	LastFrag		= (1 << 30),
176*4882a593Smuzhiyun 	TxError			= (1 << 15),
177*4882a593Smuzhiyun 	TxFIFOUnder		= (1 << 1),
178*4882a593Smuzhiyun 	TxLinkFail		= (1 << 2) | (1 << 10) | (1 << 11),
179*4882a593Smuzhiyun 	TxMaxCol		= (1 << 8),
180*4882a593Smuzhiyun 	TxOWC			= (1 << 9),
181*4882a593Smuzhiyun 	TxJabber		= (1 << 14),
182*4882a593Smuzhiyun 	SetupFrame		= (1 << 27),
183*4882a593Smuzhiyun 	TxSwInt			= (1 << 31),
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	/* MacStatus bits */
186*4882a593Smuzhiyun 	IntrOK			= (1 << 16),
187*4882a593Smuzhiyun 	IntrErr			= (1 << 15),
188*4882a593Smuzhiyun 	RxIntr			= (1 << 6),
189*4882a593Smuzhiyun 	RxEmpty			= (1 << 7),
190*4882a593Smuzhiyun 	TxIntr			= (1 << 0),
191*4882a593Smuzhiyun 	TxEmpty			= (1 << 2),
192*4882a593Smuzhiyun 	PciErr			= (1 << 13),
193*4882a593Smuzhiyun 	TxState			= (1 << 22) | (1 << 21) | (1 << 20),
194*4882a593Smuzhiyun 	RxState			= (1 << 19) | (1 << 18) | (1 << 17),
195*4882a593Smuzhiyun 	LinkFail		= (1 << 12),
196*4882a593Smuzhiyun 	LinkPass		= (1 << 4),
197*4882a593Smuzhiyun 	RxStopped		= (1 << 8),
198*4882a593Smuzhiyun 	TxStopped		= (1 << 1),
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	/* MacMode bits */
201*4882a593Smuzhiyun 	TxEnable		= (1 << 13),
202*4882a593Smuzhiyun 	RxEnable		= (1 << 1),
203*4882a593Smuzhiyun 	RxTx			= TxEnable | RxEnable,
204*4882a593Smuzhiyun 	FullDuplex		= (1 << 9),
205*4882a593Smuzhiyun 	AcceptAllMulticast	= (1 << 7),
206*4882a593Smuzhiyun 	AcceptAllPhys		= (1 << 6),
207*4882a593Smuzhiyun 	BOCnt			= (1 << 5),
208*4882a593Smuzhiyun 	MacModeClear		= (1<<12) | (1<<11) | (1<<10) | (1<<8) | (1<<3) |
209*4882a593Smuzhiyun 				  RxTx | BOCnt | AcceptAllPhys | AcceptAllMulticast,
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	/* ROMCmd bits */
212*4882a593Smuzhiyun 	EE_SHIFT_CLK		= 0x02,	/* EEPROM shift clock. */
213*4882a593Smuzhiyun 	EE_CS			= 0x01,	/* EEPROM chip select. */
214*4882a593Smuzhiyun 	EE_DATA_WRITE		= 0x04,	/* Data from the Tulip to EEPROM. */
215*4882a593Smuzhiyun 	EE_WRITE_0		= 0x01,
216*4882a593Smuzhiyun 	EE_WRITE_1		= 0x05,
217*4882a593Smuzhiyun 	EE_DATA_READ		= 0x08,	/* Data from the EEPROM chip. */
218*4882a593Smuzhiyun 	EE_ENB			= (0x4800 | EE_CS),
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	/* The EEPROM commands include the alway-set leading bit. */
221*4882a593Smuzhiyun 	EE_READ_CMD		= 6,
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	/* RxMissed bits */
224*4882a593Smuzhiyun 	RxMissedOver		= (1 << 16),
225*4882a593Smuzhiyun 	RxMissedMask		= 0xffff,
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	/* SROM-related bits */
228*4882a593Smuzhiyun 	SROMC0InfoLeaf		= 27,
229*4882a593Smuzhiyun 	MediaBlockMask		= 0x3f,
230*4882a593Smuzhiyun 	MediaCustomCSRs		= (1 << 6),
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	/* PCIPM bits */
233*4882a593Smuzhiyun 	PM_Sleep		= (1 << 31),
234*4882a593Smuzhiyun 	PM_Snooze		= (1 << 30),
235*4882a593Smuzhiyun 	PM_Mask			= PM_Sleep | PM_Snooze,
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	/* SIAStatus bits */
238*4882a593Smuzhiyun 	NWayState		= (1 << 14) | (1 << 13) | (1 << 12),
239*4882a593Smuzhiyun 	NWayRestart		= (1 << 12),
240*4882a593Smuzhiyun 	NonselPortActive	= (1 << 9),
241*4882a593Smuzhiyun 	SelPortActive		= (1 << 8),
242*4882a593Smuzhiyun 	LinkFailStatus		= (1 << 2),
243*4882a593Smuzhiyun 	NetCxnErr		= (1 << 1),
244*4882a593Smuzhiyun };
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun static const u32 de_intr_mask =
247*4882a593Smuzhiyun 	IntrOK | IntrErr | RxIntr | RxEmpty | TxIntr | TxEmpty |
248*4882a593Smuzhiyun 	LinkPass | LinkFail | PciErr;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun /*
251*4882a593Smuzhiyun  * Set the programmable burst length to 4 longwords for all:
252*4882a593Smuzhiyun  * DMA errors result without these values. Cache align 16 long.
253*4882a593Smuzhiyun  */
254*4882a593Smuzhiyun static const u32 de_bus_mode = CacheAlign16 | BurstLen4 | DescSkipLen;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun struct de_srom_media_block {
257*4882a593Smuzhiyun 	u8			opts;
258*4882a593Smuzhiyun 	u16			csr13;
259*4882a593Smuzhiyun 	u16			csr14;
260*4882a593Smuzhiyun 	u16			csr15;
261*4882a593Smuzhiyun } __packed;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun struct de_srom_info_leaf {
264*4882a593Smuzhiyun 	u16			default_media;
265*4882a593Smuzhiyun 	u8			n_blocks;
266*4882a593Smuzhiyun 	u8			unused;
267*4882a593Smuzhiyun } __packed;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun struct de_desc {
270*4882a593Smuzhiyun 	__le32			opts1;
271*4882a593Smuzhiyun 	__le32			opts2;
272*4882a593Smuzhiyun 	__le32			addr1;
273*4882a593Smuzhiyun 	__le32			addr2;
274*4882a593Smuzhiyun #if DSL
275*4882a593Smuzhiyun 	__le32			skip[DSL];
276*4882a593Smuzhiyun #endif
277*4882a593Smuzhiyun };
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun struct media_info {
280*4882a593Smuzhiyun 	u16			type;	/* DE_MEDIA_xxx */
281*4882a593Smuzhiyun 	u16			csr13;
282*4882a593Smuzhiyun 	u16			csr14;
283*4882a593Smuzhiyun 	u16			csr15;
284*4882a593Smuzhiyun };
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun struct ring_info {
287*4882a593Smuzhiyun 	struct sk_buff		*skb;
288*4882a593Smuzhiyun 	dma_addr_t		mapping;
289*4882a593Smuzhiyun };
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun struct de_private {
292*4882a593Smuzhiyun 	unsigned		tx_head;
293*4882a593Smuzhiyun 	unsigned		tx_tail;
294*4882a593Smuzhiyun 	unsigned		rx_tail;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	void			__iomem *regs;
297*4882a593Smuzhiyun 	struct net_device	*dev;
298*4882a593Smuzhiyun 	spinlock_t		lock;
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	struct de_desc		*rx_ring;
301*4882a593Smuzhiyun 	struct de_desc		*tx_ring;
302*4882a593Smuzhiyun 	struct ring_info	tx_skb[DE_TX_RING_SIZE];
303*4882a593Smuzhiyun 	struct ring_info	rx_skb[DE_RX_RING_SIZE];
304*4882a593Smuzhiyun 	unsigned		rx_buf_sz;
305*4882a593Smuzhiyun 	dma_addr_t		ring_dma;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	u32			msg_enable;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	struct pci_dev		*pdev;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	u16			setup_frame[DE_SETUP_FRAME_WORDS];
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	u32			media_type;
314*4882a593Smuzhiyun 	u32			media_supported;
315*4882a593Smuzhiyun 	u32			media_advertise;
316*4882a593Smuzhiyun 	struct media_info	media[DE_MAX_MEDIA];
317*4882a593Smuzhiyun 	struct timer_list	media_timer;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	u8			*ee_data;
320*4882a593Smuzhiyun 	unsigned		board_idx;
321*4882a593Smuzhiyun 	unsigned		de21040 : 1;
322*4882a593Smuzhiyun 	unsigned		media_lock : 1;
323*4882a593Smuzhiyun };
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun static void de_set_rx_mode (struct net_device *dev);
327*4882a593Smuzhiyun static void de_tx (struct de_private *de);
328*4882a593Smuzhiyun static void de_clean_rings (struct de_private *de);
329*4882a593Smuzhiyun static void de_media_interrupt (struct de_private *de, u32 status);
330*4882a593Smuzhiyun static void de21040_media_timer (struct timer_list *t);
331*4882a593Smuzhiyun static void de21041_media_timer (struct timer_list *t);
332*4882a593Smuzhiyun static unsigned int de_ok_to_advertise (struct de_private *de, u32 new_media);
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun static const struct pci_device_id de_pci_tbl[] = {
336*4882a593Smuzhiyun 	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP,
337*4882a593Smuzhiyun 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
338*4882a593Smuzhiyun 	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_PLUS,
339*4882a593Smuzhiyun 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
340*4882a593Smuzhiyun 	{ },
341*4882a593Smuzhiyun };
342*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, de_pci_tbl);
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun static const char * const media_name[DE_MAX_MEDIA] = {
345*4882a593Smuzhiyun 	"10baseT auto",
346*4882a593Smuzhiyun 	"BNC",
347*4882a593Smuzhiyun 	"AUI",
348*4882a593Smuzhiyun 	"10baseT-HD",
349*4882a593Smuzhiyun 	"10baseT-FD"
350*4882a593Smuzhiyun };
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun /* 21040 transceiver register settings:
353*4882a593Smuzhiyun  * TP AUTO(unused), BNC(unused), AUI, TP, TP FD*/
354*4882a593Smuzhiyun static u16 t21040_csr13[] = { 0, 0, 0x8F09, 0x8F01, 0x8F01, };
355*4882a593Smuzhiyun static u16 t21040_csr14[] = { 0, 0, 0x0705, 0xFFFF, 0xFFFD, };
356*4882a593Smuzhiyun static u16 t21040_csr15[] = { 0, 0, 0x0006, 0x0000, 0x0000, };
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun /* 21041 transceiver register settings: TP AUTO, BNC, AUI, TP, TP FD*/
359*4882a593Smuzhiyun static u16 t21041_csr13[] = { 0xEF01, 0xEF09, 0xEF09, 0xEF01, 0xEF09, };
360*4882a593Smuzhiyun static u16 t21041_csr14[] = { 0xFFFF, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, };
361*4882a593Smuzhiyun /* If on-chip autonegotiation is broken, use half-duplex (FF3F) instead */
362*4882a593Smuzhiyun static u16 t21041_csr14_brk[] = { 0xFF3F, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, };
363*4882a593Smuzhiyun static u16 t21041_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun #define dr32(reg)	ioread32(de->regs + (reg))
367*4882a593Smuzhiyun #define dw32(reg, val)	iowrite32((val), de->regs + (reg))
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 
de_rx_err_acct(struct de_private * de,unsigned rx_tail,u32 status,u32 len)370*4882a593Smuzhiyun static void de_rx_err_acct (struct de_private *de, unsigned rx_tail,
371*4882a593Smuzhiyun 			    u32 status, u32 len)
372*4882a593Smuzhiyun {
373*4882a593Smuzhiyun 	netif_dbg(de, rx_err, de->dev,
374*4882a593Smuzhiyun 		  "rx err, slot %d status 0x%x len %d\n",
375*4882a593Smuzhiyun 		  rx_tail, status, len);
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	if ((status & 0x38000300) != 0x0300) {
378*4882a593Smuzhiyun 		/* Ingore earlier buffers. */
379*4882a593Smuzhiyun 		if ((status & 0xffff) != 0x7fff) {
380*4882a593Smuzhiyun 			netif_warn(de, rx_err, de->dev,
381*4882a593Smuzhiyun 				   "Oversized Ethernet frame spanned multiple buffers, status %08x!\n",
382*4882a593Smuzhiyun 				   status);
383*4882a593Smuzhiyun 			de->dev->stats.rx_length_errors++;
384*4882a593Smuzhiyun 		}
385*4882a593Smuzhiyun 	} else if (status & RxError) {
386*4882a593Smuzhiyun 		/* There was a fatal error. */
387*4882a593Smuzhiyun 		de->dev->stats.rx_errors++; /* end of a packet.*/
388*4882a593Smuzhiyun 		if (status & 0x0890) de->dev->stats.rx_length_errors++;
389*4882a593Smuzhiyun 		if (status & RxErrCRC) de->dev->stats.rx_crc_errors++;
390*4882a593Smuzhiyun 		if (status & RxErrFIFO) de->dev->stats.rx_fifo_errors++;
391*4882a593Smuzhiyun 	}
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun 
de_rx(struct de_private * de)394*4882a593Smuzhiyun static void de_rx (struct de_private *de)
395*4882a593Smuzhiyun {
396*4882a593Smuzhiyun 	unsigned rx_tail = de->rx_tail;
397*4882a593Smuzhiyun 	unsigned rx_work = DE_RX_RING_SIZE;
398*4882a593Smuzhiyun 	unsigned drop = 0;
399*4882a593Smuzhiyun 	int rc;
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	while (--rx_work) {
402*4882a593Smuzhiyun 		u32 status, len;
403*4882a593Smuzhiyun 		dma_addr_t mapping;
404*4882a593Smuzhiyun 		struct sk_buff *skb, *copy_skb;
405*4882a593Smuzhiyun 		unsigned copying_skb, buflen;
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 		skb = de->rx_skb[rx_tail].skb;
408*4882a593Smuzhiyun 		BUG_ON(!skb);
409*4882a593Smuzhiyun 		rmb();
410*4882a593Smuzhiyun 		status = le32_to_cpu(de->rx_ring[rx_tail].opts1);
411*4882a593Smuzhiyun 		if (status & DescOwn)
412*4882a593Smuzhiyun 			break;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 		/* the length is actually a 15 bit value here according
415*4882a593Smuzhiyun 		 * to Table 4-1 in the DE2104x spec so mask is 0x7fff
416*4882a593Smuzhiyun 		 */
417*4882a593Smuzhiyun 		len = ((status >> 16) & 0x7fff) - 4;
418*4882a593Smuzhiyun 		mapping = de->rx_skb[rx_tail].mapping;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 		if (unlikely(drop)) {
421*4882a593Smuzhiyun 			de->dev->stats.rx_dropped++;
422*4882a593Smuzhiyun 			goto rx_next;
423*4882a593Smuzhiyun 		}
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 		if (unlikely((status & 0x38008300) != 0x0300)) {
426*4882a593Smuzhiyun 			de_rx_err_acct(de, rx_tail, status, len);
427*4882a593Smuzhiyun 			goto rx_next;
428*4882a593Smuzhiyun 		}
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 		copying_skb = (len <= rx_copybreak);
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 		netif_dbg(de, rx_status, de->dev,
433*4882a593Smuzhiyun 			  "rx slot %d status 0x%x len %d copying? %d\n",
434*4882a593Smuzhiyun 			  rx_tail, status, len, copying_skb);
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 		buflen = copying_skb ? (len + RX_OFFSET) : de->rx_buf_sz;
437*4882a593Smuzhiyun 		copy_skb = netdev_alloc_skb(de->dev, buflen);
438*4882a593Smuzhiyun 		if (unlikely(!copy_skb)) {
439*4882a593Smuzhiyun 			de->dev->stats.rx_dropped++;
440*4882a593Smuzhiyun 			drop = 1;
441*4882a593Smuzhiyun 			rx_work = 100;
442*4882a593Smuzhiyun 			goto rx_next;
443*4882a593Smuzhiyun 		}
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 		if (!copying_skb) {
446*4882a593Smuzhiyun 			dma_unmap_single(&de->pdev->dev, mapping, buflen,
447*4882a593Smuzhiyun 					 DMA_FROM_DEVICE);
448*4882a593Smuzhiyun 			skb_put(skb, len);
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 			mapping =
451*4882a593Smuzhiyun 			de->rx_skb[rx_tail].mapping =
452*4882a593Smuzhiyun 				dma_map_single(&de->pdev->dev, copy_skb->data,
453*4882a593Smuzhiyun 					       buflen, DMA_FROM_DEVICE);
454*4882a593Smuzhiyun 			de->rx_skb[rx_tail].skb = copy_skb;
455*4882a593Smuzhiyun 		} else {
456*4882a593Smuzhiyun 			dma_sync_single_for_cpu(&de->pdev->dev, mapping, len,
457*4882a593Smuzhiyun 						DMA_FROM_DEVICE);
458*4882a593Smuzhiyun 			skb_reserve(copy_skb, RX_OFFSET);
459*4882a593Smuzhiyun 			skb_copy_from_linear_data(skb, skb_put(copy_skb, len),
460*4882a593Smuzhiyun 						  len);
461*4882a593Smuzhiyun 			dma_sync_single_for_device(&de->pdev->dev, mapping,
462*4882a593Smuzhiyun 						   len, DMA_FROM_DEVICE);
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 			/* We'll reuse the original ring buffer. */
465*4882a593Smuzhiyun 			skb = copy_skb;
466*4882a593Smuzhiyun 		}
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 		skb->protocol = eth_type_trans (skb, de->dev);
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 		de->dev->stats.rx_packets++;
471*4882a593Smuzhiyun 		de->dev->stats.rx_bytes += skb->len;
472*4882a593Smuzhiyun 		rc = netif_rx (skb);
473*4882a593Smuzhiyun 		if (rc == NET_RX_DROP)
474*4882a593Smuzhiyun 			drop = 1;
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun rx_next:
477*4882a593Smuzhiyun 		if (rx_tail == (DE_RX_RING_SIZE - 1))
478*4882a593Smuzhiyun 			de->rx_ring[rx_tail].opts2 =
479*4882a593Smuzhiyun 				cpu_to_le32(RingEnd | de->rx_buf_sz);
480*4882a593Smuzhiyun 		else
481*4882a593Smuzhiyun 			de->rx_ring[rx_tail].opts2 = cpu_to_le32(de->rx_buf_sz);
482*4882a593Smuzhiyun 		de->rx_ring[rx_tail].addr1 = cpu_to_le32(mapping);
483*4882a593Smuzhiyun 		wmb();
484*4882a593Smuzhiyun 		de->rx_ring[rx_tail].opts1 = cpu_to_le32(DescOwn);
485*4882a593Smuzhiyun 		rx_tail = NEXT_RX(rx_tail);
486*4882a593Smuzhiyun 	}
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	if (!rx_work)
489*4882a593Smuzhiyun 		netdev_warn(de->dev, "rx work limit reached\n");
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	de->rx_tail = rx_tail;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun 
de_interrupt(int irq,void * dev_instance)494*4882a593Smuzhiyun static irqreturn_t de_interrupt (int irq, void *dev_instance)
495*4882a593Smuzhiyun {
496*4882a593Smuzhiyun 	struct net_device *dev = dev_instance;
497*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
498*4882a593Smuzhiyun 	u32 status;
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun 	status = dr32(MacStatus);
501*4882a593Smuzhiyun 	if ((!(status & (IntrOK|IntrErr))) || (status == 0xFFFF))
502*4882a593Smuzhiyun 		return IRQ_NONE;
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	netif_dbg(de, intr, dev, "intr, status %08x mode %08x desc %u/%u/%u\n",
505*4882a593Smuzhiyun 		  status, dr32(MacMode),
506*4882a593Smuzhiyun 		  de->rx_tail, de->tx_head, de->tx_tail);
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 	dw32(MacStatus, status);
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	if (status & (RxIntr | RxEmpty)) {
511*4882a593Smuzhiyun 		de_rx(de);
512*4882a593Smuzhiyun 		if (status & RxEmpty)
513*4882a593Smuzhiyun 			dw32(RxPoll, NormalRxPoll);
514*4882a593Smuzhiyun 	}
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	spin_lock(&de->lock);
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 	if (status & (TxIntr | TxEmpty))
519*4882a593Smuzhiyun 		de_tx(de);
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	if (status & (LinkPass | LinkFail))
522*4882a593Smuzhiyun 		de_media_interrupt(de, status);
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	spin_unlock(&de->lock);
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	if (status & PciErr) {
527*4882a593Smuzhiyun 		u16 pci_status;
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 		pci_read_config_word(de->pdev, PCI_STATUS, &pci_status);
530*4882a593Smuzhiyun 		pci_write_config_word(de->pdev, PCI_STATUS, pci_status);
531*4882a593Smuzhiyun 		netdev_err(de->dev,
532*4882a593Smuzhiyun 			   "PCI bus error, status=%08x, PCI status=%04x\n",
533*4882a593Smuzhiyun 			   status, pci_status);
534*4882a593Smuzhiyun 	}
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	return IRQ_HANDLED;
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun 
de_tx(struct de_private * de)539*4882a593Smuzhiyun static void de_tx (struct de_private *de)
540*4882a593Smuzhiyun {
541*4882a593Smuzhiyun 	unsigned tx_head = de->tx_head;
542*4882a593Smuzhiyun 	unsigned tx_tail = de->tx_tail;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	while (tx_tail != tx_head) {
545*4882a593Smuzhiyun 		struct sk_buff *skb;
546*4882a593Smuzhiyun 		u32 status;
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun 		rmb();
549*4882a593Smuzhiyun 		status = le32_to_cpu(de->tx_ring[tx_tail].opts1);
550*4882a593Smuzhiyun 		if (status & DescOwn)
551*4882a593Smuzhiyun 			break;
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 		skb = de->tx_skb[tx_tail].skb;
554*4882a593Smuzhiyun 		BUG_ON(!skb);
555*4882a593Smuzhiyun 		if (unlikely(skb == DE_DUMMY_SKB))
556*4882a593Smuzhiyun 			goto next;
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun 		if (unlikely(skb == DE_SETUP_SKB)) {
559*4882a593Smuzhiyun 			dma_unmap_single(&de->pdev->dev,
560*4882a593Smuzhiyun 					 de->tx_skb[tx_tail].mapping,
561*4882a593Smuzhiyun 					 sizeof(de->setup_frame),
562*4882a593Smuzhiyun 					 DMA_TO_DEVICE);
563*4882a593Smuzhiyun 			goto next;
564*4882a593Smuzhiyun 		}
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 		dma_unmap_single(&de->pdev->dev, de->tx_skb[tx_tail].mapping,
567*4882a593Smuzhiyun 				 skb->len, DMA_TO_DEVICE);
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 		if (status & LastFrag) {
570*4882a593Smuzhiyun 			if (status & TxError) {
571*4882a593Smuzhiyun 				netif_dbg(de, tx_err, de->dev,
572*4882a593Smuzhiyun 					  "tx err, status 0x%x\n",
573*4882a593Smuzhiyun 					  status);
574*4882a593Smuzhiyun 				de->dev->stats.tx_errors++;
575*4882a593Smuzhiyun 				if (status & TxOWC)
576*4882a593Smuzhiyun 					de->dev->stats.tx_window_errors++;
577*4882a593Smuzhiyun 				if (status & TxMaxCol)
578*4882a593Smuzhiyun 					de->dev->stats.tx_aborted_errors++;
579*4882a593Smuzhiyun 				if (status & TxLinkFail)
580*4882a593Smuzhiyun 					de->dev->stats.tx_carrier_errors++;
581*4882a593Smuzhiyun 				if (status & TxFIFOUnder)
582*4882a593Smuzhiyun 					de->dev->stats.tx_fifo_errors++;
583*4882a593Smuzhiyun 			} else {
584*4882a593Smuzhiyun 				de->dev->stats.tx_packets++;
585*4882a593Smuzhiyun 				de->dev->stats.tx_bytes += skb->len;
586*4882a593Smuzhiyun 				netif_dbg(de, tx_done, de->dev,
587*4882a593Smuzhiyun 					  "tx done, slot %d\n", tx_tail);
588*4882a593Smuzhiyun 			}
589*4882a593Smuzhiyun 			dev_consume_skb_irq(skb);
590*4882a593Smuzhiyun 		}
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun next:
593*4882a593Smuzhiyun 		de->tx_skb[tx_tail].skb = NULL;
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 		tx_tail = NEXT_TX(tx_tail);
596*4882a593Smuzhiyun 	}
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	de->tx_tail = tx_tail;
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	if (netif_queue_stopped(de->dev) && (TX_BUFFS_AVAIL(de) > (DE_TX_RING_SIZE / 4)))
601*4882a593Smuzhiyun 		netif_wake_queue(de->dev);
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun 
de_start_xmit(struct sk_buff * skb,struct net_device * dev)604*4882a593Smuzhiyun static netdev_tx_t de_start_xmit (struct sk_buff *skb,
605*4882a593Smuzhiyun 					struct net_device *dev)
606*4882a593Smuzhiyun {
607*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
608*4882a593Smuzhiyun 	unsigned int entry, tx_free;
609*4882a593Smuzhiyun 	u32 mapping, len, flags = FirstFrag | LastFrag;
610*4882a593Smuzhiyun 	struct de_desc *txd;
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun 	spin_lock_irq(&de->lock);
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	tx_free = TX_BUFFS_AVAIL(de);
615*4882a593Smuzhiyun 	if (tx_free == 0) {
616*4882a593Smuzhiyun 		netif_stop_queue(dev);
617*4882a593Smuzhiyun 		spin_unlock_irq(&de->lock);
618*4882a593Smuzhiyun 		return NETDEV_TX_BUSY;
619*4882a593Smuzhiyun 	}
620*4882a593Smuzhiyun 	tx_free--;
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	entry = de->tx_head;
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	txd = &de->tx_ring[entry];
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	len = skb->len;
627*4882a593Smuzhiyun 	mapping = dma_map_single(&de->pdev->dev, skb->data, len,
628*4882a593Smuzhiyun 				 DMA_TO_DEVICE);
629*4882a593Smuzhiyun 	if (entry == (DE_TX_RING_SIZE - 1))
630*4882a593Smuzhiyun 		flags |= RingEnd;
631*4882a593Smuzhiyun 	if (!tx_free || (tx_free == (DE_TX_RING_SIZE / 2)))
632*4882a593Smuzhiyun 		flags |= TxSwInt;
633*4882a593Smuzhiyun 	flags |= len;
634*4882a593Smuzhiyun 	txd->opts2 = cpu_to_le32(flags);
635*4882a593Smuzhiyun 	txd->addr1 = cpu_to_le32(mapping);
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	de->tx_skb[entry].skb = skb;
638*4882a593Smuzhiyun 	de->tx_skb[entry].mapping = mapping;
639*4882a593Smuzhiyun 	wmb();
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	txd->opts1 = cpu_to_le32(DescOwn);
642*4882a593Smuzhiyun 	wmb();
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	de->tx_head = NEXT_TX(entry);
645*4882a593Smuzhiyun 	netif_dbg(de, tx_queued, dev, "tx queued, slot %d, skblen %d\n",
646*4882a593Smuzhiyun 		  entry, skb->len);
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	if (tx_free == 0)
649*4882a593Smuzhiyun 		netif_stop_queue(dev);
650*4882a593Smuzhiyun 
651*4882a593Smuzhiyun 	spin_unlock_irq(&de->lock);
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun 	/* Trigger an immediate transmit demand. */
654*4882a593Smuzhiyun 	dw32(TxPoll, NormalTxPoll);
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	return NETDEV_TX_OK;
657*4882a593Smuzhiyun }
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun /* Set or clear the multicast filter for this adaptor.
660*4882a593Smuzhiyun    Note that we only use exclusion around actually queueing the
661*4882a593Smuzhiyun    new frame, not around filling de->setup_frame.  This is non-deterministic
662*4882a593Smuzhiyun    when re-entered but still correct. */
663*4882a593Smuzhiyun 
build_setup_frame_hash(u16 * setup_frm,struct net_device * dev)664*4882a593Smuzhiyun static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
665*4882a593Smuzhiyun {
666*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
667*4882a593Smuzhiyun 	u16 hash_table[32];
668*4882a593Smuzhiyun 	struct netdev_hw_addr *ha;
669*4882a593Smuzhiyun 	int i;
670*4882a593Smuzhiyun 	u16 *eaddrs;
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	memset(hash_table, 0, sizeof(hash_table));
673*4882a593Smuzhiyun 	__set_bit_le(255, hash_table);			/* Broadcast entry */
674*4882a593Smuzhiyun 	/* This should work on big-endian machines as well. */
675*4882a593Smuzhiyun 	netdev_for_each_mc_addr(ha, dev) {
676*4882a593Smuzhiyun 		int index = ether_crc_le(ETH_ALEN, ha->addr) & 0x1ff;
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun 		__set_bit_le(index, hash_table);
679*4882a593Smuzhiyun 	}
680*4882a593Smuzhiyun 
681*4882a593Smuzhiyun 	for (i = 0; i < 32; i++) {
682*4882a593Smuzhiyun 		*setup_frm++ = hash_table[i];
683*4882a593Smuzhiyun 		*setup_frm++ = hash_table[i];
684*4882a593Smuzhiyun 	}
685*4882a593Smuzhiyun 	setup_frm = &de->setup_frame[13*6];
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun 	/* Fill the final entry with our physical address. */
688*4882a593Smuzhiyun 	eaddrs = (u16 *)dev->dev_addr;
689*4882a593Smuzhiyun 	*setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
690*4882a593Smuzhiyun 	*setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
691*4882a593Smuzhiyun 	*setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun 
build_setup_frame_perfect(u16 * setup_frm,struct net_device * dev)694*4882a593Smuzhiyun static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
697*4882a593Smuzhiyun 	struct netdev_hw_addr *ha;
698*4882a593Smuzhiyun 	u16 *eaddrs;
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun 	/* We have <= 14 addresses so we can use the wonderful
701*4882a593Smuzhiyun 	   16 address perfect filtering of the Tulip. */
702*4882a593Smuzhiyun 	netdev_for_each_mc_addr(ha, dev) {
703*4882a593Smuzhiyun 		eaddrs = (u16 *) ha->addr;
704*4882a593Smuzhiyun 		*setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
705*4882a593Smuzhiyun 		*setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
706*4882a593Smuzhiyun 		*setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
707*4882a593Smuzhiyun 	}
708*4882a593Smuzhiyun 	/* Fill the unused entries with the broadcast address. */
709*4882a593Smuzhiyun 	memset(setup_frm, 0xff, (15 - netdev_mc_count(dev)) * 12);
710*4882a593Smuzhiyun 	setup_frm = &de->setup_frame[15*6];
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun 	/* Fill the final entry with our physical address. */
713*4882a593Smuzhiyun 	eaddrs = (u16 *)dev->dev_addr;
714*4882a593Smuzhiyun 	*setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
715*4882a593Smuzhiyun 	*setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
716*4882a593Smuzhiyun 	*setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun 
719*4882a593Smuzhiyun 
__de_set_rx_mode(struct net_device * dev)720*4882a593Smuzhiyun static void __de_set_rx_mode (struct net_device *dev)
721*4882a593Smuzhiyun {
722*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
723*4882a593Smuzhiyun 	u32 macmode;
724*4882a593Smuzhiyun 	unsigned int entry;
725*4882a593Smuzhiyun 	u32 mapping;
726*4882a593Smuzhiyun 	struct de_desc *txd;
727*4882a593Smuzhiyun 	struct de_desc *dummy_txd = NULL;
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	macmode = dr32(MacMode) & ~(AcceptAllMulticast | AcceptAllPhys);
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun 	if (dev->flags & IFF_PROMISC) {	/* Set promiscuous. */
732*4882a593Smuzhiyun 		macmode |= AcceptAllMulticast | AcceptAllPhys;
733*4882a593Smuzhiyun 		goto out;
734*4882a593Smuzhiyun 	}
735*4882a593Smuzhiyun 
736*4882a593Smuzhiyun 	if ((netdev_mc_count(dev) > 1000) || (dev->flags & IFF_ALLMULTI)) {
737*4882a593Smuzhiyun 		/* Too many to filter well -- accept all multicasts. */
738*4882a593Smuzhiyun 		macmode |= AcceptAllMulticast;
739*4882a593Smuzhiyun 		goto out;
740*4882a593Smuzhiyun 	}
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun 	/* Note that only the low-address shortword of setup_frame is valid!
743*4882a593Smuzhiyun 	   The values are doubled for big-endian architectures. */
744*4882a593Smuzhiyun 	if (netdev_mc_count(dev) > 14)	/* Must use a multicast hash table. */
745*4882a593Smuzhiyun 		build_setup_frame_hash (de->setup_frame, dev);
746*4882a593Smuzhiyun 	else
747*4882a593Smuzhiyun 		build_setup_frame_perfect (de->setup_frame, dev);
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 	/*
750*4882a593Smuzhiyun 	 * Now add this frame to the Tx list.
751*4882a593Smuzhiyun 	 */
752*4882a593Smuzhiyun 
753*4882a593Smuzhiyun 	entry = de->tx_head;
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun 	/* Avoid a chip errata by prefixing a dummy entry. */
756*4882a593Smuzhiyun 	if (entry != 0) {
757*4882a593Smuzhiyun 		de->tx_skb[entry].skb = DE_DUMMY_SKB;
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun 		dummy_txd = &de->tx_ring[entry];
760*4882a593Smuzhiyun 		dummy_txd->opts2 = (entry == (DE_TX_RING_SIZE - 1)) ?
761*4882a593Smuzhiyun 				   cpu_to_le32(RingEnd) : 0;
762*4882a593Smuzhiyun 		dummy_txd->addr1 = 0;
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun 		/* Must set DescOwned later to avoid race with chip */
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun 		entry = NEXT_TX(entry);
767*4882a593Smuzhiyun 	}
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun 	de->tx_skb[entry].skb = DE_SETUP_SKB;
770*4882a593Smuzhiyun 	de->tx_skb[entry].mapping = mapping =
771*4882a593Smuzhiyun 	    dma_map_single(&de->pdev->dev, de->setup_frame,
772*4882a593Smuzhiyun 			   sizeof(de->setup_frame), DMA_TO_DEVICE);
773*4882a593Smuzhiyun 
774*4882a593Smuzhiyun 	/* Put the setup frame on the Tx list. */
775*4882a593Smuzhiyun 	txd = &de->tx_ring[entry];
776*4882a593Smuzhiyun 	if (entry == (DE_TX_RING_SIZE - 1))
777*4882a593Smuzhiyun 		txd->opts2 = cpu_to_le32(SetupFrame | RingEnd | sizeof (de->setup_frame));
778*4882a593Smuzhiyun 	else
779*4882a593Smuzhiyun 		txd->opts2 = cpu_to_le32(SetupFrame | sizeof (de->setup_frame));
780*4882a593Smuzhiyun 	txd->addr1 = cpu_to_le32(mapping);
781*4882a593Smuzhiyun 	wmb();
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun 	txd->opts1 = cpu_to_le32(DescOwn);
784*4882a593Smuzhiyun 	wmb();
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun 	if (dummy_txd) {
787*4882a593Smuzhiyun 		dummy_txd->opts1 = cpu_to_le32(DescOwn);
788*4882a593Smuzhiyun 		wmb();
789*4882a593Smuzhiyun 	}
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun 	de->tx_head = NEXT_TX(entry);
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun 	if (TX_BUFFS_AVAIL(de) == 0)
794*4882a593Smuzhiyun 		netif_stop_queue(dev);
795*4882a593Smuzhiyun 
796*4882a593Smuzhiyun 	/* Trigger an immediate transmit demand. */
797*4882a593Smuzhiyun 	dw32(TxPoll, NormalTxPoll);
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun out:
800*4882a593Smuzhiyun 	if (macmode != dr32(MacMode))
801*4882a593Smuzhiyun 		dw32(MacMode, macmode);
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun 
de_set_rx_mode(struct net_device * dev)804*4882a593Smuzhiyun static void de_set_rx_mode (struct net_device *dev)
805*4882a593Smuzhiyun {
806*4882a593Smuzhiyun 	unsigned long flags;
807*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun 	spin_lock_irqsave (&de->lock, flags);
810*4882a593Smuzhiyun 	__de_set_rx_mode(dev);
811*4882a593Smuzhiyun 	spin_unlock_irqrestore (&de->lock, flags);
812*4882a593Smuzhiyun }
813*4882a593Smuzhiyun 
de_rx_missed(struct de_private * de,u32 rx_missed)814*4882a593Smuzhiyun static inline void de_rx_missed(struct de_private *de, u32 rx_missed)
815*4882a593Smuzhiyun {
816*4882a593Smuzhiyun 	if (unlikely(rx_missed & RxMissedOver))
817*4882a593Smuzhiyun 		de->dev->stats.rx_missed_errors += RxMissedMask;
818*4882a593Smuzhiyun 	else
819*4882a593Smuzhiyun 		de->dev->stats.rx_missed_errors += (rx_missed & RxMissedMask);
820*4882a593Smuzhiyun }
821*4882a593Smuzhiyun 
__de_get_stats(struct de_private * de)822*4882a593Smuzhiyun static void __de_get_stats(struct de_private *de)
823*4882a593Smuzhiyun {
824*4882a593Smuzhiyun 	u32 tmp = dr32(RxMissed); /* self-clearing */
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun 	de_rx_missed(de, tmp);
827*4882a593Smuzhiyun }
828*4882a593Smuzhiyun 
de_get_stats(struct net_device * dev)829*4882a593Smuzhiyun static struct net_device_stats *de_get_stats(struct net_device *dev)
830*4882a593Smuzhiyun {
831*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun 	/* The chip only need report frame silently dropped. */
834*4882a593Smuzhiyun 	spin_lock_irq(&de->lock);
835*4882a593Smuzhiyun  	if (netif_running(dev) && netif_device_present(dev))
836*4882a593Smuzhiyun  		__de_get_stats(de);
837*4882a593Smuzhiyun 	spin_unlock_irq(&de->lock);
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun 	return &dev->stats;
840*4882a593Smuzhiyun }
841*4882a593Smuzhiyun 
de_is_running(struct de_private * de)842*4882a593Smuzhiyun static inline int de_is_running (struct de_private *de)
843*4882a593Smuzhiyun {
844*4882a593Smuzhiyun 	return (dr32(MacStatus) & (RxState | TxState)) ? 1 : 0;
845*4882a593Smuzhiyun }
846*4882a593Smuzhiyun 
de_stop_rxtx(struct de_private * de)847*4882a593Smuzhiyun static void de_stop_rxtx (struct de_private *de)
848*4882a593Smuzhiyun {
849*4882a593Smuzhiyun 	u32 macmode;
850*4882a593Smuzhiyun 	unsigned int i = 1300/100;
851*4882a593Smuzhiyun 
852*4882a593Smuzhiyun 	macmode = dr32(MacMode);
853*4882a593Smuzhiyun 	if (macmode & RxTx) {
854*4882a593Smuzhiyun 		dw32(MacMode, macmode & ~RxTx);
855*4882a593Smuzhiyun 		dr32(MacMode);
856*4882a593Smuzhiyun 	}
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun 	/* wait until in-flight frame completes.
859*4882a593Smuzhiyun 	 * Max time @ 10BT: 1500*8b/10Mbps == 1200us (+ 100us margin)
860*4882a593Smuzhiyun 	 * Typically expect this loop to end in < 50 us on 100BT.
861*4882a593Smuzhiyun 	 */
862*4882a593Smuzhiyun 	while (--i) {
863*4882a593Smuzhiyun 		if (!de_is_running(de))
864*4882a593Smuzhiyun 			return;
865*4882a593Smuzhiyun 		udelay(100);
866*4882a593Smuzhiyun 	}
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	netdev_warn(de->dev, "timeout expired, stopping DMA\n");
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun 
de_start_rxtx(struct de_private * de)871*4882a593Smuzhiyun static inline void de_start_rxtx (struct de_private *de)
872*4882a593Smuzhiyun {
873*4882a593Smuzhiyun 	u32 macmode;
874*4882a593Smuzhiyun 
875*4882a593Smuzhiyun 	macmode = dr32(MacMode);
876*4882a593Smuzhiyun 	if ((macmode & RxTx) != RxTx) {
877*4882a593Smuzhiyun 		dw32(MacMode, macmode | RxTx);
878*4882a593Smuzhiyun 		dr32(MacMode);
879*4882a593Smuzhiyun 	}
880*4882a593Smuzhiyun }
881*4882a593Smuzhiyun 
de_stop_hw(struct de_private * de)882*4882a593Smuzhiyun static void de_stop_hw (struct de_private *de)
883*4882a593Smuzhiyun {
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	udelay(5);
886*4882a593Smuzhiyun 	dw32(IntrMask, 0);
887*4882a593Smuzhiyun 
888*4882a593Smuzhiyun 	de_stop_rxtx(de);
889*4882a593Smuzhiyun 
890*4882a593Smuzhiyun 	dw32(MacStatus, dr32(MacStatus));
891*4882a593Smuzhiyun 
892*4882a593Smuzhiyun 	udelay(10);
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun 	de->rx_tail = 0;
895*4882a593Smuzhiyun 	de->tx_head = de->tx_tail = 0;
896*4882a593Smuzhiyun }
897*4882a593Smuzhiyun 
de_link_up(struct de_private * de)898*4882a593Smuzhiyun static void de_link_up(struct de_private *de)
899*4882a593Smuzhiyun {
900*4882a593Smuzhiyun 	if (!netif_carrier_ok(de->dev)) {
901*4882a593Smuzhiyun 		netif_carrier_on(de->dev);
902*4882a593Smuzhiyun 		netif_info(de, link, de->dev, "link up, media %s\n",
903*4882a593Smuzhiyun 			   media_name[de->media_type]);
904*4882a593Smuzhiyun 	}
905*4882a593Smuzhiyun }
906*4882a593Smuzhiyun 
de_link_down(struct de_private * de)907*4882a593Smuzhiyun static void de_link_down(struct de_private *de)
908*4882a593Smuzhiyun {
909*4882a593Smuzhiyun 	if (netif_carrier_ok(de->dev)) {
910*4882a593Smuzhiyun 		netif_carrier_off(de->dev);
911*4882a593Smuzhiyun 		netif_info(de, link, de->dev, "link down\n");
912*4882a593Smuzhiyun 	}
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun 
de_set_media(struct de_private * de)915*4882a593Smuzhiyun static void de_set_media (struct de_private *de)
916*4882a593Smuzhiyun {
917*4882a593Smuzhiyun 	unsigned media = de->media_type;
918*4882a593Smuzhiyun 	u32 macmode = dr32(MacMode);
919*4882a593Smuzhiyun 
920*4882a593Smuzhiyun 	if (de_is_running(de))
921*4882a593Smuzhiyun 		netdev_warn(de->dev, "chip is running while changing media!\n");
922*4882a593Smuzhiyun 
923*4882a593Smuzhiyun 	if (de->de21040)
924*4882a593Smuzhiyun 		dw32(CSR11, FULL_DUPLEX_MAGIC);
925*4882a593Smuzhiyun 	dw32(CSR13, 0); /* Reset phy */
926*4882a593Smuzhiyun 	dw32(CSR14, de->media[media].csr14);
927*4882a593Smuzhiyun 	dw32(CSR15, de->media[media].csr15);
928*4882a593Smuzhiyun 	dw32(CSR13, de->media[media].csr13);
929*4882a593Smuzhiyun 
930*4882a593Smuzhiyun 	/* must delay 10ms before writing to other registers,
931*4882a593Smuzhiyun 	 * especially CSR6
932*4882a593Smuzhiyun 	 */
933*4882a593Smuzhiyun 	mdelay(10);
934*4882a593Smuzhiyun 
935*4882a593Smuzhiyun 	if (media == DE_MEDIA_TP_FD)
936*4882a593Smuzhiyun 		macmode |= FullDuplex;
937*4882a593Smuzhiyun 	else
938*4882a593Smuzhiyun 		macmode &= ~FullDuplex;
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun 	netif_info(de, link, de->dev, "set link %s\n", media_name[media]);
941*4882a593Smuzhiyun 	netif_info(de, hw, de->dev, "mode 0x%x, sia 0x%x,0x%x,0x%x,0x%x\n",
942*4882a593Smuzhiyun 		   dr32(MacMode), dr32(SIAStatus),
943*4882a593Smuzhiyun 		   dr32(CSR13), dr32(CSR14), dr32(CSR15));
944*4882a593Smuzhiyun 	netif_info(de, hw, de->dev, "set mode 0x%x, set sia 0x%x,0x%x,0x%x\n",
945*4882a593Smuzhiyun 		   macmode, de->media[media].csr13,
946*4882a593Smuzhiyun 		   de->media[media].csr14, de->media[media].csr15);
947*4882a593Smuzhiyun 	if (macmode != dr32(MacMode))
948*4882a593Smuzhiyun 		dw32(MacMode, macmode);
949*4882a593Smuzhiyun }
950*4882a593Smuzhiyun 
de_next_media(struct de_private * de,const u32 * media,unsigned int n_media)951*4882a593Smuzhiyun static void de_next_media (struct de_private *de, const u32 *media,
952*4882a593Smuzhiyun 			   unsigned int n_media)
953*4882a593Smuzhiyun {
954*4882a593Smuzhiyun 	unsigned int i;
955*4882a593Smuzhiyun 
956*4882a593Smuzhiyun 	for (i = 0; i < n_media; i++) {
957*4882a593Smuzhiyun 		if (de_ok_to_advertise(de, media[i])) {
958*4882a593Smuzhiyun 			de->media_type = media[i];
959*4882a593Smuzhiyun 			return;
960*4882a593Smuzhiyun 		}
961*4882a593Smuzhiyun 	}
962*4882a593Smuzhiyun }
963*4882a593Smuzhiyun 
de21040_media_timer(struct timer_list * t)964*4882a593Smuzhiyun static void de21040_media_timer (struct timer_list *t)
965*4882a593Smuzhiyun {
966*4882a593Smuzhiyun 	struct de_private *de = from_timer(de, t, media_timer);
967*4882a593Smuzhiyun 	struct net_device *dev = de->dev;
968*4882a593Smuzhiyun 	u32 status = dr32(SIAStatus);
969*4882a593Smuzhiyun 	unsigned int carrier;
970*4882a593Smuzhiyun 	unsigned long flags;
971*4882a593Smuzhiyun 
972*4882a593Smuzhiyun 	carrier = (status & NetCxnErr) ? 0 : 1;
973*4882a593Smuzhiyun 
974*4882a593Smuzhiyun 	if (carrier) {
975*4882a593Smuzhiyun 		if (de->media_type != DE_MEDIA_AUI && (status & LinkFailStatus))
976*4882a593Smuzhiyun 			goto no_link_yet;
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun 		de->media_timer.expires = jiffies + DE_TIMER_LINK;
979*4882a593Smuzhiyun 		add_timer(&de->media_timer);
980*4882a593Smuzhiyun 		if (!netif_carrier_ok(dev))
981*4882a593Smuzhiyun 			de_link_up(de);
982*4882a593Smuzhiyun 		else
983*4882a593Smuzhiyun 			netif_info(de, timer, dev, "%s link ok, status %x\n",
984*4882a593Smuzhiyun 				   media_name[de->media_type], status);
985*4882a593Smuzhiyun 		return;
986*4882a593Smuzhiyun 	}
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun 	de_link_down(de);
989*4882a593Smuzhiyun 
990*4882a593Smuzhiyun 	if (de->media_lock)
991*4882a593Smuzhiyun 		return;
992*4882a593Smuzhiyun 
993*4882a593Smuzhiyun 	if (de->media_type == DE_MEDIA_AUI) {
994*4882a593Smuzhiyun 		static const u32 next_state = DE_MEDIA_TP;
995*4882a593Smuzhiyun 		de_next_media(de, &next_state, 1);
996*4882a593Smuzhiyun 	} else {
997*4882a593Smuzhiyun 		static const u32 next_state = DE_MEDIA_AUI;
998*4882a593Smuzhiyun 		de_next_media(de, &next_state, 1);
999*4882a593Smuzhiyun 	}
1000*4882a593Smuzhiyun 
1001*4882a593Smuzhiyun 	spin_lock_irqsave(&de->lock, flags);
1002*4882a593Smuzhiyun 	de_stop_rxtx(de);
1003*4882a593Smuzhiyun 	spin_unlock_irqrestore(&de->lock, flags);
1004*4882a593Smuzhiyun 	de_set_media(de);
1005*4882a593Smuzhiyun 	de_start_rxtx(de);
1006*4882a593Smuzhiyun 
1007*4882a593Smuzhiyun no_link_yet:
1008*4882a593Smuzhiyun 	de->media_timer.expires = jiffies + DE_TIMER_NO_LINK;
1009*4882a593Smuzhiyun 	add_timer(&de->media_timer);
1010*4882a593Smuzhiyun 
1011*4882a593Smuzhiyun 	netif_info(de, timer, dev, "no link, trying media %s, status %x\n",
1012*4882a593Smuzhiyun 		   media_name[de->media_type], status);
1013*4882a593Smuzhiyun }
1014*4882a593Smuzhiyun 
de_ok_to_advertise(struct de_private * de,u32 new_media)1015*4882a593Smuzhiyun static unsigned int de_ok_to_advertise (struct de_private *de, u32 new_media)
1016*4882a593Smuzhiyun {
1017*4882a593Smuzhiyun 	switch (new_media) {
1018*4882a593Smuzhiyun 	case DE_MEDIA_TP_AUTO:
1019*4882a593Smuzhiyun 		if (!(de->media_advertise & ADVERTISED_Autoneg))
1020*4882a593Smuzhiyun 			return 0;
1021*4882a593Smuzhiyun 		if (!(de->media_advertise & (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full)))
1022*4882a593Smuzhiyun 			return 0;
1023*4882a593Smuzhiyun 		break;
1024*4882a593Smuzhiyun 	case DE_MEDIA_BNC:
1025*4882a593Smuzhiyun 		if (!(de->media_advertise & ADVERTISED_BNC))
1026*4882a593Smuzhiyun 			return 0;
1027*4882a593Smuzhiyun 		break;
1028*4882a593Smuzhiyun 	case DE_MEDIA_AUI:
1029*4882a593Smuzhiyun 		if (!(de->media_advertise & ADVERTISED_AUI))
1030*4882a593Smuzhiyun 			return 0;
1031*4882a593Smuzhiyun 		break;
1032*4882a593Smuzhiyun 	case DE_MEDIA_TP:
1033*4882a593Smuzhiyun 		if (!(de->media_advertise & ADVERTISED_10baseT_Half))
1034*4882a593Smuzhiyun 			return 0;
1035*4882a593Smuzhiyun 		break;
1036*4882a593Smuzhiyun 	case DE_MEDIA_TP_FD:
1037*4882a593Smuzhiyun 		if (!(de->media_advertise & ADVERTISED_10baseT_Full))
1038*4882a593Smuzhiyun 			return 0;
1039*4882a593Smuzhiyun 		break;
1040*4882a593Smuzhiyun 	}
1041*4882a593Smuzhiyun 
1042*4882a593Smuzhiyun 	return 1;
1043*4882a593Smuzhiyun }
1044*4882a593Smuzhiyun 
de21041_media_timer(struct timer_list * t)1045*4882a593Smuzhiyun static void de21041_media_timer (struct timer_list *t)
1046*4882a593Smuzhiyun {
1047*4882a593Smuzhiyun 	struct de_private *de = from_timer(de, t, media_timer);
1048*4882a593Smuzhiyun 	struct net_device *dev = de->dev;
1049*4882a593Smuzhiyun 	u32 status = dr32(SIAStatus);
1050*4882a593Smuzhiyun 	unsigned int carrier;
1051*4882a593Smuzhiyun 	unsigned long flags;
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun 	/* clear port active bits */
1054*4882a593Smuzhiyun 	dw32(SIAStatus, NonselPortActive | SelPortActive);
1055*4882a593Smuzhiyun 
1056*4882a593Smuzhiyun 	carrier = (status & NetCxnErr) ? 0 : 1;
1057*4882a593Smuzhiyun 
1058*4882a593Smuzhiyun 	if (carrier) {
1059*4882a593Smuzhiyun 		if ((de->media_type == DE_MEDIA_TP_AUTO ||
1060*4882a593Smuzhiyun 		     de->media_type == DE_MEDIA_TP ||
1061*4882a593Smuzhiyun 		     de->media_type == DE_MEDIA_TP_FD) &&
1062*4882a593Smuzhiyun 		    (status & LinkFailStatus))
1063*4882a593Smuzhiyun 			goto no_link_yet;
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun 		de->media_timer.expires = jiffies + DE_TIMER_LINK;
1066*4882a593Smuzhiyun 		add_timer(&de->media_timer);
1067*4882a593Smuzhiyun 		if (!netif_carrier_ok(dev))
1068*4882a593Smuzhiyun 			de_link_up(de);
1069*4882a593Smuzhiyun 		else
1070*4882a593Smuzhiyun 			netif_info(de, timer, dev,
1071*4882a593Smuzhiyun 				   "%s link ok, mode %x status %x\n",
1072*4882a593Smuzhiyun 				   media_name[de->media_type],
1073*4882a593Smuzhiyun 				   dr32(MacMode), status);
1074*4882a593Smuzhiyun 		return;
1075*4882a593Smuzhiyun 	}
1076*4882a593Smuzhiyun 
1077*4882a593Smuzhiyun 	de_link_down(de);
1078*4882a593Smuzhiyun 
1079*4882a593Smuzhiyun 	/* if media type locked, don't switch media */
1080*4882a593Smuzhiyun 	if (de->media_lock)
1081*4882a593Smuzhiyun 		goto set_media;
1082*4882a593Smuzhiyun 
1083*4882a593Smuzhiyun 	/* if activity detected, use that as hint for new media type */
1084*4882a593Smuzhiyun 	if (status & NonselPortActive) {
1085*4882a593Smuzhiyun 		unsigned int have_media = 1;
1086*4882a593Smuzhiyun 
1087*4882a593Smuzhiyun 		/* if AUI/BNC selected, then activity is on TP port */
1088*4882a593Smuzhiyun 		if (de->media_type == DE_MEDIA_AUI ||
1089*4882a593Smuzhiyun 		    de->media_type == DE_MEDIA_BNC) {
1090*4882a593Smuzhiyun 			if (de_ok_to_advertise(de, DE_MEDIA_TP_AUTO))
1091*4882a593Smuzhiyun 				de->media_type = DE_MEDIA_TP_AUTO;
1092*4882a593Smuzhiyun 			else
1093*4882a593Smuzhiyun 				have_media = 0;
1094*4882a593Smuzhiyun 		}
1095*4882a593Smuzhiyun 
1096*4882a593Smuzhiyun 		/* TP selected.  If there is only TP and BNC, then it's BNC */
1097*4882a593Smuzhiyun 		else if (((de->media_supported & DE_AUI_BNC) == SUPPORTED_BNC) &&
1098*4882a593Smuzhiyun 			 de_ok_to_advertise(de, DE_MEDIA_BNC))
1099*4882a593Smuzhiyun 			de->media_type = DE_MEDIA_BNC;
1100*4882a593Smuzhiyun 
1101*4882a593Smuzhiyun 		/* TP selected.  If there is only TP and AUI, then it's AUI */
1102*4882a593Smuzhiyun 		else if (((de->media_supported & DE_AUI_BNC) == SUPPORTED_AUI) &&
1103*4882a593Smuzhiyun 			 de_ok_to_advertise(de, DE_MEDIA_AUI))
1104*4882a593Smuzhiyun 			de->media_type = DE_MEDIA_AUI;
1105*4882a593Smuzhiyun 
1106*4882a593Smuzhiyun 		/* otherwise, ignore the hint */
1107*4882a593Smuzhiyun 		else
1108*4882a593Smuzhiyun 			have_media = 0;
1109*4882a593Smuzhiyun 
1110*4882a593Smuzhiyun 		if (have_media)
1111*4882a593Smuzhiyun 			goto set_media;
1112*4882a593Smuzhiyun 	}
1113*4882a593Smuzhiyun 
1114*4882a593Smuzhiyun 	/*
1115*4882a593Smuzhiyun 	 * Absent or ambiguous activity hint, move to next advertised
1116*4882a593Smuzhiyun 	 * media state.  If de->media_type is left unchanged, this
1117*4882a593Smuzhiyun 	 * simply resets the PHY and reloads the current media settings.
1118*4882a593Smuzhiyun 	 */
1119*4882a593Smuzhiyun 	if (de->media_type == DE_MEDIA_AUI) {
1120*4882a593Smuzhiyun 		static const u32 next_states[] = {
1121*4882a593Smuzhiyun 			DE_MEDIA_BNC, DE_MEDIA_TP_AUTO
1122*4882a593Smuzhiyun 		};
1123*4882a593Smuzhiyun 		de_next_media(de, next_states, ARRAY_SIZE(next_states));
1124*4882a593Smuzhiyun 	} else if (de->media_type == DE_MEDIA_BNC) {
1125*4882a593Smuzhiyun 		static const u32 next_states[] = {
1126*4882a593Smuzhiyun 			DE_MEDIA_TP_AUTO, DE_MEDIA_AUI
1127*4882a593Smuzhiyun 		};
1128*4882a593Smuzhiyun 		de_next_media(de, next_states, ARRAY_SIZE(next_states));
1129*4882a593Smuzhiyun 	} else {
1130*4882a593Smuzhiyun 		static const u32 next_states[] = {
1131*4882a593Smuzhiyun 			DE_MEDIA_AUI, DE_MEDIA_BNC, DE_MEDIA_TP_AUTO
1132*4882a593Smuzhiyun 		};
1133*4882a593Smuzhiyun 		de_next_media(de, next_states, ARRAY_SIZE(next_states));
1134*4882a593Smuzhiyun 	}
1135*4882a593Smuzhiyun 
1136*4882a593Smuzhiyun set_media:
1137*4882a593Smuzhiyun 	spin_lock_irqsave(&de->lock, flags);
1138*4882a593Smuzhiyun 	de_stop_rxtx(de);
1139*4882a593Smuzhiyun 	spin_unlock_irqrestore(&de->lock, flags);
1140*4882a593Smuzhiyun 	de_set_media(de);
1141*4882a593Smuzhiyun 	de_start_rxtx(de);
1142*4882a593Smuzhiyun 
1143*4882a593Smuzhiyun no_link_yet:
1144*4882a593Smuzhiyun 	de->media_timer.expires = jiffies + DE_TIMER_NO_LINK;
1145*4882a593Smuzhiyun 	add_timer(&de->media_timer);
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun 	netif_info(de, timer, dev, "no link, trying media %s, status %x\n",
1148*4882a593Smuzhiyun 		   media_name[de->media_type], status);
1149*4882a593Smuzhiyun }
1150*4882a593Smuzhiyun 
de_media_interrupt(struct de_private * de,u32 status)1151*4882a593Smuzhiyun static void de_media_interrupt (struct de_private *de, u32 status)
1152*4882a593Smuzhiyun {
1153*4882a593Smuzhiyun 	if (status & LinkPass) {
1154*4882a593Smuzhiyun 		/* Ignore if current media is AUI or BNC and we can't use TP */
1155*4882a593Smuzhiyun 		if ((de->media_type == DE_MEDIA_AUI ||
1156*4882a593Smuzhiyun 		     de->media_type == DE_MEDIA_BNC) &&
1157*4882a593Smuzhiyun 		    (de->media_lock ||
1158*4882a593Smuzhiyun 		     !de_ok_to_advertise(de, DE_MEDIA_TP_AUTO)))
1159*4882a593Smuzhiyun 			return;
1160*4882a593Smuzhiyun 		/* If current media is not TP, change it to TP */
1161*4882a593Smuzhiyun 		if ((de->media_type == DE_MEDIA_AUI ||
1162*4882a593Smuzhiyun 		     de->media_type == DE_MEDIA_BNC)) {
1163*4882a593Smuzhiyun 			de->media_type = DE_MEDIA_TP_AUTO;
1164*4882a593Smuzhiyun 			de_stop_rxtx(de);
1165*4882a593Smuzhiyun 			de_set_media(de);
1166*4882a593Smuzhiyun 			de_start_rxtx(de);
1167*4882a593Smuzhiyun 		}
1168*4882a593Smuzhiyun 		de_link_up(de);
1169*4882a593Smuzhiyun 		mod_timer(&de->media_timer, jiffies + DE_TIMER_LINK);
1170*4882a593Smuzhiyun 		return;
1171*4882a593Smuzhiyun 	}
1172*4882a593Smuzhiyun 
1173*4882a593Smuzhiyun 	BUG_ON(!(status & LinkFail));
1174*4882a593Smuzhiyun 	/* Mark the link as down only if current media is TP */
1175*4882a593Smuzhiyun 	if (netif_carrier_ok(de->dev) && de->media_type != DE_MEDIA_AUI &&
1176*4882a593Smuzhiyun 	    de->media_type != DE_MEDIA_BNC) {
1177*4882a593Smuzhiyun 		de_link_down(de);
1178*4882a593Smuzhiyun 		mod_timer(&de->media_timer, jiffies + DE_TIMER_NO_LINK);
1179*4882a593Smuzhiyun 	}
1180*4882a593Smuzhiyun }
1181*4882a593Smuzhiyun 
de_reset_mac(struct de_private * de)1182*4882a593Smuzhiyun static int de_reset_mac (struct de_private *de)
1183*4882a593Smuzhiyun {
1184*4882a593Smuzhiyun 	u32 status, tmp;
1185*4882a593Smuzhiyun 
1186*4882a593Smuzhiyun 	/*
1187*4882a593Smuzhiyun 	 * Reset MAC.  de4x5.c and tulip.c examined for "advice"
1188*4882a593Smuzhiyun 	 * in this area.
1189*4882a593Smuzhiyun 	 */
1190*4882a593Smuzhiyun 
1191*4882a593Smuzhiyun 	if (dr32(BusMode) == 0xffffffff)
1192*4882a593Smuzhiyun 		return -EBUSY;
1193*4882a593Smuzhiyun 
1194*4882a593Smuzhiyun 	/* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
1195*4882a593Smuzhiyun 	dw32 (BusMode, CmdReset);
1196*4882a593Smuzhiyun 	mdelay (1);
1197*4882a593Smuzhiyun 
1198*4882a593Smuzhiyun 	dw32 (BusMode, de_bus_mode);
1199*4882a593Smuzhiyun 	mdelay (1);
1200*4882a593Smuzhiyun 
1201*4882a593Smuzhiyun 	for (tmp = 0; tmp < 5; tmp++) {
1202*4882a593Smuzhiyun 		dr32 (BusMode);
1203*4882a593Smuzhiyun 		mdelay (1);
1204*4882a593Smuzhiyun 	}
1205*4882a593Smuzhiyun 
1206*4882a593Smuzhiyun 	mdelay (1);
1207*4882a593Smuzhiyun 
1208*4882a593Smuzhiyun 	status = dr32(MacStatus);
1209*4882a593Smuzhiyun 	if (status & (RxState | TxState))
1210*4882a593Smuzhiyun 		return -EBUSY;
1211*4882a593Smuzhiyun 	if (status == 0xffffffff)
1212*4882a593Smuzhiyun 		return -ENODEV;
1213*4882a593Smuzhiyun 	return 0;
1214*4882a593Smuzhiyun }
1215*4882a593Smuzhiyun 
de_adapter_wake(struct de_private * de)1216*4882a593Smuzhiyun static void de_adapter_wake (struct de_private *de)
1217*4882a593Smuzhiyun {
1218*4882a593Smuzhiyun 	u32 pmctl;
1219*4882a593Smuzhiyun 
1220*4882a593Smuzhiyun 	if (de->de21040)
1221*4882a593Smuzhiyun 		return;
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun 	pci_read_config_dword(de->pdev, PCIPM, &pmctl);
1224*4882a593Smuzhiyun 	if (pmctl & PM_Mask) {
1225*4882a593Smuzhiyun 		pmctl &= ~PM_Mask;
1226*4882a593Smuzhiyun 		pci_write_config_dword(de->pdev, PCIPM, pmctl);
1227*4882a593Smuzhiyun 
1228*4882a593Smuzhiyun 		/* de4x5.c delays, so we do too */
1229*4882a593Smuzhiyun 		msleep(10);
1230*4882a593Smuzhiyun 	}
1231*4882a593Smuzhiyun }
1232*4882a593Smuzhiyun 
de_adapter_sleep(struct de_private * de)1233*4882a593Smuzhiyun static void de_adapter_sleep (struct de_private *de)
1234*4882a593Smuzhiyun {
1235*4882a593Smuzhiyun 	u32 pmctl;
1236*4882a593Smuzhiyun 
1237*4882a593Smuzhiyun 	if (de->de21040)
1238*4882a593Smuzhiyun 		return;
1239*4882a593Smuzhiyun 
1240*4882a593Smuzhiyun 	dw32(CSR13, 0); /* Reset phy */
1241*4882a593Smuzhiyun 	pci_read_config_dword(de->pdev, PCIPM, &pmctl);
1242*4882a593Smuzhiyun 	pmctl |= PM_Sleep;
1243*4882a593Smuzhiyun 	pci_write_config_dword(de->pdev, PCIPM, pmctl);
1244*4882a593Smuzhiyun }
1245*4882a593Smuzhiyun 
de_init_hw(struct de_private * de)1246*4882a593Smuzhiyun static int de_init_hw (struct de_private *de)
1247*4882a593Smuzhiyun {
1248*4882a593Smuzhiyun 	struct net_device *dev = de->dev;
1249*4882a593Smuzhiyun 	u32 macmode;
1250*4882a593Smuzhiyun 	int rc;
1251*4882a593Smuzhiyun 
1252*4882a593Smuzhiyun 	de_adapter_wake(de);
1253*4882a593Smuzhiyun 
1254*4882a593Smuzhiyun 	macmode = dr32(MacMode) & ~MacModeClear;
1255*4882a593Smuzhiyun 
1256*4882a593Smuzhiyun 	rc = de_reset_mac(de);
1257*4882a593Smuzhiyun 	if (rc)
1258*4882a593Smuzhiyun 		return rc;
1259*4882a593Smuzhiyun 
1260*4882a593Smuzhiyun 	de_set_media(de); /* reset phy */
1261*4882a593Smuzhiyun 
1262*4882a593Smuzhiyun 	dw32(RxRingAddr, de->ring_dma);
1263*4882a593Smuzhiyun 	dw32(TxRingAddr, de->ring_dma + (sizeof(struct de_desc) * DE_RX_RING_SIZE));
1264*4882a593Smuzhiyun 
1265*4882a593Smuzhiyun 	dw32(MacMode, RxTx | macmode);
1266*4882a593Smuzhiyun 
1267*4882a593Smuzhiyun 	dr32(RxMissed); /* self-clearing */
1268*4882a593Smuzhiyun 
1269*4882a593Smuzhiyun 	dw32(IntrMask, de_intr_mask);
1270*4882a593Smuzhiyun 
1271*4882a593Smuzhiyun 	de_set_rx_mode(dev);
1272*4882a593Smuzhiyun 
1273*4882a593Smuzhiyun 	return 0;
1274*4882a593Smuzhiyun }
1275*4882a593Smuzhiyun 
de_refill_rx(struct de_private * de)1276*4882a593Smuzhiyun static int de_refill_rx (struct de_private *de)
1277*4882a593Smuzhiyun {
1278*4882a593Smuzhiyun 	unsigned i;
1279*4882a593Smuzhiyun 
1280*4882a593Smuzhiyun 	for (i = 0; i < DE_RX_RING_SIZE; i++) {
1281*4882a593Smuzhiyun 		struct sk_buff *skb;
1282*4882a593Smuzhiyun 
1283*4882a593Smuzhiyun 		skb = netdev_alloc_skb(de->dev, de->rx_buf_sz);
1284*4882a593Smuzhiyun 		if (!skb)
1285*4882a593Smuzhiyun 			goto err_out;
1286*4882a593Smuzhiyun 
1287*4882a593Smuzhiyun 		de->rx_skb[i].mapping = dma_map_single(&de->pdev->dev,
1288*4882a593Smuzhiyun 						       skb->data,
1289*4882a593Smuzhiyun 						       de->rx_buf_sz,
1290*4882a593Smuzhiyun 						       DMA_FROM_DEVICE);
1291*4882a593Smuzhiyun 		de->rx_skb[i].skb = skb;
1292*4882a593Smuzhiyun 
1293*4882a593Smuzhiyun 		de->rx_ring[i].opts1 = cpu_to_le32(DescOwn);
1294*4882a593Smuzhiyun 		if (i == (DE_RX_RING_SIZE - 1))
1295*4882a593Smuzhiyun 			de->rx_ring[i].opts2 =
1296*4882a593Smuzhiyun 				cpu_to_le32(RingEnd | de->rx_buf_sz);
1297*4882a593Smuzhiyun 		else
1298*4882a593Smuzhiyun 			de->rx_ring[i].opts2 = cpu_to_le32(de->rx_buf_sz);
1299*4882a593Smuzhiyun 		de->rx_ring[i].addr1 = cpu_to_le32(de->rx_skb[i].mapping);
1300*4882a593Smuzhiyun 		de->rx_ring[i].addr2 = 0;
1301*4882a593Smuzhiyun 	}
1302*4882a593Smuzhiyun 
1303*4882a593Smuzhiyun 	return 0;
1304*4882a593Smuzhiyun 
1305*4882a593Smuzhiyun err_out:
1306*4882a593Smuzhiyun 	de_clean_rings(de);
1307*4882a593Smuzhiyun 	return -ENOMEM;
1308*4882a593Smuzhiyun }
1309*4882a593Smuzhiyun 
de_init_rings(struct de_private * de)1310*4882a593Smuzhiyun static int de_init_rings (struct de_private *de)
1311*4882a593Smuzhiyun {
1312*4882a593Smuzhiyun 	memset(de->tx_ring, 0, sizeof(struct de_desc) * DE_TX_RING_SIZE);
1313*4882a593Smuzhiyun 	de->tx_ring[DE_TX_RING_SIZE - 1].opts2 = cpu_to_le32(RingEnd);
1314*4882a593Smuzhiyun 
1315*4882a593Smuzhiyun 	de->rx_tail = 0;
1316*4882a593Smuzhiyun 	de->tx_head = de->tx_tail = 0;
1317*4882a593Smuzhiyun 
1318*4882a593Smuzhiyun 	return de_refill_rx (de);
1319*4882a593Smuzhiyun }
1320*4882a593Smuzhiyun 
de_alloc_rings(struct de_private * de)1321*4882a593Smuzhiyun static int de_alloc_rings (struct de_private *de)
1322*4882a593Smuzhiyun {
1323*4882a593Smuzhiyun 	de->rx_ring = dma_alloc_coherent(&de->pdev->dev, DE_RING_BYTES,
1324*4882a593Smuzhiyun 					 &de->ring_dma, GFP_KERNEL);
1325*4882a593Smuzhiyun 	if (!de->rx_ring)
1326*4882a593Smuzhiyun 		return -ENOMEM;
1327*4882a593Smuzhiyun 	de->tx_ring = &de->rx_ring[DE_RX_RING_SIZE];
1328*4882a593Smuzhiyun 	return de_init_rings(de);
1329*4882a593Smuzhiyun }
1330*4882a593Smuzhiyun 
de_clean_rings(struct de_private * de)1331*4882a593Smuzhiyun static void de_clean_rings (struct de_private *de)
1332*4882a593Smuzhiyun {
1333*4882a593Smuzhiyun 	unsigned i;
1334*4882a593Smuzhiyun 
1335*4882a593Smuzhiyun 	memset(de->rx_ring, 0, sizeof(struct de_desc) * DE_RX_RING_SIZE);
1336*4882a593Smuzhiyun 	de->rx_ring[DE_RX_RING_SIZE - 1].opts2 = cpu_to_le32(RingEnd);
1337*4882a593Smuzhiyun 	wmb();
1338*4882a593Smuzhiyun 	memset(de->tx_ring, 0, sizeof(struct de_desc) * DE_TX_RING_SIZE);
1339*4882a593Smuzhiyun 	de->tx_ring[DE_TX_RING_SIZE - 1].opts2 = cpu_to_le32(RingEnd);
1340*4882a593Smuzhiyun 	wmb();
1341*4882a593Smuzhiyun 
1342*4882a593Smuzhiyun 	for (i = 0; i < DE_RX_RING_SIZE; i++) {
1343*4882a593Smuzhiyun 		if (de->rx_skb[i].skb) {
1344*4882a593Smuzhiyun 			dma_unmap_single(&de->pdev->dev,
1345*4882a593Smuzhiyun 					 de->rx_skb[i].mapping, de->rx_buf_sz,
1346*4882a593Smuzhiyun 					 DMA_FROM_DEVICE);
1347*4882a593Smuzhiyun 			dev_kfree_skb(de->rx_skb[i].skb);
1348*4882a593Smuzhiyun 		}
1349*4882a593Smuzhiyun 	}
1350*4882a593Smuzhiyun 
1351*4882a593Smuzhiyun 	for (i = 0; i < DE_TX_RING_SIZE; i++) {
1352*4882a593Smuzhiyun 		struct sk_buff *skb = de->tx_skb[i].skb;
1353*4882a593Smuzhiyun 		if ((skb) && (skb != DE_DUMMY_SKB)) {
1354*4882a593Smuzhiyun 			if (skb != DE_SETUP_SKB) {
1355*4882a593Smuzhiyun 				de->dev->stats.tx_dropped++;
1356*4882a593Smuzhiyun 				dma_unmap_single(&de->pdev->dev,
1357*4882a593Smuzhiyun 						 de->tx_skb[i].mapping,
1358*4882a593Smuzhiyun 						 skb->len, DMA_TO_DEVICE);
1359*4882a593Smuzhiyun 				dev_kfree_skb(skb);
1360*4882a593Smuzhiyun 			} else {
1361*4882a593Smuzhiyun 				dma_unmap_single(&de->pdev->dev,
1362*4882a593Smuzhiyun 						 de->tx_skb[i].mapping,
1363*4882a593Smuzhiyun 						 sizeof(de->setup_frame),
1364*4882a593Smuzhiyun 						 DMA_TO_DEVICE);
1365*4882a593Smuzhiyun 			}
1366*4882a593Smuzhiyun 		}
1367*4882a593Smuzhiyun 	}
1368*4882a593Smuzhiyun 
1369*4882a593Smuzhiyun 	memset(&de->rx_skb, 0, sizeof(struct ring_info) * DE_RX_RING_SIZE);
1370*4882a593Smuzhiyun 	memset(&de->tx_skb, 0, sizeof(struct ring_info) * DE_TX_RING_SIZE);
1371*4882a593Smuzhiyun }
1372*4882a593Smuzhiyun 
de_free_rings(struct de_private * de)1373*4882a593Smuzhiyun static void de_free_rings (struct de_private *de)
1374*4882a593Smuzhiyun {
1375*4882a593Smuzhiyun 	de_clean_rings(de);
1376*4882a593Smuzhiyun 	dma_free_coherent(&de->pdev->dev, DE_RING_BYTES, de->rx_ring,
1377*4882a593Smuzhiyun 			  de->ring_dma);
1378*4882a593Smuzhiyun 	de->rx_ring = NULL;
1379*4882a593Smuzhiyun 	de->tx_ring = NULL;
1380*4882a593Smuzhiyun }
1381*4882a593Smuzhiyun 
de_open(struct net_device * dev)1382*4882a593Smuzhiyun static int de_open (struct net_device *dev)
1383*4882a593Smuzhiyun {
1384*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
1385*4882a593Smuzhiyun 	const int irq = de->pdev->irq;
1386*4882a593Smuzhiyun 	int rc;
1387*4882a593Smuzhiyun 
1388*4882a593Smuzhiyun 	netif_dbg(de, ifup, dev, "enabling interface\n");
1389*4882a593Smuzhiyun 
1390*4882a593Smuzhiyun 	de->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1391*4882a593Smuzhiyun 
1392*4882a593Smuzhiyun 	rc = de_alloc_rings(de);
1393*4882a593Smuzhiyun 	if (rc) {
1394*4882a593Smuzhiyun 		netdev_err(dev, "ring allocation failure, err=%d\n", rc);
1395*4882a593Smuzhiyun 		return rc;
1396*4882a593Smuzhiyun 	}
1397*4882a593Smuzhiyun 
1398*4882a593Smuzhiyun 	dw32(IntrMask, 0);
1399*4882a593Smuzhiyun 
1400*4882a593Smuzhiyun 	rc = request_irq(irq, de_interrupt, IRQF_SHARED, dev->name, dev);
1401*4882a593Smuzhiyun 	if (rc) {
1402*4882a593Smuzhiyun 		netdev_err(dev, "IRQ %d request failure, err=%d\n", irq, rc);
1403*4882a593Smuzhiyun 		goto err_out_free;
1404*4882a593Smuzhiyun 	}
1405*4882a593Smuzhiyun 
1406*4882a593Smuzhiyun 	rc = de_init_hw(de);
1407*4882a593Smuzhiyun 	if (rc) {
1408*4882a593Smuzhiyun 		netdev_err(dev, "h/w init failure, err=%d\n", rc);
1409*4882a593Smuzhiyun 		goto err_out_free_irq;
1410*4882a593Smuzhiyun 	}
1411*4882a593Smuzhiyun 
1412*4882a593Smuzhiyun 	netif_start_queue(dev);
1413*4882a593Smuzhiyun 	mod_timer(&de->media_timer, jiffies + DE_TIMER_NO_LINK);
1414*4882a593Smuzhiyun 
1415*4882a593Smuzhiyun 	return 0;
1416*4882a593Smuzhiyun 
1417*4882a593Smuzhiyun err_out_free_irq:
1418*4882a593Smuzhiyun 	free_irq(irq, dev);
1419*4882a593Smuzhiyun err_out_free:
1420*4882a593Smuzhiyun 	de_free_rings(de);
1421*4882a593Smuzhiyun 	return rc;
1422*4882a593Smuzhiyun }
1423*4882a593Smuzhiyun 
de_close(struct net_device * dev)1424*4882a593Smuzhiyun static int de_close (struct net_device *dev)
1425*4882a593Smuzhiyun {
1426*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
1427*4882a593Smuzhiyun 	unsigned long flags;
1428*4882a593Smuzhiyun 
1429*4882a593Smuzhiyun 	netif_dbg(de, ifdown, dev, "disabling interface\n");
1430*4882a593Smuzhiyun 
1431*4882a593Smuzhiyun 	del_timer_sync(&de->media_timer);
1432*4882a593Smuzhiyun 
1433*4882a593Smuzhiyun 	spin_lock_irqsave(&de->lock, flags);
1434*4882a593Smuzhiyun 	de_stop_hw(de);
1435*4882a593Smuzhiyun 	netif_stop_queue(dev);
1436*4882a593Smuzhiyun 	netif_carrier_off(dev);
1437*4882a593Smuzhiyun 	spin_unlock_irqrestore(&de->lock, flags);
1438*4882a593Smuzhiyun 
1439*4882a593Smuzhiyun 	free_irq(de->pdev->irq, dev);
1440*4882a593Smuzhiyun 
1441*4882a593Smuzhiyun 	de_free_rings(de);
1442*4882a593Smuzhiyun 	de_adapter_sleep(de);
1443*4882a593Smuzhiyun 	return 0;
1444*4882a593Smuzhiyun }
1445*4882a593Smuzhiyun 
de_tx_timeout(struct net_device * dev,unsigned int txqueue)1446*4882a593Smuzhiyun static void de_tx_timeout (struct net_device *dev, unsigned int txqueue)
1447*4882a593Smuzhiyun {
1448*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
1449*4882a593Smuzhiyun 	const int irq = de->pdev->irq;
1450*4882a593Smuzhiyun 
1451*4882a593Smuzhiyun 	netdev_dbg(dev, "NIC status %08x mode %08x sia %08x desc %u/%u/%u\n",
1452*4882a593Smuzhiyun 		   dr32(MacStatus), dr32(MacMode), dr32(SIAStatus),
1453*4882a593Smuzhiyun 		   de->rx_tail, de->tx_head, de->tx_tail);
1454*4882a593Smuzhiyun 
1455*4882a593Smuzhiyun 	del_timer_sync(&de->media_timer);
1456*4882a593Smuzhiyun 
1457*4882a593Smuzhiyun 	disable_irq(irq);
1458*4882a593Smuzhiyun 	spin_lock_irq(&de->lock);
1459*4882a593Smuzhiyun 
1460*4882a593Smuzhiyun 	de_stop_hw(de);
1461*4882a593Smuzhiyun 	netif_stop_queue(dev);
1462*4882a593Smuzhiyun 	netif_carrier_off(dev);
1463*4882a593Smuzhiyun 
1464*4882a593Smuzhiyun 	spin_unlock_irq(&de->lock);
1465*4882a593Smuzhiyun 	enable_irq(irq);
1466*4882a593Smuzhiyun 
1467*4882a593Smuzhiyun 	/* Update the error counts. */
1468*4882a593Smuzhiyun 	__de_get_stats(de);
1469*4882a593Smuzhiyun 
1470*4882a593Smuzhiyun 	synchronize_irq(irq);
1471*4882a593Smuzhiyun 	de_clean_rings(de);
1472*4882a593Smuzhiyun 
1473*4882a593Smuzhiyun 	de_init_rings(de);
1474*4882a593Smuzhiyun 
1475*4882a593Smuzhiyun 	de_init_hw(de);
1476*4882a593Smuzhiyun 
1477*4882a593Smuzhiyun 	netif_wake_queue(dev);
1478*4882a593Smuzhiyun }
1479*4882a593Smuzhiyun 
__de_get_regs(struct de_private * de,u8 * buf)1480*4882a593Smuzhiyun static void __de_get_regs(struct de_private *de, u8 *buf)
1481*4882a593Smuzhiyun {
1482*4882a593Smuzhiyun 	int i;
1483*4882a593Smuzhiyun 	u32 *rbuf = (u32 *)buf;
1484*4882a593Smuzhiyun 
1485*4882a593Smuzhiyun 	/* read all CSRs */
1486*4882a593Smuzhiyun 	for (i = 0; i < DE_NUM_REGS; i++)
1487*4882a593Smuzhiyun 		rbuf[i] = dr32(i * 8);
1488*4882a593Smuzhiyun 
1489*4882a593Smuzhiyun 	/* handle self-clearing RxMissed counter, CSR8 */
1490*4882a593Smuzhiyun 	de_rx_missed(de, rbuf[8]);
1491*4882a593Smuzhiyun }
1492*4882a593Smuzhiyun 
__de_get_link_ksettings(struct de_private * de,struct ethtool_link_ksettings * cmd)1493*4882a593Smuzhiyun static void __de_get_link_ksettings(struct de_private *de,
1494*4882a593Smuzhiyun 				    struct ethtool_link_ksettings *cmd)
1495*4882a593Smuzhiyun {
1496*4882a593Smuzhiyun 	ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
1497*4882a593Smuzhiyun 						de->media_supported);
1498*4882a593Smuzhiyun 	cmd->base.phy_address = 0;
1499*4882a593Smuzhiyun 	ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
1500*4882a593Smuzhiyun 						de->media_advertise);
1501*4882a593Smuzhiyun 
1502*4882a593Smuzhiyun 	switch (de->media_type) {
1503*4882a593Smuzhiyun 	case DE_MEDIA_AUI:
1504*4882a593Smuzhiyun 		cmd->base.port = PORT_AUI;
1505*4882a593Smuzhiyun 		break;
1506*4882a593Smuzhiyun 	case DE_MEDIA_BNC:
1507*4882a593Smuzhiyun 		cmd->base.port = PORT_BNC;
1508*4882a593Smuzhiyun 		break;
1509*4882a593Smuzhiyun 	default:
1510*4882a593Smuzhiyun 		cmd->base.port = PORT_TP;
1511*4882a593Smuzhiyun 		break;
1512*4882a593Smuzhiyun 	}
1513*4882a593Smuzhiyun 
1514*4882a593Smuzhiyun 	cmd->base.speed = 10;
1515*4882a593Smuzhiyun 
1516*4882a593Smuzhiyun 	if (dr32(MacMode) & FullDuplex)
1517*4882a593Smuzhiyun 		cmd->base.duplex = DUPLEX_FULL;
1518*4882a593Smuzhiyun 	else
1519*4882a593Smuzhiyun 		cmd->base.duplex = DUPLEX_HALF;
1520*4882a593Smuzhiyun 
1521*4882a593Smuzhiyun 	if (de->media_lock)
1522*4882a593Smuzhiyun 		cmd->base.autoneg = AUTONEG_DISABLE;
1523*4882a593Smuzhiyun 	else
1524*4882a593Smuzhiyun 		cmd->base.autoneg = AUTONEG_ENABLE;
1525*4882a593Smuzhiyun 
1526*4882a593Smuzhiyun 	/* ignore maxtxpkt, maxrxpkt for now */
1527*4882a593Smuzhiyun }
1528*4882a593Smuzhiyun 
__de_set_link_ksettings(struct de_private * de,const struct ethtool_link_ksettings * cmd)1529*4882a593Smuzhiyun static int __de_set_link_ksettings(struct de_private *de,
1530*4882a593Smuzhiyun 				   const struct ethtool_link_ksettings *cmd)
1531*4882a593Smuzhiyun {
1532*4882a593Smuzhiyun 	u32 new_media;
1533*4882a593Smuzhiyun 	unsigned int media_lock;
1534*4882a593Smuzhiyun 	u8 duplex = cmd->base.duplex;
1535*4882a593Smuzhiyun 	u8 port = cmd->base.port;
1536*4882a593Smuzhiyun 	u8 autoneg = cmd->base.autoneg;
1537*4882a593Smuzhiyun 	u32 advertising;
1538*4882a593Smuzhiyun 
1539*4882a593Smuzhiyun 	ethtool_convert_link_mode_to_legacy_u32(&advertising,
1540*4882a593Smuzhiyun 						cmd->link_modes.advertising);
1541*4882a593Smuzhiyun 
1542*4882a593Smuzhiyun 	if (cmd->base.speed != 10)
1543*4882a593Smuzhiyun 		return -EINVAL;
1544*4882a593Smuzhiyun 	if (duplex != DUPLEX_HALF && duplex != DUPLEX_FULL)
1545*4882a593Smuzhiyun 		return -EINVAL;
1546*4882a593Smuzhiyun 	if (port != PORT_TP && port != PORT_AUI && port != PORT_BNC)
1547*4882a593Smuzhiyun 		return -EINVAL;
1548*4882a593Smuzhiyun 	if (de->de21040 && port == PORT_BNC)
1549*4882a593Smuzhiyun 		return -EINVAL;
1550*4882a593Smuzhiyun 	if (autoneg != AUTONEG_DISABLE && autoneg != AUTONEG_ENABLE)
1551*4882a593Smuzhiyun 		return -EINVAL;
1552*4882a593Smuzhiyun 	if (advertising & ~de->media_supported)
1553*4882a593Smuzhiyun 		return -EINVAL;
1554*4882a593Smuzhiyun 	if (autoneg == AUTONEG_ENABLE &&
1555*4882a593Smuzhiyun 	    (!(advertising & ADVERTISED_Autoneg)))
1556*4882a593Smuzhiyun 		return -EINVAL;
1557*4882a593Smuzhiyun 
1558*4882a593Smuzhiyun 	switch (port) {
1559*4882a593Smuzhiyun 	case PORT_AUI:
1560*4882a593Smuzhiyun 		new_media = DE_MEDIA_AUI;
1561*4882a593Smuzhiyun 		if (!(advertising & ADVERTISED_AUI))
1562*4882a593Smuzhiyun 			return -EINVAL;
1563*4882a593Smuzhiyun 		break;
1564*4882a593Smuzhiyun 	case PORT_BNC:
1565*4882a593Smuzhiyun 		new_media = DE_MEDIA_BNC;
1566*4882a593Smuzhiyun 		if (!(advertising & ADVERTISED_BNC))
1567*4882a593Smuzhiyun 			return -EINVAL;
1568*4882a593Smuzhiyun 		break;
1569*4882a593Smuzhiyun 	default:
1570*4882a593Smuzhiyun 		if (autoneg == AUTONEG_ENABLE)
1571*4882a593Smuzhiyun 			new_media = DE_MEDIA_TP_AUTO;
1572*4882a593Smuzhiyun 		else if (duplex == DUPLEX_FULL)
1573*4882a593Smuzhiyun 			new_media = DE_MEDIA_TP_FD;
1574*4882a593Smuzhiyun 		else
1575*4882a593Smuzhiyun 			new_media = DE_MEDIA_TP;
1576*4882a593Smuzhiyun 		if (!(advertising & ADVERTISED_TP))
1577*4882a593Smuzhiyun 			return -EINVAL;
1578*4882a593Smuzhiyun 		if (!(advertising & (ADVERTISED_10baseT_Full |
1579*4882a593Smuzhiyun 				     ADVERTISED_10baseT_Half)))
1580*4882a593Smuzhiyun 			return -EINVAL;
1581*4882a593Smuzhiyun 		break;
1582*4882a593Smuzhiyun 	}
1583*4882a593Smuzhiyun 
1584*4882a593Smuzhiyun 	media_lock = (autoneg == AUTONEG_ENABLE) ? 0 : 1;
1585*4882a593Smuzhiyun 
1586*4882a593Smuzhiyun 	if ((new_media == de->media_type) &&
1587*4882a593Smuzhiyun 	    (media_lock == de->media_lock) &&
1588*4882a593Smuzhiyun 	    (advertising == de->media_advertise))
1589*4882a593Smuzhiyun 		return 0; /* nothing to change */
1590*4882a593Smuzhiyun 
1591*4882a593Smuzhiyun 	de_link_down(de);
1592*4882a593Smuzhiyun 	mod_timer(&de->media_timer, jiffies + DE_TIMER_NO_LINK);
1593*4882a593Smuzhiyun 	de_stop_rxtx(de);
1594*4882a593Smuzhiyun 
1595*4882a593Smuzhiyun 	de->media_type = new_media;
1596*4882a593Smuzhiyun 	de->media_lock = media_lock;
1597*4882a593Smuzhiyun 	de->media_advertise = advertising;
1598*4882a593Smuzhiyun 	de_set_media(de);
1599*4882a593Smuzhiyun 	if (netif_running(de->dev))
1600*4882a593Smuzhiyun 		de_start_rxtx(de);
1601*4882a593Smuzhiyun 
1602*4882a593Smuzhiyun 	return 0;
1603*4882a593Smuzhiyun }
1604*4882a593Smuzhiyun 
de_get_drvinfo(struct net_device * dev,struct ethtool_drvinfo * info)1605*4882a593Smuzhiyun static void de_get_drvinfo (struct net_device *dev,struct ethtool_drvinfo *info)
1606*4882a593Smuzhiyun {
1607*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
1608*4882a593Smuzhiyun 
1609*4882a593Smuzhiyun 	strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1610*4882a593Smuzhiyun 	strlcpy(info->bus_info, pci_name(de->pdev), sizeof(info->bus_info));
1611*4882a593Smuzhiyun }
1612*4882a593Smuzhiyun 
de_get_regs_len(struct net_device * dev)1613*4882a593Smuzhiyun static int de_get_regs_len(struct net_device *dev)
1614*4882a593Smuzhiyun {
1615*4882a593Smuzhiyun 	return DE_REGS_SIZE;
1616*4882a593Smuzhiyun }
1617*4882a593Smuzhiyun 
de_get_link_ksettings(struct net_device * dev,struct ethtool_link_ksettings * cmd)1618*4882a593Smuzhiyun static int de_get_link_ksettings(struct net_device *dev,
1619*4882a593Smuzhiyun 				 struct ethtool_link_ksettings *cmd)
1620*4882a593Smuzhiyun {
1621*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun 	spin_lock_irq(&de->lock);
1624*4882a593Smuzhiyun 	__de_get_link_ksettings(de, cmd);
1625*4882a593Smuzhiyun 	spin_unlock_irq(&de->lock);
1626*4882a593Smuzhiyun 
1627*4882a593Smuzhiyun 	return 0;
1628*4882a593Smuzhiyun }
1629*4882a593Smuzhiyun 
de_set_link_ksettings(struct net_device * dev,const struct ethtool_link_ksettings * cmd)1630*4882a593Smuzhiyun static int de_set_link_ksettings(struct net_device *dev,
1631*4882a593Smuzhiyun 				 const struct ethtool_link_ksettings *cmd)
1632*4882a593Smuzhiyun {
1633*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
1634*4882a593Smuzhiyun 	int rc;
1635*4882a593Smuzhiyun 
1636*4882a593Smuzhiyun 	spin_lock_irq(&de->lock);
1637*4882a593Smuzhiyun 	rc = __de_set_link_ksettings(de, cmd);
1638*4882a593Smuzhiyun 	spin_unlock_irq(&de->lock);
1639*4882a593Smuzhiyun 
1640*4882a593Smuzhiyun 	return rc;
1641*4882a593Smuzhiyun }
1642*4882a593Smuzhiyun 
de_get_msglevel(struct net_device * dev)1643*4882a593Smuzhiyun static u32 de_get_msglevel(struct net_device *dev)
1644*4882a593Smuzhiyun {
1645*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
1646*4882a593Smuzhiyun 
1647*4882a593Smuzhiyun 	return de->msg_enable;
1648*4882a593Smuzhiyun }
1649*4882a593Smuzhiyun 
de_set_msglevel(struct net_device * dev,u32 msglvl)1650*4882a593Smuzhiyun static void de_set_msglevel(struct net_device *dev, u32 msglvl)
1651*4882a593Smuzhiyun {
1652*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
1653*4882a593Smuzhiyun 
1654*4882a593Smuzhiyun 	de->msg_enable = msglvl;
1655*4882a593Smuzhiyun }
1656*4882a593Smuzhiyun 
de_get_eeprom(struct net_device * dev,struct ethtool_eeprom * eeprom,u8 * data)1657*4882a593Smuzhiyun static int de_get_eeprom(struct net_device *dev,
1658*4882a593Smuzhiyun 			 struct ethtool_eeprom *eeprom, u8 *data)
1659*4882a593Smuzhiyun {
1660*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
1661*4882a593Smuzhiyun 
1662*4882a593Smuzhiyun 	if (!de->ee_data)
1663*4882a593Smuzhiyun 		return -EOPNOTSUPP;
1664*4882a593Smuzhiyun 	if ((eeprom->offset != 0) || (eeprom->magic != 0) ||
1665*4882a593Smuzhiyun 	    (eeprom->len != DE_EEPROM_SIZE))
1666*4882a593Smuzhiyun 		return -EINVAL;
1667*4882a593Smuzhiyun 	memcpy(data, de->ee_data, eeprom->len);
1668*4882a593Smuzhiyun 
1669*4882a593Smuzhiyun 	return 0;
1670*4882a593Smuzhiyun }
1671*4882a593Smuzhiyun 
de_nway_reset(struct net_device * dev)1672*4882a593Smuzhiyun static int de_nway_reset(struct net_device *dev)
1673*4882a593Smuzhiyun {
1674*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
1675*4882a593Smuzhiyun 	u32 status;
1676*4882a593Smuzhiyun 
1677*4882a593Smuzhiyun 	if (de->media_type != DE_MEDIA_TP_AUTO)
1678*4882a593Smuzhiyun 		return -EINVAL;
1679*4882a593Smuzhiyun 	if (netif_carrier_ok(de->dev))
1680*4882a593Smuzhiyun 		de_link_down(de);
1681*4882a593Smuzhiyun 
1682*4882a593Smuzhiyun 	status = dr32(SIAStatus);
1683*4882a593Smuzhiyun 	dw32(SIAStatus, (status & ~NWayState) | NWayRestart);
1684*4882a593Smuzhiyun 	netif_info(de, link, dev, "link nway restart, status %x,%x\n",
1685*4882a593Smuzhiyun 		   status, dr32(SIAStatus));
1686*4882a593Smuzhiyun 	return 0;
1687*4882a593Smuzhiyun }
1688*4882a593Smuzhiyun 
de_get_regs(struct net_device * dev,struct ethtool_regs * regs,void * data)1689*4882a593Smuzhiyun static void de_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1690*4882a593Smuzhiyun 			void *data)
1691*4882a593Smuzhiyun {
1692*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
1693*4882a593Smuzhiyun 
1694*4882a593Smuzhiyun 	regs->version = (DE_REGS_VER << 2) | de->de21040;
1695*4882a593Smuzhiyun 
1696*4882a593Smuzhiyun 	spin_lock_irq(&de->lock);
1697*4882a593Smuzhiyun 	__de_get_regs(de, data);
1698*4882a593Smuzhiyun 	spin_unlock_irq(&de->lock);
1699*4882a593Smuzhiyun }
1700*4882a593Smuzhiyun 
1701*4882a593Smuzhiyun static const struct ethtool_ops de_ethtool_ops = {
1702*4882a593Smuzhiyun 	.get_link		= ethtool_op_get_link,
1703*4882a593Smuzhiyun 	.get_drvinfo		= de_get_drvinfo,
1704*4882a593Smuzhiyun 	.get_regs_len		= de_get_regs_len,
1705*4882a593Smuzhiyun 	.get_msglevel		= de_get_msglevel,
1706*4882a593Smuzhiyun 	.set_msglevel		= de_set_msglevel,
1707*4882a593Smuzhiyun 	.get_eeprom		= de_get_eeprom,
1708*4882a593Smuzhiyun 	.nway_reset		= de_nway_reset,
1709*4882a593Smuzhiyun 	.get_regs		= de_get_regs,
1710*4882a593Smuzhiyun 	.get_link_ksettings	= de_get_link_ksettings,
1711*4882a593Smuzhiyun 	.set_link_ksettings	= de_set_link_ksettings,
1712*4882a593Smuzhiyun };
1713*4882a593Smuzhiyun 
de21040_get_mac_address(struct de_private * de)1714*4882a593Smuzhiyun static void de21040_get_mac_address(struct de_private *de)
1715*4882a593Smuzhiyun {
1716*4882a593Smuzhiyun 	unsigned i;
1717*4882a593Smuzhiyun 
1718*4882a593Smuzhiyun 	dw32 (ROMCmd, 0);	/* Reset the pointer with a dummy write. */
1719*4882a593Smuzhiyun 	udelay(5);
1720*4882a593Smuzhiyun 
1721*4882a593Smuzhiyun 	for (i = 0; i < 6; i++) {
1722*4882a593Smuzhiyun 		int value, boguscnt = 100000;
1723*4882a593Smuzhiyun 		do {
1724*4882a593Smuzhiyun 			value = dr32(ROMCmd);
1725*4882a593Smuzhiyun 			rmb();
1726*4882a593Smuzhiyun 		} while (value < 0 && --boguscnt > 0);
1727*4882a593Smuzhiyun 		de->dev->dev_addr[i] = value;
1728*4882a593Smuzhiyun 		udelay(1);
1729*4882a593Smuzhiyun 		if (boguscnt <= 0)
1730*4882a593Smuzhiyun 			pr_warn("timeout reading 21040 MAC address byte %u\n",
1731*4882a593Smuzhiyun 				i);
1732*4882a593Smuzhiyun 	}
1733*4882a593Smuzhiyun }
1734*4882a593Smuzhiyun 
de21040_get_media_info(struct de_private * de)1735*4882a593Smuzhiyun static void de21040_get_media_info(struct de_private *de)
1736*4882a593Smuzhiyun {
1737*4882a593Smuzhiyun 	unsigned int i;
1738*4882a593Smuzhiyun 
1739*4882a593Smuzhiyun 	de->media_type = DE_MEDIA_TP;
1740*4882a593Smuzhiyun 	de->media_supported |= SUPPORTED_TP | SUPPORTED_10baseT_Full |
1741*4882a593Smuzhiyun 			       SUPPORTED_10baseT_Half | SUPPORTED_AUI;
1742*4882a593Smuzhiyun 	de->media_advertise = de->media_supported;
1743*4882a593Smuzhiyun 
1744*4882a593Smuzhiyun 	for (i = 0; i < DE_MAX_MEDIA; i++) {
1745*4882a593Smuzhiyun 		switch (i) {
1746*4882a593Smuzhiyun 		case DE_MEDIA_AUI:
1747*4882a593Smuzhiyun 		case DE_MEDIA_TP:
1748*4882a593Smuzhiyun 		case DE_MEDIA_TP_FD:
1749*4882a593Smuzhiyun 			de->media[i].type = i;
1750*4882a593Smuzhiyun 			de->media[i].csr13 = t21040_csr13[i];
1751*4882a593Smuzhiyun 			de->media[i].csr14 = t21040_csr14[i];
1752*4882a593Smuzhiyun 			de->media[i].csr15 = t21040_csr15[i];
1753*4882a593Smuzhiyun 			break;
1754*4882a593Smuzhiyun 		default:
1755*4882a593Smuzhiyun 			de->media[i].type = DE_MEDIA_INVALID;
1756*4882a593Smuzhiyun 			break;
1757*4882a593Smuzhiyun 		}
1758*4882a593Smuzhiyun 	}
1759*4882a593Smuzhiyun }
1760*4882a593Smuzhiyun 
1761*4882a593Smuzhiyun /* Note: this routine returns extra data bits for size detection. */
tulip_read_eeprom(void __iomem * regs,int location,int addr_len)1762*4882a593Smuzhiyun static unsigned tulip_read_eeprom(void __iomem *regs, int location,
1763*4882a593Smuzhiyun 				  int addr_len)
1764*4882a593Smuzhiyun {
1765*4882a593Smuzhiyun 	int i;
1766*4882a593Smuzhiyun 	unsigned retval = 0;
1767*4882a593Smuzhiyun 	void __iomem *ee_addr = regs + ROMCmd;
1768*4882a593Smuzhiyun 	int read_cmd = location | (EE_READ_CMD << addr_len);
1769*4882a593Smuzhiyun 
1770*4882a593Smuzhiyun 	writel(EE_ENB & ~EE_CS, ee_addr);
1771*4882a593Smuzhiyun 	writel(EE_ENB, ee_addr);
1772*4882a593Smuzhiyun 
1773*4882a593Smuzhiyun 	/* Shift the read command bits out. */
1774*4882a593Smuzhiyun 	for (i = 4 + addr_len; i >= 0; i--) {
1775*4882a593Smuzhiyun 		short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
1776*4882a593Smuzhiyun 		writel(EE_ENB | dataval, ee_addr);
1777*4882a593Smuzhiyun 		readl(ee_addr);
1778*4882a593Smuzhiyun 		writel(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
1779*4882a593Smuzhiyun 		readl(ee_addr);
1780*4882a593Smuzhiyun 		retval = (retval << 1) | ((readl(ee_addr) & EE_DATA_READ) ? 1 : 0);
1781*4882a593Smuzhiyun 	}
1782*4882a593Smuzhiyun 	writel(EE_ENB, ee_addr);
1783*4882a593Smuzhiyun 	readl(ee_addr);
1784*4882a593Smuzhiyun 
1785*4882a593Smuzhiyun 	for (i = 16; i > 0; i--) {
1786*4882a593Smuzhiyun 		writel(EE_ENB | EE_SHIFT_CLK, ee_addr);
1787*4882a593Smuzhiyun 		readl(ee_addr);
1788*4882a593Smuzhiyun 		retval = (retval << 1) | ((readl(ee_addr) & EE_DATA_READ) ? 1 : 0);
1789*4882a593Smuzhiyun 		writel(EE_ENB, ee_addr);
1790*4882a593Smuzhiyun 		readl(ee_addr);
1791*4882a593Smuzhiyun 	}
1792*4882a593Smuzhiyun 
1793*4882a593Smuzhiyun 	/* Terminate the EEPROM access. */
1794*4882a593Smuzhiyun 	writel(EE_ENB & ~EE_CS, ee_addr);
1795*4882a593Smuzhiyun 	return retval;
1796*4882a593Smuzhiyun }
1797*4882a593Smuzhiyun 
de21041_get_srom_info(struct de_private * de)1798*4882a593Smuzhiyun static void de21041_get_srom_info(struct de_private *de)
1799*4882a593Smuzhiyun {
1800*4882a593Smuzhiyun 	unsigned i, sa_offset = 0, ofs;
1801*4882a593Smuzhiyun 	u8 ee_data[DE_EEPROM_SIZE + 6] = {};
1802*4882a593Smuzhiyun 	unsigned ee_addr_size = tulip_read_eeprom(de->regs, 0xff, 8) & 0x40000 ? 8 : 6;
1803*4882a593Smuzhiyun 	struct de_srom_info_leaf *il;
1804*4882a593Smuzhiyun 	void *bufp;
1805*4882a593Smuzhiyun 
1806*4882a593Smuzhiyun 	/* download entire eeprom */
1807*4882a593Smuzhiyun 	for (i = 0; i < DE_EEPROM_WORDS; i++)
1808*4882a593Smuzhiyun 		((__le16 *)ee_data)[i] =
1809*4882a593Smuzhiyun 			cpu_to_le16(tulip_read_eeprom(de->regs, i, ee_addr_size));
1810*4882a593Smuzhiyun 
1811*4882a593Smuzhiyun 	/* DEC now has a specification but early board makers
1812*4882a593Smuzhiyun 	   just put the address in the first EEPROM locations. */
1813*4882a593Smuzhiyun 	/* This does  memcmp(eedata, eedata+16, 8) */
1814*4882a593Smuzhiyun 
1815*4882a593Smuzhiyun #ifndef CONFIG_MIPS_COBALT
1816*4882a593Smuzhiyun 
1817*4882a593Smuzhiyun 	for (i = 0; i < 8; i ++)
1818*4882a593Smuzhiyun 		if (ee_data[i] != ee_data[16+i])
1819*4882a593Smuzhiyun 			sa_offset = 20;
1820*4882a593Smuzhiyun 
1821*4882a593Smuzhiyun #endif
1822*4882a593Smuzhiyun 
1823*4882a593Smuzhiyun 	/* store MAC address */
1824*4882a593Smuzhiyun 	for (i = 0; i < 6; i ++)
1825*4882a593Smuzhiyun 		de->dev->dev_addr[i] = ee_data[i + sa_offset];
1826*4882a593Smuzhiyun 
1827*4882a593Smuzhiyun 	/* get offset of controller 0 info leaf.  ignore 2nd byte. */
1828*4882a593Smuzhiyun 	ofs = ee_data[SROMC0InfoLeaf];
1829*4882a593Smuzhiyun 	if (ofs >= (sizeof(ee_data) - sizeof(struct de_srom_info_leaf) - sizeof(struct de_srom_media_block)))
1830*4882a593Smuzhiyun 		goto bad_srom;
1831*4882a593Smuzhiyun 
1832*4882a593Smuzhiyun 	/* get pointer to info leaf */
1833*4882a593Smuzhiyun 	il = (struct de_srom_info_leaf *) &ee_data[ofs];
1834*4882a593Smuzhiyun 
1835*4882a593Smuzhiyun 	/* paranoia checks */
1836*4882a593Smuzhiyun 	if (il->n_blocks == 0)
1837*4882a593Smuzhiyun 		goto bad_srom;
1838*4882a593Smuzhiyun 	if ((sizeof(ee_data) - ofs) <
1839*4882a593Smuzhiyun 	    (sizeof(struct de_srom_info_leaf) + (sizeof(struct de_srom_media_block) * il->n_blocks)))
1840*4882a593Smuzhiyun 		goto bad_srom;
1841*4882a593Smuzhiyun 
1842*4882a593Smuzhiyun 	/* get default media type */
1843*4882a593Smuzhiyun 	switch (get_unaligned(&il->default_media)) {
1844*4882a593Smuzhiyun 	case 0x0001:  de->media_type = DE_MEDIA_BNC; break;
1845*4882a593Smuzhiyun 	case 0x0002:  de->media_type = DE_MEDIA_AUI; break;
1846*4882a593Smuzhiyun 	case 0x0204:  de->media_type = DE_MEDIA_TP_FD; break;
1847*4882a593Smuzhiyun 	default: de->media_type = DE_MEDIA_TP_AUTO; break;
1848*4882a593Smuzhiyun 	}
1849*4882a593Smuzhiyun 
1850*4882a593Smuzhiyun 	if (netif_msg_probe(de))
1851*4882a593Smuzhiyun 		pr_info("de%d: SROM leaf offset %u, default media %s\n",
1852*4882a593Smuzhiyun 		       de->board_idx, ofs, media_name[de->media_type]);
1853*4882a593Smuzhiyun 
1854*4882a593Smuzhiyun 	/* init SIA register values to defaults */
1855*4882a593Smuzhiyun 	for (i = 0; i < DE_MAX_MEDIA; i++) {
1856*4882a593Smuzhiyun 		de->media[i].type = DE_MEDIA_INVALID;
1857*4882a593Smuzhiyun 		de->media[i].csr13 = 0xffff;
1858*4882a593Smuzhiyun 		de->media[i].csr14 = 0xffff;
1859*4882a593Smuzhiyun 		de->media[i].csr15 = 0xffff;
1860*4882a593Smuzhiyun 	}
1861*4882a593Smuzhiyun 
1862*4882a593Smuzhiyun 	/* parse media blocks to see what medias are supported,
1863*4882a593Smuzhiyun 	 * and if any custom CSR values are provided
1864*4882a593Smuzhiyun 	 */
1865*4882a593Smuzhiyun 	bufp = ((void *)il) + sizeof(*il);
1866*4882a593Smuzhiyun 	for (i = 0; i < il->n_blocks; i++) {
1867*4882a593Smuzhiyun 		struct de_srom_media_block *ib = bufp;
1868*4882a593Smuzhiyun 		unsigned idx;
1869*4882a593Smuzhiyun 
1870*4882a593Smuzhiyun 		/* index based on media type in media block */
1871*4882a593Smuzhiyun 		switch(ib->opts & MediaBlockMask) {
1872*4882a593Smuzhiyun 		case 0: /* 10baseT */
1873*4882a593Smuzhiyun 			de->media_supported |= SUPPORTED_TP | SUPPORTED_10baseT_Half
1874*4882a593Smuzhiyun 					  | SUPPORTED_Autoneg;
1875*4882a593Smuzhiyun 			idx = DE_MEDIA_TP;
1876*4882a593Smuzhiyun 			de->media[DE_MEDIA_TP_AUTO].type = DE_MEDIA_TP_AUTO;
1877*4882a593Smuzhiyun 			break;
1878*4882a593Smuzhiyun 		case 1: /* BNC */
1879*4882a593Smuzhiyun 			de->media_supported |= SUPPORTED_BNC;
1880*4882a593Smuzhiyun 			idx = DE_MEDIA_BNC;
1881*4882a593Smuzhiyun 			break;
1882*4882a593Smuzhiyun 		case 2: /* AUI */
1883*4882a593Smuzhiyun 			de->media_supported |= SUPPORTED_AUI;
1884*4882a593Smuzhiyun 			idx = DE_MEDIA_AUI;
1885*4882a593Smuzhiyun 			break;
1886*4882a593Smuzhiyun 		case 4: /* 10baseT-FD */
1887*4882a593Smuzhiyun 			de->media_supported |= SUPPORTED_TP | SUPPORTED_10baseT_Full
1888*4882a593Smuzhiyun 					  | SUPPORTED_Autoneg;
1889*4882a593Smuzhiyun 			idx = DE_MEDIA_TP_FD;
1890*4882a593Smuzhiyun 			de->media[DE_MEDIA_TP_AUTO].type = DE_MEDIA_TP_AUTO;
1891*4882a593Smuzhiyun 			break;
1892*4882a593Smuzhiyun 		default:
1893*4882a593Smuzhiyun 			goto bad_srom;
1894*4882a593Smuzhiyun 		}
1895*4882a593Smuzhiyun 
1896*4882a593Smuzhiyun 		de->media[idx].type = idx;
1897*4882a593Smuzhiyun 
1898*4882a593Smuzhiyun 		if (netif_msg_probe(de))
1899*4882a593Smuzhiyun 			pr_info("de%d:   media block #%u: %s",
1900*4882a593Smuzhiyun 				de->board_idx, i,
1901*4882a593Smuzhiyun 				media_name[de->media[idx].type]);
1902*4882a593Smuzhiyun 
1903*4882a593Smuzhiyun 		bufp += sizeof (ib->opts);
1904*4882a593Smuzhiyun 
1905*4882a593Smuzhiyun 		if (ib->opts & MediaCustomCSRs) {
1906*4882a593Smuzhiyun 			de->media[idx].csr13 = get_unaligned(&ib->csr13);
1907*4882a593Smuzhiyun 			de->media[idx].csr14 = get_unaligned(&ib->csr14);
1908*4882a593Smuzhiyun 			de->media[idx].csr15 = get_unaligned(&ib->csr15);
1909*4882a593Smuzhiyun 			bufp += sizeof(ib->csr13) + sizeof(ib->csr14) +
1910*4882a593Smuzhiyun 				sizeof(ib->csr15);
1911*4882a593Smuzhiyun 
1912*4882a593Smuzhiyun 			if (netif_msg_probe(de))
1913*4882a593Smuzhiyun 				pr_cont(" (%x,%x,%x)\n",
1914*4882a593Smuzhiyun 					de->media[idx].csr13,
1915*4882a593Smuzhiyun 					de->media[idx].csr14,
1916*4882a593Smuzhiyun 					de->media[idx].csr15);
1917*4882a593Smuzhiyun 
1918*4882a593Smuzhiyun 		} else {
1919*4882a593Smuzhiyun 			if (netif_msg_probe(de))
1920*4882a593Smuzhiyun 				pr_cont("\n");
1921*4882a593Smuzhiyun 		}
1922*4882a593Smuzhiyun 
1923*4882a593Smuzhiyun 		if (bufp > ((void *)&ee_data[DE_EEPROM_SIZE - 3]))
1924*4882a593Smuzhiyun 			break;
1925*4882a593Smuzhiyun 	}
1926*4882a593Smuzhiyun 
1927*4882a593Smuzhiyun 	de->media_advertise = de->media_supported;
1928*4882a593Smuzhiyun 
1929*4882a593Smuzhiyun fill_defaults:
1930*4882a593Smuzhiyun 	/* fill in defaults, for cases where custom CSRs not used */
1931*4882a593Smuzhiyun 	for (i = 0; i < DE_MAX_MEDIA; i++) {
1932*4882a593Smuzhiyun 		if (de->media[i].csr13 == 0xffff)
1933*4882a593Smuzhiyun 			de->media[i].csr13 = t21041_csr13[i];
1934*4882a593Smuzhiyun 		if (de->media[i].csr14 == 0xffff) {
1935*4882a593Smuzhiyun 			/* autonegotiation is broken at least on some chip
1936*4882a593Smuzhiyun 			   revisions - rev. 0x21 works, 0x11 does not */
1937*4882a593Smuzhiyun 			if (de->pdev->revision < 0x20)
1938*4882a593Smuzhiyun 				de->media[i].csr14 = t21041_csr14_brk[i];
1939*4882a593Smuzhiyun 			else
1940*4882a593Smuzhiyun 				de->media[i].csr14 = t21041_csr14[i];
1941*4882a593Smuzhiyun 		}
1942*4882a593Smuzhiyun 		if (de->media[i].csr15 == 0xffff)
1943*4882a593Smuzhiyun 			de->media[i].csr15 = t21041_csr15[i];
1944*4882a593Smuzhiyun 	}
1945*4882a593Smuzhiyun 
1946*4882a593Smuzhiyun 	de->ee_data = kmemdup(&ee_data[0], DE_EEPROM_SIZE, GFP_KERNEL);
1947*4882a593Smuzhiyun 
1948*4882a593Smuzhiyun 	return;
1949*4882a593Smuzhiyun 
1950*4882a593Smuzhiyun bad_srom:
1951*4882a593Smuzhiyun 	/* for error cases, it's ok to assume we support all these */
1952*4882a593Smuzhiyun 	for (i = 0; i < DE_MAX_MEDIA; i++)
1953*4882a593Smuzhiyun 		de->media[i].type = i;
1954*4882a593Smuzhiyun 	de->media_supported =
1955*4882a593Smuzhiyun 		SUPPORTED_10baseT_Half |
1956*4882a593Smuzhiyun 		SUPPORTED_10baseT_Full |
1957*4882a593Smuzhiyun 		SUPPORTED_Autoneg |
1958*4882a593Smuzhiyun 		SUPPORTED_TP |
1959*4882a593Smuzhiyun 		SUPPORTED_AUI |
1960*4882a593Smuzhiyun 		SUPPORTED_BNC;
1961*4882a593Smuzhiyun 	goto fill_defaults;
1962*4882a593Smuzhiyun }
1963*4882a593Smuzhiyun 
1964*4882a593Smuzhiyun static const struct net_device_ops de_netdev_ops = {
1965*4882a593Smuzhiyun 	.ndo_open		= de_open,
1966*4882a593Smuzhiyun 	.ndo_stop		= de_close,
1967*4882a593Smuzhiyun 	.ndo_set_rx_mode	= de_set_rx_mode,
1968*4882a593Smuzhiyun 	.ndo_start_xmit		= de_start_xmit,
1969*4882a593Smuzhiyun 	.ndo_get_stats		= de_get_stats,
1970*4882a593Smuzhiyun 	.ndo_tx_timeout 	= de_tx_timeout,
1971*4882a593Smuzhiyun 	.ndo_set_mac_address 	= eth_mac_addr,
1972*4882a593Smuzhiyun 	.ndo_validate_addr	= eth_validate_addr,
1973*4882a593Smuzhiyun };
1974*4882a593Smuzhiyun 
de_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)1975*4882a593Smuzhiyun static int de_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1976*4882a593Smuzhiyun {
1977*4882a593Smuzhiyun 	struct net_device *dev;
1978*4882a593Smuzhiyun 	struct de_private *de;
1979*4882a593Smuzhiyun 	int rc;
1980*4882a593Smuzhiyun 	void __iomem *regs;
1981*4882a593Smuzhiyun 	unsigned long pciaddr;
1982*4882a593Smuzhiyun 	static int board_idx = -1;
1983*4882a593Smuzhiyun 
1984*4882a593Smuzhiyun 	board_idx++;
1985*4882a593Smuzhiyun 
1986*4882a593Smuzhiyun 	/* allocate a new ethernet device structure, and fill in defaults */
1987*4882a593Smuzhiyun 	dev = alloc_etherdev(sizeof(struct de_private));
1988*4882a593Smuzhiyun 	if (!dev)
1989*4882a593Smuzhiyun 		return -ENOMEM;
1990*4882a593Smuzhiyun 
1991*4882a593Smuzhiyun 	dev->netdev_ops = &de_netdev_ops;
1992*4882a593Smuzhiyun 	SET_NETDEV_DEV(dev, &pdev->dev);
1993*4882a593Smuzhiyun 	dev->ethtool_ops = &de_ethtool_ops;
1994*4882a593Smuzhiyun 	dev->watchdog_timeo = TX_TIMEOUT;
1995*4882a593Smuzhiyun 
1996*4882a593Smuzhiyun 	de = netdev_priv(dev);
1997*4882a593Smuzhiyun 	de->de21040 = ent->driver_data == 0 ? 1 : 0;
1998*4882a593Smuzhiyun 	de->pdev = pdev;
1999*4882a593Smuzhiyun 	de->dev = dev;
2000*4882a593Smuzhiyun 	de->msg_enable = (debug < 0 ? DE_DEF_MSG_ENABLE : debug);
2001*4882a593Smuzhiyun 	de->board_idx = board_idx;
2002*4882a593Smuzhiyun 	spin_lock_init (&de->lock);
2003*4882a593Smuzhiyun 	timer_setup(&de->media_timer,
2004*4882a593Smuzhiyun 		    de->de21040 ? de21040_media_timer : de21041_media_timer,
2005*4882a593Smuzhiyun 		    0);
2006*4882a593Smuzhiyun 
2007*4882a593Smuzhiyun 	netif_carrier_off(dev);
2008*4882a593Smuzhiyun 
2009*4882a593Smuzhiyun 	/* wake up device, assign resources */
2010*4882a593Smuzhiyun 	rc = pci_enable_device(pdev);
2011*4882a593Smuzhiyun 	if (rc)
2012*4882a593Smuzhiyun 		goto err_out_free;
2013*4882a593Smuzhiyun 
2014*4882a593Smuzhiyun 	/* reserve PCI resources to ensure driver atomicity */
2015*4882a593Smuzhiyun 	rc = pci_request_regions(pdev, DRV_NAME);
2016*4882a593Smuzhiyun 	if (rc)
2017*4882a593Smuzhiyun 		goto err_out_disable;
2018*4882a593Smuzhiyun 
2019*4882a593Smuzhiyun 	/* check for invalid IRQ value */
2020*4882a593Smuzhiyun 	if (pdev->irq < 2) {
2021*4882a593Smuzhiyun 		rc = -EIO;
2022*4882a593Smuzhiyun 		pr_err("invalid irq (%d) for pci dev %s\n",
2023*4882a593Smuzhiyun 		       pdev->irq, pci_name(pdev));
2024*4882a593Smuzhiyun 		goto err_out_res;
2025*4882a593Smuzhiyun 	}
2026*4882a593Smuzhiyun 
2027*4882a593Smuzhiyun 	/* obtain and check validity of PCI I/O address */
2028*4882a593Smuzhiyun 	pciaddr = pci_resource_start(pdev, 1);
2029*4882a593Smuzhiyun 	if (!pciaddr) {
2030*4882a593Smuzhiyun 		rc = -EIO;
2031*4882a593Smuzhiyun 		pr_err("no MMIO resource for pci dev %s\n", pci_name(pdev));
2032*4882a593Smuzhiyun 		goto err_out_res;
2033*4882a593Smuzhiyun 	}
2034*4882a593Smuzhiyun 	if (pci_resource_len(pdev, 1) < DE_REGS_SIZE) {
2035*4882a593Smuzhiyun 		rc = -EIO;
2036*4882a593Smuzhiyun 		pr_err("MMIO resource (%llx) too small on pci dev %s\n",
2037*4882a593Smuzhiyun 		       (unsigned long long)pci_resource_len(pdev, 1),
2038*4882a593Smuzhiyun 		       pci_name(pdev));
2039*4882a593Smuzhiyun 		goto err_out_res;
2040*4882a593Smuzhiyun 	}
2041*4882a593Smuzhiyun 
2042*4882a593Smuzhiyun 	/* remap CSR registers */
2043*4882a593Smuzhiyun 	regs = ioremap(pciaddr, DE_REGS_SIZE);
2044*4882a593Smuzhiyun 	if (!regs) {
2045*4882a593Smuzhiyun 		rc = -EIO;
2046*4882a593Smuzhiyun 		pr_err("Cannot map PCI MMIO (%llx@%lx) on pci dev %s\n",
2047*4882a593Smuzhiyun 		       (unsigned long long)pci_resource_len(pdev, 1),
2048*4882a593Smuzhiyun 		       pciaddr, pci_name(pdev));
2049*4882a593Smuzhiyun 		goto err_out_res;
2050*4882a593Smuzhiyun 	}
2051*4882a593Smuzhiyun 	de->regs = regs;
2052*4882a593Smuzhiyun 
2053*4882a593Smuzhiyun 	de_adapter_wake(de);
2054*4882a593Smuzhiyun 
2055*4882a593Smuzhiyun 	/* make sure hardware is not running */
2056*4882a593Smuzhiyun 	rc = de_reset_mac(de);
2057*4882a593Smuzhiyun 	if (rc) {
2058*4882a593Smuzhiyun 		pr_err("Cannot reset MAC, pci dev %s\n", pci_name(pdev));
2059*4882a593Smuzhiyun 		goto err_out_iomap;
2060*4882a593Smuzhiyun 	}
2061*4882a593Smuzhiyun 
2062*4882a593Smuzhiyun 	/* get MAC address, initialize default media type and
2063*4882a593Smuzhiyun 	 * get list of supported media
2064*4882a593Smuzhiyun 	 */
2065*4882a593Smuzhiyun 	if (de->de21040) {
2066*4882a593Smuzhiyun 		de21040_get_mac_address(de);
2067*4882a593Smuzhiyun 		de21040_get_media_info(de);
2068*4882a593Smuzhiyun 	} else {
2069*4882a593Smuzhiyun 		de21041_get_srom_info(de);
2070*4882a593Smuzhiyun 	}
2071*4882a593Smuzhiyun 
2072*4882a593Smuzhiyun 	/* register new network interface with kernel */
2073*4882a593Smuzhiyun 	rc = register_netdev(dev);
2074*4882a593Smuzhiyun 	if (rc)
2075*4882a593Smuzhiyun 		goto err_out_iomap;
2076*4882a593Smuzhiyun 
2077*4882a593Smuzhiyun 	/* print info about board and interface just registered */
2078*4882a593Smuzhiyun 	netdev_info(dev, "%s at %p, %pM, IRQ %d\n",
2079*4882a593Smuzhiyun 		    de->de21040 ? "21040" : "21041",
2080*4882a593Smuzhiyun 		    regs, dev->dev_addr, pdev->irq);
2081*4882a593Smuzhiyun 
2082*4882a593Smuzhiyun 	pci_set_drvdata(pdev, dev);
2083*4882a593Smuzhiyun 
2084*4882a593Smuzhiyun 	/* enable busmastering */
2085*4882a593Smuzhiyun 	pci_set_master(pdev);
2086*4882a593Smuzhiyun 
2087*4882a593Smuzhiyun 	/* put adapter to sleep */
2088*4882a593Smuzhiyun 	de_adapter_sleep(de);
2089*4882a593Smuzhiyun 
2090*4882a593Smuzhiyun 	return 0;
2091*4882a593Smuzhiyun 
2092*4882a593Smuzhiyun err_out_iomap:
2093*4882a593Smuzhiyun 	kfree(de->ee_data);
2094*4882a593Smuzhiyun 	iounmap(regs);
2095*4882a593Smuzhiyun err_out_res:
2096*4882a593Smuzhiyun 	pci_release_regions(pdev);
2097*4882a593Smuzhiyun err_out_disable:
2098*4882a593Smuzhiyun 	pci_disable_device(pdev);
2099*4882a593Smuzhiyun err_out_free:
2100*4882a593Smuzhiyun 	free_netdev(dev);
2101*4882a593Smuzhiyun 	return rc;
2102*4882a593Smuzhiyun }
2103*4882a593Smuzhiyun 
de_remove_one(struct pci_dev * pdev)2104*4882a593Smuzhiyun static void de_remove_one(struct pci_dev *pdev)
2105*4882a593Smuzhiyun {
2106*4882a593Smuzhiyun 	struct net_device *dev = pci_get_drvdata(pdev);
2107*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
2108*4882a593Smuzhiyun 
2109*4882a593Smuzhiyun 	BUG_ON(!dev);
2110*4882a593Smuzhiyun 	unregister_netdev(dev);
2111*4882a593Smuzhiyun 	kfree(de->ee_data);
2112*4882a593Smuzhiyun 	iounmap(de->regs);
2113*4882a593Smuzhiyun 	pci_release_regions(pdev);
2114*4882a593Smuzhiyun 	pci_disable_device(pdev);
2115*4882a593Smuzhiyun 	free_netdev(dev);
2116*4882a593Smuzhiyun }
2117*4882a593Smuzhiyun 
de_suspend(struct device * dev_d)2118*4882a593Smuzhiyun static int __maybe_unused de_suspend(struct device *dev_d)
2119*4882a593Smuzhiyun {
2120*4882a593Smuzhiyun 	struct pci_dev *pdev = to_pci_dev(dev_d);
2121*4882a593Smuzhiyun 	struct net_device *dev = pci_get_drvdata(pdev);
2122*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
2123*4882a593Smuzhiyun 
2124*4882a593Smuzhiyun 	rtnl_lock();
2125*4882a593Smuzhiyun 	if (netif_running (dev)) {
2126*4882a593Smuzhiyun 		const int irq = pdev->irq;
2127*4882a593Smuzhiyun 
2128*4882a593Smuzhiyun 		del_timer_sync(&de->media_timer);
2129*4882a593Smuzhiyun 
2130*4882a593Smuzhiyun 		disable_irq(irq);
2131*4882a593Smuzhiyun 		spin_lock_irq(&de->lock);
2132*4882a593Smuzhiyun 
2133*4882a593Smuzhiyun 		de_stop_hw(de);
2134*4882a593Smuzhiyun 		netif_stop_queue(dev);
2135*4882a593Smuzhiyun 		netif_device_detach(dev);
2136*4882a593Smuzhiyun 		netif_carrier_off(dev);
2137*4882a593Smuzhiyun 
2138*4882a593Smuzhiyun 		spin_unlock_irq(&de->lock);
2139*4882a593Smuzhiyun 		enable_irq(irq);
2140*4882a593Smuzhiyun 
2141*4882a593Smuzhiyun 		/* Update the error counts. */
2142*4882a593Smuzhiyun 		__de_get_stats(de);
2143*4882a593Smuzhiyun 
2144*4882a593Smuzhiyun 		synchronize_irq(irq);
2145*4882a593Smuzhiyun 		de_clean_rings(de);
2146*4882a593Smuzhiyun 
2147*4882a593Smuzhiyun 		de_adapter_sleep(de);
2148*4882a593Smuzhiyun 	} else {
2149*4882a593Smuzhiyun 		netif_device_detach(dev);
2150*4882a593Smuzhiyun 	}
2151*4882a593Smuzhiyun 	rtnl_unlock();
2152*4882a593Smuzhiyun 	return 0;
2153*4882a593Smuzhiyun }
2154*4882a593Smuzhiyun 
de_resume(struct device * dev_d)2155*4882a593Smuzhiyun static int __maybe_unused de_resume(struct device *dev_d)
2156*4882a593Smuzhiyun {
2157*4882a593Smuzhiyun 	struct pci_dev *pdev = to_pci_dev(dev_d);
2158*4882a593Smuzhiyun 	struct net_device *dev = pci_get_drvdata(pdev);
2159*4882a593Smuzhiyun 	struct de_private *de = netdev_priv(dev);
2160*4882a593Smuzhiyun 
2161*4882a593Smuzhiyun 	rtnl_lock();
2162*4882a593Smuzhiyun 	if (netif_device_present(dev))
2163*4882a593Smuzhiyun 		goto out;
2164*4882a593Smuzhiyun 	if (!netif_running(dev))
2165*4882a593Smuzhiyun 		goto out_attach;
2166*4882a593Smuzhiyun 	pci_set_master(pdev);
2167*4882a593Smuzhiyun 	de_init_rings(de);
2168*4882a593Smuzhiyun 	de_init_hw(de);
2169*4882a593Smuzhiyun out_attach:
2170*4882a593Smuzhiyun 	netif_device_attach(dev);
2171*4882a593Smuzhiyun out:
2172*4882a593Smuzhiyun 	rtnl_unlock();
2173*4882a593Smuzhiyun 	return 0;
2174*4882a593Smuzhiyun }
2175*4882a593Smuzhiyun 
2176*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(de_pm_ops, de_suspend, de_resume);
2177*4882a593Smuzhiyun 
2178*4882a593Smuzhiyun static struct pci_driver de_driver = {
2179*4882a593Smuzhiyun 	.name		= DRV_NAME,
2180*4882a593Smuzhiyun 	.id_table	= de_pci_tbl,
2181*4882a593Smuzhiyun 	.probe		= de_init_one,
2182*4882a593Smuzhiyun 	.remove		= de_remove_one,
2183*4882a593Smuzhiyun 	.driver.pm	= &de_pm_ops,
2184*4882a593Smuzhiyun };
2185*4882a593Smuzhiyun 
de_init(void)2186*4882a593Smuzhiyun static int __init de_init (void)
2187*4882a593Smuzhiyun {
2188*4882a593Smuzhiyun 	return pci_register_driver(&de_driver);
2189*4882a593Smuzhiyun }
2190*4882a593Smuzhiyun 
de_exit(void)2191*4882a593Smuzhiyun static void __exit de_exit (void)
2192*4882a593Smuzhiyun {
2193*4882a593Smuzhiyun 	pci_unregister_driver (&de_driver);
2194*4882a593Smuzhiyun }
2195*4882a593Smuzhiyun 
2196*4882a593Smuzhiyun module_init(de_init);
2197*4882a593Smuzhiyun module_exit(de_exit);
2198