xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/cisco/enic/vnic_dev.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
3*4882a593Smuzhiyun  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you may redistribute it and/or modify
6*4882a593Smuzhiyun  * it under the terms of the GNU General Public License as published by
7*4882a593Smuzhiyun  * the Free Software Foundation; version 2 of the License.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10*4882a593Smuzhiyun  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11*4882a593Smuzhiyun  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12*4882a593Smuzhiyun  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13*4882a593Smuzhiyun  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14*4882a593Smuzhiyun  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15*4882a593Smuzhiyun  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16*4882a593Smuzhiyun  * SOFTWARE.
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <linux/kernel.h>
21*4882a593Smuzhiyun #include <linux/errno.h>
22*4882a593Smuzhiyun #include <linux/types.h>
23*4882a593Smuzhiyun #include <linux/pci.h>
24*4882a593Smuzhiyun #include <linux/delay.h>
25*4882a593Smuzhiyun #include <linux/if_ether.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include "vnic_resource.h"
28*4882a593Smuzhiyun #include "vnic_devcmd.h"
29*4882a593Smuzhiyun #include "vnic_dev.h"
30*4882a593Smuzhiyun #include "vnic_wq.h"
31*4882a593Smuzhiyun #include "vnic_stats.h"
32*4882a593Smuzhiyun #include "enic.h"
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define VNIC_MAX_RES_HDR_SIZE \
35*4882a593Smuzhiyun 	(sizeof(struct vnic_resource_header) + \
36*4882a593Smuzhiyun 	sizeof(struct vnic_resource) * RES_TYPE_MAX)
37*4882a593Smuzhiyun #define VNIC_RES_STRIDE	128
38*4882a593Smuzhiyun 
vnic_dev_priv(struct vnic_dev * vdev)39*4882a593Smuzhiyun void *vnic_dev_priv(struct vnic_dev *vdev)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	return vdev->priv;
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun 
vnic_dev_discover_res(struct vnic_dev * vdev,struct vnic_dev_bar * bar,unsigned int num_bars)44*4882a593Smuzhiyun static int vnic_dev_discover_res(struct vnic_dev *vdev,
45*4882a593Smuzhiyun 	struct vnic_dev_bar *bar, unsigned int num_bars)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	struct vnic_resource_header __iomem *rh;
48*4882a593Smuzhiyun 	struct mgmt_barmap_hdr __iomem *mrh;
49*4882a593Smuzhiyun 	struct vnic_resource __iomem *r;
50*4882a593Smuzhiyun 	u8 type;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	if (num_bars == 0)
53*4882a593Smuzhiyun 		return -EINVAL;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
56*4882a593Smuzhiyun 		vdev_err(vdev, "vNIC BAR0 res hdr length error\n");
57*4882a593Smuzhiyun 		return -EINVAL;
58*4882a593Smuzhiyun 	}
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	rh  = bar->vaddr;
61*4882a593Smuzhiyun 	mrh = bar->vaddr;
62*4882a593Smuzhiyun 	if (!rh) {
63*4882a593Smuzhiyun 		vdev_err(vdev, "vNIC BAR0 res hdr not mem-mapped\n");
64*4882a593Smuzhiyun 		return -EINVAL;
65*4882a593Smuzhiyun 	}
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	/* Check for mgmt vnic in addition to normal vnic */
68*4882a593Smuzhiyun 	if ((ioread32(&rh->magic) != VNIC_RES_MAGIC) ||
69*4882a593Smuzhiyun 		(ioread32(&rh->version) != VNIC_RES_VERSION)) {
70*4882a593Smuzhiyun 		if ((ioread32(&mrh->magic) != MGMTVNIC_MAGIC) ||
71*4882a593Smuzhiyun 			(ioread32(&mrh->version) != MGMTVNIC_VERSION)) {
72*4882a593Smuzhiyun 			vdev_err(vdev, "vNIC BAR0 res magic/version error exp (%lx/%lx) or (%lx/%lx), curr (%x/%x)\n",
73*4882a593Smuzhiyun 				 VNIC_RES_MAGIC, VNIC_RES_VERSION,
74*4882a593Smuzhiyun 				 MGMTVNIC_MAGIC, MGMTVNIC_VERSION,
75*4882a593Smuzhiyun 				 ioread32(&rh->magic), ioread32(&rh->version));
76*4882a593Smuzhiyun 			return -EINVAL;
77*4882a593Smuzhiyun 		}
78*4882a593Smuzhiyun 	}
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	if (ioread32(&mrh->magic) == MGMTVNIC_MAGIC)
81*4882a593Smuzhiyun 		r = (struct vnic_resource __iomem *)(mrh + 1);
82*4882a593Smuzhiyun 	else
83*4882a593Smuzhiyun 		r = (struct vnic_resource __iomem *)(rh + 1);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 		u8 bar_num = ioread8(&r->bar);
89*4882a593Smuzhiyun 		u32 bar_offset = ioread32(&r->bar_offset);
90*4882a593Smuzhiyun 		u32 count = ioread32(&r->count);
91*4882a593Smuzhiyun 		u32 len;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 		r++;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 		if (bar_num >= num_bars)
96*4882a593Smuzhiyun 			continue;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 		if (!bar[bar_num].len || !bar[bar_num].vaddr)
99*4882a593Smuzhiyun 			continue;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 		switch (type) {
102*4882a593Smuzhiyun 		case RES_TYPE_WQ:
103*4882a593Smuzhiyun 		case RES_TYPE_RQ:
104*4882a593Smuzhiyun 		case RES_TYPE_CQ:
105*4882a593Smuzhiyun 		case RES_TYPE_INTR_CTRL:
106*4882a593Smuzhiyun 			/* each count is stride bytes long */
107*4882a593Smuzhiyun 			len = count * VNIC_RES_STRIDE;
108*4882a593Smuzhiyun 			if (len + bar_offset > bar[bar_num].len) {
109*4882a593Smuzhiyun 				vdev_err(vdev, "vNIC BAR0 resource %d out-of-bounds, offset 0x%x + size 0x%x > bar len 0x%lx\n",
110*4882a593Smuzhiyun 					 type, bar_offset, len,
111*4882a593Smuzhiyun 					 bar[bar_num].len);
112*4882a593Smuzhiyun 				return -EINVAL;
113*4882a593Smuzhiyun 			}
114*4882a593Smuzhiyun 			break;
115*4882a593Smuzhiyun 		case RES_TYPE_INTR_PBA_LEGACY:
116*4882a593Smuzhiyun 		case RES_TYPE_DEVCMD:
117*4882a593Smuzhiyun 		case RES_TYPE_DEVCMD2:
118*4882a593Smuzhiyun 			len = count;
119*4882a593Smuzhiyun 			break;
120*4882a593Smuzhiyun 		default:
121*4882a593Smuzhiyun 			continue;
122*4882a593Smuzhiyun 		}
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 		vdev->res[type].count = count;
125*4882a593Smuzhiyun 		vdev->res[type].vaddr = (char __iomem *)bar[bar_num].vaddr +
126*4882a593Smuzhiyun 			bar_offset;
127*4882a593Smuzhiyun 		vdev->res[type].bus_addr = bar[bar_num].bus_addr + bar_offset;
128*4882a593Smuzhiyun 	}
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	return 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
vnic_dev_get_res_count(struct vnic_dev * vdev,enum vnic_res_type type)133*4882a593Smuzhiyun unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
134*4882a593Smuzhiyun 	enum vnic_res_type type)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	return vdev->res[type].count;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun EXPORT_SYMBOL(vnic_dev_get_res_count);
139*4882a593Smuzhiyun 
vnic_dev_get_res(struct vnic_dev * vdev,enum vnic_res_type type,unsigned int index)140*4882a593Smuzhiyun void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
141*4882a593Smuzhiyun 	unsigned int index)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun 	if (!vdev->res[type].vaddr)
144*4882a593Smuzhiyun 		return NULL;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	switch (type) {
147*4882a593Smuzhiyun 	case RES_TYPE_WQ:
148*4882a593Smuzhiyun 	case RES_TYPE_RQ:
149*4882a593Smuzhiyun 	case RES_TYPE_CQ:
150*4882a593Smuzhiyun 	case RES_TYPE_INTR_CTRL:
151*4882a593Smuzhiyun 		return (char __iomem *)vdev->res[type].vaddr +
152*4882a593Smuzhiyun 			index * VNIC_RES_STRIDE;
153*4882a593Smuzhiyun 	default:
154*4882a593Smuzhiyun 		return (char __iomem *)vdev->res[type].vaddr;
155*4882a593Smuzhiyun 	}
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun EXPORT_SYMBOL(vnic_dev_get_res);
158*4882a593Smuzhiyun 
vnic_dev_desc_ring_size(struct vnic_dev_ring * ring,unsigned int desc_count,unsigned int desc_size)159*4882a593Smuzhiyun static unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
160*4882a593Smuzhiyun 	unsigned int desc_count, unsigned int desc_size)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun 	/* The base address of the desc rings must be 512 byte aligned.
163*4882a593Smuzhiyun 	 * Descriptor count is aligned to groups of 32 descriptors.  A
164*4882a593Smuzhiyun 	 * count of 0 means the maximum 4096 descriptors.  Descriptor
165*4882a593Smuzhiyun 	 * size is aligned to 16 bytes.
166*4882a593Smuzhiyun 	 */
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	unsigned int count_align = 32;
169*4882a593Smuzhiyun 	unsigned int desc_align = 16;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	ring->base_align = 512;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	if (desc_count == 0)
174*4882a593Smuzhiyun 		desc_count = 4096;
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	ring->desc_count = ALIGN(desc_count, count_align);
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	ring->desc_size = ALIGN(desc_size, desc_align);
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	ring->size = ring->desc_count * ring->desc_size;
181*4882a593Smuzhiyun 	ring->size_unaligned = ring->size + ring->base_align;
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	return ring->size_unaligned;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
vnic_dev_clear_desc_ring(struct vnic_dev_ring * ring)186*4882a593Smuzhiyun void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun 	memset(ring->descs, 0, ring->size);
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun 
vnic_dev_alloc_desc_ring(struct vnic_dev * vdev,struct vnic_dev_ring * ring,unsigned int desc_count,unsigned int desc_size)191*4882a593Smuzhiyun int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
192*4882a593Smuzhiyun 	unsigned int desc_count, unsigned int desc_size)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun 	vnic_dev_desc_ring_size(ring, desc_count, desc_size);
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	ring->descs_unaligned = dma_alloc_coherent(&vdev->pdev->dev,
197*4882a593Smuzhiyun 						   ring->size_unaligned,
198*4882a593Smuzhiyun 						   &ring->base_addr_unaligned,
199*4882a593Smuzhiyun 						   GFP_KERNEL);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	if (!ring->descs_unaligned) {
202*4882a593Smuzhiyun 		vdev_err(vdev, "Failed to allocate ring (size=%d), aborting\n",
203*4882a593Smuzhiyun 			 (int)ring->size);
204*4882a593Smuzhiyun 		return -ENOMEM;
205*4882a593Smuzhiyun 	}
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	ring->base_addr = ALIGN(ring->base_addr_unaligned,
208*4882a593Smuzhiyun 		ring->base_align);
209*4882a593Smuzhiyun 	ring->descs = (u8 *)ring->descs_unaligned +
210*4882a593Smuzhiyun 		(ring->base_addr - ring->base_addr_unaligned);
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	vnic_dev_clear_desc_ring(ring);
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	ring->desc_avail = ring->desc_count - 1;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	return 0;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun 
vnic_dev_free_desc_ring(struct vnic_dev * vdev,struct vnic_dev_ring * ring)219*4882a593Smuzhiyun void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	if (ring->descs) {
222*4882a593Smuzhiyun 		dma_free_coherent(&vdev->pdev->dev, ring->size_unaligned,
223*4882a593Smuzhiyun 				  ring->descs_unaligned,
224*4882a593Smuzhiyun 				  ring->base_addr_unaligned);
225*4882a593Smuzhiyun 		ring->descs = NULL;
226*4882a593Smuzhiyun 	}
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun 
_vnic_dev_cmd(struct vnic_dev * vdev,enum vnic_devcmd_cmd cmd,int wait)229*4882a593Smuzhiyun static int _vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
230*4882a593Smuzhiyun 	int wait)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun 	struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
233*4882a593Smuzhiyun 	unsigned int i;
234*4882a593Smuzhiyun 	int delay;
235*4882a593Smuzhiyun 	u32 status;
236*4882a593Smuzhiyun 	int err;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	status = ioread32(&devcmd->status);
239*4882a593Smuzhiyun 	if (status == 0xFFFFFFFF) {
240*4882a593Smuzhiyun 		/* PCI-e target device is gone */
241*4882a593Smuzhiyun 		return -ENODEV;
242*4882a593Smuzhiyun 	}
243*4882a593Smuzhiyun 	if (status & STAT_BUSY) {
244*4882a593Smuzhiyun 		vdev_neterr(vdev, "Busy devcmd %d\n", _CMD_N(cmd));
245*4882a593Smuzhiyun 		return -EBUSY;
246*4882a593Smuzhiyun 	}
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
249*4882a593Smuzhiyun 		for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
250*4882a593Smuzhiyun 			writeq(vdev->args[i], &devcmd->args[i]);
251*4882a593Smuzhiyun 		wmb();
252*4882a593Smuzhiyun 	}
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	iowrite32(cmd, &devcmd->cmd);
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
257*4882a593Smuzhiyun 		return 0;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	for (delay = 0; delay < wait; delay++) {
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 		udelay(100);
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 		status = ioread32(&devcmd->status);
264*4882a593Smuzhiyun 		if (status == 0xFFFFFFFF) {
265*4882a593Smuzhiyun 			/* PCI-e target device is gone */
266*4882a593Smuzhiyun 			return -ENODEV;
267*4882a593Smuzhiyun 		}
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 		if (!(status & STAT_BUSY)) {
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 			if (status & STAT_ERROR) {
272*4882a593Smuzhiyun 				err = (int)readq(&devcmd->args[0]);
273*4882a593Smuzhiyun 				if (err == ERR_EINVAL &&
274*4882a593Smuzhiyun 				    cmd == CMD_CAPABILITY)
275*4882a593Smuzhiyun 					return -err;
276*4882a593Smuzhiyun 				if (err != ERR_ECMDUNKNOWN ||
277*4882a593Smuzhiyun 				    cmd != CMD_CAPABILITY)
278*4882a593Smuzhiyun 					vdev_neterr(vdev, "Error %d devcmd %d\n",
279*4882a593Smuzhiyun 						    err, _CMD_N(cmd));
280*4882a593Smuzhiyun 				return -err;
281*4882a593Smuzhiyun 			}
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 			if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
284*4882a593Smuzhiyun 				rmb();
285*4882a593Smuzhiyun 				for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
286*4882a593Smuzhiyun 					vdev->args[i] = readq(&devcmd->args[i]);
287*4882a593Smuzhiyun 			}
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 			return 0;
290*4882a593Smuzhiyun 		}
291*4882a593Smuzhiyun 	}
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	vdev_neterr(vdev, "Timedout devcmd %d\n", _CMD_N(cmd));
294*4882a593Smuzhiyun 	return -ETIMEDOUT;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun 
_vnic_dev_cmd2(struct vnic_dev * vdev,enum vnic_devcmd_cmd cmd,int wait)297*4882a593Smuzhiyun static int _vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
298*4882a593Smuzhiyun 			  int wait)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	struct devcmd2_controller *dc2c = vdev->devcmd2;
301*4882a593Smuzhiyun 	struct devcmd2_result *result;
302*4882a593Smuzhiyun 	u8 color;
303*4882a593Smuzhiyun 	unsigned int i;
304*4882a593Smuzhiyun 	int delay, err;
305*4882a593Smuzhiyun 	u32 fetch_index, new_posted;
306*4882a593Smuzhiyun 	u32 posted = dc2c->posted;
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	fetch_index = ioread32(&dc2c->wq_ctrl->fetch_index);
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	if (fetch_index == 0xFFFFFFFF)
311*4882a593Smuzhiyun 		return -ENODEV;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	if (new_posted == fetch_index) {
316*4882a593Smuzhiyun 		vdev_neterr(vdev, "devcmd2 %d: wq is full. fetch index: %u, posted index: %u\n",
317*4882a593Smuzhiyun 			    _CMD_N(cmd), fetch_index, posted);
318*4882a593Smuzhiyun 		return -EBUSY;
319*4882a593Smuzhiyun 	}
320*4882a593Smuzhiyun 	dc2c->cmd_ring[posted].cmd = cmd;
321*4882a593Smuzhiyun 	dc2c->cmd_ring[posted].flags = 0;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
324*4882a593Smuzhiyun 		dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
325*4882a593Smuzhiyun 	if (_CMD_DIR(cmd) & _CMD_DIR_WRITE)
326*4882a593Smuzhiyun 		for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
327*4882a593Smuzhiyun 			dc2c->cmd_ring[posted].args[i] = vdev->args[i];
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	/* Adding write memory barrier prevents compiler and/or CPU reordering,
330*4882a593Smuzhiyun 	 * thus avoiding descriptor posting before descriptor is initialized.
331*4882a593Smuzhiyun 	 * Otherwise, hardware can read stale descriptor fields.
332*4882a593Smuzhiyun 	 */
333*4882a593Smuzhiyun 	wmb();
334*4882a593Smuzhiyun 	iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
335*4882a593Smuzhiyun 	dc2c->posted = new_posted;
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
338*4882a593Smuzhiyun 		return 0;
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	result = dc2c->result + dc2c->next_result;
341*4882a593Smuzhiyun 	color = dc2c->color;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	dc2c->next_result++;
344*4882a593Smuzhiyun 	if (dc2c->next_result == dc2c->result_size) {
345*4882a593Smuzhiyun 		dc2c->next_result = 0;
346*4882a593Smuzhiyun 		dc2c->color = dc2c->color ? 0 : 1;
347*4882a593Smuzhiyun 	}
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	for (delay = 0; delay < wait; delay++) {
350*4882a593Smuzhiyun 		if (result->color == color) {
351*4882a593Smuzhiyun 			if (result->error) {
352*4882a593Smuzhiyun 				err = result->error;
353*4882a593Smuzhiyun 				if (err != ERR_ECMDUNKNOWN ||
354*4882a593Smuzhiyun 				    cmd != CMD_CAPABILITY)
355*4882a593Smuzhiyun 					vdev_neterr(vdev, "Error %d devcmd %d\n",
356*4882a593Smuzhiyun 						    err, _CMD_N(cmd));
357*4882a593Smuzhiyun 				return -err;
358*4882a593Smuzhiyun 			}
359*4882a593Smuzhiyun 			if (_CMD_DIR(cmd) & _CMD_DIR_READ)
360*4882a593Smuzhiyun 				for (i = 0; i < VNIC_DEVCMD2_NARGS; i++)
361*4882a593Smuzhiyun 					vdev->args[i] = result->results[i];
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 			return 0;
364*4882a593Smuzhiyun 		}
365*4882a593Smuzhiyun 		udelay(100);
366*4882a593Smuzhiyun 	}
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	vdev_neterr(vdev, "devcmd %d timed out\n", _CMD_N(cmd));
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	return -ETIMEDOUT;
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun 
vnic_dev_init_devcmd1(struct vnic_dev * vdev)373*4882a593Smuzhiyun static int vnic_dev_init_devcmd1(struct vnic_dev *vdev)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun 	vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
376*4882a593Smuzhiyun 	if (!vdev->devcmd)
377*4882a593Smuzhiyun 		return -ENODEV;
378*4882a593Smuzhiyun 	vdev->devcmd_rtn = _vnic_dev_cmd;
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	return 0;
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun 
vnic_dev_init_devcmd2(struct vnic_dev * vdev)383*4882a593Smuzhiyun static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun 	int err;
386*4882a593Smuzhiyun 	unsigned int fetch_index;
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	if (vdev->devcmd2)
389*4882a593Smuzhiyun 		return 0;
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	vdev->devcmd2 = kzalloc(sizeof(*vdev->devcmd2), GFP_KERNEL);
392*4882a593Smuzhiyun 	if (!vdev->devcmd2)
393*4882a593Smuzhiyun 		return -ENOMEM;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	vdev->devcmd2->color = 1;
396*4882a593Smuzhiyun 	vdev->devcmd2->result_size = DEVCMD2_RING_SIZE;
397*4882a593Smuzhiyun 	err = enic_wq_devcmd2_alloc(vdev, &vdev->devcmd2->wq, DEVCMD2_RING_SIZE,
398*4882a593Smuzhiyun 				    DEVCMD2_DESC_SIZE);
399*4882a593Smuzhiyun 	if (err)
400*4882a593Smuzhiyun 		goto err_free_devcmd2;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
403*4882a593Smuzhiyun 	if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone  */
404*4882a593Smuzhiyun 		vdev_err(vdev, "Fatal error in devcmd2 init - hardware surprise removal\n");
405*4882a593Smuzhiyun 		err = -ENODEV;
406*4882a593Smuzhiyun 		goto err_free_wq;
407*4882a593Smuzhiyun 	}
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	enic_wq_init_start(&vdev->devcmd2->wq, 0, fetch_index, fetch_index, 0,
410*4882a593Smuzhiyun 			   0);
411*4882a593Smuzhiyun 	vdev->devcmd2->posted = fetch_index;
412*4882a593Smuzhiyun 	vnic_wq_enable(&vdev->devcmd2->wq);
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
415*4882a593Smuzhiyun 				       DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
416*4882a593Smuzhiyun 	if (err)
417*4882a593Smuzhiyun 		goto err_disable_wq;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	vdev->devcmd2->result = vdev->devcmd2->results_ring.descs;
420*4882a593Smuzhiyun 	vdev->devcmd2->cmd_ring = vdev->devcmd2->wq.ring.descs;
421*4882a593Smuzhiyun 	vdev->devcmd2->wq_ctrl = vdev->devcmd2->wq.ctrl;
422*4882a593Smuzhiyun 	vdev->args[0] = (u64)vdev->devcmd2->results_ring.base_addr |
423*4882a593Smuzhiyun 			VNIC_PADDR_TARGET;
424*4882a593Smuzhiyun 	vdev->args[1] = DEVCMD2_RING_SIZE;
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	err = _vnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, 1000);
427*4882a593Smuzhiyun 	if (err)
428*4882a593Smuzhiyun 		goto err_free_desc_ring;
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	vdev->devcmd_rtn = _vnic_dev_cmd2;
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	return 0;
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun err_free_desc_ring:
435*4882a593Smuzhiyun 	vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
436*4882a593Smuzhiyun err_disable_wq:
437*4882a593Smuzhiyun 	vnic_wq_disable(&vdev->devcmd2->wq);
438*4882a593Smuzhiyun err_free_wq:
439*4882a593Smuzhiyun 	vnic_wq_free(&vdev->devcmd2->wq);
440*4882a593Smuzhiyun err_free_devcmd2:
441*4882a593Smuzhiyun 	kfree(vdev->devcmd2);
442*4882a593Smuzhiyun 	vdev->devcmd2 = NULL;
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 	return err;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun 
vnic_dev_deinit_devcmd2(struct vnic_dev * vdev)447*4882a593Smuzhiyun static void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun 	vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
450*4882a593Smuzhiyun 	vnic_wq_disable(&vdev->devcmd2->wq);
451*4882a593Smuzhiyun 	vnic_wq_free(&vdev->devcmd2->wq);
452*4882a593Smuzhiyun 	kfree(vdev->devcmd2);
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun 
vnic_dev_cmd_proxy(struct vnic_dev * vdev,enum vnic_devcmd_cmd proxy_cmd,enum vnic_devcmd_cmd cmd,u64 * a0,u64 * a1,int wait)455*4882a593Smuzhiyun static int vnic_dev_cmd_proxy(struct vnic_dev *vdev,
456*4882a593Smuzhiyun 	enum vnic_devcmd_cmd proxy_cmd, enum vnic_devcmd_cmd cmd,
457*4882a593Smuzhiyun 	u64 *a0, u64 *a1, int wait)
458*4882a593Smuzhiyun {
459*4882a593Smuzhiyun 	u32 status;
460*4882a593Smuzhiyun 	int err;
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	memset(vdev->args, 0, sizeof(vdev->args));
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	vdev->args[0] = vdev->proxy_index;
465*4882a593Smuzhiyun 	vdev->args[1] = cmd;
466*4882a593Smuzhiyun 	vdev->args[2] = *a0;
467*4882a593Smuzhiyun 	vdev->args[3] = *a1;
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	err = vdev->devcmd_rtn(vdev, proxy_cmd, wait);
470*4882a593Smuzhiyun 	if (err)
471*4882a593Smuzhiyun 		return err;
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	status = (u32)vdev->args[0];
474*4882a593Smuzhiyun 	if (status & STAT_ERROR) {
475*4882a593Smuzhiyun 		err = (int)vdev->args[1];
476*4882a593Smuzhiyun 		if (err != ERR_ECMDUNKNOWN ||
477*4882a593Smuzhiyun 		    cmd != CMD_CAPABILITY)
478*4882a593Smuzhiyun 			vdev_neterr(vdev, "Error %d proxy devcmd %d\n",
479*4882a593Smuzhiyun 				    err, _CMD_N(cmd));
480*4882a593Smuzhiyun 		return err;
481*4882a593Smuzhiyun 	}
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	*a0 = vdev->args[1];
484*4882a593Smuzhiyun 	*a1 = vdev->args[2];
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	return 0;
487*4882a593Smuzhiyun }
488*4882a593Smuzhiyun 
vnic_dev_cmd_no_proxy(struct vnic_dev * vdev,enum vnic_devcmd_cmd cmd,u64 * a0,u64 * a1,int wait)489*4882a593Smuzhiyun static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
490*4882a593Smuzhiyun 	enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
491*4882a593Smuzhiyun {
492*4882a593Smuzhiyun 	int err;
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	vdev->args[0] = *a0;
495*4882a593Smuzhiyun 	vdev->args[1] = *a1;
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	err = vdev->devcmd_rtn(vdev, cmd, wait);
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	*a0 = vdev->args[0];
500*4882a593Smuzhiyun 	*a1 = vdev->args[1];
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	return err;
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun 
vnic_dev_cmd_proxy_by_index_start(struct vnic_dev * vdev,u16 index)505*4882a593Smuzhiyun void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index)
506*4882a593Smuzhiyun {
507*4882a593Smuzhiyun 	vdev->proxy = PROXY_BY_INDEX;
508*4882a593Smuzhiyun 	vdev->proxy_index = index;
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun 
vnic_dev_cmd_proxy_end(struct vnic_dev * vdev)511*4882a593Smuzhiyun void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun 	vdev->proxy = PROXY_NONE;
514*4882a593Smuzhiyun 	vdev->proxy_index = 0;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun 
vnic_dev_cmd(struct vnic_dev * vdev,enum vnic_devcmd_cmd cmd,u64 * a0,u64 * a1,int wait)517*4882a593Smuzhiyun int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
518*4882a593Smuzhiyun 	u64 *a0, u64 *a1, int wait)
519*4882a593Smuzhiyun {
520*4882a593Smuzhiyun 	memset(vdev->args, 0, sizeof(vdev->args));
521*4882a593Smuzhiyun 
522*4882a593Smuzhiyun 	switch (vdev->proxy) {
523*4882a593Smuzhiyun 	case PROXY_BY_INDEX:
524*4882a593Smuzhiyun 		return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_INDEX, cmd,
525*4882a593Smuzhiyun 				a0, a1, wait);
526*4882a593Smuzhiyun 	case PROXY_BY_BDF:
527*4882a593Smuzhiyun 		return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_BDF, cmd,
528*4882a593Smuzhiyun 				a0, a1, wait);
529*4882a593Smuzhiyun 	case PROXY_NONE:
530*4882a593Smuzhiyun 	default:
531*4882a593Smuzhiyun 		return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
532*4882a593Smuzhiyun 	}
533*4882a593Smuzhiyun }
534*4882a593Smuzhiyun 
vnic_dev_capable(struct vnic_dev * vdev,enum vnic_devcmd_cmd cmd)535*4882a593Smuzhiyun static int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd)
536*4882a593Smuzhiyun {
537*4882a593Smuzhiyun 	u64 a0 = (u32)cmd, a1 = 0;
538*4882a593Smuzhiyun 	int wait = 1000;
539*4882a593Smuzhiyun 	int err;
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 	return !(err || a0);
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun 
vnic_dev_fw_info(struct vnic_dev * vdev,struct vnic_devcmd_fw_info ** fw_info)546*4882a593Smuzhiyun int vnic_dev_fw_info(struct vnic_dev *vdev,
547*4882a593Smuzhiyun 	struct vnic_devcmd_fw_info **fw_info)
548*4882a593Smuzhiyun {
549*4882a593Smuzhiyun 	u64 a0, a1 = 0;
550*4882a593Smuzhiyun 	int wait = 1000;
551*4882a593Smuzhiyun 	int err = 0;
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	if (!vdev->fw_info) {
554*4882a593Smuzhiyun 		vdev->fw_info = dma_alloc_coherent(&vdev->pdev->dev,
555*4882a593Smuzhiyun 						   sizeof(struct vnic_devcmd_fw_info),
556*4882a593Smuzhiyun 						   &vdev->fw_info_pa, GFP_ATOMIC);
557*4882a593Smuzhiyun 		if (!vdev->fw_info)
558*4882a593Smuzhiyun 			return -ENOMEM;
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 		a0 = vdev->fw_info_pa;
561*4882a593Smuzhiyun 		a1 = sizeof(struct vnic_devcmd_fw_info);
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 		/* only get fw_info once and cache it */
564*4882a593Smuzhiyun 		if (vnic_dev_capable(vdev, CMD_MCPU_FW_INFO))
565*4882a593Smuzhiyun 			err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO,
566*4882a593Smuzhiyun 				&a0, &a1, wait);
567*4882a593Smuzhiyun 		else
568*4882a593Smuzhiyun 			err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO_OLD,
569*4882a593Smuzhiyun 				&a0, &a1, wait);
570*4882a593Smuzhiyun 	}
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 	*fw_info = vdev->fw_info;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	return err;
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun 
vnic_dev_spec(struct vnic_dev * vdev,unsigned int offset,unsigned int size,void * value)577*4882a593Smuzhiyun int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
578*4882a593Smuzhiyun 	void *value)
579*4882a593Smuzhiyun {
580*4882a593Smuzhiyun 	u64 a0, a1;
581*4882a593Smuzhiyun 	int wait = 1000;
582*4882a593Smuzhiyun 	int err;
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	a0 = offset;
585*4882a593Smuzhiyun 	a1 = size;
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 	err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	switch (size) {
590*4882a593Smuzhiyun 	case 1: *(u8 *)value = (u8)a0; break;
591*4882a593Smuzhiyun 	case 2: *(u16 *)value = (u16)a0; break;
592*4882a593Smuzhiyun 	case 4: *(u32 *)value = (u32)a0; break;
593*4882a593Smuzhiyun 	case 8: *(u64 *)value = a0; break;
594*4882a593Smuzhiyun 	default: BUG(); break;
595*4882a593Smuzhiyun 	}
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 	return err;
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun 
vnic_dev_stats_dump(struct vnic_dev * vdev,struct vnic_stats ** stats)600*4882a593Smuzhiyun int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
601*4882a593Smuzhiyun {
602*4882a593Smuzhiyun 	u64 a0, a1;
603*4882a593Smuzhiyun 	int wait = 1000;
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 	if (!vdev->stats) {
606*4882a593Smuzhiyun 		vdev->stats = dma_alloc_coherent(&vdev->pdev->dev,
607*4882a593Smuzhiyun 						 sizeof(struct vnic_stats),
608*4882a593Smuzhiyun 						 &vdev->stats_pa, GFP_ATOMIC);
609*4882a593Smuzhiyun 		if (!vdev->stats)
610*4882a593Smuzhiyun 			return -ENOMEM;
611*4882a593Smuzhiyun 	}
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun 	*stats = vdev->stats;
614*4882a593Smuzhiyun 	a0 = vdev->stats_pa;
615*4882a593Smuzhiyun 	a1 = sizeof(struct vnic_stats);
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun 	return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun 
vnic_dev_close(struct vnic_dev * vdev)620*4882a593Smuzhiyun int vnic_dev_close(struct vnic_dev *vdev)
621*4882a593Smuzhiyun {
622*4882a593Smuzhiyun 	u64 a0 = 0, a1 = 0;
623*4882a593Smuzhiyun 	int wait = 1000;
624*4882a593Smuzhiyun 	return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun 
vnic_dev_enable_wait(struct vnic_dev * vdev)627*4882a593Smuzhiyun int vnic_dev_enable_wait(struct vnic_dev *vdev)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun 	u64 a0 = 0, a1 = 0;
630*4882a593Smuzhiyun 	int wait = 1000;
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	if (vnic_dev_capable(vdev, CMD_ENABLE_WAIT))
633*4882a593Smuzhiyun 		return vnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);
634*4882a593Smuzhiyun 	else
635*4882a593Smuzhiyun 		return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
636*4882a593Smuzhiyun }
637*4882a593Smuzhiyun 
vnic_dev_disable(struct vnic_dev * vdev)638*4882a593Smuzhiyun int vnic_dev_disable(struct vnic_dev *vdev)
639*4882a593Smuzhiyun {
640*4882a593Smuzhiyun 	u64 a0 = 0, a1 = 0;
641*4882a593Smuzhiyun 	int wait = 1000;
642*4882a593Smuzhiyun 	return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
643*4882a593Smuzhiyun }
644*4882a593Smuzhiyun 
vnic_dev_open(struct vnic_dev * vdev,int arg)645*4882a593Smuzhiyun int vnic_dev_open(struct vnic_dev *vdev, int arg)
646*4882a593Smuzhiyun {
647*4882a593Smuzhiyun 	u64 a0 = (u32)arg, a1 = 0;
648*4882a593Smuzhiyun 	int wait = 1000;
649*4882a593Smuzhiyun 	return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
650*4882a593Smuzhiyun }
651*4882a593Smuzhiyun 
vnic_dev_open_done(struct vnic_dev * vdev,int * done)652*4882a593Smuzhiyun int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
653*4882a593Smuzhiyun {
654*4882a593Smuzhiyun 	u64 a0 = 0, a1 = 0;
655*4882a593Smuzhiyun 	int wait = 1000;
656*4882a593Smuzhiyun 	int err;
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun 	*done = 0;
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 	err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
661*4882a593Smuzhiyun 	if (err)
662*4882a593Smuzhiyun 		return err;
663*4882a593Smuzhiyun 
664*4882a593Smuzhiyun 	*done = (a0 == 0);
665*4882a593Smuzhiyun 
666*4882a593Smuzhiyun 	return 0;
667*4882a593Smuzhiyun }
668*4882a593Smuzhiyun 
vnic_dev_soft_reset(struct vnic_dev * vdev,int arg)669*4882a593Smuzhiyun int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
670*4882a593Smuzhiyun {
671*4882a593Smuzhiyun 	u64 a0 = (u32)arg, a1 = 0;
672*4882a593Smuzhiyun 	int wait = 1000;
673*4882a593Smuzhiyun 	return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
674*4882a593Smuzhiyun }
675*4882a593Smuzhiyun 
vnic_dev_soft_reset_done(struct vnic_dev * vdev,int * done)676*4882a593Smuzhiyun int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
677*4882a593Smuzhiyun {
678*4882a593Smuzhiyun 	u64 a0 = 0, a1 = 0;
679*4882a593Smuzhiyun 	int wait = 1000;
680*4882a593Smuzhiyun 	int err;
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 	*done = 0;
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun 	err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
685*4882a593Smuzhiyun 	if (err)
686*4882a593Smuzhiyun 		return err;
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun 	*done = (a0 == 0);
689*4882a593Smuzhiyun 
690*4882a593Smuzhiyun 	return 0;
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun 
vnic_dev_hang_reset(struct vnic_dev * vdev,int arg)693*4882a593Smuzhiyun int vnic_dev_hang_reset(struct vnic_dev *vdev, int arg)
694*4882a593Smuzhiyun {
695*4882a593Smuzhiyun 	u64 a0 = (u32)arg, a1 = 0;
696*4882a593Smuzhiyun 	int wait = 1000;
697*4882a593Smuzhiyun 	int err;
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun 	if (vnic_dev_capable(vdev, CMD_HANG_RESET)) {
700*4882a593Smuzhiyun 		return vnic_dev_cmd(vdev, CMD_HANG_RESET,
701*4882a593Smuzhiyun 				&a0, &a1, wait);
702*4882a593Smuzhiyun 	} else {
703*4882a593Smuzhiyun 		err = vnic_dev_soft_reset(vdev, arg);
704*4882a593Smuzhiyun 		if (err)
705*4882a593Smuzhiyun 			return err;
706*4882a593Smuzhiyun 		return vnic_dev_init(vdev, 0);
707*4882a593Smuzhiyun 	}
708*4882a593Smuzhiyun }
709*4882a593Smuzhiyun 
vnic_dev_hang_reset_done(struct vnic_dev * vdev,int * done)710*4882a593Smuzhiyun int vnic_dev_hang_reset_done(struct vnic_dev *vdev, int *done)
711*4882a593Smuzhiyun {
712*4882a593Smuzhiyun 	u64 a0 = 0, a1 = 0;
713*4882a593Smuzhiyun 	int wait = 1000;
714*4882a593Smuzhiyun 	int err;
715*4882a593Smuzhiyun 
716*4882a593Smuzhiyun 	*done = 0;
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 	if (vnic_dev_capable(vdev, CMD_HANG_RESET_STATUS)) {
719*4882a593Smuzhiyun 		err = vnic_dev_cmd(vdev, CMD_HANG_RESET_STATUS,
720*4882a593Smuzhiyun 				&a0, &a1, wait);
721*4882a593Smuzhiyun 		if (err)
722*4882a593Smuzhiyun 			return err;
723*4882a593Smuzhiyun 	} else {
724*4882a593Smuzhiyun 		return vnic_dev_soft_reset_done(vdev, done);
725*4882a593Smuzhiyun 	}
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun 	*done = (a0 == 0);
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	return 0;
730*4882a593Smuzhiyun }
731*4882a593Smuzhiyun 
vnic_dev_hang_notify(struct vnic_dev * vdev)732*4882a593Smuzhiyun int vnic_dev_hang_notify(struct vnic_dev *vdev)
733*4882a593Smuzhiyun {
734*4882a593Smuzhiyun 	u64 a0, a1;
735*4882a593Smuzhiyun 	int wait = 1000;
736*4882a593Smuzhiyun 	return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
737*4882a593Smuzhiyun }
738*4882a593Smuzhiyun 
vnic_dev_get_mac_addr(struct vnic_dev * vdev,u8 * mac_addr)739*4882a593Smuzhiyun int vnic_dev_get_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
740*4882a593Smuzhiyun {
741*4882a593Smuzhiyun 	u64 a0, a1;
742*4882a593Smuzhiyun 	int wait = 1000;
743*4882a593Smuzhiyun 	int err, i;
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun 	for (i = 0; i < ETH_ALEN; i++)
746*4882a593Smuzhiyun 		mac_addr[i] = 0;
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun 	err = vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
749*4882a593Smuzhiyun 	if (err)
750*4882a593Smuzhiyun 		return err;
751*4882a593Smuzhiyun 
752*4882a593Smuzhiyun 	for (i = 0; i < ETH_ALEN; i++)
753*4882a593Smuzhiyun 		mac_addr[i] = ((u8 *)&a0)[i];
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun 	return 0;
756*4882a593Smuzhiyun }
757*4882a593Smuzhiyun 
vnic_dev_packet_filter(struct vnic_dev * vdev,int directed,int multicast,int broadcast,int promisc,int allmulti)758*4882a593Smuzhiyun int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
759*4882a593Smuzhiyun 	int broadcast, int promisc, int allmulti)
760*4882a593Smuzhiyun {
761*4882a593Smuzhiyun 	u64 a0, a1 = 0;
762*4882a593Smuzhiyun 	int wait = 1000;
763*4882a593Smuzhiyun 	int err;
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun 	a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
766*4882a593Smuzhiyun 	     (multicast ? CMD_PFILTER_MULTICAST : 0) |
767*4882a593Smuzhiyun 	     (broadcast ? CMD_PFILTER_BROADCAST : 0) |
768*4882a593Smuzhiyun 	     (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
769*4882a593Smuzhiyun 	     (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun 	err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
772*4882a593Smuzhiyun 	if (err)
773*4882a593Smuzhiyun 		vdev_neterr(vdev, "Can't set packet filter\n");
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun 	return err;
776*4882a593Smuzhiyun }
777*4882a593Smuzhiyun 
vnic_dev_add_addr(struct vnic_dev * vdev,const u8 * addr)778*4882a593Smuzhiyun int vnic_dev_add_addr(struct vnic_dev *vdev, const u8 *addr)
779*4882a593Smuzhiyun {
780*4882a593Smuzhiyun 	u64 a0 = 0, a1 = 0;
781*4882a593Smuzhiyun 	int wait = 1000;
782*4882a593Smuzhiyun 	int err;
783*4882a593Smuzhiyun 	int i;
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun 	for (i = 0; i < ETH_ALEN; i++)
786*4882a593Smuzhiyun 		((u8 *)&a0)[i] = addr[i];
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 	err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
789*4882a593Smuzhiyun 	if (err)
790*4882a593Smuzhiyun 		vdev_neterr(vdev, "Can't add addr [%pM], %d\n", addr, err);
791*4882a593Smuzhiyun 
792*4882a593Smuzhiyun 	return err;
793*4882a593Smuzhiyun }
794*4882a593Smuzhiyun 
vnic_dev_del_addr(struct vnic_dev * vdev,const u8 * addr)795*4882a593Smuzhiyun int vnic_dev_del_addr(struct vnic_dev *vdev, const u8 *addr)
796*4882a593Smuzhiyun {
797*4882a593Smuzhiyun 	u64 a0 = 0, a1 = 0;
798*4882a593Smuzhiyun 	int wait = 1000;
799*4882a593Smuzhiyun 	int err;
800*4882a593Smuzhiyun 	int i;
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun 	for (i = 0; i < ETH_ALEN; i++)
803*4882a593Smuzhiyun 		((u8 *)&a0)[i] = addr[i];
804*4882a593Smuzhiyun 
805*4882a593Smuzhiyun 	err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);
806*4882a593Smuzhiyun 	if (err)
807*4882a593Smuzhiyun 		vdev_neterr(vdev, "Can't del addr [%pM], %d\n", addr, err);
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun 	return err;
810*4882a593Smuzhiyun }
811*4882a593Smuzhiyun 
vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev * vdev,u8 ig_vlan_rewrite_mode)812*4882a593Smuzhiyun int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,
813*4882a593Smuzhiyun 	u8 ig_vlan_rewrite_mode)
814*4882a593Smuzhiyun {
815*4882a593Smuzhiyun 	u64 a0 = ig_vlan_rewrite_mode, a1 = 0;
816*4882a593Smuzhiyun 	int wait = 1000;
817*4882a593Smuzhiyun 
818*4882a593Smuzhiyun 	if (vnic_dev_capable(vdev, CMD_IG_VLAN_REWRITE_MODE))
819*4882a593Smuzhiyun 		return vnic_dev_cmd(vdev, CMD_IG_VLAN_REWRITE_MODE,
820*4882a593Smuzhiyun 				&a0, &a1, wait);
821*4882a593Smuzhiyun 	else
822*4882a593Smuzhiyun 		return 0;
823*4882a593Smuzhiyun }
824*4882a593Smuzhiyun 
vnic_dev_notify_setcmd(struct vnic_dev * vdev,void * notify_addr,dma_addr_t notify_pa,u16 intr)825*4882a593Smuzhiyun static int vnic_dev_notify_setcmd(struct vnic_dev *vdev,
826*4882a593Smuzhiyun 	void *notify_addr, dma_addr_t notify_pa, u16 intr)
827*4882a593Smuzhiyun {
828*4882a593Smuzhiyun 	u64 a0, a1;
829*4882a593Smuzhiyun 	int wait = 1000;
830*4882a593Smuzhiyun 	int r;
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun 	memset(notify_addr, 0, sizeof(struct vnic_devcmd_notify));
833*4882a593Smuzhiyun 	vdev->notify = notify_addr;
834*4882a593Smuzhiyun 	vdev->notify_pa = notify_pa;
835*4882a593Smuzhiyun 
836*4882a593Smuzhiyun 	a0 = (u64)notify_pa;
837*4882a593Smuzhiyun 	a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
838*4882a593Smuzhiyun 	a1 += sizeof(struct vnic_devcmd_notify);
839*4882a593Smuzhiyun 
840*4882a593Smuzhiyun 	r = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
841*4882a593Smuzhiyun 	vdev->notify_sz = (r == 0) ? (u32)a1 : 0;
842*4882a593Smuzhiyun 	return r;
843*4882a593Smuzhiyun }
844*4882a593Smuzhiyun 
vnic_dev_notify_set(struct vnic_dev * vdev,u16 intr)845*4882a593Smuzhiyun int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
846*4882a593Smuzhiyun {
847*4882a593Smuzhiyun 	void *notify_addr;
848*4882a593Smuzhiyun 	dma_addr_t notify_pa;
849*4882a593Smuzhiyun 
850*4882a593Smuzhiyun 	if (vdev->notify || vdev->notify_pa) {
851*4882a593Smuzhiyun 		vdev_neterr(vdev, "notify block %p still allocated\n",
852*4882a593Smuzhiyun 			    vdev->notify);
853*4882a593Smuzhiyun 		return -EINVAL;
854*4882a593Smuzhiyun 	}
855*4882a593Smuzhiyun 
856*4882a593Smuzhiyun 	notify_addr = dma_alloc_coherent(&vdev->pdev->dev,
857*4882a593Smuzhiyun 					 sizeof(struct vnic_devcmd_notify),
858*4882a593Smuzhiyun 					 &notify_pa, GFP_ATOMIC);
859*4882a593Smuzhiyun 	if (!notify_addr)
860*4882a593Smuzhiyun 		return -ENOMEM;
861*4882a593Smuzhiyun 
862*4882a593Smuzhiyun 	return vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun 
vnic_dev_notify_unsetcmd(struct vnic_dev * vdev)865*4882a593Smuzhiyun static int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev)
866*4882a593Smuzhiyun {
867*4882a593Smuzhiyun 	u64 a0, a1;
868*4882a593Smuzhiyun 	int wait = 1000;
869*4882a593Smuzhiyun 	int err;
870*4882a593Smuzhiyun 
871*4882a593Smuzhiyun 	a0 = 0;  /* paddr = 0 to unset notify buffer */
872*4882a593Smuzhiyun 	a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
873*4882a593Smuzhiyun 	a1 += sizeof(struct vnic_devcmd_notify);
874*4882a593Smuzhiyun 
875*4882a593Smuzhiyun 	err = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
876*4882a593Smuzhiyun 	vdev->notify = NULL;
877*4882a593Smuzhiyun 	vdev->notify_pa = 0;
878*4882a593Smuzhiyun 	vdev->notify_sz = 0;
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun 	return err;
881*4882a593Smuzhiyun }
882*4882a593Smuzhiyun 
vnic_dev_notify_unset(struct vnic_dev * vdev)883*4882a593Smuzhiyun int vnic_dev_notify_unset(struct vnic_dev *vdev)
884*4882a593Smuzhiyun {
885*4882a593Smuzhiyun 	if (vdev->notify) {
886*4882a593Smuzhiyun 		dma_free_coherent(&vdev->pdev->dev,
887*4882a593Smuzhiyun 				  sizeof(struct vnic_devcmd_notify),
888*4882a593Smuzhiyun 				  vdev->notify, vdev->notify_pa);
889*4882a593Smuzhiyun 	}
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 	return vnic_dev_notify_unsetcmd(vdev);
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun 
vnic_dev_notify_ready(struct vnic_dev * vdev)894*4882a593Smuzhiyun static int vnic_dev_notify_ready(struct vnic_dev *vdev)
895*4882a593Smuzhiyun {
896*4882a593Smuzhiyun 	u32 *words;
897*4882a593Smuzhiyun 	unsigned int nwords = vdev->notify_sz / 4;
898*4882a593Smuzhiyun 	unsigned int i;
899*4882a593Smuzhiyun 	u32 csum;
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun 	if (!vdev->notify || !vdev->notify_sz)
902*4882a593Smuzhiyun 		return 0;
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun 	do {
905*4882a593Smuzhiyun 		csum = 0;
906*4882a593Smuzhiyun 		memcpy(&vdev->notify_copy, vdev->notify, vdev->notify_sz);
907*4882a593Smuzhiyun 		words = (u32 *)&vdev->notify_copy;
908*4882a593Smuzhiyun 		for (i = 1; i < nwords; i++)
909*4882a593Smuzhiyun 			csum += words[i];
910*4882a593Smuzhiyun 	} while (csum != words[0]);
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun 	return 1;
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun 
vnic_dev_init(struct vnic_dev * vdev,int arg)915*4882a593Smuzhiyun int vnic_dev_init(struct vnic_dev *vdev, int arg)
916*4882a593Smuzhiyun {
917*4882a593Smuzhiyun 	u64 a0 = (u32)arg, a1 = 0;
918*4882a593Smuzhiyun 	int wait = 1000;
919*4882a593Smuzhiyun 	int r = 0;
920*4882a593Smuzhiyun 
921*4882a593Smuzhiyun 	if (vnic_dev_capable(vdev, CMD_INIT))
922*4882a593Smuzhiyun 		r = vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
923*4882a593Smuzhiyun 	else {
924*4882a593Smuzhiyun 		vnic_dev_cmd(vdev, CMD_INIT_v1, &a0, &a1, wait);
925*4882a593Smuzhiyun 		if (a0 & CMD_INITF_DEFAULT_MAC) {
926*4882a593Smuzhiyun 			/* Emulate these for old CMD_INIT_v1 which
927*4882a593Smuzhiyun 			 * didn't pass a0 so no CMD_INITF_*.
928*4882a593Smuzhiyun 			 */
929*4882a593Smuzhiyun 			vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
930*4882a593Smuzhiyun 			vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
931*4882a593Smuzhiyun 		}
932*4882a593Smuzhiyun 	}
933*4882a593Smuzhiyun 	return r;
934*4882a593Smuzhiyun }
935*4882a593Smuzhiyun 
vnic_dev_deinit(struct vnic_dev * vdev)936*4882a593Smuzhiyun int vnic_dev_deinit(struct vnic_dev *vdev)
937*4882a593Smuzhiyun {
938*4882a593Smuzhiyun 	u64 a0 = 0, a1 = 0;
939*4882a593Smuzhiyun 	int wait = 1000;
940*4882a593Smuzhiyun 
941*4882a593Smuzhiyun 	return vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);
942*4882a593Smuzhiyun }
943*4882a593Smuzhiyun 
vnic_dev_intr_coal_timer_info_default(struct vnic_dev * vdev)944*4882a593Smuzhiyun void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev)
945*4882a593Smuzhiyun {
946*4882a593Smuzhiyun 	/* Default: hardware intr coal timer is in units of 1.5 usecs */
947*4882a593Smuzhiyun 	vdev->intr_coal_timer_info.mul = 2;
948*4882a593Smuzhiyun 	vdev->intr_coal_timer_info.div = 3;
949*4882a593Smuzhiyun 	vdev->intr_coal_timer_info.max_usec =
950*4882a593Smuzhiyun 		vnic_dev_intr_coal_timer_hw_to_usec(vdev, 0xffff);
951*4882a593Smuzhiyun }
952*4882a593Smuzhiyun 
vnic_dev_intr_coal_timer_info(struct vnic_dev * vdev)953*4882a593Smuzhiyun int vnic_dev_intr_coal_timer_info(struct vnic_dev *vdev)
954*4882a593Smuzhiyun {
955*4882a593Smuzhiyun 	int wait = 1000;
956*4882a593Smuzhiyun 	int err;
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun 	memset(vdev->args, 0, sizeof(vdev->args));
959*4882a593Smuzhiyun 
960*4882a593Smuzhiyun 	if (vnic_dev_capable(vdev, CMD_INTR_COAL_CONVERT))
961*4882a593Smuzhiyun 		err = vdev->devcmd_rtn(vdev, CMD_INTR_COAL_CONVERT, wait);
962*4882a593Smuzhiyun 	else
963*4882a593Smuzhiyun 		err = ERR_ECMDUNKNOWN;
964*4882a593Smuzhiyun 
965*4882a593Smuzhiyun 	/* Use defaults when firmware doesn't support the devcmd at all or
966*4882a593Smuzhiyun 	 * supports it for only specific hardware
967*4882a593Smuzhiyun 	 */
968*4882a593Smuzhiyun 	if ((err == ERR_ECMDUNKNOWN) ||
969*4882a593Smuzhiyun 		(!err && !(vdev->args[0] && vdev->args[1] && vdev->args[2]))) {
970*4882a593Smuzhiyun 		vdev_netwarn(vdev, "Using default conversion factor for interrupt coalesce timer\n");
971*4882a593Smuzhiyun 		vnic_dev_intr_coal_timer_info_default(vdev);
972*4882a593Smuzhiyun 		return 0;
973*4882a593Smuzhiyun 	}
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun 	if (!err) {
976*4882a593Smuzhiyun 		vdev->intr_coal_timer_info.mul = (u32) vdev->args[0];
977*4882a593Smuzhiyun 		vdev->intr_coal_timer_info.div = (u32) vdev->args[1];
978*4882a593Smuzhiyun 		vdev->intr_coal_timer_info.max_usec = (u32) vdev->args[2];
979*4882a593Smuzhiyun 	}
980*4882a593Smuzhiyun 
981*4882a593Smuzhiyun 	return err;
982*4882a593Smuzhiyun }
983*4882a593Smuzhiyun 
vnic_dev_link_status(struct vnic_dev * vdev)984*4882a593Smuzhiyun int vnic_dev_link_status(struct vnic_dev *vdev)
985*4882a593Smuzhiyun {
986*4882a593Smuzhiyun 	if (!vnic_dev_notify_ready(vdev))
987*4882a593Smuzhiyun 		return 0;
988*4882a593Smuzhiyun 
989*4882a593Smuzhiyun 	return vdev->notify_copy.link_state;
990*4882a593Smuzhiyun }
991*4882a593Smuzhiyun 
vnic_dev_port_speed(struct vnic_dev * vdev)992*4882a593Smuzhiyun u32 vnic_dev_port_speed(struct vnic_dev *vdev)
993*4882a593Smuzhiyun {
994*4882a593Smuzhiyun 	if (!vnic_dev_notify_ready(vdev))
995*4882a593Smuzhiyun 		return 0;
996*4882a593Smuzhiyun 
997*4882a593Smuzhiyun 	return vdev->notify_copy.port_speed;
998*4882a593Smuzhiyun }
999*4882a593Smuzhiyun 
vnic_dev_msg_lvl(struct vnic_dev * vdev)1000*4882a593Smuzhiyun u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
1001*4882a593Smuzhiyun {
1002*4882a593Smuzhiyun 	if (!vnic_dev_notify_ready(vdev))
1003*4882a593Smuzhiyun 		return 0;
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 	return vdev->notify_copy.msglvl;
1006*4882a593Smuzhiyun }
1007*4882a593Smuzhiyun 
vnic_dev_mtu(struct vnic_dev * vdev)1008*4882a593Smuzhiyun u32 vnic_dev_mtu(struct vnic_dev *vdev)
1009*4882a593Smuzhiyun {
1010*4882a593Smuzhiyun 	if (!vnic_dev_notify_ready(vdev))
1011*4882a593Smuzhiyun 		return 0;
1012*4882a593Smuzhiyun 
1013*4882a593Smuzhiyun 	return vdev->notify_copy.mtu;
1014*4882a593Smuzhiyun }
1015*4882a593Smuzhiyun 
vnic_dev_set_intr_mode(struct vnic_dev * vdev,enum vnic_dev_intr_mode intr_mode)1016*4882a593Smuzhiyun void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
1017*4882a593Smuzhiyun 	enum vnic_dev_intr_mode intr_mode)
1018*4882a593Smuzhiyun {
1019*4882a593Smuzhiyun 	vdev->intr_mode = intr_mode;
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun 
vnic_dev_get_intr_mode(struct vnic_dev * vdev)1022*4882a593Smuzhiyun enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
1023*4882a593Smuzhiyun 	struct vnic_dev *vdev)
1024*4882a593Smuzhiyun {
1025*4882a593Smuzhiyun 	return vdev->intr_mode;
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun 
vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev * vdev,u32 usec)1028*4882a593Smuzhiyun u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec)
1029*4882a593Smuzhiyun {
1030*4882a593Smuzhiyun 	return (usec * vdev->intr_coal_timer_info.mul) /
1031*4882a593Smuzhiyun 		vdev->intr_coal_timer_info.div;
1032*4882a593Smuzhiyun }
1033*4882a593Smuzhiyun 
vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev * vdev,u32 hw_cycles)1034*4882a593Smuzhiyun u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles)
1035*4882a593Smuzhiyun {
1036*4882a593Smuzhiyun 	return (hw_cycles * vdev->intr_coal_timer_info.div) /
1037*4882a593Smuzhiyun 		vdev->intr_coal_timer_info.mul;
1038*4882a593Smuzhiyun }
1039*4882a593Smuzhiyun 
vnic_dev_get_intr_coal_timer_max(struct vnic_dev * vdev)1040*4882a593Smuzhiyun u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev)
1041*4882a593Smuzhiyun {
1042*4882a593Smuzhiyun 	return vdev->intr_coal_timer_info.max_usec;
1043*4882a593Smuzhiyun }
1044*4882a593Smuzhiyun 
vnic_dev_unregister(struct vnic_dev * vdev)1045*4882a593Smuzhiyun void vnic_dev_unregister(struct vnic_dev *vdev)
1046*4882a593Smuzhiyun {
1047*4882a593Smuzhiyun 	if (vdev) {
1048*4882a593Smuzhiyun 		if (vdev->notify)
1049*4882a593Smuzhiyun 			dma_free_coherent(&vdev->pdev->dev,
1050*4882a593Smuzhiyun 					  sizeof(struct vnic_devcmd_notify),
1051*4882a593Smuzhiyun 					  vdev->notify, vdev->notify_pa);
1052*4882a593Smuzhiyun 		if (vdev->stats)
1053*4882a593Smuzhiyun 			dma_free_coherent(&vdev->pdev->dev,
1054*4882a593Smuzhiyun 					  sizeof(struct vnic_stats),
1055*4882a593Smuzhiyun 					  vdev->stats, vdev->stats_pa);
1056*4882a593Smuzhiyun 		if (vdev->fw_info)
1057*4882a593Smuzhiyun 			dma_free_coherent(&vdev->pdev->dev,
1058*4882a593Smuzhiyun 					  sizeof(struct vnic_devcmd_fw_info),
1059*4882a593Smuzhiyun 					  vdev->fw_info, vdev->fw_info_pa);
1060*4882a593Smuzhiyun 		if (vdev->devcmd2)
1061*4882a593Smuzhiyun 			vnic_dev_deinit_devcmd2(vdev);
1062*4882a593Smuzhiyun 
1063*4882a593Smuzhiyun 		kfree(vdev);
1064*4882a593Smuzhiyun 	}
1065*4882a593Smuzhiyun }
1066*4882a593Smuzhiyun EXPORT_SYMBOL(vnic_dev_unregister);
1067*4882a593Smuzhiyun 
vnic_dev_register(struct vnic_dev * vdev,void * priv,struct pci_dev * pdev,struct vnic_dev_bar * bar,unsigned int num_bars)1068*4882a593Smuzhiyun struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
1069*4882a593Smuzhiyun 	void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar,
1070*4882a593Smuzhiyun 	unsigned int num_bars)
1071*4882a593Smuzhiyun {
1072*4882a593Smuzhiyun 	if (!vdev) {
1073*4882a593Smuzhiyun 		vdev = kzalloc(sizeof(struct vnic_dev), GFP_KERNEL);
1074*4882a593Smuzhiyun 		if (!vdev)
1075*4882a593Smuzhiyun 			return NULL;
1076*4882a593Smuzhiyun 	}
1077*4882a593Smuzhiyun 
1078*4882a593Smuzhiyun 	vdev->priv = priv;
1079*4882a593Smuzhiyun 	vdev->pdev = pdev;
1080*4882a593Smuzhiyun 
1081*4882a593Smuzhiyun 	if (vnic_dev_discover_res(vdev, bar, num_bars))
1082*4882a593Smuzhiyun 		goto err_out;
1083*4882a593Smuzhiyun 
1084*4882a593Smuzhiyun 	return vdev;
1085*4882a593Smuzhiyun 
1086*4882a593Smuzhiyun err_out:
1087*4882a593Smuzhiyun 	vnic_dev_unregister(vdev);
1088*4882a593Smuzhiyun 	return NULL;
1089*4882a593Smuzhiyun }
1090*4882a593Smuzhiyun EXPORT_SYMBOL(vnic_dev_register);
1091*4882a593Smuzhiyun 
vnic_dev_get_pdev(struct vnic_dev * vdev)1092*4882a593Smuzhiyun struct pci_dev *vnic_dev_get_pdev(struct vnic_dev *vdev)
1093*4882a593Smuzhiyun {
1094*4882a593Smuzhiyun 	return vdev->pdev;
1095*4882a593Smuzhiyun }
1096*4882a593Smuzhiyun EXPORT_SYMBOL(vnic_dev_get_pdev);
1097*4882a593Smuzhiyun 
vnic_devcmd_init(struct vnic_dev * vdev)1098*4882a593Smuzhiyun int vnic_devcmd_init(struct vnic_dev *vdev)
1099*4882a593Smuzhiyun {
1100*4882a593Smuzhiyun 	void __iomem *res;
1101*4882a593Smuzhiyun 	int err;
1102*4882a593Smuzhiyun 
1103*4882a593Smuzhiyun 	res = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
1104*4882a593Smuzhiyun 	if (res) {
1105*4882a593Smuzhiyun 		err = vnic_dev_init_devcmd2(vdev);
1106*4882a593Smuzhiyun 		if (err)
1107*4882a593Smuzhiyun 			vdev_warn(vdev, "DEVCMD2 init failed: %d, Using DEVCMD1\n",
1108*4882a593Smuzhiyun 				  err);
1109*4882a593Smuzhiyun 		else
1110*4882a593Smuzhiyun 			return 0;
1111*4882a593Smuzhiyun 	} else {
1112*4882a593Smuzhiyun 		vdev_warn(vdev, "DEVCMD2 resource not found (old firmware?) Using DEVCMD1\n");
1113*4882a593Smuzhiyun 	}
1114*4882a593Smuzhiyun 	err = vnic_dev_init_devcmd1(vdev);
1115*4882a593Smuzhiyun 	if (err)
1116*4882a593Smuzhiyun 		vdev_err(vdev, "DEVCMD1 initialization failed: %d\n", err);
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun 	return err;
1119*4882a593Smuzhiyun }
1120*4882a593Smuzhiyun 
vnic_dev_init_prov2(struct vnic_dev * vdev,u8 * buf,u32 len)1121*4882a593Smuzhiyun int vnic_dev_init_prov2(struct vnic_dev *vdev, u8 *buf, u32 len)
1122*4882a593Smuzhiyun {
1123*4882a593Smuzhiyun 	u64 a0, a1 = len;
1124*4882a593Smuzhiyun 	int wait = 1000;
1125*4882a593Smuzhiyun 	dma_addr_t prov_pa;
1126*4882a593Smuzhiyun 	void *prov_buf;
1127*4882a593Smuzhiyun 	int ret;
1128*4882a593Smuzhiyun 
1129*4882a593Smuzhiyun 	prov_buf = dma_alloc_coherent(&vdev->pdev->dev, len, &prov_pa, GFP_ATOMIC);
1130*4882a593Smuzhiyun 	if (!prov_buf)
1131*4882a593Smuzhiyun 		return -ENOMEM;
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun 	memcpy(prov_buf, buf, len);
1134*4882a593Smuzhiyun 
1135*4882a593Smuzhiyun 	a0 = prov_pa;
1136*4882a593Smuzhiyun 
1137*4882a593Smuzhiyun 	ret = vnic_dev_cmd(vdev, CMD_INIT_PROV_INFO2, &a0, &a1, wait);
1138*4882a593Smuzhiyun 
1139*4882a593Smuzhiyun 	dma_free_coherent(&vdev->pdev->dev, len, prov_buf, prov_pa);
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun 	return ret;
1142*4882a593Smuzhiyun }
1143*4882a593Smuzhiyun 
vnic_dev_enable2(struct vnic_dev * vdev,int active)1144*4882a593Smuzhiyun int vnic_dev_enable2(struct vnic_dev *vdev, int active)
1145*4882a593Smuzhiyun {
1146*4882a593Smuzhiyun 	u64 a0, a1 = 0;
1147*4882a593Smuzhiyun 	int wait = 1000;
1148*4882a593Smuzhiyun 
1149*4882a593Smuzhiyun 	a0 = (active ? CMD_ENABLE2_ACTIVE : 0);
1150*4882a593Smuzhiyun 
1151*4882a593Smuzhiyun 	return vnic_dev_cmd(vdev, CMD_ENABLE2, &a0, &a1, wait);
1152*4882a593Smuzhiyun }
1153*4882a593Smuzhiyun 
vnic_dev_cmd_status(struct vnic_dev * vdev,enum vnic_devcmd_cmd cmd,int * status)1154*4882a593Smuzhiyun static int vnic_dev_cmd_status(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
1155*4882a593Smuzhiyun 	int *status)
1156*4882a593Smuzhiyun {
1157*4882a593Smuzhiyun 	u64 a0 = cmd, a1 = 0;
1158*4882a593Smuzhiyun 	int wait = 1000;
1159*4882a593Smuzhiyun 	int ret;
1160*4882a593Smuzhiyun 
1161*4882a593Smuzhiyun 	ret = vnic_dev_cmd(vdev, CMD_STATUS, &a0, &a1, wait);
1162*4882a593Smuzhiyun 	if (!ret)
1163*4882a593Smuzhiyun 		*status = (int)a0;
1164*4882a593Smuzhiyun 
1165*4882a593Smuzhiyun 	return ret;
1166*4882a593Smuzhiyun }
1167*4882a593Smuzhiyun 
vnic_dev_enable2_done(struct vnic_dev * vdev,int * status)1168*4882a593Smuzhiyun int vnic_dev_enable2_done(struct vnic_dev *vdev, int *status)
1169*4882a593Smuzhiyun {
1170*4882a593Smuzhiyun 	return vnic_dev_cmd_status(vdev, CMD_ENABLE2, status);
1171*4882a593Smuzhiyun }
1172*4882a593Smuzhiyun 
vnic_dev_deinit_done(struct vnic_dev * vdev,int * status)1173*4882a593Smuzhiyun int vnic_dev_deinit_done(struct vnic_dev *vdev, int *status)
1174*4882a593Smuzhiyun {
1175*4882a593Smuzhiyun 	return vnic_dev_cmd_status(vdev, CMD_DEINIT, status);
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun 
vnic_dev_set_mac_addr(struct vnic_dev * vdev,u8 * mac_addr)1178*4882a593Smuzhiyun int vnic_dev_set_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
1179*4882a593Smuzhiyun {
1180*4882a593Smuzhiyun 	u64 a0, a1;
1181*4882a593Smuzhiyun 	int wait = 1000;
1182*4882a593Smuzhiyun 	int i;
1183*4882a593Smuzhiyun 
1184*4882a593Smuzhiyun 	for (i = 0; i < ETH_ALEN; i++)
1185*4882a593Smuzhiyun 		((u8 *)&a0)[i] = mac_addr[i];
1186*4882a593Smuzhiyun 
1187*4882a593Smuzhiyun 	return vnic_dev_cmd(vdev, CMD_SET_MAC_ADDR, &a0, &a1, wait);
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun 
1190*4882a593Smuzhiyun /* vnic_dev_classifier: Add/Delete classifier entries
1191*4882a593Smuzhiyun  * @vdev: vdev of the device
1192*4882a593Smuzhiyun  * @cmd: CLSF_ADD for Add filter
1193*4882a593Smuzhiyun  *	 CLSF_DEL for Delete filter
1194*4882a593Smuzhiyun  * @entry: In case of ADD filter, the caller passes the RQ number in this
1195*4882a593Smuzhiyun  *	   variable.
1196*4882a593Smuzhiyun  *
1197*4882a593Smuzhiyun  *	   This function stores the filter_id returned by the firmware in the
1198*4882a593Smuzhiyun  *	   same variable before return;
1199*4882a593Smuzhiyun  *
1200*4882a593Smuzhiyun  *	   In case of DEL filter, the caller passes the RQ number. Return
1201*4882a593Smuzhiyun  *	   value is irrelevant.
1202*4882a593Smuzhiyun  * @data: filter data
1203*4882a593Smuzhiyun  */
vnic_dev_classifier(struct vnic_dev * vdev,u8 cmd,u16 * entry,struct filter * data)1204*4882a593Smuzhiyun int vnic_dev_classifier(struct vnic_dev *vdev, u8 cmd, u16 *entry,
1205*4882a593Smuzhiyun 			struct filter *data)
1206*4882a593Smuzhiyun {
1207*4882a593Smuzhiyun 	u64 a0, a1;
1208*4882a593Smuzhiyun 	int wait = 1000;
1209*4882a593Smuzhiyun 	dma_addr_t tlv_pa;
1210*4882a593Smuzhiyun 	int ret = -EINVAL;
1211*4882a593Smuzhiyun 	struct filter_tlv *tlv, *tlv_va;
1212*4882a593Smuzhiyun 	struct filter_action *action;
1213*4882a593Smuzhiyun 	u64 tlv_size;
1214*4882a593Smuzhiyun 
1215*4882a593Smuzhiyun 	if (cmd == CLSF_ADD) {
1216*4882a593Smuzhiyun 		tlv_size = sizeof(struct filter) +
1217*4882a593Smuzhiyun 			   sizeof(struct filter_action) +
1218*4882a593Smuzhiyun 			   2 * sizeof(struct filter_tlv);
1219*4882a593Smuzhiyun 		tlv_va = dma_alloc_coherent(&vdev->pdev->dev, tlv_size,
1220*4882a593Smuzhiyun 					    &tlv_pa, GFP_ATOMIC);
1221*4882a593Smuzhiyun 		if (!tlv_va)
1222*4882a593Smuzhiyun 			return -ENOMEM;
1223*4882a593Smuzhiyun 		tlv = tlv_va;
1224*4882a593Smuzhiyun 		a0 = tlv_pa;
1225*4882a593Smuzhiyun 		a1 = tlv_size;
1226*4882a593Smuzhiyun 		memset(tlv, 0, tlv_size);
1227*4882a593Smuzhiyun 		tlv->type = CLSF_TLV_FILTER;
1228*4882a593Smuzhiyun 		tlv->length = sizeof(struct filter);
1229*4882a593Smuzhiyun 		*(struct filter *)&tlv->val = *data;
1230*4882a593Smuzhiyun 
1231*4882a593Smuzhiyun 		tlv = (struct filter_tlv *)((char *)tlv +
1232*4882a593Smuzhiyun 					    sizeof(struct filter_tlv) +
1233*4882a593Smuzhiyun 					    sizeof(struct filter));
1234*4882a593Smuzhiyun 
1235*4882a593Smuzhiyun 		tlv->type = CLSF_TLV_ACTION;
1236*4882a593Smuzhiyun 		tlv->length = sizeof(struct filter_action);
1237*4882a593Smuzhiyun 		action = (struct filter_action *)&tlv->val;
1238*4882a593Smuzhiyun 		action->type = FILTER_ACTION_RQ_STEERING;
1239*4882a593Smuzhiyun 		action->u.rq_idx = *entry;
1240*4882a593Smuzhiyun 
1241*4882a593Smuzhiyun 		ret = vnic_dev_cmd(vdev, CMD_ADD_FILTER, &a0, &a1, wait);
1242*4882a593Smuzhiyun 		*entry = (u16)a0;
1243*4882a593Smuzhiyun 		dma_free_coherent(&vdev->pdev->dev, tlv_size, tlv_va, tlv_pa);
1244*4882a593Smuzhiyun 	} else if (cmd == CLSF_DEL) {
1245*4882a593Smuzhiyun 		a0 = *entry;
1246*4882a593Smuzhiyun 		ret = vnic_dev_cmd(vdev, CMD_DEL_FILTER, &a0, &a1, wait);
1247*4882a593Smuzhiyun 	}
1248*4882a593Smuzhiyun 
1249*4882a593Smuzhiyun 	return ret;
1250*4882a593Smuzhiyun }
1251*4882a593Smuzhiyun 
vnic_dev_overlay_offload_ctrl(struct vnic_dev * vdev,u8 overlay,u8 config)1252*4882a593Smuzhiyun int vnic_dev_overlay_offload_ctrl(struct vnic_dev *vdev, u8 overlay, u8 config)
1253*4882a593Smuzhiyun {
1254*4882a593Smuzhiyun 	u64 a0 = overlay;
1255*4882a593Smuzhiyun 	u64 a1 = config;
1256*4882a593Smuzhiyun 	int wait = 1000;
1257*4882a593Smuzhiyun 
1258*4882a593Smuzhiyun 	return vnic_dev_cmd(vdev, CMD_OVERLAY_OFFLOAD_CTRL, &a0, &a1, wait);
1259*4882a593Smuzhiyun }
1260*4882a593Smuzhiyun 
vnic_dev_overlay_offload_cfg(struct vnic_dev * vdev,u8 overlay,u16 vxlan_udp_port_number)1261*4882a593Smuzhiyun int vnic_dev_overlay_offload_cfg(struct vnic_dev *vdev, u8 overlay,
1262*4882a593Smuzhiyun 				 u16 vxlan_udp_port_number)
1263*4882a593Smuzhiyun {
1264*4882a593Smuzhiyun 	u64 a1 = vxlan_udp_port_number;
1265*4882a593Smuzhiyun 	u64 a0 = overlay;
1266*4882a593Smuzhiyun 	int wait = 1000;
1267*4882a593Smuzhiyun 
1268*4882a593Smuzhiyun 	return vnic_dev_cmd(vdev, CMD_OVERLAY_OFFLOAD_CFG, &a0, &a1, wait);
1269*4882a593Smuzhiyun }
1270*4882a593Smuzhiyun 
vnic_dev_get_supported_feature_ver(struct vnic_dev * vdev,u8 feature,u64 * supported_versions,u64 * a1)1271*4882a593Smuzhiyun int vnic_dev_get_supported_feature_ver(struct vnic_dev *vdev, u8 feature,
1272*4882a593Smuzhiyun 				       u64 *supported_versions, u64 *a1)
1273*4882a593Smuzhiyun {
1274*4882a593Smuzhiyun 	u64 a0 = feature;
1275*4882a593Smuzhiyun 	int wait = 1000;
1276*4882a593Smuzhiyun 	int ret;
1277*4882a593Smuzhiyun 
1278*4882a593Smuzhiyun 	ret = vnic_dev_cmd(vdev, CMD_GET_SUPP_FEATURE_VER, &a0, a1, wait);
1279*4882a593Smuzhiyun 	if (!ret)
1280*4882a593Smuzhiyun 		*supported_versions = a0;
1281*4882a593Smuzhiyun 
1282*4882a593Smuzhiyun 	return ret;
1283*4882a593Smuzhiyun }
1284*4882a593Smuzhiyun 
vnic_dev_capable_rss_hash_type(struct vnic_dev * vdev,u8 * rss_hash_type)1285*4882a593Smuzhiyun int vnic_dev_capable_rss_hash_type(struct vnic_dev *vdev, u8 *rss_hash_type)
1286*4882a593Smuzhiyun {
1287*4882a593Smuzhiyun 	u64 a0 = CMD_NIC_CFG, a1 = 0;
1288*4882a593Smuzhiyun 	int wait = 1000;
1289*4882a593Smuzhiyun 	int err;
1290*4882a593Smuzhiyun 
1291*4882a593Smuzhiyun 	err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);
1292*4882a593Smuzhiyun 	/* rss_hash_type is valid only when a0 is 1. Adapter which does not
1293*4882a593Smuzhiyun 	 * support CMD_CAPABILITY for rss_hash_type has a0 = 0
1294*4882a593Smuzhiyun 	 */
1295*4882a593Smuzhiyun 	if (err || (a0 != 1))
1296*4882a593Smuzhiyun 		return -EOPNOTSUPP;
1297*4882a593Smuzhiyun 
1298*4882a593Smuzhiyun 	a1 = (a1 >> NIC_CFG_RSS_HASH_TYPE_SHIFT) &
1299*4882a593Smuzhiyun 	     NIC_CFG_RSS_HASH_TYPE_MASK_FIELD;
1300*4882a593Smuzhiyun 
1301*4882a593Smuzhiyun 	*rss_hash_type = (u8)a1;
1302*4882a593Smuzhiyun 
1303*4882a593Smuzhiyun 	return 0;
1304*4882a593Smuzhiyun }
1305