xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/cisco/enic/enic_main.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
3*4882a593Smuzhiyun  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you may redistribute it and/or modify
6*4882a593Smuzhiyun  * it under the terms of the GNU General Public License as published by
7*4882a593Smuzhiyun  * the Free Software Foundation; version 2 of the License.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10*4882a593Smuzhiyun  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11*4882a593Smuzhiyun  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12*4882a593Smuzhiyun  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13*4882a593Smuzhiyun  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14*4882a593Smuzhiyun  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15*4882a593Smuzhiyun  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16*4882a593Smuzhiyun  * SOFTWARE.
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/kernel.h>
22*4882a593Smuzhiyun #include <linux/string.h>
23*4882a593Smuzhiyun #include <linux/errno.h>
24*4882a593Smuzhiyun #include <linux/types.h>
25*4882a593Smuzhiyun #include <linux/init.h>
26*4882a593Smuzhiyun #include <linux/interrupt.h>
27*4882a593Smuzhiyun #include <linux/workqueue.h>
28*4882a593Smuzhiyun #include <linux/pci.h>
29*4882a593Smuzhiyun #include <linux/netdevice.h>
30*4882a593Smuzhiyun #include <linux/etherdevice.h>
31*4882a593Smuzhiyun #include <linux/if.h>
32*4882a593Smuzhiyun #include <linux/if_ether.h>
33*4882a593Smuzhiyun #include <linux/if_vlan.h>
34*4882a593Smuzhiyun #include <linux/in.h>
35*4882a593Smuzhiyun #include <linux/ip.h>
36*4882a593Smuzhiyun #include <linux/ipv6.h>
37*4882a593Smuzhiyun #include <linux/tcp.h>
38*4882a593Smuzhiyun #include <linux/rtnetlink.h>
39*4882a593Smuzhiyun #include <linux/prefetch.h>
40*4882a593Smuzhiyun #include <net/ip6_checksum.h>
41*4882a593Smuzhiyun #include <linux/ktime.h>
42*4882a593Smuzhiyun #include <linux/numa.h>
43*4882a593Smuzhiyun #ifdef CONFIG_RFS_ACCEL
44*4882a593Smuzhiyun #include <linux/cpu_rmap.h>
45*4882a593Smuzhiyun #endif
46*4882a593Smuzhiyun #include <linux/crash_dump.h>
47*4882a593Smuzhiyun #include <net/busy_poll.h>
48*4882a593Smuzhiyun #include <net/vxlan.h>
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #include "cq_enet_desc.h"
51*4882a593Smuzhiyun #include "vnic_dev.h"
52*4882a593Smuzhiyun #include "vnic_intr.h"
53*4882a593Smuzhiyun #include "vnic_stats.h"
54*4882a593Smuzhiyun #include "vnic_vic.h"
55*4882a593Smuzhiyun #include "enic_res.h"
56*4882a593Smuzhiyun #include "enic.h"
57*4882a593Smuzhiyun #include "enic_dev.h"
58*4882a593Smuzhiyun #include "enic_pp.h"
59*4882a593Smuzhiyun #include "enic_clsf.h"
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #define ENIC_NOTIFY_TIMER_PERIOD	(2 * HZ)
62*4882a593Smuzhiyun #define WQ_ENET_MAX_DESC_LEN		(1 << WQ_ENET_LEN_BITS)
63*4882a593Smuzhiyun #define MAX_TSO				(1 << 16)
64*4882a593Smuzhiyun #define ENIC_DESC_MAX_SPLITS		(MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun #define PCI_DEVICE_ID_CISCO_VIC_ENET         0x0043  /* ethernet vnic */
67*4882a593Smuzhiyun #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN     0x0044  /* enet dynamic vnic */
68*4882a593Smuzhiyun #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF      0x0071  /* enet SRIOV VF */
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #define RX_COPYBREAK_DEFAULT		256
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun /* Supported devices */
73*4882a593Smuzhiyun static const struct pci_device_id enic_id_table[] = {
74*4882a593Smuzhiyun 	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
75*4882a593Smuzhiyun 	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
76*4882a593Smuzhiyun 	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
77*4882a593Smuzhiyun 	{ 0, }	/* end of table */
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun MODULE_DESCRIPTION(DRV_DESCRIPTION);
81*4882a593Smuzhiyun MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
82*4882a593Smuzhiyun MODULE_LICENSE("GPL");
83*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, enic_id_table);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun #define ENIC_LARGE_PKT_THRESHOLD		1000
86*4882a593Smuzhiyun #define ENIC_MAX_COALESCE_TIMERS		10
87*4882a593Smuzhiyun /*  Interrupt moderation table, which will be used to decide the
88*4882a593Smuzhiyun  *  coalescing timer values
89*4882a593Smuzhiyun  *  {rx_rate in Mbps, mapping percentage of the range}
90*4882a593Smuzhiyun  */
91*4882a593Smuzhiyun static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = {
92*4882a593Smuzhiyun 	{4000,  0},
93*4882a593Smuzhiyun 	{4400, 10},
94*4882a593Smuzhiyun 	{5060, 20},
95*4882a593Smuzhiyun 	{5230, 30},
96*4882a593Smuzhiyun 	{5540, 40},
97*4882a593Smuzhiyun 	{5820, 50},
98*4882a593Smuzhiyun 	{6120, 60},
99*4882a593Smuzhiyun 	{6435, 70},
100*4882a593Smuzhiyun 	{6745, 80},
101*4882a593Smuzhiyun 	{7000, 90},
102*4882a593Smuzhiyun 	{0xFFFFFFFF, 100}
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun /* This table helps the driver to pick different ranges for rx coalescing
106*4882a593Smuzhiyun  * timer depending on the link speed.
107*4882a593Smuzhiyun  */
108*4882a593Smuzhiyun static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = {
109*4882a593Smuzhiyun 	{0,  0}, /* 0  - 4  Gbps */
110*4882a593Smuzhiyun 	{0,  3}, /* 4  - 10 Gbps */
111*4882a593Smuzhiyun 	{3,  6}, /* 10 - 40 Gbps */
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun 
enic_init_affinity_hint(struct enic * enic)114*4882a593Smuzhiyun static void enic_init_affinity_hint(struct enic *enic)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	int numa_node = dev_to_node(&enic->pdev->dev);
117*4882a593Smuzhiyun 	int i;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	for (i = 0; i < enic->intr_count; i++) {
120*4882a593Smuzhiyun 		if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i) ||
121*4882a593Smuzhiyun 		    (cpumask_available(enic->msix[i].affinity_mask) &&
122*4882a593Smuzhiyun 		     !cpumask_empty(enic->msix[i].affinity_mask)))
123*4882a593Smuzhiyun 			continue;
124*4882a593Smuzhiyun 		if (zalloc_cpumask_var(&enic->msix[i].affinity_mask,
125*4882a593Smuzhiyun 				       GFP_KERNEL))
126*4882a593Smuzhiyun 			cpumask_set_cpu(cpumask_local_spread(i, numa_node),
127*4882a593Smuzhiyun 					enic->msix[i].affinity_mask);
128*4882a593Smuzhiyun 	}
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
enic_free_affinity_hint(struct enic * enic)131*4882a593Smuzhiyun static void enic_free_affinity_hint(struct enic *enic)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun 	int i;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	for (i = 0; i < enic->intr_count; i++) {
136*4882a593Smuzhiyun 		if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i))
137*4882a593Smuzhiyun 			continue;
138*4882a593Smuzhiyun 		free_cpumask_var(enic->msix[i].affinity_mask);
139*4882a593Smuzhiyun 	}
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun 
enic_set_affinity_hint(struct enic * enic)142*4882a593Smuzhiyun static void enic_set_affinity_hint(struct enic *enic)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	int i;
145*4882a593Smuzhiyun 	int err;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	for (i = 0; i < enic->intr_count; i++) {
148*4882a593Smuzhiyun 		if (enic_is_err_intr(enic, i)		||
149*4882a593Smuzhiyun 		    enic_is_notify_intr(enic, i)	||
150*4882a593Smuzhiyun 		    !cpumask_available(enic->msix[i].affinity_mask) ||
151*4882a593Smuzhiyun 		    cpumask_empty(enic->msix[i].affinity_mask))
152*4882a593Smuzhiyun 			continue;
153*4882a593Smuzhiyun 		err = irq_set_affinity_hint(enic->msix_entry[i].vector,
154*4882a593Smuzhiyun 					    enic->msix[i].affinity_mask);
155*4882a593Smuzhiyun 		if (err)
156*4882a593Smuzhiyun 			netdev_warn(enic->netdev, "irq_set_affinity_hint failed, err %d\n",
157*4882a593Smuzhiyun 				    err);
158*4882a593Smuzhiyun 	}
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	for (i = 0; i < enic->wq_count; i++) {
161*4882a593Smuzhiyun 		int wq_intr = enic_msix_wq_intr(enic, i);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 		if (cpumask_available(enic->msix[wq_intr].affinity_mask) &&
164*4882a593Smuzhiyun 		    !cpumask_empty(enic->msix[wq_intr].affinity_mask))
165*4882a593Smuzhiyun 			netif_set_xps_queue(enic->netdev,
166*4882a593Smuzhiyun 					    enic->msix[wq_intr].affinity_mask,
167*4882a593Smuzhiyun 					    i);
168*4882a593Smuzhiyun 	}
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
enic_unset_affinity_hint(struct enic * enic)171*4882a593Smuzhiyun static void enic_unset_affinity_hint(struct enic *enic)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	int i;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	for (i = 0; i < enic->intr_count; i++)
176*4882a593Smuzhiyun 		irq_set_affinity_hint(enic->msix_entry[i].vector, NULL);
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun 
enic_udp_tunnel_set_port(struct net_device * netdev,unsigned int table,unsigned int entry,struct udp_tunnel_info * ti)179*4882a593Smuzhiyun static int enic_udp_tunnel_set_port(struct net_device *netdev,
180*4882a593Smuzhiyun 				    unsigned int table, unsigned int entry,
181*4882a593Smuzhiyun 				    struct udp_tunnel_info *ti)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
184*4882a593Smuzhiyun 	int err;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	spin_lock_bh(&enic->devcmd_lock);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	err = vnic_dev_overlay_offload_cfg(enic->vdev,
189*4882a593Smuzhiyun 					   OVERLAY_CFG_VXLAN_PORT_UPDATE,
190*4882a593Smuzhiyun 					   ntohs(ti->port));
191*4882a593Smuzhiyun 	if (err)
192*4882a593Smuzhiyun 		goto error;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN,
195*4882a593Smuzhiyun 					    enic->vxlan.patch_level);
196*4882a593Smuzhiyun 	if (err)
197*4882a593Smuzhiyun 		goto error;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	enic->vxlan.vxlan_udp_port_number = ntohs(ti->port);
200*4882a593Smuzhiyun error:
201*4882a593Smuzhiyun 	spin_unlock_bh(&enic->devcmd_lock);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	return err;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun 
enic_udp_tunnel_unset_port(struct net_device * netdev,unsigned int table,unsigned int entry,struct udp_tunnel_info * ti)206*4882a593Smuzhiyun static int enic_udp_tunnel_unset_port(struct net_device *netdev,
207*4882a593Smuzhiyun 				      unsigned int table, unsigned int entry,
208*4882a593Smuzhiyun 				      struct udp_tunnel_info *ti)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
211*4882a593Smuzhiyun 	int err;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	spin_lock_bh(&enic->devcmd_lock);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN,
216*4882a593Smuzhiyun 					    OVERLAY_OFFLOAD_DISABLE);
217*4882a593Smuzhiyun 	if (err)
218*4882a593Smuzhiyun 		goto unlock;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	enic->vxlan.vxlan_udp_port_number = 0;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun unlock:
223*4882a593Smuzhiyun 	spin_unlock_bh(&enic->devcmd_lock);
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	return err;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun static const struct udp_tunnel_nic_info enic_udp_tunnels = {
229*4882a593Smuzhiyun 	.set_port	= enic_udp_tunnel_set_port,
230*4882a593Smuzhiyun 	.unset_port	= enic_udp_tunnel_unset_port,
231*4882a593Smuzhiyun 	.tables		= {
232*4882a593Smuzhiyun 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },
233*4882a593Smuzhiyun 	},
234*4882a593Smuzhiyun }, enic_udp_tunnels_v4 = {
235*4882a593Smuzhiyun 	.set_port	= enic_udp_tunnel_set_port,
236*4882a593Smuzhiyun 	.unset_port	= enic_udp_tunnel_unset_port,
237*4882a593Smuzhiyun 	.flags		= UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
238*4882a593Smuzhiyun 	.tables		= {
239*4882a593Smuzhiyun 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },
240*4882a593Smuzhiyun 	},
241*4882a593Smuzhiyun };
242*4882a593Smuzhiyun 
enic_features_check(struct sk_buff * skb,struct net_device * dev,netdev_features_t features)243*4882a593Smuzhiyun static netdev_features_t enic_features_check(struct sk_buff *skb,
244*4882a593Smuzhiyun 					     struct net_device *dev,
245*4882a593Smuzhiyun 					     netdev_features_t features)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun 	const struct ethhdr *eth = (struct ethhdr *)skb_inner_mac_header(skb);
248*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(dev);
249*4882a593Smuzhiyun 	struct udphdr *udph;
250*4882a593Smuzhiyun 	u16 port = 0;
251*4882a593Smuzhiyun 	u8 proto;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	if (!skb->encapsulation)
254*4882a593Smuzhiyun 		return features;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	features = vxlan_features_check(skb, features);
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	switch (vlan_get_protocol(skb)) {
259*4882a593Smuzhiyun 	case htons(ETH_P_IPV6):
260*4882a593Smuzhiyun 		if (!(enic->vxlan.flags & ENIC_VXLAN_OUTER_IPV6))
261*4882a593Smuzhiyun 			goto out;
262*4882a593Smuzhiyun 		proto = ipv6_hdr(skb)->nexthdr;
263*4882a593Smuzhiyun 		break;
264*4882a593Smuzhiyun 	case htons(ETH_P_IP):
265*4882a593Smuzhiyun 		proto = ip_hdr(skb)->protocol;
266*4882a593Smuzhiyun 		break;
267*4882a593Smuzhiyun 	default:
268*4882a593Smuzhiyun 		goto out;
269*4882a593Smuzhiyun 	}
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	switch (eth->h_proto) {
272*4882a593Smuzhiyun 	case ntohs(ETH_P_IPV6):
273*4882a593Smuzhiyun 		if (!(enic->vxlan.flags & ENIC_VXLAN_INNER_IPV6))
274*4882a593Smuzhiyun 			goto out;
275*4882a593Smuzhiyun 		fallthrough;
276*4882a593Smuzhiyun 	case ntohs(ETH_P_IP):
277*4882a593Smuzhiyun 		break;
278*4882a593Smuzhiyun 	default:
279*4882a593Smuzhiyun 		goto out;
280*4882a593Smuzhiyun 	}
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	if (proto == IPPROTO_UDP) {
284*4882a593Smuzhiyun 		udph = udp_hdr(skb);
285*4882a593Smuzhiyun 		port = be16_to_cpu(udph->dest);
286*4882a593Smuzhiyun 	}
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	/* HW supports offload of only one UDP port. Remove CSUM and GSO MASK
289*4882a593Smuzhiyun 	 * for other UDP port tunnels
290*4882a593Smuzhiyun 	 */
291*4882a593Smuzhiyun 	if (port  != enic->vxlan.vxlan_udp_port_number)
292*4882a593Smuzhiyun 		goto out;
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	return features;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun out:
297*4882a593Smuzhiyun 	return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun 
enic_is_dynamic(struct enic * enic)300*4882a593Smuzhiyun int enic_is_dynamic(struct enic *enic)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun 	return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun 
enic_sriov_enabled(struct enic * enic)305*4882a593Smuzhiyun int enic_sriov_enabled(struct enic *enic)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun 	return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun 
enic_is_sriov_vf(struct enic * enic)310*4882a593Smuzhiyun static int enic_is_sriov_vf(struct enic *enic)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun 	return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun 
enic_is_valid_vf(struct enic * enic,int vf)315*4882a593Smuzhiyun int enic_is_valid_vf(struct enic *enic, int vf)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun #ifdef CONFIG_PCI_IOV
318*4882a593Smuzhiyun 	return vf >= 0 && vf < enic->num_vfs;
319*4882a593Smuzhiyun #else
320*4882a593Smuzhiyun 	return 0;
321*4882a593Smuzhiyun #endif
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun 
enic_free_wq_buf(struct vnic_wq * wq,struct vnic_wq_buf * buf)324*4882a593Smuzhiyun static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun 	struct enic *enic = vnic_dev_priv(wq->vdev);
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	if (buf->sop)
329*4882a593Smuzhiyun 		dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len,
330*4882a593Smuzhiyun 				 DMA_TO_DEVICE);
331*4882a593Smuzhiyun 	else
332*4882a593Smuzhiyun 		dma_unmap_page(&enic->pdev->dev, buf->dma_addr, buf->len,
333*4882a593Smuzhiyun 			       DMA_TO_DEVICE);
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	if (buf->os_buf)
336*4882a593Smuzhiyun 		dev_kfree_skb_any(buf->os_buf);
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun 
enic_wq_free_buf(struct vnic_wq * wq,struct cq_desc * cq_desc,struct vnic_wq_buf * buf,void * opaque)339*4882a593Smuzhiyun static void enic_wq_free_buf(struct vnic_wq *wq,
340*4882a593Smuzhiyun 	struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun 	enic_free_wq_buf(wq, buf);
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun 
enic_wq_service(struct vnic_dev * vdev,struct cq_desc * cq_desc,u8 type,u16 q_number,u16 completed_index,void * opaque)345*4882a593Smuzhiyun static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
346*4882a593Smuzhiyun 	u8 type, u16 q_number, u16 completed_index, void *opaque)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun 	struct enic *enic = vnic_dev_priv(vdev);
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	spin_lock(&enic->wq_lock[q_number]);
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	vnic_wq_service(&enic->wq[q_number], cq_desc,
353*4882a593Smuzhiyun 		completed_index, enic_wq_free_buf,
354*4882a593Smuzhiyun 		opaque);
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) &&
357*4882a593Smuzhiyun 	    vnic_wq_desc_avail(&enic->wq[q_number]) >=
358*4882a593Smuzhiyun 	    (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
359*4882a593Smuzhiyun 		netif_wake_subqueue(enic->netdev, q_number);
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	spin_unlock(&enic->wq_lock[q_number]);
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	return 0;
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun 
enic_log_q_error(struct enic * enic)366*4882a593Smuzhiyun static bool enic_log_q_error(struct enic *enic)
367*4882a593Smuzhiyun {
368*4882a593Smuzhiyun 	unsigned int i;
369*4882a593Smuzhiyun 	u32 error_status;
370*4882a593Smuzhiyun 	bool err = false;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	for (i = 0; i < enic->wq_count; i++) {
373*4882a593Smuzhiyun 		error_status = vnic_wq_error_status(&enic->wq[i]);
374*4882a593Smuzhiyun 		err |= error_status;
375*4882a593Smuzhiyun 		if (error_status)
376*4882a593Smuzhiyun 			netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
377*4882a593Smuzhiyun 				i, error_status);
378*4882a593Smuzhiyun 	}
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	for (i = 0; i < enic->rq_count; i++) {
381*4882a593Smuzhiyun 		error_status = vnic_rq_error_status(&enic->rq[i]);
382*4882a593Smuzhiyun 		err |= error_status;
383*4882a593Smuzhiyun 		if (error_status)
384*4882a593Smuzhiyun 			netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
385*4882a593Smuzhiyun 				i, error_status);
386*4882a593Smuzhiyun 	}
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	return err;
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun 
enic_msglvl_check(struct enic * enic)391*4882a593Smuzhiyun static void enic_msglvl_check(struct enic *enic)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun 	u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	if (msg_enable != enic->msg_enable) {
396*4882a593Smuzhiyun 		netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
397*4882a593Smuzhiyun 			enic->msg_enable, msg_enable);
398*4882a593Smuzhiyun 		enic->msg_enable = msg_enable;
399*4882a593Smuzhiyun 	}
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun 
enic_mtu_check(struct enic * enic)402*4882a593Smuzhiyun static void enic_mtu_check(struct enic *enic)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun 	u32 mtu = vnic_dev_mtu(enic->vdev);
405*4882a593Smuzhiyun 	struct net_device *netdev = enic->netdev;
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	if (mtu && mtu != enic->port_mtu) {
408*4882a593Smuzhiyun 		enic->port_mtu = mtu;
409*4882a593Smuzhiyun 		if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
410*4882a593Smuzhiyun 			mtu = max_t(int, ENIC_MIN_MTU,
411*4882a593Smuzhiyun 				min_t(int, ENIC_MAX_MTU, mtu));
412*4882a593Smuzhiyun 			if (mtu != netdev->mtu)
413*4882a593Smuzhiyun 				schedule_work(&enic->change_mtu_work);
414*4882a593Smuzhiyun 		} else {
415*4882a593Smuzhiyun 			if (mtu < netdev->mtu)
416*4882a593Smuzhiyun 				netdev_warn(netdev,
417*4882a593Smuzhiyun 					"interface MTU (%d) set higher "
418*4882a593Smuzhiyun 					"than switch port MTU (%d)\n",
419*4882a593Smuzhiyun 					netdev->mtu, mtu);
420*4882a593Smuzhiyun 		}
421*4882a593Smuzhiyun 	}
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun 
enic_link_check(struct enic * enic)424*4882a593Smuzhiyun static void enic_link_check(struct enic *enic)
425*4882a593Smuzhiyun {
426*4882a593Smuzhiyun 	int link_status = vnic_dev_link_status(enic->vdev);
427*4882a593Smuzhiyun 	int carrier_ok = netif_carrier_ok(enic->netdev);
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	if (link_status && !carrier_ok) {
430*4882a593Smuzhiyun 		netdev_info(enic->netdev, "Link UP\n");
431*4882a593Smuzhiyun 		netif_carrier_on(enic->netdev);
432*4882a593Smuzhiyun 	} else if (!link_status && carrier_ok) {
433*4882a593Smuzhiyun 		netdev_info(enic->netdev, "Link DOWN\n");
434*4882a593Smuzhiyun 		netif_carrier_off(enic->netdev);
435*4882a593Smuzhiyun 	}
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun 
enic_notify_check(struct enic * enic)438*4882a593Smuzhiyun static void enic_notify_check(struct enic *enic)
439*4882a593Smuzhiyun {
440*4882a593Smuzhiyun 	enic_msglvl_check(enic);
441*4882a593Smuzhiyun 	enic_mtu_check(enic);
442*4882a593Smuzhiyun 	enic_link_check(enic);
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
446*4882a593Smuzhiyun 
enic_isr_legacy(int irq,void * data)447*4882a593Smuzhiyun static irqreturn_t enic_isr_legacy(int irq, void *data)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun 	struct net_device *netdev = data;
450*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
451*4882a593Smuzhiyun 	unsigned int io_intr = enic_legacy_io_intr();
452*4882a593Smuzhiyun 	unsigned int err_intr = enic_legacy_err_intr();
453*4882a593Smuzhiyun 	unsigned int notify_intr = enic_legacy_notify_intr();
454*4882a593Smuzhiyun 	u32 pba;
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	vnic_intr_mask(&enic->intr[io_intr]);
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun 	pba = vnic_intr_legacy_pba(enic->legacy_pba);
459*4882a593Smuzhiyun 	if (!pba) {
460*4882a593Smuzhiyun 		vnic_intr_unmask(&enic->intr[io_intr]);
461*4882a593Smuzhiyun 		return IRQ_NONE;	/* not our interrupt */
462*4882a593Smuzhiyun 	}
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	if (ENIC_TEST_INTR(pba, notify_intr)) {
465*4882a593Smuzhiyun 		enic_notify_check(enic);
466*4882a593Smuzhiyun 		vnic_intr_return_all_credits(&enic->intr[notify_intr]);
467*4882a593Smuzhiyun 	}
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	if (ENIC_TEST_INTR(pba, err_intr)) {
470*4882a593Smuzhiyun 		vnic_intr_return_all_credits(&enic->intr[err_intr]);
471*4882a593Smuzhiyun 		enic_log_q_error(enic);
472*4882a593Smuzhiyun 		/* schedule recovery from WQ/RQ error */
473*4882a593Smuzhiyun 		schedule_work(&enic->reset);
474*4882a593Smuzhiyun 		return IRQ_HANDLED;
475*4882a593Smuzhiyun 	}
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	if (ENIC_TEST_INTR(pba, io_intr))
478*4882a593Smuzhiyun 		napi_schedule_irqoff(&enic->napi[0]);
479*4882a593Smuzhiyun 	else
480*4882a593Smuzhiyun 		vnic_intr_unmask(&enic->intr[io_intr]);
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	return IRQ_HANDLED;
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun 
enic_isr_msi(int irq,void * data)485*4882a593Smuzhiyun static irqreturn_t enic_isr_msi(int irq, void *data)
486*4882a593Smuzhiyun {
487*4882a593Smuzhiyun 	struct enic *enic = data;
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun 	/* With MSI, there is no sharing of interrupts, so this is
490*4882a593Smuzhiyun 	 * our interrupt and there is no need to ack it.  The device
491*4882a593Smuzhiyun 	 * is not providing per-vector masking, so the OS will not
492*4882a593Smuzhiyun 	 * write to PCI config space to mask/unmask the interrupt.
493*4882a593Smuzhiyun 	 * We're using mask_on_assertion for MSI, so the device
494*4882a593Smuzhiyun 	 * automatically masks the interrupt when the interrupt is
495*4882a593Smuzhiyun 	 * generated.  Later, when exiting polling, the interrupt
496*4882a593Smuzhiyun 	 * will be unmasked (see enic_poll).
497*4882a593Smuzhiyun 	 *
498*4882a593Smuzhiyun 	 * Also, the device uses the same PCIe Traffic Class (TC)
499*4882a593Smuzhiyun 	 * for Memory Write data and MSI, so there are no ordering
500*4882a593Smuzhiyun 	 * issues; the MSI will always arrive at the Root Complex
501*4882a593Smuzhiyun 	 * _after_ corresponding Memory Writes (i.e. descriptor
502*4882a593Smuzhiyun 	 * writes).
503*4882a593Smuzhiyun 	 */
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	napi_schedule_irqoff(&enic->napi[0]);
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	return IRQ_HANDLED;
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun 
enic_isr_msix(int irq,void * data)510*4882a593Smuzhiyun static irqreturn_t enic_isr_msix(int irq, void *data)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun 	struct napi_struct *napi = data;
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	napi_schedule_irqoff(napi);
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	return IRQ_HANDLED;
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun 
enic_isr_msix_err(int irq,void * data)519*4882a593Smuzhiyun static irqreturn_t enic_isr_msix_err(int irq, void *data)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun 	struct enic *enic = data;
522*4882a593Smuzhiyun 	unsigned int intr = enic_msix_err_intr(enic);
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	vnic_intr_return_all_credits(&enic->intr[intr]);
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	if (enic_log_q_error(enic))
527*4882a593Smuzhiyun 		/* schedule recovery from WQ/RQ error */
528*4882a593Smuzhiyun 		schedule_work(&enic->reset);
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun 	return IRQ_HANDLED;
531*4882a593Smuzhiyun }
532*4882a593Smuzhiyun 
enic_isr_msix_notify(int irq,void * data)533*4882a593Smuzhiyun static irqreturn_t enic_isr_msix_notify(int irq, void *data)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun 	struct enic *enic = data;
536*4882a593Smuzhiyun 	unsigned int intr = enic_msix_notify_intr(enic);
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	enic_notify_check(enic);
539*4882a593Smuzhiyun 	vnic_intr_return_all_credits(&enic->intr[intr]);
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	return IRQ_HANDLED;
542*4882a593Smuzhiyun }
543*4882a593Smuzhiyun 
enic_queue_wq_skb_cont(struct enic * enic,struct vnic_wq * wq,struct sk_buff * skb,unsigned int len_left,int loopback)544*4882a593Smuzhiyun static int enic_queue_wq_skb_cont(struct enic *enic, struct vnic_wq *wq,
545*4882a593Smuzhiyun 				  struct sk_buff *skb, unsigned int len_left,
546*4882a593Smuzhiyun 				  int loopback)
547*4882a593Smuzhiyun {
548*4882a593Smuzhiyun 	const skb_frag_t *frag;
549*4882a593Smuzhiyun 	dma_addr_t dma_addr;
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	/* Queue additional data fragments */
552*4882a593Smuzhiyun 	for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
553*4882a593Smuzhiyun 		len_left -= skb_frag_size(frag);
554*4882a593Smuzhiyun 		dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 0,
555*4882a593Smuzhiyun 					    skb_frag_size(frag),
556*4882a593Smuzhiyun 					    DMA_TO_DEVICE);
557*4882a593Smuzhiyun 		if (unlikely(enic_dma_map_check(enic, dma_addr)))
558*4882a593Smuzhiyun 			return -ENOMEM;
559*4882a593Smuzhiyun 		enic_queue_wq_desc_cont(wq, skb, dma_addr, skb_frag_size(frag),
560*4882a593Smuzhiyun 					(len_left == 0),	/* EOP? */
561*4882a593Smuzhiyun 					loopback);
562*4882a593Smuzhiyun 	}
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 	return 0;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun 
enic_queue_wq_skb_vlan(struct enic * enic,struct vnic_wq * wq,struct sk_buff * skb,int vlan_tag_insert,unsigned int vlan_tag,int loopback)567*4882a593Smuzhiyun static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq,
568*4882a593Smuzhiyun 				  struct sk_buff *skb, int vlan_tag_insert,
569*4882a593Smuzhiyun 				  unsigned int vlan_tag, int loopback)
570*4882a593Smuzhiyun {
571*4882a593Smuzhiyun 	unsigned int head_len = skb_headlen(skb);
572*4882a593Smuzhiyun 	unsigned int len_left = skb->len - head_len;
573*4882a593Smuzhiyun 	int eop = (len_left == 0);
574*4882a593Smuzhiyun 	dma_addr_t dma_addr;
575*4882a593Smuzhiyun 	int err = 0;
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 	dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len,
578*4882a593Smuzhiyun 				  DMA_TO_DEVICE);
579*4882a593Smuzhiyun 	if (unlikely(enic_dma_map_check(enic, dma_addr)))
580*4882a593Smuzhiyun 		return -ENOMEM;
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 	/* Queue the main skb fragment. The fragments are no larger
583*4882a593Smuzhiyun 	 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
584*4882a593Smuzhiyun 	 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
585*4882a593Smuzhiyun 	 * per fragment is queued.
586*4882a593Smuzhiyun 	 */
587*4882a593Smuzhiyun 	enic_queue_wq_desc(wq, skb, dma_addr, head_len,	vlan_tag_insert,
588*4882a593Smuzhiyun 			   vlan_tag, eop, loopback);
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	if (!eop)
591*4882a593Smuzhiyun 		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	return err;
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun 
enic_queue_wq_skb_csum_l4(struct enic * enic,struct vnic_wq * wq,struct sk_buff * skb,int vlan_tag_insert,unsigned int vlan_tag,int loopback)596*4882a593Smuzhiyun static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq,
597*4882a593Smuzhiyun 				     struct sk_buff *skb, int vlan_tag_insert,
598*4882a593Smuzhiyun 				     unsigned int vlan_tag, int loopback)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun 	unsigned int head_len = skb_headlen(skb);
601*4882a593Smuzhiyun 	unsigned int len_left = skb->len - head_len;
602*4882a593Smuzhiyun 	unsigned int hdr_len = skb_checksum_start_offset(skb);
603*4882a593Smuzhiyun 	unsigned int csum_offset = hdr_len + skb->csum_offset;
604*4882a593Smuzhiyun 	int eop = (len_left == 0);
605*4882a593Smuzhiyun 	dma_addr_t dma_addr;
606*4882a593Smuzhiyun 	int err = 0;
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun 	dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len,
609*4882a593Smuzhiyun 				  DMA_TO_DEVICE);
610*4882a593Smuzhiyun 	if (unlikely(enic_dma_map_check(enic, dma_addr)))
611*4882a593Smuzhiyun 		return -ENOMEM;
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun 	/* Queue the main skb fragment. The fragments are no larger
614*4882a593Smuzhiyun 	 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
615*4882a593Smuzhiyun 	 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
616*4882a593Smuzhiyun 	 * per fragment is queued.
617*4882a593Smuzhiyun 	 */
618*4882a593Smuzhiyun 	enic_queue_wq_desc_csum_l4(wq, skb, dma_addr, head_len,	csum_offset,
619*4882a593Smuzhiyun 				   hdr_len, vlan_tag_insert, vlan_tag, eop,
620*4882a593Smuzhiyun 				   loopback);
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	if (!eop)
623*4882a593Smuzhiyun 		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun 	return err;
626*4882a593Smuzhiyun }
627*4882a593Smuzhiyun 
enic_preload_tcp_csum_encap(struct sk_buff * skb)628*4882a593Smuzhiyun static void enic_preload_tcp_csum_encap(struct sk_buff *skb)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun 	const struct ethhdr *eth = (struct ethhdr *)skb_inner_mac_header(skb);
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	switch (eth->h_proto) {
633*4882a593Smuzhiyun 	case ntohs(ETH_P_IP):
634*4882a593Smuzhiyun 		inner_ip_hdr(skb)->check = 0;
635*4882a593Smuzhiyun 		inner_tcp_hdr(skb)->check =
636*4882a593Smuzhiyun 			~csum_tcpudp_magic(inner_ip_hdr(skb)->saddr,
637*4882a593Smuzhiyun 					   inner_ip_hdr(skb)->daddr, 0,
638*4882a593Smuzhiyun 					   IPPROTO_TCP, 0);
639*4882a593Smuzhiyun 		break;
640*4882a593Smuzhiyun 	case ntohs(ETH_P_IPV6):
641*4882a593Smuzhiyun 		inner_tcp_hdr(skb)->check =
642*4882a593Smuzhiyun 			~csum_ipv6_magic(&inner_ipv6_hdr(skb)->saddr,
643*4882a593Smuzhiyun 					 &inner_ipv6_hdr(skb)->daddr, 0,
644*4882a593Smuzhiyun 					 IPPROTO_TCP, 0);
645*4882a593Smuzhiyun 		break;
646*4882a593Smuzhiyun 	default:
647*4882a593Smuzhiyun 		WARN_ONCE(1, "Non ipv4/ipv6 inner pkt for encap offload");
648*4882a593Smuzhiyun 		break;
649*4882a593Smuzhiyun 	}
650*4882a593Smuzhiyun }
651*4882a593Smuzhiyun 
enic_preload_tcp_csum(struct sk_buff * skb)652*4882a593Smuzhiyun static void enic_preload_tcp_csum(struct sk_buff *skb)
653*4882a593Smuzhiyun {
654*4882a593Smuzhiyun 	/* Preload TCP csum field with IP pseudo hdr calculated
655*4882a593Smuzhiyun 	 * with IP length set to zero.  HW will later add in length
656*4882a593Smuzhiyun 	 * to each TCP segment resulting from the TSO.
657*4882a593Smuzhiyun 	 */
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 	if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
660*4882a593Smuzhiyun 		ip_hdr(skb)->check = 0;
661*4882a593Smuzhiyun 		tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
662*4882a593Smuzhiyun 			ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
663*4882a593Smuzhiyun 	} else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
664*4882a593Smuzhiyun 		tcp_v6_gso_csum_prep(skb);
665*4882a593Smuzhiyun 	}
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun 
enic_queue_wq_skb_tso(struct enic * enic,struct vnic_wq * wq,struct sk_buff * skb,unsigned int mss,int vlan_tag_insert,unsigned int vlan_tag,int loopback)668*4882a593Smuzhiyun static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq,
669*4882a593Smuzhiyun 				 struct sk_buff *skb, unsigned int mss,
670*4882a593Smuzhiyun 				 int vlan_tag_insert, unsigned int vlan_tag,
671*4882a593Smuzhiyun 				 int loopback)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun 	unsigned int frag_len_left = skb_headlen(skb);
674*4882a593Smuzhiyun 	unsigned int len_left = skb->len - frag_len_left;
675*4882a593Smuzhiyun 	int eop = (len_left == 0);
676*4882a593Smuzhiyun 	unsigned int offset = 0;
677*4882a593Smuzhiyun 	unsigned int hdr_len;
678*4882a593Smuzhiyun 	dma_addr_t dma_addr;
679*4882a593Smuzhiyun 	unsigned int len;
680*4882a593Smuzhiyun 	skb_frag_t *frag;
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 	if (skb->encapsulation) {
683*4882a593Smuzhiyun 		hdr_len = skb_inner_transport_header(skb) - skb->data;
684*4882a593Smuzhiyun 		hdr_len += inner_tcp_hdrlen(skb);
685*4882a593Smuzhiyun 		enic_preload_tcp_csum_encap(skb);
686*4882a593Smuzhiyun 	} else {
687*4882a593Smuzhiyun 		hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
688*4882a593Smuzhiyun 		enic_preload_tcp_csum(skb);
689*4882a593Smuzhiyun 	}
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	/* Queue WQ_ENET_MAX_DESC_LEN length descriptors
692*4882a593Smuzhiyun 	 * for the main skb fragment
693*4882a593Smuzhiyun 	 */
694*4882a593Smuzhiyun 	while (frag_len_left) {
695*4882a593Smuzhiyun 		len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
696*4882a593Smuzhiyun 		dma_addr = dma_map_single(&enic->pdev->dev,
697*4882a593Smuzhiyun 					  skb->data + offset, len,
698*4882a593Smuzhiyun 					  DMA_TO_DEVICE);
699*4882a593Smuzhiyun 		if (unlikely(enic_dma_map_check(enic, dma_addr)))
700*4882a593Smuzhiyun 			return -ENOMEM;
701*4882a593Smuzhiyun 		enic_queue_wq_desc_tso(wq, skb, dma_addr, len, mss, hdr_len,
702*4882a593Smuzhiyun 				       vlan_tag_insert, vlan_tag,
703*4882a593Smuzhiyun 				       eop && (len == frag_len_left), loopback);
704*4882a593Smuzhiyun 		frag_len_left -= len;
705*4882a593Smuzhiyun 		offset += len;
706*4882a593Smuzhiyun 	}
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun 	if (eop)
709*4882a593Smuzhiyun 		return 0;
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	/* Queue WQ_ENET_MAX_DESC_LEN length descriptors
712*4882a593Smuzhiyun 	 * for additional data fragments
713*4882a593Smuzhiyun 	 */
714*4882a593Smuzhiyun 	for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
715*4882a593Smuzhiyun 		len_left -= skb_frag_size(frag);
716*4882a593Smuzhiyun 		frag_len_left = skb_frag_size(frag);
717*4882a593Smuzhiyun 		offset = 0;
718*4882a593Smuzhiyun 
719*4882a593Smuzhiyun 		while (frag_len_left) {
720*4882a593Smuzhiyun 			len = min(frag_len_left,
721*4882a593Smuzhiyun 				(unsigned int)WQ_ENET_MAX_DESC_LEN);
722*4882a593Smuzhiyun 			dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
723*4882a593Smuzhiyun 						    offset, len,
724*4882a593Smuzhiyun 						    DMA_TO_DEVICE);
725*4882a593Smuzhiyun 			if (unlikely(enic_dma_map_check(enic, dma_addr)))
726*4882a593Smuzhiyun 				return -ENOMEM;
727*4882a593Smuzhiyun 			enic_queue_wq_desc_cont(wq, skb, dma_addr, len,
728*4882a593Smuzhiyun 						(len_left == 0) &&
729*4882a593Smuzhiyun 						 (len == frag_len_left),/*EOP*/
730*4882a593Smuzhiyun 						loopback);
731*4882a593Smuzhiyun 			frag_len_left -= len;
732*4882a593Smuzhiyun 			offset += len;
733*4882a593Smuzhiyun 		}
734*4882a593Smuzhiyun 	}
735*4882a593Smuzhiyun 
736*4882a593Smuzhiyun 	return 0;
737*4882a593Smuzhiyun }
738*4882a593Smuzhiyun 
enic_queue_wq_skb_encap(struct enic * enic,struct vnic_wq * wq,struct sk_buff * skb,int vlan_tag_insert,unsigned int vlan_tag,int loopback)739*4882a593Smuzhiyun static inline int enic_queue_wq_skb_encap(struct enic *enic, struct vnic_wq *wq,
740*4882a593Smuzhiyun 					  struct sk_buff *skb,
741*4882a593Smuzhiyun 					  int vlan_tag_insert,
742*4882a593Smuzhiyun 					  unsigned int vlan_tag, int loopback)
743*4882a593Smuzhiyun {
744*4882a593Smuzhiyun 	unsigned int head_len = skb_headlen(skb);
745*4882a593Smuzhiyun 	unsigned int len_left = skb->len - head_len;
746*4882a593Smuzhiyun 	/* Hardware will overwrite the checksum fields, calculating from
747*4882a593Smuzhiyun 	 * scratch and ignoring the value placed by software.
748*4882a593Smuzhiyun 	 * Offload mode = 00
749*4882a593Smuzhiyun 	 * mss[2], mss[1], mss[0] bits are set
750*4882a593Smuzhiyun 	 */
751*4882a593Smuzhiyun 	unsigned int mss_or_csum = 7;
752*4882a593Smuzhiyun 	int eop = (len_left == 0);
753*4882a593Smuzhiyun 	dma_addr_t dma_addr;
754*4882a593Smuzhiyun 	int err = 0;
755*4882a593Smuzhiyun 
756*4882a593Smuzhiyun 	dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len,
757*4882a593Smuzhiyun 				  DMA_TO_DEVICE);
758*4882a593Smuzhiyun 	if (unlikely(enic_dma_map_check(enic, dma_addr)))
759*4882a593Smuzhiyun 		return -ENOMEM;
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 	enic_queue_wq_desc_ex(wq, skb, dma_addr, head_len, mss_or_csum, 0,
762*4882a593Smuzhiyun 			      vlan_tag_insert, vlan_tag,
763*4882a593Smuzhiyun 			      WQ_ENET_OFFLOAD_MODE_CSUM, eop, 1 /* SOP */, eop,
764*4882a593Smuzhiyun 			      loopback);
765*4882a593Smuzhiyun 	if (!eop)
766*4882a593Smuzhiyun 		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
767*4882a593Smuzhiyun 
768*4882a593Smuzhiyun 	return err;
769*4882a593Smuzhiyun }
770*4882a593Smuzhiyun 
enic_queue_wq_skb(struct enic * enic,struct vnic_wq * wq,struct sk_buff * skb)771*4882a593Smuzhiyun static inline int enic_queue_wq_skb(struct enic *enic,
772*4882a593Smuzhiyun 	struct vnic_wq *wq, struct sk_buff *skb)
773*4882a593Smuzhiyun {
774*4882a593Smuzhiyun 	unsigned int mss = skb_shinfo(skb)->gso_size;
775*4882a593Smuzhiyun 	unsigned int vlan_tag = 0;
776*4882a593Smuzhiyun 	int vlan_tag_insert = 0;
777*4882a593Smuzhiyun 	int loopback = 0;
778*4882a593Smuzhiyun 	int err;
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 	if (skb_vlan_tag_present(skb)) {
781*4882a593Smuzhiyun 		/* VLAN tag from trunking driver */
782*4882a593Smuzhiyun 		vlan_tag_insert = 1;
783*4882a593Smuzhiyun 		vlan_tag = skb_vlan_tag_get(skb);
784*4882a593Smuzhiyun 	} else if (enic->loop_enable) {
785*4882a593Smuzhiyun 		vlan_tag = enic->loop_tag;
786*4882a593Smuzhiyun 		loopback = 1;
787*4882a593Smuzhiyun 	}
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun 	if (mss)
790*4882a593Smuzhiyun 		err = enic_queue_wq_skb_tso(enic, wq, skb, mss,
791*4882a593Smuzhiyun 					    vlan_tag_insert, vlan_tag,
792*4882a593Smuzhiyun 					    loopback);
793*4882a593Smuzhiyun 	else if (skb->encapsulation)
794*4882a593Smuzhiyun 		err = enic_queue_wq_skb_encap(enic, wq, skb, vlan_tag_insert,
795*4882a593Smuzhiyun 					      vlan_tag, loopback);
796*4882a593Smuzhiyun 	else if	(skb->ip_summed == CHECKSUM_PARTIAL)
797*4882a593Smuzhiyun 		err = enic_queue_wq_skb_csum_l4(enic, wq, skb, vlan_tag_insert,
798*4882a593Smuzhiyun 						vlan_tag, loopback);
799*4882a593Smuzhiyun 	else
800*4882a593Smuzhiyun 		err = enic_queue_wq_skb_vlan(enic, wq, skb, vlan_tag_insert,
801*4882a593Smuzhiyun 					     vlan_tag, loopback);
802*4882a593Smuzhiyun 	if (unlikely(err)) {
803*4882a593Smuzhiyun 		struct vnic_wq_buf *buf;
804*4882a593Smuzhiyun 
805*4882a593Smuzhiyun 		buf = wq->to_use->prev;
806*4882a593Smuzhiyun 		/* while not EOP of previous pkt && queue not empty.
807*4882a593Smuzhiyun 		 * For all non EOP bufs, os_buf is NULL.
808*4882a593Smuzhiyun 		 */
809*4882a593Smuzhiyun 		while (!buf->os_buf && (buf->next != wq->to_clean)) {
810*4882a593Smuzhiyun 			enic_free_wq_buf(wq, buf);
811*4882a593Smuzhiyun 			wq->ring.desc_avail++;
812*4882a593Smuzhiyun 			buf = buf->prev;
813*4882a593Smuzhiyun 		}
814*4882a593Smuzhiyun 		wq->to_use = buf->next;
815*4882a593Smuzhiyun 		dev_kfree_skb(skb);
816*4882a593Smuzhiyun 	}
817*4882a593Smuzhiyun 	return err;
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun /* netif_tx_lock held, process context with BHs disabled, or BH */
enic_hard_start_xmit(struct sk_buff * skb,struct net_device * netdev)821*4882a593Smuzhiyun static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
822*4882a593Smuzhiyun 	struct net_device *netdev)
823*4882a593Smuzhiyun {
824*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
825*4882a593Smuzhiyun 	struct vnic_wq *wq;
826*4882a593Smuzhiyun 	unsigned int txq_map;
827*4882a593Smuzhiyun 	struct netdev_queue *txq;
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 	if (skb->len <= 0) {
830*4882a593Smuzhiyun 		dev_kfree_skb_any(skb);
831*4882a593Smuzhiyun 		return NETDEV_TX_OK;
832*4882a593Smuzhiyun 	}
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 	txq_map = skb_get_queue_mapping(skb) % enic->wq_count;
835*4882a593Smuzhiyun 	wq = &enic->wq[txq_map];
836*4882a593Smuzhiyun 	txq = netdev_get_tx_queue(netdev, txq_map);
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun 	/* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
839*4882a593Smuzhiyun 	 * which is very likely.  In the off chance it's going to take
840*4882a593Smuzhiyun 	 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
841*4882a593Smuzhiyun 	 */
842*4882a593Smuzhiyun 
843*4882a593Smuzhiyun 	if (skb_shinfo(skb)->gso_size == 0 &&
844*4882a593Smuzhiyun 	    skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
845*4882a593Smuzhiyun 	    skb_linearize(skb)) {
846*4882a593Smuzhiyun 		dev_kfree_skb_any(skb);
847*4882a593Smuzhiyun 		return NETDEV_TX_OK;
848*4882a593Smuzhiyun 	}
849*4882a593Smuzhiyun 
850*4882a593Smuzhiyun 	spin_lock(&enic->wq_lock[txq_map]);
851*4882a593Smuzhiyun 
852*4882a593Smuzhiyun 	if (vnic_wq_desc_avail(wq) <
853*4882a593Smuzhiyun 	    skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
854*4882a593Smuzhiyun 		netif_tx_stop_queue(txq);
855*4882a593Smuzhiyun 		/* This is a hard error, log it */
856*4882a593Smuzhiyun 		netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
857*4882a593Smuzhiyun 		spin_unlock(&enic->wq_lock[txq_map]);
858*4882a593Smuzhiyun 		return NETDEV_TX_BUSY;
859*4882a593Smuzhiyun 	}
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun 	if (enic_queue_wq_skb(enic, wq, skb))
862*4882a593Smuzhiyun 		goto error;
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 	if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
865*4882a593Smuzhiyun 		netif_tx_stop_queue(txq);
866*4882a593Smuzhiyun 	skb_tx_timestamp(skb);
867*4882a593Smuzhiyun 	if (!netdev_xmit_more() || netif_xmit_stopped(txq))
868*4882a593Smuzhiyun 		vnic_wq_doorbell(wq);
869*4882a593Smuzhiyun 
870*4882a593Smuzhiyun error:
871*4882a593Smuzhiyun 	spin_unlock(&enic->wq_lock[txq_map]);
872*4882a593Smuzhiyun 
873*4882a593Smuzhiyun 	return NETDEV_TX_OK;
874*4882a593Smuzhiyun }
875*4882a593Smuzhiyun 
876*4882a593Smuzhiyun /* dev_base_lock rwlock held, nominally process context */
enic_get_stats(struct net_device * netdev,struct rtnl_link_stats64 * net_stats)877*4882a593Smuzhiyun static void enic_get_stats(struct net_device *netdev,
878*4882a593Smuzhiyun 			   struct rtnl_link_stats64 *net_stats)
879*4882a593Smuzhiyun {
880*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
881*4882a593Smuzhiyun 	struct vnic_stats *stats;
882*4882a593Smuzhiyun 	int err;
883*4882a593Smuzhiyun 
884*4882a593Smuzhiyun 	err = enic_dev_stats_dump(enic, &stats);
885*4882a593Smuzhiyun 	/* return only when pci_zalloc_consistent fails in vnic_dev_stats_dump
886*4882a593Smuzhiyun 	 * For other failures, like devcmd failure, we return previously
887*4882a593Smuzhiyun 	 * recorded stats.
888*4882a593Smuzhiyun 	 */
889*4882a593Smuzhiyun 	if (err == -ENOMEM)
890*4882a593Smuzhiyun 		return;
891*4882a593Smuzhiyun 
892*4882a593Smuzhiyun 	net_stats->tx_packets = stats->tx.tx_frames_ok;
893*4882a593Smuzhiyun 	net_stats->tx_bytes = stats->tx.tx_bytes_ok;
894*4882a593Smuzhiyun 	net_stats->tx_errors = stats->tx.tx_errors;
895*4882a593Smuzhiyun 	net_stats->tx_dropped = stats->tx.tx_drops;
896*4882a593Smuzhiyun 
897*4882a593Smuzhiyun 	net_stats->rx_packets = stats->rx.rx_frames_ok;
898*4882a593Smuzhiyun 	net_stats->rx_bytes = stats->rx.rx_bytes_ok;
899*4882a593Smuzhiyun 	net_stats->rx_errors = stats->rx.rx_errors;
900*4882a593Smuzhiyun 	net_stats->multicast = stats->rx.rx_multicast_frames_ok;
901*4882a593Smuzhiyun 	net_stats->rx_over_errors = enic->rq_truncated_pkts;
902*4882a593Smuzhiyun 	net_stats->rx_crc_errors = enic->rq_bad_fcs;
903*4882a593Smuzhiyun 	net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
904*4882a593Smuzhiyun }
905*4882a593Smuzhiyun 
enic_mc_sync(struct net_device * netdev,const u8 * mc_addr)906*4882a593Smuzhiyun static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr)
907*4882a593Smuzhiyun {
908*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
909*4882a593Smuzhiyun 
910*4882a593Smuzhiyun 	if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) {
911*4882a593Smuzhiyun 		unsigned int mc_count = netdev_mc_count(netdev);
912*4882a593Smuzhiyun 
913*4882a593Smuzhiyun 		netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n",
914*4882a593Smuzhiyun 			    ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
915*4882a593Smuzhiyun 
916*4882a593Smuzhiyun 		return -ENOSPC;
917*4882a593Smuzhiyun 	}
918*4882a593Smuzhiyun 
919*4882a593Smuzhiyun 	enic_dev_add_addr(enic, mc_addr);
920*4882a593Smuzhiyun 	enic->mc_count++;
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 	return 0;
923*4882a593Smuzhiyun }
924*4882a593Smuzhiyun 
enic_mc_unsync(struct net_device * netdev,const u8 * mc_addr)925*4882a593Smuzhiyun static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr)
926*4882a593Smuzhiyun {
927*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
928*4882a593Smuzhiyun 
929*4882a593Smuzhiyun 	enic_dev_del_addr(enic, mc_addr);
930*4882a593Smuzhiyun 	enic->mc_count--;
931*4882a593Smuzhiyun 
932*4882a593Smuzhiyun 	return 0;
933*4882a593Smuzhiyun }
934*4882a593Smuzhiyun 
enic_uc_sync(struct net_device * netdev,const u8 * uc_addr)935*4882a593Smuzhiyun static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr)
936*4882a593Smuzhiyun {
937*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
938*4882a593Smuzhiyun 
939*4882a593Smuzhiyun 	if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) {
940*4882a593Smuzhiyun 		unsigned int uc_count = netdev_uc_count(netdev);
941*4882a593Smuzhiyun 
942*4882a593Smuzhiyun 		netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n",
943*4882a593Smuzhiyun 			    ENIC_UNICAST_PERFECT_FILTERS, uc_count);
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun 		return -ENOSPC;
946*4882a593Smuzhiyun 	}
947*4882a593Smuzhiyun 
948*4882a593Smuzhiyun 	enic_dev_add_addr(enic, uc_addr);
949*4882a593Smuzhiyun 	enic->uc_count++;
950*4882a593Smuzhiyun 
951*4882a593Smuzhiyun 	return 0;
952*4882a593Smuzhiyun }
953*4882a593Smuzhiyun 
enic_uc_unsync(struct net_device * netdev,const u8 * uc_addr)954*4882a593Smuzhiyun static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr)
955*4882a593Smuzhiyun {
956*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun 	enic_dev_del_addr(enic, uc_addr);
959*4882a593Smuzhiyun 	enic->uc_count--;
960*4882a593Smuzhiyun 
961*4882a593Smuzhiyun 	return 0;
962*4882a593Smuzhiyun }
963*4882a593Smuzhiyun 
enic_reset_addr_lists(struct enic * enic)964*4882a593Smuzhiyun void enic_reset_addr_lists(struct enic *enic)
965*4882a593Smuzhiyun {
966*4882a593Smuzhiyun 	struct net_device *netdev = enic->netdev;
967*4882a593Smuzhiyun 
968*4882a593Smuzhiyun 	__dev_uc_unsync(netdev, NULL);
969*4882a593Smuzhiyun 	__dev_mc_unsync(netdev, NULL);
970*4882a593Smuzhiyun 
971*4882a593Smuzhiyun 	enic->mc_count = 0;
972*4882a593Smuzhiyun 	enic->uc_count = 0;
973*4882a593Smuzhiyun 	enic->flags = 0;
974*4882a593Smuzhiyun }
975*4882a593Smuzhiyun 
enic_set_mac_addr(struct net_device * netdev,char * addr)976*4882a593Smuzhiyun static int enic_set_mac_addr(struct net_device *netdev, char *addr)
977*4882a593Smuzhiyun {
978*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
979*4882a593Smuzhiyun 
980*4882a593Smuzhiyun 	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
981*4882a593Smuzhiyun 		if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
982*4882a593Smuzhiyun 			return -EADDRNOTAVAIL;
983*4882a593Smuzhiyun 	} else {
984*4882a593Smuzhiyun 		if (!is_valid_ether_addr(addr))
985*4882a593Smuzhiyun 			return -EADDRNOTAVAIL;
986*4882a593Smuzhiyun 	}
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun 	memcpy(netdev->dev_addr, addr, netdev->addr_len);
989*4882a593Smuzhiyun 
990*4882a593Smuzhiyun 	return 0;
991*4882a593Smuzhiyun }
992*4882a593Smuzhiyun 
enic_set_mac_address_dynamic(struct net_device * netdev,void * p)993*4882a593Smuzhiyun static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
994*4882a593Smuzhiyun {
995*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
996*4882a593Smuzhiyun 	struct sockaddr *saddr = p;
997*4882a593Smuzhiyun 	char *addr = saddr->sa_data;
998*4882a593Smuzhiyun 	int err;
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 	if (netif_running(enic->netdev)) {
1001*4882a593Smuzhiyun 		err = enic_dev_del_station_addr(enic);
1002*4882a593Smuzhiyun 		if (err)
1003*4882a593Smuzhiyun 			return err;
1004*4882a593Smuzhiyun 	}
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun 	err = enic_set_mac_addr(netdev, addr);
1007*4882a593Smuzhiyun 	if (err)
1008*4882a593Smuzhiyun 		return err;
1009*4882a593Smuzhiyun 
1010*4882a593Smuzhiyun 	if (netif_running(enic->netdev)) {
1011*4882a593Smuzhiyun 		err = enic_dev_add_station_addr(enic);
1012*4882a593Smuzhiyun 		if (err)
1013*4882a593Smuzhiyun 			return err;
1014*4882a593Smuzhiyun 	}
1015*4882a593Smuzhiyun 
1016*4882a593Smuzhiyun 	return err;
1017*4882a593Smuzhiyun }
1018*4882a593Smuzhiyun 
enic_set_mac_address(struct net_device * netdev,void * p)1019*4882a593Smuzhiyun static int enic_set_mac_address(struct net_device *netdev, void *p)
1020*4882a593Smuzhiyun {
1021*4882a593Smuzhiyun 	struct sockaddr *saddr = p;
1022*4882a593Smuzhiyun 	char *addr = saddr->sa_data;
1023*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1024*4882a593Smuzhiyun 	int err;
1025*4882a593Smuzhiyun 
1026*4882a593Smuzhiyun 	err = enic_dev_del_station_addr(enic);
1027*4882a593Smuzhiyun 	if (err)
1028*4882a593Smuzhiyun 		return err;
1029*4882a593Smuzhiyun 
1030*4882a593Smuzhiyun 	err = enic_set_mac_addr(netdev, addr);
1031*4882a593Smuzhiyun 	if (err)
1032*4882a593Smuzhiyun 		return err;
1033*4882a593Smuzhiyun 
1034*4882a593Smuzhiyun 	return enic_dev_add_station_addr(enic);
1035*4882a593Smuzhiyun }
1036*4882a593Smuzhiyun 
1037*4882a593Smuzhiyun /* netif_tx_lock held, BHs disabled */
enic_set_rx_mode(struct net_device * netdev)1038*4882a593Smuzhiyun static void enic_set_rx_mode(struct net_device *netdev)
1039*4882a593Smuzhiyun {
1040*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1041*4882a593Smuzhiyun 	int directed = 1;
1042*4882a593Smuzhiyun 	int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1043*4882a593Smuzhiyun 	int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1044*4882a593Smuzhiyun 	int promisc = (netdev->flags & IFF_PROMISC) ||
1045*4882a593Smuzhiyun 		netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1046*4882a593Smuzhiyun 	int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1047*4882a593Smuzhiyun 		netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1048*4882a593Smuzhiyun 	unsigned int flags = netdev->flags |
1049*4882a593Smuzhiyun 		(allmulti ? IFF_ALLMULTI : 0) |
1050*4882a593Smuzhiyun 		(promisc ? IFF_PROMISC : 0);
1051*4882a593Smuzhiyun 
1052*4882a593Smuzhiyun 	if (enic->flags != flags) {
1053*4882a593Smuzhiyun 		enic->flags = flags;
1054*4882a593Smuzhiyun 		enic_dev_packet_filter(enic, directed,
1055*4882a593Smuzhiyun 			multicast, broadcast, promisc, allmulti);
1056*4882a593Smuzhiyun 	}
1057*4882a593Smuzhiyun 
1058*4882a593Smuzhiyun 	if (!promisc) {
1059*4882a593Smuzhiyun 		__dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync);
1060*4882a593Smuzhiyun 		if (!allmulti)
1061*4882a593Smuzhiyun 			__dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync);
1062*4882a593Smuzhiyun 	}
1063*4882a593Smuzhiyun }
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun /* netif_tx_lock held, BHs disabled */
enic_tx_timeout(struct net_device * netdev,unsigned int txqueue)1066*4882a593Smuzhiyun static void enic_tx_timeout(struct net_device *netdev, unsigned int txqueue)
1067*4882a593Smuzhiyun {
1068*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1069*4882a593Smuzhiyun 	schedule_work(&enic->tx_hang_reset);
1070*4882a593Smuzhiyun }
1071*4882a593Smuzhiyun 
enic_set_vf_mac(struct net_device * netdev,int vf,u8 * mac)1072*4882a593Smuzhiyun static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1073*4882a593Smuzhiyun {
1074*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1075*4882a593Smuzhiyun 	struct enic_port_profile *pp;
1076*4882a593Smuzhiyun 	int err;
1077*4882a593Smuzhiyun 
1078*4882a593Smuzhiyun 	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1079*4882a593Smuzhiyun 	if (err)
1080*4882a593Smuzhiyun 		return err;
1081*4882a593Smuzhiyun 
1082*4882a593Smuzhiyun 	if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) {
1083*4882a593Smuzhiyun 		if (vf == PORT_SELF_VF) {
1084*4882a593Smuzhiyun 			memcpy(pp->vf_mac, mac, ETH_ALEN);
1085*4882a593Smuzhiyun 			return 0;
1086*4882a593Smuzhiyun 		} else {
1087*4882a593Smuzhiyun 			/*
1088*4882a593Smuzhiyun 			 * For sriov vf's set the mac in hw
1089*4882a593Smuzhiyun 			 */
1090*4882a593Smuzhiyun 			ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
1091*4882a593Smuzhiyun 				vnic_dev_set_mac_addr, mac);
1092*4882a593Smuzhiyun 			return enic_dev_status_to_errno(err);
1093*4882a593Smuzhiyun 		}
1094*4882a593Smuzhiyun 	} else
1095*4882a593Smuzhiyun 		return -EINVAL;
1096*4882a593Smuzhiyun }
1097*4882a593Smuzhiyun 
enic_set_vf_port(struct net_device * netdev,int vf,struct nlattr * port[])1098*4882a593Smuzhiyun static int enic_set_vf_port(struct net_device *netdev, int vf,
1099*4882a593Smuzhiyun 	struct nlattr *port[])
1100*4882a593Smuzhiyun {
1101*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1102*4882a593Smuzhiyun 	struct enic_port_profile prev_pp;
1103*4882a593Smuzhiyun 	struct enic_port_profile *pp;
1104*4882a593Smuzhiyun 	int err = 0, restore_pp = 1;
1105*4882a593Smuzhiyun 
1106*4882a593Smuzhiyun 	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1107*4882a593Smuzhiyun 	if (err)
1108*4882a593Smuzhiyun 		return err;
1109*4882a593Smuzhiyun 
1110*4882a593Smuzhiyun 	if (!port[IFLA_PORT_REQUEST])
1111*4882a593Smuzhiyun 		return -EOPNOTSUPP;
1112*4882a593Smuzhiyun 
1113*4882a593Smuzhiyun 	memcpy(&prev_pp, pp, sizeof(*enic->pp));
1114*4882a593Smuzhiyun 	memset(pp, 0, sizeof(*enic->pp));
1115*4882a593Smuzhiyun 
1116*4882a593Smuzhiyun 	pp->set |= ENIC_SET_REQUEST;
1117*4882a593Smuzhiyun 	pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
1118*4882a593Smuzhiyun 
1119*4882a593Smuzhiyun 	if (port[IFLA_PORT_PROFILE]) {
1120*4882a593Smuzhiyun 		pp->set |= ENIC_SET_NAME;
1121*4882a593Smuzhiyun 		memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
1122*4882a593Smuzhiyun 			PORT_PROFILE_MAX);
1123*4882a593Smuzhiyun 	}
1124*4882a593Smuzhiyun 
1125*4882a593Smuzhiyun 	if (port[IFLA_PORT_INSTANCE_UUID]) {
1126*4882a593Smuzhiyun 		pp->set |= ENIC_SET_INSTANCE;
1127*4882a593Smuzhiyun 		memcpy(pp->instance_uuid,
1128*4882a593Smuzhiyun 			nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1129*4882a593Smuzhiyun 	}
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun 	if (port[IFLA_PORT_HOST_UUID]) {
1132*4882a593Smuzhiyun 		pp->set |= ENIC_SET_HOST;
1133*4882a593Smuzhiyun 		memcpy(pp->host_uuid,
1134*4882a593Smuzhiyun 			nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1135*4882a593Smuzhiyun 	}
1136*4882a593Smuzhiyun 
1137*4882a593Smuzhiyun 	if (vf == PORT_SELF_VF) {
1138*4882a593Smuzhiyun 		/* Special case handling: mac came from IFLA_VF_MAC */
1139*4882a593Smuzhiyun 		if (!is_zero_ether_addr(prev_pp.vf_mac))
1140*4882a593Smuzhiyun 			memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
1141*4882a593Smuzhiyun 
1142*4882a593Smuzhiyun 		if (is_zero_ether_addr(netdev->dev_addr))
1143*4882a593Smuzhiyun 			eth_hw_addr_random(netdev);
1144*4882a593Smuzhiyun 	} else {
1145*4882a593Smuzhiyun 		/* SR-IOV VF: get mac from adapter */
1146*4882a593Smuzhiyun 		ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
1147*4882a593Smuzhiyun 			vnic_dev_get_mac_addr, pp->mac_addr);
1148*4882a593Smuzhiyun 		if (err) {
1149*4882a593Smuzhiyun 			netdev_err(netdev, "Error getting mac for vf %d\n", vf);
1150*4882a593Smuzhiyun 			memcpy(pp, &prev_pp, sizeof(*pp));
1151*4882a593Smuzhiyun 			return enic_dev_status_to_errno(err);
1152*4882a593Smuzhiyun 		}
1153*4882a593Smuzhiyun 	}
1154*4882a593Smuzhiyun 
1155*4882a593Smuzhiyun 	err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
1156*4882a593Smuzhiyun 	if (err) {
1157*4882a593Smuzhiyun 		if (restore_pp) {
1158*4882a593Smuzhiyun 			/* Things are still the way they were: Implicit
1159*4882a593Smuzhiyun 			 * DISASSOCIATE failed
1160*4882a593Smuzhiyun 			 */
1161*4882a593Smuzhiyun 			memcpy(pp, &prev_pp, sizeof(*pp));
1162*4882a593Smuzhiyun 		} else {
1163*4882a593Smuzhiyun 			memset(pp, 0, sizeof(*pp));
1164*4882a593Smuzhiyun 			if (vf == PORT_SELF_VF)
1165*4882a593Smuzhiyun 				eth_zero_addr(netdev->dev_addr);
1166*4882a593Smuzhiyun 		}
1167*4882a593Smuzhiyun 	} else {
1168*4882a593Smuzhiyun 		/* Set flag to indicate that the port assoc/disassoc
1169*4882a593Smuzhiyun 		 * request has been sent out to fw
1170*4882a593Smuzhiyun 		 */
1171*4882a593Smuzhiyun 		pp->set |= ENIC_PORT_REQUEST_APPLIED;
1172*4882a593Smuzhiyun 
1173*4882a593Smuzhiyun 		/* If DISASSOCIATE, clean up all assigned/saved macaddresses */
1174*4882a593Smuzhiyun 		if (pp->request == PORT_REQUEST_DISASSOCIATE) {
1175*4882a593Smuzhiyun 			eth_zero_addr(pp->mac_addr);
1176*4882a593Smuzhiyun 			if (vf == PORT_SELF_VF)
1177*4882a593Smuzhiyun 				eth_zero_addr(netdev->dev_addr);
1178*4882a593Smuzhiyun 		}
1179*4882a593Smuzhiyun 	}
1180*4882a593Smuzhiyun 
1181*4882a593Smuzhiyun 	if (vf == PORT_SELF_VF)
1182*4882a593Smuzhiyun 		eth_zero_addr(pp->vf_mac);
1183*4882a593Smuzhiyun 
1184*4882a593Smuzhiyun 	return err;
1185*4882a593Smuzhiyun }
1186*4882a593Smuzhiyun 
enic_get_vf_port(struct net_device * netdev,int vf,struct sk_buff * skb)1187*4882a593Smuzhiyun static int enic_get_vf_port(struct net_device *netdev, int vf,
1188*4882a593Smuzhiyun 	struct sk_buff *skb)
1189*4882a593Smuzhiyun {
1190*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1191*4882a593Smuzhiyun 	u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
1192*4882a593Smuzhiyun 	struct enic_port_profile *pp;
1193*4882a593Smuzhiyun 	int err;
1194*4882a593Smuzhiyun 
1195*4882a593Smuzhiyun 	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1196*4882a593Smuzhiyun 	if (err)
1197*4882a593Smuzhiyun 		return err;
1198*4882a593Smuzhiyun 
1199*4882a593Smuzhiyun 	if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
1200*4882a593Smuzhiyun 		return -ENODATA;
1201*4882a593Smuzhiyun 
1202*4882a593Smuzhiyun 	err = enic_process_get_pp_request(enic, vf, pp->request, &response);
1203*4882a593Smuzhiyun 	if (err)
1204*4882a593Smuzhiyun 		return err;
1205*4882a593Smuzhiyun 
1206*4882a593Smuzhiyun 	if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
1207*4882a593Smuzhiyun 	    nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
1208*4882a593Smuzhiyun 	    ((pp->set & ENIC_SET_NAME) &&
1209*4882a593Smuzhiyun 	     nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
1210*4882a593Smuzhiyun 	    ((pp->set & ENIC_SET_INSTANCE) &&
1211*4882a593Smuzhiyun 	     nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1212*4882a593Smuzhiyun 		     pp->instance_uuid)) ||
1213*4882a593Smuzhiyun 	    ((pp->set & ENIC_SET_HOST) &&
1214*4882a593Smuzhiyun 	     nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
1215*4882a593Smuzhiyun 		goto nla_put_failure;
1216*4882a593Smuzhiyun 	return 0;
1217*4882a593Smuzhiyun 
1218*4882a593Smuzhiyun nla_put_failure:
1219*4882a593Smuzhiyun 	return -EMSGSIZE;
1220*4882a593Smuzhiyun }
1221*4882a593Smuzhiyun 
enic_free_rq_buf(struct vnic_rq * rq,struct vnic_rq_buf * buf)1222*4882a593Smuzhiyun static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1223*4882a593Smuzhiyun {
1224*4882a593Smuzhiyun 	struct enic *enic = vnic_dev_priv(rq->vdev);
1225*4882a593Smuzhiyun 
1226*4882a593Smuzhiyun 	if (!buf->os_buf)
1227*4882a593Smuzhiyun 		return;
1228*4882a593Smuzhiyun 
1229*4882a593Smuzhiyun 	dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len,
1230*4882a593Smuzhiyun 			 DMA_FROM_DEVICE);
1231*4882a593Smuzhiyun 	dev_kfree_skb_any(buf->os_buf);
1232*4882a593Smuzhiyun 	buf->os_buf = NULL;
1233*4882a593Smuzhiyun }
1234*4882a593Smuzhiyun 
enic_rq_alloc_buf(struct vnic_rq * rq)1235*4882a593Smuzhiyun static int enic_rq_alloc_buf(struct vnic_rq *rq)
1236*4882a593Smuzhiyun {
1237*4882a593Smuzhiyun 	struct enic *enic = vnic_dev_priv(rq->vdev);
1238*4882a593Smuzhiyun 	struct net_device *netdev = enic->netdev;
1239*4882a593Smuzhiyun 	struct sk_buff *skb;
1240*4882a593Smuzhiyun 	unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
1241*4882a593Smuzhiyun 	unsigned int os_buf_index = 0;
1242*4882a593Smuzhiyun 	dma_addr_t dma_addr;
1243*4882a593Smuzhiyun 	struct vnic_rq_buf *buf = rq->to_use;
1244*4882a593Smuzhiyun 
1245*4882a593Smuzhiyun 	if (buf->os_buf) {
1246*4882a593Smuzhiyun 		enic_queue_rq_desc(rq, buf->os_buf, os_buf_index, buf->dma_addr,
1247*4882a593Smuzhiyun 				   buf->len);
1248*4882a593Smuzhiyun 
1249*4882a593Smuzhiyun 		return 0;
1250*4882a593Smuzhiyun 	}
1251*4882a593Smuzhiyun 	skb = netdev_alloc_skb_ip_align(netdev, len);
1252*4882a593Smuzhiyun 	if (!skb)
1253*4882a593Smuzhiyun 		return -ENOMEM;
1254*4882a593Smuzhiyun 
1255*4882a593Smuzhiyun 	dma_addr = dma_map_single(&enic->pdev->dev, skb->data, len,
1256*4882a593Smuzhiyun 				  DMA_FROM_DEVICE);
1257*4882a593Smuzhiyun 	if (unlikely(enic_dma_map_check(enic, dma_addr))) {
1258*4882a593Smuzhiyun 		dev_kfree_skb(skb);
1259*4882a593Smuzhiyun 		return -ENOMEM;
1260*4882a593Smuzhiyun 	}
1261*4882a593Smuzhiyun 
1262*4882a593Smuzhiyun 	enic_queue_rq_desc(rq, skb, os_buf_index,
1263*4882a593Smuzhiyun 		dma_addr, len);
1264*4882a593Smuzhiyun 
1265*4882a593Smuzhiyun 	return 0;
1266*4882a593Smuzhiyun }
1267*4882a593Smuzhiyun 
enic_intr_update_pkt_size(struct vnic_rx_bytes_counter * pkt_size,u32 pkt_len)1268*4882a593Smuzhiyun static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size,
1269*4882a593Smuzhiyun 				      u32 pkt_len)
1270*4882a593Smuzhiyun {
1271*4882a593Smuzhiyun 	if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len)
1272*4882a593Smuzhiyun 		pkt_size->large_pkt_bytes_cnt += pkt_len;
1273*4882a593Smuzhiyun 	else
1274*4882a593Smuzhiyun 		pkt_size->small_pkt_bytes_cnt += pkt_len;
1275*4882a593Smuzhiyun }
1276*4882a593Smuzhiyun 
enic_rxcopybreak(struct net_device * netdev,struct sk_buff ** skb,struct vnic_rq_buf * buf,u16 len)1277*4882a593Smuzhiyun static bool enic_rxcopybreak(struct net_device *netdev, struct sk_buff **skb,
1278*4882a593Smuzhiyun 			     struct vnic_rq_buf *buf, u16 len)
1279*4882a593Smuzhiyun {
1280*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1281*4882a593Smuzhiyun 	struct sk_buff *new_skb;
1282*4882a593Smuzhiyun 
1283*4882a593Smuzhiyun 	if (len > enic->rx_copybreak)
1284*4882a593Smuzhiyun 		return false;
1285*4882a593Smuzhiyun 	new_skb = netdev_alloc_skb_ip_align(netdev, len);
1286*4882a593Smuzhiyun 	if (!new_skb)
1287*4882a593Smuzhiyun 		return false;
1288*4882a593Smuzhiyun 	dma_sync_single_for_cpu(&enic->pdev->dev, buf->dma_addr, len,
1289*4882a593Smuzhiyun 				DMA_FROM_DEVICE);
1290*4882a593Smuzhiyun 	memcpy(new_skb->data, (*skb)->data, len);
1291*4882a593Smuzhiyun 	*skb = new_skb;
1292*4882a593Smuzhiyun 
1293*4882a593Smuzhiyun 	return true;
1294*4882a593Smuzhiyun }
1295*4882a593Smuzhiyun 
enic_rq_indicate_buf(struct vnic_rq * rq,struct cq_desc * cq_desc,struct vnic_rq_buf * buf,int skipped,void * opaque)1296*4882a593Smuzhiyun static void enic_rq_indicate_buf(struct vnic_rq *rq,
1297*4882a593Smuzhiyun 	struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1298*4882a593Smuzhiyun 	int skipped, void *opaque)
1299*4882a593Smuzhiyun {
1300*4882a593Smuzhiyun 	struct enic *enic = vnic_dev_priv(rq->vdev);
1301*4882a593Smuzhiyun 	struct net_device *netdev = enic->netdev;
1302*4882a593Smuzhiyun 	struct sk_buff *skb;
1303*4882a593Smuzhiyun 	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
1304*4882a593Smuzhiyun 
1305*4882a593Smuzhiyun 	u8 type, color, eop, sop, ingress_port, vlan_stripped;
1306*4882a593Smuzhiyun 	u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1307*4882a593Smuzhiyun 	u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1308*4882a593Smuzhiyun 	u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1309*4882a593Smuzhiyun 	u8 packet_error;
1310*4882a593Smuzhiyun 	u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
1311*4882a593Smuzhiyun 	u32 rss_hash;
1312*4882a593Smuzhiyun 	bool outer_csum_ok = true, encap = false;
1313*4882a593Smuzhiyun 
1314*4882a593Smuzhiyun 	if (skipped)
1315*4882a593Smuzhiyun 		return;
1316*4882a593Smuzhiyun 
1317*4882a593Smuzhiyun 	skb = buf->os_buf;
1318*4882a593Smuzhiyun 
1319*4882a593Smuzhiyun 	cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1320*4882a593Smuzhiyun 		&type, &color, &q_number, &completed_index,
1321*4882a593Smuzhiyun 		&ingress_port, &fcoe, &eop, &sop, &rss_type,
1322*4882a593Smuzhiyun 		&csum_not_calc, &rss_hash, &bytes_written,
1323*4882a593Smuzhiyun 		&packet_error, &vlan_stripped, &vlan_tci, &checksum,
1324*4882a593Smuzhiyun 		&fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1325*4882a593Smuzhiyun 		&fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1326*4882a593Smuzhiyun 		&ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1327*4882a593Smuzhiyun 		&fcs_ok);
1328*4882a593Smuzhiyun 
1329*4882a593Smuzhiyun 	if (packet_error) {
1330*4882a593Smuzhiyun 
1331*4882a593Smuzhiyun 		if (!fcs_ok) {
1332*4882a593Smuzhiyun 			if (bytes_written > 0)
1333*4882a593Smuzhiyun 				enic->rq_bad_fcs++;
1334*4882a593Smuzhiyun 			else if (bytes_written == 0)
1335*4882a593Smuzhiyun 				enic->rq_truncated_pkts++;
1336*4882a593Smuzhiyun 		}
1337*4882a593Smuzhiyun 
1338*4882a593Smuzhiyun 		dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len,
1339*4882a593Smuzhiyun 				 DMA_FROM_DEVICE);
1340*4882a593Smuzhiyun 		dev_kfree_skb_any(skb);
1341*4882a593Smuzhiyun 		buf->os_buf = NULL;
1342*4882a593Smuzhiyun 
1343*4882a593Smuzhiyun 		return;
1344*4882a593Smuzhiyun 	}
1345*4882a593Smuzhiyun 
1346*4882a593Smuzhiyun 	if (eop && bytes_written > 0) {
1347*4882a593Smuzhiyun 
1348*4882a593Smuzhiyun 		/* Good receive
1349*4882a593Smuzhiyun 		 */
1350*4882a593Smuzhiyun 
1351*4882a593Smuzhiyun 		if (!enic_rxcopybreak(netdev, &skb, buf, bytes_written)) {
1352*4882a593Smuzhiyun 			buf->os_buf = NULL;
1353*4882a593Smuzhiyun 			dma_unmap_single(&enic->pdev->dev, buf->dma_addr,
1354*4882a593Smuzhiyun 					 buf->len, DMA_FROM_DEVICE);
1355*4882a593Smuzhiyun 		}
1356*4882a593Smuzhiyun 		prefetch(skb->data - NET_IP_ALIGN);
1357*4882a593Smuzhiyun 
1358*4882a593Smuzhiyun 		skb_put(skb, bytes_written);
1359*4882a593Smuzhiyun 		skb->protocol = eth_type_trans(skb, netdev);
1360*4882a593Smuzhiyun 		skb_record_rx_queue(skb, q_number);
1361*4882a593Smuzhiyun 		if ((netdev->features & NETIF_F_RXHASH) && rss_hash &&
1362*4882a593Smuzhiyun 		    (type == 3)) {
1363*4882a593Smuzhiyun 			switch (rss_type) {
1364*4882a593Smuzhiyun 			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4:
1365*4882a593Smuzhiyun 			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6:
1366*4882a593Smuzhiyun 			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX:
1367*4882a593Smuzhiyun 				skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L4);
1368*4882a593Smuzhiyun 				break;
1369*4882a593Smuzhiyun 			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv4:
1370*4882a593Smuzhiyun 			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6:
1371*4882a593Smuzhiyun 			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX:
1372*4882a593Smuzhiyun 				skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L3);
1373*4882a593Smuzhiyun 				break;
1374*4882a593Smuzhiyun 			}
1375*4882a593Smuzhiyun 		}
1376*4882a593Smuzhiyun 		if (enic->vxlan.vxlan_udp_port_number) {
1377*4882a593Smuzhiyun 			switch (enic->vxlan.patch_level) {
1378*4882a593Smuzhiyun 			case 0:
1379*4882a593Smuzhiyun 				if (fcoe) {
1380*4882a593Smuzhiyun 					encap = true;
1381*4882a593Smuzhiyun 					outer_csum_ok = fcoe_fc_crc_ok;
1382*4882a593Smuzhiyun 				}
1383*4882a593Smuzhiyun 				break;
1384*4882a593Smuzhiyun 			case 2:
1385*4882a593Smuzhiyun 				if ((type == 7) &&
1386*4882a593Smuzhiyun 				    (rss_hash & BIT(0))) {
1387*4882a593Smuzhiyun 					encap = true;
1388*4882a593Smuzhiyun 					outer_csum_ok = (rss_hash & BIT(1)) &&
1389*4882a593Smuzhiyun 							(rss_hash & BIT(2));
1390*4882a593Smuzhiyun 				}
1391*4882a593Smuzhiyun 				break;
1392*4882a593Smuzhiyun 			}
1393*4882a593Smuzhiyun 		}
1394*4882a593Smuzhiyun 
1395*4882a593Smuzhiyun 		/* Hardware does not provide whole packet checksum. It only
1396*4882a593Smuzhiyun 		 * provides pseudo checksum. Since hw validates the packet
1397*4882a593Smuzhiyun 		 * checksum but not provide us the checksum value. use
1398*4882a593Smuzhiyun 		 * CHECSUM_UNNECESSARY.
1399*4882a593Smuzhiyun 		 *
1400*4882a593Smuzhiyun 		 * In case of encap pkt tcp_udp_csum_ok/tcp_udp_csum_ok is
1401*4882a593Smuzhiyun 		 * inner csum_ok. outer_csum_ok is set by hw when outer udp
1402*4882a593Smuzhiyun 		 * csum is correct or is zero.
1403*4882a593Smuzhiyun 		 */
1404*4882a593Smuzhiyun 		if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc &&
1405*4882a593Smuzhiyun 		    tcp_udp_csum_ok && outer_csum_ok &&
1406*4882a593Smuzhiyun 		    (ipv4_csum_ok || ipv6)) {
1407*4882a593Smuzhiyun 			skb->ip_summed = CHECKSUM_UNNECESSARY;
1408*4882a593Smuzhiyun 			skb->csum_level = encap;
1409*4882a593Smuzhiyun 		}
1410*4882a593Smuzhiyun 
1411*4882a593Smuzhiyun 		if (vlan_stripped)
1412*4882a593Smuzhiyun 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci);
1413*4882a593Smuzhiyun 
1414*4882a593Smuzhiyun 		skb_mark_napi_id(skb, &enic->napi[rq->index]);
1415*4882a593Smuzhiyun 		if (!(netdev->features & NETIF_F_GRO))
1416*4882a593Smuzhiyun 			netif_receive_skb(skb);
1417*4882a593Smuzhiyun 		else
1418*4882a593Smuzhiyun 			napi_gro_receive(&enic->napi[q_number], skb);
1419*4882a593Smuzhiyun 		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1420*4882a593Smuzhiyun 			enic_intr_update_pkt_size(&cq->pkt_size_counter,
1421*4882a593Smuzhiyun 						  bytes_written);
1422*4882a593Smuzhiyun 	} else {
1423*4882a593Smuzhiyun 
1424*4882a593Smuzhiyun 		/* Buffer overflow
1425*4882a593Smuzhiyun 		 */
1426*4882a593Smuzhiyun 
1427*4882a593Smuzhiyun 		dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len,
1428*4882a593Smuzhiyun 				 DMA_FROM_DEVICE);
1429*4882a593Smuzhiyun 		dev_kfree_skb_any(skb);
1430*4882a593Smuzhiyun 		buf->os_buf = NULL;
1431*4882a593Smuzhiyun 	}
1432*4882a593Smuzhiyun }
1433*4882a593Smuzhiyun 
enic_rq_service(struct vnic_dev * vdev,struct cq_desc * cq_desc,u8 type,u16 q_number,u16 completed_index,void * opaque)1434*4882a593Smuzhiyun static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1435*4882a593Smuzhiyun 	u8 type, u16 q_number, u16 completed_index, void *opaque)
1436*4882a593Smuzhiyun {
1437*4882a593Smuzhiyun 	struct enic *enic = vnic_dev_priv(vdev);
1438*4882a593Smuzhiyun 
1439*4882a593Smuzhiyun 	vnic_rq_service(&enic->rq[q_number], cq_desc,
1440*4882a593Smuzhiyun 		completed_index, VNIC_RQ_RETURN_DESC,
1441*4882a593Smuzhiyun 		enic_rq_indicate_buf, opaque);
1442*4882a593Smuzhiyun 
1443*4882a593Smuzhiyun 	return 0;
1444*4882a593Smuzhiyun }
1445*4882a593Smuzhiyun 
enic_set_int_moderation(struct enic * enic,struct vnic_rq * rq)1446*4882a593Smuzhiyun static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq)
1447*4882a593Smuzhiyun {
1448*4882a593Smuzhiyun 	unsigned int intr = enic_msix_rq_intr(enic, rq->index);
1449*4882a593Smuzhiyun 	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
1450*4882a593Smuzhiyun 	u32 timer = cq->tobe_rx_coal_timeval;
1451*4882a593Smuzhiyun 
1452*4882a593Smuzhiyun 	if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) {
1453*4882a593Smuzhiyun 		vnic_intr_coalescing_timer_set(&enic->intr[intr], timer);
1454*4882a593Smuzhiyun 		cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval;
1455*4882a593Smuzhiyun 	}
1456*4882a593Smuzhiyun }
1457*4882a593Smuzhiyun 
enic_calc_int_moderation(struct enic * enic,struct vnic_rq * rq)1458*4882a593Smuzhiyun static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq)
1459*4882a593Smuzhiyun {
1460*4882a593Smuzhiyun 	struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
1461*4882a593Smuzhiyun 	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
1462*4882a593Smuzhiyun 	struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter;
1463*4882a593Smuzhiyun 	int index;
1464*4882a593Smuzhiyun 	u32 timer;
1465*4882a593Smuzhiyun 	u32 range_start;
1466*4882a593Smuzhiyun 	u32 traffic;
1467*4882a593Smuzhiyun 	u64 delta;
1468*4882a593Smuzhiyun 	ktime_t now = ktime_get();
1469*4882a593Smuzhiyun 
1470*4882a593Smuzhiyun 	delta = ktime_us_delta(now, cq->prev_ts);
1471*4882a593Smuzhiyun 	if (delta < ENIC_AIC_TS_BREAK)
1472*4882a593Smuzhiyun 		return;
1473*4882a593Smuzhiyun 	cq->prev_ts = now;
1474*4882a593Smuzhiyun 
1475*4882a593Smuzhiyun 	traffic = pkt_size_counter->large_pkt_bytes_cnt +
1476*4882a593Smuzhiyun 		  pkt_size_counter->small_pkt_bytes_cnt;
1477*4882a593Smuzhiyun 	/* The table takes Mbps
1478*4882a593Smuzhiyun 	 * traffic *= 8    => bits
1479*4882a593Smuzhiyun 	 * traffic *= (10^6 / delta)    => bps
1480*4882a593Smuzhiyun 	 * traffic /= 10^6     => Mbps
1481*4882a593Smuzhiyun 	 *
1482*4882a593Smuzhiyun 	 * Combining, traffic *= (8 / delta)
1483*4882a593Smuzhiyun 	 */
1484*4882a593Smuzhiyun 
1485*4882a593Smuzhiyun 	traffic <<= 3;
1486*4882a593Smuzhiyun 	traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta;
1487*4882a593Smuzhiyun 
1488*4882a593Smuzhiyun 	for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++)
1489*4882a593Smuzhiyun 		if (traffic < mod_table[index].rx_rate)
1490*4882a593Smuzhiyun 			break;
1491*4882a593Smuzhiyun 	range_start = (pkt_size_counter->small_pkt_bytes_cnt >
1492*4882a593Smuzhiyun 		       pkt_size_counter->large_pkt_bytes_cnt << 1) ?
1493*4882a593Smuzhiyun 		      rx_coal->small_pkt_range_start :
1494*4882a593Smuzhiyun 		      rx_coal->large_pkt_range_start;
1495*4882a593Smuzhiyun 	timer = range_start + ((rx_coal->range_end - range_start) *
1496*4882a593Smuzhiyun 			       mod_table[index].range_percent / 100);
1497*4882a593Smuzhiyun 	/* Damping */
1498*4882a593Smuzhiyun 	cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1;
1499*4882a593Smuzhiyun 
1500*4882a593Smuzhiyun 	pkt_size_counter->large_pkt_bytes_cnt = 0;
1501*4882a593Smuzhiyun 	pkt_size_counter->small_pkt_bytes_cnt = 0;
1502*4882a593Smuzhiyun }
1503*4882a593Smuzhiyun 
enic_poll(struct napi_struct * napi,int budget)1504*4882a593Smuzhiyun static int enic_poll(struct napi_struct *napi, int budget)
1505*4882a593Smuzhiyun {
1506*4882a593Smuzhiyun 	struct net_device *netdev = napi->dev;
1507*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1508*4882a593Smuzhiyun 	unsigned int cq_rq = enic_cq_rq(enic, 0);
1509*4882a593Smuzhiyun 	unsigned int cq_wq = enic_cq_wq(enic, 0);
1510*4882a593Smuzhiyun 	unsigned int intr = enic_legacy_io_intr();
1511*4882a593Smuzhiyun 	unsigned int rq_work_to_do = budget;
1512*4882a593Smuzhiyun 	unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET;
1513*4882a593Smuzhiyun 	unsigned int  work_done, rq_work_done = 0, wq_work_done;
1514*4882a593Smuzhiyun 	int err;
1515*4882a593Smuzhiyun 
1516*4882a593Smuzhiyun 	wq_work_done = vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do,
1517*4882a593Smuzhiyun 				       enic_wq_service, NULL);
1518*4882a593Smuzhiyun 
1519*4882a593Smuzhiyun 	if (budget > 0)
1520*4882a593Smuzhiyun 		rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
1521*4882a593Smuzhiyun 			rq_work_to_do, enic_rq_service, NULL);
1522*4882a593Smuzhiyun 
1523*4882a593Smuzhiyun 	/* Accumulate intr event credits for this polling
1524*4882a593Smuzhiyun 	 * cycle.  An intr event is the completion of a
1525*4882a593Smuzhiyun 	 * a WQ or RQ packet.
1526*4882a593Smuzhiyun 	 */
1527*4882a593Smuzhiyun 
1528*4882a593Smuzhiyun 	work_done = rq_work_done + wq_work_done;
1529*4882a593Smuzhiyun 
1530*4882a593Smuzhiyun 	if (work_done > 0)
1531*4882a593Smuzhiyun 		vnic_intr_return_credits(&enic->intr[intr],
1532*4882a593Smuzhiyun 			work_done,
1533*4882a593Smuzhiyun 			0 /* don't unmask intr */,
1534*4882a593Smuzhiyun 			0 /* don't reset intr timer */);
1535*4882a593Smuzhiyun 
1536*4882a593Smuzhiyun 	err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1537*4882a593Smuzhiyun 
1538*4882a593Smuzhiyun 	/* Buffer allocation failed. Stay in polling
1539*4882a593Smuzhiyun 	 * mode so we can try to fill the ring again.
1540*4882a593Smuzhiyun 	 */
1541*4882a593Smuzhiyun 
1542*4882a593Smuzhiyun 	if (err)
1543*4882a593Smuzhiyun 		rq_work_done = rq_work_to_do;
1544*4882a593Smuzhiyun 	if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1545*4882a593Smuzhiyun 		/* Call the function which refreshes the intr coalescing timer
1546*4882a593Smuzhiyun 		 * value based on the traffic.
1547*4882a593Smuzhiyun 		 */
1548*4882a593Smuzhiyun 		enic_calc_int_moderation(enic, &enic->rq[0]);
1549*4882a593Smuzhiyun 
1550*4882a593Smuzhiyun 	if ((rq_work_done < budget) && napi_complete_done(napi, rq_work_done)) {
1551*4882a593Smuzhiyun 
1552*4882a593Smuzhiyun 		/* Some work done, but not enough to stay in polling,
1553*4882a593Smuzhiyun 		 * exit polling
1554*4882a593Smuzhiyun 		 */
1555*4882a593Smuzhiyun 
1556*4882a593Smuzhiyun 		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1557*4882a593Smuzhiyun 			enic_set_int_moderation(enic, &enic->rq[0]);
1558*4882a593Smuzhiyun 		vnic_intr_unmask(&enic->intr[intr]);
1559*4882a593Smuzhiyun 	}
1560*4882a593Smuzhiyun 
1561*4882a593Smuzhiyun 	return rq_work_done;
1562*4882a593Smuzhiyun }
1563*4882a593Smuzhiyun 
1564*4882a593Smuzhiyun #ifdef CONFIG_RFS_ACCEL
enic_free_rx_cpu_rmap(struct enic * enic)1565*4882a593Smuzhiyun static void enic_free_rx_cpu_rmap(struct enic *enic)
1566*4882a593Smuzhiyun {
1567*4882a593Smuzhiyun 	free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap);
1568*4882a593Smuzhiyun 	enic->netdev->rx_cpu_rmap = NULL;
1569*4882a593Smuzhiyun }
1570*4882a593Smuzhiyun 
enic_set_rx_cpu_rmap(struct enic * enic)1571*4882a593Smuzhiyun static void enic_set_rx_cpu_rmap(struct enic *enic)
1572*4882a593Smuzhiyun {
1573*4882a593Smuzhiyun 	int i, res;
1574*4882a593Smuzhiyun 
1575*4882a593Smuzhiyun 	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) {
1576*4882a593Smuzhiyun 		enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count);
1577*4882a593Smuzhiyun 		if (unlikely(!enic->netdev->rx_cpu_rmap))
1578*4882a593Smuzhiyun 			return;
1579*4882a593Smuzhiyun 		for (i = 0; i < enic->rq_count; i++) {
1580*4882a593Smuzhiyun 			res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap,
1581*4882a593Smuzhiyun 					       enic->msix_entry[i].vector);
1582*4882a593Smuzhiyun 			if (unlikely(res)) {
1583*4882a593Smuzhiyun 				enic_free_rx_cpu_rmap(enic);
1584*4882a593Smuzhiyun 				return;
1585*4882a593Smuzhiyun 			}
1586*4882a593Smuzhiyun 		}
1587*4882a593Smuzhiyun 	}
1588*4882a593Smuzhiyun }
1589*4882a593Smuzhiyun 
1590*4882a593Smuzhiyun #else
1591*4882a593Smuzhiyun 
enic_free_rx_cpu_rmap(struct enic * enic)1592*4882a593Smuzhiyun static void enic_free_rx_cpu_rmap(struct enic *enic)
1593*4882a593Smuzhiyun {
1594*4882a593Smuzhiyun }
1595*4882a593Smuzhiyun 
enic_set_rx_cpu_rmap(struct enic * enic)1596*4882a593Smuzhiyun static void enic_set_rx_cpu_rmap(struct enic *enic)
1597*4882a593Smuzhiyun {
1598*4882a593Smuzhiyun }
1599*4882a593Smuzhiyun 
1600*4882a593Smuzhiyun #endif /* CONFIG_RFS_ACCEL */
1601*4882a593Smuzhiyun 
enic_poll_msix_wq(struct napi_struct * napi,int budget)1602*4882a593Smuzhiyun static int enic_poll_msix_wq(struct napi_struct *napi, int budget)
1603*4882a593Smuzhiyun {
1604*4882a593Smuzhiyun 	struct net_device *netdev = napi->dev;
1605*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1606*4882a593Smuzhiyun 	unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count;
1607*4882a593Smuzhiyun 	struct vnic_wq *wq = &enic->wq[wq_index];
1608*4882a593Smuzhiyun 	unsigned int cq;
1609*4882a593Smuzhiyun 	unsigned int intr;
1610*4882a593Smuzhiyun 	unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET;
1611*4882a593Smuzhiyun 	unsigned int wq_work_done;
1612*4882a593Smuzhiyun 	unsigned int wq_irq;
1613*4882a593Smuzhiyun 
1614*4882a593Smuzhiyun 	wq_irq = wq->index;
1615*4882a593Smuzhiyun 	cq = enic_cq_wq(enic, wq_irq);
1616*4882a593Smuzhiyun 	intr = enic_msix_wq_intr(enic, wq_irq);
1617*4882a593Smuzhiyun 	wq_work_done = vnic_cq_service(&enic->cq[cq], wq_work_to_do,
1618*4882a593Smuzhiyun 				       enic_wq_service, NULL);
1619*4882a593Smuzhiyun 
1620*4882a593Smuzhiyun 	vnic_intr_return_credits(&enic->intr[intr], wq_work_done,
1621*4882a593Smuzhiyun 				 0 /* don't unmask intr */,
1622*4882a593Smuzhiyun 				 1 /* reset intr timer */);
1623*4882a593Smuzhiyun 	if (!wq_work_done) {
1624*4882a593Smuzhiyun 		napi_complete(napi);
1625*4882a593Smuzhiyun 		vnic_intr_unmask(&enic->intr[intr]);
1626*4882a593Smuzhiyun 		return 0;
1627*4882a593Smuzhiyun 	}
1628*4882a593Smuzhiyun 
1629*4882a593Smuzhiyun 	return budget;
1630*4882a593Smuzhiyun }
1631*4882a593Smuzhiyun 
enic_poll_msix_rq(struct napi_struct * napi,int budget)1632*4882a593Smuzhiyun static int enic_poll_msix_rq(struct napi_struct *napi, int budget)
1633*4882a593Smuzhiyun {
1634*4882a593Smuzhiyun 	struct net_device *netdev = napi->dev;
1635*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1636*4882a593Smuzhiyun 	unsigned int rq = (napi - &enic->napi[0]);
1637*4882a593Smuzhiyun 	unsigned int cq = enic_cq_rq(enic, rq);
1638*4882a593Smuzhiyun 	unsigned int intr = enic_msix_rq_intr(enic, rq);
1639*4882a593Smuzhiyun 	unsigned int work_to_do = budget;
1640*4882a593Smuzhiyun 	unsigned int work_done = 0;
1641*4882a593Smuzhiyun 	int err;
1642*4882a593Smuzhiyun 
1643*4882a593Smuzhiyun 	/* Service RQ
1644*4882a593Smuzhiyun 	 */
1645*4882a593Smuzhiyun 
1646*4882a593Smuzhiyun 	if (budget > 0)
1647*4882a593Smuzhiyun 		work_done = vnic_cq_service(&enic->cq[cq],
1648*4882a593Smuzhiyun 			work_to_do, enic_rq_service, NULL);
1649*4882a593Smuzhiyun 
1650*4882a593Smuzhiyun 	/* Return intr event credits for this polling
1651*4882a593Smuzhiyun 	 * cycle.  An intr event is the completion of a
1652*4882a593Smuzhiyun 	 * RQ packet.
1653*4882a593Smuzhiyun 	 */
1654*4882a593Smuzhiyun 
1655*4882a593Smuzhiyun 	if (work_done > 0)
1656*4882a593Smuzhiyun 		vnic_intr_return_credits(&enic->intr[intr],
1657*4882a593Smuzhiyun 			work_done,
1658*4882a593Smuzhiyun 			0 /* don't unmask intr */,
1659*4882a593Smuzhiyun 			0 /* don't reset intr timer */);
1660*4882a593Smuzhiyun 
1661*4882a593Smuzhiyun 	err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
1662*4882a593Smuzhiyun 
1663*4882a593Smuzhiyun 	/* Buffer allocation failed. Stay in polling mode
1664*4882a593Smuzhiyun 	 * so we can try to fill the ring again.
1665*4882a593Smuzhiyun 	 */
1666*4882a593Smuzhiyun 
1667*4882a593Smuzhiyun 	if (err)
1668*4882a593Smuzhiyun 		work_done = work_to_do;
1669*4882a593Smuzhiyun 	if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1670*4882a593Smuzhiyun 		/* Call the function which refreshes the intr coalescing timer
1671*4882a593Smuzhiyun 		 * value based on the traffic.
1672*4882a593Smuzhiyun 		 */
1673*4882a593Smuzhiyun 		enic_calc_int_moderation(enic, &enic->rq[rq]);
1674*4882a593Smuzhiyun 
1675*4882a593Smuzhiyun 	if ((work_done < budget) && napi_complete_done(napi, work_done)) {
1676*4882a593Smuzhiyun 
1677*4882a593Smuzhiyun 		/* Some work done, but not enough to stay in polling,
1678*4882a593Smuzhiyun 		 * exit polling
1679*4882a593Smuzhiyun 		 */
1680*4882a593Smuzhiyun 
1681*4882a593Smuzhiyun 		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1682*4882a593Smuzhiyun 			enic_set_int_moderation(enic, &enic->rq[rq]);
1683*4882a593Smuzhiyun 		vnic_intr_unmask(&enic->intr[intr]);
1684*4882a593Smuzhiyun 	}
1685*4882a593Smuzhiyun 
1686*4882a593Smuzhiyun 	return work_done;
1687*4882a593Smuzhiyun }
1688*4882a593Smuzhiyun 
enic_notify_timer(struct timer_list * t)1689*4882a593Smuzhiyun static void enic_notify_timer(struct timer_list *t)
1690*4882a593Smuzhiyun {
1691*4882a593Smuzhiyun 	struct enic *enic = from_timer(enic, t, notify_timer);
1692*4882a593Smuzhiyun 
1693*4882a593Smuzhiyun 	enic_notify_check(enic);
1694*4882a593Smuzhiyun 
1695*4882a593Smuzhiyun 	mod_timer(&enic->notify_timer,
1696*4882a593Smuzhiyun 		round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
1697*4882a593Smuzhiyun }
1698*4882a593Smuzhiyun 
enic_free_intr(struct enic * enic)1699*4882a593Smuzhiyun static void enic_free_intr(struct enic *enic)
1700*4882a593Smuzhiyun {
1701*4882a593Smuzhiyun 	struct net_device *netdev = enic->netdev;
1702*4882a593Smuzhiyun 	unsigned int i;
1703*4882a593Smuzhiyun 
1704*4882a593Smuzhiyun 	enic_free_rx_cpu_rmap(enic);
1705*4882a593Smuzhiyun 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1706*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_INTX:
1707*4882a593Smuzhiyun 		free_irq(enic->pdev->irq, netdev);
1708*4882a593Smuzhiyun 		break;
1709*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSI:
1710*4882a593Smuzhiyun 		free_irq(enic->pdev->irq, enic);
1711*4882a593Smuzhiyun 		break;
1712*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSIX:
1713*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1714*4882a593Smuzhiyun 			if (enic->msix[i].requested)
1715*4882a593Smuzhiyun 				free_irq(enic->msix_entry[i].vector,
1716*4882a593Smuzhiyun 					enic->msix[i].devid);
1717*4882a593Smuzhiyun 		break;
1718*4882a593Smuzhiyun 	default:
1719*4882a593Smuzhiyun 		break;
1720*4882a593Smuzhiyun 	}
1721*4882a593Smuzhiyun }
1722*4882a593Smuzhiyun 
enic_request_intr(struct enic * enic)1723*4882a593Smuzhiyun static int enic_request_intr(struct enic *enic)
1724*4882a593Smuzhiyun {
1725*4882a593Smuzhiyun 	struct net_device *netdev = enic->netdev;
1726*4882a593Smuzhiyun 	unsigned int i, intr;
1727*4882a593Smuzhiyun 	int err = 0;
1728*4882a593Smuzhiyun 
1729*4882a593Smuzhiyun 	enic_set_rx_cpu_rmap(enic);
1730*4882a593Smuzhiyun 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1731*4882a593Smuzhiyun 
1732*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_INTX:
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun 		err = request_irq(enic->pdev->irq, enic_isr_legacy,
1735*4882a593Smuzhiyun 			IRQF_SHARED, netdev->name, netdev);
1736*4882a593Smuzhiyun 		break;
1737*4882a593Smuzhiyun 
1738*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSI:
1739*4882a593Smuzhiyun 
1740*4882a593Smuzhiyun 		err = request_irq(enic->pdev->irq, enic_isr_msi,
1741*4882a593Smuzhiyun 			0, netdev->name, enic);
1742*4882a593Smuzhiyun 		break;
1743*4882a593Smuzhiyun 
1744*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSIX:
1745*4882a593Smuzhiyun 
1746*4882a593Smuzhiyun 		for (i = 0; i < enic->rq_count; i++) {
1747*4882a593Smuzhiyun 			intr = enic_msix_rq_intr(enic, i);
1748*4882a593Smuzhiyun 			snprintf(enic->msix[intr].devname,
1749*4882a593Smuzhiyun 				sizeof(enic->msix[intr].devname),
1750*4882a593Smuzhiyun 				"%s-rx-%u", netdev->name, i);
1751*4882a593Smuzhiyun 			enic->msix[intr].isr = enic_isr_msix;
1752*4882a593Smuzhiyun 			enic->msix[intr].devid = &enic->napi[i];
1753*4882a593Smuzhiyun 		}
1754*4882a593Smuzhiyun 
1755*4882a593Smuzhiyun 		for (i = 0; i < enic->wq_count; i++) {
1756*4882a593Smuzhiyun 			int wq = enic_cq_wq(enic, i);
1757*4882a593Smuzhiyun 
1758*4882a593Smuzhiyun 			intr = enic_msix_wq_intr(enic, i);
1759*4882a593Smuzhiyun 			snprintf(enic->msix[intr].devname,
1760*4882a593Smuzhiyun 				sizeof(enic->msix[intr].devname),
1761*4882a593Smuzhiyun 				"%s-tx-%u", netdev->name, i);
1762*4882a593Smuzhiyun 			enic->msix[intr].isr = enic_isr_msix;
1763*4882a593Smuzhiyun 			enic->msix[intr].devid = &enic->napi[wq];
1764*4882a593Smuzhiyun 		}
1765*4882a593Smuzhiyun 
1766*4882a593Smuzhiyun 		intr = enic_msix_err_intr(enic);
1767*4882a593Smuzhiyun 		snprintf(enic->msix[intr].devname,
1768*4882a593Smuzhiyun 			sizeof(enic->msix[intr].devname),
1769*4882a593Smuzhiyun 			"%s-err", netdev->name);
1770*4882a593Smuzhiyun 		enic->msix[intr].isr = enic_isr_msix_err;
1771*4882a593Smuzhiyun 		enic->msix[intr].devid = enic;
1772*4882a593Smuzhiyun 
1773*4882a593Smuzhiyun 		intr = enic_msix_notify_intr(enic);
1774*4882a593Smuzhiyun 		snprintf(enic->msix[intr].devname,
1775*4882a593Smuzhiyun 			sizeof(enic->msix[intr].devname),
1776*4882a593Smuzhiyun 			"%s-notify", netdev->name);
1777*4882a593Smuzhiyun 		enic->msix[intr].isr = enic_isr_msix_notify;
1778*4882a593Smuzhiyun 		enic->msix[intr].devid = enic;
1779*4882a593Smuzhiyun 
1780*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1781*4882a593Smuzhiyun 			enic->msix[i].requested = 0;
1782*4882a593Smuzhiyun 
1783*4882a593Smuzhiyun 		for (i = 0; i < enic->intr_count; i++) {
1784*4882a593Smuzhiyun 			err = request_irq(enic->msix_entry[i].vector,
1785*4882a593Smuzhiyun 				enic->msix[i].isr, 0,
1786*4882a593Smuzhiyun 				enic->msix[i].devname,
1787*4882a593Smuzhiyun 				enic->msix[i].devid);
1788*4882a593Smuzhiyun 			if (err) {
1789*4882a593Smuzhiyun 				enic_free_intr(enic);
1790*4882a593Smuzhiyun 				break;
1791*4882a593Smuzhiyun 			}
1792*4882a593Smuzhiyun 			enic->msix[i].requested = 1;
1793*4882a593Smuzhiyun 		}
1794*4882a593Smuzhiyun 
1795*4882a593Smuzhiyun 		break;
1796*4882a593Smuzhiyun 
1797*4882a593Smuzhiyun 	default:
1798*4882a593Smuzhiyun 		break;
1799*4882a593Smuzhiyun 	}
1800*4882a593Smuzhiyun 
1801*4882a593Smuzhiyun 	return err;
1802*4882a593Smuzhiyun }
1803*4882a593Smuzhiyun 
enic_synchronize_irqs(struct enic * enic)1804*4882a593Smuzhiyun static void enic_synchronize_irqs(struct enic *enic)
1805*4882a593Smuzhiyun {
1806*4882a593Smuzhiyun 	unsigned int i;
1807*4882a593Smuzhiyun 
1808*4882a593Smuzhiyun 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1809*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_INTX:
1810*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSI:
1811*4882a593Smuzhiyun 		synchronize_irq(enic->pdev->irq);
1812*4882a593Smuzhiyun 		break;
1813*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSIX:
1814*4882a593Smuzhiyun 		for (i = 0; i < enic->intr_count; i++)
1815*4882a593Smuzhiyun 			synchronize_irq(enic->msix_entry[i].vector);
1816*4882a593Smuzhiyun 		break;
1817*4882a593Smuzhiyun 	default:
1818*4882a593Smuzhiyun 		break;
1819*4882a593Smuzhiyun 	}
1820*4882a593Smuzhiyun }
1821*4882a593Smuzhiyun 
enic_set_rx_coal_setting(struct enic * enic)1822*4882a593Smuzhiyun static void enic_set_rx_coal_setting(struct enic *enic)
1823*4882a593Smuzhiyun {
1824*4882a593Smuzhiyun 	unsigned int speed;
1825*4882a593Smuzhiyun 	int index = -1;
1826*4882a593Smuzhiyun 	struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
1827*4882a593Smuzhiyun 
1828*4882a593Smuzhiyun 	/* 1. Read the link speed from fw
1829*4882a593Smuzhiyun 	 * 2. Pick the default range for the speed
1830*4882a593Smuzhiyun 	 * 3. Update it in enic->rx_coalesce_setting
1831*4882a593Smuzhiyun 	 */
1832*4882a593Smuzhiyun 	speed = vnic_dev_port_speed(enic->vdev);
1833*4882a593Smuzhiyun 	if (ENIC_LINK_SPEED_10G < speed)
1834*4882a593Smuzhiyun 		index = ENIC_LINK_40G_INDEX;
1835*4882a593Smuzhiyun 	else if (ENIC_LINK_SPEED_4G < speed)
1836*4882a593Smuzhiyun 		index = ENIC_LINK_10G_INDEX;
1837*4882a593Smuzhiyun 	else
1838*4882a593Smuzhiyun 		index = ENIC_LINK_4G_INDEX;
1839*4882a593Smuzhiyun 
1840*4882a593Smuzhiyun 	rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start;
1841*4882a593Smuzhiyun 	rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start;
1842*4882a593Smuzhiyun 	rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END;
1843*4882a593Smuzhiyun 
1844*4882a593Smuzhiyun 	/* Start with the value provided by UCSM */
1845*4882a593Smuzhiyun 	for (index = 0; index < enic->rq_count; index++)
1846*4882a593Smuzhiyun 		enic->cq[index].cur_rx_coal_timeval =
1847*4882a593Smuzhiyun 				enic->config.intr_timer_usec;
1848*4882a593Smuzhiyun 
1849*4882a593Smuzhiyun 	rx_coal->use_adaptive_rx_coalesce = 1;
1850*4882a593Smuzhiyun }
1851*4882a593Smuzhiyun 
enic_dev_notify_set(struct enic * enic)1852*4882a593Smuzhiyun static int enic_dev_notify_set(struct enic *enic)
1853*4882a593Smuzhiyun {
1854*4882a593Smuzhiyun 	int err;
1855*4882a593Smuzhiyun 
1856*4882a593Smuzhiyun 	spin_lock_bh(&enic->devcmd_lock);
1857*4882a593Smuzhiyun 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1858*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_INTX:
1859*4882a593Smuzhiyun 		err = vnic_dev_notify_set(enic->vdev,
1860*4882a593Smuzhiyun 			enic_legacy_notify_intr());
1861*4882a593Smuzhiyun 		break;
1862*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSIX:
1863*4882a593Smuzhiyun 		err = vnic_dev_notify_set(enic->vdev,
1864*4882a593Smuzhiyun 			enic_msix_notify_intr(enic));
1865*4882a593Smuzhiyun 		break;
1866*4882a593Smuzhiyun 	default:
1867*4882a593Smuzhiyun 		err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1868*4882a593Smuzhiyun 		break;
1869*4882a593Smuzhiyun 	}
1870*4882a593Smuzhiyun 	spin_unlock_bh(&enic->devcmd_lock);
1871*4882a593Smuzhiyun 
1872*4882a593Smuzhiyun 	return err;
1873*4882a593Smuzhiyun }
1874*4882a593Smuzhiyun 
enic_notify_timer_start(struct enic * enic)1875*4882a593Smuzhiyun static void enic_notify_timer_start(struct enic *enic)
1876*4882a593Smuzhiyun {
1877*4882a593Smuzhiyun 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1878*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSI:
1879*4882a593Smuzhiyun 		mod_timer(&enic->notify_timer, jiffies);
1880*4882a593Smuzhiyun 		break;
1881*4882a593Smuzhiyun 	default:
1882*4882a593Smuzhiyun 		/* Using intr for notification for INTx/MSI-X */
1883*4882a593Smuzhiyun 		break;
1884*4882a593Smuzhiyun 	}
1885*4882a593Smuzhiyun }
1886*4882a593Smuzhiyun 
1887*4882a593Smuzhiyun /* rtnl lock is held, process context */
enic_open(struct net_device * netdev)1888*4882a593Smuzhiyun static int enic_open(struct net_device *netdev)
1889*4882a593Smuzhiyun {
1890*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1891*4882a593Smuzhiyun 	unsigned int i;
1892*4882a593Smuzhiyun 	int err, ret;
1893*4882a593Smuzhiyun 
1894*4882a593Smuzhiyun 	err = enic_request_intr(enic);
1895*4882a593Smuzhiyun 	if (err) {
1896*4882a593Smuzhiyun 		netdev_err(netdev, "Unable to request irq.\n");
1897*4882a593Smuzhiyun 		return err;
1898*4882a593Smuzhiyun 	}
1899*4882a593Smuzhiyun 	enic_init_affinity_hint(enic);
1900*4882a593Smuzhiyun 	enic_set_affinity_hint(enic);
1901*4882a593Smuzhiyun 
1902*4882a593Smuzhiyun 	err = enic_dev_notify_set(enic);
1903*4882a593Smuzhiyun 	if (err) {
1904*4882a593Smuzhiyun 		netdev_err(netdev,
1905*4882a593Smuzhiyun 			"Failed to alloc notify buffer, aborting.\n");
1906*4882a593Smuzhiyun 		goto err_out_free_intr;
1907*4882a593Smuzhiyun 	}
1908*4882a593Smuzhiyun 
1909*4882a593Smuzhiyun 	for (i = 0; i < enic->rq_count; i++) {
1910*4882a593Smuzhiyun 		/* enable rq before updating rq desc */
1911*4882a593Smuzhiyun 		vnic_rq_enable(&enic->rq[i]);
1912*4882a593Smuzhiyun 		vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
1913*4882a593Smuzhiyun 		/* Need at least one buffer on ring to get going */
1914*4882a593Smuzhiyun 		if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
1915*4882a593Smuzhiyun 			netdev_err(netdev, "Unable to alloc receive buffers\n");
1916*4882a593Smuzhiyun 			err = -ENOMEM;
1917*4882a593Smuzhiyun 			goto err_out_free_rq;
1918*4882a593Smuzhiyun 		}
1919*4882a593Smuzhiyun 	}
1920*4882a593Smuzhiyun 
1921*4882a593Smuzhiyun 	for (i = 0; i < enic->wq_count; i++)
1922*4882a593Smuzhiyun 		vnic_wq_enable(&enic->wq[i]);
1923*4882a593Smuzhiyun 
1924*4882a593Smuzhiyun 	if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
1925*4882a593Smuzhiyun 		enic_dev_add_station_addr(enic);
1926*4882a593Smuzhiyun 
1927*4882a593Smuzhiyun 	enic_set_rx_mode(netdev);
1928*4882a593Smuzhiyun 
1929*4882a593Smuzhiyun 	netif_tx_wake_all_queues(netdev);
1930*4882a593Smuzhiyun 
1931*4882a593Smuzhiyun 	for (i = 0; i < enic->rq_count; i++)
1932*4882a593Smuzhiyun 		napi_enable(&enic->napi[i]);
1933*4882a593Smuzhiyun 
1934*4882a593Smuzhiyun 	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
1935*4882a593Smuzhiyun 		for (i = 0; i < enic->wq_count; i++)
1936*4882a593Smuzhiyun 			napi_enable(&enic->napi[enic_cq_wq(enic, i)]);
1937*4882a593Smuzhiyun 	enic_dev_enable(enic);
1938*4882a593Smuzhiyun 
1939*4882a593Smuzhiyun 	for (i = 0; i < enic->intr_count; i++)
1940*4882a593Smuzhiyun 		vnic_intr_unmask(&enic->intr[i]);
1941*4882a593Smuzhiyun 
1942*4882a593Smuzhiyun 	enic_notify_timer_start(enic);
1943*4882a593Smuzhiyun 	enic_rfs_timer_start(enic);
1944*4882a593Smuzhiyun 
1945*4882a593Smuzhiyun 	return 0;
1946*4882a593Smuzhiyun 
1947*4882a593Smuzhiyun err_out_free_rq:
1948*4882a593Smuzhiyun 	for (i = 0; i < enic->rq_count; i++) {
1949*4882a593Smuzhiyun 		ret = vnic_rq_disable(&enic->rq[i]);
1950*4882a593Smuzhiyun 		if (!ret)
1951*4882a593Smuzhiyun 			vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1952*4882a593Smuzhiyun 	}
1953*4882a593Smuzhiyun 	enic_dev_notify_unset(enic);
1954*4882a593Smuzhiyun err_out_free_intr:
1955*4882a593Smuzhiyun 	enic_unset_affinity_hint(enic);
1956*4882a593Smuzhiyun 	enic_free_intr(enic);
1957*4882a593Smuzhiyun 
1958*4882a593Smuzhiyun 	return err;
1959*4882a593Smuzhiyun }
1960*4882a593Smuzhiyun 
1961*4882a593Smuzhiyun /* rtnl lock is held, process context */
enic_stop(struct net_device * netdev)1962*4882a593Smuzhiyun static int enic_stop(struct net_device *netdev)
1963*4882a593Smuzhiyun {
1964*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
1965*4882a593Smuzhiyun 	unsigned int i;
1966*4882a593Smuzhiyun 	int err;
1967*4882a593Smuzhiyun 
1968*4882a593Smuzhiyun 	for (i = 0; i < enic->intr_count; i++) {
1969*4882a593Smuzhiyun 		vnic_intr_mask(&enic->intr[i]);
1970*4882a593Smuzhiyun 		(void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1971*4882a593Smuzhiyun 	}
1972*4882a593Smuzhiyun 
1973*4882a593Smuzhiyun 	enic_synchronize_irqs(enic);
1974*4882a593Smuzhiyun 
1975*4882a593Smuzhiyun 	del_timer_sync(&enic->notify_timer);
1976*4882a593Smuzhiyun 	enic_rfs_flw_tbl_free(enic);
1977*4882a593Smuzhiyun 
1978*4882a593Smuzhiyun 	enic_dev_disable(enic);
1979*4882a593Smuzhiyun 
1980*4882a593Smuzhiyun 	for (i = 0; i < enic->rq_count; i++)
1981*4882a593Smuzhiyun 		napi_disable(&enic->napi[i]);
1982*4882a593Smuzhiyun 
1983*4882a593Smuzhiyun 	netif_carrier_off(netdev);
1984*4882a593Smuzhiyun 	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
1985*4882a593Smuzhiyun 		for (i = 0; i < enic->wq_count; i++)
1986*4882a593Smuzhiyun 			napi_disable(&enic->napi[enic_cq_wq(enic, i)]);
1987*4882a593Smuzhiyun 	netif_tx_disable(netdev);
1988*4882a593Smuzhiyun 
1989*4882a593Smuzhiyun 	if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
1990*4882a593Smuzhiyun 		enic_dev_del_station_addr(enic);
1991*4882a593Smuzhiyun 
1992*4882a593Smuzhiyun 	for (i = 0; i < enic->wq_count; i++) {
1993*4882a593Smuzhiyun 		err = vnic_wq_disable(&enic->wq[i]);
1994*4882a593Smuzhiyun 		if (err)
1995*4882a593Smuzhiyun 			return err;
1996*4882a593Smuzhiyun 	}
1997*4882a593Smuzhiyun 	for (i = 0; i < enic->rq_count; i++) {
1998*4882a593Smuzhiyun 		err = vnic_rq_disable(&enic->rq[i]);
1999*4882a593Smuzhiyun 		if (err)
2000*4882a593Smuzhiyun 			return err;
2001*4882a593Smuzhiyun 	}
2002*4882a593Smuzhiyun 
2003*4882a593Smuzhiyun 	enic_dev_notify_unset(enic);
2004*4882a593Smuzhiyun 	enic_unset_affinity_hint(enic);
2005*4882a593Smuzhiyun 	enic_free_intr(enic);
2006*4882a593Smuzhiyun 
2007*4882a593Smuzhiyun 	for (i = 0; i < enic->wq_count; i++)
2008*4882a593Smuzhiyun 		vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
2009*4882a593Smuzhiyun 	for (i = 0; i < enic->rq_count; i++)
2010*4882a593Smuzhiyun 		vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
2011*4882a593Smuzhiyun 	for (i = 0; i < enic->cq_count; i++)
2012*4882a593Smuzhiyun 		vnic_cq_clean(&enic->cq[i]);
2013*4882a593Smuzhiyun 	for (i = 0; i < enic->intr_count; i++)
2014*4882a593Smuzhiyun 		vnic_intr_clean(&enic->intr[i]);
2015*4882a593Smuzhiyun 
2016*4882a593Smuzhiyun 	return 0;
2017*4882a593Smuzhiyun }
2018*4882a593Smuzhiyun 
_enic_change_mtu(struct net_device * netdev,int new_mtu)2019*4882a593Smuzhiyun static int _enic_change_mtu(struct net_device *netdev, int new_mtu)
2020*4882a593Smuzhiyun {
2021*4882a593Smuzhiyun 	bool running = netif_running(netdev);
2022*4882a593Smuzhiyun 	int err = 0;
2023*4882a593Smuzhiyun 
2024*4882a593Smuzhiyun 	ASSERT_RTNL();
2025*4882a593Smuzhiyun 	if (running) {
2026*4882a593Smuzhiyun 		err = enic_stop(netdev);
2027*4882a593Smuzhiyun 		if (err)
2028*4882a593Smuzhiyun 			return err;
2029*4882a593Smuzhiyun 	}
2030*4882a593Smuzhiyun 
2031*4882a593Smuzhiyun 	netdev->mtu = new_mtu;
2032*4882a593Smuzhiyun 
2033*4882a593Smuzhiyun 	if (running) {
2034*4882a593Smuzhiyun 		err = enic_open(netdev);
2035*4882a593Smuzhiyun 		if (err)
2036*4882a593Smuzhiyun 			return err;
2037*4882a593Smuzhiyun 	}
2038*4882a593Smuzhiyun 
2039*4882a593Smuzhiyun 	return 0;
2040*4882a593Smuzhiyun }
2041*4882a593Smuzhiyun 
enic_change_mtu(struct net_device * netdev,int new_mtu)2042*4882a593Smuzhiyun static int enic_change_mtu(struct net_device *netdev, int new_mtu)
2043*4882a593Smuzhiyun {
2044*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
2045*4882a593Smuzhiyun 
2046*4882a593Smuzhiyun 	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
2047*4882a593Smuzhiyun 		return -EOPNOTSUPP;
2048*4882a593Smuzhiyun 
2049*4882a593Smuzhiyun 	if (netdev->mtu > enic->port_mtu)
2050*4882a593Smuzhiyun 		netdev_warn(netdev,
2051*4882a593Smuzhiyun 			    "interface MTU (%d) set higher than port MTU (%d)\n",
2052*4882a593Smuzhiyun 			    netdev->mtu, enic->port_mtu);
2053*4882a593Smuzhiyun 
2054*4882a593Smuzhiyun 	return _enic_change_mtu(netdev, new_mtu);
2055*4882a593Smuzhiyun }
2056*4882a593Smuzhiyun 
enic_change_mtu_work(struct work_struct * work)2057*4882a593Smuzhiyun static void enic_change_mtu_work(struct work_struct *work)
2058*4882a593Smuzhiyun {
2059*4882a593Smuzhiyun 	struct enic *enic = container_of(work, struct enic, change_mtu_work);
2060*4882a593Smuzhiyun 	struct net_device *netdev = enic->netdev;
2061*4882a593Smuzhiyun 	int new_mtu = vnic_dev_mtu(enic->vdev);
2062*4882a593Smuzhiyun 
2063*4882a593Smuzhiyun 	rtnl_lock();
2064*4882a593Smuzhiyun 	(void)_enic_change_mtu(netdev, new_mtu);
2065*4882a593Smuzhiyun 	rtnl_unlock();
2066*4882a593Smuzhiyun 
2067*4882a593Smuzhiyun 	netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
2068*4882a593Smuzhiyun }
2069*4882a593Smuzhiyun 
2070*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
enic_poll_controller(struct net_device * netdev)2071*4882a593Smuzhiyun static void enic_poll_controller(struct net_device *netdev)
2072*4882a593Smuzhiyun {
2073*4882a593Smuzhiyun 	struct enic *enic = netdev_priv(netdev);
2074*4882a593Smuzhiyun 	struct vnic_dev *vdev = enic->vdev;
2075*4882a593Smuzhiyun 	unsigned int i, intr;
2076*4882a593Smuzhiyun 
2077*4882a593Smuzhiyun 	switch (vnic_dev_get_intr_mode(vdev)) {
2078*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSIX:
2079*4882a593Smuzhiyun 		for (i = 0; i < enic->rq_count; i++) {
2080*4882a593Smuzhiyun 			intr = enic_msix_rq_intr(enic, i);
2081*4882a593Smuzhiyun 			enic_isr_msix(enic->msix_entry[intr].vector,
2082*4882a593Smuzhiyun 				      &enic->napi[i]);
2083*4882a593Smuzhiyun 		}
2084*4882a593Smuzhiyun 
2085*4882a593Smuzhiyun 		for (i = 0; i < enic->wq_count; i++) {
2086*4882a593Smuzhiyun 			intr = enic_msix_wq_intr(enic, i);
2087*4882a593Smuzhiyun 			enic_isr_msix(enic->msix_entry[intr].vector,
2088*4882a593Smuzhiyun 				      &enic->napi[enic_cq_wq(enic, i)]);
2089*4882a593Smuzhiyun 		}
2090*4882a593Smuzhiyun 
2091*4882a593Smuzhiyun 		break;
2092*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSI:
2093*4882a593Smuzhiyun 		enic_isr_msi(enic->pdev->irq, enic);
2094*4882a593Smuzhiyun 		break;
2095*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_INTX:
2096*4882a593Smuzhiyun 		enic_isr_legacy(enic->pdev->irq, netdev);
2097*4882a593Smuzhiyun 		break;
2098*4882a593Smuzhiyun 	default:
2099*4882a593Smuzhiyun 		break;
2100*4882a593Smuzhiyun 	}
2101*4882a593Smuzhiyun }
2102*4882a593Smuzhiyun #endif
2103*4882a593Smuzhiyun 
enic_dev_wait(struct vnic_dev * vdev,int (* start)(struct vnic_dev *,int),int (* finished)(struct vnic_dev *,int *),int arg)2104*4882a593Smuzhiyun static int enic_dev_wait(struct vnic_dev *vdev,
2105*4882a593Smuzhiyun 	int (*start)(struct vnic_dev *, int),
2106*4882a593Smuzhiyun 	int (*finished)(struct vnic_dev *, int *),
2107*4882a593Smuzhiyun 	int arg)
2108*4882a593Smuzhiyun {
2109*4882a593Smuzhiyun 	unsigned long time;
2110*4882a593Smuzhiyun 	int done;
2111*4882a593Smuzhiyun 	int err;
2112*4882a593Smuzhiyun 
2113*4882a593Smuzhiyun 	err = start(vdev, arg);
2114*4882a593Smuzhiyun 	if (err)
2115*4882a593Smuzhiyun 		return err;
2116*4882a593Smuzhiyun 
2117*4882a593Smuzhiyun 	/* Wait for func to complete...2 seconds max
2118*4882a593Smuzhiyun 	 */
2119*4882a593Smuzhiyun 
2120*4882a593Smuzhiyun 	time = jiffies + (HZ * 2);
2121*4882a593Smuzhiyun 	do {
2122*4882a593Smuzhiyun 
2123*4882a593Smuzhiyun 		err = finished(vdev, &done);
2124*4882a593Smuzhiyun 		if (err)
2125*4882a593Smuzhiyun 			return err;
2126*4882a593Smuzhiyun 
2127*4882a593Smuzhiyun 		if (done)
2128*4882a593Smuzhiyun 			return 0;
2129*4882a593Smuzhiyun 
2130*4882a593Smuzhiyun 		schedule_timeout_uninterruptible(HZ / 10);
2131*4882a593Smuzhiyun 
2132*4882a593Smuzhiyun 	} while (time_after(time, jiffies));
2133*4882a593Smuzhiyun 
2134*4882a593Smuzhiyun 	return -ETIMEDOUT;
2135*4882a593Smuzhiyun }
2136*4882a593Smuzhiyun 
enic_dev_open(struct enic * enic)2137*4882a593Smuzhiyun static int enic_dev_open(struct enic *enic)
2138*4882a593Smuzhiyun {
2139*4882a593Smuzhiyun 	int err;
2140*4882a593Smuzhiyun 	u32 flags = CMD_OPENF_IG_DESCCACHE;
2141*4882a593Smuzhiyun 
2142*4882a593Smuzhiyun 	err = enic_dev_wait(enic->vdev, vnic_dev_open,
2143*4882a593Smuzhiyun 		vnic_dev_open_done, flags);
2144*4882a593Smuzhiyun 	if (err)
2145*4882a593Smuzhiyun 		dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
2146*4882a593Smuzhiyun 			err);
2147*4882a593Smuzhiyun 
2148*4882a593Smuzhiyun 	return err;
2149*4882a593Smuzhiyun }
2150*4882a593Smuzhiyun 
enic_dev_soft_reset(struct enic * enic)2151*4882a593Smuzhiyun static int enic_dev_soft_reset(struct enic *enic)
2152*4882a593Smuzhiyun {
2153*4882a593Smuzhiyun 	int err;
2154*4882a593Smuzhiyun 
2155*4882a593Smuzhiyun 	err = enic_dev_wait(enic->vdev, vnic_dev_soft_reset,
2156*4882a593Smuzhiyun 			    vnic_dev_soft_reset_done, 0);
2157*4882a593Smuzhiyun 	if (err)
2158*4882a593Smuzhiyun 		netdev_err(enic->netdev, "vNIC soft reset failed, err %d\n",
2159*4882a593Smuzhiyun 			   err);
2160*4882a593Smuzhiyun 
2161*4882a593Smuzhiyun 	return err;
2162*4882a593Smuzhiyun }
2163*4882a593Smuzhiyun 
enic_dev_hang_reset(struct enic * enic)2164*4882a593Smuzhiyun static int enic_dev_hang_reset(struct enic *enic)
2165*4882a593Smuzhiyun {
2166*4882a593Smuzhiyun 	int err;
2167*4882a593Smuzhiyun 
2168*4882a593Smuzhiyun 	err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
2169*4882a593Smuzhiyun 		vnic_dev_hang_reset_done, 0);
2170*4882a593Smuzhiyun 	if (err)
2171*4882a593Smuzhiyun 		netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
2172*4882a593Smuzhiyun 			err);
2173*4882a593Smuzhiyun 
2174*4882a593Smuzhiyun 	return err;
2175*4882a593Smuzhiyun }
2176*4882a593Smuzhiyun 
__enic_set_rsskey(struct enic * enic)2177*4882a593Smuzhiyun int __enic_set_rsskey(struct enic *enic)
2178*4882a593Smuzhiyun {
2179*4882a593Smuzhiyun 	union vnic_rss_key *rss_key_buf_va;
2180*4882a593Smuzhiyun 	dma_addr_t rss_key_buf_pa;
2181*4882a593Smuzhiyun 	int i, kidx, bidx, err;
2182*4882a593Smuzhiyun 
2183*4882a593Smuzhiyun 	rss_key_buf_va = dma_alloc_coherent(&enic->pdev->dev,
2184*4882a593Smuzhiyun 					    sizeof(union vnic_rss_key),
2185*4882a593Smuzhiyun 					    &rss_key_buf_pa, GFP_ATOMIC);
2186*4882a593Smuzhiyun 	if (!rss_key_buf_va)
2187*4882a593Smuzhiyun 		return -ENOMEM;
2188*4882a593Smuzhiyun 
2189*4882a593Smuzhiyun 	for (i = 0; i < ENIC_RSS_LEN; i++) {
2190*4882a593Smuzhiyun 		kidx = i / ENIC_RSS_BYTES_PER_KEY;
2191*4882a593Smuzhiyun 		bidx = i % ENIC_RSS_BYTES_PER_KEY;
2192*4882a593Smuzhiyun 		rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i];
2193*4882a593Smuzhiyun 	}
2194*4882a593Smuzhiyun 	spin_lock_bh(&enic->devcmd_lock);
2195*4882a593Smuzhiyun 	err = enic_set_rss_key(enic,
2196*4882a593Smuzhiyun 		rss_key_buf_pa,
2197*4882a593Smuzhiyun 		sizeof(union vnic_rss_key));
2198*4882a593Smuzhiyun 	spin_unlock_bh(&enic->devcmd_lock);
2199*4882a593Smuzhiyun 
2200*4882a593Smuzhiyun 	dma_free_coherent(&enic->pdev->dev, sizeof(union vnic_rss_key),
2201*4882a593Smuzhiyun 			  rss_key_buf_va, rss_key_buf_pa);
2202*4882a593Smuzhiyun 
2203*4882a593Smuzhiyun 	return err;
2204*4882a593Smuzhiyun }
2205*4882a593Smuzhiyun 
enic_set_rsskey(struct enic * enic)2206*4882a593Smuzhiyun static int enic_set_rsskey(struct enic *enic)
2207*4882a593Smuzhiyun {
2208*4882a593Smuzhiyun 	netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN);
2209*4882a593Smuzhiyun 
2210*4882a593Smuzhiyun 	return __enic_set_rsskey(enic);
2211*4882a593Smuzhiyun }
2212*4882a593Smuzhiyun 
enic_set_rsscpu(struct enic * enic,u8 rss_hash_bits)2213*4882a593Smuzhiyun static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
2214*4882a593Smuzhiyun {
2215*4882a593Smuzhiyun 	dma_addr_t rss_cpu_buf_pa;
2216*4882a593Smuzhiyun 	union vnic_rss_cpu *rss_cpu_buf_va = NULL;
2217*4882a593Smuzhiyun 	unsigned int i;
2218*4882a593Smuzhiyun 	int err;
2219*4882a593Smuzhiyun 
2220*4882a593Smuzhiyun 	rss_cpu_buf_va = dma_alloc_coherent(&enic->pdev->dev,
2221*4882a593Smuzhiyun 					    sizeof(union vnic_rss_cpu),
2222*4882a593Smuzhiyun 					    &rss_cpu_buf_pa, GFP_ATOMIC);
2223*4882a593Smuzhiyun 	if (!rss_cpu_buf_va)
2224*4882a593Smuzhiyun 		return -ENOMEM;
2225*4882a593Smuzhiyun 
2226*4882a593Smuzhiyun 	for (i = 0; i < (1 << rss_hash_bits); i++)
2227*4882a593Smuzhiyun 		(*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
2228*4882a593Smuzhiyun 
2229*4882a593Smuzhiyun 	spin_lock_bh(&enic->devcmd_lock);
2230*4882a593Smuzhiyun 	err = enic_set_rss_cpu(enic,
2231*4882a593Smuzhiyun 		rss_cpu_buf_pa,
2232*4882a593Smuzhiyun 		sizeof(union vnic_rss_cpu));
2233*4882a593Smuzhiyun 	spin_unlock_bh(&enic->devcmd_lock);
2234*4882a593Smuzhiyun 
2235*4882a593Smuzhiyun 	dma_free_coherent(&enic->pdev->dev, sizeof(union vnic_rss_cpu),
2236*4882a593Smuzhiyun 			  rss_cpu_buf_va, rss_cpu_buf_pa);
2237*4882a593Smuzhiyun 
2238*4882a593Smuzhiyun 	return err;
2239*4882a593Smuzhiyun }
2240*4882a593Smuzhiyun 
enic_set_niccfg(struct enic * enic,u8 rss_default_cpu,u8 rss_hash_type,u8 rss_hash_bits,u8 rss_base_cpu,u8 rss_enable)2241*4882a593Smuzhiyun static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
2242*4882a593Smuzhiyun 	u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
2243*4882a593Smuzhiyun {
2244*4882a593Smuzhiyun 	const u8 tso_ipid_split_en = 0;
2245*4882a593Smuzhiyun 	const u8 ig_vlan_strip_en = 1;
2246*4882a593Smuzhiyun 	int err;
2247*4882a593Smuzhiyun 
2248*4882a593Smuzhiyun 	/* Enable VLAN tag stripping.
2249*4882a593Smuzhiyun 	*/
2250*4882a593Smuzhiyun 
2251*4882a593Smuzhiyun 	spin_lock_bh(&enic->devcmd_lock);
2252*4882a593Smuzhiyun 	err = enic_set_nic_cfg(enic,
2253*4882a593Smuzhiyun 		rss_default_cpu, rss_hash_type,
2254*4882a593Smuzhiyun 		rss_hash_bits, rss_base_cpu,
2255*4882a593Smuzhiyun 		rss_enable, tso_ipid_split_en,
2256*4882a593Smuzhiyun 		ig_vlan_strip_en);
2257*4882a593Smuzhiyun 	spin_unlock_bh(&enic->devcmd_lock);
2258*4882a593Smuzhiyun 
2259*4882a593Smuzhiyun 	return err;
2260*4882a593Smuzhiyun }
2261*4882a593Smuzhiyun 
enic_set_rss_nic_cfg(struct enic * enic)2262*4882a593Smuzhiyun static int enic_set_rss_nic_cfg(struct enic *enic)
2263*4882a593Smuzhiyun {
2264*4882a593Smuzhiyun 	struct device *dev = enic_get_dev(enic);
2265*4882a593Smuzhiyun 	const u8 rss_default_cpu = 0;
2266*4882a593Smuzhiyun 	const u8 rss_hash_bits = 7;
2267*4882a593Smuzhiyun 	const u8 rss_base_cpu = 0;
2268*4882a593Smuzhiyun 	u8 rss_hash_type;
2269*4882a593Smuzhiyun 	int res;
2270*4882a593Smuzhiyun 	u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
2271*4882a593Smuzhiyun 
2272*4882a593Smuzhiyun 	spin_lock_bh(&enic->devcmd_lock);
2273*4882a593Smuzhiyun 	res = vnic_dev_capable_rss_hash_type(enic->vdev, &rss_hash_type);
2274*4882a593Smuzhiyun 	spin_unlock_bh(&enic->devcmd_lock);
2275*4882a593Smuzhiyun 	if (res) {
2276*4882a593Smuzhiyun 		/* defaults for old adapters
2277*4882a593Smuzhiyun 		 */
2278*4882a593Smuzhiyun 		rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4	|
2279*4882a593Smuzhiyun 				NIC_CFG_RSS_HASH_TYPE_TCP_IPV4	|
2280*4882a593Smuzhiyun 				NIC_CFG_RSS_HASH_TYPE_IPV6	|
2281*4882a593Smuzhiyun 				NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
2282*4882a593Smuzhiyun 	}
2283*4882a593Smuzhiyun 
2284*4882a593Smuzhiyun 	if (rss_enable) {
2285*4882a593Smuzhiyun 		if (!enic_set_rsskey(enic)) {
2286*4882a593Smuzhiyun 			if (enic_set_rsscpu(enic, rss_hash_bits)) {
2287*4882a593Smuzhiyun 				rss_enable = 0;
2288*4882a593Smuzhiyun 				dev_warn(dev, "RSS disabled, "
2289*4882a593Smuzhiyun 					"Failed to set RSS cpu indirection table.");
2290*4882a593Smuzhiyun 			}
2291*4882a593Smuzhiyun 		} else {
2292*4882a593Smuzhiyun 			rss_enable = 0;
2293*4882a593Smuzhiyun 			dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
2294*4882a593Smuzhiyun 		}
2295*4882a593Smuzhiyun 	}
2296*4882a593Smuzhiyun 
2297*4882a593Smuzhiyun 	return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
2298*4882a593Smuzhiyun 		rss_hash_bits, rss_base_cpu, rss_enable);
2299*4882a593Smuzhiyun }
2300*4882a593Smuzhiyun 
enic_set_api_busy(struct enic * enic,bool busy)2301*4882a593Smuzhiyun static void enic_set_api_busy(struct enic *enic, bool busy)
2302*4882a593Smuzhiyun {
2303*4882a593Smuzhiyun 	spin_lock(&enic->enic_api_lock);
2304*4882a593Smuzhiyun 	enic->enic_api_busy = busy;
2305*4882a593Smuzhiyun 	spin_unlock(&enic->enic_api_lock);
2306*4882a593Smuzhiyun }
2307*4882a593Smuzhiyun 
enic_reset(struct work_struct * work)2308*4882a593Smuzhiyun static void enic_reset(struct work_struct *work)
2309*4882a593Smuzhiyun {
2310*4882a593Smuzhiyun 	struct enic *enic = container_of(work, struct enic, reset);
2311*4882a593Smuzhiyun 
2312*4882a593Smuzhiyun 	if (!netif_running(enic->netdev))
2313*4882a593Smuzhiyun 		return;
2314*4882a593Smuzhiyun 
2315*4882a593Smuzhiyun 	rtnl_lock();
2316*4882a593Smuzhiyun 
2317*4882a593Smuzhiyun 	/* Stop any activity from infiniband */
2318*4882a593Smuzhiyun 	enic_set_api_busy(enic, true);
2319*4882a593Smuzhiyun 
2320*4882a593Smuzhiyun 	enic_stop(enic->netdev);
2321*4882a593Smuzhiyun 	enic_dev_soft_reset(enic);
2322*4882a593Smuzhiyun 	enic_reset_addr_lists(enic);
2323*4882a593Smuzhiyun 	enic_init_vnic_resources(enic);
2324*4882a593Smuzhiyun 	enic_set_rss_nic_cfg(enic);
2325*4882a593Smuzhiyun 	enic_dev_set_ig_vlan_rewrite_mode(enic);
2326*4882a593Smuzhiyun 	enic_open(enic->netdev);
2327*4882a593Smuzhiyun 
2328*4882a593Smuzhiyun 	/* Allow infiniband to fiddle with the device again */
2329*4882a593Smuzhiyun 	enic_set_api_busy(enic, false);
2330*4882a593Smuzhiyun 
2331*4882a593Smuzhiyun 	call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
2332*4882a593Smuzhiyun 
2333*4882a593Smuzhiyun 	rtnl_unlock();
2334*4882a593Smuzhiyun }
2335*4882a593Smuzhiyun 
enic_tx_hang_reset(struct work_struct * work)2336*4882a593Smuzhiyun static void enic_tx_hang_reset(struct work_struct *work)
2337*4882a593Smuzhiyun {
2338*4882a593Smuzhiyun 	struct enic *enic = container_of(work, struct enic, tx_hang_reset);
2339*4882a593Smuzhiyun 
2340*4882a593Smuzhiyun 	rtnl_lock();
2341*4882a593Smuzhiyun 
2342*4882a593Smuzhiyun 	/* Stop any activity from infiniband */
2343*4882a593Smuzhiyun 	enic_set_api_busy(enic, true);
2344*4882a593Smuzhiyun 
2345*4882a593Smuzhiyun 	enic_dev_hang_notify(enic);
2346*4882a593Smuzhiyun 	enic_stop(enic->netdev);
2347*4882a593Smuzhiyun 	enic_dev_hang_reset(enic);
2348*4882a593Smuzhiyun 	enic_reset_addr_lists(enic);
2349*4882a593Smuzhiyun 	enic_init_vnic_resources(enic);
2350*4882a593Smuzhiyun 	enic_set_rss_nic_cfg(enic);
2351*4882a593Smuzhiyun 	enic_dev_set_ig_vlan_rewrite_mode(enic);
2352*4882a593Smuzhiyun 	enic_open(enic->netdev);
2353*4882a593Smuzhiyun 
2354*4882a593Smuzhiyun 	/* Allow infiniband to fiddle with the device again */
2355*4882a593Smuzhiyun 	enic_set_api_busy(enic, false);
2356*4882a593Smuzhiyun 
2357*4882a593Smuzhiyun 	call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
2358*4882a593Smuzhiyun 
2359*4882a593Smuzhiyun 	rtnl_unlock();
2360*4882a593Smuzhiyun }
2361*4882a593Smuzhiyun 
enic_set_intr_mode(struct enic * enic)2362*4882a593Smuzhiyun static int enic_set_intr_mode(struct enic *enic)
2363*4882a593Smuzhiyun {
2364*4882a593Smuzhiyun 	unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
2365*4882a593Smuzhiyun 	unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
2366*4882a593Smuzhiyun 	unsigned int i;
2367*4882a593Smuzhiyun 
2368*4882a593Smuzhiyun 	/* Set interrupt mode (INTx, MSI, MSI-X) depending
2369*4882a593Smuzhiyun 	 * on system capabilities.
2370*4882a593Smuzhiyun 	 *
2371*4882a593Smuzhiyun 	 * Try MSI-X first
2372*4882a593Smuzhiyun 	 *
2373*4882a593Smuzhiyun 	 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2374*4882a593Smuzhiyun 	 * (the second to last INTR is used for WQ/RQ errors)
2375*4882a593Smuzhiyun 	 * (the last INTR is used for notifications)
2376*4882a593Smuzhiyun 	 */
2377*4882a593Smuzhiyun 
2378*4882a593Smuzhiyun 	BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2379*4882a593Smuzhiyun 	for (i = 0; i < n + m + 2; i++)
2380*4882a593Smuzhiyun 		enic->msix_entry[i].entry = i;
2381*4882a593Smuzhiyun 
2382*4882a593Smuzhiyun 	/* Use multiple RQs if RSS is enabled
2383*4882a593Smuzhiyun 	 */
2384*4882a593Smuzhiyun 
2385*4882a593Smuzhiyun 	if (ENIC_SETTING(enic, RSS) &&
2386*4882a593Smuzhiyun 	    enic->config.intr_mode < 1 &&
2387*4882a593Smuzhiyun 	    enic->rq_count >= n &&
2388*4882a593Smuzhiyun 	    enic->wq_count >= m &&
2389*4882a593Smuzhiyun 	    enic->cq_count >= n + m &&
2390*4882a593Smuzhiyun 	    enic->intr_count >= n + m + 2) {
2391*4882a593Smuzhiyun 
2392*4882a593Smuzhiyun 		if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
2393*4882a593Smuzhiyun 					  n + m + 2, n + m + 2) > 0) {
2394*4882a593Smuzhiyun 
2395*4882a593Smuzhiyun 			enic->rq_count = n;
2396*4882a593Smuzhiyun 			enic->wq_count = m;
2397*4882a593Smuzhiyun 			enic->cq_count = n + m;
2398*4882a593Smuzhiyun 			enic->intr_count = n + m + 2;
2399*4882a593Smuzhiyun 
2400*4882a593Smuzhiyun 			vnic_dev_set_intr_mode(enic->vdev,
2401*4882a593Smuzhiyun 				VNIC_DEV_INTR_MODE_MSIX);
2402*4882a593Smuzhiyun 
2403*4882a593Smuzhiyun 			return 0;
2404*4882a593Smuzhiyun 		}
2405*4882a593Smuzhiyun 	}
2406*4882a593Smuzhiyun 
2407*4882a593Smuzhiyun 	if (enic->config.intr_mode < 1 &&
2408*4882a593Smuzhiyun 	    enic->rq_count >= 1 &&
2409*4882a593Smuzhiyun 	    enic->wq_count >= m &&
2410*4882a593Smuzhiyun 	    enic->cq_count >= 1 + m &&
2411*4882a593Smuzhiyun 	    enic->intr_count >= 1 + m + 2) {
2412*4882a593Smuzhiyun 		if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
2413*4882a593Smuzhiyun 					  1 + m + 2, 1 + m + 2) > 0) {
2414*4882a593Smuzhiyun 
2415*4882a593Smuzhiyun 			enic->rq_count = 1;
2416*4882a593Smuzhiyun 			enic->wq_count = m;
2417*4882a593Smuzhiyun 			enic->cq_count = 1 + m;
2418*4882a593Smuzhiyun 			enic->intr_count = 1 + m + 2;
2419*4882a593Smuzhiyun 
2420*4882a593Smuzhiyun 			vnic_dev_set_intr_mode(enic->vdev,
2421*4882a593Smuzhiyun 				VNIC_DEV_INTR_MODE_MSIX);
2422*4882a593Smuzhiyun 
2423*4882a593Smuzhiyun 			return 0;
2424*4882a593Smuzhiyun 		}
2425*4882a593Smuzhiyun 	}
2426*4882a593Smuzhiyun 
2427*4882a593Smuzhiyun 	/* Next try MSI
2428*4882a593Smuzhiyun 	 *
2429*4882a593Smuzhiyun 	 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2430*4882a593Smuzhiyun 	 */
2431*4882a593Smuzhiyun 
2432*4882a593Smuzhiyun 	if (enic->config.intr_mode < 2 &&
2433*4882a593Smuzhiyun 	    enic->rq_count >= 1 &&
2434*4882a593Smuzhiyun 	    enic->wq_count >= 1 &&
2435*4882a593Smuzhiyun 	    enic->cq_count >= 2 &&
2436*4882a593Smuzhiyun 	    enic->intr_count >= 1 &&
2437*4882a593Smuzhiyun 	    !pci_enable_msi(enic->pdev)) {
2438*4882a593Smuzhiyun 
2439*4882a593Smuzhiyun 		enic->rq_count = 1;
2440*4882a593Smuzhiyun 		enic->wq_count = 1;
2441*4882a593Smuzhiyun 		enic->cq_count = 2;
2442*4882a593Smuzhiyun 		enic->intr_count = 1;
2443*4882a593Smuzhiyun 
2444*4882a593Smuzhiyun 		vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2445*4882a593Smuzhiyun 
2446*4882a593Smuzhiyun 		return 0;
2447*4882a593Smuzhiyun 	}
2448*4882a593Smuzhiyun 
2449*4882a593Smuzhiyun 	/* Next try INTx
2450*4882a593Smuzhiyun 	 *
2451*4882a593Smuzhiyun 	 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2452*4882a593Smuzhiyun 	 * (the first INTR is used for WQ/RQ)
2453*4882a593Smuzhiyun 	 * (the second INTR is used for WQ/RQ errors)
2454*4882a593Smuzhiyun 	 * (the last INTR is used for notifications)
2455*4882a593Smuzhiyun 	 */
2456*4882a593Smuzhiyun 
2457*4882a593Smuzhiyun 	if (enic->config.intr_mode < 3 &&
2458*4882a593Smuzhiyun 	    enic->rq_count >= 1 &&
2459*4882a593Smuzhiyun 	    enic->wq_count >= 1 &&
2460*4882a593Smuzhiyun 	    enic->cq_count >= 2 &&
2461*4882a593Smuzhiyun 	    enic->intr_count >= 3) {
2462*4882a593Smuzhiyun 
2463*4882a593Smuzhiyun 		enic->rq_count = 1;
2464*4882a593Smuzhiyun 		enic->wq_count = 1;
2465*4882a593Smuzhiyun 		enic->cq_count = 2;
2466*4882a593Smuzhiyun 		enic->intr_count = 3;
2467*4882a593Smuzhiyun 
2468*4882a593Smuzhiyun 		vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2469*4882a593Smuzhiyun 
2470*4882a593Smuzhiyun 		return 0;
2471*4882a593Smuzhiyun 	}
2472*4882a593Smuzhiyun 
2473*4882a593Smuzhiyun 	vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2474*4882a593Smuzhiyun 
2475*4882a593Smuzhiyun 	return -EINVAL;
2476*4882a593Smuzhiyun }
2477*4882a593Smuzhiyun 
enic_clear_intr_mode(struct enic * enic)2478*4882a593Smuzhiyun static void enic_clear_intr_mode(struct enic *enic)
2479*4882a593Smuzhiyun {
2480*4882a593Smuzhiyun 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
2481*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSIX:
2482*4882a593Smuzhiyun 		pci_disable_msix(enic->pdev);
2483*4882a593Smuzhiyun 		break;
2484*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSI:
2485*4882a593Smuzhiyun 		pci_disable_msi(enic->pdev);
2486*4882a593Smuzhiyun 		break;
2487*4882a593Smuzhiyun 	default:
2488*4882a593Smuzhiyun 		break;
2489*4882a593Smuzhiyun 	}
2490*4882a593Smuzhiyun 
2491*4882a593Smuzhiyun 	vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2492*4882a593Smuzhiyun }
2493*4882a593Smuzhiyun 
2494*4882a593Smuzhiyun static const struct net_device_ops enic_netdev_dynamic_ops = {
2495*4882a593Smuzhiyun 	.ndo_open		= enic_open,
2496*4882a593Smuzhiyun 	.ndo_stop		= enic_stop,
2497*4882a593Smuzhiyun 	.ndo_start_xmit		= enic_hard_start_xmit,
2498*4882a593Smuzhiyun 	.ndo_get_stats64	= enic_get_stats,
2499*4882a593Smuzhiyun 	.ndo_validate_addr	= eth_validate_addr,
2500*4882a593Smuzhiyun 	.ndo_set_rx_mode	= enic_set_rx_mode,
2501*4882a593Smuzhiyun 	.ndo_set_mac_address	= enic_set_mac_address_dynamic,
2502*4882a593Smuzhiyun 	.ndo_change_mtu		= enic_change_mtu,
2503*4882a593Smuzhiyun 	.ndo_vlan_rx_add_vid	= enic_vlan_rx_add_vid,
2504*4882a593Smuzhiyun 	.ndo_vlan_rx_kill_vid	= enic_vlan_rx_kill_vid,
2505*4882a593Smuzhiyun 	.ndo_tx_timeout		= enic_tx_timeout,
2506*4882a593Smuzhiyun 	.ndo_set_vf_port	= enic_set_vf_port,
2507*4882a593Smuzhiyun 	.ndo_get_vf_port	= enic_get_vf_port,
2508*4882a593Smuzhiyun 	.ndo_set_vf_mac		= enic_set_vf_mac,
2509*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
2510*4882a593Smuzhiyun 	.ndo_poll_controller	= enic_poll_controller,
2511*4882a593Smuzhiyun #endif
2512*4882a593Smuzhiyun #ifdef CONFIG_RFS_ACCEL
2513*4882a593Smuzhiyun 	.ndo_rx_flow_steer	= enic_rx_flow_steer,
2514*4882a593Smuzhiyun #endif
2515*4882a593Smuzhiyun 	.ndo_udp_tunnel_add	= udp_tunnel_nic_add_port,
2516*4882a593Smuzhiyun 	.ndo_udp_tunnel_del	= udp_tunnel_nic_del_port,
2517*4882a593Smuzhiyun 	.ndo_features_check	= enic_features_check,
2518*4882a593Smuzhiyun };
2519*4882a593Smuzhiyun 
2520*4882a593Smuzhiyun static const struct net_device_ops enic_netdev_ops = {
2521*4882a593Smuzhiyun 	.ndo_open		= enic_open,
2522*4882a593Smuzhiyun 	.ndo_stop		= enic_stop,
2523*4882a593Smuzhiyun 	.ndo_start_xmit		= enic_hard_start_xmit,
2524*4882a593Smuzhiyun 	.ndo_get_stats64	= enic_get_stats,
2525*4882a593Smuzhiyun 	.ndo_validate_addr	= eth_validate_addr,
2526*4882a593Smuzhiyun 	.ndo_set_mac_address	= enic_set_mac_address,
2527*4882a593Smuzhiyun 	.ndo_set_rx_mode	= enic_set_rx_mode,
2528*4882a593Smuzhiyun 	.ndo_change_mtu		= enic_change_mtu,
2529*4882a593Smuzhiyun 	.ndo_vlan_rx_add_vid	= enic_vlan_rx_add_vid,
2530*4882a593Smuzhiyun 	.ndo_vlan_rx_kill_vid	= enic_vlan_rx_kill_vid,
2531*4882a593Smuzhiyun 	.ndo_tx_timeout		= enic_tx_timeout,
2532*4882a593Smuzhiyun 	.ndo_set_vf_port	= enic_set_vf_port,
2533*4882a593Smuzhiyun 	.ndo_get_vf_port	= enic_get_vf_port,
2534*4882a593Smuzhiyun 	.ndo_set_vf_mac		= enic_set_vf_mac,
2535*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
2536*4882a593Smuzhiyun 	.ndo_poll_controller	= enic_poll_controller,
2537*4882a593Smuzhiyun #endif
2538*4882a593Smuzhiyun #ifdef CONFIG_RFS_ACCEL
2539*4882a593Smuzhiyun 	.ndo_rx_flow_steer	= enic_rx_flow_steer,
2540*4882a593Smuzhiyun #endif
2541*4882a593Smuzhiyun 	.ndo_udp_tunnel_add	= udp_tunnel_nic_add_port,
2542*4882a593Smuzhiyun 	.ndo_udp_tunnel_del	= udp_tunnel_nic_del_port,
2543*4882a593Smuzhiyun 	.ndo_features_check	= enic_features_check,
2544*4882a593Smuzhiyun };
2545*4882a593Smuzhiyun 
enic_dev_deinit(struct enic * enic)2546*4882a593Smuzhiyun static void enic_dev_deinit(struct enic *enic)
2547*4882a593Smuzhiyun {
2548*4882a593Smuzhiyun 	unsigned int i;
2549*4882a593Smuzhiyun 
2550*4882a593Smuzhiyun 	for (i = 0; i < enic->rq_count; i++)
2551*4882a593Smuzhiyun 		__netif_napi_del(&enic->napi[i]);
2552*4882a593Smuzhiyun 
2553*4882a593Smuzhiyun 	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
2554*4882a593Smuzhiyun 		for (i = 0; i < enic->wq_count; i++)
2555*4882a593Smuzhiyun 			__netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]);
2556*4882a593Smuzhiyun 
2557*4882a593Smuzhiyun 	/* observe RCU grace period after __netif_napi_del() calls */
2558*4882a593Smuzhiyun 	synchronize_net();
2559*4882a593Smuzhiyun 
2560*4882a593Smuzhiyun 	enic_free_vnic_resources(enic);
2561*4882a593Smuzhiyun 	enic_clear_intr_mode(enic);
2562*4882a593Smuzhiyun 	enic_free_affinity_hint(enic);
2563*4882a593Smuzhiyun }
2564*4882a593Smuzhiyun 
enic_kdump_kernel_config(struct enic * enic)2565*4882a593Smuzhiyun static void enic_kdump_kernel_config(struct enic *enic)
2566*4882a593Smuzhiyun {
2567*4882a593Smuzhiyun 	if (is_kdump_kernel()) {
2568*4882a593Smuzhiyun 		dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n");
2569*4882a593Smuzhiyun 		enic->rq_count = 1;
2570*4882a593Smuzhiyun 		enic->wq_count = 1;
2571*4882a593Smuzhiyun 		enic->config.rq_desc_count = ENIC_MIN_RQ_DESCS;
2572*4882a593Smuzhiyun 		enic->config.wq_desc_count = ENIC_MIN_WQ_DESCS;
2573*4882a593Smuzhiyun 		enic->config.mtu = min_t(u16, 1500, enic->config.mtu);
2574*4882a593Smuzhiyun 	}
2575*4882a593Smuzhiyun }
2576*4882a593Smuzhiyun 
enic_dev_init(struct enic * enic)2577*4882a593Smuzhiyun static int enic_dev_init(struct enic *enic)
2578*4882a593Smuzhiyun {
2579*4882a593Smuzhiyun 	struct device *dev = enic_get_dev(enic);
2580*4882a593Smuzhiyun 	struct net_device *netdev = enic->netdev;
2581*4882a593Smuzhiyun 	unsigned int i;
2582*4882a593Smuzhiyun 	int err;
2583*4882a593Smuzhiyun 
2584*4882a593Smuzhiyun 	/* Get interrupt coalesce timer info */
2585*4882a593Smuzhiyun 	err = enic_dev_intr_coal_timer_info(enic);
2586*4882a593Smuzhiyun 	if (err) {
2587*4882a593Smuzhiyun 		dev_warn(dev, "Using default conversion factor for "
2588*4882a593Smuzhiyun 			"interrupt coalesce timer\n");
2589*4882a593Smuzhiyun 		vnic_dev_intr_coal_timer_info_default(enic->vdev);
2590*4882a593Smuzhiyun 	}
2591*4882a593Smuzhiyun 
2592*4882a593Smuzhiyun 	/* Get vNIC configuration
2593*4882a593Smuzhiyun 	 */
2594*4882a593Smuzhiyun 
2595*4882a593Smuzhiyun 	err = enic_get_vnic_config(enic);
2596*4882a593Smuzhiyun 	if (err) {
2597*4882a593Smuzhiyun 		dev_err(dev, "Get vNIC configuration failed, aborting\n");
2598*4882a593Smuzhiyun 		return err;
2599*4882a593Smuzhiyun 	}
2600*4882a593Smuzhiyun 
2601*4882a593Smuzhiyun 	/* Get available resource counts
2602*4882a593Smuzhiyun 	 */
2603*4882a593Smuzhiyun 
2604*4882a593Smuzhiyun 	enic_get_res_counts(enic);
2605*4882a593Smuzhiyun 
2606*4882a593Smuzhiyun 	/* modify resource count if we are in kdump_kernel
2607*4882a593Smuzhiyun 	 */
2608*4882a593Smuzhiyun 	enic_kdump_kernel_config(enic);
2609*4882a593Smuzhiyun 
2610*4882a593Smuzhiyun 	/* Set interrupt mode based on resource counts and system
2611*4882a593Smuzhiyun 	 * capabilities
2612*4882a593Smuzhiyun 	 */
2613*4882a593Smuzhiyun 
2614*4882a593Smuzhiyun 	err = enic_set_intr_mode(enic);
2615*4882a593Smuzhiyun 	if (err) {
2616*4882a593Smuzhiyun 		dev_err(dev, "Failed to set intr mode based on resource "
2617*4882a593Smuzhiyun 			"counts and system capabilities, aborting\n");
2618*4882a593Smuzhiyun 		return err;
2619*4882a593Smuzhiyun 	}
2620*4882a593Smuzhiyun 
2621*4882a593Smuzhiyun 	/* Allocate and configure vNIC resources
2622*4882a593Smuzhiyun 	 */
2623*4882a593Smuzhiyun 
2624*4882a593Smuzhiyun 	err = enic_alloc_vnic_resources(enic);
2625*4882a593Smuzhiyun 	if (err) {
2626*4882a593Smuzhiyun 		dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
2627*4882a593Smuzhiyun 		goto err_out_free_vnic_resources;
2628*4882a593Smuzhiyun 	}
2629*4882a593Smuzhiyun 
2630*4882a593Smuzhiyun 	enic_init_vnic_resources(enic);
2631*4882a593Smuzhiyun 
2632*4882a593Smuzhiyun 	err = enic_set_rss_nic_cfg(enic);
2633*4882a593Smuzhiyun 	if (err) {
2634*4882a593Smuzhiyun 		dev_err(dev, "Failed to config nic, aborting\n");
2635*4882a593Smuzhiyun 		goto err_out_free_vnic_resources;
2636*4882a593Smuzhiyun 	}
2637*4882a593Smuzhiyun 
2638*4882a593Smuzhiyun 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
2639*4882a593Smuzhiyun 	default:
2640*4882a593Smuzhiyun 		netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
2641*4882a593Smuzhiyun 		break;
2642*4882a593Smuzhiyun 	case VNIC_DEV_INTR_MODE_MSIX:
2643*4882a593Smuzhiyun 		for (i = 0; i < enic->rq_count; i++) {
2644*4882a593Smuzhiyun 			netif_napi_add(netdev, &enic->napi[i],
2645*4882a593Smuzhiyun 				enic_poll_msix_rq, NAPI_POLL_WEIGHT);
2646*4882a593Smuzhiyun 		}
2647*4882a593Smuzhiyun 		for (i = 0; i < enic->wq_count; i++)
2648*4882a593Smuzhiyun 			netif_napi_add(netdev, &enic->napi[enic_cq_wq(enic, i)],
2649*4882a593Smuzhiyun 				       enic_poll_msix_wq, NAPI_POLL_WEIGHT);
2650*4882a593Smuzhiyun 		break;
2651*4882a593Smuzhiyun 	}
2652*4882a593Smuzhiyun 
2653*4882a593Smuzhiyun 	return 0;
2654*4882a593Smuzhiyun 
2655*4882a593Smuzhiyun err_out_free_vnic_resources:
2656*4882a593Smuzhiyun 	enic_free_affinity_hint(enic);
2657*4882a593Smuzhiyun 	enic_clear_intr_mode(enic);
2658*4882a593Smuzhiyun 	enic_free_vnic_resources(enic);
2659*4882a593Smuzhiyun 
2660*4882a593Smuzhiyun 	return err;
2661*4882a593Smuzhiyun }
2662*4882a593Smuzhiyun 
enic_iounmap(struct enic * enic)2663*4882a593Smuzhiyun static void enic_iounmap(struct enic *enic)
2664*4882a593Smuzhiyun {
2665*4882a593Smuzhiyun 	unsigned int i;
2666*4882a593Smuzhiyun 
2667*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2668*4882a593Smuzhiyun 		if (enic->bar[i].vaddr)
2669*4882a593Smuzhiyun 			iounmap(enic->bar[i].vaddr);
2670*4882a593Smuzhiyun }
2671*4882a593Smuzhiyun 
enic_probe(struct pci_dev * pdev,const struct pci_device_id * ent)2672*4882a593Smuzhiyun static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2673*4882a593Smuzhiyun {
2674*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
2675*4882a593Smuzhiyun 	struct net_device *netdev;
2676*4882a593Smuzhiyun 	struct enic *enic;
2677*4882a593Smuzhiyun 	int using_dac = 0;
2678*4882a593Smuzhiyun 	unsigned int i;
2679*4882a593Smuzhiyun 	int err;
2680*4882a593Smuzhiyun #ifdef CONFIG_PCI_IOV
2681*4882a593Smuzhiyun 	int pos = 0;
2682*4882a593Smuzhiyun #endif
2683*4882a593Smuzhiyun 	int num_pps = 1;
2684*4882a593Smuzhiyun 
2685*4882a593Smuzhiyun 	/* Allocate net device structure and initialize.  Private
2686*4882a593Smuzhiyun 	 * instance data is initialized to zero.
2687*4882a593Smuzhiyun 	 */
2688*4882a593Smuzhiyun 
2689*4882a593Smuzhiyun 	netdev = alloc_etherdev_mqs(sizeof(struct enic),
2690*4882a593Smuzhiyun 				    ENIC_RQ_MAX, ENIC_WQ_MAX);
2691*4882a593Smuzhiyun 	if (!netdev)
2692*4882a593Smuzhiyun 		return -ENOMEM;
2693*4882a593Smuzhiyun 
2694*4882a593Smuzhiyun 	pci_set_drvdata(pdev, netdev);
2695*4882a593Smuzhiyun 
2696*4882a593Smuzhiyun 	SET_NETDEV_DEV(netdev, &pdev->dev);
2697*4882a593Smuzhiyun 
2698*4882a593Smuzhiyun 	enic = netdev_priv(netdev);
2699*4882a593Smuzhiyun 	enic->netdev = netdev;
2700*4882a593Smuzhiyun 	enic->pdev = pdev;
2701*4882a593Smuzhiyun 
2702*4882a593Smuzhiyun 	/* Setup PCI resources
2703*4882a593Smuzhiyun 	 */
2704*4882a593Smuzhiyun 
2705*4882a593Smuzhiyun 	err = pci_enable_device_mem(pdev);
2706*4882a593Smuzhiyun 	if (err) {
2707*4882a593Smuzhiyun 		dev_err(dev, "Cannot enable PCI device, aborting\n");
2708*4882a593Smuzhiyun 		goto err_out_free_netdev;
2709*4882a593Smuzhiyun 	}
2710*4882a593Smuzhiyun 
2711*4882a593Smuzhiyun 	err = pci_request_regions(pdev, DRV_NAME);
2712*4882a593Smuzhiyun 	if (err) {
2713*4882a593Smuzhiyun 		dev_err(dev, "Cannot request PCI regions, aborting\n");
2714*4882a593Smuzhiyun 		goto err_out_disable_device;
2715*4882a593Smuzhiyun 	}
2716*4882a593Smuzhiyun 
2717*4882a593Smuzhiyun 	pci_set_master(pdev);
2718*4882a593Smuzhiyun 
2719*4882a593Smuzhiyun 	/* Query PCI controller on system for DMA addressing
2720*4882a593Smuzhiyun 	 * limitation for the device.  Try 47-bit first, and
2721*4882a593Smuzhiyun 	 * fail to 32-bit.
2722*4882a593Smuzhiyun 	 */
2723*4882a593Smuzhiyun 
2724*4882a593Smuzhiyun 	err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(47));
2725*4882a593Smuzhiyun 	if (err) {
2726*4882a593Smuzhiyun 		err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
2727*4882a593Smuzhiyun 		if (err) {
2728*4882a593Smuzhiyun 			dev_err(dev, "No usable DMA configuration, aborting\n");
2729*4882a593Smuzhiyun 			goto err_out_release_regions;
2730*4882a593Smuzhiyun 		}
2731*4882a593Smuzhiyun 		err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
2732*4882a593Smuzhiyun 		if (err) {
2733*4882a593Smuzhiyun 			dev_err(dev, "Unable to obtain %u-bit DMA "
2734*4882a593Smuzhiyun 				"for consistent allocations, aborting\n", 32);
2735*4882a593Smuzhiyun 			goto err_out_release_regions;
2736*4882a593Smuzhiyun 		}
2737*4882a593Smuzhiyun 	} else {
2738*4882a593Smuzhiyun 		err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(47));
2739*4882a593Smuzhiyun 		if (err) {
2740*4882a593Smuzhiyun 			dev_err(dev, "Unable to obtain %u-bit DMA "
2741*4882a593Smuzhiyun 				"for consistent allocations, aborting\n", 47);
2742*4882a593Smuzhiyun 			goto err_out_release_regions;
2743*4882a593Smuzhiyun 		}
2744*4882a593Smuzhiyun 		using_dac = 1;
2745*4882a593Smuzhiyun 	}
2746*4882a593Smuzhiyun 
2747*4882a593Smuzhiyun 	/* Map vNIC resources from BAR0-5
2748*4882a593Smuzhiyun 	 */
2749*4882a593Smuzhiyun 
2750*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2751*4882a593Smuzhiyun 		if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2752*4882a593Smuzhiyun 			continue;
2753*4882a593Smuzhiyun 		enic->bar[i].len = pci_resource_len(pdev, i);
2754*4882a593Smuzhiyun 		enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2755*4882a593Smuzhiyun 		if (!enic->bar[i].vaddr) {
2756*4882a593Smuzhiyun 			dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
2757*4882a593Smuzhiyun 			err = -ENODEV;
2758*4882a593Smuzhiyun 			goto err_out_iounmap;
2759*4882a593Smuzhiyun 		}
2760*4882a593Smuzhiyun 		enic->bar[i].bus_addr = pci_resource_start(pdev, i);
2761*4882a593Smuzhiyun 	}
2762*4882a593Smuzhiyun 
2763*4882a593Smuzhiyun 	/* Register vNIC device
2764*4882a593Smuzhiyun 	 */
2765*4882a593Smuzhiyun 
2766*4882a593Smuzhiyun 	enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2767*4882a593Smuzhiyun 		ARRAY_SIZE(enic->bar));
2768*4882a593Smuzhiyun 	if (!enic->vdev) {
2769*4882a593Smuzhiyun 		dev_err(dev, "vNIC registration failed, aborting\n");
2770*4882a593Smuzhiyun 		err = -ENODEV;
2771*4882a593Smuzhiyun 		goto err_out_iounmap;
2772*4882a593Smuzhiyun 	}
2773*4882a593Smuzhiyun 
2774*4882a593Smuzhiyun 	err = vnic_devcmd_init(enic->vdev);
2775*4882a593Smuzhiyun 
2776*4882a593Smuzhiyun 	if (err)
2777*4882a593Smuzhiyun 		goto err_out_vnic_unregister;
2778*4882a593Smuzhiyun 
2779*4882a593Smuzhiyun #ifdef CONFIG_PCI_IOV
2780*4882a593Smuzhiyun 	/* Get number of subvnics */
2781*4882a593Smuzhiyun 	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
2782*4882a593Smuzhiyun 	if (pos) {
2783*4882a593Smuzhiyun 		pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
2784*4882a593Smuzhiyun 			&enic->num_vfs);
2785*4882a593Smuzhiyun 		if (enic->num_vfs) {
2786*4882a593Smuzhiyun 			err = pci_enable_sriov(pdev, enic->num_vfs);
2787*4882a593Smuzhiyun 			if (err) {
2788*4882a593Smuzhiyun 				dev_err(dev, "SRIOV enable failed, aborting."
2789*4882a593Smuzhiyun 					" pci_enable_sriov() returned %d\n",
2790*4882a593Smuzhiyun 					err);
2791*4882a593Smuzhiyun 				goto err_out_vnic_unregister;
2792*4882a593Smuzhiyun 			}
2793*4882a593Smuzhiyun 			enic->priv_flags |= ENIC_SRIOV_ENABLED;
2794*4882a593Smuzhiyun 			num_pps = enic->num_vfs;
2795*4882a593Smuzhiyun 		}
2796*4882a593Smuzhiyun 	}
2797*4882a593Smuzhiyun #endif
2798*4882a593Smuzhiyun 
2799*4882a593Smuzhiyun 	/* Allocate structure for port profiles */
2800*4882a593Smuzhiyun 	enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
2801*4882a593Smuzhiyun 	if (!enic->pp) {
2802*4882a593Smuzhiyun 		err = -ENOMEM;
2803*4882a593Smuzhiyun 		goto err_out_disable_sriov_pp;
2804*4882a593Smuzhiyun 	}
2805*4882a593Smuzhiyun 
2806*4882a593Smuzhiyun 	/* Issue device open to get device in known state
2807*4882a593Smuzhiyun 	 */
2808*4882a593Smuzhiyun 
2809*4882a593Smuzhiyun 	err = enic_dev_open(enic);
2810*4882a593Smuzhiyun 	if (err) {
2811*4882a593Smuzhiyun 		dev_err(dev, "vNIC dev open failed, aborting\n");
2812*4882a593Smuzhiyun 		goto err_out_disable_sriov;
2813*4882a593Smuzhiyun 	}
2814*4882a593Smuzhiyun 
2815*4882a593Smuzhiyun 	/* Setup devcmd lock
2816*4882a593Smuzhiyun 	 */
2817*4882a593Smuzhiyun 
2818*4882a593Smuzhiyun 	spin_lock_init(&enic->devcmd_lock);
2819*4882a593Smuzhiyun 	spin_lock_init(&enic->enic_api_lock);
2820*4882a593Smuzhiyun 
2821*4882a593Smuzhiyun 	/*
2822*4882a593Smuzhiyun 	 * Set ingress vlan rewrite mode before vnic initialization
2823*4882a593Smuzhiyun 	 */
2824*4882a593Smuzhiyun 
2825*4882a593Smuzhiyun 	err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2826*4882a593Smuzhiyun 	if (err) {
2827*4882a593Smuzhiyun 		dev_err(dev,
2828*4882a593Smuzhiyun 			"Failed to set ingress vlan rewrite mode, aborting.\n");
2829*4882a593Smuzhiyun 		goto err_out_dev_close;
2830*4882a593Smuzhiyun 	}
2831*4882a593Smuzhiyun 
2832*4882a593Smuzhiyun 	/* Issue device init to initialize the vnic-to-switch link.
2833*4882a593Smuzhiyun 	 * We'll start with carrier off and wait for link UP
2834*4882a593Smuzhiyun 	 * notification later to turn on carrier.  We don't need
2835*4882a593Smuzhiyun 	 * to wait here for the vnic-to-switch link initialization
2836*4882a593Smuzhiyun 	 * to complete; link UP notification is the indication that
2837*4882a593Smuzhiyun 	 * the process is complete.
2838*4882a593Smuzhiyun 	 */
2839*4882a593Smuzhiyun 
2840*4882a593Smuzhiyun 	netif_carrier_off(netdev);
2841*4882a593Smuzhiyun 
2842*4882a593Smuzhiyun 	/* Do not call dev_init for a dynamic vnic.
2843*4882a593Smuzhiyun 	 * For a dynamic vnic, init_prov_info will be
2844*4882a593Smuzhiyun 	 * called later by an upper layer.
2845*4882a593Smuzhiyun 	 */
2846*4882a593Smuzhiyun 
2847*4882a593Smuzhiyun 	if (!enic_is_dynamic(enic)) {
2848*4882a593Smuzhiyun 		err = vnic_dev_init(enic->vdev, 0);
2849*4882a593Smuzhiyun 		if (err) {
2850*4882a593Smuzhiyun 			dev_err(dev, "vNIC dev init failed, aborting\n");
2851*4882a593Smuzhiyun 			goto err_out_dev_close;
2852*4882a593Smuzhiyun 		}
2853*4882a593Smuzhiyun 	}
2854*4882a593Smuzhiyun 
2855*4882a593Smuzhiyun 	err = enic_dev_init(enic);
2856*4882a593Smuzhiyun 	if (err) {
2857*4882a593Smuzhiyun 		dev_err(dev, "Device initialization failed, aborting\n");
2858*4882a593Smuzhiyun 		goto err_out_dev_close;
2859*4882a593Smuzhiyun 	}
2860*4882a593Smuzhiyun 
2861*4882a593Smuzhiyun 	netif_set_real_num_tx_queues(netdev, enic->wq_count);
2862*4882a593Smuzhiyun 	netif_set_real_num_rx_queues(netdev, enic->rq_count);
2863*4882a593Smuzhiyun 
2864*4882a593Smuzhiyun 	/* Setup notification timer, HW reset task, and wq locks
2865*4882a593Smuzhiyun 	 */
2866*4882a593Smuzhiyun 
2867*4882a593Smuzhiyun 	timer_setup(&enic->notify_timer, enic_notify_timer, 0);
2868*4882a593Smuzhiyun 
2869*4882a593Smuzhiyun 	enic_rfs_flw_tbl_init(enic);
2870*4882a593Smuzhiyun 	enic_set_rx_coal_setting(enic);
2871*4882a593Smuzhiyun 	INIT_WORK(&enic->reset, enic_reset);
2872*4882a593Smuzhiyun 	INIT_WORK(&enic->tx_hang_reset, enic_tx_hang_reset);
2873*4882a593Smuzhiyun 	INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
2874*4882a593Smuzhiyun 
2875*4882a593Smuzhiyun 	for (i = 0; i < enic->wq_count; i++)
2876*4882a593Smuzhiyun 		spin_lock_init(&enic->wq_lock[i]);
2877*4882a593Smuzhiyun 
2878*4882a593Smuzhiyun 	/* Register net device
2879*4882a593Smuzhiyun 	 */
2880*4882a593Smuzhiyun 
2881*4882a593Smuzhiyun 	enic->port_mtu = enic->config.mtu;
2882*4882a593Smuzhiyun 
2883*4882a593Smuzhiyun 	err = enic_set_mac_addr(netdev, enic->mac_addr);
2884*4882a593Smuzhiyun 	if (err) {
2885*4882a593Smuzhiyun 		dev_err(dev, "Invalid MAC address, aborting\n");
2886*4882a593Smuzhiyun 		goto err_out_dev_deinit;
2887*4882a593Smuzhiyun 	}
2888*4882a593Smuzhiyun 
2889*4882a593Smuzhiyun 	enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2890*4882a593Smuzhiyun 	/* rx coalesce time already got initialized. This gets used
2891*4882a593Smuzhiyun 	 * if adaptive coal is turned off
2892*4882a593Smuzhiyun 	 */
2893*4882a593Smuzhiyun 	enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2894*4882a593Smuzhiyun 
2895*4882a593Smuzhiyun 	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
2896*4882a593Smuzhiyun 		netdev->netdev_ops = &enic_netdev_dynamic_ops;
2897*4882a593Smuzhiyun 	else
2898*4882a593Smuzhiyun 		netdev->netdev_ops = &enic_netdev_ops;
2899*4882a593Smuzhiyun 
2900*4882a593Smuzhiyun 	netdev->watchdog_timeo = 2 * HZ;
2901*4882a593Smuzhiyun 	enic_set_ethtool_ops(netdev);
2902*4882a593Smuzhiyun 
2903*4882a593Smuzhiyun 	netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
2904*4882a593Smuzhiyun 	if (ENIC_SETTING(enic, LOOP)) {
2905*4882a593Smuzhiyun 		netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2906*4882a593Smuzhiyun 		enic->loop_enable = 1;
2907*4882a593Smuzhiyun 		enic->loop_tag = enic->config.loop_tag;
2908*4882a593Smuzhiyun 		dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2909*4882a593Smuzhiyun 	}
2910*4882a593Smuzhiyun 	if (ENIC_SETTING(enic, TXCSUM))
2911*4882a593Smuzhiyun 		netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2912*4882a593Smuzhiyun 	if (ENIC_SETTING(enic, TSO))
2913*4882a593Smuzhiyun 		netdev->hw_features |= NETIF_F_TSO |
2914*4882a593Smuzhiyun 			NETIF_F_TSO6 | NETIF_F_TSO_ECN;
2915*4882a593Smuzhiyun 	if (ENIC_SETTING(enic, RSS))
2916*4882a593Smuzhiyun 		netdev->hw_features |= NETIF_F_RXHASH;
2917*4882a593Smuzhiyun 	if (ENIC_SETTING(enic, RXCSUM))
2918*4882a593Smuzhiyun 		netdev->hw_features |= NETIF_F_RXCSUM;
2919*4882a593Smuzhiyun 	if (ENIC_SETTING(enic, VXLAN)) {
2920*4882a593Smuzhiyun 		u64 patch_level;
2921*4882a593Smuzhiyun 		u64 a1 = 0;
2922*4882a593Smuzhiyun 
2923*4882a593Smuzhiyun 		netdev->hw_enc_features |= NETIF_F_RXCSUM		|
2924*4882a593Smuzhiyun 					   NETIF_F_TSO			|
2925*4882a593Smuzhiyun 					   NETIF_F_TSO6			|
2926*4882a593Smuzhiyun 					   NETIF_F_TSO_ECN		|
2927*4882a593Smuzhiyun 					   NETIF_F_GSO_UDP_TUNNEL	|
2928*4882a593Smuzhiyun 					   NETIF_F_HW_CSUM		|
2929*4882a593Smuzhiyun 					   NETIF_F_GSO_UDP_TUNNEL_CSUM;
2930*4882a593Smuzhiyun 		netdev->hw_features |= netdev->hw_enc_features;
2931*4882a593Smuzhiyun 		/* get bit mask from hw about supported offload bit level
2932*4882a593Smuzhiyun 		 * BIT(0) = fw supports patch_level 0
2933*4882a593Smuzhiyun 		 *	    fcoe bit = encap
2934*4882a593Smuzhiyun 		 *	    fcoe_fc_crc_ok = outer csum ok
2935*4882a593Smuzhiyun 		 * BIT(1) = always set by fw
2936*4882a593Smuzhiyun 		 * BIT(2) = fw supports patch_level 2
2937*4882a593Smuzhiyun 		 *	    BIT(0) in rss_hash = encap
2938*4882a593Smuzhiyun 		 *	    BIT(1,2) in rss_hash = outer_ip_csum_ok/
2939*4882a593Smuzhiyun 		 *				   outer_tcp_csum_ok
2940*4882a593Smuzhiyun 		 * used in enic_rq_indicate_buf
2941*4882a593Smuzhiyun 		 */
2942*4882a593Smuzhiyun 		err = vnic_dev_get_supported_feature_ver(enic->vdev,
2943*4882a593Smuzhiyun 							 VIC_FEATURE_VXLAN,
2944*4882a593Smuzhiyun 							 &patch_level, &a1);
2945*4882a593Smuzhiyun 		if (err)
2946*4882a593Smuzhiyun 			patch_level = 0;
2947*4882a593Smuzhiyun 		enic->vxlan.flags = (u8)a1;
2948*4882a593Smuzhiyun 		/* mask bits that are supported by driver
2949*4882a593Smuzhiyun 		 */
2950*4882a593Smuzhiyun 		patch_level &= BIT_ULL(0) | BIT_ULL(2);
2951*4882a593Smuzhiyun 		patch_level = fls(patch_level);
2952*4882a593Smuzhiyun 		patch_level = patch_level ? patch_level - 1 : 0;
2953*4882a593Smuzhiyun 		enic->vxlan.patch_level = patch_level;
2954*4882a593Smuzhiyun 
2955*4882a593Smuzhiyun 		if (vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ) == 1 ||
2956*4882a593Smuzhiyun 		    enic->vxlan.flags & ENIC_VXLAN_MULTI_WQ) {
2957*4882a593Smuzhiyun 			netdev->udp_tunnel_nic_info = &enic_udp_tunnels_v4;
2958*4882a593Smuzhiyun 			if (enic->vxlan.flags & ENIC_VXLAN_OUTER_IPV6)
2959*4882a593Smuzhiyun 				netdev->udp_tunnel_nic_info = &enic_udp_tunnels;
2960*4882a593Smuzhiyun 		}
2961*4882a593Smuzhiyun 	}
2962*4882a593Smuzhiyun 
2963*4882a593Smuzhiyun 	netdev->features |= netdev->hw_features;
2964*4882a593Smuzhiyun 	netdev->vlan_features |= netdev->features;
2965*4882a593Smuzhiyun 
2966*4882a593Smuzhiyun #ifdef CONFIG_RFS_ACCEL
2967*4882a593Smuzhiyun 	netdev->hw_features |= NETIF_F_NTUPLE;
2968*4882a593Smuzhiyun #endif
2969*4882a593Smuzhiyun 
2970*4882a593Smuzhiyun 	if (using_dac)
2971*4882a593Smuzhiyun 		netdev->features |= NETIF_F_HIGHDMA;
2972*4882a593Smuzhiyun 
2973*4882a593Smuzhiyun 	netdev->priv_flags |= IFF_UNICAST_FLT;
2974*4882a593Smuzhiyun 
2975*4882a593Smuzhiyun 	/* MTU range: 68 - 9000 */
2976*4882a593Smuzhiyun 	netdev->min_mtu = ENIC_MIN_MTU;
2977*4882a593Smuzhiyun 	netdev->max_mtu = ENIC_MAX_MTU;
2978*4882a593Smuzhiyun 	netdev->mtu	= enic->port_mtu;
2979*4882a593Smuzhiyun 
2980*4882a593Smuzhiyun 	err = register_netdev(netdev);
2981*4882a593Smuzhiyun 	if (err) {
2982*4882a593Smuzhiyun 		dev_err(dev, "Cannot register net device, aborting\n");
2983*4882a593Smuzhiyun 		goto err_out_dev_deinit;
2984*4882a593Smuzhiyun 	}
2985*4882a593Smuzhiyun 	enic->rx_copybreak = RX_COPYBREAK_DEFAULT;
2986*4882a593Smuzhiyun 
2987*4882a593Smuzhiyun 	return 0;
2988*4882a593Smuzhiyun 
2989*4882a593Smuzhiyun err_out_dev_deinit:
2990*4882a593Smuzhiyun 	enic_dev_deinit(enic);
2991*4882a593Smuzhiyun err_out_dev_close:
2992*4882a593Smuzhiyun 	vnic_dev_close(enic->vdev);
2993*4882a593Smuzhiyun err_out_disable_sriov:
2994*4882a593Smuzhiyun 	kfree(enic->pp);
2995*4882a593Smuzhiyun err_out_disable_sriov_pp:
2996*4882a593Smuzhiyun #ifdef CONFIG_PCI_IOV
2997*4882a593Smuzhiyun 	if (enic_sriov_enabled(enic)) {
2998*4882a593Smuzhiyun 		pci_disable_sriov(pdev);
2999*4882a593Smuzhiyun 		enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
3000*4882a593Smuzhiyun 	}
3001*4882a593Smuzhiyun #endif
3002*4882a593Smuzhiyun err_out_vnic_unregister:
3003*4882a593Smuzhiyun 	vnic_dev_unregister(enic->vdev);
3004*4882a593Smuzhiyun err_out_iounmap:
3005*4882a593Smuzhiyun 	enic_iounmap(enic);
3006*4882a593Smuzhiyun err_out_release_regions:
3007*4882a593Smuzhiyun 	pci_release_regions(pdev);
3008*4882a593Smuzhiyun err_out_disable_device:
3009*4882a593Smuzhiyun 	pci_disable_device(pdev);
3010*4882a593Smuzhiyun err_out_free_netdev:
3011*4882a593Smuzhiyun 	free_netdev(netdev);
3012*4882a593Smuzhiyun 
3013*4882a593Smuzhiyun 	return err;
3014*4882a593Smuzhiyun }
3015*4882a593Smuzhiyun 
enic_remove(struct pci_dev * pdev)3016*4882a593Smuzhiyun static void enic_remove(struct pci_dev *pdev)
3017*4882a593Smuzhiyun {
3018*4882a593Smuzhiyun 	struct net_device *netdev = pci_get_drvdata(pdev);
3019*4882a593Smuzhiyun 
3020*4882a593Smuzhiyun 	if (netdev) {
3021*4882a593Smuzhiyun 		struct enic *enic = netdev_priv(netdev);
3022*4882a593Smuzhiyun 
3023*4882a593Smuzhiyun 		cancel_work_sync(&enic->reset);
3024*4882a593Smuzhiyun 		cancel_work_sync(&enic->change_mtu_work);
3025*4882a593Smuzhiyun 		unregister_netdev(netdev);
3026*4882a593Smuzhiyun 		enic_dev_deinit(enic);
3027*4882a593Smuzhiyun 		vnic_dev_close(enic->vdev);
3028*4882a593Smuzhiyun #ifdef CONFIG_PCI_IOV
3029*4882a593Smuzhiyun 		if (enic_sriov_enabled(enic)) {
3030*4882a593Smuzhiyun 			pci_disable_sriov(pdev);
3031*4882a593Smuzhiyun 			enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
3032*4882a593Smuzhiyun 		}
3033*4882a593Smuzhiyun #endif
3034*4882a593Smuzhiyun 		kfree(enic->pp);
3035*4882a593Smuzhiyun 		vnic_dev_unregister(enic->vdev);
3036*4882a593Smuzhiyun 		enic_iounmap(enic);
3037*4882a593Smuzhiyun 		pci_release_regions(pdev);
3038*4882a593Smuzhiyun 		pci_disable_device(pdev);
3039*4882a593Smuzhiyun 		free_netdev(netdev);
3040*4882a593Smuzhiyun 	}
3041*4882a593Smuzhiyun }
3042*4882a593Smuzhiyun 
3043*4882a593Smuzhiyun static struct pci_driver enic_driver = {
3044*4882a593Smuzhiyun 	.name = DRV_NAME,
3045*4882a593Smuzhiyun 	.id_table = enic_id_table,
3046*4882a593Smuzhiyun 	.probe = enic_probe,
3047*4882a593Smuzhiyun 	.remove = enic_remove,
3048*4882a593Smuzhiyun };
3049*4882a593Smuzhiyun 
enic_init_module(void)3050*4882a593Smuzhiyun static int __init enic_init_module(void)
3051*4882a593Smuzhiyun {
3052*4882a593Smuzhiyun 	return pci_register_driver(&enic_driver);
3053*4882a593Smuzhiyun }
3054*4882a593Smuzhiyun 
enic_cleanup_module(void)3055*4882a593Smuzhiyun static void __exit enic_cleanup_module(void)
3056*4882a593Smuzhiyun {
3057*4882a593Smuzhiyun 	pci_unregister_driver(&enic_driver);
3058*4882a593Smuzhiyun }
3059*4882a593Smuzhiyun 
3060*4882a593Smuzhiyun module_init(enic_init_module);
3061*4882a593Smuzhiyun module_exit(enic_cleanup_module);
3062