xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/cisco/enic/cq_desc.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
3*4882a593Smuzhiyun  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you may redistribute it and/or modify
6*4882a593Smuzhiyun  * it under the terms of the GNU General Public License as published by
7*4882a593Smuzhiyun  * the Free Software Foundation; version 2 of the License.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10*4882a593Smuzhiyun  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11*4882a593Smuzhiyun  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12*4882a593Smuzhiyun  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13*4882a593Smuzhiyun  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14*4882a593Smuzhiyun  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15*4882a593Smuzhiyun  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16*4882a593Smuzhiyun  * SOFTWARE.
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #ifndef _CQ_DESC_H_
21*4882a593Smuzhiyun #define _CQ_DESC_H_
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /*
24*4882a593Smuzhiyun  * Completion queue descriptor types
25*4882a593Smuzhiyun  */
26*4882a593Smuzhiyun enum cq_desc_types {
27*4882a593Smuzhiyun 	CQ_DESC_TYPE_WQ_ENET = 0,
28*4882a593Smuzhiyun 	CQ_DESC_TYPE_DESC_COPY = 1,
29*4882a593Smuzhiyun 	CQ_DESC_TYPE_WQ_EXCH = 2,
30*4882a593Smuzhiyun 	CQ_DESC_TYPE_RQ_ENET = 3,
31*4882a593Smuzhiyun 	CQ_DESC_TYPE_RQ_FCP = 4,
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* Completion queue descriptor: 16B
35*4882a593Smuzhiyun  *
36*4882a593Smuzhiyun  * All completion queues have this basic layout.  The
37*4882a593Smuzhiyun  * type_specfic area is unique for each completion
38*4882a593Smuzhiyun  * queue type.
39*4882a593Smuzhiyun  */
40*4882a593Smuzhiyun struct cq_desc {
41*4882a593Smuzhiyun 	__le16 completed_index;
42*4882a593Smuzhiyun 	__le16 q_number;
43*4882a593Smuzhiyun 	u8 type_specfic[11];
44*4882a593Smuzhiyun 	u8 type_color;
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define CQ_DESC_TYPE_BITS        4
48*4882a593Smuzhiyun #define CQ_DESC_TYPE_MASK        ((1 << CQ_DESC_TYPE_BITS) - 1)
49*4882a593Smuzhiyun #define CQ_DESC_COLOR_MASK       1
50*4882a593Smuzhiyun #define CQ_DESC_COLOR_SHIFT      7
51*4882a593Smuzhiyun #define CQ_DESC_Q_NUM_BITS       10
52*4882a593Smuzhiyun #define CQ_DESC_Q_NUM_MASK       ((1 << CQ_DESC_Q_NUM_BITS) - 1)
53*4882a593Smuzhiyun #define CQ_DESC_COMP_NDX_BITS    12
54*4882a593Smuzhiyun #define CQ_DESC_COMP_NDX_MASK    ((1 << CQ_DESC_COMP_NDX_BITS) - 1)
55*4882a593Smuzhiyun 
cq_desc_dec(const struct cq_desc * desc_arg,u8 * type,u8 * color,u16 * q_number,u16 * completed_index)56*4882a593Smuzhiyun static inline void cq_desc_dec(const struct cq_desc *desc_arg,
57*4882a593Smuzhiyun 	u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	const struct cq_desc *desc = desc_arg;
60*4882a593Smuzhiyun 	const u8 type_color = desc->type_color;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	*color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	/*
65*4882a593Smuzhiyun 	 * Make sure color bit is read from desc *before* other fields
66*4882a593Smuzhiyun 	 * are read from desc.  Hardware guarantees color bit is last
67*4882a593Smuzhiyun 	 * bit (byte) written.  Adding the rmb() prevents the compiler
68*4882a593Smuzhiyun 	 * and/or CPU from reordering the reads which would potentially
69*4882a593Smuzhiyun 	 * result in reading stale values.
70*4882a593Smuzhiyun 	 */
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	rmb();
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	*type = type_color & CQ_DESC_TYPE_MASK;
75*4882a593Smuzhiyun 	*q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;
76*4882a593Smuzhiyun 	*completed_index = le16_to_cpu(desc->completed_index) &
77*4882a593Smuzhiyun 		CQ_DESC_COMP_NDX_MASK;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun #endif /* _CQ_DESC_H_ */
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