1*4882a593Smuzhiyun /* cs89x0.c: A Crystal Semiconductor (Now Cirrus Logic) CS89[02]0
2*4882a593Smuzhiyun * driver for linux.
3*4882a593Smuzhiyun * Written 1996 by Russell Nelson, with reference to skeleton.c
4*4882a593Smuzhiyun * written 1993-1994 by Donald Becker.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This software may be used and distributed according to the terms
7*4882a593Smuzhiyun * of the GNU General Public License, incorporated herein by reference.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * The author may be reached at nelson@crynwr.com, Crynwr
10*4882a593Smuzhiyun * Software, 521 Pleasant Valley Rd., Potsdam, NY 13676
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Other contributors:
13*4882a593Smuzhiyun * Mike Cruse : mcruse@cti-ltd.com
14*4882a593Smuzhiyun * Russ Nelson
15*4882a593Smuzhiyun * Melody Lee : ethernet@crystal.cirrus.com
16*4882a593Smuzhiyun * Alan Cox
17*4882a593Smuzhiyun * Andrew Morton
18*4882a593Smuzhiyun * Oskar Schirmer : oskar@scara.com
19*4882a593Smuzhiyun * Deepak Saxena : dsaxena@plexity.net
20*4882a593Smuzhiyun * Dmitry Pervushin : dpervushin@ru.mvista.com
21*4882a593Smuzhiyun * Deepak Saxena : dsaxena@plexity.net
22*4882a593Smuzhiyun * Domenico Andreoli : cavokz@gmail.com
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /*
27*4882a593Smuzhiyun * Set this to zero to disable DMA code
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun * Note that even if DMA is turned off we still support the 'dma' and 'use_dma'
30*4882a593Smuzhiyun * module options so we don't break any startup scripts.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun #ifndef CONFIG_ISA_DMA_API
33*4882a593Smuzhiyun #define ALLOW_DMA 0
34*4882a593Smuzhiyun #else
35*4882a593Smuzhiyun #define ALLOW_DMA 1
36*4882a593Smuzhiyun #endif
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun * Set this to zero to remove all the debug statements via
40*4882a593Smuzhiyun * dead code elimination
41*4882a593Smuzhiyun */
42*4882a593Smuzhiyun #define DEBUGGING 1
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /* Sources:
45*4882a593Smuzhiyun * Crynwr packet driver epktisa.
46*4882a593Smuzhiyun * Crystal Semiconductor data sheets.
47*4882a593Smuzhiyun */
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #include <linux/module.h>
52*4882a593Smuzhiyun #include <linux/printk.h>
53*4882a593Smuzhiyun #include <linux/errno.h>
54*4882a593Smuzhiyun #include <linux/netdevice.h>
55*4882a593Smuzhiyun #include <linux/etherdevice.h>
56*4882a593Smuzhiyun #include <linux/of.h>
57*4882a593Smuzhiyun #include <linux/of_device.h>
58*4882a593Smuzhiyun #include <linux/platform_device.h>
59*4882a593Smuzhiyun #include <linux/kernel.h>
60*4882a593Smuzhiyun #include <linux/types.h>
61*4882a593Smuzhiyun #include <linux/fcntl.h>
62*4882a593Smuzhiyun #include <linux/interrupt.h>
63*4882a593Smuzhiyun #include <linux/ioport.h>
64*4882a593Smuzhiyun #include <linux/in.h>
65*4882a593Smuzhiyun #include <linux/jiffies.h>
66*4882a593Smuzhiyun #include <linux/skbuff.h>
67*4882a593Smuzhiyun #include <linux/spinlock.h>
68*4882a593Smuzhiyun #include <linux/string.h>
69*4882a593Smuzhiyun #include <linux/init.h>
70*4882a593Smuzhiyun #include <linux/bitops.h>
71*4882a593Smuzhiyun #include <linux/delay.h>
72*4882a593Smuzhiyun #include <linux/gfp.h>
73*4882a593Smuzhiyun #include <linux/io.h>
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun #include <asm/irq.h>
76*4882a593Smuzhiyun #include <linux/atomic.h>
77*4882a593Smuzhiyun #if ALLOW_DMA
78*4882a593Smuzhiyun #include <asm/dma.h>
79*4882a593Smuzhiyun #endif
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun #include "cs89x0.h"
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun #define cs89_dbg(val, level, fmt, ...) \
84*4882a593Smuzhiyun do { \
85*4882a593Smuzhiyun if (val <= net_debug) \
86*4882a593Smuzhiyun pr_##level(fmt, ##__VA_ARGS__); \
87*4882a593Smuzhiyun } while (0)
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun static char version[] __initdata =
90*4882a593Smuzhiyun "v2.4.3-pre1 Russell Nelson <nelson@crynwr.com>, Andrew Morton";
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun #define DRV_NAME "cs89x0"
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /* First, a few definitions that the brave might change.
95*4882a593Smuzhiyun * A zero-terminated list of I/O addresses to be probed. Some special flags..
96*4882a593Smuzhiyun * Addr & 1 = Read back the address port, look for signature and reset
97*4882a593Smuzhiyun * the page window before probing
98*4882a593Smuzhiyun * Addr & 3 = Reset the page window and probe
99*4882a593Smuzhiyun * The CLPS eval board has the Cirrus chip at 0x80090300, in ARM IO space,
100*4882a593Smuzhiyun * but it is possible that a Cirrus board could be plugged into the ISA
101*4882a593Smuzhiyun * slots.
102*4882a593Smuzhiyun */
103*4882a593Smuzhiyun /* The cs8900 has 4 IRQ pins, software selectable. cs8900_irq_map maps
104*4882a593Smuzhiyun * them to system IRQ numbers. This mapping is card specific and is set to
105*4882a593Smuzhiyun * the configuration of the Cirrus Eval board for this chip.
106*4882a593Smuzhiyun */
107*4882a593Smuzhiyun #ifndef CONFIG_CS89x0_PLATFORM
108*4882a593Smuzhiyun static unsigned int netcard_portlist[] __used __initdata = {
109*4882a593Smuzhiyun 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240,
110*4882a593Smuzhiyun 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun static unsigned int cs8900_irq_map[] = {
113*4882a593Smuzhiyun 10, 11, 12, 5
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun #endif
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun #if DEBUGGING
118*4882a593Smuzhiyun static unsigned int net_debug = DEBUGGING;
119*4882a593Smuzhiyun #else
120*4882a593Smuzhiyun #define net_debug 0 /* gcc will remove all the debug code for us */
121*4882a593Smuzhiyun #endif
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun /* The number of low I/O ports used by the ethercard. */
124*4882a593Smuzhiyun #define NETCARD_IO_EXTENT 16
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun /* we allow the user to override various values normally set in the EEPROM */
127*4882a593Smuzhiyun #define FORCE_RJ45 0x0001 /* pick one of these three */
128*4882a593Smuzhiyun #define FORCE_AUI 0x0002
129*4882a593Smuzhiyun #define FORCE_BNC 0x0004
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun #define FORCE_AUTO 0x0010 /* pick one of these three */
132*4882a593Smuzhiyun #define FORCE_HALF 0x0020
133*4882a593Smuzhiyun #define FORCE_FULL 0x0030
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /* Information that need to be kept for each board. */
136*4882a593Smuzhiyun struct net_local {
137*4882a593Smuzhiyun int chip_type; /* one of: CS8900, CS8920, CS8920M */
138*4882a593Smuzhiyun char chip_revision; /* revision letter of the chip ('A'...) */
139*4882a593Smuzhiyun int send_cmd; /* the proper send command: TX_NOW, TX_AFTER_381, or TX_AFTER_ALL */
140*4882a593Smuzhiyun int auto_neg_cnf; /* auto-negotiation word from EEPROM */
141*4882a593Smuzhiyun int adapter_cnf; /* adapter configuration from EEPROM */
142*4882a593Smuzhiyun int isa_config; /* ISA configuration from EEPROM */
143*4882a593Smuzhiyun int irq_map; /* IRQ map from EEPROM */
144*4882a593Smuzhiyun int rx_mode; /* what mode are we in? 0, RX_MULTCAST_ACCEPT, or RX_ALL_ACCEPT */
145*4882a593Smuzhiyun int curr_rx_cfg; /* a copy of PP_RxCFG */
146*4882a593Smuzhiyun int linectl; /* either 0 or LOW_RX_SQUELCH, depending on configuration. */
147*4882a593Smuzhiyun int send_underrun; /* keep track of how many underruns in a row we get */
148*4882a593Smuzhiyun int force; /* force various values; see FORCE* above. */
149*4882a593Smuzhiyun spinlock_t lock;
150*4882a593Smuzhiyun void __iomem *virt_addr;/* CS89x0 virtual address. */
151*4882a593Smuzhiyun #if ALLOW_DMA
152*4882a593Smuzhiyun int use_dma; /* Flag: we're using dma */
153*4882a593Smuzhiyun int dma; /* DMA channel */
154*4882a593Smuzhiyun int dmasize; /* 16 or 64 */
155*4882a593Smuzhiyun unsigned char *dma_buff; /* points to the beginning of the buffer */
156*4882a593Smuzhiyun unsigned char *end_dma_buff; /* points to the end of the buffer */
157*4882a593Smuzhiyun unsigned char *rx_dma_ptr; /* points to the next packet */
158*4882a593Smuzhiyun #endif
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun /* Example routines you must write ;->. */
162*4882a593Smuzhiyun #define tx_done(dev) 1
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /*
165*4882a593Smuzhiyun * Permit 'cs89x0_dma=N' in the kernel boot environment
166*4882a593Smuzhiyun */
167*4882a593Smuzhiyun #if !defined(MODULE)
168*4882a593Smuzhiyun #if ALLOW_DMA
169*4882a593Smuzhiyun static int g_cs89x0_dma;
170*4882a593Smuzhiyun
dma_fn(char * str)171*4882a593Smuzhiyun static int __init dma_fn(char *str)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun g_cs89x0_dma = simple_strtol(str, NULL, 0);
174*4882a593Smuzhiyun return 1;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun __setup("cs89x0_dma=", dma_fn);
178*4882a593Smuzhiyun #endif /* ALLOW_DMA */
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun static int g_cs89x0_media__force;
181*4882a593Smuzhiyun
media_fn(char * str)182*4882a593Smuzhiyun static int __init media_fn(char *str)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun if (!strcmp(str, "rj45"))
185*4882a593Smuzhiyun g_cs89x0_media__force = FORCE_RJ45;
186*4882a593Smuzhiyun else if (!strcmp(str, "aui"))
187*4882a593Smuzhiyun g_cs89x0_media__force = FORCE_AUI;
188*4882a593Smuzhiyun else if (!strcmp(str, "bnc"))
189*4882a593Smuzhiyun g_cs89x0_media__force = FORCE_BNC;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun return 1;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun __setup("cs89x0_media=", media_fn);
195*4882a593Smuzhiyun #endif
196*4882a593Smuzhiyun
readwords(struct net_local * lp,int portno,void * buf,int length)197*4882a593Smuzhiyun static void readwords(struct net_local *lp, int portno, void *buf, int length)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun u8 *buf8 = (u8 *)buf;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun do {
202*4882a593Smuzhiyun u16 tmp16;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun tmp16 = ioread16(lp->virt_addr + portno);
205*4882a593Smuzhiyun *buf8++ = (u8)tmp16;
206*4882a593Smuzhiyun *buf8++ = (u8)(tmp16 >> 8);
207*4882a593Smuzhiyun } while (--length);
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
writewords(struct net_local * lp,int portno,void * buf,int length)210*4882a593Smuzhiyun static void writewords(struct net_local *lp, int portno, void *buf, int length)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun u8 *buf8 = (u8 *)buf;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun do {
215*4882a593Smuzhiyun u16 tmp16;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun tmp16 = *buf8++;
218*4882a593Smuzhiyun tmp16 |= (*buf8++) << 8;
219*4882a593Smuzhiyun iowrite16(tmp16, lp->virt_addr + portno);
220*4882a593Smuzhiyun } while (--length);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun static u16
readreg(struct net_device * dev,u16 regno)224*4882a593Smuzhiyun readreg(struct net_device *dev, u16 regno)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun iowrite16(regno, lp->virt_addr + ADD_PORT);
229*4882a593Smuzhiyun return ioread16(lp->virt_addr + DATA_PORT);
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun static void
writereg(struct net_device * dev,u16 regno,u16 value)233*4882a593Smuzhiyun writereg(struct net_device *dev, u16 regno, u16 value)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun iowrite16(regno, lp->virt_addr + ADD_PORT);
238*4882a593Smuzhiyun iowrite16(value, lp->virt_addr + DATA_PORT);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun static int __init
wait_eeprom_ready(struct net_device * dev)242*4882a593Smuzhiyun wait_eeprom_ready(struct net_device *dev)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun unsigned long timeout = jiffies;
245*4882a593Smuzhiyun /* check to see if the EEPROM is ready,
246*4882a593Smuzhiyun * a timeout is used just in case EEPROM is ready when
247*4882a593Smuzhiyun * SI_BUSY in the PP_SelfST is clear
248*4882a593Smuzhiyun */
249*4882a593Smuzhiyun while (readreg(dev, PP_SelfST) & SI_BUSY)
250*4882a593Smuzhiyun if (time_after_eq(jiffies, timeout + 40))
251*4882a593Smuzhiyun return -1;
252*4882a593Smuzhiyun return 0;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun static int __init
get_eeprom_data(struct net_device * dev,int off,int len,int * buffer)256*4882a593Smuzhiyun get_eeprom_data(struct net_device *dev, int off, int len, int *buffer)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun int i;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun cs89_dbg(3, info, "EEPROM data from %x for %x:", off, len);
261*4882a593Smuzhiyun for (i = 0; i < len; i++) {
262*4882a593Smuzhiyun if (wait_eeprom_ready(dev) < 0)
263*4882a593Smuzhiyun return -1;
264*4882a593Smuzhiyun /* Now send the EEPROM read command and EEPROM location to read */
265*4882a593Smuzhiyun writereg(dev, PP_EECMD, (off + i) | EEPROM_READ_CMD);
266*4882a593Smuzhiyun if (wait_eeprom_ready(dev) < 0)
267*4882a593Smuzhiyun return -1;
268*4882a593Smuzhiyun buffer[i] = readreg(dev, PP_EEData);
269*4882a593Smuzhiyun cs89_dbg(3, cont, " %04x", buffer[i]);
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun cs89_dbg(3, cont, "\n");
272*4882a593Smuzhiyun return 0;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun static int __init
get_eeprom_cksum(int off,int len,int * buffer)276*4882a593Smuzhiyun get_eeprom_cksum(int off, int len, int *buffer)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun int i, cksum;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun cksum = 0;
281*4882a593Smuzhiyun for (i = 0; i < len; i++)
282*4882a593Smuzhiyun cksum += buffer[i];
283*4882a593Smuzhiyun cksum &= 0xffff;
284*4882a593Smuzhiyun if (cksum == 0)
285*4882a593Smuzhiyun return 0;
286*4882a593Smuzhiyun return -1;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun static void
write_irq(struct net_device * dev,int chip_type,int irq)290*4882a593Smuzhiyun write_irq(struct net_device *dev, int chip_type, int irq)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun int i;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun if (chip_type == CS8900) {
295*4882a593Smuzhiyun #ifndef CONFIG_CS89x0_PLATFORM
296*4882a593Smuzhiyun /* Search the mapping table for the corresponding IRQ pin. */
297*4882a593Smuzhiyun for (i = 0; i != ARRAY_SIZE(cs8900_irq_map); i++)
298*4882a593Smuzhiyun if (cs8900_irq_map[i] == irq)
299*4882a593Smuzhiyun break;
300*4882a593Smuzhiyun /* Not found */
301*4882a593Smuzhiyun if (i == ARRAY_SIZE(cs8900_irq_map))
302*4882a593Smuzhiyun i = 3;
303*4882a593Smuzhiyun #else
304*4882a593Smuzhiyun /* INTRQ0 pin is used for interrupt generation. */
305*4882a593Smuzhiyun i = 0;
306*4882a593Smuzhiyun #endif
307*4882a593Smuzhiyun writereg(dev, PP_CS8900_ISAINT, i);
308*4882a593Smuzhiyun } else {
309*4882a593Smuzhiyun writereg(dev, PP_CS8920_ISAINT, irq);
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun static void
count_rx_errors(int status,struct net_device * dev)314*4882a593Smuzhiyun count_rx_errors(int status, struct net_device *dev)
315*4882a593Smuzhiyun {
316*4882a593Smuzhiyun dev->stats.rx_errors++;
317*4882a593Smuzhiyun if (status & RX_RUNT)
318*4882a593Smuzhiyun dev->stats.rx_length_errors++;
319*4882a593Smuzhiyun if (status & RX_EXTRA_DATA)
320*4882a593Smuzhiyun dev->stats.rx_length_errors++;
321*4882a593Smuzhiyun if ((status & RX_CRC_ERROR) && !(status & (RX_EXTRA_DATA | RX_RUNT)))
322*4882a593Smuzhiyun /* per str 172 */
323*4882a593Smuzhiyun dev->stats.rx_crc_errors++;
324*4882a593Smuzhiyun if (status & RX_DRIBBLE)
325*4882a593Smuzhiyun dev->stats.rx_frame_errors++;
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun /*********************************
329*4882a593Smuzhiyun * This page contains DMA routines
330*4882a593Smuzhiyun *********************************/
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun #if ALLOW_DMA
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun #define dma_page_eq(ptr1, ptr2) ((long)(ptr1) >> 17 == (long)(ptr2) >> 17)
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun static void
get_dma_channel(struct net_device * dev)337*4882a593Smuzhiyun get_dma_channel(struct net_device *dev)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun if (lp->dma) {
342*4882a593Smuzhiyun dev->dma = lp->dma;
343*4882a593Smuzhiyun lp->isa_config |= ISA_RxDMA;
344*4882a593Smuzhiyun } else {
345*4882a593Smuzhiyun if ((lp->isa_config & ANY_ISA_DMA) == 0)
346*4882a593Smuzhiyun return;
347*4882a593Smuzhiyun dev->dma = lp->isa_config & DMA_NO_MASK;
348*4882a593Smuzhiyun if (lp->chip_type == CS8900)
349*4882a593Smuzhiyun dev->dma += 5;
350*4882a593Smuzhiyun if (dev->dma < 5 || dev->dma > 7) {
351*4882a593Smuzhiyun lp->isa_config &= ~ANY_ISA_DMA;
352*4882a593Smuzhiyun return;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun static void
write_dma(struct net_device * dev,int chip_type,int dma)358*4882a593Smuzhiyun write_dma(struct net_device *dev, int chip_type, int dma)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
361*4882a593Smuzhiyun if ((lp->isa_config & ANY_ISA_DMA) == 0)
362*4882a593Smuzhiyun return;
363*4882a593Smuzhiyun if (chip_type == CS8900)
364*4882a593Smuzhiyun writereg(dev, PP_CS8900_ISADMA, dma - 5);
365*4882a593Smuzhiyun else
366*4882a593Smuzhiyun writereg(dev, PP_CS8920_ISADMA, dma);
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun static void
set_dma_cfg(struct net_device * dev)370*4882a593Smuzhiyun set_dma_cfg(struct net_device *dev)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun if (lp->use_dma) {
375*4882a593Smuzhiyun if ((lp->isa_config & ANY_ISA_DMA) == 0) {
376*4882a593Smuzhiyun cs89_dbg(3, err, "set_dma_cfg(): no DMA\n");
377*4882a593Smuzhiyun return;
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun if (lp->isa_config & ISA_RxDMA) {
380*4882a593Smuzhiyun lp->curr_rx_cfg |= RX_DMA_ONLY;
381*4882a593Smuzhiyun cs89_dbg(3, info, "set_dma_cfg(): RX_DMA_ONLY\n");
382*4882a593Smuzhiyun } else {
383*4882a593Smuzhiyun lp->curr_rx_cfg |= AUTO_RX_DMA; /* not that we support it... */
384*4882a593Smuzhiyun cs89_dbg(3, info, "set_dma_cfg(): AUTO_RX_DMA\n");
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun static int
dma_bufcfg(struct net_device * dev)390*4882a593Smuzhiyun dma_bufcfg(struct net_device *dev)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
393*4882a593Smuzhiyun if (lp->use_dma)
394*4882a593Smuzhiyun return (lp->isa_config & ANY_ISA_DMA) ? RX_DMA_ENBL : 0;
395*4882a593Smuzhiyun else
396*4882a593Smuzhiyun return 0;
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun static int
dma_busctl(struct net_device * dev)400*4882a593Smuzhiyun dma_busctl(struct net_device *dev)
401*4882a593Smuzhiyun {
402*4882a593Smuzhiyun int retval = 0;
403*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
404*4882a593Smuzhiyun if (lp->use_dma) {
405*4882a593Smuzhiyun if (lp->isa_config & ANY_ISA_DMA)
406*4882a593Smuzhiyun retval |= RESET_RX_DMA; /* Reset the DMA pointer */
407*4882a593Smuzhiyun if (lp->isa_config & DMA_BURST)
408*4882a593Smuzhiyun retval |= DMA_BURST_MODE; /* Does ISA config specify DMA burst ? */
409*4882a593Smuzhiyun if (lp->dmasize == 64)
410*4882a593Smuzhiyun retval |= RX_DMA_SIZE_64K; /* did they ask for 64K? */
411*4882a593Smuzhiyun retval |= MEMORY_ON; /* we need memory enabled to use DMA. */
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun return retval;
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun static void
dma_rx(struct net_device * dev)417*4882a593Smuzhiyun dma_rx(struct net_device *dev)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
420*4882a593Smuzhiyun struct sk_buff *skb;
421*4882a593Smuzhiyun int status, length;
422*4882a593Smuzhiyun unsigned char *bp = lp->rx_dma_ptr;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun status = bp[0] + (bp[1] << 8);
425*4882a593Smuzhiyun length = bp[2] + (bp[3] << 8);
426*4882a593Smuzhiyun bp += 4;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun cs89_dbg(5, debug, "%s: receiving DMA packet at %lx, status %x, length %x\n",
429*4882a593Smuzhiyun dev->name, (unsigned long)bp, status, length);
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun if ((status & RX_OK) == 0) {
432*4882a593Smuzhiyun count_rx_errors(status, dev);
433*4882a593Smuzhiyun goto skip_this_frame;
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun /* Malloc up new buffer. */
437*4882a593Smuzhiyun skb = netdev_alloc_skb(dev, length + 2);
438*4882a593Smuzhiyun if (skb == NULL) {
439*4882a593Smuzhiyun dev->stats.rx_dropped++;
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun /* AKPM: advance bp to the next frame */
442*4882a593Smuzhiyun skip_this_frame:
443*4882a593Smuzhiyun bp += (length + 3) & ~3;
444*4882a593Smuzhiyun if (bp >= lp->end_dma_buff)
445*4882a593Smuzhiyun bp -= lp->dmasize * 1024;
446*4882a593Smuzhiyun lp->rx_dma_ptr = bp;
447*4882a593Smuzhiyun return;
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun skb_reserve(skb, 2); /* longword align L3 header */
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun if (bp + length > lp->end_dma_buff) {
452*4882a593Smuzhiyun int semi_cnt = lp->end_dma_buff - bp;
453*4882a593Smuzhiyun skb_put_data(skb, bp, semi_cnt);
454*4882a593Smuzhiyun skb_put_data(skb, lp->dma_buff, length - semi_cnt);
455*4882a593Smuzhiyun } else {
456*4882a593Smuzhiyun skb_put_data(skb, bp, length);
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun bp += (length + 3) & ~3;
459*4882a593Smuzhiyun if (bp >= lp->end_dma_buff)
460*4882a593Smuzhiyun bp -= lp->dmasize*1024;
461*4882a593Smuzhiyun lp->rx_dma_ptr = bp;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun cs89_dbg(3, info, "%s: received %d byte DMA packet of type %x\n",
464*4882a593Smuzhiyun dev->name, length,
465*4882a593Smuzhiyun ((skb->data[ETH_ALEN + ETH_ALEN] << 8) |
466*4882a593Smuzhiyun skb->data[ETH_ALEN + ETH_ALEN + 1]));
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun skb->protocol = eth_type_trans(skb, dev);
469*4882a593Smuzhiyun netif_rx(skb);
470*4882a593Smuzhiyun dev->stats.rx_packets++;
471*4882a593Smuzhiyun dev->stats.rx_bytes += length;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
release_dma_buff(struct net_local * lp)474*4882a593Smuzhiyun static void release_dma_buff(struct net_local *lp)
475*4882a593Smuzhiyun {
476*4882a593Smuzhiyun if (lp->dma_buff) {
477*4882a593Smuzhiyun free_pages((unsigned long)(lp->dma_buff),
478*4882a593Smuzhiyun get_order(lp->dmasize * 1024));
479*4882a593Smuzhiyun lp->dma_buff = NULL;
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun #endif /* ALLOW_DMA */
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun static void
control_dc_dc(struct net_device * dev,int on_not_off)486*4882a593Smuzhiyun control_dc_dc(struct net_device *dev, int on_not_off)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
489*4882a593Smuzhiyun unsigned int selfcontrol;
490*4882a593Smuzhiyun unsigned long timenow = jiffies;
491*4882a593Smuzhiyun /* control the DC to DC convertor in the SelfControl register.
492*4882a593Smuzhiyun * Note: This is hooked up to a general purpose pin, might not
493*4882a593Smuzhiyun * always be a DC to DC convertor.
494*4882a593Smuzhiyun */
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun selfcontrol = HCB1_ENBL; /* Enable the HCB1 bit as an output */
497*4882a593Smuzhiyun if (((lp->adapter_cnf & A_CNF_DC_DC_POLARITY) != 0) ^ on_not_off)
498*4882a593Smuzhiyun selfcontrol |= HCB1;
499*4882a593Smuzhiyun else
500*4882a593Smuzhiyun selfcontrol &= ~HCB1;
501*4882a593Smuzhiyun writereg(dev, PP_SelfCTL, selfcontrol);
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun /* Wait for the DC/DC converter to power up - 500ms */
504*4882a593Smuzhiyun while (time_before(jiffies, timenow + HZ))
505*4882a593Smuzhiyun ;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun /* send a test packet - return true if carrier bits are ok */
509*4882a593Smuzhiyun static int
send_test_pkt(struct net_device * dev)510*4882a593Smuzhiyun send_test_pkt(struct net_device *dev)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
513*4882a593Smuzhiyun char test_packet[] = {
514*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
515*4882a593Smuzhiyun 0, 46, /* A 46 in network order */
516*4882a593Smuzhiyun 0, 0, /* DSAP=0 & SSAP=0 fields */
517*4882a593Smuzhiyun 0xf3, 0 /* Control (Test Req + P bit set) */
518*4882a593Smuzhiyun };
519*4882a593Smuzhiyun unsigned long timenow = jiffies;
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun writereg(dev, PP_LineCTL, readreg(dev, PP_LineCTL) | SERIAL_TX_ON);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun memcpy(test_packet, dev->dev_addr, ETH_ALEN);
524*4882a593Smuzhiyun memcpy(test_packet + ETH_ALEN, dev->dev_addr, ETH_ALEN);
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun iowrite16(TX_AFTER_ALL, lp->virt_addr + TX_CMD_PORT);
527*4882a593Smuzhiyun iowrite16(ETH_ZLEN, lp->virt_addr + TX_LEN_PORT);
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun /* Test to see if the chip has allocated memory for the packet */
530*4882a593Smuzhiyun while (time_before(jiffies, timenow + 5))
531*4882a593Smuzhiyun if (readreg(dev, PP_BusST) & READY_FOR_TX_NOW)
532*4882a593Smuzhiyun break;
533*4882a593Smuzhiyun if (time_after_eq(jiffies, timenow + 5))
534*4882a593Smuzhiyun return 0; /* this shouldn't happen */
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun /* Write the contents of the packet */
537*4882a593Smuzhiyun writewords(lp, TX_FRAME_PORT, test_packet, (ETH_ZLEN + 1) >> 1);
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun cs89_dbg(1, debug, "Sending test packet ");
540*4882a593Smuzhiyun /* wait a couple of jiffies for packet to be received */
541*4882a593Smuzhiyun for (timenow = jiffies; time_before(jiffies, timenow + 3);)
542*4882a593Smuzhiyun ;
543*4882a593Smuzhiyun if ((readreg(dev, PP_TxEvent) & TX_SEND_OK_BITS) == TX_OK) {
544*4882a593Smuzhiyun cs89_dbg(1, cont, "succeeded\n");
545*4882a593Smuzhiyun return 1;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun cs89_dbg(1, cont, "failed\n");
548*4882a593Smuzhiyun return 0;
549*4882a593Smuzhiyun }
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun #define DETECTED_NONE 0
552*4882a593Smuzhiyun #define DETECTED_RJ45H 1
553*4882a593Smuzhiyun #define DETECTED_RJ45F 2
554*4882a593Smuzhiyun #define DETECTED_AUI 3
555*4882a593Smuzhiyun #define DETECTED_BNC 4
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun static int
detect_tp(struct net_device * dev)558*4882a593Smuzhiyun detect_tp(struct net_device *dev)
559*4882a593Smuzhiyun {
560*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
561*4882a593Smuzhiyun unsigned long timenow = jiffies;
562*4882a593Smuzhiyun int fdx;
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun cs89_dbg(1, debug, "%s: Attempting TP\n", dev->name);
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun /* If connected to another full duplex capable 10-Base-T card
567*4882a593Smuzhiyun * the link pulses seem to be lost when the auto detect bit in
568*4882a593Smuzhiyun * the LineCTL is set. To overcome this the auto detect bit will
569*4882a593Smuzhiyun * be cleared whilst testing the 10-Base-T interface. This would
570*4882a593Smuzhiyun * not be necessary for the sparrow chip but is simpler to do it
571*4882a593Smuzhiyun * anyway.
572*4882a593Smuzhiyun */
573*4882a593Smuzhiyun writereg(dev, PP_LineCTL, lp->linectl & ~AUI_ONLY);
574*4882a593Smuzhiyun control_dc_dc(dev, 0);
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun /* Delay for the hardware to work out if the TP cable is present
577*4882a593Smuzhiyun * - 150ms
578*4882a593Smuzhiyun */
579*4882a593Smuzhiyun for (timenow = jiffies; time_before(jiffies, timenow + 15);)
580*4882a593Smuzhiyun ;
581*4882a593Smuzhiyun if ((readreg(dev, PP_LineST) & LINK_OK) == 0)
582*4882a593Smuzhiyun return DETECTED_NONE;
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun if (lp->chip_type == CS8900) {
585*4882a593Smuzhiyun switch (lp->force & 0xf0) {
586*4882a593Smuzhiyun #if 0
587*4882a593Smuzhiyun case FORCE_AUTO:
588*4882a593Smuzhiyun pr_info("%s: cs8900 doesn't autonegotiate\n",
589*4882a593Smuzhiyun dev->name);
590*4882a593Smuzhiyun return DETECTED_NONE;
591*4882a593Smuzhiyun #endif
592*4882a593Smuzhiyun /* CS8900 doesn't support AUTO, change to HALF*/
593*4882a593Smuzhiyun case FORCE_AUTO:
594*4882a593Smuzhiyun lp->force &= ~FORCE_AUTO;
595*4882a593Smuzhiyun lp->force |= FORCE_HALF;
596*4882a593Smuzhiyun break;
597*4882a593Smuzhiyun case FORCE_HALF:
598*4882a593Smuzhiyun break;
599*4882a593Smuzhiyun case FORCE_FULL:
600*4882a593Smuzhiyun writereg(dev, PP_TestCTL,
601*4882a593Smuzhiyun readreg(dev, PP_TestCTL) | FDX_8900);
602*4882a593Smuzhiyun break;
603*4882a593Smuzhiyun }
604*4882a593Smuzhiyun fdx = readreg(dev, PP_TestCTL) & FDX_8900;
605*4882a593Smuzhiyun } else {
606*4882a593Smuzhiyun switch (lp->force & 0xf0) {
607*4882a593Smuzhiyun case FORCE_AUTO:
608*4882a593Smuzhiyun lp->auto_neg_cnf = AUTO_NEG_ENABLE;
609*4882a593Smuzhiyun break;
610*4882a593Smuzhiyun case FORCE_HALF:
611*4882a593Smuzhiyun lp->auto_neg_cnf = 0;
612*4882a593Smuzhiyun break;
613*4882a593Smuzhiyun case FORCE_FULL:
614*4882a593Smuzhiyun lp->auto_neg_cnf = RE_NEG_NOW | ALLOW_FDX;
615*4882a593Smuzhiyun break;
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun writereg(dev, PP_AutoNegCTL, lp->auto_neg_cnf & AUTO_NEG_MASK);
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun if ((lp->auto_neg_cnf & AUTO_NEG_BITS) == AUTO_NEG_ENABLE) {
621*4882a593Smuzhiyun pr_info("%s: negotiating duplex...\n", dev->name);
622*4882a593Smuzhiyun while (readreg(dev, PP_AutoNegST) & AUTO_NEG_BUSY) {
623*4882a593Smuzhiyun if (time_after(jiffies, timenow + 4000)) {
624*4882a593Smuzhiyun pr_err("**** Full / half duplex auto-negotiation timed out ****\n");
625*4882a593Smuzhiyun break;
626*4882a593Smuzhiyun }
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun }
629*4882a593Smuzhiyun fdx = readreg(dev, PP_AutoNegST) & FDX_ACTIVE;
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun if (fdx)
632*4882a593Smuzhiyun return DETECTED_RJ45F;
633*4882a593Smuzhiyun else
634*4882a593Smuzhiyun return DETECTED_RJ45H;
635*4882a593Smuzhiyun }
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun static int
detect_bnc(struct net_device * dev)638*4882a593Smuzhiyun detect_bnc(struct net_device *dev)
639*4882a593Smuzhiyun {
640*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun cs89_dbg(1, debug, "%s: Attempting BNC\n", dev->name);
643*4882a593Smuzhiyun control_dc_dc(dev, 1);
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun writereg(dev, PP_LineCTL, (lp->linectl & ~AUTO_AUI_10BASET) | AUI_ONLY);
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun if (send_test_pkt(dev))
648*4882a593Smuzhiyun return DETECTED_BNC;
649*4882a593Smuzhiyun else
650*4882a593Smuzhiyun return DETECTED_NONE;
651*4882a593Smuzhiyun }
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun static int
detect_aui(struct net_device * dev)654*4882a593Smuzhiyun detect_aui(struct net_device *dev)
655*4882a593Smuzhiyun {
656*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun cs89_dbg(1, debug, "%s: Attempting AUI\n", dev->name);
659*4882a593Smuzhiyun control_dc_dc(dev, 0);
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun writereg(dev, PP_LineCTL, (lp->linectl & ~AUTO_AUI_10BASET) | AUI_ONLY);
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun if (send_test_pkt(dev))
664*4882a593Smuzhiyun return DETECTED_AUI;
665*4882a593Smuzhiyun else
666*4882a593Smuzhiyun return DETECTED_NONE;
667*4882a593Smuzhiyun }
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun /* We have a good packet(s), get it/them out of the buffers. */
670*4882a593Smuzhiyun static void
net_rx(struct net_device * dev)671*4882a593Smuzhiyun net_rx(struct net_device *dev)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
674*4882a593Smuzhiyun struct sk_buff *skb;
675*4882a593Smuzhiyun int status, length;
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun status = ioread16(lp->virt_addr + RX_FRAME_PORT);
678*4882a593Smuzhiyun length = ioread16(lp->virt_addr + RX_FRAME_PORT);
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun if ((status & RX_OK) == 0) {
681*4882a593Smuzhiyun count_rx_errors(status, dev);
682*4882a593Smuzhiyun return;
683*4882a593Smuzhiyun }
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun /* Malloc up new buffer. */
686*4882a593Smuzhiyun skb = netdev_alloc_skb(dev, length + 2);
687*4882a593Smuzhiyun if (skb == NULL) {
688*4882a593Smuzhiyun dev->stats.rx_dropped++;
689*4882a593Smuzhiyun return;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun skb_reserve(skb, 2); /* longword align L3 header */
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun readwords(lp, RX_FRAME_PORT, skb_put(skb, length), length >> 1);
694*4882a593Smuzhiyun if (length & 1)
695*4882a593Smuzhiyun skb->data[length-1] = ioread16(lp->virt_addr + RX_FRAME_PORT);
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun cs89_dbg(3, debug, "%s: received %d byte packet of type %x\n",
698*4882a593Smuzhiyun dev->name, length,
699*4882a593Smuzhiyun (skb->data[ETH_ALEN + ETH_ALEN] << 8) |
700*4882a593Smuzhiyun skb->data[ETH_ALEN + ETH_ALEN + 1]);
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun skb->protocol = eth_type_trans(skb, dev);
703*4882a593Smuzhiyun netif_rx(skb);
704*4882a593Smuzhiyun dev->stats.rx_packets++;
705*4882a593Smuzhiyun dev->stats.rx_bytes += length;
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun /* The typical workload of the driver:
709*4882a593Smuzhiyun * Handle the network interface interrupts.
710*4882a593Smuzhiyun */
711*4882a593Smuzhiyun
net_interrupt(int irq,void * dev_id)712*4882a593Smuzhiyun static irqreturn_t net_interrupt(int irq, void *dev_id)
713*4882a593Smuzhiyun {
714*4882a593Smuzhiyun struct net_device *dev = dev_id;
715*4882a593Smuzhiyun struct net_local *lp;
716*4882a593Smuzhiyun int status;
717*4882a593Smuzhiyun int handled = 0;
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun lp = netdev_priv(dev);
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun /* we MUST read all the events out of the ISQ, otherwise we'll never
722*4882a593Smuzhiyun * get interrupted again. As a consequence, we can't have any limit
723*4882a593Smuzhiyun * on the number of times we loop in the interrupt handler. The
724*4882a593Smuzhiyun * hardware guarantees that eventually we'll run out of events. Of
725*4882a593Smuzhiyun * course, if you're on a slow machine, and packets are arriving
726*4882a593Smuzhiyun * faster than you can read them off, you're screwed. Hasta la
727*4882a593Smuzhiyun * vista, baby!
728*4882a593Smuzhiyun */
729*4882a593Smuzhiyun while ((status = ioread16(lp->virt_addr + ISQ_PORT))) {
730*4882a593Smuzhiyun cs89_dbg(4, debug, "%s: event=%04x\n", dev->name, status);
731*4882a593Smuzhiyun handled = 1;
732*4882a593Smuzhiyun switch (status & ISQ_EVENT_MASK) {
733*4882a593Smuzhiyun case ISQ_RECEIVER_EVENT:
734*4882a593Smuzhiyun /* Got a packet(s). */
735*4882a593Smuzhiyun net_rx(dev);
736*4882a593Smuzhiyun break;
737*4882a593Smuzhiyun case ISQ_TRANSMITTER_EVENT:
738*4882a593Smuzhiyun dev->stats.tx_packets++;
739*4882a593Smuzhiyun netif_wake_queue(dev); /* Inform upper layers. */
740*4882a593Smuzhiyun if ((status & (TX_OK |
741*4882a593Smuzhiyun TX_LOST_CRS |
742*4882a593Smuzhiyun TX_SQE_ERROR |
743*4882a593Smuzhiyun TX_LATE_COL |
744*4882a593Smuzhiyun TX_16_COL)) != TX_OK) {
745*4882a593Smuzhiyun if ((status & TX_OK) == 0)
746*4882a593Smuzhiyun dev->stats.tx_errors++;
747*4882a593Smuzhiyun if (status & TX_LOST_CRS)
748*4882a593Smuzhiyun dev->stats.tx_carrier_errors++;
749*4882a593Smuzhiyun if (status & TX_SQE_ERROR)
750*4882a593Smuzhiyun dev->stats.tx_heartbeat_errors++;
751*4882a593Smuzhiyun if (status & TX_LATE_COL)
752*4882a593Smuzhiyun dev->stats.tx_window_errors++;
753*4882a593Smuzhiyun if (status & TX_16_COL)
754*4882a593Smuzhiyun dev->stats.tx_aborted_errors++;
755*4882a593Smuzhiyun }
756*4882a593Smuzhiyun break;
757*4882a593Smuzhiyun case ISQ_BUFFER_EVENT:
758*4882a593Smuzhiyun if (status & READY_FOR_TX) {
759*4882a593Smuzhiyun /* we tried to transmit a packet earlier,
760*4882a593Smuzhiyun * but inexplicably ran out of buffers.
761*4882a593Smuzhiyun * That shouldn't happen since we only ever
762*4882a593Smuzhiyun * load one packet. Shrug. Do the right
763*4882a593Smuzhiyun * thing anyway.
764*4882a593Smuzhiyun */
765*4882a593Smuzhiyun netif_wake_queue(dev); /* Inform upper layers. */
766*4882a593Smuzhiyun }
767*4882a593Smuzhiyun if (status & TX_UNDERRUN) {
768*4882a593Smuzhiyun cs89_dbg(0, err, "%s: transmit underrun\n",
769*4882a593Smuzhiyun dev->name);
770*4882a593Smuzhiyun lp->send_underrun++;
771*4882a593Smuzhiyun if (lp->send_underrun == 3)
772*4882a593Smuzhiyun lp->send_cmd = TX_AFTER_381;
773*4882a593Smuzhiyun else if (lp->send_underrun == 6)
774*4882a593Smuzhiyun lp->send_cmd = TX_AFTER_ALL;
775*4882a593Smuzhiyun /* transmit cycle is done, although
776*4882a593Smuzhiyun * frame wasn't transmitted - this
777*4882a593Smuzhiyun * avoids having to wait for the upper
778*4882a593Smuzhiyun * layers to timeout on us, in the
779*4882a593Smuzhiyun * event of a tx underrun
780*4882a593Smuzhiyun */
781*4882a593Smuzhiyun netif_wake_queue(dev); /* Inform upper layers. */
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun #if ALLOW_DMA
784*4882a593Smuzhiyun if (lp->use_dma && (status & RX_DMA)) {
785*4882a593Smuzhiyun int count = readreg(dev, PP_DmaFrameCnt);
786*4882a593Smuzhiyun while (count) {
787*4882a593Smuzhiyun cs89_dbg(5, debug,
788*4882a593Smuzhiyun "%s: receiving %d DMA frames\n",
789*4882a593Smuzhiyun dev->name, count);
790*4882a593Smuzhiyun if (count > 1)
791*4882a593Smuzhiyun cs89_dbg(2, debug,
792*4882a593Smuzhiyun "%s: receiving %d DMA frames\n",
793*4882a593Smuzhiyun dev->name, count);
794*4882a593Smuzhiyun dma_rx(dev);
795*4882a593Smuzhiyun if (--count == 0)
796*4882a593Smuzhiyun count = readreg(dev, PP_DmaFrameCnt);
797*4882a593Smuzhiyun if (count > 0)
798*4882a593Smuzhiyun cs89_dbg(2, debug,
799*4882a593Smuzhiyun "%s: continuing with %d DMA frames\n",
800*4882a593Smuzhiyun dev->name, count);
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun #endif
804*4882a593Smuzhiyun break;
805*4882a593Smuzhiyun case ISQ_RX_MISS_EVENT:
806*4882a593Smuzhiyun dev->stats.rx_missed_errors += (status >> 6);
807*4882a593Smuzhiyun break;
808*4882a593Smuzhiyun case ISQ_TX_COL_EVENT:
809*4882a593Smuzhiyun dev->stats.collisions += (status >> 6);
810*4882a593Smuzhiyun break;
811*4882a593Smuzhiyun }
812*4882a593Smuzhiyun }
813*4882a593Smuzhiyun return IRQ_RETVAL(handled);
814*4882a593Smuzhiyun }
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun /* Open/initialize the board. This is called (in the current kernel)
817*4882a593Smuzhiyun sometime after booting when the 'ifconfig' program is run.
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun This routine should set everything up anew at each open, even
820*4882a593Smuzhiyun registers that "should" only need to be set once at boot, so that
821*4882a593Smuzhiyun there is non-reboot way to recover if something goes wrong.
822*4882a593Smuzhiyun */
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun /* AKPM: do we need to do any locking here? */
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun static int
net_open(struct net_device * dev)827*4882a593Smuzhiyun net_open(struct net_device *dev)
828*4882a593Smuzhiyun {
829*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
830*4882a593Smuzhiyun int result = 0;
831*4882a593Smuzhiyun int i;
832*4882a593Smuzhiyun int ret;
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun if (dev->irq < 2) {
835*4882a593Smuzhiyun /* Allow interrupts to be generated by the chip */
836*4882a593Smuzhiyun /* Cirrus' release had this: */
837*4882a593Smuzhiyun #if 0
838*4882a593Smuzhiyun writereg(dev, PP_BusCTL, readreg(dev, PP_BusCTL) | ENABLE_IRQ);
839*4882a593Smuzhiyun #endif
840*4882a593Smuzhiyun /* And 2.3.47 had this: */
841*4882a593Smuzhiyun writereg(dev, PP_BusCTL, ENABLE_IRQ | MEMORY_ON);
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun for (i = 2; i < CS8920_NO_INTS; i++) {
844*4882a593Smuzhiyun if ((1 << i) & lp->irq_map) {
845*4882a593Smuzhiyun if (request_irq(i, net_interrupt, 0, dev->name,
846*4882a593Smuzhiyun dev) == 0) {
847*4882a593Smuzhiyun dev->irq = i;
848*4882a593Smuzhiyun write_irq(dev, lp->chip_type, i);
849*4882a593Smuzhiyun /* writereg(dev, PP_BufCFG, GENERATE_SW_INTERRUPT); */
850*4882a593Smuzhiyun break;
851*4882a593Smuzhiyun }
852*4882a593Smuzhiyun }
853*4882a593Smuzhiyun }
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun if (i >= CS8920_NO_INTS) {
856*4882a593Smuzhiyun writereg(dev, PP_BusCTL, 0); /* disable interrupts. */
857*4882a593Smuzhiyun pr_err("can't get an interrupt\n");
858*4882a593Smuzhiyun ret = -EAGAIN;
859*4882a593Smuzhiyun goto bad_out;
860*4882a593Smuzhiyun }
861*4882a593Smuzhiyun } else {
862*4882a593Smuzhiyun #if !defined(CONFIG_CS89x0_PLATFORM)
863*4882a593Smuzhiyun if (((1 << dev->irq) & lp->irq_map) == 0) {
864*4882a593Smuzhiyun pr_err("%s: IRQ %d is not in our map of allowable IRQs, which is %x\n",
865*4882a593Smuzhiyun dev->name, dev->irq, lp->irq_map);
866*4882a593Smuzhiyun ret = -EAGAIN;
867*4882a593Smuzhiyun goto bad_out;
868*4882a593Smuzhiyun }
869*4882a593Smuzhiyun #endif
870*4882a593Smuzhiyun /* FIXME: Cirrus' release had this: */
871*4882a593Smuzhiyun writereg(dev, PP_BusCTL, readreg(dev, PP_BusCTL)|ENABLE_IRQ);
872*4882a593Smuzhiyun /* And 2.3.47 had this: */
873*4882a593Smuzhiyun #if 0
874*4882a593Smuzhiyun writereg(dev, PP_BusCTL, ENABLE_IRQ | MEMORY_ON);
875*4882a593Smuzhiyun #endif
876*4882a593Smuzhiyun write_irq(dev, lp->chip_type, dev->irq);
877*4882a593Smuzhiyun ret = request_irq(dev->irq, net_interrupt, 0, dev->name, dev);
878*4882a593Smuzhiyun if (ret) {
879*4882a593Smuzhiyun pr_err("request_irq(%d) failed\n", dev->irq);
880*4882a593Smuzhiyun goto bad_out;
881*4882a593Smuzhiyun }
882*4882a593Smuzhiyun }
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun #if ALLOW_DMA
885*4882a593Smuzhiyun if (lp->use_dma && (lp->isa_config & ANY_ISA_DMA)) {
886*4882a593Smuzhiyun unsigned long flags;
887*4882a593Smuzhiyun lp->dma_buff = (unsigned char *)__get_dma_pages(GFP_KERNEL,
888*4882a593Smuzhiyun get_order(lp->dmasize * 1024));
889*4882a593Smuzhiyun if (!lp->dma_buff) {
890*4882a593Smuzhiyun pr_err("%s: cannot get %dK memory for DMA\n",
891*4882a593Smuzhiyun dev->name, lp->dmasize);
892*4882a593Smuzhiyun goto release_irq;
893*4882a593Smuzhiyun }
894*4882a593Smuzhiyun cs89_dbg(1, debug, "%s: dma %lx %lx\n",
895*4882a593Smuzhiyun dev->name,
896*4882a593Smuzhiyun (unsigned long)lp->dma_buff,
897*4882a593Smuzhiyun (unsigned long)isa_virt_to_bus(lp->dma_buff));
898*4882a593Smuzhiyun if ((unsigned long)lp->dma_buff >= MAX_DMA_ADDRESS ||
899*4882a593Smuzhiyun !dma_page_eq(lp->dma_buff,
900*4882a593Smuzhiyun lp->dma_buff + lp->dmasize * 1024 - 1)) {
901*4882a593Smuzhiyun pr_err("%s: not usable as DMA buffer\n", dev->name);
902*4882a593Smuzhiyun goto release_irq;
903*4882a593Smuzhiyun }
904*4882a593Smuzhiyun memset(lp->dma_buff, 0, lp->dmasize * 1024); /* Why? */
905*4882a593Smuzhiyun if (request_dma(dev->dma, dev->name)) {
906*4882a593Smuzhiyun pr_err("%s: cannot get dma channel %d\n",
907*4882a593Smuzhiyun dev->name, dev->dma);
908*4882a593Smuzhiyun goto release_irq;
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun write_dma(dev, lp->chip_type, dev->dma);
911*4882a593Smuzhiyun lp->rx_dma_ptr = lp->dma_buff;
912*4882a593Smuzhiyun lp->end_dma_buff = lp->dma_buff + lp->dmasize * 1024;
913*4882a593Smuzhiyun spin_lock_irqsave(&lp->lock, flags);
914*4882a593Smuzhiyun disable_dma(dev->dma);
915*4882a593Smuzhiyun clear_dma_ff(dev->dma);
916*4882a593Smuzhiyun set_dma_mode(dev->dma, DMA_RX_MODE); /* auto_init as well */
917*4882a593Smuzhiyun set_dma_addr(dev->dma, isa_virt_to_bus(lp->dma_buff));
918*4882a593Smuzhiyun set_dma_count(dev->dma, lp->dmasize * 1024);
919*4882a593Smuzhiyun enable_dma(dev->dma);
920*4882a593Smuzhiyun spin_unlock_irqrestore(&lp->lock, flags);
921*4882a593Smuzhiyun }
922*4882a593Smuzhiyun #endif /* ALLOW_DMA */
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun /* set the Ethernet address */
925*4882a593Smuzhiyun for (i = 0; i < ETH_ALEN / 2; i++)
926*4882a593Smuzhiyun writereg(dev, PP_IA + i * 2,
927*4882a593Smuzhiyun (dev->dev_addr[i * 2] |
928*4882a593Smuzhiyun (dev->dev_addr[i * 2 + 1] << 8)));
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun /* while we're testing the interface, leave interrupts disabled */
931*4882a593Smuzhiyun writereg(dev, PP_BusCTL, MEMORY_ON);
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun /* Set the LineCTL quintuplet based on adapter configuration read from EEPROM */
934*4882a593Smuzhiyun if ((lp->adapter_cnf & A_CNF_EXTND_10B_2) &&
935*4882a593Smuzhiyun (lp->adapter_cnf & A_CNF_LOW_RX_SQUELCH))
936*4882a593Smuzhiyun lp->linectl = LOW_RX_SQUELCH;
937*4882a593Smuzhiyun else
938*4882a593Smuzhiyun lp->linectl = 0;
939*4882a593Smuzhiyun
940*4882a593Smuzhiyun /* check to make sure that they have the "right" hardware available */
941*4882a593Smuzhiyun switch (lp->adapter_cnf & A_CNF_MEDIA_TYPE) {
942*4882a593Smuzhiyun case A_CNF_MEDIA_10B_T:
943*4882a593Smuzhiyun result = lp->adapter_cnf & A_CNF_10B_T;
944*4882a593Smuzhiyun break;
945*4882a593Smuzhiyun case A_CNF_MEDIA_AUI:
946*4882a593Smuzhiyun result = lp->adapter_cnf & A_CNF_AUI;
947*4882a593Smuzhiyun break;
948*4882a593Smuzhiyun case A_CNF_MEDIA_10B_2:
949*4882a593Smuzhiyun result = lp->adapter_cnf & A_CNF_10B_2;
950*4882a593Smuzhiyun break;
951*4882a593Smuzhiyun default:
952*4882a593Smuzhiyun result = lp->adapter_cnf & (A_CNF_10B_T |
953*4882a593Smuzhiyun A_CNF_AUI |
954*4882a593Smuzhiyun A_CNF_10B_2);
955*4882a593Smuzhiyun }
956*4882a593Smuzhiyun if (!result) {
957*4882a593Smuzhiyun pr_err("%s: EEPROM is configured for unavailable media\n",
958*4882a593Smuzhiyun dev->name);
959*4882a593Smuzhiyun release_dma:
960*4882a593Smuzhiyun #if ALLOW_DMA
961*4882a593Smuzhiyun free_dma(dev->dma);
962*4882a593Smuzhiyun release_irq:
963*4882a593Smuzhiyun release_dma_buff(lp);
964*4882a593Smuzhiyun #endif
965*4882a593Smuzhiyun writereg(dev, PP_LineCTL,
966*4882a593Smuzhiyun readreg(dev, PP_LineCTL) & ~(SERIAL_TX_ON | SERIAL_RX_ON));
967*4882a593Smuzhiyun free_irq(dev->irq, dev);
968*4882a593Smuzhiyun ret = -EAGAIN;
969*4882a593Smuzhiyun goto bad_out;
970*4882a593Smuzhiyun }
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun /* set the hardware to the configured choice */
973*4882a593Smuzhiyun switch (lp->adapter_cnf & A_CNF_MEDIA_TYPE) {
974*4882a593Smuzhiyun case A_CNF_MEDIA_10B_T:
975*4882a593Smuzhiyun result = detect_tp(dev);
976*4882a593Smuzhiyun if (result == DETECTED_NONE) {
977*4882a593Smuzhiyun pr_warn("%s: 10Base-T (RJ-45) has no cable\n",
978*4882a593Smuzhiyun dev->name);
979*4882a593Smuzhiyun if (lp->auto_neg_cnf & IMM_BIT) /* check "ignore missing media" bit */
980*4882a593Smuzhiyun result = DETECTED_RJ45H; /* Yes! I don't care if I see a link pulse */
981*4882a593Smuzhiyun }
982*4882a593Smuzhiyun break;
983*4882a593Smuzhiyun case A_CNF_MEDIA_AUI:
984*4882a593Smuzhiyun result = detect_aui(dev);
985*4882a593Smuzhiyun if (result == DETECTED_NONE) {
986*4882a593Smuzhiyun pr_warn("%s: 10Base-5 (AUI) has no cable\n", dev->name);
987*4882a593Smuzhiyun if (lp->auto_neg_cnf & IMM_BIT) /* check "ignore missing media" bit */
988*4882a593Smuzhiyun result = DETECTED_AUI; /* Yes! I don't care if I see a carrrier */
989*4882a593Smuzhiyun }
990*4882a593Smuzhiyun break;
991*4882a593Smuzhiyun case A_CNF_MEDIA_10B_2:
992*4882a593Smuzhiyun result = detect_bnc(dev);
993*4882a593Smuzhiyun if (result == DETECTED_NONE) {
994*4882a593Smuzhiyun pr_warn("%s: 10Base-2 (BNC) has no cable\n", dev->name);
995*4882a593Smuzhiyun if (lp->auto_neg_cnf & IMM_BIT) /* check "ignore missing media" bit */
996*4882a593Smuzhiyun result = DETECTED_BNC; /* Yes! I don't care if I can xmit a packet */
997*4882a593Smuzhiyun }
998*4882a593Smuzhiyun break;
999*4882a593Smuzhiyun case A_CNF_MEDIA_AUTO:
1000*4882a593Smuzhiyun writereg(dev, PP_LineCTL, lp->linectl | AUTO_AUI_10BASET);
1001*4882a593Smuzhiyun if (lp->adapter_cnf & A_CNF_10B_T) {
1002*4882a593Smuzhiyun result = detect_tp(dev);
1003*4882a593Smuzhiyun if (result != DETECTED_NONE)
1004*4882a593Smuzhiyun break;
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun if (lp->adapter_cnf & A_CNF_AUI) {
1007*4882a593Smuzhiyun result = detect_aui(dev);
1008*4882a593Smuzhiyun if (result != DETECTED_NONE)
1009*4882a593Smuzhiyun break;
1010*4882a593Smuzhiyun }
1011*4882a593Smuzhiyun if (lp->adapter_cnf & A_CNF_10B_2) {
1012*4882a593Smuzhiyun result = detect_bnc(dev);
1013*4882a593Smuzhiyun if (result != DETECTED_NONE)
1014*4882a593Smuzhiyun break;
1015*4882a593Smuzhiyun }
1016*4882a593Smuzhiyun pr_err("%s: no media detected\n", dev->name);
1017*4882a593Smuzhiyun goto release_dma;
1018*4882a593Smuzhiyun }
1019*4882a593Smuzhiyun switch (result) {
1020*4882a593Smuzhiyun case DETECTED_NONE:
1021*4882a593Smuzhiyun pr_err("%s: no network cable attached to configured media\n",
1022*4882a593Smuzhiyun dev->name);
1023*4882a593Smuzhiyun goto release_dma;
1024*4882a593Smuzhiyun case DETECTED_RJ45H:
1025*4882a593Smuzhiyun pr_info("%s: using half-duplex 10Base-T (RJ-45)\n", dev->name);
1026*4882a593Smuzhiyun break;
1027*4882a593Smuzhiyun case DETECTED_RJ45F:
1028*4882a593Smuzhiyun pr_info("%s: using full-duplex 10Base-T (RJ-45)\n", dev->name);
1029*4882a593Smuzhiyun break;
1030*4882a593Smuzhiyun case DETECTED_AUI:
1031*4882a593Smuzhiyun pr_info("%s: using 10Base-5 (AUI)\n", dev->name);
1032*4882a593Smuzhiyun break;
1033*4882a593Smuzhiyun case DETECTED_BNC:
1034*4882a593Smuzhiyun pr_info("%s: using 10Base-2 (BNC)\n", dev->name);
1035*4882a593Smuzhiyun break;
1036*4882a593Smuzhiyun }
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun /* Turn on both receive and transmit operations */
1039*4882a593Smuzhiyun writereg(dev, PP_LineCTL,
1040*4882a593Smuzhiyun readreg(dev, PP_LineCTL) | SERIAL_RX_ON | SERIAL_TX_ON);
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun /* Receive only error free packets addressed to this card */
1043*4882a593Smuzhiyun lp->rx_mode = 0;
1044*4882a593Smuzhiyun writereg(dev, PP_RxCTL, DEF_RX_ACCEPT);
1045*4882a593Smuzhiyun
1046*4882a593Smuzhiyun lp->curr_rx_cfg = RX_OK_ENBL | RX_CRC_ERROR_ENBL;
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun if (lp->isa_config & STREAM_TRANSFER)
1049*4882a593Smuzhiyun lp->curr_rx_cfg |= RX_STREAM_ENBL;
1050*4882a593Smuzhiyun #if ALLOW_DMA
1051*4882a593Smuzhiyun set_dma_cfg(dev);
1052*4882a593Smuzhiyun #endif
1053*4882a593Smuzhiyun writereg(dev, PP_RxCFG, lp->curr_rx_cfg);
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun writereg(dev, PP_TxCFG, (TX_LOST_CRS_ENBL |
1056*4882a593Smuzhiyun TX_SQE_ERROR_ENBL |
1057*4882a593Smuzhiyun TX_OK_ENBL |
1058*4882a593Smuzhiyun TX_LATE_COL_ENBL |
1059*4882a593Smuzhiyun TX_JBR_ENBL |
1060*4882a593Smuzhiyun TX_ANY_COL_ENBL |
1061*4882a593Smuzhiyun TX_16_COL_ENBL));
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun writereg(dev, PP_BufCFG, (READY_FOR_TX_ENBL |
1064*4882a593Smuzhiyun RX_MISS_COUNT_OVRFLOW_ENBL |
1065*4882a593Smuzhiyun #if ALLOW_DMA
1066*4882a593Smuzhiyun dma_bufcfg(dev) |
1067*4882a593Smuzhiyun #endif
1068*4882a593Smuzhiyun TX_COL_COUNT_OVRFLOW_ENBL |
1069*4882a593Smuzhiyun TX_UNDERRUN_ENBL));
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun /* now that we've got our act together, enable everything */
1072*4882a593Smuzhiyun writereg(dev, PP_BusCTL, (ENABLE_IRQ
1073*4882a593Smuzhiyun | (dev->mem_start ? MEMORY_ON : 0) /* turn memory on */
1074*4882a593Smuzhiyun #if ALLOW_DMA
1075*4882a593Smuzhiyun | dma_busctl(dev)
1076*4882a593Smuzhiyun #endif
1077*4882a593Smuzhiyun ));
1078*4882a593Smuzhiyun netif_start_queue(dev);
1079*4882a593Smuzhiyun cs89_dbg(1, debug, "net_open() succeeded\n");
1080*4882a593Smuzhiyun return 0;
1081*4882a593Smuzhiyun bad_out:
1082*4882a593Smuzhiyun return ret;
1083*4882a593Smuzhiyun }
1084*4882a593Smuzhiyun
1085*4882a593Smuzhiyun /* The inverse routine to net_open(). */
1086*4882a593Smuzhiyun static int
net_close(struct net_device * dev)1087*4882a593Smuzhiyun net_close(struct net_device *dev)
1088*4882a593Smuzhiyun {
1089*4882a593Smuzhiyun #if ALLOW_DMA
1090*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
1091*4882a593Smuzhiyun #endif
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun netif_stop_queue(dev);
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun writereg(dev, PP_RxCFG, 0);
1096*4882a593Smuzhiyun writereg(dev, PP_TxCFG, 0);
1097*4882a593Smuzhiyun writereg(dev, PP_BufCFG, 0);
1098*4882a593Smuzhiyun writereg(dev, PP_BusCTL, 0);
1099*4882a593Smuzhiyun
1100*4882a593Smuzhiyun free_irq(dev->irq, dev);
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun #if ALLOW_DMA
1103*4882a593Smuzhiyun if (lp->use_dma && lp->dma) {
1104*4882a593Smuzhiyun free_dma(dev->dma);
1105*4882a593Smuzhiyun release_dma_buff(lp);
1106*4882a593Smuzhiyun }
1107*4882a593Smuzhiyun #endif
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun /* Update the statistics here. */
1110*4882a593Smuzhiyun return 0;
1111*4882a593Smuzhiyun }
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun /* Get the current statistics.
1114*4882a593Smuzhiyun * This may be called with the card open or closed.
1115*4882a593Smuzhiyun */
1116*4882a593Smuzhiyun static struct net_device_stats *
net_get_stats(struct net_device * dev)1117*4882a593Smuzhiyun net_get_stats(struct net_device *dev)
1118*4882a593Smuzhiyun {
1119*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
1120*4882a593Smuzhiyun unsigned long flags;
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun spin_lock_irqsave(&lp->lock, flags);
1123*4882a593Smuzhiyun /* Update the statistics from the device registers. */
1124*4882a593Smuzhiyun dev->stats.rx_missed_errors += (readreg(dev, PP_RxMiss) >> 6);
1125*4882a593Smuzhiyun dev->stats.collisions += (readreg(dev, PP_TxCol) >> 6);
1126*4882a593Smuzhiyun spin_unlock_irqrestore(&lp->lock, flags);
1127*4882a593Smuzhiyun
1128*4882a593Smuzhiyun return &dev->stats;
1129*4882a593Smuzhiyun }
1130*4882a593Smuzhiyun
net_timeout(struct net_device * dev,unsigned int txqueue)1131*4882a593Smuzhiyun static void net_timeout(struct net_device *dev, unsigned int txqueue)
1132*4882a593Smuzhiyun {
1133*4882a593Smuzhiyun /* If we get here, some higher level has decided we are broken.
1134*4882a593Smuzhiyun There should really be a "kick me" function call instead. */
1135*4882a593Smuzhiyun cs89_dbg(0, err, "%s: transmit timed out, %s?\n",
1136*4882a593Smuzhiyun dev->name,
1137*4882a593Smuzhiyun tx_done(dev) ? "IRQ conflict" : "network cable problem");
1138*4882a593Smuzhiyun /* Try to restart the adaptor. */
1139*4882a593Smuzhiyun netif_wake_queue(dev);
1140*4882a593Smuzhiyun }
1141*4882a593Smuzhiyun
net_send_packet(struct sk_buff * skb,struct net_device * dev)1142*4882a593Smuzhiyun static netdev_tx_t net_send_packet(struct sk_buff *skb, struct net_device *dev)
1143*4882a593Smuzhiyun {
1144*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
1145*4882a593Smuzhiyun unsigned long flags;
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun cs89_dbg(3, debug, "%s: sent %d byte packet of type %x\n",
1148*4882a593Smuzhiyun dev->name, skb->len,
1149*4882a593Smuzhiyun ((skb->data[ETH_ALEN + ETH_ALEN] << 8) |
1150*4882a593Smuzhiyun skb->data[ETH_ALEN + ETH_ALEN + 1]));
1151*4882a593Smuzhiyun
1152*4882a593Smuzhiyun /* keep the upload from being interrupted, since we
1153*4882a593Smuzhiyun * ask the chip to start transmitting before the
1154*4882a593Smuzhiyun * whole packet has been completely uploaded.
1155*4882a593Smuzhiyun */
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun spin_lock_irqsave(&lp->lock, flags);
1158*4882a593Smuzhiyun netif_stop_queue(dev);
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun /* initiate a transmit sequence */
1161*4882a593Smuzhiyun iowrite16(lp->send_cmd, lp->virt_addr + TX_CMD_PORT);
1162*4882a593Smuzhiyun iowrite16(skb->len, lp->virt_addr + TX_LEN_PORT);
1163*4882a593Smuzhiyun
1164*4882a593Smuzhiyun /* Test to see if the chip has allocated memory for the packet */
1165*4882a593Smuzhiyun if ((readreg(dev, PP_BusST) & READY_FOR_TX_NOW) == 0) {
1166*4882a593Smuzhiyun /* Gasp! It hasn't. But that shouldn't happen since
1167*4882a593Smuzhiyun * we're waiting for TxOk, so return 1 and requeue this packet.
1168*4882a593Smuzhiyun */
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun spin_unlock_irqrestore(&lp->lock, flags);
1171*4882a593Smuzhiyun cs89_dbg(0, err, "Tx buffer not free!\n");
1172*4882a593Smuzhiyun return NETDEV_TX_BUSY;
1173*4882a593Smuzhiyun }
1174*4882a593Smuzhiyun /* Write the contents of the packet */
1175*4882a593Smuzhiyun writewords(lp, TX_FRAME_PORT, skb->data, (skb->len + 1) >> 1);
1176*4882a593Smuzhiyun spin_unlock_irqrestore(&lp->lock, flags);
1177*4882a593Smuzhiyun dev->stats.tx_bytes += skb->len;
1178*4882a593Smuzhiyun dev_consume_skb_any(skb);
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun /* We DO NOT call netif_wake_queue() here.
1181*4882a593Smuzhiyun * We also DO NOT call netif_start_queue().
1182*4882a593Smuzhiyun *
1183*4882a593Smuzhiyun * Either of these would cause another bottom half run through
1184*4882a593Smuzhiyun * net_send_packet() before this packet has fully gone out.
1185*4882a593Smuzhiyun * That causes us to hit the "Gasp!" above and the send is rescheduled.
1186*4882a593Smuzhiyun * it runs like a dog. We just return and wait for the Tx completion
1187*4882a593Smuzhiyun * interrupt handler to restart the netdevice layer
1188*4882a593Smuzhiyun */
1189*4882a593Smuzhiyun
1190*4882a593Smuzhiyun return NETDEV_TX_OK;
1191*4882a593Smuzhiyun }
1192*4882a593Smuzhiyun
set_multicast_list(struct net_device * dev)1193*4882a593Smuzhiyun static void set_multicast_list(struct net_device *dev)
1194*4882a593Smuzhiyun {
1195*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
1196*4882a593Smuzhiyun unsigned long flags;
1197*4882a593Smuzhiyun u16 cfg;
1198*4882a593Smuzhiyun
1199*4882a593Smuzhiyun spin_lock_irqsave(&lp->lock, flags);
1200*4882a593Smuzhiyun if (dev->flags & IFF_PROMISC)
1201*4882a593Smuzhiyun lp->rx_mode = RX_ALL_ACCEPT;
1202*4882a593Smuzhiyun else if ((dev->flags & IFF_ALLMULTI) || !netdev_mc_empty(dev))
1203*4882a593Smuzhiyun /* The multicast-accept list is initialized to accept-all,
1204*4882a593Smuzhiyun * and we rely on higher-level filtering for now.
1205*4882a593Smuzhiyun */
1206*4882a593Smuzhiyun lp->rx_mode = RX_MULTCAST_ACCEPT;
1207*4882a593Smuzhiyun else
1208*4882a593Smuzhiyun lp->rx_mode = 0;
1209*4882a593Smuzhiyun
1210*4882a593Smuzhiyun writereg(dev, PP_RxCTL, DEF_RX_ACCEPT | lp->rx_mode);
1211*4882a593Smuzhiyun
1212*4882a593Smuzhiyun /* in promiscuous mode, we accept errored packets,
1213*4882a593Smuzhiyun * so we have to enable interrupts on them also
1214*4882a593Smuzhiyun */
1215*4882a593Smuzhiyun cfg = lp->curr_rx_cfg;
1216*4882a593Smuzhiyun if (lp->rx_mode == RX_ALL_ACCEPT)
1217*4882a593Smuzhiyun cfg |= RX_CRC_ERROR_ENBL | RX_RUNT_ENBL | RX_EXTRA_DATA_ENBL;
1218*4882a593Smuzhiyun writereg(dev, PP_RxCFG, cfg);
1219*4882a593Smuzhiyun spin_unlock_irqrestore(&lp->lock, flags);
1220*4882a593Smuzhiyun }
1221*4882a593Smuzhiyun
set_mac_address(struct net_device * dev,void * p)1222*4882a593Smuzhiyun static int set_mac_address(struct net_device *dev, void *p)
1223*4882a593Smuzhiyun {
1224*4882a593Smuzhiyun int i;
1225*4882a593Smuzhiyun struct sockaddr *addr = p;
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun if (netif_running(dev))
1228*4882a593Smuzhiyun return -EBUSY;
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1231*4882a593Smuzhiyun
1232*4882a593Smuzhiyun cs89_dbg(0, debug, "%s: Setting MAC address to %pM\n",
1233*4882a593Smuzhiyun dev->name, dev->dev_addr);
1234*4882a593Smuzhiyun
1235*4882a593Smuzhiyun /* set the Ethernet address */
1236*4882a593Smuzhiyun for (i = 0; i < ETH_ALEN / 2; i++)
1237*4882a593Smuzhiyun writereg(dev, PP_IA + i * 2,
1238*4882a593Smuzhiyun (dev->dev_addr[i * 2] |
1239*4882a593Smuzhiyun (dev->dev_addr[i * 2 + 1] << 8)));
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun return 0;
1242*4882a593Smuzhiyun }
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
1245*4882a593Smuzhiyun /*
1246*4882a593Smuzhiyun * Polling receive - used by netconsole and other diagnostic tools
1247*4882a593Smuzhiyun * to allow network i/o with interrupts disabled.
1248*4882a593Smuzhiyun */
net_poll_controller(struct net_device * dev)1249*4882a593Smuzhiyun static void net_poll_controller(struct net_device *dev)
1250*4882a593Smuzhiyun {
1251*4882a593Smuzhiyun disable_irq(dev->irq);
1252*4882a593Smuzhiyun net_interrupt(dev->irq, dev);
1253*4882a593Smuzhiyun enable_irq(dev->irq);
1254*4882a593Smuzhiyun }
1255*4882a593Smuzhiyun #endif
1256*4882a593Smuzhiyun
1257*4882a593Smuzhiyun static const struct net_device_ops net_ops = {
1258*4882a593Smuzhiyun .ndo_open = net_open,
1259*4882a593Smuzhiyun .ndo_stop = net_close,
1260*4882a593Smuzhiyun .ndo_tx_timeout = net_timeout,
1261*4882a593Smuzhiyun .ndo_start_xmit = net_send_packet,
1262*4882a593Smuzhiyun .ndo_get_stats = net_get_stats,
1263*4882a593Smuzhiyun .ndo_set_rx_mode = set_multicast_list,
1264*4882a593Smuzhiyun .ndo_set_mac_address = set_mac_address,
1265*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
1266*4882a593Smuzhiyun .ndo_poll_controller = net_poll_controller,
1267*4882a593Smuzhiyun #endif
1268*4882a593Smuzhiyun .ndo_validate_addr = eth_validate_addr,
1269*4882a593Smuzhiyun };
1270*4882a593Smuzhiyun
reset_chip(struct net_device * dev)1271*4882a593Smuzhiyun static void __init reset_chip(struct net_device *dev)
1272*4882a593Smuzhiyun {
1273*4882a593Smuzhiyun #if !defined(CONFIG_MACH_MX31ADS)
1274*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
1275*4882a593Smuzhiyun unsigned long reset_start_time;
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun writereg(dev, PP_SelfCTL, readreg(dev, PP_SelfCTL) | POWER_ON_RESET);
1278*4882a593Smuzhiyun
1279*4882a593Smuzhiyun /* wait 30 ms */
1280*4882a593Smuzhiyun msleep(30);
1281*4882a593Smuzhiyun
1282*4882a593Smuzhiyun if (lp->chip_type != CS8900) {
1283*4882a593Smuzhiyun /* Hardware problem requires PNP registers to be reconfigured after a reset */
1284*4882a593Smuzhiyun iowrite16(PP_CS8920_ISAINT, lp->virt_addr + ADD_PORT);
1285*4882a593Smuzhiyun iowrite8(dev->irq, lp->virt_addr + DATA_PORT);
1286*4882a593Smuzhiyun iowrite8(0, lp->virt_addr + DATA_PORT + 1);
1287*4882a593Smuzhiyun
1288*4882a593Smuzhiyun iowrite16(PP_CS8920_ISAMemB, lp->virt_addr + ADD_PORT);
1289*4882a593Smuzhiyun iowrite8((dev->mem_start >> 16) & 0xff,
1290*4882a593Smuzhiyun lp->virt_addr + DATA_PORT);
1291*4882a593Smuzhiyun iowrite8((dev->mem_start >> 8) & 0xff,
1292*4882a593Smuzhiyun lp->virt_addr + DATA_PORT + 1);
1293*4882a593Smuzhiyun }
1294*4882a593Smuzhiyun
1295*4882a593Smuzhiyun /* Wait until the chip is reset */
1296*4882a593Smuzhiyun reset_start_time = jiffies;
1297*4882a593Smuzhiyun while ((readreg(dev, PP_SelfST) & INIT_DONE) == 0 &&
1298*4882a593Smuzhiyun time_before(jiffies, reset_start_time + 2))
1299*4882a593Smuzhiyun ;
1300*4882a593Smuzhiyun #endif /* !CONFIG_MACH_MX31ADS */
1301*4882a593Smuzhiyun }
1302*4882a593Smuzhiyun
1303*4882a593Smuzhiyun /* This is the real probe routine.
1304*4882a593Smuzhiyun * Linux has a history of friendly device probes on the ISA bus.
1305*4882a593Smuzhiyun * A good device probes avoids doing writes, and
1306*4882a593Smuzhiyun * verifies that the correct device exists and functions.
1307*4882a593Smuzhiyun * Return 0 on success.
1308*4882a593Smuzhiyun */
1309*4882a593Smuzhiyun static int __init
cs89x0_probe1(struct net_device * dev,void __iomem * ioaddr,int modular)1310*4882a593Smuzhiyun cs89x0_probe1(struct net_device *dev, void __iomem *ioaddr, int modular)
1311*4882a593Smuzhiyun {
1312*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
1313*4882a593Smuzhiyun int i;
1314*4882a593Smuzhiyun int tmp;
1315*4882a593Smuzhiyun unsigned rev_type = 0;
1316*4882a593Smuzhiyun int eeprom_buff[CHKSUM_LEN];
1317*4882a593Smuzhiyun int retval;
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun /* Initialize the device structure. */
1320*4882a593Smuzhiyun if (!modular) {
1321*4882a593Smuzhiyun memset(lp, 0, sizeof(*lp));
1322*4882a593Smuzhiyun spin_lock_init(&lp->lock);
1323*4882a593Smuzhiyun #ifndef MODULE
1324*4882a593Smuzhiyun #if ALLOW_DMA
1325*4882a593Smuzhiyun if (g_cs89x0_dma) {
1326*4882a593Smuzhiyun lp->use_dma = 1;
1327*4882a593Smuzhiyun lp->dma = g_cs89x0_dma;
1328*4882a593Smuzhiyun lp->dmasize = 16; /* Could make this an option... */
1329*4882a593Smuzhiyun }
1330*4882a593Smuzhiyun #endif
1331*4882a593Smuzhiyun lp->force = g_cs89x0_media__force;
1332*4882a593Smuzhiyun #endif
1333*4882a593Smuzhiyun }
1334*4882a593Smuzhiyun
1335*4882a593Smuzhiyun pr_debug("PP_addr at %p[%x]: 0x%x\n",
1336*4882a593Smuzhiyun ioaddr, ADD_PORT, ioread16(ioaddr + ADD_PORT));
1337*4882a593Smuzhiyun iowrite16(PP_ChipID, ioaddr + ADD_PORT);
1338*4882a593Smuzhiyun
1339*4882a593Smuzhiyun tmp = ioread16(ioaddr + DATA_PORT);
1340*4882a593Smuzhiyun if (tmp != CHIP_EISA_ID_SIG) {
1341*4882a593Smuzhiyun pr_debug("%s: incorrect signature at %p[%x]: 0x%x!="
1342*4882a593Smuzhiyun CHIP_EISA_ID_SIG_STR "\n",
1343*4882a593Smuzhiyun dev->name, ioaddr, DATA_PORT, tmp);
1344*4882a593Smuzhiyun retval = -ENODEV;
1345*4882a593Smuzhiyun goto out1;
1346*4882a593Smuzhiyun }
1347*4882a593Smuzhiyun
1348*4882a593Smuzhiyun lp->virt_addr = ioaddr;
1349*4882a593Smuzhiyun
1350*4882a593Smuzhiyun /* get the chip type */
1351*4882a593Smuzhiyun rev_type = readreg(dev, PRODUCT_ID_ADD);
1352*4882a593Smuzhiyun lp->chip_type = rev_type & ~REVISON_BITS;
1353*4882a593Smuzhiyun lp->chip_revision = ((rev_type & REVISON_BITS) >> 8) + 'A';
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun /* Check the chip type and revision in order to set the correct
1356*4882a593Smuzhiyun * send command. CS8920 revision C and CS8900 revision F can use
1357*4882a593Smuzhiyun * the faster send.
1358*4882a593Smuzhiyun */
1359*4882a593Smuzhiyun lp->send_cmd = TX_AFTER_381;
1360*4882a593Smuzhiyun if (lp->chip_type == CS8900 && lp->chip_revision >= 'F')
1361*4882a593Smuzhiyun lp->send_cmd = TX_NOW;
1362*4882a593Smuzhiyun if (lp->chip_type != CS8900 && lp->chip_revision >= 'C')
1363*4882a593Smuzhiyun lp->send_cmd = TX_NOW;
1364*4882a593Smuzhiyun
1365*4882a593Smuzhiyun pr_info_once("%s\n", version);
1366*4882a593Smuzhiyun
1367*4882a593Smuzhiyun pr_info("%s: cs89%c0%s rev %c found at %p ",
1368*4882a593Smuzhiyun dev->name,
1369*4882a593Smuzhiyun lp->chip_type == CS8900 ? '0' : '2',
1370*4882a593Smuzhiyun lp->chip_type == CS8920M ? "M" : "",
1371*4882a593Smuzhiyun lp->chip_revision,
1372*4882a593Smuzhiyun lp->virt_addr);
1373*4882a593Smuzhiyun
1374*4882a593Smuzhiyun reset_chip(dev);
1375*4882a593Smuzhiyun
1376*4882a593Smuzhiyun /* Here we read the current configuration of the chip.
1377*4882a593Smuzhiyun * If there is no Extended EEPROM then the idea is to not disturb
1378*4882a593Smuzhiyun * the chip configuration, it should have been correctly setup by
1379*4882a593Smuzhiyun * automatic EEPROM read on reset. So, if the chip says it read
1380*4882a593Smuzhiyun * the EEPROM the driver will always do *something* instead of
1381*4882a593Smuzhiyun * complain that adapter_cnf is 0.
1382*4882a593Smuzhiyun */
1383*4882a593Smuzhiyun
1384*4882a593Smuzhiyun if ((readreg(dev, PP_SelfST) & (EEPROM_OK | EEPROM_PRESENT)) ==
1385*4882a593Smuzhiyun (EEPROM_OK | EEPROM_PRESENT)) {
1386*4882a593Smuzhiyun /* Load the MAC. */
1387*4882a593Smuzhiyun for (i = 0; i < ETH_ALEN / 2; i++) {
1388*4882a593Smuzhiyun unsigned int Addr;
1389*4882a593Smuzhiyun Addr = readreg(dev, PP_IA + i * 2);
1390*4882a593Smuzhiyun dev->dev_addr[i * 2] = Addr & 0xFF;
1391*4882a593Smuzhiyun dev->dev_addr[i * 2 + 1] = Addr >> 8;
1392*4882a593Smuzhiyun }
1393*4882a593Smuzhiyun
1394*4882a593Smuzhiyun /* Load the Adapter Configuration.
1395*4882a593Smuzhiyun * Note: Barring any more specific information from some
1396*4882a593Smuzhiyun * other source (ie EEPROM+Schematics), we would not know
1397*4882a593Smuzhiyun * how to operate a 10Base2 interface on the AUI port.
1398*4882a593Smuzhiyun * However, since we do read the status of HCB1 and use
1399*4882a593Smuzhiyun * settings that always result in calls to control_dc_dc(dev,0)
1400*4882a593Smuzhiyun * a BNC interface should work if the enable pin
1401*4882a593Smuzhiyun * (dc/dc converter) is on HCB1.
1402*4882a593Smuzhiyun * It will be called AUI however.
1403*4882a593Smuzhiyun */
1404*4882a593Smuzhiyun
1405*4882a593Smuzhiyun lp->adapter_cnf = 0;
1406*4882a593Smuzhiyun i = readreg(dev, PP_LineCTL);
1407*4882a593Smuzhiyun /* Preserve the setting of the HCB1 pin. */
1408*4882a593Smuzhiyun if ((i & (HCB1 | HCB1_ENBL)) == (HCB1 | HCB1_ENBL))
1409*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_DC_DC_POLARITY;
1410*4882a593Smuzhiyun /* Save the sqelch bit */
1411*4882a593Smuzhiyun if ((i & LOW_RX_SQUELCH) == LOW_RX_SQUELCH)
1412*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_EXTND_10B_2 | A_CNF_LOW_RX_SQUELCH;
1413*4882a593Smuzhiyun /* Check if the card is in 10Base-t only mode */
1414*4882a593Smuzhiyun if ((i & (AUI_ONLY | AUTO_AUI_10BASET)) == 0)
1415*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_10B_T | A_CNF_MEDIA_10B_T;
1416*4882a593Smuzhiyun /* Check if the card is in AUI only mode */
1417*4882a593Smuzhiyun if ((i & (AUI_ONLY | AUTO_AUI_10BASET)) == AUI_ONLY)
1418*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_AUI | A_CNF_MEDIA_AUI;
1419*4882a593Smuzhiyun /* Check if the card is in Auto mode. */
1420*4882a593Smuzhiyun if ((i & (AUI_ONLY | AUTO_AUI_10BASET)) == AUTO_AUI_10BASET)
1421*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_AUI | A_CNF_10B_T |
1422*4882a593Smuzhiyun A_CNF_MEDIA_AUI | A_CNF_MEDIA_10B_T | A_CNF_MEDIA_AUTO;
1423*4882a593Smuzhiyun
1424*4882a593Smuzhiyun cs89_dbg(1, info, "%s: PP_LineCTL=0x%x, adapter_cnf=0x%x\n",
1425*4882a593Smuzhiyun dev->name, i, lp->adapter_cnf);
1426*4882a593Smuzhiyun
1427*4882a593Smuzhiyun /* IRQ. Other chips already probe, see below. */
1428*4882a593Smuzhiyun if (lp->chip_type == CS8900)
1429*4882a593Smuzhiyun lp->isa_config = readreg(dev, PP_CS8900_ISAINT) & INT_NO_MASK;
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun pr_cont("[Cirrus EEPROM] ");
1432*4882a593Smuzhiyun }
1433*4882a593Smuzhiyun
1434*4882a593Smuzhiyun pr_cont("\n");
1435*4882a593Smuzhiyun
1436*4882a593Smuzhiyun /* First check to see if an EEPROM is attached. */
1437*4882a593Smuzhiyun
1438*4882a593Smuzhiyun if ((readreg(dev, PP_SelfST) & EEPROM_PRESENT) == 0)
1439*4882a593Smuzhiyun pr_warn("No EEPROM, relying on command line....\n");
1440*4882a593Smuzhiyun else if (get_eeprom_data(dev, START_EEPROM_DATA, CHKSUM_LEN, eeprom_buff) < 0) {
1441*4882a593Smuzhiyun pr_warn("EEPROM read failed, relying on command line\n");
1442*4882a593Smuzhiyun } else if (get_eeprom_cksum(START_EEPROM_DATA, CHKSUM_LEN, eeprom_buff) < 0) {
1443*4882a593Smuzhiyun /* Check if the chip was able to read its own configuration starting
1444*4882a593Smuzhiyun at 0 in the EEPROM*/
1445*4882a593Smuzhiyun if ((readreg(dev, PP_SelfST) & (EEPROM_OK | EEPROM_PRESENT)) !=
1446*4882a593Smuzhiyun (EEPROM_OK | EEPROM_PRESENT))
1447*4882a593Smuzhiyun pr_warn("Extended EEPROM checksum bad and no Cirrus EEPROM, relying on command line\n");
1448*4882a593Smuzhiyun
1449*4882a593Smuzhiyun } else {
1450*4882a593Smuzhiyun /* This reads an extended EEPROM that is not documented
1451*4882a593Smuzhiyun * in the CS8900 datasheet.
1452*4882a593Smuzhiyun */
1453*4882a593Smuzhiyun
1454*4882a593Smuzhiyun /* get transmission control word but keep the autonegotiation bits */
1455*4882a593Smuzhiyun if (!lp->auto_neg_cnf)
1456*4882a593Smuzhiyun lp->auto_neg_cnf = eeprom_buff[AUTO_NEG_CNF_OFFSET / 2];
1457*4882a593Smuzhiyun /* Store adapter configuration */
1458*4882a593Smuzhiyun if (!lp->adapter_cnf)
1459*4882a593Smuzhiyun lp->adapter_cnf = eeprom_buff[ADAPTER_CNF_OFFSET / 2];
1460*4882a593Smuzhiyun /* Store ISA configuration */
1461*4882a593Smuzhiyun lp->isa_config = eeprom_buff[ISA_CNF_OFFSET / 2];
1462*4882a593Smuzhiyun dev->mem_start = eeprom_buff[PACKET_PAGE_OFFSET / 2] << 8;
1463*4882a593Smuzhiyun
1464*4882a593Smuzhiyun /* eeprom_buff has 32-bit ints, so we can't just memcpy it */
1465*4882a593Smuzhiyun /* store the initial memory base address */
1466*4882a593Smuzhiyun for (i = 0; i < ETH_ALEN / 2; i++) {
1467*4882a593Smuzhiyun dev->dev_addr[i * 2] = eeprom_buff[i];
1468*4882a593Smuzhiyun dev->dev_addr[i * 2 + 1] = eeprom_buff[i] >> 8;
1469*4882a593Smuzhiyun }
1470*4882a593Smuzhiyun cs89_dbg(1, debug, "%s: new adapter_cnf: 0x%x\n",
1471*4882a593Smuzhiyun dev->name, lp->adapter_cnf);
1472*4882a593Smuzhiyun }
1473*4882a593Smuzhiyun
1474*4882a593Smuzhiyun /* allow them to force multiple transceivers. If they force multiple, autosense */
1475*4882a593Smuzhiyun {
1476*4882a593Smuzhiyun int count = 0;
1477*4882a593Smuzhiyun if (lp->force & FORCE_RJ45) {
1478*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_10B_T;
1479*4882a593Smuzhiyun count++;
1480*4882a593Smuzhiyun }
1481*4882a593Smuzhiyun if (lp->force & FORCE_AUI) {
1482*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_AUI;
1483*4882a593Smuzhiyun count++;
1484*4882a593Smuzhiyun }
1485*4882a593Smuzhiyun if (lp->force & FORCE_BNC) {
1486*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_10B_2;
1487*4882a593Smuzhiyun count++;
1488*4882a593Smuzhiyun }
1489*4882a593Smuzhiyun if (count > 1)
1490*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_MEDIA_AUTO;
1491*4882a593Smuzhiyun else if (lp->force & FORCE_RJ45)
1492*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_MEDIA_10B_T;
1493*4882a593Smuzhiyun else if (lp->force & FORCE_AUI)
1494*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_MEDIA_AUI;
1495*4882a593Smuzhiyun else if (lp->force & FORCE_BNC)
1496*4882a593Smuzhiyun lp->adapter_cnf |= A_CNF_MEDIA_10B_2;
1497*4882a593Smuzhiyun }
1498*4882a593Smuzhiyun
1499*4882a593Smuzhiyun cs89_dbg(1, debug, "%s: after force 0x%x, adapter_cnf=0x%x\n",
1500*4882a593Smuzhiyun dev->name, lp->force, lp->adapter_cnf);
1501*4882a593Smuzhiyun
1502*4882a593Smuzhiyun /* FIXME: We don't let you set dc-dc polarity or low RX squelch from the command line: add it here */
1503*4882a593Smuzhiyun
1504*4882a593Smuzhiyun /* FIXME: We don't let you set the IMM bit from the command line: add it to lp->auto_neg_cnf here */
1505*4882a593Smuzhiyun
1506*4882a593Smuzhiyun /* FIXME: we don't set the Ethernet address on the command line. Use
1507*4882a593Smuzhiyun * ifconfig IFACE hw ether AABBCCDDEEFF
1508*4882a593Smuzhiyun */
1509*4882a593Smuzhiyun
1510*4882a593Smuzhiyun pr_info("media %s%s%s",
1511*4882a593Smuzhiyun (lp->adapter_cnf & A_CNF_10B_T) ? "RJ-45," : "",
1512*4882a593Smuzhiyun (lp->adapter_cnf & A_CNF_AUI) ? "AUI," : "",
1513*4882a593Smuzhiyun (lp->adapter_cnf & A_CNF_10B_2) ? "BNC," : "");
1514*4882a593Smuzhiyun
1515*4882a593Smuzhiyun lp->irq_map = 0xffff;
1516*4882a593Smuzhiyun
1517*4882a593Smuzhiyun /* If this is a CS8900 then no pnp soft */
1518*4882a593Smuzhiyun if (lp->chip_type != CS8900 &&
1519*4882a593Smuzhiyun /* Check if the ISA IRQ has been set */
1520*4882a593Smuzhiyun (i = readreg(dev, PP_CS8920_ISAINT) & 0xff,
1521*4882a593Smuzhiyun (i != 0 && i < CS8920_NO_INTS))) {
1522*4882a593Smuzhiyun if (!dev->irq)
1523*4882a593Smuzhiyun dev->irq = i;
1524*4882a593Smuzhiyun } else {
1525*4882a593Smuzhiyun i = lp->isa_config & INT_NO_MASK;
1526*4882a593Smuzhiyun #ifndef CONFIG_CS89x0_PLATFORM
1527*4882a593Smuzhiyun if (lp->chip_type == CS8900) {
1528*4882a593Smuzhiyun /* Translate the IRQ using the IRQ mapping table. */
1529*4882a593Smuzhiyun if (i >= ARRAY_SIZE(cs8900_irq_map))
1530*4882a593Smuzhiyun pr_err("invalid ISA interrupt number %d\n", i);
1531*4882a593Smuzhiyun else
1532*4882a593Smuzhiyun i = cs8900_irq_map[i];
1533*4882a593Smuzhiyun
1534*4882a593Smuzhiyun lp->irq_map = CS8900_IRQ_MAP; /* fixed IRQ map for CS8900 */
1535*4882a593Smuzhiyun } else {
1536*4882a593Smuzhiyun int irq_map_buff[IRQ_MAP_LEN/2];
1537*4882a593Smuzhiyun
1538*4882a593Smuzhiyun if (get_eeprom_data(dev, IRQ_MAP_EEPROM_DATA,
1539*4882a593Smuzhiyun IRQ_MAP_LEN / 2,
1540*4882a593Smuzhiyun irq_map_buff) >= 0) {
1541*4882a593Smuzhiyun if ((irq_map_buff[0] & 0xff) == PNP_IRQ_FRMT)
1542*4882a593Smuzhiyun lp->irq_map = ((irq_map_buff[0] >> 8) |
1543*4882a593Smuzhiyun (irq_map_buff[1] << 8));
1544*4882a593Smuzhiyun }
1545*4882a593Smuzhiyun }
1546*4882a593Smuzhiyun #endif
1547*4882a593Smuzhiyun if (!dev->irq)
1548*4882a593Smuzhiyun dev->irq = i;
1549*4882a593Smuzhiyun }
1550*4882a593Smuzhiyun
1551*4882a593Smuzhiyun pr_cont(" IRQ %d", dev->irq);
1552*4882a593Smuzhiyun
1553*4882a593Smuzhiyun #if ALLOW_DMA
1554*4882a593Smuzhiyun if (lp->use_dma) {
1555*4882a593Smuzhiyun get_dma_channel(dev);
1556*4882a593Smuzhiyun pr_cont(", DMA %d", dev->dma);
1557*4882a593Smuzhiyun } else
1558*4882a593Smuzhiyun #endif
1559*4882a593Smuzhiyun pr_cont(", programmed I/O");
1560*4882a593Smuzhiyun
1561*4882a593Smuzhiyun /* print the ethernet address. */
1562*4882a593Smuzhiyun pr_cont(", MAC %pM\n", dev->dev_addr);
1563*4882a593Smuzhiyun
1564*4882a593Smuzhiyun dev->netdev_ops = &net_ops;
1565*4882a593Smuzhiyun dev->watchdog_timeo = HZ;
1566*4882a593Smuzhiyun
1567*4882a593Smuzhiyun cs89_dbg(0, info, "cs89x0_probe1() successful\n");
1568*4882a593Smuzhiyun
1569*4882a593Smuzhiyun retval = register_netdev(dev);
1570*4882a593Smuzhiyun if (retval)
1571*4882a593Smuzhiyun goto out2;
1572*4882a593Smuzhiyun return 0;
1573*4882a593Smuzhiyun out2:
1574*4882a593Smuzhiyun iowrite16(PP_ChipID, lp->virt_addr + ADD_PORT);
1575*4882a593Smuzhiyun out1:
1576*4882a593Smuzhiyun return retval;
1577*4882a593Smuzhiyun }
1578*4882a593Smuzhiyun
1579*4882a593Smuzhiyun #ifndef CONFIG_CS89x0_PLATFORM
1580*4882a593Smuzhiyun /*
1581*4882a593Smuzhiyun * This function converts the I/O port address used by the cs89x0_probe() and
1582*4882a593Smuzhiyun * init_module() functions to the I/O memory address used by the
1583*4882a593Smuzhiyun * cs89x0_probe1() function.
1584*4882a593Smuzhiyun */
1585*4882a593Smuzhiyun static int __init
cs89x0_ioport_probe(struct net_device * dev,unsigned long ioport,int modular)1586*4882a593Smuzhiyun cs89x0_ioport_probe(struct net_device *dev, unsigned long ioport, int modular)
1587*4882a593Smuzhiyun {
1588*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev);
1589*4882a593Smuzhiyun int ret;
1590*4882a593Smuzhiyun void __iomem *io_mem;
1591*4882a593Smuzhiyun
1592*4882a593Smuzhiyun if (!lp)
1593*4882a593Smuzhiyun return -ENOMEM;
1594*4882a593Smuzhiyun
1595*4882a593Smuzhiyun dev->base_addr = ioport;
1596*4882a593Smuzhiyun
1597*4882a593Smuzhiyun if (!request_region(ioport, NETCARD_IO_EXTENT, DRV_NAME)) {
1598*4882a593Smuzhiyun ret = -EBUSY;
1599*4882a593Smuzhiyun goto out;
1600*4882a593Smuzhiyun }
1601*4882a593Smuzhiyun
1602*4882a593Smuzhiyun io_mem = ioport_map(ioport & ~3, NETCARD_IO_EXTENT);
1603*4882a593Smuzhiyun if (!io_mem) {
1604*4882a593Smuzhiyun ret = -ENOMEM;
1605*4882a593Smuzhiyun goto release;
1606*4882a593Smuzhiyun }
1607*4882a593Smuzhiyun
1608*4882a593Smuzhiyun /* if they give us an odd I/O address, then do ONE write to
1609*4882a593Smuzhiyun * the address port, to get it back to address zero, where we
1610*4882a593Smuzhiyun * expect to find the EISA signature word. An IO with a base of 0x3
1611*4882a593Smuzhiyun * will skip the test for the ADD_PORT.
1612*4882a593Smuzhiyun */
1613*4882a593Smuzhiyun if (ioport & 1) {
1614*4882a593Smuzhiyun cs89_dbg(1, info, "%s: odd ioaddr 0x%lx\n", dev->name, ioport);
1615*4882a593Smuzhiyun if ((ioport & 2) != 2) {
1616*4882a593Smuzhiyun if ((ioread16(io_mem + ADD_PORT) & ADD_MASK) !=
1617*4882a593Smuzhiyun ADD_SIG) {
1618*4882a593Smuzhiyun pr_err("%s: bad signature 0x%x\n",
1619*4882a593Smuzhiyun dev->name, ioread16(io_mem + ADD_PORT));
1620*4882a593Smuzhiyun ret = -ENODEV;
1621*4882a593Smuzhiyun goto unmap;
1622*4882a593Smuzhiyun }
1623*4882a593Smuzhiyun }
1624*4882a593Smuzhiyun }
1625*4882a593Smuzhiyun
1626*4882a593Smuzhiyun ret = cs89x0_probe1(dev, io_mem, modular);
1627*4882a593Smuzhiyun if (!ret)
1628*4882a593Smuzhiyun goto out;
1629*4882a593Smuzhiyun unmap:
1630*4882a593Smuzhiyun ioport_unmap(io_mem);
1631*4882a593Smuzhiyun release:
1632*4882a593Smuzhiyun release_region(ioport, NETCARD_IO_EXTENT);
1633*4882a593Smuzhiyun out:
1634*4882a593Smuzhiyun return ret;
1635*4882a593Smuzhiyun }
1636*4882a593Smuzhiyun
1637*4882a593Smuzhiyun #ifndef MODULE
1638*4882a593Smuzhiyun /* Check for a network adaptor of this type, and return '0' iff one exists.
1639*4882a593Smuzhiyun * If dev->base_addr == 0, probe all likely locations.
1640*4882a593Smuzhiyun * If dev->base_addr == 1, always return failure.
1641*4882a593Smuzhiyun * If dev->base_addr == 2, allocate space for the device and return success
1642*4882a593Smuzhiyun * (detachable devices only).
1643*4882a593Smuzhiyun * Return 0 on success.
1644*4882a593Smuzhiyun */
1645*4882a593Smuzhiyun
cs89x0_probe(int unit)1646*4882a593Smuzhiyun struct net_device * __init cs89x0_probe(int unit)
1647*4882a593Smuzhiyun {
1648*4882a593Smuzhiyun struct net_device *dev = alloc_etherdev(sizeof(struct net_local));
1649*4882a593Smuzhiyun unsigned *port;
1650*4882a593Smuzhiyun int err = 0;
1651*4882a593Smuzhiyun int irq;
1652*4882a593Smuzhiyun int io;
1653*4882a593Smuzhiyun
1654*4882a593Smuzhiyun if (!dev)
1655*4882a593Smuzhiyun return ERR_PTR(-ENODEV);
1656*4882a593Smuzhiyun
1657*4882a593Smuzhiyun sprintf(dev->name, "eth%d", unit);
1658*4882a593Smuzhiyun netdev_boot_setup_check(dev);
1659*4882a593Smuzhiyun io = dev->base_addr;
1660*4882a593Smuzhiyun irq = dev->irq;
1661*4882a593Smuzhiyun
1662*4882a593Smuzhiyun cs89_dbg(0, info, "cs89x0_probe(0x%x)\n", io);
1663*4882a593Smuzhiyun
1664*4882a593Smuzhiyun if (io > 0x1ff) { /* Check a single specified location. */
1665*4882a593Smuzhiyun err = cs89x0_ioport_probe(dev, io, 0);
1666*4882a593Smuzhiyun } else if (io != 0) { /* Don't probe at all. */
1667*4882a593Smuzhiyun err = -ENXIO;
1668*4882a593Smuzhiyun } else {
1669*4882a593Smuzhiyun for (port = netcard_portlist; *port; port++) {
1670*4882a593Smuzhiyun if (cs89x0_ioport_probe(dev, *port, 0) == 0)
1671*4882a593Smuzhiyun break;
1672*4882a593Smuzhiyun dev->irq = irq;
1673*4882a593Smuzhiyun }
1674*4882a593Smuzhiyun if (!*port)
1675*4882a593Smuzhiyun err = -ENODEV;
1676*4882a593Smuzhiyun }
1677*4882a593Smuzhiyun if (err)
1678*4882a593Smuzhiyun goto out;
1679*4882a593Smuzhiyun return dev;
1680*4882a593Smuzhiyun out:
1681*4882a593Smuzhiyun free_netdev(dev);
1682*4882a593Smuzhiyun pr_warn("no cs8900 or cs8920 detected. Be sure to disable PnP with SETUP\n");
1683*4882a593Smuzhiyun return ERR_PTR(err);
1684*4882a593Smuzhiyun }
1685*4882a593Smuzhiyun #endif
1686*4882a593Smuzhiyun #endif
1687*4882a593Smuzhiyun
1688*4882a593Smuzhiyun #if defined(MODULE) && !defined(CONFIG_CS89x0_PLATFORM)
1689*4882a593Smuzhiyun
1690*4882a593Smuzhiyun static struct net_device *dev_cs89x0;
1691*4882a593Smuzhiyun
1692*4882a593Smuzhiyun /* Support the 'debug' module parm even if we're compiled for non-debug to
1693*4882a593Smuzhiyun * avoid breaking someone's startup scripts
1694*4882a593Smuzhiyun */
1695*4882a593Smuzhiyun
1696*4882a593Smuzhiyun static int io;
1697*4882a593Smuzhiyun static int irq;
1698*4882a593Smuzhiyun static int debug;
1699*4882a593Smuzhiyun static char media[8];
1700*4882a593Smuzhiyun static int duplex = -1;
1701*4882a593Smuzhiyun
1702*4882a593Smuzhiyun static int use_dma; /* These generate unused var warnings if ALLOW_DMA = 0 */
1703*4882a593Smuzhiyun static int dma;
1704*4882a593Smuzhiyun static int dmasize = 16; /* or 64 */
1705*4882a593Smuzhiyun
1706*4882a593Smuzhiyun module_param_hw(io, int, ioport, 0);
1707*4882a593Smuzhiyun module_param_hw(irq, int, irq, 0);
1708*4882a593Smuzhiyun module_param(debug, int, 0);
1709*4882a593Smuzhiyun module_param_string(media, media, sizeof(media), 0);
1710*4882a593Smuzhiyun module_param(duplex, int, 0);
1711*4882a593Smuzhiyun module_param_hw(dma , int, dma, 0);
1712*4882a593Smuzhiyun module_param(dmasize , int, 0);
1713*4882a593Smuzhiyun module_param(use_dma , int, 0);
1714*4882a593Smuzhiyun MODULE_PARM_DESC(io, "cs89x0 I/O base address");
1715*4882a593Smuzhiyun MODULE_PARM_DESC(irq, "cs89x0 IRQ number");
1716*4882a593Smuzhiyun #if DEBUGGING
1717*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "cs89x0 debug level (0-6)");
1718*4882a593Smuzhiyun #else
1719*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "(ignored)");
1720*4882a593Smuzhiyun #endif
1721*4882a593Smuzhiyun MODULE_PARM_DESC(media, "Set cs89x0 adapter(s) media type(s) (rj45,bnc,aui)");
1722*4882a593Smuzhiyun /* No other value than -1 for duplex seems to be currently interpreted */
1723*4882a593Smuzhiyun MODULE_PARM_DESC(duplex, "(ignored)");
1724*4882a593Smuzhiyun #if ALLOW_DMA
1725*4882a593Smuzhiyun MODULE_PARM_DESC(dma , "cs89x0 ISA DMA channel; ignored if use_dma=0");
1726*4882a593Smuzhiyun MODULE_PARM_DESC(dmasize , "cs89x0 DMA size in kB (16,64); ignored if use_dma=0");
1727*4882a593Smuzhiyun MODULE_PARM_DESC(use_dma , "cs89x0 using DMA (0-1)");
1728*4882a593Smuzhiyun #else
1729*4882a593Smuzhiyun MODULE_PARM_DESC(dma , "(ignored)");
1730*4882a593Smuzhiyun MODULE_PARM_DESC(dmasize , "(ignored)");
1731*4882a593Smuzhiyun MODULE_PARM_DESC(use_dma , "(ignored)");
1732*4882a593Smuzhiyun #endif
1733*4882a593Smuzhiyun
1734*4882a593Smuzhiyun MODULE_AUTHOR("Mike Cruse, Russwll Nelson <nelson@crynwr.com>, Andrew Morton");
1735*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1736*4882a593Smuzhiyun
1737*4882a593Smuzhiyun /*
1738*4882a593Smuzhiyun * media=t - specify media type
1739*4882a593Smuzhiyun * or media=2
1740*4882a593Smuzhiyun * or media=aui
1741*4882a593Smuzhiyun * or medai=auto
1742*4882a593Smuzhiyun * duplex=0 - specify forced half/full/autonegotiate duplex
1743*4882a593Smuzhiyun * debug=# - debug level
1744*4882a593Smuzhiyun *
1745*4882a593Smuzhiyun * Default Chip Configuration:
1746*4882a593Smuzhiyun * DMA Burst = enabled
1747*4882a593Smuzhiyun * IOCHRDY Enabled = enabled
1748*4882a593Smuzhiyun * UseSA = enabled
1749*4882a593Smuzhiyun * CS8900 defaults to half-duplex if not specified on command-line
1750*4882a593Smuzhiyun * CS8920 defaults to autoneg if not specified on command-line
1751*4882a593Smuzhiyun * Use reset defaults for other config parameters
1752*4882a593Smuzhiyun *
1753*4882a593Smuzhiyun * Assumptions:
1754*4882a593Smuzhiyun * media type specified is supported (circuitry is present)
1755*4882a593Smuzhiyun * if memory address is > 1MB, then required mem decode hw is present
1756*4882a593Smuzhiyun * if 10B-2, then agent other than driver will enable DC/DC converter
1757*4882a593Smuzhiyun * (hw or software util)
1758*4882a593Smuzhiyun */
1759*4882a593Smuzhiyun
init_module(void)1760*4882a593Smuzhiyun int __init init_module(void)
1761*4882a593Smuzhiyun {
1762*4882a593Smuzhiyun struct net_device *dev = alloc_etherdev(sizeof(struct net_local));
1763*4882a593Smuzhiyun struct net_local *lp;
1764*4882a593Smuzhiyun int ret = 0;
1765*4882a593Smuzhiyun
1766*4882a593Smuzhiyun #if DEBUGGING
1767*4882a593Smuzhiyun net_debug = debug;
1768*4882a593Smuzhiyun #else
1769*4882a593Smuzhiyun debug = 0;
1770*4882a593Smuzhiyun #endif
1771*4882a593Smuzhiyun if (!dev)
1772*4882a593Smuzhiyun return -ENOMEM;
1773*4882a593Smuzhiyun
1774*4882a593Smuzhiyun dev->irq = irq;
1775*4882a593Smuzhiyun dev->base_addr = io;
1776*4882a593Smuzhiyun lp = netdev_priv(dev);
1777*4882a593Smuzhiyun
1778*4882a593Smuzhiyun #if ALLOW_DMA
1779*4882a593Smuzhiyun if (use_dma) {
1780*4882a593Smuzhiyun lp->use_dma = use_dma;
1781*4882a593Smuzhiyun lp->dma = dma;
1782*4882a593Smuzhiyun lp->dmasize = dmasize;
1783*4882a593Smuzhiyun }
1784*4882a593Smuzhiyun #endif
1785*4882a593Smuzhiyun
1786*4882a593Smuzhiyun spin_lock_init(&lp->lock);
1787*4882a593Smuzhiyun
1788*4882a593Smuzhiyun /* boy, they'd better get these right */
1789*4882a593Smuzhiyun if (!strcmp(media, "rj45"))
1790*4882a593Smuzhiyun lp->adapter_cnf = A_CNF_MEDIA_10B_T | A_CNF_10B_T;
1791*4882a593Smuzhiyun else if (!strcmp(media, "aui"))
1792*4882a593Smuzhiyun lp->adapter_cnf = A_CNF_MEDIA_AUI | A_CNF_AUI;
1793*4882a593Smuzhiyun else if (!strcmp(media, "bnc"))
1794*4882a593Smuzhiyun lp->adapter_cnf = A_CNF_MEDIA_10B_2 | A_CNF_10B_2;
1795*4882a593Smuzhiyun else
1796*4882a593Smuzhiyun lp->adapter_cnf = A_CNF_MEDIA_10B_T | A_CNF_10B_T;
1797*4882a593Smuzhiyun
1798*4882a593Smuzhiyun if (duplex == -1)
1799*4882a593Smuzhiyun lp->auto_neg_cnf = AUTO_NEG_ENABLE;
1800*4882a593Smuzhiyun
1801*4882a593Smuzhiyun if (io == 0) {
1802*4882a593Smuzhiyun pr_err("Module autoprobing not allowed\n");
1803*4882a593Smuzhiyun pr_err("Append io=0xNNN\n");
1804*4882a593Smuzhiyun ret = -EPERM;
1805*4882a593Smuzhiyun goto out;
1806*4882a593Smuzhiyun } else if (io <= 0x1ff) {
1807*4882a593Smuzhiyun ret = -ENXIO;
1808*4882a593Smuzhiyun goto out;
1809*4882a593Smuzhiyun }
1810*4882a593Smuzhiyun
1811*4882a593Smuzhiyun #if ALLOW_DMA
1812*4882a593Smuzhiyun if (use_dma && dmasize != 16 && dmasize != 64) {
1813*4882a593Smuzhiyun pr_err("dma size must be either 16K or 64K, not %dK\n",
1814*4882a593Smuzhiyun dmasize);
1815*4882a593Smuzhiyun ret = -EPERM;
1816*4882a593Smuzhiyun goto out;
1817*4882a593Smuzhiyun }
1818*4882a593Smuzhiyun #endif
1819*4882a593Smuzhiyun ret = cs89x0_ioport_probe(dev, io, 1);
1820*4882a593Smuzhiyun if (ret)
1821*4882a593Smuzhiyun goto out;
1822*4882a593Smuzhiyun
1823*4882a593Smuzhiyun dev_cs89x0 = dev;
1824*4882a593Smuzhiyun return 0;
1825*4882a593Smuzhiyun out:
1826*4882a593Smuzhiyun free_netdev(dev);
1827*4882a593Smuzhiyun return ret;
1828*4882a593Smuzhiyun }
1829*4882a593Smuzhiyun
1830*4882a593Smuzhiyun void __exit
cleanup_module(void)1831*4882a593Smuzhiyun cleanup_module(void)
1832*4882a593Smuzhiyun {
1833*4882a593Smuzhiyun struct net_local *lp = netdev_priv(dev_cs89x0);
1834*4882a593Smuzhiyun
1835*4882a593Smuzhiyun unregister_netdev(dev_cs89x0);
1836*4882a593Smuzhiyun iowrite16(PP_ChipID, lp->virt_addr + ADD_PORT);
1837*4882a593Smuzhiyun ioport_unmap(lp->virt_addr);
1838*4882a593Smuzhiyun release_region(dev_cs89x0->base_addr, NETCARD_IO_EXTENT);
1839*4882a593Smuzhiyun free_netdev(dev_cs89x0);
1840*4882a593Smuzhiyun }
1841*4882a593Smuzhiyun #endif /* MODULE && !CONFIG_CS89x0_PLATFORM */
1842*4882a593Smuzhiyun
1843*4882a593Smuzhiyun #ifdef CONFIG_CS89x0_PLATFORM
cs89x0_platform_probe(struct platform_device * pdev)1844*4882a593Smuzhiyun static int __init cs89x0_platform_probe(struct platform_device *pdev)
1845*4882a593Smuzhiyun {
1846*4882a593Smuzhiyun struct net_device *dev = alloc_etherdev(sizeof(struct net_local));
1847*4882a593Smuzhiyun void __iomem *virt_addr;
1848*4882a593Smuzhiyun int err;
1849*4882a593Smuzhiyun
1850*4882a593Smuzhiyun if (!dev)
1851*4882a593Smuzhiyun return -ENOMEM;
1852*4882a593Smuzhiyun
1853*4882a593Smuzhiyun dev->irq = platform_get_irq(pdev, 0);
1854*4882a593Smuzhiyun if (dev->irq <= 0) {
1855*4882a593Smuzhiyun dev_warn(&dev->dev, "interrupt resource missing\n");
1856*4882a593Smuzhiyun err = -ENXIO;
1857*4882a593Smuzhiyun goto free;
1858*4882a593Smuzhiyun }
1859*4882a593Smuzhiyun
1860*4882a593Smuzhiyun virt_addr = devm_platform_ioremap_resource(pdev, 0);
1861*4882a593Smuzhiyun if (IS_ERR(virt_addr)) {
1862*4882a593Smuzhiyun err = PTR_ERR(virt_addr);
1863*4882a593Smuzhiyun goto free;
1864*4882a593Smuzhiyun }
1865*4882a593Smuzhiyun
1866*4882a593Smuzhiyun err = cs89x0_probe1(dev, virt_addr, 0);
1867*4882a593Smuzhiyun if (err) {
1868*4882a593Smuzhiyun dev_warn(&dev->dev, "no cs8900 or cs8920 detected\n");
1869*4882a593Smuzhiyun goto free;
1870*4882a593Smuzhiyun }
1871*4882a593Smuzhiyun
1872*4882a593Smuzhiyun platform_set_drvdata(pdev, dev);
1873*4882a593Smuzhiyun return 0;
1874*4882a593Smuzhiyun
1875*4882a593Smuzhiyun free:
1876*4882a593Smuzhiyun free_netdev(dev);
1877*4882a593Smuzhiyun return err;
1878*4882a593Smuzhiyun }
1879*4882a593Smuzhiyun
cs89x0_platform_remove(struct platform_device * pdev)1880*4882a593Smuzhiyun static int cs89x0_platform_remove(struct platform_device *pdev)
1881*4882a593Smuzhiyun {
1882*4882a593Smuzhiyun struct net_device *dev = platform_get_drvdata(pdev);
1883*4882a593Smuzhiyun
1884*4882a593Smuzhiyun /* This platform_get_resource() call will not return NULL, because
1885*4882a593Smuzhiyun * the same call in cs89x0_platform_probe() has returned a non NULL
1886*4882a593Smuzhiyun * value.
1887*4882a593Smuzhiyun */
1888*4882a593Smuzhiyun unregister_netdev(dev);
1889*4882a593Smuzhiyun free_netdev(dev);
1890*4882a593Smuzhiyun return 0;
1891*4882a593Smuzhiyun }
1892*4882a593Smuzhiyun
1893*4882a593Smuzhiyun static const struct of_device_id __maybe_unused cs89x0_match[] = {
1894*4882a593Smuzhiyun { .compatible = "cirrus,cs8900", },
1895*4882a593Smuzhiyun { .compatible = "cirrus,cs8920", },
1896*4882a593Smuzhiyun { },
1897*4882a593Smuzhiyun };
1898*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, cs89x0_match);
1899*4882a593Smuzhiyun
1900*4882a593Smuzhiyun static struct platform_driver cs89x0_driver = {
1901*4882a593Smuzhiyun .driver = {
1902*4882a593Smuzhiyun .name = DRV_NAME,
1903*4882a593Smuzhiyun .of_match_table = of_match_ptr(cs89x0_match),
1904*4882a593Smuzhiyun },
1905*4882a593Smuzhiyun .remove = cs89x0_platform_remove,
1906*4882a593Smuzhiyun };
1907*4882a593Smuzhiyun
1908*4882a593Smuzhiyun module_platform_driver_probe(cs89x0_driver, cs89x0_platform_probe);
1909*4882a593Smuzhiyun
1910*4882a593Smuzhiyun #endif /* CONFIG_CS89x0_PLATFORM */
1911*4882a593Smuzhiyun
1912*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1913*4882a593Smuzhiyun MODULE_DESCRIPTION("Crystal Semiconductor (Now Cirrus Logic) CS89[02]0 network driver");
1914*4882a593Smuzhiyun MODULE_AUTHOR("Russell Nelson <nelson@crynwr.com>");
1915