1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * libcxgb_ppm.c: Chelsio common library for T3/T4/T5 iSCSI PagePod Manager
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (c) 2016 Chelsio Communications, Inc. All rights reserved.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This software is available to you under a choice of one of two
7*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU
8*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file
9*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the
10*4882a593Smuzhiyun * OpenIB.org BSD license below:
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or
13*4882a593Smuzhiyun * without modification, are permitted provided that the following
14*4882a593Smuzhiyun * conditions are met:
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * - Redistributions of source code must retain the above
17*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
18*4882a593Smuzhiyun * disclaimer.
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above
21*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
22*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials
23*4882a593Smuzhiyun * provided with the distribution.
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32*4882a593Smuzhiyun * SOFTWARE.
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun * Written by: Karen Xie (kxie@chelsio.com)
35*4882a593Smuzhiyun */
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define DRV_NAME "libcxgb"
38*4882a593Smuzhiyun #define pr_fmt(fmt) DRV_NAME ": " fmt
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #include <linux/kernel.h>
41*4882a593Smuzhiyun #include <linux/module.h>
42*4882a593Smuzhiyun #include <linux/errno.h>
43*4882a593Smuzhiyun #include <linux/types.h>
44*4882a593Smuzhiyun #include <linux/debugfs.h>
45*4882a593Smuzhiyun #include <linux/export.h>
46*4882a593Smuzhiyun #include <linux/list.h>
47*4882a593Smuzhiyun #include <linux/skbuff.h>
48*4882a593Smuzhiyun #include <linux/pci.h>
49*4882a593Smuzhiyun #include <linux/scatterlist.h>
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #include "libcxgb_ppm.h"
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /* Direct Data Placement -
54*4882a593Smuzhiyun * Directly place the iSCSI Data-In or Data-Out PDU's payload into
55*4882a593Smuzhiyun * pre-posted final destination host-memory buffers based on the
56*4882a593Smuzhiyun * Initiator Task Tag (ITT) in Data-In or Target Task Tag (TTT)
57*4882a593Smuzhiyun * in Data-Out PDUs. The host memory address is programmed into
58*4882a593Smuzhiyun * h/w in the format of pagepod entries. The location of the
59*4882a593Smuzhiyun * pagepod entry is encoded into ddp tag which is used as the base
60*4882a593Smuzhiyun * for ITT/TTT.
61*4882a593Smuzhiyun */
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* Direct-Data Placement page size adjustment
64*4882a593Smuzhiyun */
cxgbi_ppm_find_page_index(struct cxgbi_ppm * ppm,unsigned long pgsz)65*4882a593Smuzhiyun int cxgbi_ppm_find_page_index(struct cxgbi_ppm *ppm, unsigned long pgsz)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun struct cxgbi_tag_format *tformat = &ppm->tformat;
68*4882a593Smuzhiyun int i;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun for (i = 0; i < DDP_PGIDX_MAX; i++) {
71*4882a593Smuzhiyun if (pgsz == 1UL << (DDP_PGSZ_BASE_SHIFT +
72*4882a593Smuzhiyun tformat->pgsz_order[i])) {
73*4882a593Smuzhiyun pr_debug("%s: %s ppm, pgsz %lu -> idx %d.\n",
74*4882a593Smuzhiyun __func__, ppm->ndev->name, pgsz, i);
75*4882a593Smuzhiyun return i;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun pr_info("ippm: ddp page size %lu not supported.\n", pgsz);
79*4882a593Smuzhiyun return DDP_PGIDX_MAX;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* DDP setup & teardown
83*4882a593Smuzhiyun */
ppm_find_unused_entries(unsigned long * bmap,unsigned int max_ppods,unsigned int start,unsigned int nr,unsigned int align_mask)84*4882a593Smuzhiyun static int ppm_find_unused_entries(unsigned long *bmap,
85*4882a593Smuzhiyun unsigned int max_ppods,
86*4882a593Smuzhiyun unsigned int start,
87*4882a593Smuzhiyun unsigned int nr,
88*4882a593Smuzhiyun unsigned int align_mask)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun unsigned long i;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun i = bitmap_find_next_zero_area(bmap, max_ppods, start, nr, align_mask);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun if (unlikely(i >= max_ppods) && (start > nr))
95*4882a593Smuzhiyun i = bitmap_find_next_zero_area(bmap, max_ppods, 0, start - 1,
96*4882a593Smuzhiyun align_mask);
97*4882a593Smuzhiyun if (unlikely(i >= max_ppods))
98*4882a593Smuzhiyun return -ENOSPC;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun bitmap_set(bmap, i, nr);
101*4882a593Smuzhiyun return (int)i;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
ppm_mark_entries(struct cxgbi_ppm * ppm,int i,int count,unsigned long caller_data)104*4882a593Smuzhiyun static void ppm_mark_entries(struct cxgbi_ppm *ppm, int i, int count,
105*4882a593Smuzhiyun unsigned long caller_data)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun struct cxgbi_ppod_data *pdata = ppm->ppod_data + i;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun pdata->caller_data = caller_data;
110*4882a593Smuzhiyun pdata->npods = count;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun if (pdata->color == ((1 << PPOD_IDX_SHIFT) - 1))
113*4882a593Smuzhiyun pdata->color = 0;
114*4882a593Smuzhiyun else
115*4882a593Smuzhiyun pdata->color++;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
ppm_get_cpu_entries(struct cxgbi_ppm * ppm,unsigned int count,unsigned long caller_data)118*4882a593Smuzhiyun static int ppm_get_cpu_entries(struct cxgbi_ppm *ppm, unsigned int count,
119*4882a593Smuzhiyun unsigned long caller_data)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun struct cxgbi_ppm_pool *pool;
122*4882a593Smuzhiyun unsigned int cpu;
123*4882a593Smuzhiyun int i;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun if (!ppm->pool)
126*4882a593Smuzhiyun return -EINVAL;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun cpu = get_cpu();
129*4882a593Smuzhiyun pool = per_cpu_ptr(ppm->pool, cpu);
130*4882a593Smuzhiyun spin_lock_bh(&pool->lock);
131*4882a593Smuzhiyun put_cpu();
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun i = ppm_find_unused_entries(pool->bmap, ppm->pool_index_max,
134*4882a593Smuzhiyun pool->next, count, 0);
135*4882a593Smuzhiyun if (i < 0) {
136*4882a593Smuzhiyun pool->next = 0;
137*4882a593Smuzhiyun spin_unlock_bh(&pool->lock);
138*4882a593Smuzhiyun return -ENOSPC;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun pool->next = i + count;
142*4882a593Smuzhiyun if (pool->next >= ppm->pool_index_max)
143*4882a593Smuzhiyun pool->next = 0;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun spin_unlock_bh(&pool->lock);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun pr_debug("%s: cpu %u, idx %d + %d (%d), next %u.\n",
148*4882a593Smuzhiyun __func__, cpu, i, count, i + cpu * ppm->pool_index_max,
149*4882a593Smuzhiyun pool->next);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun i += cpu * ppm->pool_index_max;
152*4882a593Smuzhiyun ppm_mark_entries(ppm, i, count, caller_data);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun return i;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
ppm_get_entries(struct cxgbi_ppm * ppm,unsigned int count,unsigned long caller_data)157*4882a593Smuzhiyun static int ppm_get_entries(struct cxgbi_ppm *ppm, unsigned int count,
158*4882a593Smuzhiyun unsigned long caller_data)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun int i;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun spin_lock_bh(&ppm->map_lock);
163*4882a593Smuzhiyun i = ppm_find_unused_entries(ppm->ppod_bmap, ppm->bmap_index_max,
164*4882a593Smuzhiyun ppm->next, count, 0);
165*4882a593Smuzhiyun if (i < 0) {
166*4882a593Smuzhiyun ppm->next = 0;
167*4882a593Smuzhiyun spin_unlock_bh(&ppm->map_lock);
168*4882a593Smuzhiyun pr_debug("ippm: NO suitable entries %u available.\n",
169*4882a593Smuzhiyun count);
170*4882a593Smuzhiyun return -ENOSPC;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun ppm->next = i + count;
174*4882a593Smuzhiyun if (ppm->max_index_in_edram && (ppm->next >= ppm->max_index_in_edram))
175*4882a593Smuzhiyun ppm->next = 0;
176*4882a593Smuzhiyun else if (ppm->next >= ppm->bmap_index_max)
177*4882a593Smuzhiyun ppm->next = 0;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun spin_unlock_bh(&ppm->map_lock);
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun pr_debug("%s: idx %d + %d (%d), next %u, caller_data 0x%lx.\n",
182*4882a593Smuzhiyun __func__, i, count, i + ppm->pool_rsvd, ppm->next,
183*4882a593Smuzhiyun caller_data);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun i += ppm->pool_rsvd;
186*4882a593Smuzhiyun ppm_mark_entries(ppm, i, count, caller_data);
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun return i;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
ppm_unmark_entries(struct cxgbi_ppm * ppm,int i,int count)191*4882a593Smuzhiyun static void ppm_unmark_entries(struct cxgbi_ppm *ppm, int i, int count)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun pr_debug("%s: idx %d + %d.\n", __func__, i, count);
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun if (i < ppm->pool_rsvd) {
196*4882a593Smuzhiyun unsigned int cpu;
197*4882a593Smuzhiyun struct cxgbi_ppm_pool *pool;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun cpu = i / ppm->pool_index_max;
200*4882a593Smuzhiyun i %= ppm->pool_index_max;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun pool = per_cpu_ptr(ppm->pool, cpu);
203*4882a593Smuzhiyun spin_lock_bh(&pool->lock);
204*4882a593Smuzhiyun bitmap_clear(pool->bmap, i, count);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun if (i < pool->next)
207*4882a593Smuzhiyun pool->next = i;
208*4882a593Smuzhiyun spin_unlock_bh(&pool->lock);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun pr_debug("%s: cpu %u, idx %d, next %u.\n",
211*4882a593Smuzhiyun __func__, cpu, i, pool->next);
212*4882a593Smuzhiyun } else {
213*4882a593Smuzhiyun spin_lock_bh(&ppm->map_lock);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun i -= ppm->pool_rsvd;
216*4882a593Smuzhiyun bitmap_clear(ppm->ppod_bmap, i, count);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun if (i < ppm->next)
219*4882a593Smuzhiyun ppm->next = i;
220*4882a593Smuzhiyun spin_unlock_bh(&ppm->map_lock);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun pr_debug("%s: idx %d, next %u.\n", __func__, i, ppm->next);
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
cxgbi_ppm_ppod_release(struct cxgbi_ppm * ppm,u32 idx)226*4882a593Smuzhiyun void cxgbi_ppm_ppod_release(struct cxgbi_ppm *ppm, u32 idx)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun struct cxgbi_ppod_data *pdata;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun if (idx >= ppm->ppmax) {
231*4882a593Smuzhiyun pr_warn("ippm: idx too big %u > %u.\n", idx, ppm->ppmax);
232*4882a593Smuzhiyun return;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun pdata = ppm->ppod_data + idx;
236*4882a593Smuzhiyun if (!pdata->npods) {
237*4882a593Smuzhiyun pr_warn("ippm: idx %u, npods 0.\n", idx);
238*4882a593Smuzhiyun return;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun pr_debug("release idx %u, npods %u.\n", idx, pdata->npods);
242*4882a593Smuzhiyun ppm_unmark_entries(ppm, idx, pdata->npods);
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun EXPORT_SYMBOL(cxgbi_ppm_ppod_release);
245*4882a593Smuzhiyun
cxgbi_ppm_ppods_reserve(struct cxgbi_ppm * ppm,unsigned short nr_pages,u32 per_tag_pg_idx,u32 * ppod_idx,u32 * ddp_tag,unsigned long caller_data)246*4882a593Smuzhiyun int cxgbi_ppm_ppods_reserve(struct cxgbi_ppm *ppm, unsigned short nr_pages,
247*4882a593Smuzhiyun u32 per_tag_pg_idx, u32 *ppod_idx,
248*4882a593Smuzhiyun u32 *ddp_tag, unsigned long caller_data)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun struct cxgbi_ppod_data *pdata;
251*4882a593Smuzhiyun unsigned int npods;
252*4882a593Smuzhiyun int idx = -1;
253*4882a593Smuzhiyun unsigned int hwidx;
254*4882a593Smuzhiyun u32 tag;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun npods = (nr_pages + PPOD_PAGES_MAX - 1) >> PPOD_PAGES_SHIFT;
257*4882a593Smuzhiyun if (!npods) {
258*4882a593Smuzhiyun pr_warn("%s: pages %u -> npods %u, full.\n",
259*4882a593Smuzhiyun __func__, nr_pages, npods);
260*4882a593Smuzhiyun return -EINVAL;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun /* grab from cpu pool first */
264*4882a593Smuzhiyun idx = ppm_get_cpu_entries(ppm, npods, caller_data);
265*4882a593Smuzhiyun /* try the general pool */
266*4882a593Smuzhiyun if (idx < 0)
267*4882a593Smuzhiyun idx = ppm_get_entries(ppm, npods, caller_data);
268*4882a593Smuzhiyun if (idx < 0) {
269*4882a593Smuzhiyun pr_debug("ippm: pages %u, nospc %u, nxt %u, 0x%lx.\n",
270*4882a593Smuzhiyun nr_pages, npods, ppm->next, caller_data);
271*4882a593Smuzhiyun return idx;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun pdata = ppm->ppod_data + idx;
275*4882a593Smuzhiyun hwidx = ppm->base_idx + idx;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun tag = cxgbi_ppm_make_ddp_tag(hwidx, pdata->color);
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun if (per_tag_pg_idx)
280*4882a593Smuzhiyun tag |= (per_tag_pg_idx << 30) & 0xC0000000;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun *ppod_idx = idx;
283*4882a593Smuzhiyun *ddp_tag = tag;
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun pr_debug("ippm: sg %u, tag 0x%x(%u,%u), data 0x%lx.\n",
286*4882a593Smuzhiyun nr_pages, tag, idx, npods, caller_data);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun return npods;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun EXPORT_SYMBOL(cxgbi_ppm_ppods_reserve);
291*4882a593Smuzhiyun
cxgbi_ppm_make_ppod_hdr(struct cxgbi_ppm * ppm,u32 tag,unsigned int tid,unsigned int offset,unsigned int length,struct cxgbi_pagepod_hdr * hdr)292*4882a593Smuzhiyun void cxgbi_ppm_make_ppod_hdr(struct cxgbi_ppm *ppm, u32 tag,
293*4882a593Smuzhiyun unsigned int tid, unsigned int offset,
294*4882a593Smuzhiyun unsigned int length,
295*4882a593Smuzhiyun struct cxgbi_pagepod_hdr *hdr)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun /* The ddp tag in pagepod should be with bit 31:30 set to 0.
298*4882a593Smuzhiyun * The ddp Tag on the wire should be with non-zero 31:30 to the peer
299*4882a593Smuzhiyun */
300*4882a593Smuzhiyun tag &= 0x3FFFFFFF;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun hdr->vld_tid = htonl(PPOD_VALID_FLAG | PPOD_TID(tid));
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun hdr->rsvd = 0;
305*4882a593Smuzhiyun hdr->pgsz_tag_clr = htonl(tag & ppm->tformat.idx_clr_mask);
306*4882a593Smuzhiyun hdr->max_offset = htonl(length);
307*4882a593Smuzhiyun hdr->page_offset = htonl(offset);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun pr_debug("ippm: tag 0x%x, tid 0x%x, xfer %u, off %u.\n",
310*4882a593Smuzhiyun tag, tid, length, offset);
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun EXPORT_SYMBOL(cxgbi_ppm_make_ppod_hdr);
313*4882a593Smuzhiyun
ppm_free(struct cxgbi_ppm * ppm)314*4882a593Smuzhiyun static void ppm_free(struct cxgbi_ppm *ppm)
315*4882a593Smuzhiyun {
316*4882a593Smuzhiyun vfree(ppm);
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
ppm_destroy(struct kref * kref)319*4882a593Smuzhiyun static void ppm_destroy(struct kref *kref)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun struct cxgbi_ppm *ppm = container_of(kref,
322*4882a593Smuzhiyun struct cxgbi_ppm,
323*4882a593Smuzhiyun refcnt);
324*4882a593Smuzhiyun pr_info("ippm: kref 0, destroy %s ppm 0x%p.\n",
325*4882a593Smuzhiyun ppm->ndev->name, ppm);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun *ppm->ppm_pp = NULL;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun free_percpu(ppm->pool);
330*4882a593Smuzhiyun ppm_free(ppm);
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun
cxgbi_ppm_release(struct cxgbi_ppm * ppm)333*4882a593Smuzhiyun int cxgbi_ppm_release(struct cxgbi_ppm *ppm)
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun if (ppm) {
336*4882a593Smuzhiyun int rv;
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun rv = kref_put(&ppm->refcnt, ppm_destroy);
339*4882a593Smuzhiyun return rv;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun return 1;
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun EXPORT_SYMBOL(cxgbi_ppm_release);
344*4882a593Smuzhiyun
ppm_alloc_cpu_pool(unsigned int * total,unsigned int * pcpu_ppmax)345*4882a593Smuzhiyun static struct cxgbi_ppm_pool *ppm_alloc_cpu_pool(unsigned int *total,
346*4882a593Smuzhiyun unsigned int *pcpu_ppmax)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun struct cxgbi_ppm_pool *pools;
349*4882a593Smuzhiyun unsigned int ppmax = (*total) / num_possible_cpus();
350*4882a593Smuzhiyun unsigned int max = (PCPU_MIN_UNIT_SIZE - sizeof(*pools)) << 3;
351*4882a593Smuzhiyun unsigned int bmap;
352*4882a593Smuzhiyun unsigned int alloc_sz;
353*4882a593Smuzhiyun unsigned int count = 0;
354*4882a593Smuzhiyun unsigned int cpu;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun /* make sure per cpu pool fits into PCPU_MIN_UNIT_SIZE */
357*4882a593Smuzhiyun if (ppmax > max)
358*4882a593Smuzhiyun ppmax = max;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun /* pool size must be multiple of unsigned long */
361*4882a593Smuzhiyun bmap = ppmax / BITS_PER_TYPE(unsigned long);
362*4882a593Smuzhiyun if (!bmap)
363*4882a593Smuzhiyun return NULL;
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun ppmax = (bmap * sizeof(unsigned long)) << 3;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun alloc_sz = sizeof(*pools) + sizeof(unsigned long) * bmap;
368*4882a593Smuzhiyun pools = __alloc_percpu(alloc_sz, __alignof__(struct cxgbi_ppm_pool));
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun if (!pools)
371*4882a593Smuzhiyun return NULL;
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun for_each_possible_cpu(cpu) {
374*4882a593Smuzhiyun struct cxgbi_ppm_pool *ppool = per_cpu_ptr(pools, cpu);
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun memset(ppool, 0, alloc_sz);
377*4882a593Smuzhiyun spin_lock_init(&ppool->lock);
378*4882a593Smuzhiyun count += ppmax;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun *total = count;
382*4882a593Smuzhiyun *pcpu_ppmax = ppmax;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun return pools;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
cxgbi_ppm_init(void ** ppm_pp,struct net_device * ndev,struct pci_dev * pdev,void * lldev,struct cxgbi_tag_format * tformat,unsigned int iscsi_size,unsigned int llimit,unsigned int start,unsigned int reserve_factor,unsigned int iscsi_edram_start,unsigned int iscsi_edram_size)387*4882a593Smuzhiyun int cxgbi_ppm_init(void **ppm_pp, struct net_device *ndev,
388*4882a593Smuzhiyun struct pci_dev *pdev, void *lldev,
389*4882a593Smuzhiyun struct cxgbi_tag_format *tformat, unsigned int iscsi_size,
390*4882a593Smuzhiyun unsigned int llimit, unsigned int start,
391*4882a593Smuzhiyun unsigned int reserve_factor, unsigned int iscsi_edram_start,
392*4882a593Smuzhiyun unsigned int iscsi_edram_size)
393*4882a593Smuzhiyun {
394*4882a593Smuzhiyun struct cxgbi_ppm *ppm = (struct cxgbi_ppm *)(*ppm_pp);
395*4882a593Smuzhiyun struct cxgbi_ppm_pool *pool = NULL;
396*4882a593Smuzhiyun unsigned int pool_index_max = 0;
397*4882a593Smuzhiyun unsigned int ppmax_pool = 0;
398*4882a593Smuzhiyun unsigned int ppod_bmap_size;
399*4882a593Smuzhiyun unsigned int alloc_sz;
400*4882a593Smuzhiyun unsigned int ppmax;
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun if (!iscsi_edram_start)
403*4882a593Smuzhiyun iscsi_edram_size = 0;
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun if (iscsi_edram_size &&
406*4882a593Smuzhiyun ((iscsi_edram_start + iscsi_edram_size) != start)) {
407*4882a593Smuzhiyun pr_err("iscsi ppod region not contiguous: EDRAM start 0x%x "
408*4882a593Smuzhiyun "size 0x%x DDR start 0x%x\n",
409*4882a593Smuzhiyun iscsi_edram_start, iscsi_edram_size, start);
410*4882a593Smuzhiyun return -EINVAL;
411*4882a593Smuzhiyun }
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun if (iscsi_edram_size) {
414*4882a593Smuzhiyun reserve_factor = 0;
415*4882a593Smuzhiyun start = iscsi_edram_start;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun ppmax = (iscsi_edram_size + iscsi_size) >> PPOD_SIZE_SHIFT;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun if (ppm) {
421*4882a593Smuzhiyun pr_info("ippm: %s, ppm 0x%p,0x%p already initialized, %u/%u.\n",
422*4882a593Smuzhiyun ndev->name, ppm_pp, ppm, ppm->ppmax, ppmax);
423*4882a593Smuzhiyun kref_get(&ppm->refcnt);
424*4882a593Smuzhiyun return 1;
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun if (reserve_factor) {
428*4882a593Smuzhiyun ppmax_pool = ppmax / reserve_factor;
429*4882a593Smuzhiyun pool = ppm_alloc_cpu_pool(&ppmax_pool, &pool_index_max);
430*4882a593Smuzhiyun if (!pool) {
431*4882a593Smuzhiyun ppmax_pool = 0;
432*4882a593Smuzhiyun reserve_factor = 0;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun pr_debug("%s: ppmax %u, cpu total %u, per cpu %u.\n",
436*4882a593Smuzhiyun ndev->name, ppmax, ppmax_pool, pool_index_max);
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun ppod_bmap_size = BITS_TO_LONGS(ppmax - ppmax_pool);
440*4882a593Smuzhiyun alloc_sz = sizeof(struct cxgbi_ppm) +
441*4882a593Smuzhiyun ppmax * (sizeof(struct cxgbi_ppod_data)) +
442*4882a593Smuzhiyun ppod_bmap_size * sizeof(unsigned long);
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun ppm = vzalloc(alloc_sz);
445*4882a593Smuzhiyun if (!ppm)
446*4882a593Smuzhiyun goto release_ppm_pool;
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun ppm->ppod_bmap = (unsigned long *)(&ppm->ppod_data[ppmax]);
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun if ((ppod_bmap_size >> 3) > (ppmax - ppmax_pool)) {
451*4882a593Smuzhiyun unsigned int start = ppmax - ppmax_pool;
452*4882a593Smuzhiyun unsigned int end = ppod_bmap_size >> 3;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun bitmap_set(ppm->ppod_bmap, ppmax, end - start);
455*4882a593Smuzhiyun pr_info("%s: %u - %u < %u * 8, mask extra bits %u, %u.\n",
456*4882a593Smuzhiyun __func__, ppmax, ppmax_pool, ppod_bmap_size, start,
457*4882a593Smuzhiyun end);
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun if (iscsi_edram_size) {
460*4882a593Smuzhiyun unsigned int first_ddr_idx =
461*4882a593Smuzhiyun iscsi_edram_size >> PPOD_SIZE_SHIFT;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun ppm->max_index_in_edram = first_ddr_idx - 1;
464*4882a593Smuzhiyun bitmap_set(ppm->ppod_bmap, first_ddr_idx, 1);
465*4882a593Smuzhiyun pr_debug("reserved %u ppod in bitmap\n", first_ddr_idx);
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun spin_lock_init(&ppm->map_lock);
469*4882a593Smuzhiyun kref_init(&ppm->refcnt);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun memcpy(&ppm->tformat, tformat, sizeof(struct cxgbi_tag_format));
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun ppm->ppm_pp = ppm_pp;
474*4882a593Smuzhiyun ppm->ndev = ndev;
475*4882a593Smuzhiyun ppm->pdev = pdev;
476*4882a593Smuzhiyun ppm->lldev = lldev;
477*4882a593Smuzhiyun ppm->ppmax = ppmax;
478*4882a593Smuzhiyun ppm->next = 0;
479*4882a593Smuzhiyun ppm->llimit = llimit;
480*4882a593Smuzhiyun ppm->base_idx = start > llimit ?
481*4882a593Smuzhiyun (start - llimit + 1) >> PPOD_SIZE_SHIFT : 0;
482*4882a593Smuzhiyun ppm->bmap_index_max = ppmax - ppmax_pool;
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun ppm->pool = pool;
485*4882a593Smuzhiyun ppm->pool_rsvd = ppmax_pool;
486*4882a593Smuzhiyun ppm->pool_index_max = pool_index_max;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun /* check one more time */
489*4882a593Smuzhiyun if (*ppm_pp) {
490*4882a593Smuzhiyun ppm_free(ppm);
491*4882a593Smuzhiyun ppm = (struct cxgbi_ppm *)(*ppm_pp);
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun pr_info("ippm: %s, ppm 0x%p,0x%p already initialized, %u/%u.\n",
494*4882a593Smuzhiyun ndev->name, ppm_pp, *ppm_pp, ppm->ppmax, ppmax);
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun kref_get(&ppm->refcnt);
497*4882a593Smuzhiyun return 1;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun *ppm_pp = ppm;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun ppm->tformat.pgsz_idx_dflt = cxgbi_ppm_find_page_index(ppm, PAGE_SIZE);
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun pr_info("ippm %s: ppm 0x%p, 0x%p, base %u/%u, pg %lu,%u, rsvd %u,%u.\n",
504*4882a593Smuzhiyun ndev->name, ppm_pp, ppm, ppm->base_idx, ppm->ppmax, PAGE_SIZE,
505*4882a593Smuzhiyun ppm->tformat.pgsz_idx_dflt, ppm->pool_rsvd,
506*4882a593Smuzhiyun ppm->pool_index_max);
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun return 0;
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun release_ppm_pool:
511*4882a593Smuzhiyun free_percpu(pool);
512*4882a593Smuzhiyun return -ENOMEM;
513*4882a593Smuzhiyun }
514*4882a593Smuzhiyun EXPORT_SYMBOL(cxgbi_ppm_init);
515*4882a593Smuzhiyun
cxgbi_tagmask_set(unsigned int ppmax)516*4882a593Smuzhiyun unsigned int cxgbi_tagmask_set(unsigned int ppmax)
517*4882a593Smuzhiyun {
518*4882a593Smuzhiyun unsigned int bits = fls(ppmax);
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun if (bits > PPOD_IDX_MAX_SIZE)
521*4882a593Smuzhiyun bits = PPOD_IDX_MAX_SIZE;
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun pr_info("ippm: ppmax %u/0x%x -> bits %u, tagmask 0x%x.\n",
524*4882a593Smuzhiyun ppmax, ppmax, bits, 1 << (bits + PPOD_IDX_SHIFT));
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun return 1 << (bits + PPOD_IDX_SHIFT);
527*4882a593Smuzhiyun }
528*4882a593Smuzhiyun EXPORT_SYMBOL(cxgbi_tagmask_set);
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun MODULE_AUTHOR("Chelsio Communications");
531*4882a593Smuzhiyun MODULE_DESCRIPTION("Chelsio common library");
532*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
533